title: Milton Friedman

text: Friedman rejected the use of fiscal policy as a tool of demand management; and he held that the government's role in the guidance of the economy should be restricted severely. Friedman wrote extensively on the Great Depression, and he termed the 1929–1933 period the Great Contraction. He argued that the Depression had been caused by an ordinary financial shock whose duration and seriousness were greatly increased by the subsequent contraction of the money supply caused by the misguided policies of the directors of the Federal Reserve.


title: Milton Friedman

text: This theory was put forth in "A Monetary History of the United States", and the chapter on the Great Depression was then published as a stand-alone book entitled "The Great Contraction, 1929–1933". Both books are still in print from the Princeton University Press, and some editions include as an appendix a speech at a University of Chicago event honoring Friedman in which Ben Bernanke made this statement:


title: Milton Friedman

text: Let me end my talk by abusing slightly my status as an official representative of the Federal Reserve. I would like to say to Milton and Anna: Regarding the Great Depression, you're right. We did it. We're very sorry. But thanks to you, we won't do it again.


title: Milton Friedman

text: Friedman also argued for the removal of government intervention in currency markets, thereby spawning an enormous literature on the subject, as well as promoting the practice of freely floating exchange rates. His close friend George Stigler explained, "As is customary in science, he did not win a full victory, in part because research was directed along different lines by the theory of rational expectations, a newer approach developed by Robert Lucas, also at the University of Chicago." The relationship between Friedman and Lucas, or new classical macroeconomics as a whole, was highly complex. The Friedmanian Phillips curve was an interesting starting point for Lucas, but he soon realized that the solution provided by Friedman was not quite satisfactory. Lucas elaborated a new approach in which rational expectations were presumed instead of the Friedmanian adaptive expectations. Due to this reformulation, the story in which the theory of the new classical Phillips curve was embedded radically changed. This modification, however, had a significant effect on Friedman's own approach, so, as a result, the theory of the Friedmanian Phillips curve also changed. Moreover, new classical adherent Neil Wallace, who was a graduate student at the University of Chicago between 1960 and 1963, regarded Friedman's theoretical courses as a mess, highlighting the strained relationship between monetarism and new classical schools.


title: Milton Friedman

text: Friedman was also known for his work on the consumption function, the permanent income hypothesis (1957), which Friedman himself referred to as his best scientific work. This work contended that utility-maximizing consumers would spend a proportional amount of what they perceived to be their permanent income. Permanent Income refers to such factors like human capital. Windfall gains would mostly be saved because of the law of diminishing marginal utility.


title: Milton Friedman

text: Friedman's essay "The Methodology of Positive Economics" (1953) provided the epistemological pattern for his own subsequent research and to a degree that of the Chicago School. There he argued that economics as "science" should be free of value judgments for it to be objective. Moreover, a useful economic theory should be judged not by its descriptive realism but by its simplicity and fruitfulness as an engine of prediction. That is, students should measure the accuracy of its predictions, rather than the 'soundness of its assumptions'. His argument was part of an ongoing debate among such statisticians as Jerzy Neyman, Leonard Savage, and Ronald Fisher.


title: Milton Friedman

text: However, despite being an advocate of the free market, Milton Friedman believed that the government had two crucial roles. In an interview with Phil Donahue, Milton Friedman argued that "the two basic functions of a government are to protect the nation against foreign enemy, and to protect citizens against its fellows.” He also admitted that although privatization of national defense could reduce the overall cost, he has not yet thought of a way to make this privatization possible.


title: Milton Friedman

text: Other important contributions include his critique of the Phillips curve and the concept of the natural rate of unemployment (1968). This critique associated his name, together with that of Edmund Phelps, with the insight that a government that brings about greater inflation cannot permanently reduce unemployment by doing so. Unemployment may be temporarily lower, if the inflation is a surprise, but in the long run unemployment will be determined by the frictions and imperfections of the labor market. If the conditions are not met and inflation is expected, the "long run" effects will replace the "short term" effects.


title: Milton Friedman

text: Through his critique, the Philips curve evolved from a strict model emphasizing the connection between inflation and unemployment as being absolute, to a model which emphasized short term unemployment reductions and long term employment stagnations.


title: Milton Friedman

text: Friedman's revised and updated Phillips Curve also changed as a result of Robert Lucas's idea of Rational Expectations, replacing the adaptive expectations Friedman used.


title: Milton Friedman

text: One of his most famous contributions to statistics is sequential sampling. Friedman did statistical work at the Division of War Research at Columbia, where he and his colleagues came up with the technique. It became, in the words of "The New Palgrave Dictionary of Economics", "the standard analysis of quality control inspection". The dictionary adds, "Like many of Friedman's contributions, in retrospect it seems remarkably simple and obvious to apply basic economic ideas to quality control; that, however, is a measure of his genius."


title: Milton Friedman

text: Although Friedman concluded the government does have a role in the monetary system he was critical of the Federal Reserve due to its poor performance and felt it should be abolished. He was opposed to Federal Reserve policies, even during the so-called 'Volcker shock' that was labeled 'monetarist'. Friedman believed the Federal Reserve System should ultimately be replaced with a computer program. He favored a system that would automatically buy and sell securities in response to changes in the money supply.


title: Milton Friedman

text: The proposal to constantly grow the money supply at a certain predetermined amount every year has become known as Friedman's k-percent rule. There is debate about the effectiveness of a theoretical money supply targeting regime. The Fed's inability to meet its money supply targets from 1978–1982 led some to conclude it is not a feasible alternative to more conventional inflation and interest rate targeting. Towards the end of his life, Friedman expressed doubt about the validity of targeting the quantity of money. To date, most countries have adopted inflation targeting instead of the k-percent rule.


title: Milton Friedman

text: Idealistically, Friedman actually favored the principles of the 1930s Chicago plan, which would have ended fractional reserve banking and, thus, private money creation. It would force banks to have 100% reserves backing deposits, and instead place money creation powers solely in the hands of the US Government. This would make targeting money growth more possible, as endogenous money created by fractional reserve lending would no longer be a major issue.


title: Milton Friedman

text: Friedman was a strong advocate for floating exchange rates throughout the entire Bretton-Woods period (1944–1971). He argued that a flexible exchange rate would make external adjustment possible and allow countries to avoid balance of payments crises. He saw fixed exchange rates as an undesirable form of government intervention. The case was articulated in an influential 1953 paper, "The Case for Flexible Exchange Rates," at a time when most commentators regarded the possibility of floating exchange rates as an unrealistic policy proposal.


title: Milton Friedman

text: While Walter Oi is credited with establishing the economic basis for a volunteer military, Friedman was a proponent, and was credited with ending the draft, stating that the draft was "inconsistent with a free society."


title: Milton Friedman

text: In "Capitalism and Freedom", he argued conscription is inequitable and arbitrary, preventing young men from shaping their lives as they see fit. During the Nixon administration he headed the committee to research a conversion to paid/volunteer armed force. He would later state his role in eliminating the conscription in the United States was his proudest accomplishment. Friedman did, however, believe the introduction of a system of universal military training as a reserve in cases of war-time could be justified.


title: Milton Friedman

text: Biographer Lanny Ebenstein noted a drift over time in Friedman's views from an interventionist to a more cautious foreign policy. He supported US involvement in the Second World War and initially supported a hard-line against Communism, but moderated over time. However, Friedman did state in a 1995 interview that he was an anti-interventionist. He opposed the Gulf War and the Iraq War. In a spring 2006 interview, Friedman said the US's stature in the world had been eroded by the Iraq War, but that it might be improved if Iraq were to become a peaceful and independent country.


title: Milton Friedman

text: Friedman was an economic advisor and speech writer in Barry Goldwater's failed presidential campaign in 1964. He was an advisor to California governor Ronald Reagan, and was active in Reagan's presidential campaigns. He served as a member of President Reagan's Economic Policy Advisory Board starting in 1981. In 1988, he received the Presidential Medal of Freedom and the National Medal of Science.


title: Milton Friedman

text: Friedman stated that he was a libertarian philosophically, but a member of the U.S. Republican Party for the sake of "expediency" ("I am a libertarian with a small 'l' and a Republican with a capital 'R.' And I am a Republican with a capital 'R' on grounds of expediency, not on principle.") But, he said, "I think the term classical liberal is also equally applicable. I don't really care very much what I'm called. I'm much more interested in having people thinking about the ideas, rather than the person."


title: Milton Friedman

text: His citation for the Presidential Medal of Freedom reads: "He has used a brilliant mind to advance a moral vision: the vision of a society where men and women are free, free to choose, but where government is not as free to override their decisions. That vision has changed America, and it is changing the world. All of us owe a tremendous debt to this man’s towering intellect and his devotion to liberty."


title: Milton Friedman

text: Friedman was supportive of the state provision of some public goods that private businesses are not considered as being able to provide. However, he argued that many of the services performed by government could be performed better by the private sector. Above all, if some public goods are provided by the state, he believed that they should not be a legal monopoly where private competition is prohibited; for example, he wrote:


title: Milton Friedman

text: Friedman argued further that other advantages of the negative income tax were that it could fit directly into the tax system, would be less costly, and would reduce the administrative burden of implementing a social safety net. Friedman reiterated these arguments 18 years later in "Free to Choose", with the additional proviso that such a reform would only be satisfactory if it replaced the current system of welfare programs rather than augment it. According to economist Robert H. Frank, writing in "The New York Times", Friedman's views in this regard were grounded in a belief that while "market forces ... accomplish wonderful things", they "cannot ensure a distribution of income that enables all citizens to meet basic economic needs". Friedman also criticized urban renewal programs in the United States due to their racially discriminatory and economically regressive effects.


title: Milton Friedman

text: In 1979, Friedman expressed support for environmental taxes in general in an interview on "The Phil Donahue Show", saying "the best way to [deal with pollution] is to impose a tax on the cost of the pollutants emitted by a car and make an incentive for car manufacturers and for consumers to keep down the amount of pollution." In "Free to Choose", Friedman reiterated his support for environmental taxes as compared with increased environmental regulation, stating "The preservation of the environment and the avoidance of undue pollution are real problems and they are problems concerning which the government has an important role to play. … Most economists agree that a far better way to control pollution than the present method of specific regulation and supervision is to introduce market discipline by imposing effluent charges."


title: Milton Friedman

text: In his 1955 article "The Role of Government in Education" Friedman proposed supplementing publicly operated schools with privately run but publicly funded schools through a system of school vouchers. Reforms similar to those proposed in the article were implemented in, for example, Chile in 1981 and Sweden in 1992. In 1996, Friedman, together with his wife, founded the Friedman Foundation for Educational Choice to advocate school choice and vouchers. In 2016, the Friedman Foundation changed its name to EdChoice to honor the Friedmans' desire to have the educational choice movement live on without their names attached to it after their deaths.


title: Milton Friedman

text: Michael Walker of the Fraser Institute and Friedman hosted a series of conferences from 1986 to 1994. The goal was to create a clear definition of economic freedom and a method for measuring it. Eventually this resulted in the first report on worldwide economic freedom, "Economic Freedom in the World". This annual report has since provided data for numerous peer-reviewed studies and has influenced policy in several nations.


title: Milton Friedman

text: With sixteen other distinguished economists he opposed the Copyright Term Extension Act, and signed on to an amicus brief filed in "Eldred v. Ashcroft". Friedman jokingly described it as a "no-brainer".


title: Milton Friedman

text: Friedman argued for stronger basic legal (constitutional) protection of economic rights and freedoms to further promote industrial-commercial growth and prosperity and buttress democracy and freedom and the rule of law generally in society.


title: Milton Friedman

text: Friedman also supported libertarian policies such as legalization of drugs and prostitution. During 2005, Friedman and more than 500 other economists advocated discussions regarding the economic benefits of the legalization of marijuana.


title: Milton Friedman

text: Friedman was also a supporter of gay rights. He never specifically supported same-sex marriage, instead saying "I do not believe there should be any discrimination against gays."


title: Milton Friedman

text: Friedman favored immigration, saying "legal and illegal immigration has a very positive impact on the U.S. economy." However, he suggested that immigrants ought not to have access to the welfare system. Friedman stated that immigration from Mexico had been a "good thing", in particular illegal immigration. Friedman argued that illegal immigration was a boon because they "take jobs that most residents of this country are unwilling to take, they provide employers with workers of a kind they cannot get" and they do not use welfare. In "Free to Choose", Friedman wrote:


title: Milton Friedman

text: No arbitrary obstacles should prevent people from achieving those positions for which their talents fit them and which their values lead them to seek. Not birth, nationality, color, religion, sex, nor any other irrelevant characteristic should determine the opportunities that are open to a person – only his abilities.Friedman also famously argued that the welfare state must end before immigration, or more specifically, before open borders, because immigrants might have an incentive to come directly because of welfare payments. Economist Bryan Caplan has disputed this assertion, arguing that welfare is generally distributed not among immigrants, but instead retirees, through Social Security.


title: Milton Friedman

text: Friedman was against public housing as he believed it was also a form of welfare. He believed the one of the main arguments that politicians have for public housing is that regular low income housing was too expensive due to the imposed higher cost of a fire and police department. He believed that it would only increase taxes and not benefit low income people in the long run. Friedman was an advocate for direct cash instead of public housing believing that the people would be better off that way. He argued that liberals would never agree with this idea due to them not trusting their own citizens. He also stated that regression has already happened with more land being left vacant due to slow construction. Friedman argued that public housing instead encourages juvenile delinquency.


title: Milton Friedman

text: Friedman was also against minimum wage laws, he saw them as a clear case as one can find that the precise opposite is happening when this was attempted. Minimum wage laws would increase unemployment in his eyes and that employers would not hire back workers that were already there for less pay. In his view, this would leave low income people worse off because the voters for minimum wage laws would then become the victims of unemployment. He believed that these ideas of new minimum wage laws came from Northern factories and Unions, in an attempt to reduce competition from the South.


title: Milton Friedman

text: George H. Nash, a leading historian of American conservatism, says that by "the end of the 1960s he was probably the most highly regarded and influential conservative scholar in the country, and one of the few with an international reputation." In 1971, Friedman received the Golden Plate Award of the American Academy of Achievement. Friedman allowed the libertarian Cato Institute to use his name for its biennial Milton Friedman Prize for Advancing Liberty beginning in 2001. A Friedman Prize was given to the late British economist Peter Bauer in 2002, Peruvian economist Hernando de Soto in 2004, Mart Laar, former Estonian Prime Minister in 2006 and a young Venezuelan student Yon Goicoechea in 2008. His wife Rose, sister of Aaron Director, with whom he initiated the Friedman Foundation for Educational Choice, served on the international selection committee.


title: Milton Friedman

text: Upon Friedman's death, Harvard President Lawrence Summers called him "The Great Liberator", saying "any honest Democrat will admit that we are now all Friedmanites." He said Friedman's great popular contribution was "in convincing people of the importance of allowing free markets to operate."


title: Milton Friedman

text: Stephen Moore, a member of the editorial forward of "The Wall Street Journal", said in 2013: "Quoting the most-revered champion of free-market economics since Adam Smith has become a little like quoting the Bible." He adds, "There are sometimes multiple and conflicting interpretations."


title: Milton Friedman

text: Although post-Keynesian economist J. K. Galbraith was a prominent critic of Friedman and his ideology, he observed that "The age of John Maynard Keynes gave way to the age of Milton Friedman."


title: Milton Friedman

text: Friedman won the Nobel Memorial Prize in Economic Sciences, the sole recipient for 1976, "for his achievements in the fields of consumption analysis, monetary history and theory and for his demonstration of the complexity of stabilization policy." His appointment was controversial, mainly for his association with military dictator Augusto Pinochet. Some economists, such as Institutional economist and 1974 Nobel Prize winner Gunnar Myrdal, criticized Friedman, and Myrdal's own 1974 Nobel Prize partner Friedrich Hayek, for being reactionaries. Myrdal's criticism caused some economists to oppose the Sveriges Riksbank Prize in Economics Sciences in Memory of Alfred Nobel itself.


title: Milton Friedman

text: Friedman once said: "If you want to see capitalism in action, go to Hong Kong." He wrote in 1990 that the Hong Kong economy was perhaps the best example of a free market economy.


title: Milton Friedman

text: One month before his death, he wrote "Hong Kong Wrong – What would Cowperthwaite say?" in "The Wall Street Journal", criticizing Donald Tsang, Chief Executive of Hong Kong, for abandoning "positive non interventionism." Tsang later said he was merely changing the slogan to "big market, small government", where small government is defined as less than 20% of GDP. In a debate between Tsang and his rival Alan Leong before the 2007 Hong Kong Chief Executive election, Leong introduced the topic and jokingly accused Tsang of angering Friedman to death (Friedman had died only a year prior).


title: Milton Friedman

text: During 1975, two years after the military coup that brought military dictator Augusto Pinochet to power and ended the government of Salvador Allende, the economy of Chile experienced a severe crisis. Friedman and Arnold Harberger accepted an invitation of a private Chilean foundation to visit Chile and speak on principles of economic freedom. He spent seven days in Chile giving a series of lectures at the Pontifical Catholic University of Chile and the University of Chile. One of the lectures was entitled "The Fragility of Freedom" and according to Friedman, "dealt with precisely the threat to freedom from a centralized military government."


title: Milton Friedman

text: In a letter to Pinochet of April 21, 1975, Friedman considered the "key economic problems of Chile are clearly ... inflation and the promotion of a healthy social market economy". He stated that "There is only one way to end inflation: by drastically reducing the rate of increase of the quantity of money" and that "cutting government spending is by far and away the most desirable way to reduce the fiscal deficit, because it ... strengthens the private sector thereby laying the foundations for "healthy" economic growth". As to how rapidly inflation should be ended, Friedman felt that "for Chile where inflation is raging at 10–20% a month ... gradualism is not feasible. It would involve so painful an operation over so long a period that the "patient" would not survive." Choosing "a brief period of higher unemployment" was the lesser evil.. and that "the experience of Germany, ... of Brazil ..., of the post-war adjustment in the U.S. ... all argue for shock treatment". In the letter Friedman recommended to deliver the shock approach with "a package to eliminate the surprise and to relieve acute distress" and "for definiteness let me sketch the contents of a package proposal ... to be taken as illustrative" although his knowledge of Chile was "too limited to enable [him] to be precise or comprehensive". He listed a "sample proposal" of 8 monetary and fiscal measures including "the removal of as many as obstacles as possible that now hinder the private market. For example, suspend ... the present law against discharging employees". He closed, stating "Such a shock program could end inflation in months". His letter suggested that cutting spending to reduce the fiscal deficit would result in less transitional unemployment than raising taxes.


title: Milton Friedman

text: Sergio de Castro, a Chilean Chicago School graduate, became the nation's Minister of Finance in 1975. During his six-year tenure, foreign investment increased, restrictions were placed on striking and labor unions, and GDP rose yearly. A foreign exchange program was created between the Catholic University of Chile and the University of Chicago. Many other Chicago School alumni were appointed government posts during and after Pinochet's dictatorship; others taught its economic doctrine at Chilean universities. They became known as the Chicago Boys.


title: Milton Friedman

text: Friedman defended his activity in Chile on the grounds that, in his opinion, the adoption of free market policies not only improved the economic situation of Chile but also contributed to the amelioration of Pinochet's rule and to the eventual transition to a democratic government during 1990. That idea is included in "Capitalism and Freedom", in which he declared that economic freedom is not only desirable in itself but is also a necessary condition for political freedom. In his 1980 documentary "Free to Choose", he said the following: "Chile is not a politically free system, and I do not condone the system. But the people there are freer than the people in Communist societies because government plays a smaller role. ... The conditions of the people in the past few years has been getting better and not worse. They would be still better to get rid of the junta and to be able to have a free democratic system." In 1984, Friedman stated that he has "never refrained from criticizing the political system in Chile." In 1991 he said: "I have nothing good to say about the political regime that Pinochet imposed. It was a terrible political regime. The real miracle of Chile is not how well it has done economically; the real miracle of Chile is that a military junta was willing to go against its principles and support a free market regime designed by principled believers in a free market. ... In Chile, the drive for political freedom, that was generated by economic freedom and the resulting economic success, ultimately resulted in a referendum that introduced political democracy. Now, at long last, Chile has all three things: political freedom, human freedom and economic freedom. Chile will continue to be an interesting experiment to watch to see whether it can keep all three or whether, now that it has political freedom, that political freedom will tend to be used to destroy or reduce economic freedom." He stressed that the lectures he gave in Chile were the same lectures he later gave in China and other socialist states. He further stated "I do not consider it as evil for an economist to render technical economic advice to the Chilean Government, any more than I would regard it as evil for a physician to give technical medical advice to the Chilean Government to help end a medical plague."


title: Milton Friedman

text: During the 2000 PBS documentary "The Commanding Heights" (based on the book), Friedman continued to argue that "free markets would undermine [Pinochet's] political centralization and political control.", and that criticism over his role in Chile missed his main contention that freer markets resulted in freer people, and that Chile's unfree economy had caused Pinochet's rise. Friedman advocated for free markets which undermined "political centralization and political control".


title: Milton Friedman

text: Because of his involvement with the government of Chile, which was a dictatorship at the time of his visit, there were international protests, spanning from Sweden to America when Friedman was awarded the Nobel Memorial Prize in 1976. Friedman was accused of supporting the military dictatorship in Chile because of the relation of economists of the University of Chicago to Pinochet, and a seven-day trip he took to Chile during March 1975 (less than two years after the coup that ended with the death of President Salvador Allende). Friedman answered that he was never an advisor to the dictatorship, but only gave some lectures and seminars on inflation, and met with officials, including Augusto Pinochet the head of the military dictatorship, while in Chile.


title: Milton Friedman

text: After a 1991 speech on drug legalization, Friedman answered a question on his involvement with the Pinochet regime, saying that he was never an advisor to Pinochet (also mentioned in his 1984 Iceland interview), but that a group University of Chicago students were involved in Chile's economic reforms. Friedman credited these reforms with high levels of economic growth and with the establishment of democracy that has subsequently occurred in Chile. In October 1988, after returning from a lecture tour of China during which he had met with Zhao Ziyang, General Secretary of the Chinese Communist Party, Friedman wrote to The Stanford Daily asking if he should anticipate a similar "avalanche of protests for having been willing to give advice to so evil a government? And if not, why not?"


title: Milton Friedman

text: Friedman visited Iceland during the autumn of 1984, met with important Icelanders and gave a lecture at the University of Iceland on the "tyranny of the "status quo"." He participated in a lively television debate on August 31, 1984, with socialist intellectuals, including Ólafur Ragnar Grímsson, who later became President of Iceland. When they complained that a fee was charged for attending his lecture at the university and that, hitherto, lectures by visiting scholars had been free-of-charge, Friedman replied that previous lectures had not been free-of-charge in a meaningful sense: lectures always have related costs. What mattered was whether attendees or non-attendees covered those costs. Friedman thought that it was fairer that only those who attended paid. In this discussion Friedman also stated that he did not receive any money for delivering that lecture.


title: Milton Friedman

text: Although Friedman never visited Estonia, his book "Free to Choose" influenced Estonia's then 32-year-old prime minister, Mart Laar, who has claimed that it was the only book on economics he had read before taking office. Laar's reforms are often credited with responsibility for transforming Estonia from an impoverished Soviet republic to the "Baltic Tiger." A prime element of Laar's program was introduction of the flat tax. Laar won the 2006 Milton Friedman Prize for Advancing Liberty, awarded by the Cato Institute.


title: Milton Friedman

text: After 1950 Friedman was frequently invited to lecture in Britain, and by the 1970s his ideas had gained widespread attention in conservative circles. For example, he was a regular speaker at the Institute of Economic Affairs (IEA), a libertarian think tank. Conservative politician Margaret Thatcher closely followed IEA programs and ideas, and met Friedman there in 1978. He also strongly influenced Keith Joseph, who became Thatcher's senior advisor on economic affairs, as well as Alan Walters and Patrick Minford, two other key advisers. Major newspapers, including the "Daily Telegraph," "The Times," and "The Financial Times" all promulgated Friedman's monetarist ideas to British decision-makers. Friedman's ideas strongly influenced Thatcher and her allies when she became Prime Minister in 1979. Galbraith strongly criticised the "workability of the Friedmanite formula" for which, he said, "Britain has volunteered to be the guinea pig".


title: Milton Friedman

text: After his death a number of obituaries and articles were written in Friedman's honor, citing him as one of the most important and influential economists of the post-war era. Milton Friedman's somewhat controversial legacy in America remains strong within the conservative movement. However, some journalists and economists like Noah Smith and Scott Sumner have argued Friedman's academic legacy has been buried under his political philosophy and misinterpreted by modern conservatives.


title: Milton Friedman

text: Econometrician David Hendry criticized part of Friedman's and Anna Schwartz's 1982 "Monetary Trends". When asked about it during an interview with Icelandic TV in 1984, Friedman said that the criticism referred to a different problem from that which he and Schwartz had tackled, and hence was irrelevant, and pointed out the lack of consequential peer review amongst econometricians on Hendry's work. In 2006, Hendry said that Friedman was guilty of "serious errors" of misunderstanding that meant "the t-ratios he reported for UK money demand were overstated by nearly 100 per cent", and said that, in a paper published in 1991 with Neil Ericsson, he had refuted "almost every empirical claim ... made about UK money demand" by Friedman and Schwartz. A 2004 paper updated and confirmed the validity of the Hendry–Ericsson findings through 2000. Some commentators believe that Friedman was not open enough, in their view, to the possibility of market inefficiencies. Economist Noah Smith argues that while Friedman made many important contributions to economic theory not all of his ideas relating to macroeconomics have entirely held up over the years and that too few people are willing to challenge them.


title: Milton Friedman

text: Political scientist C. B. Macpherson disagreed with Friedman's historical assessment of economic freedom leading to political freedom, suggesting that political freedom actually gave way to economic freedom for property-owning elites. He also challenged the notion that markets efficiently allocated resources and rejected Friedman's definition of liberty. Friedman's positivist methodological approach to economics has also been critiqued and debated. Finnish economist Uskali Mäki argued some of his assumptions were unrealistic and vague.


title: Milton Friedman

text: Friedman has been criticized by some prominent Austrian economists, including Murray Rothbard and Walter Block. Block called Friedman a "socialist", and was critical of his support for a central banking system, saying "First and foremost, this economist supported the Federal Reserve System all throughout his professional life. That organization of course does not own the money stock, but controls it. Friedman was an inveterate hater of the gold standard, denigrating its advocates as 'gold bugs'." Rothbard criticized Friedman's conclusion that the Great Depression happened as a result of a deflationary spiral, arguing that this is inconsistent with the data, because during the period described by Friedman as "The Great Contraction", the money supply increased.


title: Milton Friedman

text: Although the book was described by the Cato Institute as among the greatest economics books in the 20th century, and "A Monetary History of the United States" is widely considered to be among the most influential economics books ever made, it has endured criticisms for its conclusion that the Federal Reserve was to blame for the Great Depression. Some economists, including noted Friedman critic Peter Temin, have raised questions about the legitimacy of Friedman's claims about whether or not monetary quantity levels were endogenous rather than exogenously determined, as "A Monetary History of the United States" posits. Nobel-prize winning economist Paul Krugman argued that the 2008 recession proved that, during a recession, a central bank cannot control broad money (M3 money, as defined by the OECD), and even if it can, the money supply does not bear a direct or proven relationship with GDP. According to Krugman, this was true in the 1930s, and the claim that the Federal Reserve could have avoided the Great Depression by reacting to what Friedman called "The Great Contraction" is "highly dubious".


title: Milton Friedman

text: James Tobin questioned the importance of velocity of money, and how informative this measure of the frequency of transactions is to understanding the various fluctuations observed in "A Monetary History of the United States".


title: Milton Friedman

text: Economic historian Barry Eichengreen argued that because of the gold standard, which was at this point in time the chief monetary system of the world, the Federal Reserve's hands were tied. This was because, in order to retain the credibility of the gold standard, the Federal Reserve could not undertake actions like dramatically expanding the money supply as proposed by Friedman and Schwartz.


title: Milton Friedman

text: Lawrence Mishel, distinguished fellow of the Economic Policy Institute, argues that wages have been kept low in the United States because of the Friedman doctrine, namely the adoption of corporate practices and economic policies (or the blocking of reforms) at the behest of business and the wealthy elite, which resulted in the systematic disempowerment of workers. He argues that the lack of worker power caused wage suppression, increased wage inequality, and exacerbated racial disparities. Notably, mechanisms such as excessive unemployment, globalization, eroded labor standards (and their lack of enforcement), weakened collective bargaining, and corporate structure changes that disadvantage workers, all collectively functioned to keep wages low. From 1980 to 2020, while economy-wide productivity rose almost 70 percent, hourly compensation for typical workers increased less than 12 percent, whilst the earnings of the top 1 percent and 0.1 percent increased 158 percent and 341 percent, respectively.


title: PCI Express

text: PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common motherboard interface for personal computers' graphics cards, hard disk drive host adapters, SSDs, Wi-Fi and Ethernet hardware connections. PCIe has numerous improvements over the older standards, including higher maximum system bus throughput, lower I/O pin count and smaller physical footprint, better performance scaling for bus devices, a more detailed error detection and reporting mechanism (Advanced Error Reporting, AER), and native hot-swap functionality. More recent revisions of the PCIe standard provide hardware support for I/O virtualization.


title: PCI Express

text: The PCI Express electrical interface is measured by the number of simultaneous lanes. (A lane is a single send/receive line of data. The analogy is a highway with traffic in both directions.) The interface is also used in a variety of other standards — most notably the laptop expansion card interface called ExpressCard. It is also used in the storage interfaces of SATA Express, U.2 (SFF-8639) and M.2.


title: PCI Express

text: Format specifications are maintained and developed by the PCI-SIG (PCI Special Interest Group) — a group of more than 900 companies that also maintains the conventional PCI specifications.


title: PCI Express

text: Conceptually, the PCI Express bus is a high-speed serial replacement of the older PCI/PCI-X bus. One of the key differences between the PCI Express bus and the older PCI is the bus topology; PCI uses a shared parallel bus architecture, in which the PCI host and all devices share a common set of address, data, and control lines. In contrast, PCI Express is based on point-to-point topology, with separate serial links connecting every device to the root complex (host). Because of its shared bus topology, access to the older PCI bus is arbitrated (in the case of multiple masters), and limited to one master at a time, in a single direction. Furthermore, the older PCI clocking scheme limits the bus clock to the slowest peripheral on the bus (regardless of the devices involved in the bus transaction). In contrast, a PCI Express bus link supports full-duplex communication between any two endpoints, with no inherent limitation on concurrent access across multiple endpoints.


title: PCI Express

text: In terms of bus protocol, PCI Express communication is encapsulated in packets. The work of packetizing and de-packetizing data and status-message traffic is handled by the transaction layer of the PCI Express port (described later). Radical differences in electrical signaling and bus protocol require the use of a different mechanical form factor and expansion connectors (and thus, new motherboards and new adapter boards); PCI slots and PCI Express slots are not interchangeable. At the software level, PCI Express preserves backward compatibility with PCI; legacy PCI system software can detect and configure newer PCI Express devices without explicit support for the PCI Express standard, though new PCI Express features are inaccessible.


title: PCI Express

text: The PCI Express link between two devices can vary in size from one to 16 lanes. In a multi-lane link, the packet data is striped across lanes, and peak data throughput scales with the overall link width. The lane count is automatically negotiated during device initialization and can be restricted by either endpoint. For example, a single-lane PCI Express (x1) card can be inserted into a multi-lane slot (x4, x8, etc.), and the initialization cycle auto-negotiates the highest mutually supported lane count. The link can dynamically down-configure itself to use fewer lanes, providing a failure tolerance in case bad or unreliable lanes are present. The PCI Express standard defines link widths of x1, x2, x4, x8, and x16. Up to and including PCIe 5.0, x12, and x32 links were defined as well but never used. This allows the PCI Express bus to serve both cost-sensitive applications where high throughput is not needed, and performance-critical applications such as 3D graphics, networking (10 Gigabit Ethernet or multiport Gigabit Ethernet), and enterprise storage (SAS or Fibre Channel). Slots and connectors are only defined for a subset of these widths, with link widths in between using the next larger physical slot size.


title: PCI Express

text: As a point of reference, a PCI-X (133 MHz 64-bit) device and a PCI Express 1.0 device using four lanes (x4) have roughly the same peak single-direction transfer rate of 1064 MB/s. The PCI Express bus has the potential to perform better than the PCI-X bus in cases where multiple devices are transferring data simultaneously, or if communication with the PCI Express peripheral is bidirectional.


title: PCI Express

text: PCI Express devices communicate via a logical connection called an "interconnect" or "link". A link is a point-to-point communication channel between two PCI Express ports allowing both of them to send and receive ordinary PCI requests (configuration, I/O or memory read/write) and interrupts (INTx, MSI or MSI-X). At the physical level, a link is composed of one or more "lanes". Low-speed peripherals (such as an 802.11 Wi-Fi card) use a single-lane (x1) link, while a graphics adapter typically uses a much wider and therefore faster 16-lane (x16) link.


title: PCI Express

text: A lane is composed of two differential signaling pairs, with one pair for receiving data and the other for transmitting. Thus, each lane is composed of four wires or signal traces. Conceptually, each lane is used as a full-duplex byte stream, transporting data packets in eight-bit "byte" format simultaneously in both directions between endpoints of a link. Physical PCI Express links may contain 1, 4, 8 or 16 lanes. Lane counts are written with an "x" prefix (for example, "x8" represents an eight-lane card or slot), with x16 being the largest size in common use. Lane sizes are also referred to via the terms "width" or "by" e.g., an eight-lane slot could be referred to as a "by 8" or as "8 lanes wide."


title: PCI Express

text: The bonded serial bus architecture was chosen over the traditional parallel bus because of the inherent limitations of the latter, including half-duplex operation, excess signal count, and inherently lower bandwidth due to timing skew. Timing skew results from separate electrical signals within a parallel interface traveling through conductors of different lengths, on potentially different printed circuit board (PCB) layers, and at possibly different signal velocities. Despite being transmitted simultaneously as a single word, signals on a parallel interface have different travel duration and arrive at their destinations at different times. When the interface clock period is shorter than the largest time difference between signal arrivals, recovery of the transmitted word is no longer possible. Since timing skew over a parallel bus can amount to a few nanoseconds, the resulting bandwidth limitation is in the range of hundreds of megahertz.


title: PCI Express

text: A serial interface does not exhibit timing skew because there is only one differential signal in each direction within each lane, and there is no external clock signal since clocking information is embedded within the serial signal itself. As such, typical bandwidth limitations on serial signals are in the multi-gigahertz range. PCI Express is one example of the general trend toward replacing parallel buses with serial interconnects; other examples include Serial ATA (SATA), USB, Serial Attached SCSI (SAS), FireWire (IEEE 1394), and RapidIO. In digital video, examples in common use are DVI, HDMI, and DisplayPort.


title: PCI Express

text: Multichannel serial design increases flexibility with its ability to allocate fewer lanes for slower devices.


title: PCI Express

text: A PCI Express card fits into a slot of its physical size or larger (with x16 as the largest used), but may not fit into a smaller PCI Express slot; for example, a x16 card may not fit into a x4 or x8 slot. Some slots use open-ended sockets to permit physically longer cards and negotiate the best available electrical and logical connection.


title: PCI Express

text: The number of lanes actually connected to a slot may also be fewer than the number supported by the physical slot size. An example is a x16 slot that runs at x4, which accepts any x1, x2, x4, x8 or x16 card, but provides only four lanes. Its specification may read as "x16 (x4 mode)", while "mechanical @ electrical" notation (e.g. "x16 @ x4") is also common. The advantage is that such slots can accommodate a larger range of PCI Express cards without requiring motherboard hardware to support the full transfer rate. Standard mechanical sizes are x1, x4, x8, and x16. Cards with a differing number of lanes need to use the next larger mechanical size (i.e. a x2 card uses the x4 size, or a x12 card uses the x16 size).


title: PCI Express

text: The cards themselves are designed and manufactured in various sizes. For example, solid-state drives (SSDs) that come in the form of PCI Express cards often use HHHL (half height, half length) and FHHL (full height, half length) to describe the physical dimensions of the card.


title: PCI Express

text: Modern (since c.2012) gaming video cards usually exceed the height as well as thickness specified in the PCI Express standard, due to the need for more capable and quieter cooling fans, as gaming video cards often emit hundreds of watts of heat. Modern computer cases are often wider to accommodate these taller cards, but not always. Since full-length cards (312 mm) are uncommon, modern cases sometimes cannot fit those. The thickness of these cards also typically occupies the space of 2 PCIe slots. In fact, even the methodology of how to measure the cards varies between vendors, with some including the metal bracket size in dimensions and others not.


title: PCI Express

text: For instance, a 2020 Sapphire card measures 135 mm in height (excluding the metal bracket), which exceeds the PCIe standard height by 28 mm. Another card by XFX measures 55 mm thick (i.e. 2.7 PCI slots at 20.32 mm), taking up 3 PCIe slots. The Asus GeForce RTX 3080 10 GB STRIX GAMING OC video card is a two-slot card that has dimensions of 318.5mm × 140.1mm × 57.8mm, exceeding PCI Express' maximum length, height, and thickness respectively.


title: PCI Express

text: The following table identifies the conductors on each side of the edge connector on a PCI Express card. The solder side of the printed circuit board (PCB) is the A-side, and the component side is the B-side. PRSNT1# and PRSNT2# pins must be slightly shorter than the rest, to ensure that a hot-plugged card is fully inserted. The WAKE# pin uses full voltage to wake the computer, but must be pulled high from the standby power to indicate that the card is wake capable.


title: PCI Express

text: All PCI express cards may consume up to at (). The amount of +12 V and total power they may consume depends on the form factor and the role of the card:


title: PCI Express

text: Some cards use two 8-pin connectors, but this has not been standardized yet , therefore such cards must not carry the official PCI Express logo. This configuration allows 375 W total () and will likely be standardized by PCI-SIG with the PCI Express 4.0 standard. The 8-pin PCI Express connector could be confused with the EPS12V connector, which is mainly used for powering SMP and multi-core systems. The power connectors are variants of the Molex Mini-Fit Jr. series connectors.


title: PCI Express

text: PCI Express Mini Card (also known as Mini PCI Express, Mini PCIe, Mini PCI-E, mPCIe, and PEM), based on PCI Express, is a replacement for the Mini PCI form factor. It is developed by the PCI-SIG. The host device supports both PCI Express and USB 2.0 connectivity, and each card may use either standard. Most laptop computers built after 2005 use PCI Express for expansion cards; however, , many vendors are moving toward using the newer M.2 form factor for this purpose.


title: PCI Express

text: Due to different dimensions, PCI Express Mini Cards are not physically compatible with standard full-size PCI Express slots; however, passive adapters exist that let them be used in full-size slots.


title: PCI Express

text: Dimensions of PCI Express Mini Cards are 30 mm × 50.95 mm (width × length) for a Full Mini Card. There is a 52-pin edge connector, consisting of two staggered rows on a 0.8 mm pitch. Each row has eight contacts, a gap equivalent to four contacts, then a further 18 contacts. Boards have a thickness of 1.0 mm, excluding the components. A "Half Mini Card" (sometimes abbreviated as HMC) is also specified, having approximately half the physical length of 26.8 mm.


title: PCI Express

text: Despite sharing the Mini PCI Express form factor, an mSATA slot is not necessarily electrically compatible with Mini PCI Express. For this reason, only certain notebooks are compatible with mSATA drives. Most compatible systems are based on Intel's Sandy Bridge processor architecture, using the Huron River platform. Notebooks such as Lenovo's ThinkPad T, W and X series, released in March–April 2011, have support for an mSATA SSD card in their WWAN card slot. The ThinkPad Edge E220s/E420s, and the Lenovo IdeaPad Y460/Y560/Y570/Y580 also support mSATA. On the contrary, the L-series among others can only support M.2 cards using the PCIe standard in the WWAN slot.


title: PCI Express

text: Some notebooks (notably the Asus Eee PC, the Apple MacBook Air, and the Dell mini9 and mini10) use a variant of the PCI Express Mini Card as an SSD. This variant uses the reserved and several non-reserved pins to implement SATA and IDE interface passthrough, keeping only USB, ground lines, and sometimes the core PCIe x1 bus intact. This makes the "miniPCIe" flash and solid-state drives sold for netbooks largely incompatible with true PCI Express Mini implementations.


title: PCI Express

text: Also, the typical Asus miniPCIe SSD is 71 mm long, causing the Dell 51 mm model to often be (incorrectly) referred to as half length. A true 51 mm Mini PCIe SSD was announced in 2009, with two stacked PCB layers that allow for higher storage capacity. The announced design preserves the PCIe interface, making it compatible with the standard mini PCIe slot. No working product has yet been developed.


title: PCI Express

text: Intel has numerous desktop boards with the PCIe x1 Mini-Card slot that typically do not support mSATA SSD. A list of desktop boards that natively support mSATA in the PCIe x1 Mini-Card slot (typically multiplexed with a SATA port) is provided on the Intel Support site.


title: PCI Express

text: M.2 replaces the mSATA standard and Mini PCIe. Computer bus interfaces provided through the M.2 connector are PCI Express 3.0 (up to four lanes), Serial ATA 3.0, and USB 3.0 (a single logical port for each of the latter two). It is up to the manufacturer of the M.2 host or device to choose which interfaces to support, depending on the desired level of host support and device type.


title: PCI Express

text: "PCI Express External Cabling" (also known as "External PCI Express", "Cabled PCI Express", or "ePCIe") specifications were released by the PCI-SIG in February 2007.


title: PCI Express

text: Standard cables and connectors have been defined for x1, x4, x8, and x16 link widths, with a transfer rate of 250 MB/s per lane. The PCI-SIG also expects the norm to evolve to reach 500 MB/s, as in PCI Express 2.0. An example of the uses of Cabled PCI Express is a metal enclosure, containing a number of PCIe slots and PCIe-to-ePCIe adapter circuitry. This device would not be possible had it not been for the ePCIe specification.


title: PCI Express

text: "OCuLink" (standing for "optical-copper link", since "Cu" is the chemical symbol for Copper) is an extension for the "cable version of PCI Express", acting as a competitor to version 3 of the Thunderbolt interface. Version 1.0 of OCuLink, released in Oct 2015, supports up to PCIe 3.0 x4 lanes (8 GT/s (gigatransfers per second), 3.9 GB/s) over copper cabling; a fiber optic version may appear in the future.


title: PCI Express

text: In its latest version OCuLink-2, it supports up to 16 GB/s (PCIe 4.0 x8) while the maximum bandwidth of a full speed Thunderbolt 4 cable is 5 GB/s. Some suppliers may design their connector product to be able to support next generation PCI Express 5.0 running at 32 GT/s per lane for future proofing and minimizing development costs over the next few years. Initially, PCI-SIG expected to bring OCuLink into laptops for connection of powerful external GPU boxes. It turned out to be a rare use. Instead, OCuLink became popular for PCIe interconnections in servers.


title: PCI Express

text: The PCIe slot connector can also carry protocols other than PCIe. Some 9xx series Intel chipsets support Serial Digital Video Out, a proprietary technology that uses a slot to transmit video signals from the host CPU's integrated graphics instead of PCIe, using a supported add-in.


title: PCI Express

text: The PCIe transaction-layer protocol can also be used over some other interconnects, which are not electrically PCIe:


title: PCI Express

text: While in early development, PCIe was initially referred to as "HSI" (for "High Speed Interconnect"), and underwent a name change to "3GIO" (for "3rd Generation I/O") before finally settling on its PCI-SIG name "PCI Express". A technical working group named the "Arapaho Work Group" (AWG) drew up the standard. For initial drafts, the AWG consisted only of Intel engineers; subsequently, the AWG expanded to include industry partners.


title: PCI Express

text: Since, PCIe has undergone several large and smaller revisions, improving on performance and other features.


title: PCI Express

text: In 2003, PCI-SIG introduced PCIe 1.0a, with a per-lane data rate of 250 MB/s and a transfer rate of 2.5 gigatransfers per second (GT/s).


title: PCI Express

text: Transfer rate is expressed in transfers per second instead of bits per second because the number of transfers includes the overhead bits, which do not provide additional throughput; PCIe 1.x uses an 8b/10b encoding scheme, resulting in a 20% (= 2/10) overhead on the raw channel bandwidth. So in the PCIe terminology, transfer rate refers to the encoded bit rate: 2.5 GT/s is 2.5 Gbps on the encoded serial link. This corresponds to 2.0 Gbps of pre-coded data or 250 MB/s, which is referred to as throughput in PCIe.


title: PCI Express

text: In 2005, PCI-SIG introduced PCIe 1.1. This updated specification includes clarifications and several improvements, but is fully compatible with PCI Express 1.0a. No changes were made to the data rate.


title: PCI Express

text: PCI-SIG announced the availability of the PCI Express Base 2.0 specification on 15 January 2007. The PCIe 2.0 standard doubles the transfer rate compared with PCIe 1.0 to 5GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s. Consequently, a 16-lane PCIe connector (x16) can support an aggregate throughput of up to 8 GB/s.


title: PCI Express

text: PCIe 2.0 motherboard slots are fully backward compatible with PCIe v1.x cards. PCIe 2.0 cards are also generally backward compatible with PCIe 1.x motherboards, using the available bandwidth of PCI Express 1.1. Overall, graphic cards or motherboards designed for v2.0 work, with the other being v1.1 or v1.0a.


title: PCI Express

text: The PCI-SIG also said that PCIe 2.0 features improvements to the point-to-point data transfer protocol and its software architecture.


title: PCI Express

text: Intel's first PCIe 2.0 capable chipset was the X38 and boards began to ship from various vendors (Abit, Asus, Gigabyte) as of 21 October 2007. AMD started supporting PCIe 2.0 with its AMD 700 chipset series and nVidia started with the MCP72. All of Intel's prior chipsets, including the Intel P35 chipset, supported PCIe 1.1 or 1.0a.


title: PCI Express

text: Like 1.x, PCIe 2.0 uses an 8b/10b encoding scheme, therefore delivering, per-lane, an effective 4 Gbit/s max. transfer rate from its 5 GT/s raw data rate.


title: PCI Express

text: PCI Express 2.1 (with its specification dated 4 March 2009) supports a large proportion of the management, support, and troubleshooting systems planned for full implementation in PCI Express 3.0. However, the speed is the same as PCI Express 2.0. The increase in power from the slot breaks backward compatibility between PCI Express 2.1 cards and some older motherboards with 1.0/1.0a, but most motherboards with PCI Express 1.1 connectors are provided with a BIOS update by their manufacturers through utilities to support backward compatibility of cards with PCIe 2.1.


title: PCI Express

text: PCI Express 3.0 Base specification revision 3.0 was made available in November 2010, after multiple delays. In August 2007, PCI-SIG announced that PCI Express 3.0 would carry a bit rate of 8 gigatransfers per second (GT/s), and that it would be backward compatible with existing PCI Express implementations. At that time, it was also announced that the final specification for PCI Express 3.0 would be delayed until Q2 2010. New features for the PCI Express 3.0 specification included a number of optimizations for enhanced signaling and data integrity, including transmitter and receiver equalization, PLL improvements, clock data recovery, and channel enhancements of currently supported topologies.


title: PCI Express

text: Following a six-month technical analysis of the feasibility of scaling the PCI Express interconnect bandwidth, PCI-SIG's analysis found that 8 gigatransfers per second could be manufactured in mainstream silicon process technology, and deployed with existing low-cost materials and infrastructure, while maintaining full compatibility (with negligible impact) with the PCI Express protocol stack.


title: PCI Express

text: PCI Express 3.0 upgraded the encoding scheme to 128b/130b from the previous 8b/10b encoding, reducing the bandwidth overhead from 20% of PCI Express 2.0 to approximately 1.54% (= 2/130). PCI Express 3.0's 8 GT/s bit rate effectively delivers 985 MB/s per lane, nearly doubling the lane bandwidth relative to PCI Express 2.0.


title: PCI Express

text: On 18 November 2010, the PCI Special Interest Group officially published the finalized PCI Express 3.0 specification to its members to build devices based on this new version of PCI Express.


title: PCI Express

text: In September 2013, PCI Express 3.1 specification was announced for release in late 2013 or early 2014, consolidating various improvements to the published PCI Express 3.0 specification in three areas: power management, performance and functionality. It was released in November 2014.


title: PCI Express

text: On 29 November 2011, PCI-SIG preliminarily announced PCI Express 4.0, providing a 16 GT/s bit rate that doubles the bandwidth provided by PCI Express 3.0 to 31.5 GB/s in each direction for a 16-lane configuration, while maintaining backward and forward compatibility in both software support and used mechanical interface. PCI Express 4.0 specs also bring OCuLink-2, an alternative to Thunderbolt. OCuLink version 2 has up to 16 GT/s (16GB/s total for x8 lanes), while the maximum bandwidth of a Thunderbolt 3 link is 5GB/s.


title: PCI Express

text: In June 2016 Cadence, PLDA and Synopsys demoed PCIe 4.0 physical-layer, controller, switch and other IP blocks at the PCI SIG’s annual developer’s conference.


title: PCI Express

text: Mellanox Technologies announced the first 100Gbit/s network adapter with PCIe 4.0 on 15 June 2016, and the first 200Gbit/s network adapter with PCIe 4.0 on 10 November 2016.


title: PCI Express

text: In August 2016, Synopsys presented a test setup with FPGA clocking a lane to PCIe 4.0 speeds at the Intel Developer Forum. Their IP has been licensed to several firms planning to present their chips and products at the end of 2016.


title: PCI Express

text: On the IEEE Hot Chips Symposium in August 2016 IBM announced the first CPU with PCIe 4.0 support, POWER9.


title: PCI Express

text: PCI-SIG officially announced the release of the final PCI Express 4.0 specification on 8 June 2017. The spec includes improvements in flexibility, scalability, and lower-power.


title: PCI Express

text: NETINT Technologies introduced the first NVMe SSD based on PCIe 4.0 on 17 July 2018, ahead of Flash Memory Summit 2018


title: PCI Express

text: AMD announced on 9 January 2019 its upcoming Zen 2-based processors and X570 chipset would support PCIe 4.0. AMD had hoped to enable partial support for older chipsets, but instability caused by motherboard traces not conforming to PCIe 4.0 specifications made that impossible.


title: PCI Express

text: Intel released their first mobile CPUs with PCI express 4.0 support in mid-2020, as a part of the Tiger Lake microarchitecture.


title: PCI Express

text: In June 2017, PCI-SIG announced the PCI Express 5.0 preliminary specification. Bandwidth was expected to increase to 32GT/s, yielding 63GB/s in each direction in a 16-lane configuration. The draft spec was expected to be standardized in 2019. Initially, was also considered for technical feasibility.


title: PCI Express

text: On 7 June 2017 at PCI-SIG DevCon, Synopsys recorded the first demonstration of PCI Express 5.0 at 32 GT/s.


title: PCI Express

text: On 31 May 2018, PLDA announced the availability of their XpressRICH5 PCIe 5.0 Controller IP based on draft 0.7 of the PCIe 5.0 specification on the same day.


title: PCI Express

text: and on 17 January 2019, PCI SIG announced the version 0.9 had been ratified, with version 1.0 targeted for release in the first quarter of 2019.


title: PCI Express

text: On 20 November 2019, Jiangsu Huacun presented the first PCIe 5.0 Controller HC9001 in a 12 nm manufacturing process. Production started in 2020.


title: PCI Express

text: On 17 August 2020, IBM announced the Power10 processor with PCIe 5.0 and up to 32 lanes per single-chip module (SCM) and up to 64 lanes per double-chip module (DCM).


title: PCI Express

text: On 9 September 2021, IBM announced the Power E1080 Enterprise server with planned availability date 17 September. It can have up to 16 Power10 SCMs with maximum of 32 slots per system which can act as PCIe 5.0 x8 or PCIe 4.0 x16. Alternatively they can be used as PCIe 5.0 x16 slots for optional optical CXP converter adapters connecting to external PCIe expansion drawers.


title: PCI Express

text: On 27 October 2021, Intel announced the 12th Gen Intel Core CPU family, the world's first consumer x86-64 processors with PCIe 5.0 (up to 16 lanes) connectivity.


title: PCI Express

text: On 23 May 2022, AMD announced its Zen 4 architecture with support for up to 24 lanes of PCIe 5.0 connectivity on consumer platforms and 128 lanes on server platforms.


title: PCI Express

text: On 18 June 2019, PCI-SIG announced the development of PCI Express 6.0 specification. Bandwidth is expected to increase to 64GT/s, yielding 128GB/s in each direction in a 16-lane configuration, with a target release date of 2021. The new standard uses 4-level pulse-amplitude modulation (PAM-4) with a low-latency forward error correction (FEC) in place of non-return-to-zero (NRZ) modulation. Unlike previous PCI Express versions, forward error correction is used to increase data integrity and PAM-4 is used as line code so that two bits are transferred per transfer. With 64GT/s data transfer rate (raw bit rate), up to 121GB/s in each direction is possible in x16 configuration.


title: PCI Express

text: On 24 February 2020, the PCI Express 6.0 revision 0.5 specification (a "first draft" with all architectural aspects and requirements defined) was released.


title: PCI Express

text: On 5 November 2020, the PCI Express 6.0 revision 0.7 specification (a "complete draft" with electrical specifications validated via test chips) was released.


title: PCI Express

text: On 11 January 2022, PCI-SIG officially announced the release of the final PCI Express 6.0 specification.


title: PCI Express

text: PAM-4 coding results in a vastly higher bit error rate (BER) of 10 (vs. 10 previously), so in place of 128b/130b encoding, a 3-way interlaced forward error correction (FEC) is used in addition to cyclic redundancy check (CRC). A fixed 256 byte Flow Control Unit (FLIT) block carries 242 bytes of data, which includes variable-sized transaction level packets (TLP) and data link layer payload (DLLP); remaining 14 bytes are reserved for 8-byte CRC and 6-byte FEC. 3-way Gray code is used in PAM-4/FLIT mode to reduce error rate; the interface does not switch to NRZ and 128/130b encoding even when retraining to lower data rates.


title: PCI Express

text: On 21 June 2022, PCI-SIG announced the development of PCI Express 7.0 specification. It will deliver 128 GT/s raw bit rate and up to 242 GB/s per direction in x16 configuration, using the same PAM4 signaling as version 6.0. Doubling of the data rate will be achieved by fine-tuning channel parameters to decrease signal losses and improve power efficiency. The specification is expected to be finalised in 2025.


title: PCI Express

text: Some vendors offer PCIe over fiber products, with active optical cables (AOC) for PCIe switching at increased distance in PCIe expansion drawers, or in specific cases where transparent PCIe bridging is preferable to using a more mainstream standard (such as InfiniBand or Ethernet) that may require additional software to support it.


title: PCI Express

text: "Thunderbolt" was co-developed by Intel and Apple as a general-purpose high speed interface combining a logical PCIe link with DisplayPort and was originally intended as an all-fiber interface, but due to early difficulties in creating a consumer-friendly fiber interconnect, nearly all implementations are copper systems. A notable exception, the Sony VAIO Z VPC-Z2, uses a nonstandard USB port with an optical component to connect to an outboard PCIe display adapter. Apple has been the primary driver of Thunderbolt adoption through 2011, though several other vendors have announced new products and systems featuring Thunderbolt. Thunderbolt 3 forms the basis of the USB4 standard.


title: PCI Express

text: "Mobile PCIe" specification (abbreviated to "M-PCIe") allows PCI Express architecture to operate over the MIPI Alliance's M-PHY physical layer technology. Building on top of already existing widespread adoption of M-PHY and its low-power design, Mobile PCIe lets mobile devices use PCI Express.


title: PCI Express

text: Historically, the earliest adopters of a new PCIe specification generally begin designing with the Draft 0.5 as they can confidently build up their application logic around the new bandwidth definition and often even start developing for any new protocol features. At the Draft 0.5 stage, however, there is still a strong likelihood of changes in the actual PCIe protocol layer implementation, so designers responsible for developing these blocks internally may be more hesitant to begin work than those using interface IP from external sources.


title: PCI Express

text: The PCIe link is built around dedicated unidirectional couples of serial (1-bit), point-to-point connections known as "lanes". This is in sharp contrast to the earlier PCI connection, which is a bus-based system where all the devices share the same bidirectional, 32-bit or 64-bit parallel bus.


title: PCI Express

text: PCI Express is a layered protocol, consisting of a "transaction layer", a "data link layer", and a "physical layer". The Data Link Layer is subdivided to include a media access control (MAC) sublayer. The Physical Layer is subdivided into logical and electrical sublayers. The Physical logical-sublayer contains a physical coding sublayer (PCS). The terms are borrowed from the IEEE 802 networking protocol model.


title: PCI Express

text: The PCIe Physical Layer ("PHY", "PCIEPHY", "PCI Express PHY", or "PCIe PHY") specification is divided into two sub-layers, corresponding to electrical and logical specifications. The logical sublayer is sometimes further divided into a MAC sublayer and a PCS, although this division is not formally part of the PCIe specification. A specification published by Intel, the PHY Interface for PCI Express (PIPE), defines the MAC/PCS functional partitioning and the interface between these two sub-layers. The PIPE specification also identifies the "physical media attachment" (PMA) layer, which includes the serializer/deserializer (SerDes) and other analog circuitry; however, since SerDes implementations vary greatly among ASIC vendors, PIPE does not specify an interface between the PCS and PMA.


title: PCI Express

text: At the electrical level, each lane consists of two unidirectional differential pairs operating at 2.5, 5, 8, 16 or 32 Gbit/s, depending on the negotiated capabilities. Transmit and receive are separate differential pairs, for a total of four data wires per lane.


title: PCI Express

text: A connection between any two PCIe devices is known as a "link", and is built up from a collection of one or more "lanes". All devices must minimally support single-lane (x1) link. Devices may optionally support wider links composed of up to 32 lanes. This allows for very good compatibility in two ways:


title: PCI Express

text: In both cases, PCIe negotiates the highest mutually supported number of lanes. Many graphics cards, motherboards and BIOS versions are verified to support x1, x4, x8 and x16 connectivity on the same connection.


title: PCI Express

text: The width of a PCIe connector is 8.8 mm, while the height is 11.25 mm, and the length is variable. The fixed section of the connector is 11.65 mm in length and contains two rows of 11 pins each (22 pins total), while the length of the other section is variable depending on the number of lanes. The pins are spaced at 1 mm intervals, and the thickness of the card going into the connector is 1.6 mm.


title: PCI Express

text: PCIe sends all control messages, including interrupts, over the same links used for data. The serial protocol can never be blocked, so latency is still comparable to conventional PCI, which has dedicated interrupt lines. When the problem of IRQ sharing of pin based interrupts is taken into account and the fact that message signaled interrupts (MSI) can bypass an I/O APIC and be delivered to the CPU directly, MSI performance ends up being substantially better.


title: PCI Express

text: Data transmitted on multiple-lane links is interleaved, meaning that each successive byte is sent down successive lanes. The PCIe specification refers to this interleaving as "data striping". While requiring significant hardware complexity to synchronize (or deskew) the incoming striped data, striping can significantly reduce the latency of the "n" byte on a link. While the lanes are not tightly synchronized, there is a limit to the "lane to lane skew" of 20/8/6 ns for 2.5/5/8 GT/s so the hardware buffers can re-align the striped data. Due to padding requirements, striping may not necessarily reduce the latency of small data packets on a link.


title: PCI Express

text: As with other high data rate serial transmission protocols, the clock is embedded in the signal. At the physical level, PCI Express 2.0 utilizes the 8b/10b encoding scheme (line code) to ensure that strings of consecutive identical digits (zeros or ones) are limited in length. This coding was used to prevent the receiver from losing track of where the bit edges are. In this coding scheme every eight (uncoded) payload bits of data are replaced with 10 (encoded) bits of transmit data, causing a 20% overhead in the electrical bandwidth. To improve the available bandwidth, PCI Express version 3.0 instead uses 128b/130b encoding (1.54% overhead). Line encoding limits the run length of identical-digit strings in data streams and ensures the receiver stays synchronised to the transmitter via clock recovery.


title: PCI Express

text: A desirable balance (and therefore spectral density) of 0 and 1 bits in the data stream is achieved by XORing a known binary polynomial as a "scrambler" to the data stream in a feedback topology. Because the scrambling polynomial is known, the data can be recovered by applying the XOR a second time. Both the scrambling and descrambling steps are carried out in hardware.


title: PCI Express

text: On the transmit side, the data link layer generates an incrementing sequence number for each outgoing TLP. It serves as a unique identification tag for each transmitted TLP, and is inserted into the header of the outgoing TLP. A 32-bit cyclic redundancy check code (known in this context as Link CRC or LCRC) is also appended to the end of each outgoing TLP.


title: PCI Express

text: On the receive side, the received TLP's LCRC and sequence number are both validated in the link layer. If either the LCRC check fails (indicating a data error), or the sequence-number is out of range (non-consecutive from the last valid received TLP), then the bad TLP, as well as any TLPs received after the bad TLP, are considered invalid and discarded. The receiver sends a negative acknowledgement message (NAK) with the sequence-number of the invalid TLP, requesting re-transmission of all TLPs forward of that sequence-number. If the received TLP passes the LCRC check and has the correct sequence number, it is treated as valid. The link receiver increments the sequence-number (which tracks the last received good TLP), and forwards the valid TLP to the receiver's transaction layer. An ACK message is sent to remote transmitter, indicating the TLP was successfully received (and by extension, all TLPs with past sequence-numbers.)


title: PCI Express

text: If the transmitter receives a NAK message, or no acknowledgement (NAK or ACK) is received until a timeout period expires, the transmitter must retransmit all TLPs that lack a positive acknowledgement (ACK). Barring a persistent malfunction of the device or transmission medium, the link-layer presents a reliable connection to the transaction layer, since the transmission protocol ensures delivery of TLPs over an unreliable medium.


title: PCI Express

text: In addition to sending and receiving TLPs generated by the transaction layer, the data-link layer also generates and consumes data link layer packets (DLLPs). ACK and NAK signals are communicated via DLLPs, as are some power management messages and flow control credit information (on behalf of the transaction layer).


title: PCI Express

text: In practice, the number of in-flight, unacknowledged TLPs on the link is limited by two factors: the size of the transmitter's replay buffer (which must store a copy of all transmitted TLPs until the remote receiver ACKs them), and the flow control credits issued by the receiver to a transmitter. PCI Express requires all receivers to issue a minimum number of credits, to guarantee a link allows sending PCIConfig TLPs and message TLPs.


title: PCI Express

text: PCI Express implements split transactions (transactions with request and response separated by time), allowing the link to carry other traffic while the target device gathers data for the response.


title: PCI Express

text: PCI Express uses credit-based flow control. In this scheme, a device advertises an initial amount of credit for each received buffer in its transaction layer. The device at the


title: PCI Express

text: opposite end of the link, when sending transactions to this device, counts the number of credits each TLP consumes from its account. The sending device may only transmit a TLP when doing so does not make its consumed credit count exceed its credit limit. When the receiving device finishes processing the TLP from its buffer, it signals a return of credits to the sending device, which increases the credit limit by the restored amount. The credit counters are modular counters, and the comparison of consumed credits to credit limit requires modular arithmetic. The advantage of this scheme (compared to other methods such as wait states or handshake-based transfer protocols) is that the latency of credit return does not affect performance, provided that the credit limit is not encountered. This assumption is generally met if each device is designed with adequate buffer sizes.


title: PCI Express

text: PCIe 1.x is often quoted to support a data rate of 250 MB/s in each direction, per lane. This figure is a calculation from the physical signaling rate (2.5 gigabaud) divided by the encoding overhead (10 bits per byte). This means a sixteen lane (x16) PCIe card would then be theoretically capable of 16x250 MB/s = 4 GB/s in each direction. While this is correct in terms of data bytes, more meaningful calculations are based on the usable data payload rate, which depends on the profile of the traffic, which is a function of the high-level (software) application and intermediate protocol levels.


title: PCI Express

text: Like other high data rate serial interconnect systems, PCIe has a protocol and processing overhead due to the additional transfer robustness (CRC and acknowledgements). Long continuous unidirectional transfers (such as those typical in high-performance storage controllers) can approach >95% of PCIe's raw (lane) data rate. These transfers also benefit the most from increased number of lanes (x2, x4, etc.) But in more typical applications (such as a USB or Ethernet controller), the traffic profile is characterized as short data packets with frequent enforced acknowledgements. This type of traffic reduces the efficiency of the link, due to overhead from packet parsing and forced interrupts (either in the device's host interface or the PC's CPU). Being a protocol for devices connected to the same printed circuit board, it does not require the same tolerance for transmission errors as a protocol for communication over longer distances, and thus, this loss of efficiency is not particular to PCIe.


title: PCI Express

text: As for any "network like" communication links, some of the "raw" bandwidth is consumed by protocol overhead:


title: PCI Express

text: A PCIe 1.x lane for example offers a data rate on top of the physical layer of 250 MB/s (simplex). This isn't the payload bandwidth but the physical layer bandwidth – a PCIe lane has to carry additional information for full functionality.


title: PCI Express

text: The formula_1 for a 128 byte payload is 86%, and 98% for a 1024 byte payload. For small accesses like register settings (4 bytes), the efficiency drops as low as 16%.


title: PCI Express

text: The maximum payload size (MPS) is set on all devices based on smallest maximum on any device in the chain. If one device has an MPS of 128 bytes, "all" devices of the tree must set their MPS to 128 bytes. In this case the bus will have a peak efficiency of 86% for writes.


title: PCI Express

text: PCI Express operates in consumer, server, and industrial applications, as a motherboard-level interconnect (to link motherboard-mounted peripherals), a passive backplane interconnect and as an expansion card interface for add-in boards.


title: PCI Express

text: In virtually all modern () PCs, from consumer laptops and desktops to enterprise data servers, the PCIe bus serves as the primary motherboard-level interconnect, connecting the host system-processor with both integrated peripherals (surface-mounted ICs) and add-on peripherals (expansion cards). In most of these systems, the PCIe bus co-exists with one or more legacy PCI buses, for backward compatibility with the large body of legacy PCI peripherals.


title: PCI Express

text: , PCI Express has replaced AGP as the default interface for graphics cards on new systems. Almost all models of graphics cards released since 2010 by AMD (ATI) and Nvidia use PCI Express. Nvidia uses the high-bandwidth data transfer of PCIe for its Scalable Link Interface (SLI) technology, which allows multiple graphics cards of the same chipset and model number to run in tandem, allowing increased performance. AMD has also developed a multi-GPU system based on PCIe called CrossFire. AMD, Nvidia, and Intel have released motherboard chipsets that support as many as four PCIe x16 slots, allowing tri-GPU and quad-GPU card configurations.


title: PCI Express

text: Theoretically, external PCIe could give a notebook the graphics power of a desktop, by connecting a notebook with any PCIe desktop video card (enclosed in its own external housing, with a power supply and cooling); this is possible with an ExpressCard or Thunderbolt interface. An ExpressCard interface provides bit rates of 5 Gbit/s (0.5 GB/s throughput), whereas a Thunderbolt interface provides bit rates of up to 40 Gbit/s (5 GB/s throughput).


title: PCI Express

text: In 2006, Nvidia developed the Quadro Plex external PCIe family of GPUs that can be used for advanced graphic applications for the professional market. These video cards require a PCI Express x8 or x16 slot for the host-side card, which connects to the Plex via a VHDCI carrying eight PCIe lanes.


title: PCI Express

text: In 2008, AMD announced the ATI XGP technology, based on a proprietary cabling system that is compatible with PCIe x8 signal transmissions. This connector is available on the Fujitsu Amilo and the Acer Ferrari One notebooks. Fujitsu launched their AMILO GraphicBooster enclosure for XGP soon thereafter. Around 2010 Acer launched the Dynavivid graphics dock for XGP.


title: PCI Express

text: In 2010, external card hubs were introduced that can connect to a laptop or desktop through a PCI ExpressCard slot. These hubs can accept full-sized graphics cards. Examples include MSI GUS, Village Instrument's ViDock, the Asus XG Station, Bplus PE4H V3.2 adapter, as well as more improvised DIY devices. However such solutions are limited by the size (often only x1) and version of the available PCIe slot on a laptop.


title: PCI Express

text: The Intel Thunderbolt interface has provided a new option to connect with a PCIe card externally. Magma has released the ExpressBox 3T, which can hold up to three PCIe cards (two at x8 and one at x4). MSI also released the Thunderbolt GUS II, a PCIe chassis dedicated for video cards. Other products such as the Sonnet's Echo Express and mLogic's mLink are Thunderbolt PCIe chassis in a smaller form factor.


title: PCI Express

text: In 2017, more fully featured external card hubs were introduced, such as the Razer Core, which has a full-length PCIe x16 interface.


title: PCI Express

text: The PCI Express protocol can be used as data interface to flash memory devices, such as memory cards and solid-state drives (SSDs).


title: PCI Express

text: The XQD card is a memory card format utilizing PCI Express, developed by the CompactFlash Association, with transfer rates of up to 1GB/s.


title: PCI Express

text: Many high-performance, enterprise-class SSDs are designed as PCI Express RAID controller cards. Before NVMe was standardized, many of these cards utilized proprietary interfaces and custom drivers to communicate with the operating system; they had much higher transfer rates (over 1 GB/s) and IOPS (over one million I/O operations per second) when compared to Serial ATA or SAS drives. For example, in 2011 OCZ and Marvell co-developed a native PCI Express solid-state drive controller for a PCI Express 3.0 x16 slot with maximum capacity of 12 TB and a performance of to 7.2 GB/s sequential transfers and up to 2.52 million IOPS in random transfers.


title: PCI Express

text: SATA Express was an interface for connecting SSDs through SATA-compatible ports, optionally providing multiple PCI Express lanes as a pure PCI Express connection to the attached storage device. M.2 is a specification for internally mounted computer expansion cards and associated connectors, which also uses multiple PCI Express lanes.


title: PCI Express

text: PCI Express storage devices can implement both AHCI logical interface for backward compatibility, and NVM Express logical interface for much faster I/O operations provided by utilizing internal parallelism offered by such devices. Enterprise-class SSDs can also implement SCSI over PCI Express.


title: PCI Express

text: Certain data-center applications (such as large computer clusters) require the use of fiber-optic interconnects due to the distance limitations inherent in copper cabling. Typically, a network-oriented standard such as Ethernet or Fibre Channel suffices for these applications, but in some cases the overhead introduced by routable protocols is undesirable and a lower-level interconnect, such as InfiniBand, RapidIO, or NUMAlink is needed. Local-bus standards such as PCIe and HyperTransport can in principle be used for this purpose, but , solutions are only available from niche vendors such as Dolphin ICS, and TTTech Auto.


title: PCI Express

text: Other communications standards based on high bandwidth serial architectures include InfiniBand, RapidIO, HyperTransport, Intel QuickPath Interconnect, and the Mobile Industry Processor Interface (MIPI). The differences are based on the trade-offs between flexibility and extensibility vs latency and overhead. For example, making the system hot-pluggable, as with Infiniband but not PCI Express, requires that software track network topology changes.


title: PCI Express

text: Another example is making the packets shorter to decrease latency (as is required if a bus must operate as a memory interface). Smaller packets mean packet headers consume a higher percentage of the packet, thus decreasing the effective bandwidth. Examples of bus protocols designed for this purpose are RapidIO and HyperTransport.


title: PCI Express

text: PCI Express falls somewhere in the middle, targeted by design as a system interconnect (local bus) rather than a device interconnect or routed network protocol. Additionally, its design goal of software transparency constrains the protocol and raises its latency somewhat.


title: PCI Express

text: Delays in PCIe 4.0 implementations led to the Gen-Z consortium, the CCIX effort and an open Coherent Accelerator Processor Interface (CAPI) all being announced by the end of 2016.


title: PCI Express

text: On 11 March 2019, Intel presented Compute Express Link (CXL), a new interconnect bus, based on the PCI Express 5.0 physical layer infrastructure. The initial promoters of the CXL specification included: Alibaba, Cisco, Dell EMC, Facebook, Google, HPE, Huawei, Intel and Microsoft.


title: PCI Express

text: The PCI-SIG Integrators List lists products made by PCI-SIG member companies that have passed compliance testing. The list include switches, bridges, NICs, SSDs, etc.


title: Aishwarya Lekshmi

text: Aishwarya Lekshmi (born 6 September 1990) is an Indian actress and producer who predominantly works in Malayalam and Tamil films. She won several accolades including One Filmfare Award South and 3 SIIMA Awards.


title: Aishwarya Lekshmi

text: She made her acting debut with 2017 Malayalam film "Njandukalude Nattil Oridavela". She went on to appear in "Mayaanadhi" (2017), "Varathan" (2018), "Vijay Superum Pournamiyum" (2019), "Argentina Fans Kaattoorkadavu" (2019). Lekshmi made her Tamil debut with "Action" (2019).


title: Aishwarya Lekshmi

text: Lekshmi did her schooling at Holy Angels' I.S.C School, Trivandrum and Sacred Hearts girls Higher Secondary School, Thrissur and completed her MBBS degree from Sree Narayana Institute of Medical Sciences (SNIMS), Ernakulam, in 2017. She also completed her internship there. She resides in Trivandrum and Cochin.


title: Aishwarya Lekshmi

text: Lekshmi has been modelling since 2014. She has appeared on the covers of magazines such as "Flower World", "Salt Studio", "Vanitha" and "FWD Life". She has modelled for brands such as "Chemmanur Jewellers", "Karikkineth Silks", "La Brenda", "Ezva Boutique", "Akshaya Jewels", "Sri Lakshmi Jewellery" etc.


title: Aishwarya Lekshmi

text: She states that she "never planned on acting", but now that she has finished her studies, she decided to give it a try when she chanced upon casting call by Althaf Salim for the family-drama "Njandukalude Nattil Oridavela" starring Nivin Pauly and was cast in a prominent role. She then did the female lead in romantic thriller "Mayaanadhi" by Aashiq Abu. The film became a major success and her role as an aspiring actress garnered appreciation. In 2018, she appeared in"Varathan" with Fahadh Faasil. In 2019 Aishwarya appeared in three Malayalam films: "Vijay Superum Pournamiyum", "Argentina Fans Kaattoorkadavu" and "Brother's Day". She also made her Tamil debut with "Action" (2019), opposite Vishal. She then went on to appear in the Tamil Gangster film, "Jagame Thandhiram" (2021) alongside Dhanush, in which she played the role of "Attilla". Which released in Netflix.


title: Aishwarya Lekshmi

text: In 2022, she made her name in the industry through the role as ‘Poonguzhali’ in Mani Ratnam's historical action drama film "".


title: Plate tectonics

text: Plate tectonics (from the , from the ) is the generally accepted scientific theory that considers the Earth's lithosphere to comprise a number of large tectonic plates which have been slowly moving since about 3.4 billion years ago. The model builds on the concept of "continental drift", an idea developed during the first decades of the 20th century. Plate tectonics came to be generally accepted by geoscientists after seafloor spreading was validated in the mid to late 1960s.


title: Plate tectonics

text: Earth's lithosphere, which is the rigid outermost shell of the planet (the crust and upper mantle), is broken into seven or eight major plates (depending on how they are defined) and many minor plates or "platelets". Where the plates meet, their relative motion determines the type of plate boundary: "convergent", "divergent", or "transform". Earthquakes, volcanic activity, mountain-building, and oceanic trench formation occur along these plate boundaries (or faults). The relative movement of the plates typically ranges from zero to 10 cm annually.


title: Plate tectonics

text: Tectonic plates are composed of the oceanic lithosphere and the thicker continental lithosphere, each topped by its own kind of crust. Along convergent boundaries, the process of subduction, or one plate moving under another, carries the edge of the lower one down into the mantle; the area of material lost is balanced by the formation of new (oceanic) crust along divergent margins by seafloor spreading. In this way, the total geoid surface area of the lithosphere remains constant. This prediction of plate tectonics is also referred to as the conveyor belt principle. Earlier theories, since disproven, proposed gradual shrinking (contraction) or gradual expansion of the globe.


title: Plate tectonics

text: Tectonic plates are able to move because Earth's lithosphere has greater mechanical strength than the underlying asthenosphere. Lateral density variations in the mantle result in convection; that is, the slow creeping motion of Earth's solid mantle. Plate movement is thought to be driven by a combination of the motion of the seafloor away from spreading ridges due to variations in topography (the ridge is a topographic high) and density changes in the crust (density increases as newly-formed crust cools and moves away from the ridge). At subduction zones the relatively cold, dense oceanic crust sinks down into the mantle over the downward convecting limb of a mantle cell. The relative importance of each of these factors and their relationship to each other is unclear, and still the subject of much debate.


title: Plate tectonics

text: The outer layers of Earth are divided into the lithosphere and asthenosphere. The division is based on differences in mechanical properties and in the method for the transfer of heat. The lithosphere is cooler and more rigid, while the asthenosphere is hotter and flows more easily. In terms of heat transfer, the lithosphere loses heat by conduction, whereas the asthenosphere also transfers heat by convection and has a nearly adiabatic temperature gradient. This division should not be confused with the "chemical" subdivision of these same layers into the mantle (comprising both the asthenosphere and the mantle portion of the lithosphere) and the crust: a given piece of mantle may be part of the lithosphere or the asthenosphere at different times depending on its temperature and pressure.


title: Plate tectonics

text: The key principle of plate tectonics is that the lithosphere exists as separate and distinct "tectonic plates", which ride on the fluid-like (visco-elastic solid) asthenosphere. Plate motions range up to a typical 10–40 mm/year (Mid-Atlantic Ridge; about as fast as fingernails grow), to about 160 mm/year (Nazca Plate; about as fast as hair grows). The driving mechanism behind this movement is described below.


title: Plate tectonics

text: Tectonic lithosphere plates consist of lithospheric mantle overlain by one or two types of crustal material: oceanic crust (in older texts called "sima" from silicon and magnesium) and continental crust ("sial" from silicon and aluminium). Average oceanic lithosphere is typically thick; its thickness is a function of its age: as time passes, it conductively cools and subjacent cooling mantle is added to its base. Because it is formed at mid-ocean ridges and spreads outwards, its thickness is therefore a function of its distance from the mid-ocean ridge where it was formed. For a typical distance that oceanic lithosphere must travel before being subducted, the thickness varies from about thick at mid-ocean ridges to greater than at subduction zones; for shorter or longer distances, the subduction zone (and therefore also the mean) thickness becomes smaller or larger, respectively. Continental lithosphere is typically about 200 km thick, though this varies considerably between basins, mountain ranges, and stable cratonic interiors of continents.


title: Plate tectonics

text: The location where two plates meet is called a "plate boundary". Plate boundaries are commonly associated with geological events such as earthquakes and the creation of topographic features such as mountains, volcanoes, mid-ocean ridges, and oceanic trenches. The majority of the world's active volcanoes occur along plate boundaries, with the Pacific Plate's Ring of Fire being the most active and widely known today. These boundaries are discussed in further detail below. Some volcanoes occur in the interiors of plates, and these have been variously attributed to internal plate deformation and to mantle plumes.


title: Plate tectonics

text: As explained above, tectonic plates may include continental crust or oceanic crust, and most plates contain both. For example, the African Plate includes the continent and parts of the floor of the Atlantic and Indian Oceans. The distinction between oceanic crust and continental crust is based on their modes of formation. Oceanic crust is formed at sea-floor spreading centers, and continental crust is formed through arc volcanism and accretion of terranes through tectonic processes, though some of these terranes may contain ophiolite sequences, which are pieces of oceanic crust considered to be part of the continent when they exit the standard cycle of formation and spreading centers and subduction beneath continents. Oceanic crust is also denser than continental crust owing to their different compositions. Oceanic crust is denser because it has less silicon and more heavier elements ("mafic") than continental crust ("felsic"). As a result of this density stratification, oceanic crust generally lies below sea level (for example most of the Pacific Plate), while continental crust buoyantly projects above sea level (see the page isostasy for explanation of this principle).


title: Plate tectonics

text: Three types of plate boundaries exist, with a fourth, mixed type, characterized by the way the plates move relative to each other. They are associated with different types of surface phenomena. The different types of plate boundaries are: