FIELD OF THE PRESENT DISCLOSURE

The present disclosure relates generally to methods of fabricating semiconductor devices and specifically to overlay error.

BACKGROUND

Semiconductor fabrication involves multiple varied steps and processes. One typical fabrication process is known as photolithography (also called microlithography).

Photolithography uses radiation, such as ultraviolet or visible light, to generate fine patterns in a semiconductor device design. Many types of semiconductor devices, such as diodes, transistors, and integrated circuits, can be constructed using semiconductor fabrication techniques including photolithography, etching, film deposition, surface cleaning, metallization, and so forth.

SUMMARY

Aspects of the present disclosure provide a method of aligning a wafer pattern. For example, the method can include providing a wafer having a reference pattern located below a front side of the wafer, and directing a light beam to the wafer. The method can further include identifying at least one of power and a wavelength of the light beam such that the light beam is capable of passing through the wafer and reaching the reference pattern. The method can further include using the light beam to image the reference pattern.

In an embodiment, the wafer can further have one or more layers formed on the front side, and identifying at least one of power and a wavelength of the light beam includes identifying at least one of power and a wavelength of the light beam such that the light beam is capable of passing through the one or more layers and the wafer and reaching the reference pattern.

In an embodiment, the method can further include measuring at least one of absorption amount and scattering amount of the light beam passing through the wafer to determine that the light beam is capable of passing through the wafer and reaching the reference pattern.

In an embodiment, the method can further include providing an infrared (IR) light source that generates the light beam. For example, the IR light source can be an IR wavelength tunable light source. As another example, the IR wavelength tunable light source can include quantum cascade lasers (QCLs). In an embodiment, the wavelength of the light beam can be 1-10 micrometers. For example, the second wavelength can be 3.6 or 3.7 micrometer.

In an embodiment, the second pattern can be incorporated in a reference plate located on a back side of the wafer. For example, the reference plate can be adhered to the back side of the wafer. In another embodiment, the second pattern can also be projected on a surface of the wafer. In yet another embodiment, the second pattern can be formed on a back side of the wafer. In still another embodiment, the second pattern can be embedded within the wafer.

Aspects of the present disclosure further provide another method of aligning a wafer pattern. For example, the method can also include providing a wafer with a reference pattern located below a front side of the wafer, and directing a light beam to the reference pattern. The method can further include identifying at least one of power and a wavelength of the light beam based on at least one of a material of the wafer and a depth of the reference pattern below the front side of the wafer. The method can also include using the light beam to image the reference pattern.

In an embodiment, the wafer can further have one or more layers formed on the front side, and identifying at least one of power and a wavelength of the light beam includes identifying at least one of power and a wavelength of the light beam such that the light beam is capable of passing through the one or more layers and the wafer and reaching the reference pattern.

In an embodiment, the method can also include providing an IR light source that generates the light beam. For example, the IR light source can be an IR wavelength tunable light source. As another example, the IR wavelength tunable light source can include quantum cascade lasers (QCLs). In an embodiment, the reference pattern is located on a back side of the wafer. In another embodiment, the reference pattern is embedded within the wafer. In yet another embodiment, the reference pattern can be incorporated in a reference plate located on a back side of the wafer.

As can be appreciated, as fabrication progresses on a given wafer, depending on a given device being created, there can be many different materials and layers. Thus each wafer at each process stage can have a different profile. This means a different wavelength may be needed to pass through the wafer.

Of course, the order of discussion of the different steps as described herein has been presented for clarity sake. In general, these steps can be performed in any suitable order. Additionally, although each of the different features, techniques, configurations, etc. herein may be discussed in different places of this disclosure, it is intended that each of the concepts can be executed independently of each other or in combination with each other. Accordingly, the present disclosure can be embodied and viewed in many different ways.

Note that this summary section does not specify every embodiment and/or incrementally novel aspect of the present disclosure or claimed disclosure. Instead, this summary only provides a preliminary discussion of different embodiments and corresponding points of novelty over conventional techniques. For additional details and/or possible perspectives of the present disclosure and embodiments, the reader is directed to the Detailed Description section and corresponding figures of the present disclosure as further discussed below.

