CROSS REFERENCE TO RELATED APPLICATION

The present application is based on and claims priority under 35 U.S.C. § 119 with respect to the Japanese Patent Application No. 2019-100489 filed on May 29, 2019, of which entire content is incorporated herein by reference into the present application.

TECHNICAL FIELD

The present invention relates to an element chip manufacturing method including a step of laser scribing a semiconductor substrate having a metal film and a semiconductor layer.

BACKGROUND

Element chips are usually manufactured by dicing a substrate including a semiconductor layer. The substrate includes a plurality of element regions and a plurality of dicing regions defining the element regions. Removing the semiconductor layer along the dicing regions divides the substrate into a plurality of element chips. Patent Document 1 (JP 2013-535114A) suggests forming groove-like gaps with a laser beam in the dicing regions known as streets, and applying a plasma to the semiconductor layer exposed from the gaps, to etch the semiconductor layer and dice the substrate.

SUMMARY

With increasing technological development of electric vehicles (EVs), the demand for element chips called power devices has been increasing. Power devices, such as power MOSFET, are used mainly for power conversion and are required to be highly resistant to pressure and heat. To meet such requirements, some power devices are configured such that current flows in the thickness direction, and include a metal film provided on the back side. Such element chips are obtained by, for example, dicing a substrate including a metal film and a semiconductor layer. However, especially when the metal film contains a metal with high melting point, which is poor in reactivity, it is difficult to etch the metal film with a plasma.

One aspect of the present invention relates to an element chip manufacturing method including: a preparation step of preparing a semiconductor substrate including a first layer having a first principal surface, and a second layer laminated on the first layer and having a second principal surface opposite the first principal surface, the first principal surface provided with a plurality of element regions, a dicing region defining the element regions, and an alignment mark, wherein the first layer includes a semiconductor layer, and the second layer includes a metal layer adjacent to the semiconductor layer; a first exposure step of irradiating a first laser beam that is absorbed in the metal film and passes through the semiconductor layer, from the second principal surface side to a first region corresponding to the alignment mark on the second principal surface, to remove the metal film at the first region and expose the semiconductor layer corresponding to the first region; a calculation step of imaging the semiconductor substrate from the second principal surface side, with a camera capable of sensing an electromagnetic wave that passes through the semiconductor layer, to detect a position of the alignment mark through the semiconductor layer corresponding to the first region, and then calculating a second region corresponding to the dicing region on the second principal surface, based on the detected position of the alignment mark; a second exposure step of irradiating a second laser beam to the second region from the second principal surface side, to remove the metal film along the second region and expose the semiconductor layer corresponding to the second region; and a dicing step of removing the exposed semiconductor layer along the second region after the second exposure step, to divide the semiconductor substrate into a plurality of element chips.

According to the present invention, a semiconductor substrate including a metal film can be diced with high precision.

