CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 109112335, filed on Apr. 13, 2020. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to an integrated circuit and a method of fabricating the same, and in particular to a semiconductor device having an air gap and a method of fabricating the same.

2. Description of Related Art

Non-volatile memories are widely used in personal computers and electronic devices because of its ability of data stored, read, and erase of multiple times operation and the advantage of non-volatile memories are the data stored will not be disappeared when the power supply is interrupted, short data access time, and low power consumption. Therefore, non-volatile memories have now become one of the memories broadly used in personal computers and electronic devices.

Under the current trend of enhancing the level of integration of memory devices, the dimensions of the devices are shrunk according to the design rules. In this case, in order to prevent the coupling interference between floating gates from increasing and further improve the gate coupling rate, the above problem is solved by forming an air gap between the stacked gate stacks. However, at present, the volume of the air gap formed between the stacked gate stacks is relatively small, and the shape and height of the air gap in current process method could not be controlled effectively.

SUMMARY OF THE INVENTION

The invention provides an air gap with uniform height and shape and relatively large volume which can be formed without an additional photolithography process.

A semiconductor device with an air gap is provided in an embodiment of this invention. The semiconductor device includes: a plurality of gate stacks disposed on a substrate; a liner layer conformally covering the plurality of gate stacks and the substrate; and a dielectric stack on the liner layer on the plurality of gate stacks. The air gap is formed between the liner layer and the dielectric stack on two adjacent gate stacks, a height of the air gap is greater than heights of the two adjacent gate stacks, and the air gap includes: a lower portion, a middle portion and a bottom portion, the lower portion located between the two adjacent gate stacks, the sidewall and the bottom of the lower portion exposing the liner layer; the middle portion located above the lower portion; and the upper portion located above the middle portion, sidewalls of the upper portion exposing the dielectric stack, a top surface of the upper portion covered by the dielectric stack, and a width of the upper portion being smaller than a width of the lower portion.

A method of fabricating a semiconductor device with an air gap is also provided in another embodiment of this invention. The method includes: forming a plurality of gate stacks on a substrate; forming a liner layer conformally on the plurality of gate stacks and the substrate; forming a first dielectric layer on the substrate, the first dielectric layer covering the liner layer on the plurality of gate stacks and covering a portion of the liner layer between the plurality of gate stacks; forming a second dielectric layer on the first dielectric layer, wherein thicknesses of the second dielectric layer and the first dielectric layer on a gap between the plurality of gate stacks are smaller than thicknesses of the second dielectric layer and the first dielectric layer on the plurality of gate stacks; performing an etching process without a patterned mask to remove the second dielectric layer and the first dielectric layer above the gap, and removing the first dielectric layer between the plurality of gate stacks to expose the liner layer; and forming a third dielectric layer on the second dielectric layer to form the air gap between the plurality of gate stacks, the first dielectric layer, the second dielectric layer, and the third dielectric layer.

An air gaps of uniform height and shape with a relatively large volume without the need for an additional lithography process is also provided in an embodiment of this invention. Therefore, the invention provides a fabrication method that can reduce process steps, save fabricating costs, and have high reliability.

In order to make the aforementioned and other features and advantages of the invention comprehensible, several exemplary embodiments accompanied with figures are described in detail below.

