BACKGROUND

I. Field of the Disclosure

The field of the disclosure relates to miniaturization of electronic circuits, and more particularly to reducing an amount of space occupied by an integrated circuit for regulating voltage.

II. Background

Electronic devices have become smaller, faster, and more power efficient over time in response to consumer demand. This trend is made possible by technological improvements to integrated circuits (ICs) within electronic devices. ICs are designed to operate at a particular operating voltage for normal operation. ICs consume power based on several factors, including the voltage at which they operate. ICs receive power from a power source in an electronic device, such as a battery or an adaptor connected to an alternating current (AC) power supply. The power source provides power at a particular voltage, but the power supply voltage needed by a particular IC may not be the same as the voltage provided by the power source. As a result, electronic devices include voltage regulation circuits to convert a power signal from a first voltage at the power supply to a second voltage needed in an IC.

One type of voltage regulation circuit for converting a power source into a direct current (DC) power supply having a desired voltage level is known as a switched-mode power supply (SMPS). Different types of SMPSs have been developed to convert an AC signal to a DC signal, and to convert a DC signal at a first voltage level to a DC signal at a higher or lower voltage level. A voltage regulation circuit includes a capacitor and a switching circuit which, like the other circuits in an electronic device, may need to be miniaturized according to the trend. The physical sizes of circuit components depend on circuit requirements, and those requirements may enable components of a particular technology to be reduced in size gradually, with the evolution of technology. However, there is a demand for the sizes of voltage regulation circuits to be reduced in electronic devices, which may require changes to existing component technology.

SUMMARY OF THE DISCLOSURE

Aspects disclosed herein include a voltage regulation integrated circuit (IC) with circuit components disposed in an integrated three-dimensional (3D) inductor core. Related methods for fabricating the voltage regulation IC are also disclosed. Reducing the space occupied by a voltage regulation IC that includes an inductor is achieved in a two-part approach. Rather than positioning a surface-mounted inductor on the top surface of a substrate (e.g., in an encapsulation layer), the inductor is implemented as a 3D inductor having windings formed of conductive elements integrated into a lower substrate, a circuit layer, and an upper substrate. In addition, rather than mounting the other circuit components of the voltage regulation IC adjacent to a surface-mounted inductor on a substrate, the other components are positioned within a core space of the 3D inductor in the circuit layer. In this regard, the space occupied by the inductor is shared with the other circuit components and with the structural layers of the voltage regulation IC to have a smaller footprint width and smaller height.

In one example, a voltage regulation IC may be a switched-mode power supply (SMPS) that converts a received power supply signal into a direct current (DC) signal having a voltage needed to power ICs in an electronic device. The voltage regulation IC includes an inductor and also includes other circuit components, such as a capacitor and/or a switching circuit. In exemplary aspects disclosed herein, the inductor is implemented as a 3D inductor formed of conductive elements including upper horizontal traces in an upper substrate, lower horizontal traces in a lower substrate, and vertical interconnects in a circuit layer. The vertical interconnects extend between the upper substrate and the lower substrate, and together, the conductive elements form the 3D inductor as a rectangular coil extending longitudinally between the upper and lower substrates in a first direction.

By employing a 3D inductor integrated into the voltage regulation IC, and disposing the other circuit components within the core space of the integrated 3D inductor, the inductor cross-section can be increased to provide a desirable inductance increase, while the height and footprint width of the voltage regulation IC are reduced. Inductance can be further increased by incorporating magnetic material to increase the magnetic permeability of the core space of the 3D inductor. To this end, magnetic layers are disposed on sides of the circuit components within the core space, and a magnetic thin-film may be integrated into the upper substrate within the core space.

In this regard, in one aspect, a voltage regulation IC is disclosed. The voltage regulation IC includes an upper substrate including a plurality of upper horizontal traces, a lower substrate below the upper substrate and including a plurality of lower horizontal traces, and a circuit layer between the upper substrate and the lower substrate. The circuit layer includes a plurality of first vertical interconnects each coupled to a first end of one of the plurality of upper horizontal traces and a first end of one of the plurality of lower horizontal traces, and a plurality of second vertical interconnects each coupled to a second end of one of the plurality of upper horizontal traces and a second end of one of the plurality of lower horizontal traces. The circuit layer also includes one or more circuit components disposed on the lower substrate, and a 3D inductor electrically coupled to at least one of the one or more circuit components. The 3D inductor includes a coil extending along a longitudinal axis, a cross-section of the coil orthogonal to the longitudinal axis including the at least one of the one or more circuit components.

In another aspect, a method of fabricating a voltage regulation IC is disclosed. The method includes forming an upper substrate including a plurality of upper horizontal traces, forming a lower substrate including a plurality of lower horizontal traces and forming a circuit layer. Forming the circuit layer includes disposing one or more circuit components on a surface of the lower substrate on a region including the plurality of lower horizontal traces, forming a molding compound over the one or more circuit components, and forming a plurality of first vertical interconnects and a plurality of second vertical interconnects in the molding compound with a bottom end of each of the plurality of first and second vertical interconnects coupled to one of the plurality of lower horizontal traces in the lower substrate. The method further includes disposing the upper substrate on the circuit layer such that each of the plurality of upper horizontal traces couples to one of the plurality of first vertical interconnects and to one of the plurality of second vertical interconnects in the circuit layer, and the plurality of upper horizontal traces, the plurality of first vertical interconnects, the plurality of lower horizontal traces, and the plurality of second vertical interconnects form a 3D inductor.

