BACKGROUND

The present invention relates to multi-core integrated circuits and, more particularly, to a System on a Chip (SOC) that uses machine learning (ML) technology to configure its internal hardware blocks to achieve a predetermined performance level.

SOCs are complex integrated circuits that include multiple cores, multiple hardware accelerators, multiple memories, and a hierarchical interconnection framework. Each SOC processing/communication block has various runtime configurations that can be tweaked to optimize application performance while reducing power or conforming to latency constraints.

Typically, default configurations are used for all applications, which leads to sub-optimal performance. However, the number of variables (configuration settings) is too large and the interactions between the hardware modules so complex, that it is not feasible for a software developer to be able to set the parameters for each module in order to maximize performance.

Accordingly, it would be advantageous to have a method of configuring an SOC to meet desired application performance/latency/power targets in an autonomous way, without any a priori knowledge of performance implications of different configuration settings.

SUMMARY

This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This summary is not intended to be relied on to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

In one embodiment, the present invention provides a self-optimizing System on a Chip (SOC), where the SOC includes multiple cores, multiple hardware accelerators, multiple memories, and an interconnection framework that couples the cores, the accelerators and the memories to permit programs to be executed by the SOC. The SOC further includes a SOC reset controller, a machine learning (ML) module, a reset timer and a pathological configuration list. The SOC reset controller is configured to reset the SOC. The ML module adjusts configuration parameters of the cores, the hardware accelerators, interconnect elements and the memories autonomously until a desired performance target is achieved. The ML module adjusts the configuration parameters to meet the desired performance target by tuning the configuration parameters and autonomously cycling through configuration training sequences until the desired performance target is achieved. The ML module uses two different mechanisms to tune configuration parameters. For those configuration parameters that can be set only during SoC reset, the ML module communicates with the SOC reset controller to issue a reset and override the standard configuration parameters. For other configuration parameters, where SOC reset is not a necessity, the ML module uses a synchronization protocol so that all the cores and hardware accelerators achieve a quiescent state before configuration changes are pushed thereto. During the synchronization protocol, the reset timer measures execution times of the configuration updates and communicates with the SoC reset controller to issue a reset if the execution time exceeds a predetermined time value. The pathological configuration list, which is generated by the ML module, comprises a list of configuration settings that lead to severe performance drops by classifying performance drops below a predetermined threshold value as pathological. The ML module checks if new configuration parameters match a configuration setting in the pathological configuration list and if there is a match, then the ML module does not use the configuration parameters, but instead generates a new set of configuration parameters.

In another embodiment, the present invention provides a method of optimizing a SOC having multiple cores, multiple hardware accelerators, multiple memories and an interconnection framework therefor. The method includes setting a desired performance target for the SOC, executing a performance test on the SOC, and measuring the performance of the SOC as determined by an iteration of the performance test against the desired performance target. When the measured performance does not meet the desired performance target, a Machine Learning (ML) module is enabled that uses workload dataflow information to build or select a ML network and configures the SOC to meet the desired performance target by tuning configuration parameters of at least the cores, the accelerators, the interconnect and the memories by autonomously cycling through configuration training and/or exploiting sequences until the desired performance target is achieved. The ML module classifies performance drops below a predetermined performance threshold as pathological and saves the configuration parameters thereof to a pathological configuration list. Then configuration settings that lead to severe performance drops are avoided by the ML module checking if new configuration parameters match one of the configuration settings stored in the pathological configuration list. The method observes performance metrics and recovers from SOC configuration settings that lead to the severe performance drops or deadlock like conditions by applying reset.

In one embodiment, the ML module configures the SOC to meet the desired performance target by tuning configuration parameters of the SOC and autonomously cycling through SOC configuration training sequences until the desired performance target is achieved. The ML module avoids SOC configuration settings that lead to severe performance drops by classifying performance drops below a threshold as pathological, recording SOC configurations that lead to pathological performance drops in a pathological configuration list, and checking if new SOC configurations match one of the SOC configuration settings stored in the pathological configuration list. The ML module also allows the SOC to recover from configuration settings that lead to the SOC freezing by using a reset timer and initiating a reset if the reset timer expires. The initiated reset is a special reset, not a normal SOC reset, as the reset routine is updated to use configuration parameters specified by the ML module instead of the default configuration parameters used in the normal SOC reset.

In one embodiment, the method further comprises providing a protocol for synchronized updates to avoid undefined behaviors due to dynamic runtime configuration changes, confirmation of quiescent state asserted to ML module, collecting quiescent state confirmation before pushing configuration updates and providing a reset timer to issue SOC reset if a quiescent state is not attained within a predetermined time.

