INCORPORATION BY REFERENCE

An Application Data Sheet is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed Application Data Sheet is incorporated by reference herein in its entirety and for all purposes.

TECHNICAL FIELD

Embodiments of the present disclosure mainly relate to the field of chips, and more specifically to a method and apparatus for generating a chip-based computing function, a device, and a computer-readable storage medium.

BACKGROUND

In recent years, artificial intelligence (AI) represented by deep learning technology has been widely used in various fields (such as speech processing, image processing, natural language processing, video processing, and automatic control), and has a profound impact on people's lifestyles. With further development of artificial intelligence technology, people's expectations for the level of artificial intelligence are increasingly high. The level of artificial intelligence mainly depends on the development of deep learning, while the deep learning technology has very high requirements for computing power. The conventional processors are difficult to meet the requirements of deep learning due to the limitations of performance, cost, power consumption and the like. Therefore, how to design high-performance AI chips with deep combination of software and hardware, such as graphics processing units (GPUs) and application-specific integrated circuits (ASICs), to meet the requirements of deep learning technology, is a key problem that needs to be solved now.

SUMMARY

According to example embodiments of the present disclosure, a solution for generating a chip-based computing function is provided.

In a first aspect, an embodiment of the present disclosure provides a method for generating a chip-based computing function. The method includes: acquiring an input parameter value associated with a computing function supported by a chip; determining, based on the input parameter value, at least one candidate computing function template corresponding to the computing function, the candidate computing function template having a configurable parameter associated with performance of the candidate computing function template, and the configurable parameter having at least one candidate value; and determining, according to the input parameter value and candidate values of the configurable parameter of the candidate computing function template, a target computing function template and a target value of a configurable parameter of the target computing function template to implement the chip-based computing function.

In a second aspect, an embodiment of the present disclosure provides an apparatus for generating a chip-based computing function. The apparatus includes: an input parameter value acquiring module, configured to acquire an input parameter value associated with a computing function supported by a chip; a candidate computing function template determining module, configured to determine, based on the input parameter value, at least one candidate computing function template corresponding to the computing function, the candidate computing function template having a configurable parameter associated with performance of the candidate computing function template, and the configurable parameter having at least one candidate value; and a target computing function template determining module, configured to determine, according to the input parameter value and candidate values of the configurable parameter of the candidate computing function template, a target computing function template and a target value of a configurable parameter of the target computing function template to implement the chip-based computing function.

In a third aspect, an embodiment of the present disclosure provides an electronic device including: one or more processors; and a storage apparatus, for storing one or more programs, where the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method according to the first aspect.

In a fourth aspect, an embodiment of the present disclosure provides a computer readable medium, storing a computer program thereon, where the computer program, when executed by a processor, implements the method according to the first aspect.

It should be appreciated that the description of the Summary is not intended to limit the key or important features of embodiments of the present disclosure, or to limit the scope of the present disclosure. Other features of the present disclosure will become readily comprehensible through the following description.

