CROSS REFERENCE OF RELATED APPLICATION

This is a U.S. National Stage under 35 U.S.C. 371 of the International Application Number PCT/CN2018/097727, filed Jul. 30, 2018, which claims priority to Chinese application number CN201810478979.1, filed May 18, 2018 and Chinese application number CN201820743497.X, filed May 18, 2018, which are incorporated herewith by references in their entities.

BACKGROUND OF THE PRESENT INVENTION

Field of Invention

The present invention relates to a LED chip, and more particularly to a light emitting diode (LED) and its LED chip, and the manufacturing method and light-emitting method of the LED chip.

Description of Related Arts

LED, Light-Emitting Diode, is regarded as a new generation of lighting tools due to its advantages of high lightness, longer life span, small size, low power-consumption, and so on. However, the conventional LED still has low luminous efficiency, so that how to improve the luminous efficiency of the LED chip while solving a series of problems generated for improving the luminous efficiency of the LED chip has become one of the most important research topics.

Referring to theFIG. 1toFIG. 7of the drawings, the conventional LED chip is illustrated, wherein the LED chip comprises a substrate10P, an epitaxial stacked layer20P, a current blocking layer30P, a transparent electrical conductive layer40P, a metallic electrode assembly50P, and a passivation protective layer60P. The conventional LED chip also has an N-type exposed portion70P. Accordingly, the epitaxial stacked layer20P further comprises an N-type semiconductor layer21P, an active region22P and a P-type semiconductor layer23P, wherein the N-type semiconductor layer21P, the active region22P and the P-type semiconductor layer23P are formed sequentially from the substrate10P, such that the substrate10P and the N-type semiconductor layer21P, the active region22P and the P-type semiconductor layer23P of the epitaxial stacked layer20P are stacked in sequence.

A manufacturing process for the conventional LED chip is described as follows:

(a) Referring to theFIGS. 3A and 3Bof the drawings, a first photoresist layer is formed on the P-type semiconductor layer23P of the epitaxial stacked layer20P, and then the N-type exposed portion70P is formed by dry-etching the epitaxial stacked layer20P, wherein the N-type exposed portion70P is extended from the P-type semiconductor layer23P to the N-type semiconductor layer21P through the active region22P, such that a portion of the N-type semiconductor layer21P is exposed to the epitaxial. Then, the first photoresist layer is removed from the epitaxial stacked layer20P.

(b) Referring toFIG. 4AandFIG. 4Bof the drawings, a second photoresist layer is formed on the P-type semiconductor layer23P of the epitaxial stacked layer20P, and then the current blocking layer30P is formed on the epitaxial stacked layer20P by wet-etching the epitaxial stacked layer20P, wherein the current blocking layer30P is stacked on the P-type semiconductor layer23P of the epitaxial stacked layer20P, and then the second photoresist layer is removed from the P-type semiconductor layer23P of the epitaxial stacked layer20P.

(c) Referring toFIGS. 5A and 5Bof the drawings, the transparent electric conductive layer40P, which is stacked on the P-type semiconductor layer23P of the epitaxial stacked layer20P and encapsulates the current blocking layer30P, is formed, wherein a third photoresist layer is formed on the transparent electric conductive layer40P sequentially. A portion of the transparent electric conductive layer40P is removed by etching, so as to expose a respective portion of the current blocking layer30P, and then the third photoresist layer is removed from the transparent electric conductive layer40P.

(d) Referring toFIG. 6AandFIG. 6Bof the drawings, a fourth photoresist layer is formed on the transparent electric conductive layer40P, and an N-type electrode52P and a P-type electrode51P of the metallic electrode assembly50P are formed on the transparent electric conductive layer40P, wherein the P-type electrode51P is electrically linked with the transparent electric conductive layer40P, while the N-type electrode52P is electrically linked with the N-type semiconductor layer21P. Then, the forth photoresist layer is removed from the transparent electric conductive layer40P.

(e) Referring toFIG. 7AandFIG. 7Bof the drawings, the passivation protective layer60P is formed on the N-type electrode51P and P-type electrode52P, wherein a fifth photoresist layer is formed on the passivation protective layer60P sequentially, and then the passivation protective layer60P is etched for allowing a portion of the P-type electrode51P and a portion of the N-type electrode52P being exposed. Then, the fifth photoresist layer is removed from the passivation protective layer60P to form the LED chip eventually.

However, there are still many drawbacks existing in the conventional LED chip. Firstly, since the current blocking layer30P is stackingly formed on the P-type semiconductor layer23P of the epitaxial stacked layer20, the amount of the material for manufacturing the chip is increased as well as the size thereof and the productivity of the chip is affected due to a prolonged manufacturing process, so that the manufacturing costs of the LED chip is increased.

Furthermore, the adhesion between the P-type electrode51P and the transparent electric conductive layer40P is relatively week, and that the P-type electrode51P is not completely contacted with the transparent electric conductive layer40P, so that a hole design is required for the P-type electrode51P and the transparent electric conductive layer40P, resulting in further increase of the manufacturing cost of the chip.

In addition, the P-type electrode51P is isolated with the transparent electric conductive layer40P via the current blocking layer30P, so that less current is able to flow into the peripheral edge of the chip, resulting in a week illumination at the peripheral edge of the chip. Therefore, the luminous efficiency of the chip is adversely influenced.

SUMMARY OF THE PRESENT INVENTION

The invention is advantageous in that it provides a LED and its LED chip, and the manufacturing method and light emitting method of the LED chip, wherein the luminous efficiency of the LED chip is able to be improved significantly.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light emitting method of the LED chip, wherein the current in the LED chip is able to be distributed evenly so as to improve the reliability of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light emitting method of the LED chip, wherein the manufacture procedure of the photoetching is able to be reduced, which helps to improve the productivity of the LED chip and reduce the manufacturing cost of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light emitting method of the LED chip, wherein a first photoetching is taken after stacking a transparent electric conductive base layer on an epitaxial stacked layer, so as to form and stack the transparent electric conductive base layer on a transparent electric conductive layer of the epitaxial stacked layer, which enables the transparent electric conductive layer to be formed and to expose a N-type semiconductor layer of the epitaxial stacked layer in the same manufacture procedure of the first photoetching, such that the LED chip of the present invention has a lower manufacturing cost than the manufacture procedure of the photoetching of the conventional LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the LED chip provides a passivation protective layer stacked on the transparent electric conductive layer, wherein the passivation protective layer can not only block the current but also improve the effect of the current expanding transversely so as to distribute the current more evenly and to help on improving the luminous efficiency of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the electrode assembly is fabricated after forming the passivation protective layer, such that the passivation protective layer has the effect of blocking the current since the passivation protective layer is directly stacked on the transparent electric conductive layer, and the chip of the present invention needs no special current blocking layer compared to the conventional LED chip, wherein the method described above can not only help to reduce the manufacturing cost of the chip but also help to reduce at least one step of the manufacture procedure of the photoetching of the LED chip and shorten the production line thereof, so as to reduce the manufacturing cost of the LED chip and reduce the size and the thickness of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the passivation protective layer provides an array of passive-layer holes so as to allow the electrode assembly to electrically link with the transparent electric conductive layer, and then the LED chips are able to achieve the dot glowing in the passive-layer holes of the passivation protective layer, such that the brightness of the LED chips is enhanced.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the P-type electrode of the chip comprises an array of finger members formed in the passive-layer holes of the passivation protective layer when the passivation protective layer is formed, so that when the working voltage is applied to the P-type electrode, the current flowing through the finger members of the P-type electrode is able to be provided to the transparent electric conductive layer at different positions of the transparent electric conductive layer to facilitate the current distribution more evenly.

Additional advantages and features of the invention will become apparent from the description which follows, and may be realized by means of the instrumentalities and combinations particular point out in the appended claims.

According to the present invention, the foregoing and other objects and advantages are attained by a LED chip, comprising:

a substrate;

an epitaxial stacked layer which comprises an N-type semiconductor layer, an active region and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active region and the P-type semiconductor layer are stacked with each other in sequence;

a transparent electric conductive layer stacked on the P-type semiconductor layer of the epitaxial stacked layer;

a passivation protective layer having a plurality of passive-layer holes formed therein, wherein the passivation protective layer is stacked on the transparent electric conductive layer in such a manner that the passive-layer holes are positioned with respect to different positions of the transparent electric conductive layer respectively; and

an electrode assembly comprising an N-type electrode and a P-type electrode, wherein the N-type electrode is electrically linked with the N-type semiconductor layer of the epitaxial stacked layer, and a portion of the P-type electrode, passing through the plurality of passive-layer holes of the passivation protective layer, is electrically linked with the transparent electric conductive layer.

In one embodiment of the present invention, the LED chip has an N-type exposed portion extending from the passivation protective layer to the N-type semiconductor layer of the epitaxial stacked layer through the transparent electric conductive layer and the P-type semiconductor layer of the epitaxial stacked layer and the active region, such that a portion of the N-type semiconductor layer is exposed at the N-type exposed portion.

In one embodiment of the present invention, the N-type electrode is formed on the N-type semiconductor layer of the epitaxial stacked layer in such a manner that the N-type electrode of the electrode assembly is electrically connected with the N-type semiconductor layer.

In one embodiment of the present invention, the N-type electrode is formed on the P-type semiconductor layer of the epitaxial stacked layer in such a manner that the P-type electrode of the electrode assembly is electrically connected with the P-type semiconductor layer.

In one embodiment of the present invention, the P-type electrode has a plurality of finger members formed in the plurality of passive-layer holes of the passivation protective layer respectively, such that the plurality of finger members of the P-type electrode are electrically connected with the transparent electric conductive layer respectively at different positions of the transparent electric conductive layer.

In one embodiment of the present invention, the plurality of finger members of the P-type electrode comprises a first group of finger members and a second group of finger members, wherein the first and second group of the finger members are extended across the LED chip along a peripheral edge of the LED chip from a first end portion to a second end portion.

In one embodiment of the present invention, the plurality of finger members of the P-type electrode comprises a first group of finger members, a second group of finger members and a third group of finger members, wherein the first group and second group of finger members are extended across the LED chip along a peripheral edge of the LED chip from a first end portion to a second end portion thereof, while the third group of finger members is retained at the second end portion of the LED chip.

In one embodiment of the present invention, the passivation protective layer is stacked on the N-type semiconductor layer that the plurality of passive-layer holes are arranged corresponding to different positions of the N-type semiconductor layer respectively, wherein a portion of the N-type electrode is electrically linked to the N-type semiconductor layer after passing through the passive-layer holes of the passivation protective layer.

In one embodiments of the present invention, the substrate is selected from the group consisting of a sapphire substrate, a silicon substrate and silicon-carbide substrate.

In one embodiment of the present invention, the substrate is selected from the group consisting of a sapphire substrate, a silicon substrate and a silicon-carbide substrate.

According to another aspect of the present invention, the present invention further provides a LED, which comprises:

an encapsulated body,

an electrode pin assembly, wherein the electrode pin assembly comprises an N-type electrode pin and a P-type electrode pin; and

a LED chip, which comprises:

a substrate;

an epitaxial stacked layer which comprises an N-type semiconductor layer, an active region and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active region and the P-type semiconductor layer are stacked with each other in sequence;

a transparent electric conductive layer stacked on the P-type semiconductor layer of the epitaxial stacked layer;

a passivation protective layer having a plurality of passive-layer holes, wherein the passivation protective layer is stacked on the transparent electric conductive layer in such a manner that the passive-layer holes are positioned with respect to different positions of the transparent electric conductive layer respectively; and

an electrode assembly, which comprises an N-type electrode and a P-type electrode, wherein the N-type electrode is electrically linked with the N-type semiconductor layer of the epitaxial stacked layer, and a portion of the P-type electrode, passing through the plurality of passive-layer holes of the passivation protective layer, is electrically linked with the transparent electric conductive layer;

wherein the LED chip is encapsulated in a package body, wherein the N-type electrode pin and the P-type electrode pin are electrically connected with the N-type electrode and the P-type electrode respectively, wherein the N-type electrode pin and the P-type electrode pin are extended from the interior of the package body to the exterior thereof.

In one embodiment of the present invention, the P-type electrode pin gradually reduces its size from a connecting end to a free end thereof.

According to another aspect of the present invention, it further provides a manufacturing method of a LED chip, which comprises the following step.

(a) Form an N-type semiconductor layer, an active region and a P-type semiconductor layer sequentially on a substrate.

(b) Form a transparent electric conductive layer stacked on the P-type semiconductor layer and forming an N-type hole extended from the transparent electric conductive layer to the N-type semiconductor layer through the P-type semiconductor layer and the active region at the same time.

(c) Stack a passivation protective layer having a plurality of passive-layer holes in the transparent electric conductive layer, such that the passive-layer holes of the passivation protective layer are corresponding to different positions of the transparent electric conductive layer respectively.

(d) Electrically connect an N-type electrode to the N-type semiconductor layer, and electrically connect a P-type electrode to the P-type semiconductor layer through the plurality of passive-layer holes of the passivation protective layer.

In one embodiment of the present invention, wherein the step (b) further comprises the steps of:

stacking a transparent electric conductive base layer on the P-type semiconductor layer;

stacking a first photoresist layer on the transparent electric conductive base layer; and

etching the first photoresist layer, the transparent electric conductive base layer, and the active region from pre-determined positions so as to form the N-type hole and the transparent electric conductive layer simultaneously.

In one embodiment of the present invention, wherein the step (b) further comprises the steps of:

stacking a transparent electric conductive base layer on the P-type semiconductor layer;

stacking a first photoresist layer on the transparent electric conductive base layer; and

etching the first photoresist layer, the transparent electric conductive base layer, the active region and a pre-determined position of the N-type semiconductor layer so as to form the N-type hole and the transparent electric conductive layer simultaneously.

In one embodiment of the present invention, the transparent electric conductive layer is stacked on the P-type semiconductor layer by means of evaporation.

In one embodiment of the present invention, in the step (c), a N-type exposed portion, which is extended from the passivation protective layer to the N-type semiconductor layer through the transparent electric conductive layer, P-type semiconductor layer and the active region, is formed at the position of N-type hole, while stacking the passivation protective layer on the transparent electric conductive layer.

In one embodiment of the present invention, the step (c) further comprises the steps of:

stacking a passive base layer on the transparent electric conductive layer;

stacking a second photoresist layer on the passive base layer; and

removing the second photoresist layer and the passive base layer of the positions corresponding to the N-type holes, such that the passivation protective layer and the N-type exposed portion are formed simultaneously.

In one embodiment of the present invention, in the step (d), a plurality of finger members, extending from one side of the passivation protective layer to the opposing side thereof through the plurality passive-layer holes of the passivation protective layer respectively, are formed when the P-type electrode is formed on the passivation protective layer, wherein the finger members are electrically connected with the transparent electric conductive layer respectively at different position of the transparent electric conductive layer respectively.

According to another aspect of the present invention, the present invention further comprises a light emitting method of a LED chip, which comprises the following steps:

(A) Apply an electric current to a transparent electric conductive layer at different positions, such that the electrical current is evenly distributed at the transparent electric conductive layer.

(B) Apply a voltage at two sides of the active region from a N-type semiconductor layer and a P-type semiconductor layer, such that the active region is enabled to produce lighting, wherein the transparent electric conductive layer is stacked on the P-type semiconductor layer.

In one embodiment of the present invention, the electric current is applied to the transparent electric conductive layer from two sides of the LED chip, such that the electrical current is evenly distributed at the transparent electric conductive layer.

In one embodiment of the present invention, the electric current is applied to the transparent electric conductive layer from two sides and one end portion of the LED chip, such that the electrical current is evenly distributed at the transparent electric conductive layer.

Still further objects and advantages will become apparent from a consideration of the ensuing description and drawings.

These and other objectives, features, and advantages of the present invention will become apparent from the following detailed description, the accompanying drawings, and the appended claims.

