FIELD OF INVENTION

The present disclosure relates to the field of display technologies, and more particularly to a display panel, a method of manufacturing the same, and a display device.

BACKGROUND OF INVENTION

Active-matrix organic light emitting diode (AMOLED) panels have gradually become a new generation display technology due to its high contrast, wide color gamut, low power consumption, and foldability.

However, in the AMOLED panel, when a pixel driving circuit drives a pixel unit to emit light, brightness of the AMOLED panel closer to a driver chip (IC) is inconsistent with brightness of the AMOLED panel far from the driver chip due to an ohmic voltage drop on a power line (VDD line). This affects display uniformity of the panel.

SUMMARY OF INVENTION

An object of the present application is to provide a display panel, a method of manufacturing the same, and a display device to reduce impedance of a power line, thereby reducing influence of an ohmic voltage drop of the power line on display uniformity of a panel.

In order to solve the above issues, an embodiment of the present invention provides a display panel. The display panel comprises a substrate; a first metal layer disposed on the substrate, wherein the first metal layer comprises a first power line extending in a predetermined direction; an interlayer dielectric layer disposed on the substrate and covering the first metal layer, wherein the interlayer dielectric layer is provided with a via hole; and a second metal layer disposed on the interlayer dielectric layer, wherein the second metal layer comprises a second power line extending along the predetermined direction, and the second power line is disposed above the first power line and electrically connected to the first power line through the via hole.

In an embodiment of the present invention, the first metal layer further comprises a third power line disposed cross the first power line, and the third power line is electrically connected to the second power line through the via hole.

In an embodiment of the present invention, the second metal layer further comprises a fourth power line disposed cross the second power line, the fourth power line is electrically connected to the first power line through the via hole.

In an embodiment of the present invention, the first metal layer further comprises a fifth power line disposed cross the first power line, the fifth power line is positioned below the fourth power line and is electrically connected to the fourth power line through the via hole.

In an embodiment of the present invention, the first power line and the fifth power line constitute a first power line group, the second power line and the fourth power line constitute a second power line group, and shapes of the first power line group and the second power line group are all mesh.

In an embodiment of the present invention, the display panel further comprises a third metal layer and an insulating layer sequentially away from the substrate, the third metal layer and the insulating layer are disposed between the substrate and the first metal layer, the third metal layer comprises a first electrode and a second electrode, and the second electrode and the first electrode constitute a storage capacitor.

In an embodiment of the present invention, the display panel further comprises a thin film transistor disposed on the substrate, the thin film transistor comprises a gate, a source, and a drain, the gate is disposed on the third metal layer, and the source and the drain are disposed on the second metal layer.

In an embodiment of the present invention, the display panel further comprises a planarization layer and a pixel defining layer, the planarization layer is disposed on the interlayer dielectric layer and covers the second metal layer, and the pixel defining layer is disposed on the planarization layer.

In order to solve the above issues, an embodiment of the present invention provides a method of manufacturing a display panel, comprising: providing a substrate; forming a first metal layer on the substrate, wherein the first metal layer comprises a first power line extending in a predetermined direction; forming an interlayer dielectric layer on the substrate on which the first metal layer is formed and forming a via hole on the interlayer dielectric layer; and forming a second metal layer on the interlayer dielectric layer, wherein the second metal layer comprises a second power line extending along the predetermined direction, and the second power line is disposed above the first power line and electrically connected to the first power line through the via hole.

In an embodiment of the present invention, the first metal layer further comprises a third power line disposed cross the first power line, forming the first metal layer on the substrate further comprises: laying a first metal material layer on the substrate; and etching the first metal material layer to obtain a patterned first metal layer, wherein the first metal layer comprises the first power line and the third power line disposed cross with each other.

In an embodiment of the present invention, the second metal layer further comprises a fourth power line disposed cross the second power line, forming the second metal layer on the interlayer dielectric layer further comprises: laying a second metal material layer on the interlayer dielectric layer; and etching the second metal material layer to obtain a patterned second metal layer, wherein the second metal layer comprises the second power line and the fourth power line disposed cross with each other.

In order to solve the above issues, an embodiment of the present invention provides a display device comprises a display panel, the display panel comprising: a substrate; a first metal layer disposed on the substrate, wherein the first metal layer comprises a first power line extending in a predetermined direction; an interlayer dielectric layer disposed on the substrate and covering the first metal layer, wherein the interlayer dielectric layer is provided with a via hole; and a second metal layer disposed on the interlayer dielectric layer, wherein the second metal layer comprises a second power line extending along the predetermined direction, and the second power line is disposed above the first power line and electrically connected to the first power line through the via hole.

In an embodiment of the present invention, the first metal layer further comprises a third power line disposed cross the first power line, and the third power line is electrically connected to the second power line through the via hole.

In an embodiment of the present invention, the second metal layer further comprises a fourth power line disposed cross the second power line, the fourth power line is electrically connected to the first power line through the via hole.

In an embodiment of the present invention, the first metal layer further comprises a fifth power line disposed cross the first power line, the fifth power line is positioned below the fourth power line and is electrically connected to the fourth power line through the via hole.

In an embodiment of the present invention, the first power line and the fifth power line constitute a first power line group, the second power line and the fourth power line constitute a second power line group, and shapes of the first power line group and the second power line group are all mesh.

In an embodiment of the present invention, the display panel further comprises a third metal layer and an insulating layer sequentially away from the substrate, the third metal layer and the insulating layer are disposed between the substrate and the first metal layer, the third metal layer comprises a first electrode, the first metal layer further comprises a second electrode, and the second electrode and the first electrode constitute a storage capacitor.

In an embodiment of the present invention, the display panel further comprises a thin film transistor disposed on the substrate, the thin film transistor comprises a gate, a source, and a drain, the gate is disposed on the third metal layer, and the source and the drain are disposed on the second metal layer.

In an embodiment of the present invention, the display panel further comprises a planarization layer and a pixel defining layer, the planarization layer is disposed on the interlayer dielectric layer and covers the second metal layer, and the pixel defining layer is disposed on the planarization layer.

Beneficial effects of an embodiment of the present invention are that: the display panel according to an embodiment of the present application comprises a substrate, and a first metal layer, an interlayer dielectric layer, and a second metal layer sequentially disposed away from the substrate. The first metal layer includes a first power line extending along a predetermined direction, the interlayer dielectric layer is provided with a via hole, the second metal layer includes a second power line extending along the predetermined direction, and the second power line is disposed above the first power line and electrically connected to the first power line through the via hole. In this way, by designing a power line in a pixel driving circuit to have a two-layer structure, impedance of the power line can be reduced, thereby reducing an ohmic voltage drop of the power line and improving display uniformity of the display panel.

