BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a semiconductor package structure, and in particular to a semiconductor package structure with holes formed on the top surface of a substrate therein.

Description of the Related Art

A semiconductor package can not only provide a semiconductor die with protection from environmental contaminants, but it can also provide an electrical connection between the semiconductor die packaged therein and a substrate, such as a printed circuit board (PCB). For instance, a semiconductor die may be enclosed in an encapsulating material, and traces are electrically connected to the semiconductor die and the substrate.

However, a problem with such a semiconductor package is that it is subject to different temperatures during the packaging process. The semiconductor package may be highly stressed due to the different coefficients of thermal expansion (CTEs) of the various substrate and semiconductor die materials. As a result, the semiconductor package may exhibit warping or cracking so that the electrical connection between the semiconductor die and the substrate may be damaged, and the reliability of the semiconductor package may be decreased.

This problem is exacerbated in the case of a relatively large package, for example a package of 50 mm×50 mm or larger. Therefore, a novel semiconductor package structure is desirable.

BRIEF SUMMARY OF THE INVENTION

Semiconductor package structures are provided. An exemplary embodiment of a semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto. The substrate includes a wiring structure. The semiconductor package structure also includes a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The semiconductor package structure further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The first semiconductor die and the second semiconductor die are separated by a molding material. In addition, the semiconductor package structure includes a first hole and a second hole formed on the second surface of the substrate.

Another exemplary embodiment of a semiconductor package structure includes a substrate having a wiring structure. The semiconductor package structure also includes a first semiconductor die disposed over the substrate and electrically coupled to the wiring structure. The semiconductor package structure further includes a second semiconductor die disposed over the substrate and electrically coupled to the wiring structure. The first semiconductor die and the second semiconductor die are arranged side-by-side. In addition, the semiconductor package structure includes a plurality of holes formed on a surface of the substrate. The holes are located within projections of the first semiconductor die and the second semiconductor die on the substrate.

Yet another exemplary embodiment of a substrate structure includes a wiring structure disposed in a substrate, wherein the wiring structure is coupled to a plurality of semiconductor dies disposed over the substrate. The substrate structure also includes a plurality of holes formed on a surface of the substrate, wherein the holes are located within projections of the semiconductor die on the substrate.

Another exemplary embodiment of a semiconductor package structure includes a substrate, a semiconductor die and a frame. The semiconductor die is disposed over the substrate. The frame is disposed over the substrate, wherein the frame is adjacent to the semiconductor die, and the upper surface of the frame is lower than the upper surface of the semiconductor die.

Another exemplary embodiment of a semiconductor package structure includes a substrate, a semiconductor die, a frame and a buffer layer. The semiconductor die is disposed over the substrate. The frame is disposed over the substrate. The buffer layer is disposed on the substrate and located between the semiconductor die and the frame, wherein the upper surface of the frame is substantially level with the upper surface of the buffer layer.

Another exemplary embodiment of a semiconductor package structure includes a substrate, a semiconductor die and a buffer layer. The semiconductor die is disposed over the substrate. The buffer layer is disposed on the semiconductor die and located adjacent to the semiconductor die, wherein the upper surface of the buffer layer is substantially level with the upper surface of the semiconductor die.

A detailed description is given in the following embodiments with reference to the accompanying drawings.

