TECHNICAL FIELD

The present disclosure pertains in general to data processing systems and in particular to technology for optimizing processor utilization.

BACKGROUND

A processor in a conventional data processing system may include multiple thread processing units (TPUs) that enable the processor to execute multiple threads at once. For instance, a processor may include multiple single-threaded processing cores, with each processing core being capable of executing a different thread. Alternatively, a processor may include a single processing core that includes multiple logical processors (LPs) which enable the processor to perform simultaneous multithreading (SMT), with each LP being capable of executing a different thread. For purposes of this disclosure, a processing core that supports SMT may be referred to as a “multithreaded processing core.” Alternatively, a processor may include multiple processing cores, each of which includes multiple LPs for performing SMT. For purposes of this disclosure, the terms “thread processing unit” and “TPU” refer to the features of a processor which enable the processor to execute a software thread. For instance, a single-threaded processing core may be referred to as a TPU, and each LP in a multithreaded processing core may be referred to as a TPU.

A conventional processor may have a homogenous topology, in that all of the TPUs in the processor are the same kind of TPU. For instance, all of the TPUs may be the same kind of single-threaded processing core, or all of the TPUs may be the same kind of LP in the same kind of multithreaded processing core.

A conventional operating system (OS) in a data processing system with multiple TPUs includes a thread manager to schedule threads on those TPUs. However, the algorithms that a conventional thread manager uses to make thread scheduling decisions may be designed for a processor with a homogenous topology.

Manufacturers are now developing processors with heterogenous topologies. For purposes of this disclosure, a processor with a “heterogenous topology” is a processor that includes at least two different types of processing cores. Accordingly, a heterogenous processor includes at least two different types of TPUs. A heterogenous processor may also be referred to as a “hybrid processor.”

