BACKGROUND

1. Field

Embodiments relate to a semiconductor device and a method for fabricating the same.

2. Description of the Related Art

As a scaling technique for increasing the density of the semiconductor device, a multi-gate transistor in which a multi-channel active pattern (or a silicon body) having a fin or nanowire shape may be formed on a substrate and a gate may be formed on a surface of the multi-channel active pattern.

SUMMARY

The embodiments may be realized by providing a semiconductor device including a substrate; an active pattern extending in a first direction on the substrate; a field insulating film surrounding a part of a side wall of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, the second direction intersecting the first direction; a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first gate structure and the second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes a first inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.

The embodiments may be realized by providing a semiconductor device including a substrate; an active pattern including a separation trench on the substrate; a device isolation film filling the separation trench; a source/drain region in the active pattern; and a gate structure intersecting the active pattern on the active pattern between the device isolation film and the source/drain region, wherein a side wall of the gate structure facing the device isolation film includes a first inclined surface having an acute angle with respect to an upper surface of the active pattern.

The embodiments may be realized by providing a semiconductor device including a substrate including a first region and a second region; a first active pattern including a first separation trench and extending in a first direction on the first region of the substrate; a second active pattern extending in the first direction on the second region of the substrate; a first gate structure extending in a second direction on the first active pattern and the second active pattern, the second direction intersecting the first direction; a second gate structure spaced apart from the first gate structure and extending in the second direction on the first active pattern and the second active pattern; and a device isolation film filling the first separation trench and extending in the second direction between the first gate structure and the second gate structure, wherein a side wall of the first gate structure facing the device isolation film includes a first inclined surface having an acute angle with respect to an upper surface of the first active pattern.

The embodiments may be realized by providing a semiconductor device including a substrate; a first fin type pattern extending in a first direction on the substrate; a second fin type pattern spaced apart from the first fin type pattern in the first direction and extending in the first direction on the substrate; a field insulating film that separates the first fin type pattern and the second fin type pattern and includes a separation trench therein; a first gate structure and a second gate structure on both sides of the separation trench and extending in a second direction intersecting the first direction, respectively; and a device isolation film that fills the separation trench between the first gate structure and the second gate structure.

The embodiments may be realized by providing a method for fabricating a semiconductor device, the method including forming an active pattern extending in a first direction on a substrate, forming a plurality of dummy gate electrodes spaced apart from each other and extending in a second direction intersecting the first direction, on the active pattern, forming an interlayer insulating film that covers side walls of the respective dummy gate electrodes; forming a first gate structure and a second gate structure, each extending in the second direction, in place of a plurality of the dummy gate electrodes, after forming the interlayer insulating film; etching the interlayer insulating film and the active pattern between the first gate structure and the second gate structure to form a separation trench; and forming a device isolation film which fills the separation trench.

