CROSS REFERENCE TO RELATED APPLICATIONS

This Application claims priority of China Patent Application No. 201810007643.7, filed on Jan. 4, 2018, the entirety of which is incorporated by reference herein.

BACKGROUND OF THE INVENTION

Field of the Invention

The disclosure relates generally to a flash memory device and a data retention method thereof, and more particularly it relates to a static wear-leveling method applied to a flash memory for improving the lifetime of the flash memory.

Description of the Related Art

The upper limit of the theoretical erase count of physical blocks in flash memory is continuously decreasing. This has been due to the scaling down of the process size, as well as the progress being made in multiple voltage level storage technology. In addition, since user data includes both hot data and cold data (i.e., frequently accessed data is called hot data, whereas infrequently accessed data is called cold data), each physical block may have an erase count that is different from any other's. Blocks storing hot data can be damaged when the erase count limit is reached after frequent erasing and writing operations, while blocks storing cold data cannot be fully utilized. An algorithm for static wear-leveling is proposed to fully utilize the limited life time of a flash memory.

Since the static wear-leveling algorithm is controlled by software that can interfere with the performance of a host, a bad selection strategy may lead to meaningless internal data migration. For example, a portion of hot data may be moved to a physical block having a very high erase count, making it is impossible to stop increasing the erase count of the physical block; or, physical blocks having a lower erase count (erase counts are generated during the process of accumulative use) may always be hard to erase or write to, resulting in these physical blocks being poorly utilized.

Therefore, it is necessary to optimize the static wear-leveling algorithm so as to migrate data to the most appropriate physical block at the proper time, allowing the cost to be reduced and the erase counts of the physical blocks to be well-controlled.

BRIEF SUMMARY OF THE INVENTION

In one embodiment, a storage device comprises a flash memory array and a controller. The flash memory array comprises a plurality of blocks. A minimal erase number of blocks have a minimal erase count in the plurality of blocks. When one of the minimal erase number of blocks is erased, the controller subtracts 1 from the minimal erase number.

In one embodiment, a data retention method is adopted for a flash memory array. The flash memory array comprises a plurality of blocks, and a minimum erase number of blocks have a minimum erase count in the plurality of blocks. The data retention method comprises: erasing one of the minimum erase number of blocks; and when one of the minimum erase number of blocks is erased, the minimum erase count is decreased by 1.

The embodiments provided herein would prevent the controller from scanning the flash memory array too frequently, meaning that the hardware overhead that is needed for the host to scan the flash memory array can be reduced. In addition, since the minimum erase count and the minimum erase number are stored in the flash memory array, the minimum erase count and the minimum erase number can be retained when power is suddenly lost.

A detailed description is given in the following embodiments with reference to the accompanying drawings.

