FIELD

This application relates to non-volatile memory apparatuses and the operation of non-volatile memory apparatuses.

BACKGROUND

This section provides background information related to the technology associated with the present disclosure and, as such, is not necessarily prior art.

Semiconductor memory has become increasingly popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrically Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories. With flash memory, also a type of EEPROM, the contents of the whole memory array, or of a portion of the memory, can be erased in one step, in contrast to the traditional, full-featured EEPROM.

Both the traditional EEPROM and the flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage (Vth) of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.

Some EEPROM and flash memory devices have a floating gate that is used to store two ranges of charges and, therefore, the memory element can be programmed/erased between two states, e.g., an erased state and a programmed state. Such a flash memory device is sometimes referred to as a binary flash memory device because each memory element can store one bit of data.

A multi-state (also called multi-level) flash memory device is implemented by identifying multiple distinct allowed/valid programmed threshold voltage ranges. Each distinct threshold voltage range corresponds to a predetermined value for the set of data bits encoded in the memory device. For example, each memory element can store two bits of data when the element can be placed in one of four discrete charge bands corresponding to four distinct threshold voltage ranges.

Techniques are needed for accurately programming the threshold voltage ranges, in particular, as memory devices are scaled down.

SUMMARY

This section provides a general summary of the present disclosure and is not a comprehensive disclosure of its full scope or all of its features and advantages.

An object of the present disclosure is to provide a memory apparatus and a method of operating the memory apparatus that address and overcome the above-noted shortcomings.

Accordingly, it is an aspect of the present disclosure to provide a non-volatile memory apparatus. The non-volatile memory apparatus includes a plurality of non-volatile storage elements connected to a word line. Each of the plurality of non-volatile storage elements is configured to be programmed to a respective target data state among a plurality of target data states. The non-volatile memory apparatus also includes a respective bit line associated with each of the plurality of non-volatile storage elements. In addition, the non-volatile memory apparatus includes a control circuit configured, in a program operation, to apply one of a plurality of program pulses to the word line. The plurality of program pulses progressively increase in magnitude in each of a plurality of loops by a program step voltage. The control circuit is also configured to count an over programming number of the plurality of non-volatile storage elements having a threshold voltage exceeding at least one over programming verify level of the respective target data state being less than a default verify level and based on the program step voltage. The control circuit adjusts a voltage of the respective bit line of the plurality of non-volatile storage elements to one or more adjusted levels to modulate a programming speed in response to the over programming number being greater than a predetermined over programming number. The one or more adjusted levels is greater or less than an initial level by a delta bit line voltage.

According to another aspect of the disclosure, a controller in communication with a non-volatile memory apparatus is also provided. The non-volatile memory apparatus includes a plurality of non-volatile storage elements connected to a word line. Each of the plurality of non-volatile storage elements is configured to be programmed to a respective target data state among a plurality of target data states. The non-volatile memory apparatus also includes a respective bit line associated with each of the plurality of non-volatile storage elements. The controller is, in a program operation, to instruct the non-volatile memory apparatus to apply one of a plurality of program pulses to the word line, the plurality of program pulses progressively increasing in magnitude in each of a plurality of loops by a program step voltage. The controller is also configured to count an over programming number of the plurality of non-volatile storage elements having a threshold voltage exceeding at least one over programming verify level of the respective target data state being less than a default verify level and based on the program step voltage. In addition, the controller is configured to instruct the non-volatile memory apparatus to adjust a voltage of the respective bit line of the plurality of non-volatile storage elements to one or more adjusted levels to modulate a programming speed in response to the over programming number being greater than a predetermined over programming number. The one or more adjusted levels is greater or less than an initial level by a delta bit line voltage.

According to an additional aspect of the disclosure a method of operating a non-volatile memory apparatus is provided. The non-volatile memory apparatus includes a plurality of non-volatile storage elements connected to a word line. Each of the plurality of non-volatile storage elements is configured to be programmed to a respective target data state among a plurality of target data states. The non-volatile memory apparatus includes a respective bit line associated with each of the plurality of non-volatile storage elements. The method, in a program operation, includes the step of applying one of a plurality of program pulses to the word line, the plurality of program pulses progressively increasing in magnitude in each of a plurality of loops by a program step voltage. The next step of the method is counting an over programming number of the plurality of non-volatile storage elements having a threshold voltage exceeding at least one over programming verify level of the respective target data state being less than a default verify level and based on the program step voltage. The method continues with the step of adjusting a voltage of the respective bit line of the plurality of non-volatile storage elements to one or more adjusted levels to modulate a programming speed in response to the over programming number being greater than a predetermined over programming number. The one or more adjusted levels is greater or less than an initial level by a delta bit line voltage.

Further areas of applicability will become apparent from the description provided herein. The description and specific examples in this summary are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

