CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Applications No. 10-2020-0051817, filed on Apr. 28, 2020, and 10-2020-0115517, filed on Sep. 9, 2020, in the Korean Intellectual Property Office, the disclosures of which are incorporated by reference herein in their entireties.

BACKGROUND

The inventive concept relates to metal oxide semiconductor field-effect transistor (MOSFET) devices, and more particularly, to MOSFET devices including a metal gate structure and manufacturing methods of the MOSFET devices.

Due to the development of electronics technology, down-scaling of semiconductor devices has recently progressed rapidly. Recently, because of demand for semiconductor devices to perform at a high speed and to perform accurate operations, various studies have been conducted for improving a structure of a transistor included in a semiconductor device, for example, a MOSFET.

SUMMARY

The inventive concept provides metal oxide semiconductor field-effect transistor (MOSFET) devices having a metal gate structure, in which a work function of the metal gate structure is uniform along a length direction of a channel, and manufacturing methods thereof.

According to some embodiments of the inventive concept, there are provided metal oxide field-effect transistor (MOSFET) devices, including: a semiconductor substrate; an active area on the semiconductor substrate and extending in a first direction; and a gate structure on the semiconductor substrate, the gate structure extending across the active area in a second direction that traverses the first direction and comprising an interface layer, a high-k layer, a first metal layer, a work function control (WFC) layer, and a second metal layer, which are sequentially stacked on the active area, and each of the high-k layer, the first metal layer, the WFC layer, and the second metal layer comprising a lower surface facing the semiconductor substrate and an upper surface opposite the lower surface, wherein the lower surface of the WFC layer is longer than a first interface between the lower surface of the first metal layer and the upper surface of the high-k layer in the first direction.

According to some embodiments of the inventive concept, there are provided MOSFET devices, including: a semiconductor substrate; an active area protruding from the semiconductor substrate and extending in a first direction; a gate structure on the semiconductor substrate, the gate structure extending in a second direction that traverses the first direction and covering at least a portion of the active area, the gate structure comprising an interface layer, a high-k layer, a first metal layer, a WFC layer, and a second metal layer, which are sequentially stacked on the active area, and each of the high-k layer, the first metal layer, the work function control (WFC) layer, and the second metal layer comprising a lower surface facing the semiconductor substrate and an upper surface opposite the lower surface; and source and drain areas respectively on side surfaces of the gate structure, the side surfaces of the gate structure being spaced apart from each other in the first direction, wherein the lower surface of the WFC layer is longer than a first interface between the lower surface of the first metal layer and the upper surface of the high-k layer in the first direction.

According to some embodiments of the inventive concept, there are provided manufacturing methods MOSFET device, the manufacturing method including: forming an active area having a fin shape, protruding from a semiconductor substrate and extending in a first direction; forming, on the semiconductor substrate, a dummy gate structure extending in a second direction that traverses the first direction and covering a portion of the active area; forming two spacers respectively on side surfaces of the dummy gate structure, the side surfaces of the dummy gate structure being spaced apart from each other in the first direction; removing the dummy gate structure between the two spacers; forming a high-k layer between the two spacers; etching inner side surfaces of the two spacers to increase distance between the two spacers; forming a first metal layer on an upper surface of the high-k layer; forming a WFC layer on the first metal layer; and forming a second metal layer on the WFC layer, wherein a lower surface of the WFC layer is longer than a first interface between a lower surface of the first metal layer and the upper surface of the high-k layer in the first direction.

According to some embodiments of the inventive concept, there are provided manufacturing methods of a MOSFET device, the manufacturing method including: forming an active area having a fin shape, protruding from a semiconductor substrate and extending in a first direction; forming, on the semiconductor substrate, a dummy gate structure extending in a second direction that traverses the first direction and covering a portion of the active region; forming two spacers respectively on side surfaces of the dummy gate structure, the side surfaces of the dummy gate structure being spaced apart from each other in the first direction; removing the dummy gate structure between the two spacers; conformally forming a high-k layer between the two spacers, the high-k layer comprising protruding portions extending respectively on inner side surfaces of the two spacers; conformally forming a first metal layer on the high-k layer, the first metal layer comprising protruding portions extending respectively on the inner side surfaces of the two spacers; removing the protruding portions of the high-k layer and the first metal layer; conformally forming a WFC layer on the high-k layer, the first metal layer, and the two spacers; and conformally forming a second metal layer on the WFC layer, wherein a lower surface of the WFC layer is longer than a first interface between a lower surface of the first metal layer and an upper surface of the high-k layer in the first direction.

According to some embodiments of the inventive concept, there are provided metal oxide field-effect transistor (MOSFET) devices, including: a substrate; an active area on the substrate; a gate structure on the active area, the gate structure comprising a high-k layer, a first metal layer, a work function control (WFC) layer, and a second metal layer that are sequentially stacked on the active area, and each of the high-k layer, the first metal layer, the WFC layer, and the second metal layer comprising a lower surface facing the active area and an upper surface opposite the lower surface; and source/drain regions respectively adjacent side surfaces of the gate structure. The lower surface of the WFC layer may protrude outwardly beyond opposing ends of an interface between the lower surface of the first metal layer and the upper surface of the high-k layer.

