This application claims priority from a Chinese patent application, application number: 201911273124.6, filed on Dec. 12, 2019 with the Chinese Patent Office. The invention title is “Thin Film Transistor, Manufacturing Method of Same, and CMOS Inverter”. The entire contents of which are incorporated in this application.

FIELD

The present disclosure relates to display technologies, and more particularly, to a thin film transistor, a manufacturing method of the same, and a CMOS inverter.

BACKGROUND

In recent years, carbon nanotube thin film transistors have attracted more and more attention. The reason is that compared with the existing thin film transistor technology, single-layer carbon nanotube (CNT) thin film transistor (TFT) devices have obvious advantages in terms of performance and manufacturing process.

In CNT-TFT technology, its mobility and on-state current have obvious advantages, and its process temperature and process complexity are low. However, in existing CNT-TFT thin film transistor products, there are still many issues. One of them is a threshold control of CNT-TFT. Generally, CNT-TFT is prepared by using CNT solution to provide a CNT thin film on a substrate. Adsorption of water or oxygen in the air causes the prepared CNT-TFT to be a p-type transistor. Meanwhile, due to non-ideal factors in the process of preparing a CNT material, a threshold controllability of a prepared transistor is poor. In addition, in the existing CNT-TFT products, threshold control means for the CNT-TFT is mainly changing a work function of a gate electrode, doping of a channel, or controlling a thickness of a dielectric oxide layer and interface charges. An ability to control the threshold voltage is limited only by changing the work function of the gate electrode. The controllability of the channel doping is poor. It is difficult to obtain repeatable and reliable results.

Therefore, issues of prior art need to be solved.

SUMMARY

In view of the above, the present disclosure provides thin film transistor, and a manufacturing method of the same to solve the technical issues that controllability and reliability of a threshold voltage of a prior art carbon nanotube thin film transistor is poor.

In order to achieve above-mentioned object of the present disclosure, one embodiment of the disclosure provides a manufacturing method of a thin film transistor, including steps of:

S10: providing a dielectric layer on a base substrate and providing a source, a drain, and a gate of the thin film transistor on the dielectric layer, wherein a thickness of the dielectric layer ranges from 4.5 nm to 5.5 nm;

S11: providing and depositing carbon nanotubes in a first channel of the thin film transistor, wherein the first channel is disposed between the source and the drain;

S12: providing and depositing an ion gel in a second channel of the thin film transistor, wherein the second channel is disposed between the drain and the gate, and the ion gel is disposed in the second channel by ink jet printing, low speed spin coating or drop coating; and

S13: drying the ion gel to obtain the thin film transistor.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, a thickness of the gate ranges from 4.5 nm to 5.5 nm.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the carbon nanotube is provided in the first channel by printing.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the step S12further includes steps of:

S121: mixing polystyrene-polymethyl methacrylate, 1-ethyl-3-methylimidazoline bis (trifluoromethylsulfonyl) imine, ethyl acetate, and a dopant according to a mass ratio and stirring with a magnetic stir bar to obtain an ion gel solution.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the polystyrene-polymethyl methacrylate is present in a mass fraction ranging from 0.3 wt % to 0.7 wt %, the 1-ethyl-3-methylimidazoline bis (trifluoromethylsulfonyl) imine is present in a mass fraction ranging from 9.3 wt % to 9.7 wt %, and the dopant is present in a mass fraction of 90 wt %.

Furthermore, another embodiment of the disclosure provides a thin film transistor, including:

a base substrate;

a dielectric layer disposed on the base substrate; and

a semiconductor layer disposed on the dielectric layer;

wherein the semiconductor layer includes a source, a drain, and a gate, a first channel is provided between the source and the drain, carbon nanotubes are provided in the first channel, a second channel is provided between the drain and the gate, an ion gel is provided in the second channel, and the ion gel also covers the semiconductor layer.

In one embodiment of the thin film transistor of the disclosure, the dielectric layer includes hafnium oxide, the source and drain include gold.

In one embodiment of the thin film transistor of the disclosure, the ion gel includes a pre-stage copolymer, ethyl acetate and a dopant.

Furthermore, another embodiment of the disclosure provides a manufacturing method of a thin film transistor, including steps of:

S10: providing a dielectric layer on a base substrate and providing a source, a drain, and a gate of the thin film transistor on the dielectric layer;

S11: providing and depositing carbon nanotubes in a first channel of the thin film transistor, wherein the first channel is disposed between the source and the drain;

S12: providing and depositing an ion gel in a second channel of the thin film transistor, wherein the second channel is disposed between the drain and the gate; and

S13: drying the ion gel to obtain the thin film transistor.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, a thickness of the dielectric layer ranges from 4.5 nm to 5.5 nm and a thickness of the gate ranges from 4.5 nm to 5.5 nm.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the carbon nanotube is provided in the first channel by printing.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the ion gel is disposed in the second channel by ink jet printing, low speed spin coating or drop coating.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, a usage amount of the ion gel in the low speed spin coating ranges from 30 μL to 50 μL.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the step S12further includes steps of:

S121: mixing polystyrene-polymethyl methacrylate, 1-ethyl-3-methylimidazoline bis (trifluoromethylsulfonyl) imine, ethyl acetate, and a dopant according to a mass ratio and stirring with a magnetic stir bar to obtain an ion gel solution.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the polystyrene-polymethyl methacrylate is present in a mass fraction ranging from 0.3 wt % to 0.7 wt %, the 1-ethyl-3-methylimidazoline bis (trifluoromethylsulfonyl) imine is present in a mass fraction ranging from 9.3 wt % to 9.7 wt %, and the dopant is present in a mass fraction of 90 wt %.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the carbon nanotube is deposited by an aerosol printer or a drip coating process in the step S11.

In one embodiment of the disclosure, the manufacturing method of the thin film transistor further including steps of repeating two or three times of baking the carbon nanotube at 60° C. for 2 minutes, washing with toluene, and backing at 60° C. for 2 minutes again every time after printing or drop coating.

In one embodiment of the disclosure, the manufacturing method of the thin film transistor further including a step of drying the carbon nanotube after the carbon nanotube has been deposited.

In one embodiment of the manufacturing method of the thin film transistor of the disclosure, the source, the drain, and the gate are provided by one-step lithographic exposure and electron beam evaporation in the step S10.

In comparison with prior art, the thin film transistor and the manufacturing method of the same provide the ion gel as the gate layer of the thin film transistor, provide the carbon nanotube and gold source/drain electrodes in the semiconductor layer, provide the dopant in the ion gel to enhance ions flowing in the semiconductor layer and to effectively control the threshold voltage of the carbon nanotube thin film transistor by adjusting the composition and content of the ion gel gate layer.

