BACKGROUND OF THE INVENTION

The present invention relates to the field of electronic design automation for integrated circuits, and in particular, to analog design automation.

Integrated circuits are important building blocks of the information age and are critical to the information age, affecting every industry including financial, banking, legal, military, high technology, transportation, telephony, oil, medical, drug, food, agriculture, education, and many others. Integrated circuits such as DSPs, amplifiers, voltage converters, DRAMs, SRAMs, EPROMs, EEPROMs, Flash memories, microprocessors, ASICs, and programmable logic are used in many applications such as computers, networking, telecommunications, and consumer electronics.

Consumers continue to demand greater performance in their electronic products. For example, higher speed computers will provide higher speed graphics for multimedia applications or development. Higher speed internet web servers will lead to greater on-line commerce including on-line stock trading, book sales, auctions, and grocery shopping, just to name a few examples. Higher performance integrated circuits will improve the performance of the products in which they are incorporated.

Large modern day integrated circuits have millions of devices including gates and transistors and are very complex. As process technology improves, more and more devices may be fabricated on a single integrated circuit, so integrated circuits will continue to become even more complex with time. To meet the challenges of building more complex and higher performance integrated circuits, software tools are used. These tools are in an area commonly referred to as computer aided design (CAD), computer aided engineering (CAE), or electronic design automation (EDA). There is a constant need to improve these electronic automatic tools in order to address the desire to for higher integration and better performance in integrated circuits.

An integrated circuit may be specified using a netlist and a layout. The netlist provides information about devices or components of the integrated circuit and their connectivity. The integrated circuit layout or integrated circuit mask layout is the representation of an integrated circuit in terms of planar geometric shapes, patterns, and features that correspond to shapes used in a mask to fabricate the circuit. A design engineer or mask designer may create the layout the integrated circuit. Some features in the layout or certain masks may be automatically generated, such as automatic placement of elements and automatic routing of these elements.

Therefore, there is a need for improved tools for automated analog layout.

BRIEF SUMMARY OF THE INVENTION

An automated analog layout tool creates not just one, but many electrically correct layouts from an input schematic. Designers can explore multiple layout options in a fraction of the time needed to produce just a single layout by hand. Because the tool produces layout results so quickly, parasitics are available for simulation early in the design process, further speeding the entire design cycle. The tool considers place and route concurrently.

A specific implementation of an automated analog layout tool is Pulsic Animate™ by Pulsic Limited of the United Kingdom. See www.pulsic.com for more information, and all information available at this Web site is incorporated by reference. All white papers, data sheets, users guides, help screens, and other documentation, available online or in paper, for Pulsic Animate and other Pulsic products are incorporated by reference. All issued patents and published patent applications, provisional and nonprovisional, where Pulsic is an applicant or an assignee, are incorporated by reference along with all other reference cited in this application.

Some benefits of Pulsic Animate include: gets designers up to speed rapidly with minimal training and setup; reduces layout time from days or weeks to minutes; enables exploration of multiple architectures and extraction of realistic parasitics; creates manual-quality results in a fraction of the time; enables accurate simulation early in the design process; and uses native OpenAccess and PCells or PyCells.

Some features of Pulsic Animate include: easy-to-use GUI; automatic constraint recognition from schematics; unique PolyMorphic Layout technology generates multiple electrically correct layouts ranked by user-specified criteria; supports both CMOS digital (row-based) and CMOS analog (area-based) designs; and supports flat or hierarchical designs.

In an implementation, a method includes: importing a first schematic in a first format; creating a first netlist from the first schematic; storing the first netlist in a memory; using an electronic processor, automatically generating constraints for the netlist; creating a second netlist by flattening the first netlist; storing the second netlist in a memory; importing a layout in a second format; generating parameterized cells; and generating one or more placed and routed layouts to obtain a polymorphic layout.

In an implementation, a method includes: providing a graphical user interface having a first window and a second window; in the first window, displaying a first circuit schematic for a first circuit; in the second window, displaying a number of layouts for the first circuit in the first window; and providing a first layout of the layouts, where the first layout is rectangular and has an X length and Y width.

The method further provides a second layout of the layouts. The second layout is rectangular and has an X length and Y width. Relative to the first layout, structures and routing of the second layout are arranged in a mirror image of those for the first layout. The method can further provide a third layout of the layouts. The third layout is rectangular and comprises Y length and X width. The user can select one of the layouts for the first circuit (e.g., first, second, or third layouts) as a layout in an integrated circuit design including the first circuit

Other objects, features, and advantages of the present invention will become apparent upon consideration of the following detailed description and the accompanying drawings, in which like reference designations represent like features throughout the figures.

