CROSS-REFERENCE TO RELATED APPLICATION

This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2020-0114044, filed on Sep. 7, 2020, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.

BACKGROUND

Example embodiments of the inventive concepts relate to an electronic device. For example, at least some example embodiments relate to a phase locked loop configured to perform a two-point modulation operation and/or an electronic device including the phase locked loop.

A phase locked loop is a circuit that is generally used to adjust a frequency and/or a phase of an oscillator and may be used to lock a frequency and/or a phase of an oscillator to a reference frequency signal having an accurate frequency.

In some applications, the frequency and/or the phase of the oscillator may be modulated using the phase locked loop in response to a data signal. With the development of technology, a phase locked loop may support a two-point modulation technique to modulate a data signal having a wide bandwidth. The two-point modulation technique is for performing modulation of a data signal by using two modulation paths included in the phase locked loop. In the two modulation paths, frequency variations of data signals may have a mismatch that negatively affects the performance of the phase locked loop.

SUMMARY

Thus, to solve this problem, example embodiments are directed to a configuration and/or a method for searching for effective gains applied to a certain modulation path.

Example embodiments of the inventive concepts provide a phase locked loop configured to quickly generate, based on a differential value of a phase error signal, a gain for solving a mismatch between frequency variations of data signals in modulation paths through which the data signals are applied, and/or an electronic device including the phase locked loop.

According to an example embodiment of the inventive concepts, there is provided an electronic device including a phase locked loop configured to perform a two-point modulation operation on a data signal using first and second modulation paths by, generating a gain based on a differential value of a first phase error signal generated in the first modulation path, and adjusting a frequency variation of the data signal through the second modulation path to match the frequency variation of the data signal through the first modulation path.

According to another example embodiment of the inventive concepts, there is provided an electronic device a processor configured to, perform a two-point modulation operation on a data signal through first and second modulation paths of a digital phase locked loop by, generating a gain based on a differential value of a phase error signal generated in the first modulation path, and adjusting a frequency variation of the data signal through the second modulation path to match the frequency variation of the data signal through the first modulation path.

According to another example embodiment of the inventive concepts, there is provided an operation method including applying a data signal to a lowpass modulation path and a highpass modulation path of a phase locked loop; generating a differential value from a phase error signal generated in the lowpass modulation path; generating a gain for adjusting a frequency variation of the data signal through the highpass modulation path, based on the differential value; and performing a two-point modulation operation on the data signal through the lowpass modulation path and the highpass modulation path, based on the gain.

