BACKGROUND OF THE DISCLOSURE

Field of the Disclosure

Embodiments of the present disclosure generally relate to a target device for handling overlap write scenarios, such as a solid state drive (SSD).

Description of the Related Art

In order to increase write performance of a target device, such as a data storage device, the data storage device usually caches write data from a host device in a temporal buffer residing in either SRAM or DRAM before writing the data to non-volatile memory (NVM). The data storage device posts a completion message to the host even before writing the data to NVM.

When supporting write caching mechanisms, a cache coherency logic is implemented in data storage devices in order to avoid coherency issues. For instance, when a data storage device receives two write commands that have a logical block address (LBA) overlap between them, the cache coherency logic does not allow the data associated with the first command received to override the data associated with the second command. When a data storage device detects cache coherency issues, the cache coherency logic either breaks the data pipeline or stops receiving any new host commands until the coherency issues are resolved by flushing all write cache data to NVM before receiving any new write commands. Thus, current solutions to cache coherency issues adversely add extra complexity and degrade performance of the data storage device.

Therefore, there is a need for an improved data storage device.

SUMMARY OF THE DISCLOSURE

Embodiments of the present disclosure generally relate to a target device handling overlap write commands. In one embodiment, a target device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes a random accumulated buffer, a sequential accumulated buffer, and an overlap accumulated buffer. The controller is configured to receive a new write command, classify the new write command, and write data associated with the new write command to one of the random accumulated buffer, the sequential accumulated buffer, or the overlap accumulated buffer. Once the overlap accumulated buffer becomes available, the controller first flushes to the non-volatile memory the data in the random accumulated buffer and the sequential accumulated buffer that was received prior in sequence to the data in the overlap accumulated buffer. The controller then flushes the available overlap accumulated buffer, ensuring that new write commands override prior write commands.

In one embodiment, a data storage device comprises a non-volatile memory, and a controller coupled to the non-volatile memory. The controller comprises a random accumulated buffer, a sequential accumulated buffer, and an overlap accumulated buffer. The controller is configured to receive a new write command, classify the new write command, and write data associated with the new write command to one of the random accumulated buffer, the sequential accumulated buffer, or the overlap accumulated buffer based on the classification of the new write command.

In another embodiment, a storage system comprises a host device, and a data storage device coupled to the host device. The data storage device comprises a non-volatile memory, and a controller coupled to the non-volatile memory. The controller is configured to receive a new write command, push data associated to the new write command to one of a random stream, a sequential stream, or an overlap stream, and post a write command completion message to the host after the data associated with the new write command is pushed to one of the random stream, the sequential stream, or the overlap stream.

In one embodiment, a method of handling write overlap data streams comprises receiving data to a controller in a sequence, detecting a cache collision of the data, and classifying the data as overlap data, random data, or sequential data. The method further comprises writing random data to a random buffer, writing sequential data to a sequential buffer, and writing overlap data to an overlap buffer, and emptying the overlap data buffer. Emptying the overlap data buffer comprises flushing the random data and the sequential data that were received prior to the overlap data in the sequence to a non-volatile memory, and flushing the overlap data to the non-volatile memory.

In another embodiment, a method comprises detecting a first accumulated buffer of a controller is available to empty to a non-volatile memory, determining the first accumulated buffer is associated with an overlap stream, and delaying the emptying of the first accumulated buffer to the non-volatile memory. The method further comprises flushing a second accumulated buffer associated with a random stream, flushing a third accumulated buffer associated with a sequential stream, and emptying the first accumulated buffer to the non-volatile memory.

In another embodiment, a data storage device comprises a non-volatile memory, means for detecting a cache collision, and means for ensuring that new write commands override prior write commands. The means for ensuring that new write commands override prior write commands comprises a random accumulated buffer, a sequential accumulated buffer, and an overlap accumulated buffer.

