CROSS REFERENCE TO RELATED APPLICATIONS

This application is a U.S. National Stage Application under 35 U.S.C. § 371 of International Patent Application No. PCT/CN2019/089295, filed May 30, 2019, which claims priority to Chinese patent application No. 201810558748.1 filed on Jun. 1, 2018, both of which are incorporated herein by reference in their entireties as part of the present application.

TECHNICAL FIELD

Embodiments of the present disclosure relate to a thin film transistor and a fabrication method thereof, an array substrate comprising the thin film transistor and a fabrication method thereof.

BACKGROUND

At present, an organic light-emitting diode (OLED) array substrate is generally not shielded from light or uses a metallic light shield at its rear side. However, the metallic light shield can only shield light incident from rear side of the array substrate, but cannot shield light incident from a lateral side of the array substrate. Moreover, the incident light is reflected multiple times between respective layers on a base substrate, and is easily incident into a channel of an active layer from a side surface of the active layer, thus affecting performance of a thin film transistor.

SUMMARY

Embodiments of the present disclosure relate to a thin film transistor and a fabrication method thereof, an array substrate comprising the thin film transistor and a fabrication method thereof.

In first aspect of the present disclosure, it is provided a thin film transistor. The thin film transistor comprises: a base substrate; a gate electrode, an active layer, a source electrode and a drain electrode on the base substrate; and a light-shielding portion between the active layer and the base substrate, the light-shielding portion comprising a groove, and the active layer being in the groove.

In at least some embodiments, a side wall of the groove is on a periphery of the active layer.

In at least some embodiments, the light-shielding portion comprises a spacer layer and a light-shielding layer on the spacer layer, and the groove is in the light-shielding layer.

In at least some embodiments, the spacer layer is configured to define an opening, and the light-shielding layer at least overlays a bottom portion and a side wall of the opening.

In at least some embodiments, the spacer layer and the light-shielding layer are made of a same material and integrally formed.

In at least some embodiments, a distance between a topmost surface of the light-shielding portion that is away from the base substrate and the base substrate is greater than or equal to a distance between a surface of the active layer that is away from the base substrate and the base substrate.

In second aspect of the present disclosure, it is provided a fabrication method of a thin film transistor. The fabrication method comprises: providing a base substrate; forming a gate electrode, an active layer, a source electrode and a drain electrode on the base substrate; forming a light-shielding portion between the active layer and the base substrate, the light-shielding portion comprising a groove, and the active layer being formed in the groove.

In at least some embodiments, the forming a light-shielding portion between the active layer and the base substrate comprises: forming a light-shielding thin film; and patterning the light-shielding thin film to form the light-shielding portion comprising the groove, a side wall of the groove being on a periphery of the active layer.

In at least some embodiments, the forming a light-shielding portion between the active layer and the base substrate comprises: forming a spacer layer that defines an opening on the base substrate; and forming a light-shielding layer on the spacer layer, the groove being formed in the light-shielding layer; the light-shielding layer overlays at least a bottom portion and a side wall of the opening, and the side wall of the opening is on the periphery of the active layer.

In third aspect of the present disclosure, it is provided an array substrate, which comprises the afore-mentioned thin film transistor.

In at least some embodiments, the array substrate further comprises: a plurality of gate lines and a plurality of data lines on the base substrate, wherein the plurality of gate lines and the plurality of data lines intersect with each other to define a plurality of sub-areas, and the plurality of sub-areas comprise at least one pixel area provided with the thin film transistor; the thin film transistor comprises a first thin film transistor and a second thin film transistor, the first thin film transistor comprises a first active layer and a common light-shielding portion located between the first active layer and the base substrate, the common light-shielding portion comprises a common groove; the second thin film transistor comprises a second active layer; the common light-shielding portion extends between the second active layer and the base substrate, such that the first active layer and the second active layer are both in the common groove.

In at least some embodiments, a side wall of the common groove is on a periphery of both the first active layer and the second active layer.

In at least some embodiments, the at least one pixel area is further provided with an organic light-emitting diode component; the organic light-emitting diode component comprises a first electrode, a second electrode, and a pixel defining layer between the first electrode and the second electrode; and the pixel defining layer is configured to separate adjacent two organic light-emitting diode components; the side wall of the common groove is in an area corresponding to the pixel defining layer, such that an orthographic projection of the common light-shielding portion on the base substrate at least partially overlaps an orthographic projection of the pixel defining layer on the base substrate.

In at least some embodiments, the common light-shielding portion comprises a common spacer layer and a common light-shielding layer on the common spacer layer; the common groove is formed in the common light-shielding layer; an orthographic projection of the common spacer layer on the base substrate is located in the orthographic projection of the pixel defining layer on the base substrate.

In at least some embodiments, the plurality of sub-areas further comprise at least one non-pixel area, and the at least one non-pixel area is provided only with a buffer layer.

In third aspect of the present disclosure, it is provided a fabrication method of an array substrate, the fabrication method comprises: forming a plurality of gate lines and a plurality of data lines on a base substrate, wherein the plurality of gate lines and the plurality of data lines intersect with each other to define a plurality of sub-areas, and the plurality of sub-areas comprise at least one pixel area and at least one non-pixel area; and forming a first thin film transistor and a second thin film transistor in the at least one pixel area, wherein the first thin film transistor comprises a first active layer and a common light-shielding portion between the first active layer and the base substrate, the common light-shielding portion comprises a common groove, and wherein the second thin film transistor comprises a second active layer, the common light-shielding portion extends between the second active layer and the base substrate, such that the first active layer and the second active layer are both in the common groove.

In at least some embodiments, the fabrication method further comprises: forming an organic light-emitting diode component in the at least one pixel area, wherein the organic light-emitting diode component comprises a first electrode, a second electrode, and a pixel defining layer located between the first electrode and the second electrode, and the pixel defining layer is configured to separate adjacent two organic light-emitting diode components, and wherein a side wall of the common groove is in an area corresponding to the pixel defining layer, such that an orthographic projection of the common light-shielding portion on the base substrate at least partially overlaps an orthographic projection of the pixel defining layer on the base substrate.

In at least some embodiments, the forming the common light-shielding portion comprises: forming a common spacer layer on the base substrate, an orthographic projection of the common spacer layer on the base substrate being in the orthographic projection of the pixel defining layer on the base substrate; forming a common light-shielding layer on the common spacer layer; and forming a common groove in the common light-shielding layer.

In at least some embodiments, after the forming the common light-shielding portion, the fabrication method further comprises: forming a buffer layer simultaneously in the at least one pixel area and the at least one non-pixel area, wherein the first thin film transistor, the second thin film transistor and the organic light-emitting diode component are formed on the buffer layer of the at least one pixel area, and only the buffer layer is reserved in the non-pixel area.

