BACKGROUND

Technical Field

The present invention relates to a semiconductor technology, and more particularly, to a semiconductor device having a contact with a specific structure and a manufacturing method thereof.

Description of Related Art

With the miniaturization of the new generation semiconductor process, the sizes of the various components of semiconductor devices will be relatively reduced. For example, the size of the contacts of semiconductor devices is reduced, and the distance between the contacts also is reduced. Therefore, in order to break through the limitation of the light source resolution in the lithography process, a self-alignment double patterning (SADP) process currently is used to reduce the size of the contact.

However, for the traditional lithography and etching process and the above-mentioned SADP process, the contact area between the contact and the substrate or other components may be reduced due to the alignment error caused by the initial lithography process, thereby affecting performance of the device.

SUMMARY

The present invention provides a semiconductor device and a method for manufacturing the same. The semiconductor device has a contact with a specific structure, such that the contact area between the contact and the active region can be increased, thereby improving the electrical properties of the device.

The semiconductor device of the present invention includes a substrate having a plurality of active regions, at least one dielectric layer, and a plurality of contacts. The dielectric layer is formed on the substrate, and the contacts are located in the dielectric layer and connected to the active regions. Each contact is a barrel-shaped structure with a middle portion, a head portion having a perimeter smaller than that of the middle portion, and an end portion having a perimeter smaller than that of the middle portion.

Another method for manufacturing a semiconductor device of the present invention includes the following steps. A plurality of active regions are defined in a substrate. At least one dielectric layer is formed on the substrate. A plurality of openings are formed in the dielectric layer to expose the active regions. A first oxygen plasma and a first fluorine plasma are introduced to remove by-products in the openings and oxidize the inner surfaces of the openings. A second oxygen plasma and a second fluorine plasma are introduced to remove the oxidized inner surfaces for enlarging the openings and to repair the active regions. A third oxygen plasma is introduced to oxidize the inner surfaces of the enlarged openings to form an oxide layer. The oxide layer is removed to form a plurality of contact holes, wherein the cross-section structure of two adjacent contact holes includes a capital, a base, and a shaft between the capital and the base, and the width of the shaft is smaller than the width of the base, and the width of the shaft is also smaller than the width of the capital. A conductive material is deposited on the substrate and fills the contact holes. The conductive material is then planarized to form a plurality of contacts in the contact holes.

Based on the above, the method of the present invention can form a plurality of contacts each with a specific structure, each contact with a specific structure is slightly barrel-shaped, and the distance between two adjacent contacts each with a specific structure is smaller than the distance between two adjacent conventional contacts generally formed by a lithography and etching process or a SADP process, which means that the contact area between each contact with a specific structure and the substrate is larger. Accordingly, the electrical properties of the device can be improved. In addition, even if there is a bit of the alignment error between the contact and the active region, it does not affect the electrical connection.

In order to make the aforementioned features and advantages of the disclosure more comprehensible, embodiments accompanied with figures are described in detail below.

