CROSS-REFERENCE TO RELATED APPLICATION

This application is a 371 application of the International PCT application serial no. PCT/JP2017/035419, filed on Sep. 29, 2017, which claims the priority benefit of Japan Patent Application No. 2016-198434, filed on Oct. 6, 2016. The entirety of each of the abovementioned patent applications is hereby incorporated by reference herein and made a part of this specification.

TECHNICAL FIELD

The present invention relates to a mounting device for laminating and mounting two or more semiconductor chips in a plurality of locations on a substrate, and a manufacturing method for manufacturing a semiconductor device.

BACKGROUND ART

In the related art, there is demand for higher functionality and miniaturization in semiconductor devices. In some cases, a method of laminating and mounting a plurality of semiconductor chips has been proposed. Generally, a bump and a non-conductive film (which will hereinafter be referred to as “an NCF”) covering the bump are provided on one surface of a semiconductor chip. The NCF includes a thermosetting resin, which is reversibly softened in accordance with a temperature rise to a temperature lower than a predetermined curing start temperature but is irreversibly cured in accordance with a temperature rise if the temperature exceeds the curing start temperature. In order to laminate and mount these semiconductor chips, a method of forming a temporary laminate by laminating a plurality of semiconductor chips while performing temporary crimping, and performing permanent crimping by heating and crimping this temporary laminate thereafter has been proposed. Hereinafter, a laminate after being subjected to permanent crimping will be referred to as “a chip laminate”, thereby being distinguished from a temporary laminate subjected to only temporary crimping. In temporary crimping, semiconductor chips are heated and crimped at a temperature at which NCFs are softened. In addition, in permanent crimping, a temporary laminate is heated and crimped at a temperature at which bumps in all of the plurality of semiconductor chips constituting the temporary laminate melt and the NCFs are cured.

For example, Patent Literature 1 discloses such a laminating technology. In Patent Literature 1, a thermosetting adhesive film is laminated on a surface of a semiconductor chip on which bumps have been formed in advance. During lamination and mounting, first, a multistage temporarily crimped laminate body (temporary laminate) is formed by sequentially laminating a plurality of semiconductor chips on a substrate or another semiconductor chip while performing temporary crimping. Next, a permanent crimping step of melting the bumps and curing the thermosetting adhesive films is executed by crimping and heating this multistage temporarily crimped laminate body from above. According to such a technology, more semiconductor chips can be mounted in a smaller area. Therefore, higher functionality and miniaturization can be achieved.

CITATION LIST

Patent Literature

[Patent Literature 1]Japanese Unexamined Patent Application Publication No. 2014-60241

SUMMARY OF INVENTION

Technical Problem

Here, as a matter of course, in order to realize higher functionality and miniaturization, the number of lamination layers (which will hereinafter be referred to as “a target number of layers”) of semiconductor chips may be increased. However, in a case of a technology of collectively performing permanent crimping of a plurality of semiconductor chips constituting a temporary laminate by heating and crimping an upper surface of the temporary laminate, if the target number of layers increases, a temperature difference dT between an upper layer and a lower layer is increased in accordance therewith. This temperature difference dT may cause a fluctuation in distance between chips. In addition, an excessively significant temperature difference dT may result in a problem that a semiconductor chip in the lower layer is not sufficiently heated so that a bump does not sufficiently melt, or an NCF is not sufficiently cured.

This problem can be ameliorated to some degree by heating a temporary laminate from below, that is, heating a stage on which a substrate is placed. However, in this case, laminates other than a laminate to be actually subjected to permanent crimping are also heated. At this time, when laminates other than a laminate to be actually subjected to permanent crimping are temporary laminates before being subjected to permanent crimping, there is concern of causing irreversible curing or the like of an NCF due to heat from the stage. In other words, heating a stage to a high temperature in order to reduce the temperature difference dT occurring during permanent crimping is not realistic.

An object of the present invention is to provide a mounting device, which can appropriately mount a plurality of semiconductor chips even if there are many layers to be laminated, and a method for manufacturing a semiconductor device.

Solution to Problem

According to an aspect of the present invention, there is provided a mounting device for laminating and mounting two or more semiconductor chips in a plurality of locations on a substrate. The mounting device includes a stage that supports the substrate; a bonding part that laminates and mounts a plurality of semiconductor chips on the substrate while heating the plurality of semiconductor chips and the substrate; and a heat insulating member that is interposed between the stage and the substrate and has a first layer which is in contact with the substrate and to which heat is applied from the bonding part via the semiconductor chips and the substrate, and a second layer which is disposed closer to the stage side than the first layer. The first layer has greater heat resistance than the second layer.

In a preferable aspect, the second layer may have higher rigidity than the first layer. In a preferable aspect, the first layer may have greater heat resistance in a surface direction than the second layer.

In a preferable aspect, the bonding part may repeat processing of collectively performing permanent crimping of the plurality of chips constituting a temporary laminate twice or more by heating the temporary laminate while crimping an upper surface of at least one temporary laminate after forming two or more temporary laminates in which the plurality of chips are laminated on the substrate while being subjected to temporary crimping.

In a preferable aspect, the first layer may include an organic substance or a workpiece in which a groove is formed on a surface on the substrate side or a plurality of pores are formed within the layer. The second layer may include a non-metal inorganic material. In this case, it is desirable that the first layer be a workpiece in which a latticed groove is formed on the surface on the substrate side at the same pitch as a disposition pitch of a chip laminate in which the plurality of chips are laminated.

According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device including a temporary crimping step of forming two or more temporary laminates in which a plurality of chips are laminated while being subjected to temporary crimping by a bonding part on a substrate disposed on a heat insulating member, and a permanent crimping step of repeating processing of collectively performing permanent crimping of the plurality of chips constituting the temporary laminate twice or more by heating the temporary laminate while the bonding part crimps an upper surface of at least one temporary laminate. The heat insulating member has a first layer which is in contact with the substrate and to which heat is applied from the bonding part via the semiconductor chips and the substrate, and a second layer which is disposed closer to the stage side than the first layer. The first layer has greater heat resistance than the second layer.

Advantageous Effects of Invention

According to the present invention, the heat insulating member is provided between the substrate and the stage. Moreover, the first layer of the heat insulating member in contact with the substrate has greater heat resistance than the second layer. Therefore, heat during permanent crimping is less likely to escape to the outside. As a result, it is possible to reduce the temperature difference between an upper layer and a lower layer of a chip laminate in which semiconductor chips are laminated, and it is possible to appropriately mount a plurality of semiconductor chips even if there are many layers to be laminated.

