TECHNICAL FIELD

A technical field of the disclosed invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method of the semiconductor device. Note that semiconductor devices herein refer to general elements and devices which function by utilizing semiconductor characteristics.

BACKGROUND ART

A field-effect transistor is one of the most widely-used semiconductor elements. A variety of materials are used for field-effect transistors according to their uses. In particular, semiconductor materials including silicon are frequently used.

A field-effect transistor including silicon has characteristics satisfying the needs for a variety of uses. For example, single crystal silicon is used for an integrated circuit or the like which needs to be operated at a high speed, whereby the need is satisfied. Further, amorphous silicon is used for an object which needs to have a large area, such as a display device, whereby the need can be satisfied.

As described above, silicon is highly versatile and can be used for various purposes. However, in recent years, semiconductor materials have come to be expected to have higher performance as well as versatility. For example, in terms of improving performance of a large-area display device, in order to realize high-speed operation of a switching element, a semiconductor material which facilitates the increase in area of a display device and shows higher performance than amorphous silicon is needed.

Under such conditions, a technique for a field-effect transistor (also called an FET) including an oxide semiconductor has attracted attention. For example, Patent Document 1 discloses a transparent thin film field-effect transistor including a homologous compound InMO3(ZnO)m(m is In, Fe, Ga, or Al, and m is an integer greater than or equal to 1 and less than 50).

In addition, Patent Document 2 discloses a field-effect transistor in which an amorphous oxide semiconductor which contains In, Ga, and Zn and has an electron carrier density less than 1018/cm3is used. Note that in this patent document, the ratio of In atoms to Ga atoms and Zn atoms in the amorphous oxide semiconductor is 1:1:m (m<6).

Further, Patent Document 3 discloses a field-effect transistor in which an amorphous oxide semiconductor including a microcrystal is used for an active layer.

REFERENCE

[Patent Document 1] Japanese Published Patent Application No. 2004-103957

[Patent Document 2] PCT International Publication No. 05/088726

[Patent Document 3] Japanese Published Patent Application No. 2006-165529

DISCLOSURE OF INVENTION

Patent Document 3 discloses that a composition in a crystal state is InGaO3(ZnO)m(m is an integer less than 6). Further, Patent Document 3 discloses in Example 1 a case of InGaO3(ZnO)4. However, adequate characteristics have not been obtained in fact even when such oxide semiconductors are used.

In view of the above-described problems, it is an object to provide a semiconductor device having a novel structure in which an oxide semiconductor layer having a novel structure is used.

In an embodiment of the disclosed invention, a semiconductor device is formed using an oxide semiconductor layer which is purified and includes a crystalline region. The crystalline region is, for example, a region having electrical anisotropy or a region which prevents entry of an impurity.

The following structures can be employed, for example.

An embodiment of the disclosed invention is a semiconductor device which includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer. Note that in this specification and the like, “substantially perpendicular” means being within ±10° from a perpendicular direction.

Another embodiment of the disclosed invention is a semiconductor device which includes a first gate electrode layer over an insulating surface, a first gate insulating layer covering the first gate electrode layer, an oxide semiconductor layer including a crystalline region over the first gate insulating layer, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a second gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a second gate electrode layer over the second gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

In addition, an insulating layer having a substantially same shape as the source electrode layer and the drain electrode layer may be provided over the source electrode layer and the drain electrode layer. Note that in this specification and the like, the expression “substantially the same” or “substantially same” does not necessarily mean being exactly the same in a strict sense and can mean being considered as the same. For example, a difference made by a single etching process is acceptable. Further, the thickness does not need to be the same.

In addition, a portion of the source electrode layer and the drain electrode layer in contact with the oxide semiconductor layer may include a material having low oxygen affinity.

A region other than the crystalline region in the oxide semiconductor layer (e.g., a region other than a channel formation region) may have an amorphous structure.

The difference in height of the surface of the oxide semiconductor layer may be 1 nm or less in the region overlapping with the gate electrode layer.

Another embodiment of the disclosed invention is a manufacturing method of a semiconductor device, which includes the steps of: forming an oxide semiconductor layer over an insulating surface; forming a conductive layer over the oxide semiconductor layer; forming a source electrode layer and a drain electrode layer by etching the conductive layer; forming a crystalline region having c-axis aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer, by performing heat treatment; forming a gate insulating layer so as to cover the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and forming a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region.

Another embodiment of the disclosed invention is a manufacturing method of a semiconductor device, which includes the steps of: forming a first gate electrode layer over an insulating surface; forming a first gate insulating layer so as to cover the first gate electrode layer; forming an oxide semiconductor layer over the first gate insulating layer; forming a conductive layer over the oxide semiconductor layer; forming a source electrode layer and a drain electrode layer by etching the conductive layer; forming a crystalline region having c-axis aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer, by performing heat treatment; forming a second gate insulating layer so as to cover the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and forming a second gate electrode layer over the second gate insulating layer in a region overlapping with the crystalline region.

In the above embodiment, the heat treatment may be performed at a temperature higher than or equal to 550° C. and lower than or equal to 850° C., preferably higher than or equal to 550° C. and lower than or equal to 750° C. When the conductive layer is etched, a part of the oxide semiconductor layer may be removed. An insulating layer having a substantially same shape as the source electrode layer and the drain electrode layer may be formed over the source electrode layer and the drain electrode layer.

A portion of the source electrode layer and the drain electrode layer in contact with the oxide semiconductor layer may be formed using a material having low oxygen affinity.

An oxide semiconductor layer having an amorphous structure may be formed as the oxide semiconductor layer, and the amorphous structure may remain in a region other than the crystalline region (e.g., a region other than a channel formation region).

Note that the term such as “over” or “below” in this specification and the like does not necessarily mean that a component is placed “directly on” or “directly under” another component. For example, the expression “a gate electrode layer over a gate insulating layer” does not exclude the case where a component is placed between the gate insulating layer and the gate electrode layer. Moreover, the terms such as “over” and “below” are used only for convenience of description and can include the case where the vertical relation of components is reversed, unless otherwise specified

In addition, the term such as “electrode” or “wiring” in this specification and the like does not limit a function of a component. For example, an “electrode” can be used as part of a “wiring”, and the “wiring” can be used as part of the “electrode”. Furthermore, the term “electrode” or “wiring” can include the case where a plurality of “electrodes” or “wirings” is formed in an integrated manner.

Functions of a “source” and a “drain” are sometimes interchanged with each other when a transistor of opposite polarity is used or when the direction of current flowing is changed in circuit operation, for example. Therefore, the terms “source” and “drain” can be used to denote the drain and the source, respectively, in this specification.

Note that the term “electrically connected” in this specification and the like includes the case where components are connected through an “object having any electric function”. There is no particular limitation on an object having any electric function as long as electric signals can be transmitted and received between components that are connected through the object.

Examples of an “object having any electric function” are a switching element such as a transistor, a resistor, an inductor, a capacitor, and an element with a variety of functions as well as an electrode and a wiring.

In an embodiment of the disclosed invention, a purified oxide semiconductor layer is used for a semiconductor device. The purification means at least one of removing hydrogen, which causes an oxide semiconductor to change to an n-type oxide semiconductor, from the oxide semiconductor layer as much as possible and reducing defects, which are caused by oxygen deficiency in the oxide semiconductor layer, by supply of oxygen that the oxide semiconductor layer lacks.

The purification is conducted in order to obtain an intrinsic (i-type) oxide semiconductor layer. Since an oxide semiconductor generally has n-type conductivity, the off-state current is high. When the off-state current is high, switching characteristics are insufficient, which is not appropriate for semiconductor devices. Therefore, an oxide semiconductor layer is purified to change to an i-type or substantially i-type oxide semiconductor layer.

In an embodiment of the disclosed invention, an oxide semiconductor layer including a crystalline region is used in a semiconductor device.

Electrical characteristics are different between an oxide semiconductor layer including a crystalline region having electrical anisotropy and an oxide semiconductor layer without a crystalline region. For example, in an oxide semiconductor layer including a crystalline region having c-axis aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer, conductivity in a direction parallel to the surface of the oxide semiconductor layer is increased and an insulating property in a direction perpendicular to the surface of the oxide semiconductor layer is increased.

Thus, when the oxide semiconductor layer including a crystalline region is used for a semiconductor device, the semiconductor device can have excellent electrical characteristics.

