CROSS-REFERENCE TO RELATED APPLICATION(S)

This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2017-0157472, filed on Nov. 23, 2017, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.

BACKGROUND

1. Field

The present disclosure relates generally to a connector of an electronic device that is capable of controlling an abnormal voltage that may be introduced during data reception from an external electronic device connected via the connector.

2. Description of Related Art

Various types of portable electronic devices have been developed for users to access a wide range of content. An electronic device has an interface (e.g., a connector) for connection with an external device, can be connected to various external devices through the interface, and can provide extended functions via a connection with an external device. The electronic device may include different types of connectors according to various interfaces.

A universal serial bus (USB) connector may provide an input/output standard for connecting various peripheral devices. The USB standard may include, for example, USB1.0/USB1.1, USB2.0, or USB3.0/3.1, along with USB3.0/USB3.1 that supports a super speed data transfer rate of 5 Gbits/s, and has a full-duplex mode, enabling two-way communication using separate channels for transmission and reception. A transmission channel and a reception channel may use differential signal transmission, and may include a positive pin and a negative pin to transfer a differential signal.

A USB connector includes data transmission and reception pins (e.g., USB 2.0 D+ pin, USB 3.1 TX pin, and USB 3.1 RX pin) for data communication, and a power supply pin (e.g., a USB cable charging power (VBUS) pin) for supplying power from a host device to an attached electronic device. A mechanical breakage of the USB connector or foreign substances deposited in the connector may cause a fault in which a VBUSpower source is connected to the data transmission and reception pins.

In this case, a power voltage of 20 V or higher may be applied through the VBUSpin to other pins, and the risk of the power voltage applied to the VBUSpin leaking to the data transmission and reception pins may occur due to the structure of the USB connector, wherein the data transmission and reception pins and the VBUSpin are disposed adjacent to each other.

In addition, undesired voltage (e.g., surge voltage caused by electrostatic discharge (ESD)) may be introduced into the data transmission and reception pins of the USB connector. In particular, since USB3.1 transmission and reception channels use a high-speed signal of 5 Gbps (or 2.5 GHz) for data transmission and reception, it may be difficult to apply a protection device for protecting an internal circuit or to apply an additional over-voltage protection (OVP) circuit.

SUMMARY

According to an aspect of the present disclosure, a connector (or an electronic device including the connector) may be provided that is connected to a capacitor or that is connected to various abnormal voltage cutoff circuits including the capacitor. The capacitor is capable of blocking abnormal voltage (e.g., surge voltage or leakage voltage) or an electric current that may be introduced into data transmission and reception pins among a plurality of pins of the connector.

In accordance with an aspect of the present disclosure, an electronic device includes a power regulator; a processor; a connector including first power pins that electrically connect an external electronic device with the power regulator, and first data reception pins that are disposed adjacent to at least some of the first power pins and electrically connect second data transmission pins of a connector of the external electronic device with data reception terminals of the processor; and one or more first receiver capacitors that are electrically connected to the first data reception pins and to the processor in order to block power from leaking into the first data reception pins from the at least some of the first power pins.

In accordance with an aspect of the present disclosure, an electronic device includes a processor; a universal serial bus (USB) connector including a transmission pin that electrically connects a reception pin of an external electronic device to a data transmission terminal of the processor, and a reception pin that electrically connects a transmission pin of the external electronic device to a data reception terminal of the processor; a first receiver capacitor that blocks power from the reception pin of the USB connector; and a first transmitter capacitor that blocks power from the transmission pin of the USB connector. The processor is configured to detect whether the external electronic device is connected or disconnected based on a time constant determined by the first transmitter capacitor, a second receiver capacitor connected to the reception pin of the external electronic device, and a resistor connected to the reception pin of the external electronic device and to a ground of the external electronic device.

In accordance with an aspect of the present disclosure, an electronic device includes: a processor; a universal serial bus (USB) connector including a reception pin that electrically connects a transmission pin of an external electronic device to a data reception terminal of the processor; and a first capacitor electrically connected to the reception pin and to the processor in order to block power from the reception pin of the USB connector.

