CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority under 35 U.S.C. § 119(a) to Korean patent application number 10-2020-0044185, filed on Apr. 10, 2020, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference.

BACKGROUND

1. Technical Field

Various embodiments of the present disclosure relate to an electronic device, and more particularly, to a semiconductor memory device and a method of operating the semiconductor memory device.

2. Related Art

Recently, the paradigm for the computer environment has been converted into ubiquitous computing so that computer systems can be used anytime and anywhere. Thereby, the use of portable electronic devices such as mobile phones, digital cameras, and notebook computers has rapidly increased. In general, such portable electronic devices use a memory system which employs a semiconductor memory device, in other words, use a data storage device. The data storage device is used as a main memory device or an auxiliary memory device of the portable electronic devices.

A data storage device using a semiconductor memory device provides advantages in that, since there is no mechanical driving component, stability and durability are excellent, an information access speed is increased, and power consumption is reduced. Examples of a data storage device proposed as the memory system having such advantages may include a universal serial bus (USB) memory device, a memory card having various interfaces, and a solid state drive (SSD).

Semiconductor memory devices are classified into a volatile memory device and a nonvolatile memory device.

Although read and write speeds are comparatively low, the nonvolatile memory device can retain data stored therein even when power supply is interrupted. Therefore, the nonvolatile memory device is used when there is the need for storing data which must be maintained regardless of supply of power. Representative examples of the nonvolatile memory device include a read-only memory (ROM), a mask ROM (MROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a flash memory, a phase-change random access memory (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), a ferroelectric RAM (FRAM), etc. The flash memory is classified into a NOR type memory and a NAND type memory.

SUMMARY

An embodiment of the present disclosure may provide for a semiconductor memory device including: a memory cell array including a plurality of word lines; a peripheral circuit coupled to the memory cell array through the plurality of word lines and configured to apply a program voltage to a selected word line of the plurality of word lines during a program operation and apply a pass voltage to unselected word lines of the plurality of word lines; and control logic configured to control the peripheral circuit to apply a first pass voltage to word lines adjacent to the selected word line among the unselected word lines during a first program operation of the program operation and apply a second pass voltage to the word lines adjacent to the selected word line during a second program operation of the program operation.

An embodiment of the present disclosure may provide for a semiconductor memory device including: a memory cell array including a plurality of word lines; a peripheral circuit coupled to the memory cell array through the plurality of word lines and configured to apply a program voltage to a selected word line of the plurality of word lines during a program operation and apply a pass voltage to unselected word lines of the plurality of word lines; and control logic configured to control the peripheral circuit to perform a program voltage application operation of applying the program voltage and the pass voltage to the plurality of word lines for a first time during a first program operation of the program operation and perform the program voltage application operation for a second time during a second program operation of the program operation.

An embodiment of the present disclosure may provide for a semiconductor memory device including: a memory cell array including a plurality of word lines; a peripheral circuit coupled to the memory cell array through the plurality of word lines and configured to apply a program voltage to a selected word line of the plurality of word lines during a program operation and apply a pass voltage to unselected word lines of the plurality of word lines; and control logic configured to control the peripheral circuit to apply a first pass voltage to word lines adjacent to the selected word line among the unselected word lines in a preset number of program loops during the program operation and apply a second pass voltage to the word lines adjacent to the selected word line in remaining program loops other than the preset number of program loops.

An embodiment of the present disclosure may provide for a method of operating a semiconductor memory device, including: performing a first program operation by applying a program voltage to a selected word line and applying a first pass voltage to word lines adjacent to the selected word line; and performing a second program operation by applying the program voltage to the selected word line and applying a second pass voltage less than the first pass voltage to the word lines adjacent to the selected word line.

