CROSS-REFERENCE TO RELATED APPLICATION

This U.S. nonprovisional application claims priority under 35 U.S.C § 119 to Korean Patent Application No. 10-2019-0081342 filed on Jul. 5, 2019 in the Korean Intellectual Property Office, the entire contents of which are hereby incorporated by reference.

BACKGROUND

Various example embodiments of the inventive concepts described herein relate to semiconductor packages including through holes and methods of fabricating the same.

There is demand for light, small, fast, multifunctional, excellently performing, and highly reliable products in the electronic industry such as mobile phones and laptop computers. Research has continuously been conducted on semiconductor package technology as one solution to satisfy these demands. Two-dimensional connections between integrated circuits using conventional wire bonding may have certain disadvantages, such as signal loss, high power consumption, and design constraints on bonding wires. Three-dimensional integrated circuit package technologies that vertically connect stacked semiconductor chips may overcome some such disadvantages. In some three-dimensional integrated circuit package technologies, a through silicon via (TSV) is employed to vertically connect semiconductor chips. The three-dimensional integrated circuit package technology using the through silicon via (TSV) may achieve highly-integrated circuits on the same space and yield shorter circuit-to-circuit connections. It is desired to improve reliability and electrical characteristics of semiconductor packages that are fabricated by the three-dimensional integrated package technology using the through silicon via.

SUMMARY

Some example embodiments of the present inventive concepts provide semiconductor packages with improved reliability.

Some embodiments of inventive concepts provide methods of fabricating semiconductor packages with improved reliability.

According to some example embodiments of the present inventive concepts, a semiconductor package may comprise: a first wiring layer; a first semiconductor substrate on the first wiring layer; a first dielectric layer on the first semiconductor substrate; a landing pad in the first wiring layer; a through hole that penetrates the first semiconductor substrate, the first dielectric layer, and the first wiring layer, the through hole exposing the landing pad the through hole may be include a first hole and a second hole on a bottom end of the first hole, the second hole having a maximum diameter may be less than a minimum diameter of the first hole; and a mask layer on an upper lateral surface of the through hole. According to some example embodiments of the present inventive concepts, a semiconductor package may comprise: a first wiring layer; a first semiconductor substrate on the first wiring layer; a first dielectric layer on the first semiconductor substrate; a landing pad in the first wiring layer; a through hole that penetrates the first semiconductor substrate, the first dielectric layer, and the first wiring layer, the through hole exposing the landing pad the through hole may include a first hole and a second hole on a bottom end of the first hole, the second hole having a maximum diameter may be less than a minimum diameter of the first hole; a mask layer on an upper lateral surface of the through hole, a through electrode in the through hole; an external connection pad on the through electrode; and a die electrically connected to the first wiring layer.

According to some example embodiments of the present inventive concepts, a method of fabricating a semiconductor package may comprise: forming a first hole in a semiconductor substrate and in a first dielectric layer on the semiconductor substrate; forming a mask pattern on an upper lateral surface of the first hole; and forming a second hole in a first wiring layer on a bottom surface of the semiconductor substrate, the second hole vertically overlapping the first hole. The second hole may expose a landing pad in the first wiring layer. A diameter of the second hole may be less than a diameter of the first hole.

