FIELD

The disclosed technology generally relates to an operational amplifier.

BACKGROUND

Settling time reduction may be one issue with an operational amplifiers. A reduced settling time of the operational amplifier may enhance the operation speed, and therefore an operational amplifier may be designed to reduce the settling time.

SUMMARY

This summary is provided to introduce in a simplified form a selection of concepts that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

In one or more embodiments, an operational amplifier is provided. The operational amplifier includes a first transistor, a second transistor, a third transistor, a first constant current source, an output stage, a first switch, and a second switch. The first transistor has a first gate configured to receive an output voltage from an output node. The second transistor has a second gate. The third transistor has a third gate configured to receive an input voltage. The first constant current source is coupled to sources of the first transistor, the second transistor, and the third transistor. The output stage is configured to drive the output voltage on the output node based on a first current through the first transistor, a second current through the second transistor, and a third current through the third transistor. The first switch is coupled between the second gate of the second transistor and the third gate of the third transistor; and the second switch is coupled between the output node and the second gate of the second transistor.

In one or more embodiments, a display driver is provided. The display driver includes a digital-to-analog converter (DAC) and a source amplifier. The DAC is configured to generate an input voltage based on pixel data. The source amplifier includes a first transistor, a second transistor, a third transistor, a first constant current source, an output stage, a first switch, and a second switch. The first transistor has a first gate configured to receive an output voltage from an output node, the output voltage being provided to a display panel. The second transistor has a second gate. The third transistor has a third gate configured to receive the input voltage. The first constant current source is coupled to sources of the first transistor, the second transistor, and the third transistor. The output stage is configured to drive the output voltage on the output node based on a first current through the first transistor, a second current through the second transistor, and a third current through the third transistor. The first switch is coupled between the second gate of the second transistor and the third gate of the third transistor, and the second switch is coupled between the output node and the second gate of the second transistor.

In one or more embodiments, a method for operating an operational amplifier is provided. The method includes generating a first current through a first transistor having a first gate configured to receive an output voltage from an output node. The method further includes generating a second current through a second transistor having a second gate, and generating a third current through a third transistor having a third gate configured to receive an input voltage. The sources of the first transistor, the second transistor, and the third transistor are coupled to a first constant current source. The method further includes driving the output voltage on the output node based on the first current, the second current, and the third current. The method further includes electrically connecting the second gate of the second transistor to the third gate of the third transistor during a first period, and electrically connecting the second gate of the second transistor to the output node during a second period that follows the first period. The second period begins with a change in the input voltage.

Other aspects of the embodiments will be apparent from the following description and the appended claims.

