BACKGROUND

Three-dimensional (3D) stacked devices employ a stack of dies, such as memory dies or logic dies, so as to provide low-latency connections between the dies, as well as a smaller footprint than typically would be required for a single layer approach. Signals often are distributed through the stack along an inter-die signal path, where logic at some or all of the dies use the signal as an input to circuitry local to that die. Typically, to maintain signal strength and quality, each die included in the inter-die signal path for the signal includes a local repeating amplifier (hereinafter, “repeater”). Typically, this repeater is either implemented as a single inverter or two inverters in sequence. A two-inverter implementation allows the signal being propagated between the dies to remain in the same logic state (e.g., high or low, or 0 or 1) between each die. That is, the signal has the same logic state going into a die as it has leaving the die. However, each inverter adds its own propagation delay, and thus each die transitioned by this signal along the inter-die signal path incurs a propagation delay that includes the switching delays of two inverters. A single-inverter implementation provides reduced propagation delay compared to a two-inverter approach, but results in the logic state of the propagating signal being inverted each time it transitions between dies; that is, the logic state of the signal entering one die is the opposite logic state of the signal entering the next die in the inter-die signal path. As such, each die must be informed of where it is positioned in the stack in order to process the signal correctly given that the logic state of the signal is dependent on the die position; that is, the parity of the die, i.e., whether the die is at an “even” position or an “odd” position within the stack.

One conventional approach to solving the even/odd positioning of a die in a single-inverter repeater implementation is to fabricate separate “even” dies and “odd” dies, such that an even die is hardwired to invert the state of an input inter-die signal before it is used by the circuitry local to the die, and an odd die is hardwired to provide an input inter-die signal without inversion to the circuitry local to the die. However, this approach prevents easy interchange of fabricated die, as well as requires pre-determination of where each die will be positioned within the stack prior to final assembly of the 3D stacked device. Solutions relying on fuses or other one-time-programmable elements to set the “even” or “odd” category for a die after fabrication suffer from the similar non-interchangeability issues. Another conventional approach to use a register or other re-programmable element to identify whether a given die is “even” or “odd” within a die stack. While this approach can facilitate interchangeability of a given die, the programming of such registers occurs at a late stage during the initiation process for a 3D stacked device, and thus prevents the use of propagated inter-die signals until the initiation process has completed, or nearly so.

