CROSS-REFERENCE TO RELATED APPLICATION

This application is the U.S. national phase of PCT Application No. PCT/CN2019/097230 filed on Jul. 23, 2019, which claims priority to Chinese Patent Application No. 201821413041.3 filed in China on Aug. 30, 2018, the disclosures of which are incorporated herein in their entireties by reference.

TECHNICAL FIELD

The present disclosure relates to the field of display product manufacturing technologies, in particular to an Electro-Static Discharge (ESD) protection circuit, a display panel and a display device.

BACKGROUND

Display devices have been widely used as display screens for consumption electronic products such as mobile phones, notebook computers, personal computers, and personal digital assistants. A display device generally includes an active matrix array substrate and a color filter substrate, or an upper substrate. During a manufacturing process of the array substrate, electrostatic accumulation is likely to occur due to processes such as plasma deposition, etching, and friction, or static electricity is generated during operation of the array substrate, resulting in electrostatic breakdown and electrostatic damage on the array substrate, and thus defects are caused.

ESD protection circuits are distributed around a panel and are an important part of the display device. The ESD protection circuits can ensure that the display device is protected from the electrostatic damage during production, transportation and operation. A Thin Film Transistor (TFT) in an ESD structure is generally designed with a long channel and a small width-to-length ratio of the channel to improve ESD-damage-prevention performance. However, a channel direction of the TFT is generally perpendicular to an extension direction of a data line or a gate line, a space for disposing the TFT is limited, and a length of the channel is limited, thus the ESD-damage-prevention performance is limited correspondingly.

SUMMARY

An ESD protection circuit, a display panel and a display device are provided in the present disclosure.

In order to achieve the above purpose, a technical solution adopted in the present disclosure is in that: an ESD protection circuit includes a TFT arranged between a to-be-protected signal line and a discharging line for providing the protection, a length direction of a channel of the TFT is parallel to an extension direction of the to-be-protected signal line.

Further, a width-to-length ratio of the channel of the TFT is less than 0.2.

Further, the to-be-protected signal line is a data line or a gate line.

Further, the TFTs include a first TFT and a second TFT, and the discharging lines include a first discharge line and a second discharge line; a drain electrode of the first TFT is electrically connected to the first discharge line, and a source electrode and a gate electrode of the first TFT are electrically connected to the to-be-protected signal line; and a drain electrode of the second TFT is electrically connected to the to-be-protected signal line, and a source electrode and a gate electrode of the second TFT are electrically connected to the second discharge line.

Further, the first discharge line and the second discharge line are short-circuited through a connection line.

Further, the first discharge line and the second discharge line intersect the to-be-protected signal line, and the first TFT and the second TFT are arranged between the first discharge line and the second discharge line.

Further, the to-be-protected signal lines are arranged side by side in a row direction or a column direction, and comprise a first to-be-protected signal line and a second to-be-protected signal line adjacent to each other, the first to-be-protected signal line is connected to the first discharge line and the second discharge line through an TFT, the second to-be-protected signal line is connected to a third discharge line and a fourth discharge line through another TFT, and the first discharge line, the second discharge line, the third discharge line and the fourth discharge lines are short-circuited through a connection line, the second discharge line and the third discharge line are a same line.

Further, the TFT connected to the first to-be-protected signal line and the TFT connected to the second to-be-protected signal line are arranged in a column along an extension direction of the to-be-protected signal line.

Further, the TFT includes a first TFT and a second TFT, and the discharging line includes a fifth discharge line. A gate electrode and a source electrode of the first TFT are electrically connected to the to-be-protected signal line, a drain electrode of the first TFT is electrically connected to a gate electrode and a source electrode of the second TFT, a drain electrode of the second TFT is electrically connected to the to-be-protected signal line, and the gate electrode of the second TFT is electrically connected to the fifth discharge line.

Further, to-be-protected signal lines are arranged side by side in a row direction or a column direction, and comprise a first to-be-protected signal line and a second to-be-protected signal line adjacent to each other, the TFT electrically connected to the first to-be-protected signal line and the TFT electrically connected to the second to-be-protected signal line are respectively arranged on two sides of the fifth discharge line.

Further, the TFT electrically connected to the first to-be-protected signal line and the TFT electrically connected to the second to-be-protected signal line are arranged in a column along an extension direction of the to-be-protected signal line.

Further, an active layer of the TFT is made of oxide semiconductor, amorphous silicon, or low temperature polysilicon.

Further, an insulation thin film is arranged on the channel of the TFT.

A display panel is provided in the present disclosure. The display panel includes the ESD protection circuit described above.

Further, the display panel further includes the to-be-protected signal line and the discharging line.

A display device is provided in the present disclosure. The display device includes the display panel described above.

