CROSS-REFERENCE TO RELATED APPLICATION

The present application is based upon and claims priority to Chinese Patent Application No. 201910690754.7, filed on Jul. 29, 2019, the entirety contents of which are incorporated herein by reference.

TECHNICAL FIELD

Embodiments of the present disclosure relate to a field of computer, and more particularly to a method and apparatus for balancing loads, and a computer-readable storage medium.

BACKGROUND

Artificial intelligence (AI) chips are dedicated to handle a large number of computing tasks in AI applications. Therefore, an AI chip is a kind of calculation-intensive chip, which has a strong computing power and a very large area. Typically, in training and reasoning applications, it very easy that hundreds of millions of transistors hop from idle state to active state at the same time and instantaneous power consumption of chips is extremely large, resulting in great challenges to power supply of chips at this moment. It is very easy to have a transient voltage drop, which leads to logic upset inside the entire chip and cannot work normally in serious cases. Conversely, when a large number of transistors hop from active state to idle state at the same time, it will occur an instantaneous voltage overshoot, which will also cause damage to power supply network. These problems are difficult to solve through subsequent software optimization, and have gradually become very serious problems in large-area and high-power chips.

SUMMARY

According to an exemplary embodiment of the present disclosure, an improved solution for balancing loads is provided.

In Embodiments of the present disclosure, a method for balancing loads is provided. The method may include: for each data processing unit in a set of data processing units in a data processing system, acquiring current input data of the data processing unit for a current clock cycle and next input data of the data processing unit for a next clock cycle; and determining a first metric value indicating changes in input data of the data processing unit in the next clock cycle based on a comparison between the current input data and the next input data; and controlling an operating state of the set of data processing units in the next clock cycle based on the first metric value determined for the set of data processing units.

In Embodiments of the present disclosure, an apparatus for balancing loads is provided. The apparatus may include: one or more processors; a memory storing instructions executable by the one or more processors; in which the one or more processors are configured to: acquire current input data of the data processing unit for a current clock cycle and next input data of the data processing unit for a next clock cycle, for each data processing unit in a set of data processing units in a data processing system; determine a first metric value indicating changes in input data of the data processing unit in the next clock cycle based on a comparison between the current input data and the next input data, for each data processing unit in the set of data processing units; and control an operating state of the set of data processing units in the next clock cycle based on the first metric value determined for the set of data processing units.

In Embodiments of the present disclosure, a computer-readable storage medium is provided, in which the computer-readable storage medium has a computer program stored thereon, when the computer program is executed by a processor, a method for balancing loads is implemented. The method includes: for each data processing unit in a set of data processing units in a data processing system, acquiring current input data of the data processing unit for a current clock cycle and next input data of the data processing unit for a next clock cycle; and determining a first metric value indicating changes in input data of the data processing unit in the next clock cycle based on a comparison between the current input data and the next input data; and controlling an operating state of the set of data processing units in the next clock cycle based on the first metric value determined for the set of data processing units.

It should be understood that the content described in the summary is neither intended to limit key or important features of embodiments of the present disclosure, nor to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood from the following description.

