BACKGROUND

1. Technical Field

The present disclosure relates to a pipeline analog to digital converter. More particularly, the present disclosure relates to a pipeline analog to digital converter that may extend an amplifying phase and an analog to digital conversion method.

2. Description of Related Art

A pipeline analog to digital converter may sequentially convert an input signal to be a corresponding digital code with multiple conversions. In an existing approach, an operating interval for each conversion is fixed. With the increasing clock speed, an interval of one period is getting shorter. In order to make the pipeline analog to digital converter properly process the conversion result in such short period, certain circuits (e.g., residue amplifier(s)) in the pipeline analog to digital converter are required to have higher current. As a result, overall power consumption and circuit area are increased.

SUMMARY

In some aspects, a pipeline analog to digital converter includes a plurality of converter circuitries. The plurality of converter circuitries are configured to sequentially convert an input signal to be a plurality of digital codes. The plurality of converter circuitries includes a first converter circuitry and a second converter circuitry. The first converter circuitry is configured to a convert a first signal to be a first digital code in the plurality of digital codes, and generate a first residue signal according to the first signal and the first digital code. The second converter circuitry is configured to receive the first signal and the first digital code to quantize the first signal according to the first digital code, in order to generate a second digital code in the plurality of digital codes, and generate a second residue signal according to the first residue signal and the second digital code.

In some aspects, an analog to digital conversion method includes the following operations: converting a first signal to be a first digital code, and generating a first residue signal according to the first signal and the first digital code; and quantizing the first signal according to the first digital code, in order to generate a second digital code, and generating a second residue signal according to the first residue signal and the second digital code.

These and other objectives of the present disclosure will be described in preferred embodiments with various figures and drawings.

