BACKGROUND

Field

This disclosure relates generally to reconnectable and remountable electrical connectors, and more specifically, to an electrical interposer having shielded contact probes and traces for coupling two or more electronic components.

Related Art

Electrical interposers or connectors are used to connect two or more electronic components together or to connect an electronic component to a piece of electrical equipment, such as a computer, router, or tester. In one example, an electrical interposer or connector can be used to connect an electronic component, such as an integrated circuit (IC) package or chip to a printed circuit broad (PCB). In another example, an electrical interposer can also be used during integrated circuit manufacturing for coupling an IC device under test to a test system. In some applications, the electrical interposer or connector provides separable or remountable connection so that the attached electronic component can be removed and reattached. For example, it may be desirable to mount a packaged microprocessor chip to a personal computer mother board using a separable interconnect device so that a malfunctioning chip can be readily removed or an upgraded chip can be readily installed.

Advances in semiconductor technologies have led to shrinking dimensions within integrated circuits and, particularly, decreasing pitch for the contact points on a silicon die or a semiconductor package. For example, contact pads on a semiconductor wafer can have a pitch of 250 microns or less. At a 500-micron package pitch level, conventional techniques to make separable electrical connections are prohibitively difficult and expensive. Issues become more critical as the pitch of contact pads on semiconductor packages decreases below 400 microns while simultaneous connection to multiple contact pads in an array is required.

High-speed communication applications further exacerbate issues associated with electrically coupling semiconductor devices. In high-speed applications, differential signal pairs normally cannot be placed in adjacent positions because noise easily transfers from one differential pair to a neighboring differential pair. Conventional PCIe connectors, for example, incorporate grounded contact elements positioned between every adjacent pair of differential signal pins to reduce crosstalk noise. This conventional method increases pin count and connector size and requires additional PCB area to incorporate the connection.

PCB traces, connectors, cables, and even IC packages are system-level bandwidth limiters that make designs at high data rates, such as PCIe, challenging. The high signal frequencies increase copper and power loss, which causes transmission distances to decrease. In addition, the channel loss in higher signal frequencies causes signal integrity issues. To meet the requirements of a wide range of applications, there are many types of PCIe channels, from chip-to-chip topology without connectors to complex server topology with backplane interfaces that include multiple PCB cards and two or more connectors.

