FIELD OF THE INVENTION

The present invention relates to via interconnects, and more particularly, to chamfer-less via interconnects and techniques for fabrication thereof employing a controllable via chamfer angle and dimension with a protective dielectric arch.

BACKGROUND OF THE INVENTION

In semiconductor fabrication, a dual damascene process can be employed to create metal interconnects. In general, a dual damascene process involves patterning features such as vias and trenches in a dielectric, and then filling the features with metal or metals to form the interconnects. When the vias are patterned before the trenches, this is often referred to as a via-first process.

With conventional approaches, however, the vias are typically not protected during the subsequent trench etch step. As a result, the sidewalls of the via are also etched causing chamfering at the top corners of the vias. This chamfering can undesirably lead to shorting between adjacent interconnects.

Thus, techniques for forming interconnects with controlled via chamfer angle would be desirable.

SUMMARY OF THE INVENTION

The present invention provides chamfer-less via interconnects and techniques for fabrication thereof employing a controllable via chamfer angle and dimension with a protective dielectric arch. In one aspect of the invention, a method of forming an interconnect is provided. The method includes: forming metal lines in a first dielectric; depositing an etch stop liner onto the first dielectric over the metal lines; depositing a second dielectric on the etch stop liner over the metal lines; patterning vias and a trench in the second dielectric, wherein the vias are present over at least one of the metal lines and the trench is present over the vias, and wherein the patterning forms patterned portions of the second dielectric and the etch stop liner over at least another one of the metal lines; forming a protective dielectric arch on the patterned portions of the second dielectric and the etch stop liner over the at least another one of the metal lines; and filling the vias and the trench with at least one metal to form the interconnect in direct contact with the at least one of the metal lines and, due to the protective dielectric arch, in a non-contact position with the at least another one of the metal lines.

In one aspect of the invention, a structure is provided. The structure includes: metal lines formed in a first dielectric; an etch stop liner disposed on the first dielectric; a second dielectric disposed on the etch stop liner; vias and a trench patterned in the second dielectric, wherein the vias are present over at least one of the metal lines and the trench is present over the vias, and wherein portions of the second dielectric and the etch stop liner are present over at least another one of the metal lines; a protective dielectric arch disposed on the portions of the second dielectric and the etch stop liner over the at least another one of the metal lines; and at least one metal disposed in the vias and the trench that forms an interconnect in direct contact with the at least one of the metal lines and, due to the protective dielectric arch, in a non-contact position with the at least another one of the metal lines.

A more complete understanding of the present invention, as well as further features and advantages of the present invention, will be obtained by reference to the following detailed description and drawings.

