CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority under 35 U.S.C. § 119(a) to Korean Patent Application Number 10-2020-0101348 filed on Aug. 12, 2020 in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference.

BACKGROUND

1. Field of Invention

Various embodiments of the present disclosure generally relate to an electronic device, and more particularly, to a semiconductor device including a memory.

2. Description of Related Art

To follow the trends of reduction in size, lower power consumption, higher performance, diversification, etc., of modern electronic devices, semiconductor devices for storing information are required for various electronic devices such as computers, portable communication devices, etc. Hence, studies on a semiconductor device capable of storing data by using characteristics of switching between different resistance states according to voltage or current applied are being conducted. Examples of a semiconductor device include resistive random access memory (RRAM), phase-change random access memory (PRAM), ferroelectric random access memory (FRAM), magnetic random access memory (MRAM), E-fuse, and the like.

SUMMARY

Various embodiments of the present disclosure are directed to an electronic device enabling enhancements in memory cell operation characteristics and reliability.

An embodiment of the present disclosure may provide for a semiconductor device. The semiconductor device may include a stack including word lines, a bit line penetrating the stack, a global bit line disposed above the stack, global word lines disposed above the stack, a common select line disposed above the stack, a first contact plug coupling the global bit line and the bit line to each other and penetrating the common select line, and second contact plugs coupling the global word lines and the word lines respectively to each other and penetrating the common select line.

An embodiment of the present disclosure may provide for a semiconductor device. The semiconductor device may include a bit line, a word line, a resistive memory cell coupled between the bit line and the word line, a first select transistor configured to control coupling between a global bit line and the bit line, a second select transistor configured to control coupling between a global word line and the word line, and a common select line configured to control the first select transistor and the second select transistor in common.

