TECHNICAL FIELD

The present disclosure relates to a method for method for manufacturing a semiconductor element.

BACKGROUND

In order to control transmission frequency, a variable-capacitance element is adopted in an integrated circuit. As the variable-capacitance element, an MOS type variable-capacitance element (MOS variable-capacitance diode) is used.

In the integrated circuit, multiple kinds of semiconductor elements manufactured, so that the variable-capacitance element may be manufactured together with, for example, an FET. If the variable-capacitance element is manufactured with the FET, impurities may be implanted into the variable-capacitance element in a manufacturing process of a semiconductor, and the capacitance characteristics of the variable-capacitance device will be deteriorated.

In the manufacturing process of the semiconductor, masks used in a photolithography are very expensive, and it is desirable to inhibit the total number of used masks. However, if sharing the masks in different processes, impurities may be implanted into the variable-capacitance element.

SUMMARY

The present disclosure provides a method for manufacturing a semiconductor element and a semiconductor structure, which saves cost and prevents deterioration of capacitance characteristics of a variable-capacitance element.

In the method for manufacturing the semiconductor element according to an embodiment of the present disclosure, an FET of an MOS structure and a variable-capacitance element are formed on a surface of a substrate. The method includes: a first masking process, forming a first implantation barrier layer on the surface of the substrate, wherein the first implantation barrier layer covers a surface of a well of a variable-capacitance element region; a channel forming process, implanting impurities into the surface of the substrate, and forming a channel region for the well of the FET region, the impurity has a polarity the same as the polarity of a well in an FET region formed on the surface of the substrate; a gate forming process, forming gates respectively on the well of the FET region and the well of the variable-capacitance element region, wherein the gate is insulated from the well of the FET region and the well of the variable-capacitance element region by an insulating film; a second masking process, generating a second implantation barrier layer on the surface of the substrate, wherein the second implantation barrier layer covers a region identical to the first implantation barrier layer; and an epitaxy forming process, implanting impurities with the polarity opposite to the polarity of the well in the FET region into the surface of the substrate, and forming an epitaxy region for the well of the FET region.

Before the channel forming process for implanting impurities with the same polarity as the well of the FET region into the surface of the substrate, the first implantation barrier layer in the covering the surface of the well of the variable-capacitance element region is formed, so that the impurities can be prevented from being implanted into the well of the variable-capacitance element region. Therefore, the deterioration of the capacitance characteristics of the variable-capacitance element can be inhibited.

In the second masking process, the second implantation barrier layer is formed on the surface of the substrate. The second implantation barrier layer covers the region identical to the first implantation barrier layer in the first masking process. The tools for forming implantation barrier layers, such as photomasks, can be shared, the total number of masks used in the manufacturing process of an integrated circuit can be reduced, and the cost is saved.

The method for manufacturing the semiconductor element further includes a well forming process, forming the well of the FET region, and the well of the variable-capacitance element region with the polarity opposite to the well of the FET region on the surface of the substrate. The first masking process is performed after the well forming process.

Even the well in the FET region and the well in the variable-capacitance element region are formed on the surface of the substrate, the channel forming process can be performed by using the first implantation barrier layer, which covers the surface of the well of the variable-capacitance element. The deterioration of the capacitance characteristics of the variable-capacitance element can be inhibited.

Optionally, in the first masking process, the first implantation barrier layer is formed by using photomask, and in the second masking process, the second implantation barrier layer is formed by using the photo mask.

By sharing the photo mask for forming the first implantation barrier layer and the second implantation barrier layer, a number of the photomask can be reduced, and a cost of the integrated circuit is reduced. In the second masking process, the photomask in the first masking process performed on the same substrate may be used. When concurrent manufacturing, the photomask in the first masking process performed on other substrates may also be used (borrowed).

In some embodiments, the first implantation barrier layer and the second implantation barrier layer are resist layers.

In some embodiments, when the channel forming process is completed, the first implantation barrier layer formed on a substrate surface is removed.

In some embodiments, when the epitaxy forming process is completed, the second implantation barrier layer formed on the substrate surface is removed.

In some embodiments, after the epitaxy forming process, sidewalls are formed for the gates.

In some embodiments, when the sidewalls are formed, a silicon oxide film is formed on the substrate surface, anisotropy is performed, and oxide films are remained on the sidewalls of the gates.

In some embodiments, the method for manufacturing the semiconductor element further includes: before the gate forming process, respectively forming a source and a drain in the FET region and a variable-capacitance diode region.

The present disclosure further provides a semiconductor structure, including: a substrate, including an FET region and a variable-capacitance element region; and an implantation barrier layer, covering a surface of a well of the variable-capacitance element region and exposing the surface of the well in the FET region.

According to the present disclosure, the deterioration of the capacitance characteristics of the variable-capacitance element can be inhibited, and the cost can be saved.

