CROSS-REFERENCES TO RELATED APPLICATION

The present application claims priority under 35 U.S.C. § 119(a) to Korean application number 10-2019-0025655, filed on Mar. 6, 2019, in the Korean Intellectual Property Office, which is incorporated herein by reference in its entirety.

BACKGROUND

1. Technical Field

Various embodiments generally relate to a computer system, and more particularly, to a memory manager having an address translation function, a data processing structure including the same and a method for generating address translation information.

2. Related Art

In order to process data, a computer system mainly uses a central processing unit (CPU) operating at a high speed. These days, with the development of semiconductor processing, a CPU has become able to process data at a high speed.

However, data to be provided to the CPU for processing is positioned in an external memory of which the operation speed is relatively slower than the operation speed of the CPU. Due to this fact, a problem may be caused in that data processing in the CPU is delayed. In order to solve such a problem, a cache is built in the CPU to compensate for the slow operation speed of the external memory.

Recently, as an absolute amount of data to be processed increases, a multi-layered cache structure is adopted to compensate for a speed reduction due to frequent data loading. Also, researches on a data processing structure for processing data in a memory (PIM: processing in-memory) and a data processing structure for processing data near a memory (PNM: processing near-memory) have been actively carried out.

When entrusting a calculation task to a data processing structure such as the PIM and the PNM, the CPU translates a virtual address into a physical address and provides the translated physical address to the data processing structure, so as to allow the data processing structure to perform an accurate calculation. In this regard, a problem may be caused in that, each time the CPU entrusts a task to a data processing structure, an overhead to translate a virtual address into a physical address occurs. Therefore, research for translating a virtual address into a physical address in a data processing structure has been carried out.

SUMMARY

In an embodiment, a memory manager may include: an internal memory including a V2H (virtual address to hash function) table in which at least one virtual address group and type information on a hash function mapped to the virtual address group are stored, and an exception mapping table in which at least one exception virtual address not translated into a physical address by the hash function in the virtual address group and a physical address mapped to the exception virtual address are stored; and a hash function module configured to check, when a virtual address is provided from a host, a type information on a hash function mapped to a virtual address group including the virtual address, by referring to the V2H table included in the internal memory, and translate the virtual address into a physical address by using the hash function corresponding to the type information.

In an embodiment, a data processing structure may include: a calculation circuit configured by a plurality of calculators which perform calculations according to a command provided from a central processing unit (CPU); and a memory manager configured to translate a virtual address provided from the CPU into a physical address by using a hash function, and provide the translated physical address and the command provided from the CPU, to an external memory.

In an embodiment, a method for generating address translation information may include: checking whether mapping for a virtual address group as a mapping target, by using a hash function selected among a plurality of hash functions is possible; determining whether all virtual addresses in the virtual address group as the mapping target are translated into physical addresses; and generating, when all the virtual addresses are translated into physical addresses, a V2H (virtual address to hash function) entry in which an exception field storing an information indicating whether an exception virtual address exists is set to a first value indicating that no exception virtual address exists.

In an embodiment, a method for translating a virtual address into a physical address may include: storing at least one virtual address group and type information on a hash function mapped to the virtual address group within a V2H (virtual address to hash function) table included in an internal memory; storing at least one exception virtual address not translated into a physical address by the hash function in the virtual address group and a physical address mapped to the exception virtual address within an exception mapping table included in the internal memory; checking, with a hash function module, when a virtual address is provided from a host, type information on a hash function mapped to a virtual address group including the virtual address, by referring to the V2H table included in the internal memory; and translating, with the hash function module, the virtual address into a physical address by using the hash function corresponding to the type information.

