TECHNICAL FIELD

The present disclosure relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a semiconductor device with an etch stop layer having greater thickness.

DISCUSSION OF THE BACKGROUND

Semiconductor devices are used in a variety of electronic applications, such as personal computers, cellular telephones, digital cameras, and other electronic equipment. The dimensions of semiconductor devices are continuously being scaled down to meet the increasing demand of computing ability. However, a variety of issues arise during the scaling-down process, and such issues are continuously increasing. Therefore, challenges remain in achieving improved quality, yield, performance, and reliability and reduced complexity.

This Discussion of the Background section is provided for background information only. The statements in this Discussion of the Background are not an admission that the subject matter disclosed in this section constitutes prior art to the present disclosure, and no part of this Discussion of the Background section may be used as an admission that any part of this application, including this Discussion of the Background section, constitutes prior art to the present disclosure.

SUMMARY

One aspect of the present disclosure provides a semiconductor device including a first semiconductor die including a first conductive layer, a first etch stop layer positioned on the first conductive layer, a second semiconductor die including a second conductive layer positioned above the first etch stop layer, a second etch stop layer positioned on the second conductive layer, a first through substrate via positioned along the second semiconductor die and the first etch stop layer, extended to the first semiconductor die, and positioned on the first conductive layer, and a second through substrate via extended to the second semiconductor die, positioned along the second etch stop layer, and positioned on the second conductive layer. A thickness of the second etch stop layer is greater than a thickness of the first etch stop layer.

In some embodiments, the first etch stop layer and the second etch stop layer are formed of a same material.

In some embodiments, a ratio of the thickness of the second etch stop layer to the thickness of the first etch stop layer is between about 1.1 and about 2.0.

In some embodiments, a width of the second through substrate via is equal to or greater than a width of the first through substrate via.

In some embodiments, the semiconductor device includes a top conductive layer positioned on the first through substrate via and the second through substrate via.

In some embodiments, the semiconductor device includes isolation layers positioned on sidewalls of the first through substrate via. The isolation layers are formed of silicon oxide, silicon nitride, silicon oxynitride, tetra-ethyl ortho-silicate, or combination thereof.

In some embodiments, the semiconductor device includes an adhesion layer positioned between the first conductive layer and the first through substrate via. The adhesion layer is formed of titanium, tantalum, titanium tungsten, or manganese nitride.

In some embodiments, the semiconductor device includes a seed layer positioned between the first conductive layer and the first through substrate via. The seed layer is formed of copper or ruthenium.

In some embodiments, the semiconductor device includes a first bonding layer positioned on the first etch stop layer and positioned between the first semiconductor die and the second semiconductor die.

In some embodiments, an aspect ratio of the second through substrate via is between about between about 1:6 and about 1:15.

In some embodiments, the second semiconductor die includes a second dielectric layer positioned on the first bonding layer and a second substrate positioned on the second dielectric layer. The second conductive layer and the second etch stop layer are positioned in the second dielectric layer. The second through substrate via is positioned along the second substrate, extended to the second dielectric layer, positioned along the second etch stop layer, and positioned on the second conductive layer.

In some embodiments, the second dielectric layer is formed of silicon oxide and the first etch stop layer and the second etch stop layer are formed of silicon nitride, silicon oxynitride, or silicon carbonitride.

In some embodiments, the seed layer has a thickness between about 10 nm and about 40 nm.

Another aspect of the present disclosure provides a method for fabricating a semiconductor device including providing a first semiconductor die including a first conductive layer, forming a first etch stop layer on the first conductive layer, bonding a second semiconductor die, which includes a second conductive layer above the first etch stop layer and a second etch stop layer on the second conductive layer, onto the first etch stop layer, performing a via etch process to concurrently form a first via opening to expose the first etch stop layer and a second via opening to expose the second etch stop layer, conformally forming isolation layers in the first via opening and the second via opening, performing a punch etch process to extend the first via opening and the second via opening by removing the isolation layers formed on the first via opening and the second via opening, the first etch stop layer formed on the first conductive layer, and the second etch stop layer formed on the second conductive layer, and concurrently forming a first through substrate via in the first via opening and a second through substrate via in the second via opening. The second etch stop layer has a greater thickness than that of the first etch stop layer.

In some embodiments, the first etch stop layer and the second etch stop layer are formed of a same material.

In some embodiments, the first etch stop layer and the second etch stop layer are formed of silicon nitride, silicon oxynitride, or silicon carbonitride.

In some embodiments, the via etch process uses an etchant comprising perfluoroisobutylene or hexafluorobutadiene.

In some embodiments, the punch etch process includes tetrafluoromethane.

Another aspect of the present disclosure provides a method for fabricating a semiconductor device including providing a first semiconductor die including a first conductive layer, forming a first etch stop layer on the first conductive layer, bonding a second semiconductor die, which includes a second conductive layer above the first etch stop layer and a second etch stop layer on the second conductive layer, onto the first etch stop layer, performing a via etch process to form a first via opening to expose the first etch stop layer and a second via opening to expose the second etch stop layer303, conformally forming isolation layers in the first via opening and the second via opening, performing a punch etch process to extend the first via opening and the second via opening by removing the isolation layers formed on the first via opening and the second via opening, the first etch stop layer formed on the first conductive layer, and the second etch stop layer formed on the second conductive layer, and integrally forming a first through substrate via in the first via opening and a second through substrate via in the second via opening. The first etch stop layer is formed of a material having etch selectivity to the second etch stop layer.

In some embodiments, the via etch process has an etch rate ratio of the first etch stop layer to the second etch stop layer between about 1:05:1 and about 25:1.

Due to the design of the semiconductor device of the present disclosure, the greater thickness of the second etch stop layer may compensate the adverse effect of over etching during formation of the via openings. As a result, the yield/reliability of the semiconductor device may be improved.

The foregoing has outlined rather broadly the features and technical advantages of the present disclosure in order that the detailed description of the disclosure that follows may be better understood. Additional features and advantages of the disclosure will be described hereinafter, and form the subject of the claims of the disclosure. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the disclosure as set forth in the appended claims.

