BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is related to a non-volatile memory device and a control method, and more particularly to a non-volatile memory device and a control method capable of mitigating the overwritten effect of the near end memory cells.

2. Description of the Prior Art

Non-volatile memory devices, such as flash memory, have become the storage of choice in various electrical products, such as personal computers, flash drives, digital cameras, and mobile phones. Flash memory devices have undergone rapid development. The flash memory can store data for a considerably long time without powering, and have advantages such as high integration level, fast access, easy erasing, and rewriting. To further improve the bit density and reduce cost of the flash memory device, a three-dimensional (3D) NAND flash memory has been developed. A 3D NAND memory architecture stacks memory cells vertically in multiple layers, achieving a higher density than traditional NAND memory. As more layers are added, the bit density increases, thus increasing more storage capacity. But, the increase in the number of layers makes the etching process become more difficult. Therefore, a main trend in the efforts to develop 3D NAND flash memory is to increase the number of bits stored per cell of each single memory layer in order to improve the bit density of the memory cell. Accordingly, the control gate length (Lg) of the memory cells and spacing (Ls) between separate lines of memory cells can be shortened. As the control gate length and spacing of the memory cells are shortened, the gate resistance and capacitance become larger, thus resulting in propagation delay and latency for near end memory cells of the word line. A word line over-driving method may be used for reducing the propagation delay and latency, and accelerating the programming speed for the near end memory cells. However, the overwritten of the near end memory cells may cause wide cell threshold voltage distribution. Further, the fast programming speed of the near end memory cells may also lead to poor program uniformity. Thus, there is a need for improvement.

SUMMARY OF THE INVENTION

It is therefore an objective of the present invention to provide a non-volatile memory device and a control method capable of capable of mitigating the overwritten effect of the near end memory cells.

An embodiment provides a control method of non-volatile memory device. The non-volatile memory device includes a memory array including a plurality of memory strings and each memory string includes a plurality of memory cells connected in series. The control method includes applying a pass voltage signal to a plurality of unselected word lines connected to unselected memory cells of the plurality of memory cells during a programming operation period; and applying a program voltage signal to a selected word line connected to a selected memory cell of the plurality of memory cells during the programming operation period, wherein the program voltage signal is decreasing or changes in a descending step pulse manner during the programming operation period.

An embodiment provides a non-volatile memory device. The non-volatile memory device includes a memory array comprising a plurality of memory strings, each memory string comprising a plurality of memory cells connected in series; a plurality of word lines connected to the plurality of memory cells of the each memory string of the plurality of memory strings, each word line connected to a respective memory cell; and a control circuit configured to apply a pass voltage signal to unselected word lines of the plurality of word lines connected to unselected memory cells of the plurality of memory cells during a programming operation period and apply a program voltage signal to a selected word line of the plurality of word lines connected to a selected memory cell of the plurality of memory cells during the programming operation period, wherein the program voltage signal is decreasing or changes in a descending step pulse manner during the programming operation period.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

