BACKGROUND

A switched mode power supply (SMPS) transfers power from an input power source to a load by switching one or more power transistors coupled through a switch node/terminal to an energy storage element (such as an inductor/transformer and/or capacitor), which is capable of coupling to the load. The power transistors can be included in a power converter that includes, or is capable of coupling to, the energy storage element. An SMPS can include an SMPS controller to provide one or more gate drive signals to the power transistor(s). Varying switching frequencies are applicable to certain application environments for the SMPS, but optimizing an SMPS controller for a wide range of switching frequencies can bring challenges.

SUMMARY

Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a timing circuit and a state machine circuit. The timing circuit is configured to determine a relationship between a duty cycle of a power converter and a threshold value. The state machine circuit is coupled to the timing circuit and includes a plurality of states including a buck state, a boost state, and a buck-boost state. The state machine circuit is configured to transition among the plurality of states according to time domain control and voltage domain control, based at least partially on the determined relationship between the duty cycle of the power converter and the threshold value, transition among the plurality of states according to the time domain control when the time domain control indicates an exit from the buck-boost state, and transition among the plurality of states according to the voltage domain control when the voltage domain control indicates the exit from a buck-boost state.

Other aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a timing circuit and a state machine circuit. The timing circuit is configured to determine a relationship between a duty cycle of a power converter and a threshold value. The state machine circuit is coupled to the timing circuit and comprising a plurality of states including a buck-boost state and at least another state. The state machine circuit is configured to transition from the another state to the buck-boost state, based at least partially on the determined relationship between the duty cycle of the power converter and the threshold value, when both time domain control and voltage domain control indicate an entry to the buck-boost state. The state machine circuit is further configured to transition from the buck-boost state to the another state, based at least partially on the determined relationship between the duty cycle of the power converter and the threshold value, when the time domain control or the voltage domain control indicates an exit from the buck-boost state.

Other aspects of the disclosure provide for a system. In at least some examples, the system includes a load, a power converter, and a controller. The power converter is coupled to the load and configured to provide the load with an output voltage (VOUT) switched from an input voltage (VIN) by the power converter. The controller is coupled to the power converter and configured to control the power converter to switch VIN to VOUT. The controller switches VIN to VOUT by generating a plurality of clock signals, determining a relationship between a duty cycle of the power converter and a threshold value determined according to at least some of the plurality of clock signals, and controlling the power converter to operate in a buck-boost mode of operation based at least partially on the determined relationship between the duty cycle of the power converter and the threshold value when both time domain control and voltage domain control specify operation of the power converter in the buck-boost mode of operation.

