CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority under 35 U.S.C. § 119 to Japanese Patent Application No. 2019-103263, filed May 31, 2019, the contents of which are incorporated herein by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present disclosure relates to a secondary battery protection circuit, a secondary battery protection apparatus, a battery pack, and a method for controlling a secondary battery protection circuit.

2. Description of the Related Art

A protection circuit has been known to protect a secondary battery by using a pair of NMOS (N-channel Metal Oxide Semiconductor) transistors that are inserted in a current path being between a positive electrode of the secondary battery and a positive terminal, the positive terminal being connected to a high side power supply terminal of each of a load and a charger (see, e.g., Japanese Unexamined Patent Application Publication No. H11-178224 referred to as Patent document 1).

SUMMARY

The present disclosure provides a secondary battery protection circuit for protecting a secondary battery, the secondary battery protection circuit including:

a boosting circuit configured to generate a control voltage in response to boosting a voltage across a secondary battery;

a drive circuit configured to supply the control voltage to a gate of a charge control NMOS transistor and a gate of a discharge control NMOS transistor, the charge control NMOS transistor and the discharge control NMOS transistor being configured to be electrically inserted in a current path that is between a positive electrode of the secondary battery and a high side power supply terminal for each of a load and a charger;

an overdischarge detecting circuit configured to detect the voltage across the secondary battery that is lower than a predetermined first voltage for overdischarge detection;

a control circuit configured to operate the drive circuit such that the gate of the discharge control NMOS transistor becomes at low level, upon detecting, by the overdischarge detecting circuit, that the voltage across the secondary battery is lower than the first voltage for overdischarge detection;

a low-voltage detecting circuit configured to detect the voltage across the secondary battery that is lower than a second voltage for low voltage detection, the second voltage being set to be lower than the first voltage for overdischarge detection;

an interrupt circuit configured to interrupt a node through which the control voltage is supplied to the gate of the charge control NMOS transistor, such that the node becomes at high impedance, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection; and

a switching circuit configured to cause the gate of the charge control NMOS transistor to be fixed at a potential at the high side power supply terminal, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection.

The present disclosure provides a secondary battery protection apparatus, including:

a charge control NMOS transistor electrically inserted in a current path that is between a positive electrode of a secondary battery and a high side power supply terminal for each of a load and a charger;

a discharge control NMOS transistor electrically inserted in the current path;

a boosting circuit configured to generate a control voltage in response to boosting a voltage across the secondary battery;

a drive circuit configured to supply the control voltage to a gate of the charge control NMOS transistor and a gate of the discharge control NMOS transistor;

an overdischarge detecting circuit configured to detect the voltage across the secondary battery that is lower than a predetermined first voltage for overdischarge detection;

a control circuit configured to operate the drive circuit such that the gate of the discharge control NMOS transistor becomes at low level, upon detecting, by the overcharge detecting circuit, that the voltage across the secondary battery is lower than the first voltage for overcharge detection;

a low-voltage detecting circuit configured to detect the voltage across the secondary battery that is lower than a second voltage for low voltage detection, the second voltage being set to be lower than the first voltage for overdischarge detection;

an interrupt circuit configured to interrupt a node through which the control voltage is supplied to the gate of the charge control NMOS transistor, such that the node becomes at high impedance, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection; and

a switching circuit configured to cause the gate of the charge control NMOS transistor to be fixed at a potential at the high side power supply terminal, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection.

The present disclosure provides a battery pack, including:

a secondary battery including a positive electrode;

a charge control NMOS transistor electrically inserted in a current path that is between the positive electrode of the secondary battery and a high side power supply terminal for each of a load and a charger;

a discharge control NMOS transistor electrically inserted in the current path;

a boosting circuit configured to generate a control voltage in response to boosting a voltage across the secondary battery;

a drive circuit configured to supply the control voltage to a gate of the charge control NMOS transistor and a gate of the discharge control NMOS transistor;

an overdischarge detecting circuit configured to detect the voltage across the secondary battery that is lower than a predetermined first voltage for overdischarge detection;

a control circuit configured to operate the drive circuit such that the gate of the discharge control NMOS transistor becomes at low level, upon detecting, by the overdischarge detecting circuit, that the voltage across the secondary battery is lower than the first voltage for overdischarge detection;

a low-voltage detecting circuit configured to detect the voltage across the secondary battery that is lower than a second voltage for low voltage detection, the second voltage being set to be lower than the first voltage for overdischarge detection;

an interrupt circuit configured to interrupt a node through which the control voltage is supplied to the gate of the charge control NMOS transistor, such that the node becomes at high impedance, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection; and

a switching circuit configured to cause the gate of the charge control NMOS transistor to be fixed at a potential at the high side power supply terminal, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection.

The present disclosure provides a method for controlling a secondary battery protection circuit, the secondary battery protection circuit including:a boosting circuit configured to generate a control voltage in response to boosting a voltage across a secondary battery;a drive circuit configured to supply the control voltage to a gate of a charge control NMOS transistor and a gate of a discharge control NMOS transistor, the charge control NMOS transistor and the discharge control NMOS transistor being electrically inserted in a current path that is between a positive electrode of the secondary battery and a high side power supply terminal for each of a load and a charger;an overdischarge detecting circuit configured to detect the voltage across the secondary battery that is lower than a predetermined first voltage for overdischarge detection; anda control circuit configured to operate the drive circuit such that the gate of the discharge control NMOS transistor becomes at low level, upon detecting, by the overdischarge detecting circuit, that the voltage across the secondary battery is lower than the first voltage for overdischarge detection, the method comprising:

detecting the voltage across the secondary battery that is lower than a second voltage for low voltage detection, the second voltage being set to be lower than the first voltage for overdischarge detection;

interrupting a node through which the control voltage is supplied to the gate of the charge control NMOS transistor, such that the node becomes at high impedance, upon detecting that the voltage across the secondary battery is lower than the second voltage for low voltage detection; and

fixing the gate of the charge control NMOS transistor at a potential at the high side power supply terminal, upon detecting that the voltage across the secondary battery is lower than the second voltage for low voltage detection.

