TECHNICAL FIELD

The present disclosure relates to electronic design automation (EDA) tools and, in particular, power and ground awareness in circuit design.

BACKGROUND

In a typical modern integrated circuit, typical cells have a single power (P) pin and a single ground (G) pin that are connected to the primary power supply of the power domain. However, advanced low power designs look to reduce dynamic and/or leakage power by defining regions of the design as a power domain to provide advanced low power techniques, which often require secondary power and ground pins associated with a low power domain. To facilitate such multi-power domain design, Unified Power Format (UPF), an Institute of Electrical and Electronics Engineers (IEEE) standard, is often used to specify power intent in power optimization of an integrated circuit using advanced electronic design automation.

Sometimes, the functionality of some cells in one power domain is incompatible with the primary supply of the main power domain due to differences in the on/off state. In these situations, dual-rail cells are used, which have a backup supply pin connected to a secondary supply network. Dual-rail cells need to be placed near secondary power straps, and the backup supply pin is routed to the strap when designing the circuit.

In current design methodology, there are not enough routing resources to have all secondary power supplies available throughout the design. Thus, the secondary sources are available only in a subset of the design. As a result, dual-rail cells are often placed too far away from the secondary source by automatic place and route tools, resulting in longer PG wire lengths and routing congestion within the cell. As a result, there is a significant IR drop (voltage drop across a resistance) in the secondary PG routes.

Circuit designers often resort to manual design effort to address these issues, which creates an increased risk of introducing changes to circuit timing. As a result, designs often require significant additional development time to ensure timing convergence. In other instances, designers have resorted to implementing complicated script-based manual methods to work around the placement challenge.

