FIELD OF THE TECHNOLOGY

At least some embodiments disclosed herein relate to power management circuit in general and, more particularly but not limited to, low power state implementation in a power management integrated circuit (PMIC).

BACKGROUND

A memory system can be a storage system, such as a solid-state drive (SSD), and can include one or more memory components that store data. For example, a memory system can include memory devices such as non-volatile memory devices and volatile memory devices. In general, a host system can utilize a memory system to store data at the memory devices of the memory system and to retrieve data stored at the memory system.

A memory system may use a Power Management Integrated Circuit (PMIC) to manage the power requirements of the system or subsystem. The PMIC typically includes electronic power conversion circuitry and/or relevant power control functions.

A memory system may have one or more power modes at reduced power consumption levels, such as a sleep mode and a power shutdown mode. When in the sleep mode, power to some components of the memory system may be turned off. When in the power shutdown mode, most of the memory system is turned off, except a minimal circuitry that is used to detect a signal or indication that requires the memory system to wake up or power up.

