BACKGROUND

Accelerator devices, such as field programmable gate arrays (FPGAs), may be configured (e.g., by a bit stream defining a configuration of gates of the FPGA) to perform a set of functions, referred to herein as a kernel. The kernel may be configured, through time consuming effort on the part of a kernel developer, to establish a connection with another accelerator device kernel (e.g., another kernel in the same FPGA, a kernel in another FPGA, or a kernel of another type of accelerator device, such as a graphics processing unit (GPU), etc.) and share data with that other kernel to facilitate the completion of a workload (e.g., a set of operations that are to be performed). Typically, details of the communication protocol must be set out in the kernel by the kernel developer and, as the primary purpose of the kernel is to perform a set of operations (e.g., the workload) as efficiently as possible, the communication aspect of the kernel may be limited to communicating with a single type of accelerator device kernel if that accelerator device kernel happens to be available on a certain type of physical communication path (e.g., a PCIe bus). While some data centers may utilize pools of disaggregated resources (e.g., accelerator devices) available through various types of physical communication paths, also referred to I/O channels or communication channels, a given accelerator device kernel may be unable to access (e.g., cooperatively execute a workload with) a large percentage of those other accelerator devices present in the data center due to the limited communication faculties of the accelerator device kernel.

