BACKGROUND OF THE INVENTION

Field of the Invention

The invention relates to a 3D architecture of ternary content-addressable memory.

Description of the Related Art

Ternary Content-Addressable Memory (TCAM) is a memory which can store three states (e.g., 0, 1 and a third state). TCAM may be applied to routers which do not need accurate matching and field of big data. With the development of data science, TCAM is widely applied. In view of the need of TCAM, the circuit layout of TCAM is a topic of industry research.

SUMMARY OF THE INVENTION

An aspect of the present invention discloses a 3D architecture of ternary content-addressable memory (TCAM), comprising a first transistor layer, a second transistor layer, a third transistor layer and a fourth transistor layer. The first transistor layer is disposed on a first plane, and extends in a first direction parallel to the first plane. The second transistor layer is disposed on the first plane, is parallel to the first transistor layer, and extends in the first direction. The third transistor layer is stacked on the first transistor layer in a second direction perpendicular to the first plane. The fourth transistor layer is stacked on the second transistor layer in the second direction. Two of the first transistor layer, the second transistor layer, the third transistor layer and the fourth transistor layer are a first transistor and a second transistor of a first memory cell of the TCAM. The other two of the first transistor layer, the second transistor layer, the third transistor layer and the fourth transistor layer are a first transistor and a second transistor of a second memory cell of the TCAM.

Another aspect of the present invention discloses a 3D architecture of ternary content-addressable memory (TCAM), comprising a first transistor channel layer, a second transistor channel layer, a third transistor channel layer and a fourth transistor channel layer. The first transistor channel layer is disposed on a first plane, and extends in a first direction parallel to the first plane. The second transistor channel layer is disposed on the first plane, is parallel to the first transistor channel layer, and extends in the first direction. The third transistor channel layer is stacked on the first transistor channel layer in a second direction perpendicular to the first plane. The fourth transistor channel layer is stacked on the channel second transistor layer in the second direction. The first transistor channel layer and the third transistor channel layer belong to a first transistor of a memory cell of the TCAM. The second transistor channel layer, and the fourth transistor channel layer belong to a second transistor of the memory cell of the TCAM.

The above and other aspects of the invention will become better understood with regard to the following detailed description of the preferred but non-limiting embodiment(s). The following description is made with reference to the accompanying drawings.

