CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of the prior Japanese Patent Application No. 2018-206885, filed on Nov. 1, 2018, the entire contents of which are incorporated herein by reference.

FIELD

The embodiments discussed herein are related to a semiconductor device and an amplifier.

BACKGROUND

A semiconductor chip in which an output pad connected to a drain of a transistor and a drain pad for applying a bias voltage to the drain of the transistor are provided on a semiconductor substrate is known (see, e.g., Japanese Laid-open Patent Publication No. 11-220344).

Related techniques are disclosed in, for example, Japanese Laid-open Patent. Publication No. 11-220344.

SUMMARY

According to an aspect of the embodiments, a semiconductor device includes an electric circuit configured to include, a transistor, a first pad coupled to a gate or a drain of the transistor, a second pad coupled to the gate or the drain of the transistor, a first wiring that extends from the gate or the drain of the transistor to the first pad, and a second wiring that diverges from the first wiring and extends to the second pad, and a redistribution layer formed over the electric circuit and configured to include a first redistribution coupled to the first pad, and a second redistribution coupled to the second pad to constitute a stub.

The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed.

