BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.

In this specification, a semiconductor device generally means a device which can function by utilizing semiconductor characteristics, and an electrooptic device, a semiconductor circuit, and electronic equipment are all semiconductor devices.

2. Description of the Related Art

In recent years, semiconductor devices have been developed to be used mainly for an LSI, a CPU, or a memory. A CPU is an aggregation of semiconductor elements each provided with an electrode which is a connection terminal, which includes a semiconductor integrated circuit (including at least a transistor and a memory) separated from a semiconductor wafer.

A semiconductor circuit (IC chip) of an LSI, a CPU, or a memory is mounted on a circuit board, for example, a printed wiring board, to be used as one of components of a variety of electronic devices.

A technique for manufacturing a transistor by using an oxide semiconductor film for a channel formation region, or the like has been attracting attention. Examples of such a transistor include a transistor in which zinc oxide (ZnO) is used as an oxide semiconductor film and a transistor in which InGaO3(ZnO)mis used as an oxide semiconductor film.

Patent Document 1 discloses a three-layer structure in which a first multi-component oxide semiconductor layer is provided over a substrate, a one-component oxide semiconductor layer is stacked over the first multi-component oxide semiconductor layer, and a second multi-component oxide semiconductor layer is stacked over the one-component oxide semiconductor layer.

Non-Patent Document 1 discloses a transistor having a stack of oxide semiconductors.

REFERENCE

Patent Document

[Patent Document 1] Japanese Published Patent Application No. 2011-155249

Non-Patent Document

[Non-Patent Document 1] Arokia Nathan et al., “Amorphous Oxide TFTs: Progress and issues”, SID 2012 Digest pp. 1-4.

SUMMARY OF THE INVENTION

The electrical characteristics of a transistor including an oxide semiconductor layer are varied by influence of an insulating film in contact with the oxide semiconductor layer, that is, by an interface state between the oxide semiconductor layer and the insulating film.

For example, in the case where an insulating film containing silicon is used as the insulating film, when the oxide semiconductor layer is deposited on the silicon oxide film by a sputtering method, silicon might enter the oxide semiconductor layer at the time of the sputtering. In the structure of Non-Patent Document 1, an oxide semiconductor functioning as a channel is in contact with silicon oxide, and thus silicon, which is a constituent atom of the silicon oxide film, might enter the channel, as an impurity. When an impurity such as silicon enters the oxide semiconductor layer, the field-effect mobility of the transistor might decrease.

Further, when a silicon nitride film is used as the insulating film, many carriers flow through the interface between the silicon nitride film and the oxide semiconductor layer, and thus it is difficult to obtain transistor characteristics.

An object of one embodiment of the present invention is to provide a structure of a transistor having high field-effect mobility.

Thus, in order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film containing silicon, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film containing silicon is employed. Further, in the case where an oxide semiconductor layer is provided over a base insulating film and a gate insulating film is provided over the oxide semiconductor layer, in order that the oxide semiconductor layer through which carriers flow is not in contact with the base insulating film containing silicon, it is preferable to employ a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the base insulating film containing silicon.

Specifically, as illustrated inFIG. 1A, a first oxide semiconductor film403a, a second oxide semiconductor film403b, and a third oxide semiconductor film403care stacked in this order, and the second oxide semiconductor film403bis made to an n-type in order that a conduction band offset (Ec) in an energy band diagram (schematic diagram) illustrated inFIG. 1Bis greater than or equal to 0.05 eV and preferably greater than or equal to 0.1 eV. The energy band diagram inFIG. 1Bis an energy band which corresponds to a portion between C and C′ inFIG. 1A. Note that the energy band diagram illustrated inFIG. 1Bis mealy an example and thus does not limit the present invention. Any structure of the energy band diagram may be employed as long as the energy level of the bottom of the conduction band in a second oxide semiconductor layer S2is lower than those of the bottoms of the conduction band in a first oxide semiconductor layer S1and a third oxide semiconductor layer S3.

As a way to make the second oxide semiconductor layer S2an n-type, the second oxide semiconductor layer S2is deposited by a sputtering method in a mixed atmosphere containing nitrogen or dinitrogen monoxide. As another way to make the second oxide semiconductor layer S2an n-type, deposition is performed using a sputtering target containing a very small amount of boron or phosphorus so that the second oxide semiconductor layer S2contains boron or phosphorus.

As a material of the first oxide semiconductor layer S1, a material which can be represented as M1aM2bM3cOx(a is a real number greater than or equal to 0 and less than or equal to 2, b is a real number greater than 0 and less than or equal to 5, c is a real number greater than or equal to 0 and less than or equal to 5, and x is an arbitrary real number) is used. Ga, Mg, Hf, Al, Zr, Sn, or the like can be used as the constituent element M2to function as a stabilizer for reducing the number of oxygen vacancies in an oxide semiconductor. As another stabilizer, one or plural kinds of lanthanoid such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu) may be contained. As the constituent element M1, indium or the like is used. As the constituent element M3, zinc or the like is used.

Typically, for the first oxide semiconductor layer S1, a gallium oxide film, a gallium zinc oxide film, or a material film in which the content of the constituent element M2is higher than the content of the constituent element M1is used. For example, an In—Ga—Zn-based oxide film which is deposited using a sputtering target having any of atomic ratios of In:Ga:Zn=1:3:2, In:Ga:Zn=1:4:2, and In:Ga:Zn=1:5:4 is used. In forming the first oxide semiconductor layer, deposition is preferably performed by a sputtering method in a mixed atmosphere containing more oxygen than a rare gas and more preferably in an oxygen atmosphere (oxygen: 100%), and the resulting oxide semiconductor layer can also be referred to as a first I-type oxide semiconductor layer. The first I-type oxide semiconductor layer is a highly purified oxide semiconductor layer that contains impurities other than the main components of the oxide semiconductor layer as little as possible and is an I-type (intrinsic) oxide semiconductor or close thereto. In such an oxide semiconductor layer, the Fermi level (Ef) can be at the same level as the intrinsic Fermi level (Ei).

For the second oxide semiconductor layer S2, a material which can be represented as M4dM5eM6yOx(d is a real number greater than 0 and less than or equal to 5, e is a real number greater than or equal to 0 and less than or equal to 3, f is a real number greater than 0 and less than or equal to 5, and x is an arbitrary positive number) is used. Ga, Mg, Hf, Al, Zr, Sn, or the like can be used as the constituent element M5to function as a stabilizer for reducing the number of oxygen vacancies in an oxide semiconductor. As another stabilizer, one or plural kinds of lanthanoid such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu) may be contained. As the constituent element M4, indium or the like is used. As the constituent element M6, zinc or the like is used. Typically, a material film in which the content of the constituent element M4is higher than the content of the constituent element M5is used. For example, an In—Ga—Zn-based oxide film which is deposited using a sputtering target having an atomic ratio of In:Ga:Zn=3:1:2 is used. In forming the second oxide semiconductor layer, deposition is preferably performed by a sputtering method in a mixed atmosphere containing nitrogen or a mixed atmosphere containing dinitrogen monoxide, and the resulting oxide semiconductor layer is also referred to as an N-type oxide semiconductor layer. Note that the N-type oxide semiconductor layer has higher carrier density and higher conductivity a than the first I-type oxide semiconductor layer.

For the third oxide semiconductor layer S3, a material which can be represented as M7gM8hM9iOx(g is a real number greater than or equal to 0 and less than or equal to 2, h is a real number greater than 0 and less than or equal to 5, i is a real number greater than or equal to 0 and less than or equal to 5, and x is an arbitrary real number) is used. Ga, Mg, Hf, Al, Zr, Sn, or the like can be used as the constituent element M8to function as a stabilizer for reducing the number of oxygen vacancies in an oxide semiconductor. As another stabilizer, one or plural kinds of lanthanoid such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu) may be contained. As the constituent element M7, indium or the like is used. As the constituent element M9, zinc or the like is used. Typically, a material film in which the content of the constituent element M7is substantially equal to the content of the constituent element M8is used. For example, an In—Ga—Zn-based oxide film which is deposited using a sputtering target having an atomic ratio of In:Ga:Zn=1:1:1 is used. In forming the third oxide semiconductor layer, deposition is preferably performed by a sputtering method in a mixed atmosphere containing more oxygen than a rare gas and preferably in an oxygen atmosphere (oxygen: 100%), and the resulting oxide semiconductor layer can also be referred to as a second I-type oxide semiconductor layer.

Note that the materials of the first and second oxide semiconductor layers S1and S2may be selected so that the energy level of the bottom of the conduction band in the second oxide semiconductor layer S2is lower than that of the bottom of the conduction band in the first oxide semiconductor layer S1, and the compositions of the above materials may be adjusted as appropriate.

Further, the materials of the second and third oxide semiconductor layers S2and S3may be selected so that the energy level of the bottom of the conduction band in the second oxide semiconductor layer S2is lower than that of the bottom of the conduction band in the third oxide semiconductor layer S3, and the compositions of the above materials may be adjusted as appropriate.

The second oxide semiconductor layer S2, the S1, and the S3have at least one common constituent element.

In the case where a transistor is formed in which the conductivity of the second oxide semiconductor layer S2is increased using such a three-layer structure, a distance between the second oxide semiconductor layer S2and a drain electrode, i.e., the thickness of the third oxide semiconductor layer S3becomes dominant, so that a channel length L apparently becomes smaller in the forward direction, and an on-state current can be increased. In the reverse direction, the third oxide semiconductor layer S3is depleted and a sufficiently small off state current can be achieved.

In a structure of one embodiment of the present invention disclosed in this specification, between two oxide semiconductor layers, an oxide semiconductor layer which has higher conductivity a than the two oxide semiconductor layers may be provided, and an example of the structure is a transistor418illustrated inFIG. 1A. Note that the cross-sectional view of the transistor418inFIG. 1Acorresponds to a structural view taken along a chain line A1-A2in a top view inFIG. 1C.FIG. 1Dillustrates a cross-sectional view taken along a dotted line A2-A3inFIG. 1C.

A structure of one embodiment of the present invention disclosed in this specification is a semiconductor device including a first insulating layer over an insulating surface, a first oxide semiconductor layer over the first insulating layer, a second oxide semiconductor layer over the first oxide semiconductor layer, a third oxide semiconductor layer over the second oxide semiconductor layer, and a second insulating layer over the third oxide semiconductor layer. The second oxide semiconductor layer has higher conductivity than the third oxide semiconductor layer and the first oxide semiconductor layer.

In the above structure, to increase the conductivity of the second oxide semiconductor layer, the second oxide semiconductor layer is made to have a higher nitrogen concentration, boron concentration, or phosphorus concentration than the third oxide semiconductor layer and the first oxide semiconductor layer. An atmosphere containing nitrogen or dinitrogen monoxide may be used for depositing the second oxide semiconductor layer, whereby the second oxide semiconductor layer having high conductivity a may be obtained.

In the above structure, as illustrated inFIG. 1A, the thickness of the first oxide semiconductor film403ais set larger than that of each of the second oxide semiconductor film403band the third oxide semiconductor film403c, whereby influence of diffusion of silicon or the like contained in the base film is reduced.

In the above structure, the side surface of the second oxide semiconductor layer may be covered with the third oxide semiconductor layer. The structure in which the side surface of the second oxide semiconductor layer is not in direct contact with a source electrode layer or a drain electrode layer can lead to a reduction in leakage current.

In the above structure, the first insulating layer is an insulating film containing silicon, and the second insulating layer is an insulating film containing gallium. As illustrated inFIG. 1D, an insulating film402formed using an insulating film containing gallium is provided to cover and be in contact with the side surface of the second oxide semiconductor film403b, whereby leakage current can be reduced.

In the case of a top-gate transistor, a gate electrode layer is further provided over the second insulating layer in the above structure. Although the transistor418inFIG. 1Ais a top-gate transistor, one embodiment of the present invention is not particularly limited to the top-gate transistor inFIG. 1A.

FIG. 16Aillustrates another example of a top-gate transistor. To obtain a buried channel structure, specifically, the first oxide semiconductor layer S1, the second oxide semiconductor layer S2, and the third oxide semiconductor layer S3are stacked in this order, and an oxide semiconductor material having high conductivity a is used for a channel formation region103billustrated inFIG. 16Bfor the purpose of obtaining an energy difference greater than or equal to 0.05 eV, preferably greater than or equal to 0.1 eV in an energy band diagram (schematic diagram) inFIG. 16C. Note that the energy band diagram illustrated inFIG. 16Cis mealy an example and thus does not limit the present invention. Any structure of the energy band diagram may be employed as long as the energy level of the bottom of the conduction band in the second oxide semiconductor layer S2is lower than those of the bottoms of the conduction band in the first oxide semiconductor layer S1and the third oxide semiconductor layer S3.

As a way to increase the conductivity a of the second oxide semiconductor layer S2overlapping with a gate electrode layer101, the second oxide semiconductor layer S2is deposited by a sputtering method in an atmosphere containing nitrogen or dinitrogen monoxide. As another way to increase the conductivity a of the second oxide semiconductor layer S2, deposition is performed using a sputtering target containing a very small amount of boron or phosphorus so that the second oxide semiconductor layer S2contains boron or phosphorus.

The third oxide semiconductor layer S3is formed to overlap with the gate electrode layer101, and low-resistance regions104cand108cwhich do not overlap with the gate electrode layer101are n-type. In order that the low-resistance regions104cand108cnot overlapping with the gate electrode layer101are electrically connected to a source electrode layer and a drain electrode layer, the low-resistance regions104cand108care preferably regions having low resistance. Further, the low-resistance regions104cand108care preferably formed in a self-aligned manner using the gate electrode layer101as a mask.

As a way to form the low-resistance regions104cand108cthat are n-type, the gate electrode layer101is used as a mask, and the low-resistance regions104cand108care formed by addition of nitrogen, boron, or phosphorus in a self-aligned manner by an ion implantation method. As another way to form the low-resistance regions that are n-type, a nitride insulating film (typically, a silicon nitride film107) is formed in contact with the third oxide semiconductor layer S3or the third oxide semiconductor layer S3is subjected to nitrogen plasma treatment.

Another structure of one embodiment of the present invention disclosed in this specification is a semiconductor device including a first insulating layer over an insulating surface, a first oxide semiconductor layer over the first insulating layer, a second oxide semiconductor layer over the first oxide semiconductor layer, a third oxide semiconductor layer over the second oxide semiconductor layer, a second insulating layer on and in contact with the third oxide semiconductor layer, a gate electrode layer over the second insulating layer, and a third insulating layer on and in contact with the third oxide semiconductor layer. The second oxide semiconductor layer has a smaller thickness than the first oxide semiconductor layer and the third oxide semiconductor layer.

In the above structure, a region of the third oxide semiconductor layer which is in contact with the third insulating layer has low crystallinity and has a higher nitrogen concentration than a region of the third oxide semiconductor layer which is in contact with the second insulating layer. The region of the third oxide semiconductor layer which is in contact with the second insulating layer overlaps with a channel formation region of the second oxide semiconductor layer. The third insulating layer is a silicon nitride film, and thus the region of the third oxide semiconductor layer which is in contact with the third insulating layer can have a higher nitrogen concentration than the region of the third oxide semiconductor layer which is in contact with the second insulating layer. To further reduce resistance, phosphorus, boron, or nitrogen may be added to the region of the third oxide semiconductor layer which is in contact with the second insulating layer by an ion implantation method using the gate electrode layer as a mask. The third oxide semiconductor layer is preferably formed using a film having a crystalline structure. The region of the third oxide semiconductor layer which overlaps with the gate electrode layer has a crystalline structure and the region of the third oxide semiconductor layer to which phosphorus, boron, or nitrogen is added by an ion implantation method is a region having low crystallinity.

In the above structure, the third insulating layer may be provided as a sidewall provided on a side surface of the gate electrode layer.

In the above structure, to prevent generation of a parasitic channel, a taper angle formed by an end surface of the first oxide semiconductor layer and a surface of the first insulating layer is preferably greater than or equal to 10° and less than or equal to 60°. A taper angle formed by an end surface of the second oxide semiconductor layer and the surface of the first insulating layer is preferably greater than or equal to 10° and less than or equal to 60°. A taper angle formed by an end surface of the third oxide semiconductor layer and the surface of the first insulating layer is preferably greater than or equal to 10° and less than or equal to 60°.

In the above structure, the side surface of the second oxide semiconductor layer may be covered with the third oxide semiconductor layer. The structure in which the side surface of the second oxide semiconductor layer is not in direct contact with the source electrode layer or the drain electrode layer can lead to a reduction in leakage current.

In the case of a dual-gate transistor in which gate electrode layers are provided over and below the oxide semiconductor layers, the first gate electrode layer is provided between the insulating surface and the first insulating layer, and the second gate electrode layer is provided over the second insulating layer.

Each of the oxide semiconductor layers is deposited under the following conditions: a sputtering target which is polycrystalline and whose relative density (filling rate) is high is used; the sputtering target in deposition is sufficiently cooled to a room temperature; the temperature of a surface where the oxide semiconductor layer is to be deposited of a substrate where the oxide semiconductor layer is to be deposited (a deposition-target substrate) is increased to a room temperature or higher; and an atmosphere in a deposition chamber hardly contains moisture or hydrogen.

The higher density of the sputtering target is more preferable. When the density of the sputtering target is increased, the density of a film to be deposited can also be increased. Specifically, the relative density (filling rate) of the sputtering target is higher than or equal to 90% and lower than or equal to 100%, preferably higher than or equal to 95%, more preferably higher than or equal to 99.9%. Note that the relative density of the sputtering target refers to a ratio between the density of the sputtering target and the density of a material free of porosity having the same composition as the sputtering target.

The sputtering target is preferably sintered in an inert gas atmosphere (a nitrogen or rare gas atmosphere), in vacuum, or in a high-pressure atmosphere. As a sintering method, an atmospheric sintering method, a pressure sintering method, or the like is used as appropriate. A polycrystalline target obtained by any of these methods is used as a sputtering target. As the pressure sintering method, a hot pressing method, a hot isostatic pressing (HIP) method, a discharge plasma sintering method, or an impact method is preferably used. Although the maximum temperature at which sintering is performed is selected depending on the sintering temperature of the sputtering target material, it is preferably set to approximately 1000° C. to 2000° C., or more preferably, 1200° C. to 1500° C. Although the holding time of the maximum temperature is selected depending on the sputtering target material, 0.5 hours to 3 hours is preferable.

In the case where an In-Ga—Zn-base oxide film is deposited, a sputtering target having any of atomic ratios of In:Ga:Zn=3:1:2, In:Ga:Zn=1:1:1, and In:Ga:Zn=1:3:2 is used as the sputtering target.

Reduction of impurities remaining in the deposition chamber is also important for forming a dense film. The back pressure (ultimate vacuum: degree of vacuum before introducing a reaction gas) in a deposition chamber is set to be lower than or equal to 5×10−3Pa, preferably 6×10−5Pa, and pressure in deposition is set to be lower than 2 Pa, preferably lower than or equal to 0.4 Pa. When the back pressure is set to be low, impurities in the deposition chamber are reduced.

Reduction of impurities in a gas to be introduced in the deposition chamber, i.e., a gas to be used in deposition, is also important for forming a dense film. Further, it is important to increase the proportion of oxygen contained in a deposition gas and optimize power. By increasing the proportion of oxygen (the upper limit: 100% oxygen) contained in the deposition gas and optimizing the power, plasma damage in deposition can be alleviated. Thus, a dense film is easily formed.

Deposition of the oxide semiconductor film is preferably performed while a quadrupole mass analyzer (hereinafter also referred to as Q-mass) is operated continuously in order that the amount of moisture in the deposition chamber, or the like is monitored by the Q-mass before or in deposition.

The oxide semiconductor film is in a single crystal state, a polycrystalline (also referred to as polycrystal) state, an amorphous state, or the like.

When the temperature of a deposition-target substrate, which is an example of deposition conditions, is set to be higher than or equal to 200° C., a dense oxide semiconductor film including a crystal part, i.e., a c-axis aligned crystalline oxide semiconductor (CAAC-O5) film can be obtained.

First, the CAAC-OS film is described.

The CAAC-OS film is one of oxide semiconductor films including a plurality of crystal parts, and most of each crystal part fits inside a cube whose one side is less than 100 nm. Thus, there is a case where a crystal part included in the CAAC-OS film fits a cube whose one side is less than 10 nm, less than 5 nm, or less than 3 nm.

In a transmission electron microscope (TEM) image of the CAAC-OS film, a boundary between crystal parts, that is, a grain boundary is not clearly observed. Thus, in the CAAC-OS film, a reduction in electron mobility due to the grain boundary is less likely to occur.

According to the TEM image of the crystal parts included in the CAAC-OS film observed in a direction substantially parallel to a sample surface (cross-sectional TEM image), metal atoms are arranged in a layered manner in the crystal parts. Each metal atom layer has a morphology reflected by a surface over which the CAAC-OS film is formed (hereinafter, a surface over which the CAAC-OS film is formed is referred to as a formation surface) or a top surface of the CAAC-OS film, and is arranged in parallel to the formation surface or the top surface of the CAAC-OS film.

On the other hand, according to the TEM image of the CAAC-OS film observed in a direction substantially perpendicular to the sample surface (plan TEM image), metal atoms are arranged in a triangular or hexagonal configuration in the crystal parts. However, there is no regularity of arrangement of metal atoms between different crystal parts.

From the results of the cross-sectional TEM image and the plan TEM image, alignment is found in the crystal parts in the CAAC-OS film.

A CAAC-OS film is subjected to structural analysis with an X-ray diffraction (XRD) apparatus. For example, when the CAAC-OS film including an InGaZnO4crystal is analyzed by an out-of-plane method, a peak appears frequently when the diffraction angle (2θ) is around 31°. This peak is derived from the (009) plane of the InGaZnO4crystal, which indicates that crystals in the CAAC-OS film have c-axis alignment, and that the c-axes are aligned in a direction substantially perpendicular to the formation surface or the top surface of the CAAC-OS film.

On the other hand, when the CAAC-OS film is analyzed by an in-plane method in which an X-ray enters a sample in a direction perpendicular to the c-axis, a peak appears frequently when 2θ is around 56°. This peak is derived from the (110) plane of the InGaZnO4crystal. Here, analysis (ϕ scan) is performed under conditions where the sample is rotated around a normal vector of a sample surface as an axis (ϕ axis) with 2θ fixed at around 56°. In the case where the sample is a single-crystal oxide semiconductor film of InGaZnO4, six peaks appear. The six peaks are derived from crystal planes equivalent to the (110) plane. On the other hand, in the case of a CAAC-OS film, a peak is not clearly observed even when 0 scan is performed with 2θ fixed at around 56°.

According to the above results, in the CAAC-OS film having c-axis alignment, while the directions of a-axes and b-axes are different between crystal parts, the c-axes are aligned in a direction parallel to a normal vector of a formation surface or a normal vector of a top surface. Thus, each metal atom layer arranged in a layered manner observed in the cross-sectional TEM image corresponds to a plane parallel to the a-b plane of the crystal.

Note that the crystal part is formed concurrently with deposition of the CAAC-OS film or is formed through crystallization treatment such as heat treatment. As described above, the c-axis of the crystal is aligned in a direction parallel to a normal vector of a formation surface or a normal vector of a top surface of the CAAC-OS film. Thus, for example, in the case where a shape of the CAAC-OS film is changed by etching or the like, the c-axis might not be necessarily parallel to a normal vector of a formation surface or a normal vector of a top surface of the CAAC-OS film.

In this specification, a term “parallel” indicates that the angle formed between two straight lines is greater than or equal to −10° and less than or equal to 10°, and accordingly also includes the case where the angle is greater than or equal to −5° and less than or equal to 5°. In addition, a term “perpendicular” indicates that the angle formed between two straight lines is greater than or equal to 80° and less than or equal to 100°, and accordingly includes the case where the angle is greater than or equal to 85° and less than or equal to 95°.

Further, the degree of crystallinity in the CAAC-OS film is not necessarily uniform. For example, in the case where crystal growth leading to the CAAC-OS film occurs from the vicinity of the top surface of the film, the degree of the crystallinity in the vicinity of the top surface is higher than that in the vicinity of the formation surface in some cases. Further, when an impurity is added to the CAAC-OS film, the crystallinity in a region to which the impurity is added is changed, and the degree of crystallinity in the CAAC-OS film varies depends on regions.

Note that when the CAAC-OS film with an InGaZnO4crystal is analyzed by an out-of-plane method, a peak of 2θ may also be observed at around 36°, in addition to the peak of 2θ at around 31°. The peak of 2θ at around 36° is derived from the (311) plane of a ZnGa2O4crystal; such a peak indicates that a ZnGa2O4crystal is included in part of the CAAC-OS film including the InGaZnO4crystal. It is preferable that in the CAAC-OS film, a peak of 2θ appear at around 31° and a peak of 2θ do not appear at around 36°.

The CAAC-OS film is an oxide semiconductor film having a low impurity concentration. The impurity is any of elements which are not the main components of the oxide semiconductor film and includes hydrogen, carbon, silicon, a transition metal element, and the like. In particular, an element (e.g., silicon) which has higher bonding strength with oxygen than a metal element included in the oxide semiconductor film causes disorder of atomic arrangement in the oxide semiconductor film because the element deprives the oxide semiconductor film of oxygen, thereby reducing crystallinity. Further, a heavy metal such as iron or nickel, argon, carbon dioxide, and the like have a large atomic radius (or molecular radius); therefore, when any of such elements is contained in the oxide semiconductor film, the element causes disorder of the atomic arrangement of the oxide semiconductor film, thereby reducing crystallinity. Note that the impurity contained in the oxide semiconductor film might become a carrier trap or a source of carriers.

The CAAC-OS film is an oxide semiconductor film having a low density of defect states. For example, oxygen vacancies in the oxide semiconductor film serve as carrier traps or serve as carrier generation sources when hydrogen is captured therein.

The state in which impurity concentration is low and density of defect states is low (the number of oxygen vacancies is small) is referred to as “highly purified intrinsic” or “substantially highly purified intrinsic”. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier generation sources, and thus has a low carrier density in some cases. Thus, in some cases, a transistor including the oxide semiconductor film in a channel formation region rarely has a negative threshold voltage (is rarely normally-on). A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier traps. Accordingly, the transistor including the oxide semiconductor film has little variation in electrical characteristics and high reliability. A charge trapped by the carrier traps in the oxide semiconductor film takes a long time to be released. The trapped charge may behave like a fixed charge. Thus, the transistor including the oxide semiconductor film with a high impurity concentration and a high density of defect states has unstable electrical characteristics in some cases.

Since the c-axes of the crystal parts included in the CAAC-OS film are aligned in the direction parallel to a normal vector of a surface where the CAAC-OS film is formed or a normal vector of a surface of the CAAC-OS film, the directions of the c-axes may be different from each other depending on the shape of the CAAC-OS film (the cross-sectional shape of the surface where the CAAC-OS film is formed or the cross-sectional shape of the surface of the CAAC-OS film). Note that when the CAAC-OS film is formed, the direction of c-axis of the crystal part is the direction parallel to a normal vector of the surface where the CAAC-OS film is formed or a normal vector of the surface of the CAAC-OS film. The crystal part is formed by deposition using a sputtering target or by performing treatment for crystallization such as heat treatment after deposition.

During deposition, fine sputtering particles fly from a sputtering target, and a film is formed so that the sputtering particles adhere onto the deposition-target substrate. When the temperature of the substrate is higher than or equal to 200° C., the sputtering particles are rearranged because the substrate is heated. Thus, a dense film is formed.

A phenomenon in the deposition is described in detail usingFIGS. 12A to 12C,FIGS. 13Aand13B, andFIGS. 14A to 14C.

When ions collide with the surface of the sputtering target, the crystal region included in the sputtering target is cleaved along an a-b plane, and sputtered particles whose top and bottom surfaces are each aligned with a layer parallel to the a-b plane (flat-plate-like sputtered particle or pellet-like sputtered particle) are separated from the sputtering target. Assuming that the crystalline particle which is sputtered from a surface of a sputtering target2002and released has c-axis alignment and is a flat-plate-like sputtered particle2001as illustrated inFIG. 12A, a schematic model diagram inFIG. 12Bcan be obtained. The flat-plate-like sputtered particle is preferably in a state illustrated inFIG. 12C, i.e., is preferably the one with an outermost surface of a (Ga or Zn)O plane.

When the oxygen flow rate is high and the pressure in a chamber2003is high during deposition, as illustrated inFIG. 13A, oxygen ions are attached onto the flat-plate-like sputtered particle and the sputtered particle can have a large amount of oxygen on its surface. Another flat-plate-like sputtered particle is stacked thereover before the attached oxygen is released; therefore, as illustrated inFIG. 14C, a large amount of oxygen can be contained in the film. The oxygen adsorbed on the surface contributes to a reduction in the number of oxygen vacancies in the oxide semiconductor film.

To form an oxide semiconductor film having a crystalline region with c-axis alignment, it is preferable to increase the substrate temperature at the deposition. However, when the substrate temperature is higher than 350° C., the oxygen adsorbed on the surface might be released as illustrated inFIG. 13B. Therefore, when the substrate temperature is set to higher than or equal to 150° C. and lower than or equal to 350° C. and preferably higher than or equal to 160° C. and lower than or equal to 230° C. and only an oxygen gas is used as a deposition gas, an oxide semiconductor film having a crystalline region with c-axis alignment, i.e., a CAAC-OS film, can be obtained.

FIG. 14Ais a model of a process in the deposition, in which one flat-plate-like sputtered particle reaches a surface of a substrate2000to be stabilized. As illustrated inFIG. 14A, the flat-plate-like sputtered particle reaches the substrate surface while keeping its crystalline state, whereby formation of a CAAC-OS film is facilitated. Further, when flat-plate-like sputtered particles are stacked as illustrated inFIG. 14B, formation of a CAAC-OS film is facilitated. Note that the CAAC-OS film is a film which contains a large amount of oxygen and has a reduced number of oxygen vacancies as illustrated inFIG. 14C.

In the CAAC-OS film over the substrate2000, a series of about 2 to 20 indium atoms exist in a lateral direction to form a layer including indium atoms. Note that in some cases, the layer has a series of 20 or more indium atoms; for example, the layer may have a series of 2 to 50 indium atoms, 2 to 100 indium atoms, or 2 to 500 indium atoms in a lateral direction.

Layers including indium atoms overlap with each other. The number of layers is greater than or equal to 1 and less than or equal to 20, greater than or equal to 1 and less than or equal to 10, or greater than or equal to 1 and less than or equal to 4.

As described above, a stack of the layers including indium atoms often appears to be a cluster including several indium atoms in a lateral direction and several layers in a longitudinal direction. This is because each of the sputtering particles has a flat-plate-like shape.

By increasing the temperature of the deposition-target substrate, migration of sputtering particles is likely to occur on a substrate surface. With this effect, a flat-plate-like sputtered particle reaches the substrate surface, moves slightly, and then is attached to the substrate surface with a flat plane (a-b plane) of the sputtered particle facing toward the substrate surface. Therefore, an oxide semiconductor film having a crystal region which is c-axis-aligned perpendicularly to the surface of the oxide semiconductor film is easily formed.

Further, heat treatment at a temperature of higher than or equal to 200° C. may be performed after the deposition of the oxide semiconductor film, so that a denser film is obtained. However, in that case, oxygen vacancies might be generated when impurity elements (e.g., hydrogen and water) in the oxide semiconductor film are reduced. Therefore, before the heat treatment is performed, an insulating layer containing excess oxygen is preferably provided over or below the oxide semiconductor film, in which case oxygen vacancies in the oxide semiconductor film can be reduced by the heat treatment.

An oxide semiconductor film shortly after deposition is made dense; thus, a dense film which is thin and close to single crystal can be obtained. Since oxygen, hydrogen, or the like hardly diffuses within the film, a semiconductor device including a dense oxide semiconductor film can achieve improvement in reliability.

It is preferable that a CAAC-OS film be used for at least the second oxide semiconductor layer and the channel formation region overlapping with the gate electrode layer be formed with the CAAC-OS film. In the case where a CAAC-OS film is used for the first oxide semiconductor layer, since the first oxide semiconductor layer has the same crystal structure as the second oxide semiconductor layer, the number of levels can be small at the interface thereof, so that high field-effect mobility can be achieved. Further, it is preferable that the second oxide semiconductor layer be formed on and in contact with the first oxide semiconductor layer that is a CAAC-OS film because the second oxide semiconductor layer formed over the first oxide semiconductor layer is easily crystallized using the first oxide semiconductor layer as a crystal seed, so that the first and second oxide semiconductor layers can have the same crystal structure.

A transistor having high field-effect mobility can be obtained.

