BACKGROUND OF THE INVENTION

1). Field of the Invention

This invention relates to an apparatus that is used for full-wafer testing and/or burn-in testing and/or built-in self-testing.

2). Discussion of Related Art

Microelectronic circuits are usually fabricated in and on semiconductor wafers. Such a wafer is subsequently “singulated” or “diced” into individual dies. Such a die is typically mounted to a supporting substrate for purposes of providing rigidity thereto and electronic communication with an integrated or microelectronic circuit of the die. Final packaging may include encapsulation of the die and the resulting package can then be shipped to a customer.

It is required that the die or the package be tested before being shipped to a customer. Ideally, the die should be tested at an early stage for the purposes of identifying the defects that occur during early stage manufacturing.

The earliest stage that a die can be tested is after completion of the manufacture of circuits at wafer level and before a wafer is singulated. Full wafer testing carries with it a number of challenges. One challenge in full wafer testing is that there are a large amount of contacts on a wafer and that a large number of power, ground, and signal connections thus have to be made.

SUMMARY OF THE INVENTION

The invention provides a contactor assembly, including a contactor support structure, a plurality of terminals, held by the contactor support structure, for contacting respective contacts of a device under test, at least first and second interfaces, on the contactor support structure, each having at least one row of contacts for contacting a respective terminal of a connector, the rows of the contacts of the interfaces being at an angle between 0 degrees and 180 degrees relative to one another, and a plurality of conductors, held by the contactor support structure, connecting the contacts of the interfaces and the terminals on the contactor support structure to one another.

The angle may be substantially 90 degrees.

The contactor assembly may comprise at least a third of said interfaces, wherein the row of contacts of the third interface is between the row of contacts of the first interface and the terminals held by the contactor support structure.

The rows of contacts of the first and third interfaces may be substantially parallel to one another.

The contactor support structure may have two threaded openings at opposing ends of each interface, for securing the respective connectors to the contactor support structure.

The contactor support structure may include a distribution substrate and a circular contactor substrate secured to the distribution substrate, the terminals held by the contactor support structure being held by the contactor substrate and the contacts on the contactor support structure being on the distribution substrate.

The invention also provides a contactor assembly, including a contactor support structure, a plurality of terminals, held by the contactor support structure, for contacting respective contacts of a device under test, at least first and second interfaces, on the contactor support structure, each having at least one row of contacts for contacting a respective terminal of a connector, the row of contacts of the second interface being between the row of contacts of the first interface and the terminals held by the contactor support structure, and a plurality of conductors, held by the contactor support structure, connecting the contacts of the interfaces and the terminals on the contactor support structure to one another.

The contactor assembly may comprise at least a third of said interfaces, wherein the row of contacts of the second interface is between the row of contacts of the first interface and the terminals held by the contactor support structure.

The contactor support structure may have two threaded openings at opposing ends of each interface, for securing the respective connectors to the contactor support structure.

The invention further provides a contactor assembly, including a contactor support structure, a plurality of terminals, held by the contactor support structure within an inner area of the contactor support structure, for contacting respective contacts of a device under test, a plurality of interfaces on the contactor support structure, each interface having at least one row of contacts for contacting a respective terminal of a connector, a combined length of the rows being more than a length of a periphery of the inner area, and a plurality of conductors, held by the contactor support structure, connecting the contacts of the interfaces and the terminals on the contactor support structure to one another.

The rows of the contacts of the interfaces may be at an angle between 0 degrees and 180 degrees relative to one another.

A row of contacts of a first of the interfaces may be between a row of contacts of a second of the interfaces.

The invention further provides an apparatus for testing an integrated circuit of a device, including an apparatus frame, a holder, having a surface against which the device is placed, mounted to the apparatus frame, a cartridge frame mounted to the apparatus frame, a contactor support structure, a contactor interface on the contactor support structure, a plurality of terminals held by the contactor support structure, a plurality of conductors, held by the contactor support structure, connecting the interface to the terminals, and an actuator connected between the cartridge frame and the contactor support structure, having first and second portions that are movable relative to one another to move the contactor support structure relative to the cartridge frame and toward the surface of the holder so that the terminals are urged against contacts of the device.

The first and second portions of the actuator may be a cylinder and a piston, respectively, the piston being located in the cylinder so that the cylinder and the piston jointly define a volume, further including a fluid line connected to the volume to modify a pressure of the volume and move the piston relative to the cylinder.

A travel sensor for measuring the movement of the contactor support relative to the cartridge frame may be provided.

The cartridge frame may include a lower backing plate and a support structure, and the travel sensor may include an outer portion attached to the support structure and an inner portion attached to the backing plate, and actuation of the actuator may cause the relative movement between the outer portion and the inner portion.

The travel sensor may measure the change of inductance or capacitance between the outer portion and the inner portion.

The invention further provides a cartridge, including a cartridge frame, formations on the cartridge frame for mounting the cartridge frame in a fixed position to an apparatus frame, a contactor support structure, a contactor interface on the contactor support structure, a plurality of terminals held by the contactor support structure, a plurality of conductors, held by the contactor support structure, connecting the interface to the terminals, and an actuator connected between the cartridge frame and the contactor support structure, having first and second portions that are movable relative to one another to move the contactor support structure relative to the cartridge frame.

The first and second portions of the actuator may use a cylinder and a piston, respectively, the piston being located in the cylinder so that the cylinder and the piston jointly define a volume, further including a fluid line connected to the volume to modify a pressure of the volume and move the piston relative to the cylinder.

A travel sensor for measuring the movement of the contactor support relative to the cartridge frame may be provided.

The cartridge frame may include a lower backing plate and a support structure, and the travel sensor may include an outer portion attached to the support structure and an inner portion attached to the backing plate, and actuation of the actuator may cause the relative movement between the outer portion and the inner portion.

The travel sensor may measure the change of inductance or capacitance between the outer portion and the inner portion.

The invention further provides a method of testing an integrated circuit of a device, including holding the device against a surface of a holder, actuating an actuator to move a contactor support structure relative to a frame and urge terminals on the contactor support structure against contacts on the device, and providing signals through the terminals and contacts to the integrated circuit.

The method further comprises moving the device with the holder relative to the frame in a direction toward the contactor support structure before urging the terminals against the contacts.

The method further comprises utilizing the actuator to move the terminals into contact with the contacts.

The actuator may include a cylinder and a piston in the cylinder, the piston being moved relative to the cylinder by changing a pressure on a surface of the cylinder.

The method may further include measuring the movement of the actuator.

The method may further include controlling the speed of movement of the actuator.

The invention further provides an apparatus for testing an integrated circuit of a device, including an apparatus frame; a holder, having a surface against which the device is placed, mounted to the apparatus frame; a cartridge frame mounted to the apparatus frame; a contactor support structure; a contactor interface on the contactor support structure; a plurality of terminals held by the contactor support structure; a plurality of conductors, held by the contactor support structure, connecting the interface to the terminals; a variable-force actuator connected between the cartridge frame and the contactor support structure, having first and second portions that are movable relative to one another to move the contactor support structure relative to the cartridge frame and toward the surface of the holder so that the terminals are urged against contacts of the device; and a travel sensor connected to the cartridge frame for measuring the movement of the cartridge frame relative to the apparatus frame.

The cartridge frame may include a lower backing plate and a support structure, and wherein the travel sensor may include an outer portion attached to the support structure and an inner portion attached to the backing plate, and wherein actuation of the actuator may cause the relative movement between the outer portion and the inner portion.

The device with the holder may be moveable relative to the frame in a direction toward the contactor support structure.

The variable-force actuator may include a piston.

The pressure of the piston may be set so that the piston is in the middle of its stroke when the terminals are urged against the contacts of the device.

The invention further includes an apparatus for testing an integrated circuit of a device, including an apparatus frame, an alignment formation on the apparatus frame, a holder, capable of holding the device, mounted to the apparatus frame, a cartridge frame, a contactor support structure mounted to the cartridge frame, a plurality of terminals on the contactor support structure, and a positioning formation on the cartridge frame, the positioning formation mating with the alignment formation to position the cartridge frame on the apparatus frame in a position wherein the terminals can make contact with contacts of the device upon movement of the terminals and the contacts relatively toward one another.

The apparatus comprises a plurality of alignment formations on the apparatus frame and a plurality of positioning formations on the cartridge frame, each mating with a respective one of the alignment formations.

The apparatus of further comprises a retaining mechanism releasably interconnecting the apparatus frame and the cartridge frame to prevent movement of the cartridge frame off the apparatus frame when the terminals are urged against the contacts.

The retaining mechanism may be remotely actuable.

The alignment formation may be an opening in the frame, the positioning formation being a positioning pin that is inserted into the opening, and the retaining formation engaging with a retaining formation on the positioning pin.

The apparatus further comprises an interface on the contactor support structure and a plurality of conductors interconnecting the terminals with contacts of the interface, and a flexible connector attached to the interface through which signals can be routed to the terminals and the contacts on the device.

The invention further provides a cartridge, including a cartridge frame, a plurality of positioning pins on the cartridge, each being insertable into a respective opening of an apparatus frame, and each having a retaining formation with which a retaining mechanism on the apparatus frame is engageable to secure the cartridge frame to the apparatus frame, a contactor support structure mounted to the cartridge frame, a plurality of terminals on the contactor support structure, each being positioned for contacting a respective contact of a device, an interface on the contactor support structure, and a plurality of conductors interconnecting the terminals with contacts of the interface.

The invention further provides a method for testing an integrated circuit of a device including moving a positioning formation toward an alignment formation to position a cartridge frame on an apparatus frame in a position wherein terminals of the cartridge frame can make contact with contacts of the device upon movement of the terminals and the contacts relatively toward one another; and engaging the positioning formation with the alignment formation.

The positioning formations may include a plurality of positioning pins insertable into a respective opening of the apparatus frame.

The positioning pins may include a retaining formation engageable with a retaining mechanism on the apparatus frame.

The invention further provides a connector system, including a first frame portion, a connector block support piece held by the first frame portion, a first connector block held by the connector block support piece, a plurality of terminals and contacts held by the first connector block, a first engagement component mounted to the connector block support piece, a second frame portion, a second connector block held by the second frame portion, a plurality of terminals and contacts held by the second connector block, a second engagement component mounted to the second frame portion, the second engagement component being releasably engageable with the first engagement component, and a component actuator connected to the second engagement component, the component actuator, upon actuation, causing movement of the second and first engagement components relative to the second frame portion, and movement of the connector block support piece relative to the first frame portion so that the contacts on the first connector block come into contact with the terminals on the second connector block.

The actuator may include a cylinder and a piston in the cylinder, the second engagement component being a shaft that extends from the cylinder and having an engagement formation thereon, wherein the first engagement component has an engagement formation thereon and is movable relative to the connector support piece between a first position, wherein the engagement formation on the first engagement component is disengaged from the engagement formation on the second engagement component, and a second position wherein the engagement formations of the first and second engagement components engage with one another.

The invention further provides a connector system, including a first frame portion, a second frame portion, a plurality of connector sets, each set including a connector block support piece held by the first frame portion, a first connector block held by the connector block support piece, a plurality of terminals and contacts held by the first connector block, a first engagement component mounted to the connector block support piece, a second connector block held by the second frame portion, a plurality of terminals and contacts held by the second connector block, a second engagement component mounted to the second frame portion, the second engagement component being releasably engageable with the first engagement component, and a component actuator connected to the second engagement component, and an engager which is movable between a disengaging position wherein the first engagement components are disengaged from the second engagement components, and an engaging position wherein the engager has moved the first engagement components into engagement with the second engagement components, the component actuator, upon actuation, causing movement of the second and first engagement components relative to the second frame portion, and movement of the connector block support piece relative to the first frame portion so that the contacts on the first connector block come into contact with the terminals on the second connector block.

The connector system further comprises an engager actuator connected to the engager, the engager actuator moving the engager between the engaging and disengaging positions.

The connector sets may be located in at least one row.

The invention further provides an engager including first engagement components connected with a first connector block having a plurality of contacts; second engagement components connected with a second connector block having a plurality of terminals; and an actuator to move the first engagement components from a disengaging position, wherein the first engagement components are disengaged from the second engagement components, to an engaging position wherein the first engagement components are engaged with the second engagement components to contact the contacts of the first connector block with the terminals of the second connector block.

The first engagement components may be mounted to a first connector block support piece, the first connector block support piece supporting the first connector block and wherein the second engagement components may be mounted to a second connector block support piece, the second connector block support piece supporting the first connector block.

The first engagement components may include slider pins, and wherein the second engagement components comprise slider openings corresponding to the slider pins.

The actuator may include a cylinder and a piston in the cylinder.

The actuator may include a cylinder and a piston in the cylinder, the second engagement component being a shaft that extends from the cylinder and having an engagement formation thereon, wherein the first engagement component has an engagement formation thereon and is movable relative to the connector support piece between a first position, wherein the engagement formation on the first engagement component is disengaged from the engagement formation on the second engagement component, and a second position wherein the engagement formations of the first and second engagement components engage with one another.

The invention further provides an apparatus for testing an integrated circuit of a device, including an apparatus frame having first, second, and third portions, a holder for the device mounted to the first portion of the apparatus frame, a plurality of first connector modules held by the second portion of the apparatus frame, each having a body and a plurality of terminals and contacts on the body, a contactor support structure, a plurality of terminals on the contactor support structure, the contactor support structure being positioned so that the terminals thereon can make contact with contacts on the device, a plurality of conductors connecting the terminals on the contactor support structure with the terminals of the first connector modules, and a plurality of second connector modules held by the third portion of the apparatus frame, each having a body and a plurality of terminals and contacts on the body, the contacts of the first connector modules being engageable with the terminals of the second connector modules.

The third portion of the apparatus frame may be movable relative to the second portion of the apparatus frame to move the second connector modules relatively toward the first connector modules.

The first connector modules may be located in an array having a plurality of rows and columns.

The first connector modules may be located over a first area and the terminals on the contactor support structure are located over a second area, the first area being larger than the second area.

The apparatus comprises a plurality of flexible ribbons, each including a flexible outer layer and a respective set of the conductors within the respective flexible outer layer.

The body of each respective first connector module may have a plurality of slots formed therein and the contacts of the first connector module are within the slots, and wherein each respective second connector module has a plurality of substrates held by the body of the second connector module and the terminals of the second connector module being located on the substrates, the substrates beirig insertable into the slots.

The invention further provides a cartridge, including a cartridge frame, a plurality of first connector modules held by the cartridge frame, each having a body and a plurality of terminals and contacts on the body, a contactor support structure mounted to the cartridge frame, a plurality of terminals, for contacting contacts on a device, on the contactor support structure, and a plurality of conductors connecting the terminals on the contactor support structure with the terminals of the first connector modules.

The first connector modules may be located in an array having a plurality of rows and columns.

The first connector modules may be located over a first area and the terminals on the contactor support structure are located over a second area, the first are being larger than the second area.

The cartridge comprises a plurality of flexible ribbon, each including a flexible outer layer and the conductors within the flexible outer layer.

The body of each respective first connector module may have a plurality of slots formed therein and the contacts of the first connector module are within the slots.

The invention further provides a method for testing an integrated circuit of a device including providing a plurality of first connector modules held by a portion of an apparatus frame, the plurality of first connector modules including a plurality of terminals and contacts; providing a plurality of second connector modules held by a different portion of the apparatus frame, the plurality of second connector modules including a plurality of terminals and contacts; and engaging the contacts of the first connector modules with the terminals of the second connector modules.

The portion of the apparatus frame holding the second connector modules may be moveable relative to the portion of the apparatus frame holding the first connector modules.

The invention also provides an apparatus for testing integrated circuits of a plurality of devices, comprising at least one holder to hold the plurality of devices, a tester system having a plurality of output channels and an interconnection scheme to connect the channels to a plurality of contacts of the plurality of devices, the contacts being connected to the integrated circuits, a computer system having memory, a test program stored in the memory, the test program having a series of instructions written for testing one of the devices, a configuration file stored in the memory, the configuration file representing a relationship between the channels and the contacts of the plurality of devices, and a test application that utilizes the test program and the configuration file to provide signals in accordance with the series of instructions of the test program through the channels and the interconnection scheme to the contacts of the plurality of devices and the integrated circuits.

The interconnection scheme may also include a plurality of configurable pattern generator boards, each representing a respective zone, the configuration file having a zone number field indicating a plurality of respective ones of the zones.

The interconnection scheme may also have a plurality of boards inserted into a plurality of slots, the configuration file having a slot number field indicating a plurality of respective ones of the slot numbers.

The configuration file may have channel, number, and pad labeled fields to represent the relationship between the channels and the contacts of the plurality of devices.

The devices may be located in rows and columns, the configuration file having column and row fields indicating the respective row and column of each respective die.

The interconnection scheme may have a line connected to a set of the devices and a plurality of respective select lines connected to respective ones of the devices of the set, further comprising a shared resources map in the memory, the shared resources map representing a relationship between the select lines and the devices of the set.

The select lines may be grouped into chip select states.

The shared resources map may form part of the configuration file.

The apparatus may further comprise a test results file stored in memory, and may have a processing application that utilizes the test results file and the configuration file to provide a test output and optional test input.

The test application may utilize the test results file to selectively modify signals in accordance with the series of instructions of the test program through the channels and the interconnection scheme to the contacts of the plurality of devices and the integrated circuits.

The test application may utilize the test results file to selectively modify the sequence of signals in accordance with the series of instructions of the test program through the channels and the interconnection scheme to the contacts of the plurality of devices and the integrated circuits.

The invention also provides a method of testing integrated circuits of a plurality of devices, comprising storing a test program having a series of instructions written for testing one of the devices, storing a configuration file representing a relationship between a plurality of channels and a plurality of contacts of the plurality of devices, and providing signals in accordance with the series of instructions of the test program through the channels to the plurality of contacts of the plurality of devices, utilizing the configuration file to map the series of instructions of the test program to the plurality of contacts of the plurality of devices.

The devices may be a portion of a wafer.

The method may further comprise uploading test results provided from the devices through the configuration scheme and utilizing the test results and the configuration file to prepare a test report.

The test results may be uploaded from memory on a plurality of boards including at least one driver board and at least one power board.

The test results may be used to modify the signals provided to the plurality of devices and the integrated circuits.

The test results may be used to modify the application of power provided to the plurality of devices and the integrated circuits.

The test results may be used to modify the signals provided to the plurality of devices and the integrated circuits to balance their power consumption.

The test results may be used to selectively sort devices into groups based upon their power consumption.

The test results may be used to modify the sequence of signals provided to the plurality of devices and the integrated circuits.

The invention may also include a software assembly method, comprising storing a plurality of net files, each net file having information representing a scheme of current passing through conductors of a respective electrical subassembly, providing an input of an interconnection scheme of a plurality of the electrical subassemblies connected to one another; and assembling a plurality of the net files based on the interconnection scheme to construct a configuration file having information representing flow of current through the electrical subassemblies of the interconnection scheme.

The input may be provided manually.

The electrical subassemblies may include pattern generator, driver, and power boards.

The electrical subassemblies may include a plurality of pattern generator, driver, and power boards divided into physical zones with each physical zone including one pattern generator board, at least one driver board, and at least one power board connected to one another.

The configuration file may have a zone name field indicating a plurality of respective ones of the physical zones.

Physical zones having the same zone name field may be grouped into a logical zone.

Thee electrical subassemblies in the logical zone may be of the same type and run the same test program at the same time.

The configuration file may have channel number and pad label fields to represent a relationship between channels and contacts of a plurality of devices.

The interconnection scheme may have a line connected to a set of the devices and a plurality of respective select lines connected to respective ones of the devices of the set, further comprising using the net files to construct a shared resources map representing a relationship between the select lines and the devices of the set.

The select lines may be grouped into chip select states.

The invention may include a software assembler application, comprising a plurality of net files, each file having information representing a scheme of current passing through conductors of a respective electrical sub assembly; an input module to provide an input of an interconnection scheme of a plurality of electrical sub assemblies, and an assembly module that assembles a plurality of the net files based on the interconnection scheme and constructs a configuration file having information representing flow of current through the electrical sub assemblies of the interconnection scheme.

The input module may include an interface with a list of selectable inputs.

The interface may allow an operator to select the input of the interconnection scheme.

The electrical subassemblies may be selected from one or more of the group consisting of a pattern generator board, driver board and a power board.

The input may include how the electrical subassemblies are to be connected to one another.

The invention may include an apparatus for testing a device having an integrated circuit, comprising a frame including a base portion, and test head and thermal system portions secured to the base portion, a holder secured to the base portion, the holder being capable of holding the device, a test head mounted to the test head portion in a position such that electric signals can be sent through the test head to the integrated circuit of the device, and a thermal system located in a position to cool components of the test head, and being mounted through the thermal system portion to the base portion.

The thermal system may be mounted through the thermal system portion to the base portion without being mounted to the test head portion.

The test head may include a test head support structure, a plurality of electric components mounted to the test head support structure, and a panel that forms a passage through which air can flow before flowing over the electric components.

The electric components may be boards, the test head support structure having a plurality of slots that hold the boards.

The thermal system may include a shell through which the air can flow and at least one heat dissipation device in the shell, the shell forming an interface with the panel, with a gap being defined between the shell and the panel.

The heat dissipation device may include a plurality of fins over which the air flows.

The thermal system may include a fan that moves the air through the shell.

The thermal system may include a variable frequency drive to vary the speed of the fan.

The thermal system may include a thermocouple in the test head portion, and wherein the variable frequency drive varies the speed of the fan in accordance with a measurement of the thermocouple.

The thermal system portion and the test head portion may be mounted for pivotal movement relative to one another.

The invention may have an apparatus for testing a device having an integrated circuit, comprising a base portion, a holder for the device mounted to the base portion, a test head portion and a thermal system portion mounted to the base portion, a test head mounted to the test head portion, the test head including a test head support structure, a plurality of electric components mounted to the test head support structure, and a panel that forms a passage through which air can flow before flowing over the electric components, and a thermal system mounted through the thermal system frame to the base portion, the thermal system including a shell through which the air can flow and at least one heat dissipation device in the shell, the shell forming an interface with the panel, with a gap being defined between the shell and the panel.

The electric components may be boards, the test head support structure having a plurality of slots that hold the boards, and the thermal system includes a fan that moves the air through the shell.

The thermal system portion and the test head portion may be mounted for pivotal movement relative to one another.

The invention further provides a method for testing a device having an integrated circuit including electrically connecting a tester apparatus with the device; and cooling the tester apparatus with a thermal system without the thermal system contacting the tester apparatus.

The test head may include a test head support structure, a plurality of electric components mounted to the test head support structure, and a panel that forms a passage through which air can flow before flowing over the electric components; and the thermal system may be mounted through the thermal system frame to the base portion, and the thermal system may include a shell through which the air can flow and at least one heat dissipation device in the shell, the shell forming an interface with the panel, with a gap being defined between the shell and the panel.

The method may further include moving air through the shell.

A fan may move air through the shell.

Cooling the tester apparatus may include recirculating air from the thermal system back to the tester apparatus.

The thermal system may include a fan controllable by a variable speed drive.

The thermal system may include a thermocouple connected with the test system, the thermocouple in communication with the variable speed drive of the fan.

The method may further include adjusting the speed of the fan in accordance with a measurement of the thermocouple.

Cooling the test system may include controlling the temperature of the test system.

The invention may include a tester apparatus, comprising at least one power terminal for making contact with a power contact of a device carrying an integrated circuit, a power supply circuit configured to supply a plurality of different voltages, and at least one electric path connecting the power supply circuit with the power terminal.

The apparatus may further comprise an apparatus frame, a holder for the device mounted to the frame, and a contactor support structure, the power terminal being located on the contactor support structure.

The apparatus may further comprise a power board substrate, the power supply circuit and a portion of the electric path being carried by the power board substrate.

The power supply circuit may include a power input circuit providing a step voltage, a length of time that the step voltage is high during a period being adjustable while maintaining the period, and a maximum voltage constant, and a power converter circuit, connected to the power input circuit, converting the step voltage to a supply voltage, a magnitude of the supply voltage being related to the time that the step voltage is high during each period of the step voltage.

The apparatus may further comprise a plurality of power terminals, each for making contact with a respective contact of a respective device carrying a respective integrated circuit, and a plurality of electric paths, each connecting the power supply circuit to a respective terminal.

A plurality of the electric paths may be at a plurality of different voltage levels.

An adjustment in a voltage provided by the power supply circuit may change voltages of a subset of the electric paths in unison, so that the electric paths of the subset are always at the same voltage.

The plurality of different voltages may include a voltage output of 0.5V to 12V at a current of at least 200 mA.

The plurality of different voltages may include a voltage output of 0.1V to 5V at a current of at least 500 mA.

The invention further provides a method for testing an integrated circuit of a device including supplying a plurality of different voltages to at least one power terminal; and contacting the at least one power terminal with a power contact of the device.

Supplying a plurality of different voltages may include providing a step voltage; and converting the step voltage to a supply voltage.

The step voltage has a length of time that the step voltage is high during a period being adjustable while maintaining the period, and wherein the magnitude of the supply voltage may be related to the time that the step voltage is high during each period of the step voltage.

The method may further include supplying a plurality of different voltages to a plurality of power terminals; and contacting the plurality of power terminals with a plurality of respective contacts of the device.

Supplying a plurality of different voltages to a plurality of power terminals may include supplying each power terminal with a different voltage level.

The method may further include adjusting the supplied voltage.

Adjusting the supplied voltage may change voltages of a subset of the power terminals in unison, the subset of power terminals always being at the same voltage.

The invention may include an apparatus for testing integrated circuits of a plurality of devices, comprising a plurality of power terminals, each for making contact with a respective power contact of a respective one of the devices, at least one power supply, a plurality of electric paths, each connecting said at least one power supply to a respective one of the power terminals, and a plurality of individual shut-off circuits, each including a respective current sense circuit detecting a respective current in a respective one of the electric paths, and a respective power switch in a respective one of the electric paths, each power switch being connected to a respective current sense circuit and turning off when the current detected by the respective current sense circuit exceeds a predetermined maximum current.

Each shut-off circuit may include a logic device that at least delays activation of the power switch after the current exceeds the predetermined maximum current.

The shut-off circuit may include a logic switch that turns a shut-off voltage on, the shut-off voltage being provided to the power switch to turn the power switch off.

The power switch may be a MOSFET.

The invention may include a method of testing integrated circuits of a plurality of devices, comprising providing a power voltage to each integrated circuit, providing signals to each integrated circuit, detecting a power current that is provided to each integrated circuit, and individually turning the power voltage to one of the integrated circuits off, if the power current exceeds a predetermined maximum current.

The method may further include delaying turning the power voltage to the integrated off when the power current exceeds a predetermined maximum current.

Turning the power voltage to one of the integrated circuits off may include turning a shut-off voltage on.

The method may further include detecting a power current provided to a power terminal of the device; and turning the power to the device off if the power current exceeds a predetermined maximum current.

The method may further include detecting a power voltage provided to a power terminal of the device; and turning the power to the device off if the power voltage exceeds a predetermined maximum voltage.

The invention further provides an apparatus for testing an integrated circuit of a device including a power supply; a test signal line; and a switching circuit between the power supply and a terminal for contacting a contact of the device, the switching circuit drawing current from the terminal when the test signal is provided to the switching circuit.

The switching circuit may include a resistor and a MOSFET.

The resistor may be connected to the power supply, and the MOSFET is connected in series after the resistor.

The test signal may be provided to the MOSFET.

The MOSFET may draw power from the power supply when the test signal is provided to the switching circuit.

The invention further provides a method for testing an integrated circuit of a device include providing a test signal to a switching circuit; and drawing current from the device to the switching circuit when the switching current receives the test signal.

The switching circuit may include a MOSFET, and wherein the test signal is provided to the MOSFET.

The invention further provides a method for testing an integrated circuit of a device including providing a test signal to a switching circuit; disabling current to the device; and providing the current to the switching circuit.

The switching circuit may include a MOSFET, and wherein the test signal is provided to the MOSFET.

The invention may include a tester apparatus, comprising at least one power terminal for making contact with a power contact of a device carrying an integrated circuit, a power supply, and an electrical path connecting the power supply to the power terminal, the electrical path including at least a first set of power conductors electrically parallel to one another, having respective first ends connected to one another and respective second ends connected to one another.

The tester apparatus may further comprise a power board substrate, wherein the first set of power conductors is carried by the power board substrate.

The first set of power conductors may be traces on the power board substrate.

The electrical path may include a second set of power conductors that are electrically in series with the first set of power conductors, the second set of power conductors being electrically parallel to one another, having respective first ends connected to one another and respective second ends connected to one another.

The second set of power conductors may form part of a flexible attachment that further includes a nonconductive layer, the power conductors being held within the nonconductive layer.

The invention further provides a method for testing an integrated circuit of a device including connecting a power supply with a power terminal of the device; providing a plurality of power conductors between the power supply and the power terminal conductors having respective first ends connected to one another and respective second ends connected to one another; and conducting current from the power supply through the plurality of power conductors in parallel.

Conducting the current in parallel may obtain a high-frequency response.

The invention further provides an apparatus for testing an integrated circuit of a device including a pattern generator board; a driver board connected to the pattern generator board; a power board; an interconnection scheme connecting the driver board and the power board with the device.

Each of the pattern generator board, driver board, power board and interconnection scheme may be configurable.

The number of each of the pattern generator board, driver board and the power board may be configurable.

The interconnection scheme may include at least a first set of power conductors electrically parallel to one another, having respective first ends connected to one another and respective second ends connected to one another.

The interconnection scheme may further include a second set of power conductors that are electrically in series with the first set of power conductors, the second set of power conductors being electrically parallel to one another, having respective first ends connected to one another and respective second ends connected to one another.

The invention may include an apparatus for testing a device carrying an integrated circuit, comprising a power terminal for making contact with a power contact of the device, a power supply, an electrical power force path connecting the power supply to the power terminal, a ground terminal for making contact with a grand contact of the device, and a ground sense feedback circuit connected between the ground terminal and the electrical power path, the ground sense feedback circuit utilizing a voltage sensed by the ground terminal to modify a voltage provided through the electrical power force path to the power contact.

The apparatus may further comprise a plurality of ground terminals, the ground sense feedback circuit being connected to the plurality of ground terminals.

The apparatus may further comprise a plurality of power terminals, each for making contact with a respective power contact of a respective device, and a plurality of electrical power force paths, each connecting a respective power terminal to the power supply.

The ground sense feedback circuit may be connected to the plurality of electrical power force paths to modify a voltage of each electrical power force path.

The power sense feedback circuit may be connected between the power terminal and the electrical path, the power sense feedback circuit utilizing a voltage sensed by the power terminal to modify a voltage provided through the electrical force path to the power contact.

The power sense feedback circuit may have a reference voltage line, inputs from the reference voltage line and the power terminals being compared to determine a modification of the voltage provided through the electrical power force path.

A voltage sensed by the ground feedback circuit may be used to modify a voltage of the reference voltage line.

The invention may include a method of testing a device having an integrated circuit, comprising providing a power voltage to a power contact of the device, sensing a ground voltage on a ground contact of the device, and modifying the power voltage based on the ground voltage that is sensed.

The method may further comprise sensing the power voltage provided to the power contact, and modifying the power voltage based on the power voltage that is sensed.

Sensing the ground voltage may include adding the ground voltage to a variable input voltage.

Modifying the power voltage may be based on a sum of the ground voltage and the power voltage.

Modifying the power voltage based on the ground voltage that is sensed may include, if the sensed ground voltage is not zero, driving a variable output voltage to the sum of the ground voltage and the variable input voltage.

Modifying the power voltage based on the ground voltage that is sensed may further include providing the variable output voltage to the power contact of the device.

The invention may include an apparatus for testing an integrated circuit of a device, comprising a voltage source, a voltage switch connected to the voltage source, a signal source connected to the voltage switch, a signal provided by the signal source switching the voltage switch so that an output of the signal switch switches between respective low- and high-voltage states to create a series of voltage steps, a damping circuit having an input connected to the output of the signal switch, the damping circuit reducing a slew rate each voltage step, and having an output providing a series of dampened voltage steps, and a signal terminal, connected to the output of the damping circuit, for contacting a contact of the device.

The apparatus may comprise a plurality of signal terminals, each connected to the damping circuit but located at different distances from the damping circuit as measured along a path that current flows from the damping circuit.

The damping circuit may include a resistor in series between the voltage switch and the terminal and a capacitor connected between a terminal of the resistor and ground.

The apparatus may further comprise a digital-to-analog converter (DAC), a microprocessor bus line connected to the DAC for data representing the high and low voltages into the DAC, the high and low voltages being provided by two output terminals of the DAC.

The voltage source may be connected between two input terminals of the DAC.

The two input terminals of the DAC may be held at positive and negative voltages respectively.

The apparatus may further comprise a ground sense line connected to a ground contact of the device, the input voltages of the DAC being in part driven by a voltage on the ground sense line.

The invention further provides a method for testing an integrated circuit of a device including providing a signal to a voltage switch, the voltage switch switching between respective low- and high-voltage states to create a series of voltage steps to create a series of voltage steps; reducing a slew rate of each voltage step to provide a series of dampened voltage steps; and providing the series of dampened voltage steps to a contact of the device.

The series of dampened voltage steps may be provided to a plurality of contacts of the device, each of the contacts at different distances from the path that current flows.

The invention further provides a damping circuit for an apparatus for testing an integrated circuit device including a voltage switch; a signal terminal for contacting a contact of the device; a resistor in series between the voltage switch and the signal terminal; and a capacitor connected between a terminal of the resistor and the signal terminal.

The damping circuit may further include a plurality of signal terminals, the capacitor connected between a terminal of the resistor and the plurality of signal terminals, the signal terminals at different distances from the capacitor as measured along a path that current flows from the capacitor.

The invention may include an apparatus for testing an integrated circuit of a device, comprising at least one frame, a holder for the device, secured to the frame, a support structure held by the frame, a plurality of terminals held by the support structure, the holder and support structure being movable relative to one another so that each one of the terminals releasably makes contact with a respective contact of the device, a power source to supply AC and DC power, a power electrical path connecting the power source to a power terminal of the terminals held by the support structure, a signal source, a plurality of signal electrical paths, each connecting the signal source to a respective signal terminal of the terminals held by the support structure, a ground plate connected to the at least one frame, an AC ground path interconnecting the terminals and the ground plate, and a DC ground path interconnecting the terminals and the ground plate.

The AC ground path and the DC ground path may be electrically separated.

The AC ground path may have a resistance between 0.5 and 1.5 ohms and the DC ground path has a resistance between 0.003 and 0.015 ohms.

The apparatus may include a ground pin, the ground pin connected to the power source.

The physical space between the AC power provision, signal line and AC power ground may be small.

The DC ground path may be connected to the support structure.

The invention further provides a method for testing an integrated circuit of a device including holding the device against a surface of a tester; contacting terminals on the tester to contacts on the device; providing signals through the terminals and contacts to the integrated circuit; providing AC and DC power to the terminals.

Providing the AC and DC power to the terminals may include electrically separating the AC and DC power.

The method may further include providing separate AC ground and DC ground paths.

The invention further provides a board for providing power to an apparatus for testing an integrated circuit of a device including a power source to supply AC and DC power; a power electrical path to connect the power source to a power terminal of the device; a ground pin; an AC ground path interconnecting terminals of the device and the ground pin; and a DC ground path interconnecting terminals of the device and the ground pin.

The AC ground path and the DC ground path may be electrically separated.

The AC ground path may have a resistance between 0.5 and 1.5 ohms and the DC ground path may have a resistance between 0.003 and 0.015 ohms.

The physical space between the AC power provision, signal line and AC power ground may be small.

The board may further include a power board substrate, the power source, power electrical path, ground pin, and AC and DC ground paths provided on the power board substrate.

The invention may include an apparatus for testing an integrated circuit of a device, comprising at least one frame, a holder for the device, secured to the frame, a support structure held by the frame, a plurality of terminals held by the support structure, the holder and support structure being movable relative to one another so that each one of the terminals releasably makes contact with a respective contact of the device, a power source, a power electrical path connecting the power source to a power terminal of the terminals held by the support structure, a signal source, and a plurality of signal electrical paths, each connecting the signal source to a respective signal terminal of the terminals held by the support structure.

The invention further provides an apparatus for testing an integrated circuits on devices including a plurality of electrical subassemblies including a plurality of pattern generator, driver, and power boards divided into physical zones with each physical zone including one pattern generator board, at least one driver board, and at least one power board connected to one another; and a configuration file having information representing flow of current through the electrical subassemblies connected to one another in an interconnection scheme, wherein the electrical subassemblies are organized into at least one logical zone, and wherein the logical zone comprises a plurality of pattern generators.

The electrical subassemblies may be organized into a plurality of logical zones, and wherein one or more of the logical zones comprises a plurality of pattern generators.

The at least one logical zone may be divided into a plurality of the physical zones.

The configuration file may have a zone name field indicating a plurality of respective ones of the physical zones.

Physical zones having the same zone name field may be grouped into a logical zone.

The electrical subassemblies in the logical zone may be of the same type and run the same test program at the same time.

The electrical subassemblies in each of the plurality of logical zones may be of the same type and run the same test program at the same time, and wherein each of the plurality of logical zones runs a different test program at the same time.

The invention further provides a method for testing integrated circuits on devices including running more than one test program on the device simultaneously.

Running more than one test program on the device simultaneously may include providing a plurality of electrical subassemblies including a plurality of pattern generator, driver, and power boards divided into physical zones with each physical zone including one pattern generator board, at least one driver board, and at least one power board connected to one another, the electrical subassemblies are organized into at least one logical zone, and wherein the logical zone comprises a plurality of pattern generators; providing a configuration file having information representing flow of current through the electrical subassemblies connected to one another in an interconnection scheme; and running a test program through the at least one logical zone.

Running more than one test program on the device simultaneously may include providing a plurality of electrical subassemblies including a plurality of pattern generator, driver, and power boards divided into physical zones with each physical zone including one pattern generator board, at least one driver board, and at least one power board connected to one another, the electrical subassemblies are organized into a plurality of logical zones, and wherein each of the logical zones comprises a plurality of pattern generators; providing a configuration file having information representing flow of current through the electrical subassemblies connected to one another in an interconnection scheme; and running a test program through each of the logical zones simultaneously.

