TECHNICAL FIELD

The present invention relates generally to a superconducting quantum device. More particularly, the present invention relates to structures fabricated in a transmon qubit flip-chip configuration for quantum computing devices.

BACKGROUND

Hereinafter, a “Q” prefix in a word or phrase is indicative of a reference of that word or phrase in a quantum computing context unless expressly distinguished where used.

Molecules and subatomic particles follow the laws of quantum mechanics, a branch of physics that explores how the physical world works at a fundamental level. At this level, particles behave in strange ways, taking on more than one state at the same time, and interacting with other particles that are very far away. Quantum computing harnesses these quantum phenomena to process information.

The computers we use today are known as classical computers (also referred to herein as “conventional” computers or conventional nodes, or “CN”). A conventional computer uses a conventional processor fabricated using semiconductor materials and technology, a semiconductor memory, and a magnetic or solid-state storage device, in what is known as a Von Neumann architecture. Particularly, the processors in conventional computers are binary processors, i.e., operating on binary data represented in 1 and 0.

A quantum processor (q-processor) uses the odd nature of entangled qubit devices (compactly referred to herein as “qubit,” plural “qubits”) to perform computational tasks. In the particular realms where quantum mechanics operates, particles of matter can exist in multiple states—such as an “on” state, an “off” state, and both “on” and “off” states simultaneously. Where binary computing using semiconductor processors is limited to using just the on and off states (equivalent to 1 and 0 in binary code), a quantum processor harnesses these quantum states of matter to output signals that are usable in data computing.

Conventional computers encode information in bits. Each bit can take the value of 1 or 0. These 1s and 0s act as on/off switches that ultimately drive computer functions. Quantum computers, on the other hand, are based on qubits, which operate according to two key principles of quantum physics: superposition and entanglement. Superposition means that each qubit can represent both a 1 and a 0 at the same time. Entanglement means that qubits in a superposition can be correlated with each other in a non-classical way; that is, the state of one (whether it is a 1 or a 0 or both) can depend on the state of another, and that there is more information that can be ascertained about the two qubits when they are entangled than when they are treated individually.

Using these two principles, qubits operate as more sophisticated processors of information, enabling quantum computers to function in ways that allow them to solve difficult problems that are intractable using conventional computers. IBM has successfully constructed and demonstrated the operability of a quantum processor using superconducting qubits (IBM is a registered trademark of International Business Machines corporation in the United States and in other countries.)

A superconducting qubit includes a Josephson junction (Josephson junction). A Josephson junction is a superconducting tunnel junction, which is formed by separating two thin-film superconducting metal layers by a non-superconducting material. When the metal in the superconducting layers is caused to become superconducting—e.g. by reducing the temperature of the metal to a specified cryogenic temperature—pairs of electrons can tunnel from one superconducting layer through the non-superconducting layer to the other superconducting layer. Other methods of forming Josephson junctions exist and this description is not meant to be limiting. In a qubit, the Josephson junction—which functions as a dispersive nonlinear inductor—is electrically coupled in parallel with one or more capacitive devices forming a nonlinear microwave oscillator. The oscillator has a resonance/transition frequency determined by the value of the inductance and the capacitance in the qubit circuit. Any reference to the term “qubit” is a reference to a superconducting qubit circuitry that employs a Josephson junction, unless expressly distinguished where used.

In a superconducting state, the material firstly offers no resistance to the passage of electrical current. When resistance falls to zero, a current can circulate inside the material without any dissipation of energy. Secondly, the material exhibits the Meissner effect, i.e., provided they are sufficiently weak, external magnetic fields do not penetrate the superconductor, but remain at its surface. When one or both of these properties are no longer exhibited by the material, the material is said to be in a normal state and no longer superconducting.

A critical temperature of a superconducting material is a temperature at which the material begins to exhibit characteristics of superconductivity. Superconducting materials exhibit very low or zero resistivity to the flow of current. A critical field is the highest magnetic field, for a given temperature, under which a material remains superconducting.

Superconductors are generally classified into one of two types. Type I superconductors exhibit a single transition at the critical field. Type I superconductors transition from a non-superconducting state to a superconducting state when the critical field is reached. Type II superconductors include two critical fields and two transitions. At or below the lower critical field, type II superconductors exhibit a superconducting state. Above the upper critical field, type II superconductors exhibit no properties of superconductivity. Between the upper critical field and the lower critical field, type II superconductors exhibit a mixed state. In a mixed state, type II superconductors exhibit an incomplete Meissner effect, i.e., penetration of external magnetic fields in quantized packets at specific locations through the superconductor material.

The information processed by qubits is carried or transmitted in the form of microwave signals/photons in the range of microwave frequencies. The microwave signals are captured, processed, and analyzed to decipher the quantum information encoded therein. A readout circuit is a circuit coupled with the qubit to capture, read, and measure the quantum state of the qubit. An output of the readout circuit is information usable by a q-processor to perform computations.

A superconducting qubit has two quantum states—|0> and |1>. These two states may be two energy states of atoms, for example, the ground (|g>) and first excited (|e>) state of a superconducting artificial atom (superconducting qubit). Other examples include spin-up and spin-down of the nuclear or electronic spins, two positions of a crystalline defect, and two states of a quantum dot. Since the system is of a quantum nature, any combination of the two states are allowed and valid.

Superconducting devices such as qubits are fabricated using superconducting and semiconductor materials in known semiconductor fabrication techniques. A superconducting device generally uses one or more layers of different materials to implement the device properties and function. A layer of material can be superconductive, conductive, semi-conductive, insulating, resistive, inductive, capacitive, or have any number of other properties. Different layers of materials may have to be formed using different methods, given the nature of the material, the shape, size or placement of the material, other materials adjacent to the material, and many other considerations.

The software tools used for designing semiconducting and superconducting devices produce, manipulate, or otherwise work with an electrical layout and device components on very small scales. Some of the components that such a tool may manipulate may only measure few nanometers across when formed in a suitable substrate.

A layout includes shapes whose shape and position is selected in the tool according to the device's objective. Once a design layout, also referred to simply as a layout, has been finalized for a device or a group of devices, the design is converted into a set of masks or reticles. A set of masks or reticles is one or more masks or reticles. During manufacture, a semiconductor wafer is exposed to light or radiation through a mask to form microscopic components comprising the structures. This process is known as photolithography. A mask is usable for manufacturing or printing the contents of the mask onto the wafer. During the photolithographic printing process, radiation is focused through the mask and at certain desired intensity of the radiation. This intensity of the radiation combined with any materials that are deposited using the radiation is commonly referred to as “dose”. The focus and the dosing of the radiation is controlled to achieve the desired shape and electrical characteristics of structures on the wafer.

A Fabrication process for a semiconducting or superconducting device includes not only dosing but other methods of depositing and/or removing materials having various electrical and/or mechanical characteristics. For example, a conducting material may be deposited using an beam of ions of that material; a hard insulator may be dissolved using a chemical or eroded using mechanical planning. These examples of operations in a fabrication process are not intended to be limiting. From this disclosure, those of ordinary skill in the art will be able to conceive many other operations in a fabrication process that is usable to fabricate a device according to the illustrative embodiments, and the same are contemplated within the scope of the illustrative embodiments.

Superconducting devices are often planar, i.e., where the superconductor structures are fabricated on one plane. A non-planar device is a three-dimensional (3D) device where some of the structures are formed above or below a given plane of fabrication.

Some qubits are fabricated using a flip-chip geometry. In the flip-chip geometry, a qubit chip (also referred to as a “Qchip”) is fabricated having a number of individual qubits upon a substrate, and an interposer chip having one or more connections is fabricated on a separate substrate. Solder bumps are deposited onto chip pads on a first surface of the qubit chip and/or interposer chip, and the qubit chip or interposer chip is flipped over so that its first side faces down. The qubit chip and interposer chip are aligned and bump-bonded, so that the solder of the solder bumps complete the electrical connection of the qubit chip and the interposer chip.

According to the illustrative embodiments described herein, a flip-chip geometry can combine an interposer chip with other chips containing components of qubits but not the complete qubit. For example, a junction chip (also referred to as a “J-chip”) is a chip according to the illustrative embodiments that has a plurality of individual Josephson junctions fabricated thereon. A Josephson junction from the plurality is usable to form a qubit when an interposer is combined with the J-chip in a flip-chip configuration in a manner described herein. According to the illustrative embodiments, an interposer chip having one or more connections is fabricated on a separate substrate. Bumps of a suitable material, such as soldering material with the desired electrical, thermal, ductility, and malleability properties in cryogenic and other operating conditions as described herein, are deposited onto chip pads on a first surface of the J-chip and/or interposer chip. Generally, any reference to a solder bump should be construed to include bumps made of material that satisfy these requirements. The J-chip or the interposer chip is flipped over so that a first side of the flipped chip faces towards a first face of the non-flipped chip from the two chips. The J-chip and interposer chip are aligned and bump-bonded, so that the material of a bump completes an electrical connection between the J-chip and the interposer chip.

The readout circuitry is generally coupled with a qubit by electromagnetic resonance (usually a microwave or radio-frequency resonance) using a resonator. A resonator in the readout circuitry comprises inductive and capacitive elements. Some qubits are fixed-frequency qubits, i.e., their resonance frequencies are not changeable. Other qubits are frequency-tunable qubits. A q-processor can employ fixed-frequency qubits, frequency-tunable qubits, or a combination thereof.

The illustrative embodiments recognize that a fixed-frequency qubit is designed to be fixed in frequency to improve immunity to noise. The illustrative embodiments recognize that when the resonance frequencies of two coupled qubits on a chip are the same or within a threshold band of frequencies, or their higher transition frequencies are on resonance or close to resonance, then negative effects can happen such as, crosstalk, quantum decoherence, energy decay, creation of mixed states, unintended information transfer, quantum state leakage and so on. The illustrative embodiments further recognize that such qubits can also negatively affect the performance or utility of certain quantum gates, such as cross-resonance gates which have stringent requirements on the spectrum of resonance frequencies of qubits upon which the gate is operating on. The illustrative embodiments further recognize that one challenge in quantum processors that are based on fixed-frequency qubits is frequency crowding or frequency collision between adjacent qubits.

The illustrative embodiments recognize that another challenge in quantum processors that are based on fixed-frequency qubits is low On/Off ratios between when microwave signals turn On an interaction (On interaction strength) and the interactions between coupled qubits when these signals are disabled (Off interaction strength). The illustrative embodiments further recognize that yet another challenge in quantum processors that are based on fixed-frequency qubits is enabling a gate of interest without producing unwanted interactions at other sites. The illustrative embodiments further recognize that imperfections in the fabrication and the materials used in the presently available fabrication methods for fixed-frequency qubits leads to deviations from an intended resonance frequency.

The illustrative embodiments further recognize that in some cases, a Josephson junction of a qubit can be tuned to adjust a resonance frequency of the qubit. However, the illustrative embodiments recognize that once a flip-chip assembly has been formed, a Josephson junction on the qubit chip or J-chip becomes physically inaccessible for operations such as laser annealing, by which the impedance of the Josephson junction can be modified or tuned. In such a case, the flip-chip assembly becomes fixed with a qubit configuration in which a Josephson junction has an undesirable impedance. Therefore, the illustrative embodiments recognize that a flip-chip configuration is needed in which a qubit can be formed with the desired resonance frequency even after the interposer has been flipped over the J-chip.

SUMMARY

The illustrative embodiments provide a quantum computing device. The embodiment includes a first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The embodiment further includes a second chip having a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads, the second layer configured to bond the first chip and the second chip, wherein the subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits, a qubit in the set of qubits resulting from a Josephson junction in the subset of Josephson junctions. Thus, the embodiment provides a quantum computing device in a flip-chip configuration where several Josephson junctions on a J-chip are made with manufacturing variations in properties, and only some Josephson junctions are selected to form qubits with desirable frequency collision avoidance characteristics.

Another embodiment further includes an unusable Josephson junction in the set of Josephson junctions, wherein a first Josephson junction in the set of Josephson junctions is modified to become the unusable Josephson junction responsive to the first Josephson junction being excluded from the subset of the set of Josephson junctions. Thus, the embodiment provides a quantum computing device in a flip-chip configuration where other Josephson junctions on the J-chip are rendered unusable for use in the quantum computing device.

Another embodiment further includes a disconnected pad in the first set of pads, wherein the first set of pads comprises a first pad electrically coupled to the first Josephson junction, and wherein the first pad is electrically disconnected from the first Josephson junction to form the disconnected pad, the disconnected pad rendering the first Josephson junction unusable. Thus, the embodiment provides a hardware change to render Josephson junctions on the J-chip unusable for use in the quantum computing device.

In another embodiment, an electrical property of the first Josephson junction is modified such that the first Josephson junction no longer operates as a Josephson junction. Thus, the embodiment provides another hardware change to render Josephson junctions on the J-chip unusable for use in the quantum computing device.

In another embodiment, the subset is selected based upon a measurement of a parameter associated with each of the set of Josephson junctions. Thus, the embodiment provides a property of Josephson junctions on the J-chip based on which the junction can be selected for use in the quantum computing device.

In another embodiment, the resonance frequency associated with a particular qubit is one member selected from a set of (i) a predicted resonance frequency calculated based upon the measured parameter, and (ii) an actual measured resonance frequency of the particular qubit. Thus, the embodiment provides a predicted property of a qubit formed using a Josephson junctions on the J-chip, based on which the junction can be selected for use in the quantum computing device.

In another embodiment, the parameter includes a resistance associated with a Josephson junction in the set of Josephson junctions. Thus, the embodiment provides a specific property of Josephson junctions on the J-chip based on which the junction can be selected for use in the quantum computing device.

In another embodiment, the resistance is a normal-state resistance of the Josephson junction. Thus, the embodiment provides a specific property of Josephson junctions on the J-chip based on which the junction can be selected for use in the quantum computing device.

Another embodiment further includes a first set of protrusions formed on the first chip. The embodiment further includes a set of bumps formed on the first layer of the second chip, the set of bumps formed of a material having above a threshold ductility at a room temperature range, wherein set of bumps are configured to cold weld to the first set of protrusions. Thus, the embodiment provides an apparatus for detachably configuring the two chips in the flip-chip configuration.

In another embodiment, the first set of protrusions is of at least one member selected from a set comprising Gold and Platinum. Thus, the embodiment provides a material for an apparatus for detachably configuring the two chips in the flip-chip configuration.

In another embodiment, the set of bumps is of at least one member selected from a set comprising Indium, Tin, Lead, and Bismuth. Thus, the embodiment provides an apparatus for bonding configuring the two chips in the flip-chip configuration.

Another embodiment further includes a flip-chip assembly comprising the first chip detachably attached to the second chip using the cold weld, wherein a parameter of a Josephson junction inside the flip-chip assembly is tunable by disassembling the flip-chip assembly at the cold weld. Thus, the embodiment provides for a detachable configuration of the two chips in the flip-chip configuration or adjusting a property of a Josephson junction.

An embodiment provides a quantum data processing system which uses a quantum processor comprising the structures in a flip-chip configuration of a transmon qubit device. The embodiment includes a first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The embodiment further includes a second chip having a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads, the second layer configured to bond the first chip and the second chip, wherein the subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits, a qubit in the set of qubits resulting from a Josephson junction in the subset of Josephson junctions. Thus, the embodiment provides a quantum computing device in a flip-chip configuration where several Josephson junctions on a J-chip are made with manufacturing variations in properties, and only some Josephson junctions are selected to form qubits with desirable frequency collision avoidance characteristics.

