CROSS-REFERENCE TO RELATED APPLICATION

This application claims from Korean Patent Application No. 10-2019-0032331, filed on Mar. 21, 2019, the disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND

Devices consistent with some example embodiments relate to a semiconductor device having a supporter pattern.

Since highly integrated and miniaturized semiconductor devices such as Dynamic Random Access Memory (DRAM) are in demand, sizes of capacitors of the semiconductor devices also have been miniaturized. Lower electrodes having high aspect ratios are utilized to obtain specific/predetermined capacitances of the capacitors disposed in fine patterns. Supporter patterns which support the lower electrodes are utilized to prevent or reduce the likelihood of the lower electrodes collapsing during the process.

SUMMARY

Some example embodiments of inventive concepts are directed to providing a method of manufacturing a semiconductor device in which contact areas between supporter patterns and lower electrodes are uniform or significantly uniform.

According to some example embodiments, there is provided a method of manufacturing a semiconductor device including sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes, the plurality of capacitor holes passing through the mold layer and the supporter layer, forming a plurality of lower electrodes filling the capacitor holes, the plurality of lower electrodes arranged in a first direction and a second direction which intersects with the first direction, forming, on the supporter layer and the lower electrodes, a supporter mask pattern, the supporter mask pattern a plurality of mask holes, and forming a plurality of supporter holes by patterning the supporter layer using the supporter mask pattern. Each of the plurality of lower electrodes has a pillar shape, each of the mask holes is between four adjacent lower electrodes, and each of the mask holes has a circular shape.

According to some example embodiments, there is provided a method of manufacturing a semiconductor device including sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and the supporter layer, forming a plurality of lower electrodes filling the capacitor holes, the plurality of lower electrodes arranged in a first direction and a second direction which intersects with the first direction, forming, on the supporter layer and the lower electrodes, a supporter mask pattern, the supporter mask pattern comprising a plurality of mask holes, and forming a plurality of first supporter holes and a plurality of second supporter holes arranged in a direction which is different from a direction of the first supporter holes by patterning the supporter layer using the supporter mask pattern. Each of the plurality of lower electrodes has a pillar shape, each of the mask holes is between four adjacent lower electrodes, and each of the mask holes has a circular shape.

According to some example embodiments, there is provided a method of manufacturing a semiconductor device including sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and the supporter layer, forming a plurality of lower electrodes filling the capacitor holes, the plurality of lower electrodes arranged in a first direction and a second direction which intersects with the first direction, and the plurality of electrodes are arranged in a honeycomb structure in which the plurality of lower electrodes are at centers and vertices of hexagons, forming, on the supporter layer and the lower electrodes, a supporter mask pattern, the support mask pattern comprising a plurality of mask holes, and forming a plurality of supporter holes by patterning the supporter layer using the supporter mask pattern. Each of the plurality of lower electrodes has a pillar shape and, each of the plurality of lower electrodes is exposed by at least one among the plurality of supporter holes. Each of the mask holes is between four adjacent lower electrodes, each of the mask holes has a circular shape, each of the supporter holes is between the four adjacent lower electrodes, and each of the supporter holes has an oval shape.

