BACKGROUND

Many circuits and devices are operable using two or more different power sources. These sources may, for example, be provided on different supply rails and may be provided internally, externally or both. For instance, many devices such as portable computers have an internal battery and are also operable via an external power supply.

Various circuits have a power supply rail that provides power derived from two or more external power supplies. These external power supplies may be connected and disconnected or otherwise turned on and off, which can present challenges to providing power on an internal power supply rail. For example, generating an internal power supply without any voltage dips when respective external supplies turn on and off can be challenging. In addition, back current and voltage dips can occur on an internal power supply when an external power supply is disconnected or goes to 0V. If the internal power supply voltage undergoes a large voltage drop, this may cause the circuit being powered to go through the power cycle, which can adversely affect the operation of the circuit. For example, when both a battery and an AC/DC adaptor are connected to a laptop computer, removing the AC/DC adaptor or battery may undesirably cause the laptop computer to reboot.

SUMMARY

This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

In one embodiment, a power source switching circuit is disclosed. The power source switching circuit includes a voltage regulator, a first transistor and a second transistor. The first transistor is coupled with a first voltage source and the second transistor is coupled with a second voltage source. The voltage regulator includes a resistor, one or more diodes coupled together in series and a capacitor. Terminals of the capacitor are coupled between a gate and a source of the first transistor through a first switch and a second switch respectively. The capacitor is configured to hold charge to switch the first transistor on. A value of the capacitor is smaller than a gate to source capacitance of the first transistor. In some examples, the value of the capacitor is configured to keep a voltage drop at an input of a load within a predefined threshold during a transition from the first voltage source to the second voltage source.

In some examples, the capacitor is coupled with a ground through a first resistor and a third switch and the gate of the first transistor is coupled with the ground through a second resistor and a fourth switch. The third switch and the fourth switch are configured to be operated by a switching pulse. The first switch and the second switch are configured to be operated by an inverse of the switching pulse.

The first switch and the second switch are configured to be closed upon a detection of an availability of the first power source and an unavailability of the second power source. The third switch and the fourth switch are closed upon a detection of an availability of the second power source and an unavailability of the first power source. The a number of the one of more diodes depends on the voltage needed to turn on the first transistor. A filter capacitor coupled to the one of more diodes in parallel to filter noise on an output of the voltage regulator may also be included. The filter capacitor is smaller in value than the capacitor.

In some other examples, a first switch coupled between gate of the first transistor and the voltage regulator may be included. A second switch coupled between the second capacitor and ground may also be included. A fifth switch coupled with a gate of the second transistor may be included too. The third switch and the fourth switch are configured to be operated by a first switching pulse and the fifth switch is configured to be operated by a second switching pulse, wherein the first switch pulse has a narrower pulse width than the second switching pulse.

