BACKGROUND OF THE INVENTION

This technical field relates to an electronic timepiece, a method of display control, and a storage medium.

In the field of liquid crystal display devices including a liquid crystal panel in which a plurality of pixels for displaying an image are arranged, there exist conventional technologies for reducing the power consumption of the liquid crystal panel by storing image data in memory elements built into the pixels and thereby reducing image rewrite frequency (see Japanese Patent Application Laid-Open Publication No. 2003-177717, for example).

In a liquid crystal display device of the type disclosed in the above patent document, using a DC voltage to drive the liquid crystal panel shortens the lifespan of the panel, and therefore the liquid crystal panel is typically driven using an AC voltage whose polarity is inverted at a prescribed interval. However, when the timing at which image data is output to the pixels overlaps with the timing at which the polarity of the AC voltage is inverted, the image data is not stored in the memory elements of the pixels correctly, which can negatively affect the reliability of the liquid crystal panel.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to a scheme that substantially obviates one or more of the problems due to limitations and disadvantages of the related art. An electronic timepiece, a method of display control, and a storage medium are disclosed herein.

Additional or separate features and advantages of the invention will be set forth in the descriptions that follow and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.

To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, in one aspect, the present disclosure provides an electronic timepiece, including: a clock unit that keeps time, the clock unit repeatedly and periodically generating a ticking event at a prescribed ticking timing, the prescribed ticking timing being adjustable so as to correct the time kept by the clock unit; a first processor that controls the clock unit; a clock generation circuit that outputs a clock signal of a prescribed frequency in accordance with every ticking timing of the clock unit; a timer circuit that repeatedly counts pulses in the clock signal output from the clock generation circuit up to a prescribed number of pulses that corresponds to the prescribed frequency; a liquid crystal driver circuit that drives a liquid crystal panel; and a second processor that controls the timer circuit and the liquid crystal driver circuit, the second processor causing the liquid crystal driver circuit to invert a polarity of an AC voltage to be applied to the liquid crystal panel and apply the inverted AC voltages to the liquid crystal panel each time the timer circuit counts up the prescribed number of pulses in the clock signal, wherein when the ticking timing of the clock unit is adjusted and changed, the first processor outputs a synchronization request signal to the second processor at a next ticking timing of the clock unit that occurs after the change in the ticking timing, so as to request the second processor to perform resynchronization, and wherein upon receipt of the synchronization request signal from the first processor, the second processor resets the timer circuit so that the timer circuit starts a new count of pulses in the clock signal.

In another aspect, the present disclosure provides a method of display control performed by an electronic timepiece that includes: a clock unit that keeps time, the clock unit repeatedly and periodically generating a ticking event at a prescribed ticking timing, the prescribed ticking timing being adjustable so as to correct the time kept by the clock unit; a first processor that controls the clock unit; a clock generation circuit that outputs a clock signal of a prescribed frequency in accordance with every ticking timing of the clock unit; a timer circuit that repeatedly counts pulses in the clock signal output from the clock generation circuit up to a prescribed number of pulses that corresponds to the prescribed frequency; a liquid crystal driver circuit that drives a liquid crystal panel; and a second processor that controls the timer circuit and the liquid crystal driver circuit, the method including: via the second processor, causing the liquid crystal driver circuit to invert a polarity of an AC voltage to be applied to the liquid crystal panel and apply the inverted AC voltages to the liquid crystal panel each time the timer circuit counts up the prescribed number of pulses in the clock signal; when the ticking timing of the clock unit is adjusted and changed, causing the first processor to output a synchronization request signal to the second processor at a next ticking timing of the clock unit that occurs after the change in the ticking timing, so as to request the second processor to perform resynchronization; and causing the second processor, upon receipt of the synchronization request signal from the first processor, to reset the timer circuit so that the timer circuit starts a new count of pulses in the clock signal.

In another aspect, the present disclosure provides a computer-readable non-transitory storage medium having stored a program executable by an electronic timepiece that includes: a clock unit that keeps time, the clock unit repeatedly and periodically generating a ticking event at a prescribed ticking timing, the prescribed ticking timing being adjustable so as to correct the time kept by the clock unit; a first processor that controls the clock unit; a clock generation circuit that outputs a clock signal of a prescribed frequency in accordance with every ticking timing of the clock unit; a timer circuit that repeatedly counts pulses in the clock signal output from the clock generation circuit up to a prescribed number of pulses that corresponds to the prescribed frequency; a liquid crystal driver circuit that drives a liquid crystal panel; and a second processor that controls the timer circuit and the liquid crystal driver circuit, the program being configured to cause the electronic timepiece to perform the following: via the second processor, causing the liquid crystal driver circuit to invert a polarity of an AC voltage to be applied to the liquid crystal panel and apply the inverted AC voltages to the liquid crystal panel each time the timer circuit counts up the prescribed number of pulses in the clock signal; when the ticking timing of the clock unit is adjusted and changed, causing the first processor to output a synchronization request signal to the second processor at a next ticking timing of the clock unit that occurs after the change in the ticking timing, so as to request the second processor to perform resynchronization; and causing the second processor, upon receipt of the synchronization request signal from the first processor, to reset the timer circuit so that the timer circuit starts a new count of pulses in the clock signal.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory, and are intended to provide further explanation of the invention as claimed.

