TECHNICAL FIELD

The present disclosure relates to the field of communication and chip technology, and particularly relates to a processing device and related products for performing matrix-multiplying-vector operations.

BACKGROUND

Artificial neural networks (ANN) have been a research hotspot prompted since the 1980s. An ANN abstracts human brain neural networks from the perspective of information processing to establish a simple model and form different networks according to different connection modes. It is also often referred to as a neural network or a neural-like network in engineering and academia. A neural network is an operation model consisting of a larger number of interconnected nodes (or neurons). Operations of the existing neural networks are performed based on a central processing unit (CPU) or a graphic processing unit (GPU), and the operations consume high power and long operation time.

SUMMARY

The embodiments of the present disclosure provide a method for operations in a neural network and related products, which can reduce operation time and decrease power consumption of the module.

According to a first aspect of the present disclosure, a processing device and related products are disclosed. The processing device includes a main processing circuit and a plurality of basic processing circuits. The main processing circuit is configured to receive a matrix A, a vector B, and a multiplication instruction A*B, divide the matrix A into M basic data blocks, distribute the M basic data blocks to the plurality of basic processing circuits, and broadcast the vector B to the plurality of basic processing circuits. The plurality of basic processing circuits are configured to perform inner-product operations in parallel on the basic data blocks and the vector B to obtain a plurality of processing results, and provide the plurality of processing results to the main processing circuit. The main processing circuit is further configured to combine the plurality of processing results to obtain a computation result of the multiplication instruction. Related product including the processing device, such as a chip with the processing device integrated thereon, and an intelligent device having the chip installed thereon, are also disclosed.

According to a second aspect of the present disclosure, a matrix-multiplying-vector operation method performed by a processing device is disclosed. The processing device includes a main processing circuit and a plurality of basic processing circuits. The method includes receiving, by the main processing circuit, a matrix A, a vector B, and a multiplication instruction A*B, dividing, by the main processing circuit, the matrix A into M basic data blocks, distributing, by the main processing circuit, the M basic data blocks to the plurality of basic processing circuits, and broadcasting, by the main processing circuit, the vector B to the plurality of basic processing circuits. The method further includes performing, by the plurality of basic processing circuits, inner-product operations in parallel on the basic data blocks and the vector B to obtain a plurality of processing results, and providing, by the plurality of basic processing circuits, the plurality of processing results to the main processing circuit. The method also includes combining, by the main processing circuit, the plurality of processing results to obtain a computation result of the multiplication instruction.

The embodiments of the present disclosure have the following beneficial effects. In the embodiments of the present disclosure, when receiving a matrix, a vector, and an operation instruction to multiply them, the matrix is divided into and distributed as a plurality of basic data blocks, and the vector is broadcasted to the plurality of basic processing circuits to perform inner-product operations. In this way, a largest amount of calculation in the inner product operations is distributed to the plurality of basic processing circuits for simultaneous/parallel execution, thereby reducing calculation time and saving power consumption.

