BACKGROUND

Vertically stacked gate-all-around (GAA) horizontal nanowire (NW) and nanosheet (NS) devices are promising for the next generation integrated circuits (IC) because they have good gate controllability, low leakage, and good scalability. In their channel region, the GAA NW and the GAA NS devices each have multiple vertically stacked wire channels and sheet channels, respectively, which are wrapped around by gate dielectric layer(s) and a gate electrode. Each of GAA NW and GAA NS devices provide benefits. The GAA NW has relative to the GAA NS improved gate control due to smaller channel regions and thus, in some embodiments, is beneficial for application for non-speed critical circuits as it can provide both lower leakage and power consumption advantages. The GAA NS devices have a relatively wider channel width for high speed applications, but the leakage may worse than GA NW devices. It is desired to implement aspects of certain properties of both GAA devices in certain applications.

