BACKGROUND

The inventive concepts relate to a semiconductor package, and more particularly, to a fan-out semiconductor package having a redistribution line structure.

With the development in electronic industries and demand from users, electronic devices have become smaller and/or multi-functional and have higher capacity. This leads to the requirement for a highly integrated semiconductor chip.

Specifically, in a highly integrated semiconductor chip having an increased number of input and output (I/O) terminals, distances between the I/O terminals may be reduced, and thus, interference between the I/O terminals may occur. A fan-out semiconductor package has been used to increase the distances between the I/O terminals.

The inventive concepts provide a fan-out semiconductor package having a redistribution line structure having improved reliability.

According to an aspect of the inventive concepts, there is provided a fan-out semiconductor package including a redistribution line structure including a plurality of redistribution line insulating layers and a plurality of redistribution line patterns on at least one of an upper surface and a lower surface of each of the plurality of redistribution line insulating layers at least one semiconductor chip on the redistribution line structure and occupying a footprint having a horizontal width that is less than a horizontal width of the redistribution line structure, and a molding member surrounding the at least one semiconductor chip on the redistribution line structure and having a horizontal width that is greater than the horizontal width of the redistribution line structure, wherein the plurality of redistribution line insulating layers have a cascade structure.

According to another aspect of the inventive concepts, there is provided a fan-out semiconductor package including a redistribution line structure including a plurality of redistribution line insulating layers having a cascade structure, and a plurality of redistribution line patterns on at least one of an upper surface and a lower surface of each of the plurality of redistribution line insulating layers, at least one semiconductor chip on the redistribution line structure and electrically connected to the plurality of redistribution line patterns, and a molding member surrounding the at least one semiconductor chip on the redistribution line structure, wherein a horizontal width of the redistribution line insulating layer from among the plurality of redistribution line insulating layers, farther from the at least one semiconductor chip, is greater than a horizontal width of the redistribution line insulating layer from among the plurality of redistribution line insulating layers, closer to the at least one semiconductor chip.

According to another aspect of the inventive concepts, there is provided a fan-out semiconductor package including a redistribution line structure including a plurality of redistribution line insulating layers having a cascade structure, a plurality of redistribution line patterns on an upper surface of at least one of the plurality of redistribution line insulating layers, and a plurality of redistribution line via patterns connected to the plurality of redistribution line patterns and penetrating at least one of the plurality of redistribution line insulating layers, at least one semiconductor chip on the redistribution line structure and electrically connected to the plurality of redistribution line patterns and the plurality of redistribution line via patterns, and a molding member surrounding the at least one semiconductor chip on the redistribution line structure, and protruding farther outside the redistribution line structure in a horizontal direction, wherein side surfaces of each of the plurality of redistribution line insulating layers are inclined surfaces each having an acute angle from a normal line with respect to a lower surface of each of the plurality of redistribution line insulating layers, and an acute angle of a side surface of one of the plurality of redistribution line insulating layers is less than acute angles of side surfaces of the other of the plurality of redistribution line insulating layers.

