CROSS-REFERENCE TO RELATED APPLICATION

This U.S. non-provisional patent application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2019-0074185, filed on Jun. 21, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.

TECHNICAL FIELD

Exemplary embodiments of the present inventive concept relate to a semiconductor package and, more particularly, to a semiconductor package having an electromagnetic shielding function and an antenna function.

DISCUSSION OF THE RELATED ART

A packaging density may be increased to increase speed and provide miniaturization of an electronic device. However, electromagnetic waves emitted from the electronic device may deteriorate performance of the electronic device. For example, the electromagnetic waves may cause malfunction of a communication device such that critical safety issues may be generated. Thus, electromagnetic shielding techniques for minimizing electromagnetic interference have been under development.

In addition, various techniques (e.g., large-capacity, high-speed and small antenna techniques) have been under development during the development of mobile communication technology in the 5G communication technology.

SUMMARY

According to an exemplary embodiment of the present inventive concept, a semiconductor package includes: a substrate; a semiconductor chip disposed on a first surface of the substrate; solder bumps disposed between a first surface of the semiconductor chip and the substrate; and a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip. The substrate includes substrate patterns, and the substrate patterns cover a second surface of the substrate. The substrate patterns cover 60% to 100% of a total area of the second surface of the substrate.

According to an exemplary embodiment of the present inventive concept, a semiconductor package including: a substrate; a semiconductor chip mounted on a first surface of the substrate; solder bumps disposed between a first surface of the semiconductor chip and the first surface of the substrate; a shielding layer disposed between the semiconductor chip and the solder bumps; and a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip, wherein the substrate includes substrate patterns and an antenna pattern, and wherein the substrate patterns cover a second surface of the substrate.

According to an exemplary embodiment of the present inventive concept, a semiconductor package including: a substrate; a semiconductor chip mounted on a first surface of the substrate; solder bumps disposed between a first surface of the semiconductor chip and the substrate; a solder mask provided on the first surface of the substrate; a shielding layer disposed between the semiconductor chip and the solder bumps; a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip; a molding layer covering a sidewall of the semiconductor chip, and provided between the substrate and the redistribution layer; and vias penetrating the substrate and the molding layer. The substrate includes substrate patterns and an antenna pattern, and the substrate patterns cover a second surface of the substrate. The solder bumps are disposed in regions formed by the solder mask, and the vias include a ground via, a signal via, and a power via. The redistribution layer is electrically connected to the semiconductor chip, and the shielding layer includes an adhesive layer, a shielding metal layer, and a protective layer.

