BACKGROUND

The present invention generally relates to the field of memory devices, and more particularly to fabricating a symmetric read operation resistive random-access memory bit cell with a bipolar junction selector.

Emerging memory applications such as resistive random-access memory (RRAM) require bidirectional selection for efficient operation. Transistor selectors enable bidirectional operation but introduce some read asymmetry because depending on the voltage polarity of the operation, the field-effect (or bipolar) transistor terminal connected to the memory element may be the functional drain (or emitter) or the functional source (or collector). This issue can be addressed by using additional transistors in the bit cell. However, using additional transistors results in an increased bit cell area.

SUMMARY

There is a need for alternative designs and techniques for forming a memory bit cell that can prevent asymmetry issues while reducing bit cell area. Therefore, embodiments of the present invention provide a memory device including a bipolar junction transistor (BJT) with a RRAM element integrated onto an extrinsic base region of the BJT. The proposed structure and integration method can, among other benefits, provide symmetric read operation and enable small device footprint.

According to an embodiment, a memory device includes a resistive random-access memory element electrically connected to an extrinsic base region of a bipolar junction transistor, the extrinsic base region of the bipolar junction transistor consisting of an epitaxially grown material that forms the bottom electrode of the resistive random-access memory element. The epitaxially grown material includes a high dopant concentration and a triangle-shaped top region.

According to another embodiment, a method of writing to a memory device includes applying a first voltage on a word line of the memory device, the memory device including a resistive random-access memory element electrically connected to an extrinsic base of a bipolar junction transistor, applying the first voltage forms a filament in the resistive random-access memory element. A second voltage including an opposite polarity to the first voltage can be applied on the word line to remove a portion of the filament in the resistive random-access memory element. A third voltage can be applied between the word line and at least one of a bit line and a select line to activate a read operation in the resistive random-access memory element.

According to yet another embodiment, a method of forming a memory structure includes forming a resistive random-access memory element electrically connected to an extrinsic base region of a bipolar junction transistor, the extrinsic base region of the bipolar junction transistor consisting of an epitaxially grown material that forms the bottom electrode of the resistive random-access memory element.

