FIELD OF THE DISCLOSURE

Aspects of the disclosure relate to memory arrangements. More specifically, aspects relate to solid state drives (SSDs) that are optimized for enterprise operations based on quality of service based arbitrations.

BACKGROUND OF THE DISCLOSURE

Field of the Disclosure

NVM Express (NVMe) is a standard that has been created to allow non-volatile storage media to be accessed when the media is attached to a PCI Express (PCIe) bus. NVMe may be used with a variety of types of non-volatile storage media. One such type of media is a SSD. The NVMe standard was created to focus on several features, including input/output (I/O) operations between a host device and a memory device. The NVMe standard allows for different manufacturers of SSDs, for example, to be used with a host computer, provided that the standard is maintained.

NVMe uses different queues to achieve processing of data. As a non-limiting example, NVMe uses a paired submission queue and a completion queue to accept data from a host and to notify a host that processing is complete. As an example, host software, located within a host computer, may place a command into the submission queue for an SSD. The SSD, non-volatile storage media, with an accompanying controller, may process the command on the submission queue and then place completions on an associated completion queue.

Quality of service is an important factor in the design of a non-volatile memory. Maintaining high levels of quality of service, despite high workloads, is important for the overall performance and quality of a user. Commands that are placed upon the submission queue, for example, should be processed in not only an orderly fashion, but also within a predefined time limit so that latency is not experienced. Conventional non-volatile memory arrangements, however, receive commands in a serial format and process these commands as received. Some commands, which are not required to be immediately processed, may be immediately processed, while other commands that require to be processed expeditiously, may be forced to wait for processing. The processing, therefore, is non-optimal.

There is a need to perform processing of commands in an expeditious manner for non-volatile memory arrangements, such as solid state drives.

There is also a need to perform an arbitration between different commands in queues such that processing occurs on the commands that are more urgent.

There is a further need to provide for increased quality of service for solid state drives compared to conventional systems.

SUMMARY OF THE DISCLOSURE

The following summary is provided for describing aspects of the disclosure and should not be considered limiting of the scope of the aspects described. A method and apparatus for operating a solid state drive is disclosed comprising receiving at least two commands from a host requiring an action by the solid state drive in a preliminary order, ordering the at least two commands based upon a quality of service classification for the at least two commands to a final order and executing the at least two commands on the solid state drive in the final order, wherein an operational parameter of the solid state drive is modified by at least one of the at least two commands.

In one non-limiting embodiment, a method of operating a solid state drive, is disclosed comprising receiving at least two commands from a host requiring an action by the solid state drive in a preliminary order, ordering the at least two commands based upon a quality of service classification for the at least two commands to a final order and executing the at least two commands on the solid state drive in the final order, wherein an operational parameter of the solid state drive is modified by at least one of the at least two commands.

In another non-limiting embodiment, a method of operating a memory arrangement is disclosed comprising: receiving at least two commands from a host through an interface of the memory arrangement, timestamping each of the at least two commands upon receipt of the commands at the interface, arbitrating each of the at least two commands to create a final order for the performing each of the at least two commands and executing the at least two commands in the memory arrangement in the final order, wherein an operational parameter of the memory is modified by at least one of the at least two commands.

In another non-limiting embodiment, a device controller for a memory arrangement device is disclosed comprising: an interface module configured to transmit and receive data from at least one memory array of the memory arrangement device, a host interface module configured to transmit and receive data from a host, a time stamp arrangement configured to record a time when a command is received from the host through the host interface module, the time stamp arrangement connected to the host interface module, a command arbitration arrangement connected to the host interface module, the command arbitration arrangement configured to receive commands received by the host interface module and arbitrate an operational order for the received commands, a command queueing arrangement connected to the host interface and the interface module, wherein the command queueing arrangement is configured to accept commands placed in an order by the command arbitration arrangement.

In another non-limiting embodiment, a memory device is disclosed comprising: at least one memory array configured to store data provided to the array; an interface module configured to transmit and receive data from at least one memory array, a host interface module configured to transmit and receive data from a host, a time stamp arrangement configured to record a time when a command is received from the host through the host interface module, the time stamp arrangement connected to the host interface module, a command arbitration arrangement connected to the host interface module, the command arbitration arrangement configured to receive commands received by the host interface module and arbitrate an operational order for the received commands and a command queueing arrangement connected to the host interface and the interface module, wherein the command queueing arrangement is configured to accept commands placed in an order by the command arbitration arrangement.

In another non-limiting embodiment, an arrangement for operating a solid state drive is disclosed comprising means for receiving at least two commands from a host requiring an action by the solid state drive in a preliminary order, means for ordering the at least two commands based upon a quality of service classification for the at least two commands to a final order and means for executing at least one command on the solid state drive of the at least two commands in the final order, wherein an operational parameter of the solid state drive is modified by at least one of the at least two commands.

In another non-limiting embodiment, an apparatus for operating a memory arrangement is disclosed comprising means for receiving at least two commands from a host through an interface of the memory arrangement, means for timestamping each of the at least two commands upon receipt of the commands at the interface, means for arbitrating each of the at least two commands to create a final order for the performing each of the at least two commands, wherein the means for arbitrating is performed through a weighted round robin algorithm and means for executing the at least two commands in the memory arrangement in the final order, wherein an operational parameter of the memory is modified by at least one of the at least two commands.

