CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 107139148, filed on Nov. 5, 2018. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND

Technical Field

The present invention is related to a transistor device and manufacturing method thereof, and more particularly, to a high electron mobility transistor (HEMT) device and manufacturing method thereof.

Description of Related Art

High electron mobility transistor (HEMT) is a type of a transistor. HEMT includes a hetero-junction formed by two semiconductor materials with different band gaps. Two dimensional electron gas or two dimensional hole gas can be formed at the hetero-junction, and can be functioned as a conductive channel in HEMT. HEMT is featured in having low resistance, high breakdown voltage and high switching rate etc., thus is comprehensively applied in the field of high power electronic device.

HEMT can be categorized into a depletion mode HEMT having a normally-on channel and an enhancement mode HMET having a normally-off channel. The enhancement mode HEMT is widely studied due to its merits of high safety and being able to be controlled by a driving circuit that is less complicated and less expensive.

SUMMARY

The present invention provides a HEMT device and a manufacturing method thereof. Since the HEMT device has a three dimensional channel structure, the HEMT device can be an enhancement mode HEMT.

A HEMT device according to some embodiments of the present invention includes a channel layer, a barrier layer, a first gate electrode, a first drain electrode and a first source electrode. The channel layer is disposed on a substrate. A surface of a portion of the channel layer located within a first region of the high electron mobility transistor device comprises a polar plane and a non-polar plane. The barrier layer is conformally disposed on the channel layer. The first gate electrode is disposed on the barrier layer, and located within the first region. The first drain electrode and the first source electrode are disposed within the first region, and located at opposite sides of the first gate electrode.

In some embodiments, the polar plane and the non-polar plane is substantially perpendicular with each other.

In some embodiments, the channel layer comprises a body portion and a protruding portion, the protruding portion protrudes from the body portion along a direction substantially normal to a surface of the substrate. A sidewall of the protruding portion is the non-polar plane, and a top surface of the protruding portion is a portion of the polar plane.

In some embodiments, the first gate electrode covers the top surface of the protruding portion.

In some embodiments, the first gate electrode covers the top surface and the sidewall of the protruding portion.

In some embodiments, the channel layer has a recess. A sidewall of the recess is the non-polar plane, and a bottom surface of the recess is a portion of the polar plane. At least a portion of the first gate electrode is located in the recess.

In some embodiments, a top surface of a portion of the channel layer located within a second region of the high electron mobility transistor device comprises a polar plane. The high electron mobility transistor device further comprises a second gate electrode, a second drain electrode and a source electrode. The second gate electrode is disposed on a portion of the barrier layer located within the second region. The second drain electrode and the second source electrode are disposed within the second region, and located at opposite sides of the second gate electrode.

In some embodiments, a top surface of a portion of the channel layer located within a third region of the high electron mobility transistor device comprises a polar plane. The high electron mobility transistor device further comprises a first electrode and a second electrode. The first electrode is disposed in the channel layer and the barrier layer, and located within the third region. The second electrode is disposed on a portion of the barrier layer located within the third region, and located aside the first electrode.

A manufacturing method of a HEMT device according to some embodiments of the present invention comprises: forming a channel material layer on a substrate; patterning a portion of the channel material layer located within a first region of the high electron mobility transistor device, so as to form a channel layer, wherein a surface of a portion of the channel layer within the first region comprises a polar plane and a non-polar plane; conformally forming a barrier layer on the channel layer; forming a first gate electrode on a portion of the barrier layer within the first region; and forming a first drain electrode and a first source electrode within the first region, wherein the first drain electrode and the first source electrode are located at opposite sides of the first gate electrode.

In some embodiments, a method of patterning the portion of the channel material within the first region comprises removing portions of the channel material layer from the surface of the channel material layer, such that a top portion of the channel layer has a first recess and a second recess adjacent with each other. Sidewalls of the first recess and the second recess are portions of the non-polar plane, and bottom surfaces of the first recess and the second recess are portions of the polar plane.

In some embodiments, the first gate electrode is formed on a portion of the channel layer between the first recess and the second recess.

In some embodiments, the first gate electrode further extends into the first recess and the second recess.

In some embodiments, a method of patterning the portion of the channel material within the first region comprises forming a recess at a surface of the channel material layer. A sidewall of the recess is a portion of the non-polar plane, and a bottom surface of the recess is a portion of the polar plane. The first gate electrode is formed in the recess.

In some embodiments, the manufacturing method of the high electron mobility transistor device further comprises: forming a second gate electrode on a portion of the barrier layer within a second region of the high electron mobility transistor device; and forming a second drain electrode and a second source electrode within the second region, wherein the second drain electrode and the second source electrode are located at opposite sides of the second gate electrode.

In some embodiments, the manufacturing method of the high electron mobility transistor device further comprises: forming a first electrode in portions of the channel layer and the barrier layer within a third region of the high electron mobility transistor device; and forming a second electrode on a portion of the barrier layer within the third region, wherein the first electrode is located aside the second electrode.

As above, the HEMT of the embodiments in the present invention has a three dimensional channel structure. This three dimensional channel structure has a polar plane and a non-polar plane. A hetero-junction formed by the barrier layer and portions of the channel layer having polar planes may induce the two dimensional electron gas (or two dimensional hole gas) even if a bias voltage is not applied. On other hand, a hetero-junction formed by the barrier layer and a portion of the channel layer having a non-polar plane does not form any two dimensional electron gas (or two dimensional hole gas). In other words, such discontinuous two dimensional electron gas can be regarded as a discontinuous conductive channel while a proper bias voltage is not applied. A continuous conductive channel can be formed only if a proper bias voltage is applied. Therefore, this HEMT can be an enhancement mode HEMT, which is also referred as a normally-off HEMT. Regarding a threshold voltage of HEMT, the enhancement mode HEMT is beneficial for circuit design. In some embodiments, the enhancement mode HEMT, the depletion mode HEMT and the schottky diode may be integrated into the HEMT device, which forms a basic logic integrated circuit.

To make the aforementioned more comprehensible, several embodiments accompanied with drawings are described in detail as follows.

