BACKGROUND

1. Field of the Disclosure

The present disclosure relates to a semiconductor package structure, an electronic device, and a manufacturing method, and to a semiconductor package structure including a plurality of recesses, an electronic device including a plurality of grooves, and a method for manufacturing the same.

2. Description of the Related Art

Along with the rapid development in electronics industry and the progress of semiconductor processing technologies, semiconductor package structures are integrated with an increasing number of electronic components or electronic devices to achieve improved electrical performance and additional functions. Accordingly, a warpage of the semiconductor package structure may occur during the thermal process. Since a rigidity or stiffness of the semiconductor package structure is relatively low, a delamination may be formed in the interface between different materials and a crack may be formed in the protection material, and then extend or grow into the interior of the semiconductor package structure. If the crack reaches the semiconductor package structure, the circuit layer in the semiconductor package structure may be damaged or broken, which may result in an open circuit and render the semiconductor package structure inoperative. Thus, a yield of the semiconductor package structure may decrease.

SUMMARY

In some embodiments, a semiconductor package structure includes a wiring structure, a first electronic device, a second electronic device, and a protection material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The second electronic device defines a plurality of recesses on a first lateral side surface thereof. The protection material is disposed on the wiring structure and encapsulates the recesses of the second electronic device.

In some embodiments, an electronic device includes a first die, a second die, and an encapsulant. The first die defines a plurality of first recesses on a lateral side surface thereof. The second die is stacked on a top surface of the first die and electrically connected to the first die. A size of the second die is less than a size of the first die. The encapsulant covers the second die and a portion of the top surface of the first die. The encapsulant defines a plurality of second recesses on a lateral side surface thereof.

In some embodiments, a manufacturing method includes: (a) providing a wafer having a plurality of scribe lines; (b) forming a patterned photoresist layer on the wafer to expose the plurality of scribe lines; and (c) cutting the wafer along the plurality of scribe lines to form a plurality of electronic devices. Each of the electronic devices defines a plurality of recesses on a lateral side surface thereof.

