CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority under 35 U.S.C. § 119(a) to Korean patent application number 10-2019-0175675, filed on Dec. 26, 2019, which is incorporated herein by reference in its entirety.

BACKGROUND

Field of Invention

The present disclosure generally relates to an electronic device, and more particularly, to a voltage switching circuit and a semiconductor memory device having the same.

Description of Related Art

Memory devices may be formed in a two-dimensional structure in which strings are arranged horizontally to a semiconductor substrate, or be formed in a three-dimensional structure in which strings are arranged vertically to a semiconductor substrate. A three-dimensional memory device is a memory device devised to overcome the limit of degree of integration in two-dimensional memory devices, and may include a plurality of memory cells vertically stacked on a semiconductor substrate.

SUMMARY

Embodiments provide a voltage switching circuit capable of stably providing a negative voltage and a positive voltage to a plurality of planes.

Embodiments also provide a semiconductor memory device capable of stably providing a negative voltage and a positive voltage to a plurality of planes.

In accordance with an aspect of the present disclosure, there is provided a voltage switching circuit for selectively transferring voltages applied to a first input terminal and a second input terminal to a first output terminal and a second output terminal, the voltage switching circuit including: a first transistor formed on a first well on a substrate, the first transistor being coupled between the first input terminal and the first output terminal; and a second transistor formed on a second well different from the first well, the second transistor being coupled to the second input terminal, wherein, in a first mode, when a first voltage applied to the first input terminal is transferred to the first output terminal and the second output terminal, the first transistor is turned on and the second transistor is turned off.

In a second mode, when the first voltage applied to the first input terminal is transferred to the first output terminal and a second voltage applied to the second input terminal is transferred to the second output terminal, the first transistor may be turned on and the second transistor may be turned on.

The voltage switching circuit may further include a third transistor and a fourth transistor, which are formed on the first well. The third transistor may be coupled between the first input terminal and the second output terminal, and the fourth transistor may be coupled between the second transistor and the second output terminal. In the first mode, the third transistor may be turned on and the fourth transistor may be turned off. In the second mode, the third transistor may be turned off and the fourth transistor may be turned on.

In the first mode, the first voltage and the second voltage may have different polarities.

The voltage switching circuit may further include a third transistor formed on the first well and a fourth transistor formed on the second well. The third transistor and the fourth transistor may be coupled in series between the first input terminal and the second output terminal. In the first mode, the third transistor and the fourth transistor may be turned on. In the second mode, the third transistor and the fourth transistor may be turned off.

In the second mode, the first voltage and the second voltage may have different polarities.

The voltage switching circuit may further include a third transistor and a fourth transistor, which are formed on the first well, and a fifth transistor formed on the second well. The third transistor and the fifth transistor may be coupled in series between the first input terminal and the second output terminal, and the fourth transistor may be coupled between the second transistor and the second output terminal. In the first mode, the third transistor and the fifth transistor may be turned on, and the fourth transistor may be turned off. In the second mode, the third transistor and the fifth transistor may be turned off, and the fourth transistor may be turned on.

In the first mode, the first voltage and the second voltage may have different polarities.

In the second mode, the first voltage and the second voltage may have different polarities.

The first well and the second well may be p-wells.

In accordance with another aspect of the present disclosure, there is provided a voltage switching circuit for selectively transferring voltages applied to a first input terminal and a second input terminal to a first output terminal and a second output terminal, the voltage switching circuit including: a first switching circuit configured to selectively transfer a first voltage applied to the first input terminal to the second output terminal; and a second switching circuit configured to selectively transfer a second voltage applied to the second input terminal to the second output terminal, wherein the first voltage is transferred to the first output terminal, wherein at least one transistor included in the first switching circuit is formed on a well different from that on which at least one transistor included in the second switching circuit is formed.

In a first mode, the first switching circuit may be activated and the second switching circuit may be inactivated. In a second mode, the first switching circuit may be inactivated and the second switching circuit may be activated.

The first switching circuit may include a first transistor coupled between the first input terminal and the second output terminal. The second switching circuit may include: a second transistor coupled to the second input terminal; and a third transistor coupled between the second transistor and the second output terminal. The first transistor and the third transistor may be formed on a first well, and the second transistor may be formed on a second well different from the first well.

In the first mode, the first voltage and the second voltage may have different polarities.

The first switching circuit may include: a first transistor coupled to the first input terminal; and a second transistor coupled between the first transistor and the second output terminal. The second switching circuit may include a third transistor coupled between the second input terminal and the second output terminal. The first transistor may be formed on a first well, and the second transistor and the third transistor may be formed on a second well different from the first well.

In the second mode, the first voltage and the second voltage may have different polarities.

The first switching circuit may include: a first transistor coupled to the first input terminal; and a second transistor coupled between the first transistor and the second output terminal. The second switching circuit may include: a third transistor coupled to the second input terminal; and a fourth transistor coupled between the third transistor and the second output terminal. The first transistor and the fourth transistor may be formed on a first well, and the second transistor and the third transistor may be formed on a second well different from the first well.

In the first mode, the first voltage and the second voltage may have different polarities.

In the second mode, the first voltage and the second voltage may have different polarities.

In accordance with an aspect of the present disclosure, there is provided a switching circuit including: a first transistor configured to transfer a first voltage from a first input node to a first output node; second and third transistors configured to transfer, when turned on, a second voltage from a second input node to a second output node; and a fourth transistor configured to transfer, when turned on, the first voltage to the second output node, wherein the second transistor is formed on a different well from the first, third and fourth transistors, and wherein the first and second voltages have different polarities.

In accordance with an aspect of the present disclosure, there is provided a switching circuit comprising: a first transistor configured to transfer a first voltage from a first input node to a first output node; a second transistor configured to transfer, when turned on, a second voltage from a second input node to a second output node; and third and fourth transistors configured to transfer, when turned on, the first voltage to the second output node, wherein the second and fourth transistors are formed on a different well from the first and third transistors, and wherein the first and second voltages have different polarities.

In accordance with an aspect of the present disclosure, there is provided a switching circuit comprising: a first transistor configured to transfer a first voltage from a first input node to a first output node; second and third transistors configured to transfer, when turned on, a second voltage from a second input node to a second output node; and fourth and fifth transistors configured to transfer, when turned on, the first voltage to the second output node, wherein the second and fifth transistors are formed on a different well from the first, third and fourth transistors, and wherein the first and second voltages have different polarities.

