TECHNICAL FIELD

The present disclosure relates to the field of display technologies, and in particular, to a display panel and a display device.

BACKGROUND

At present, the full screen is a development trend of the market, and it is an important technical point to increase the screen occupancy ratio by reducing a width of a step area. In the related art, a demultiplexer (demux) is usually provided to reduce the number of data lines, thereby reducing the width occupied by the data fan-out line, and thus the width of the step area can be reduced. In the related art, after a data signal is written into the data line, the demux is turned off, and the potential of the data signal is maintained by capacitance on the data line. When the data signal is written normally, the data line is in a floating state. However, due to the parasitic capacitance, if the clock signal jumps, the data signal value will be influenced. Moreover, left and right clock signals have different signal aspects and thus different variations, which may result in a phenomenon of split screen.

SUMMARY

In view of this, the present disclosure provides a display panel to solve the above technical problems.

In an aspect, the present disclosure provides a display panel, including: data lines disposed in a display area; bonding terminals disposed in a non-display area surrounding the display area; fan-out lines; and demuxes disposed between the display area and the bonding terminals, wherein each of the demuxes includes at least two switch transistors and at least two first clock signal lines; and each switch transistor in one demux of the demuxes has a first electrode electrically connected to a corresponding data line of the data lines through a first connection line, a second electrode connected to one of the bonding terminals through one of the fan-out lines corresponding to the one demux, and a gate electrode electrically connected to one of the at least two first clock signal lines corresponding to the switch transistor; wherein each of the fan-out lines of the display panel overlaps each of the at least two first clock signal lines for an equal number of times.

In another aspect, the present disclosure provides a display device including the display panel described above.

