FIELD OF THE TECHNOLOGY

At least some embodiments disclosed herein relate to a memory chip having an integrated data mover. Also, at least some embodiments disclosed herein relate to using such a memory chip in flexible provisioning of a string of memory chips to form a memory.

BACKGROUND

Memory of a computing system can be hierarchical. Often referred to as memory hierarchy in computer architecture, memory hierarchy can separate computer memory into a hierarchy based on certain factors such as response time, complexity, capacity, persistence and memory bandwidth. Such factors can be related and can often be tradeoffs which further emphasizes the usefulness of a memory hierarchy.

In general, memory hierarchy affects performance in a computer system. Prioritizing memory bandwidth and speed over other factors can require considering the restrictions of a memory hierarchy, such as response time, complexity, capacity, and persistence. To manage such prioritization, different types of memory chips can be combined to balance chips that are faster with chips that are more reliable or cost effective, etc. Each of the various chips can be viewed as part of a memory hierarchy. And, for example, to reduce latency on faster chips, other chips in a memory chip combination can respond by filling a buffer and then signaling for activating the transfer of data between chips.

Memory hierarchy can be made of up of chips with different types of memory units. For example, memory units can be dynamic random-access memory (DRAM) units. DRAM is a type of random access semiconductor memory that stores each bit of data in a memory cell, which usually includes a capacitor and a metal-oxide-semiconductor field-effect transistor (MOSFET). The capacitor can either be charged or discharged which represents the two values of a bit, “0” and “1”. In DRAM, the electric charge on a capacitor leaks off, so DRAM requires an external memory refresh circuit which periodically rewrites the data in the capacitors by restoring the original charge per capacitor. On the other hand, with static random-access memory (SRAM) units a refresh feature is not needed. Also, DRAM is considered volatile memory since it loses its data rapidly when power is removed. This is different from flash memory and other types of non-volatile memory, such as non-volatile random-access memory (NVRAM), in which data storage is more persistent.

A type of NVRAM is 3D XPoint memory. With 3D XPoint memory, memory units store bits based on a change of bulk resistance in conjunction with a stackable cross-gridded data access array. 3D XPoint memory can be more cost effective than DRAM but less cost effective than flash memory.

Flash memory is another type of non-volatile memory. An advantage of flash memory is that is can be electrically erased and reprogrammed. Flash memory is considered to have two main types, NAND-type flash memory and NOR-type flash memory, which are named after the NAND and NOR logic gates that can implement the memory units of flash memory. The flash memory units or cells exhibit internal characteristics similar to those of the corresponding gates. A NAND-type flash memory includes NAND gates. A NOR-type flash memory includes NOR gates. NAND-type flash memory may be written and read in blocks which can be smaller than the entire device. NOR-type flash permits a single byte to be written to an erased location or read independently. Because of advantages of NAND-type flash memory, such memory has been often utilized for memory cards, USB flash drives, and solid-state drives. However, a primary tradeoff of using flash memory in general is that it is only capable of a relatively small number of write cycles in a specific block compared to other types of memory such as DRAM and NVRAM.

