TECHNICAL FIELD

Example embodiments relate to a semiconductor manufacturing part used in a dry etching process, and more particularly, a semiconductor manufacturing part including a SiC deposition layer having an excellent plasma resistance characteristic and a manufacturing method thereof.

BACKGROUND ART

In general, a plasma processing method used in a semiconductor manufacturing process is one of dry etching processes through which a target is etched using gas. This method may include injecting etching gas into a reaction vessel and ionizing it, accelerating it to a wafer surface, and physically and chemically removing the wafer surface. The method is widely used because it is easy to control etching and is highly productive, and enables a formation of a fine pattern of tens of nanometers (nm).

Various semiconductor manufacturing parts including a focus ring in a dry etching device may be used to allow plasma to be concentrated around a wafer on which an etching process is performed in a reaction vessel under an unfavorable condition in the presence of plasma. Herein, such a part itself may be exposed to plasma and thus damaged. Thus, researches have been continuously conducted to increase plasma resistance of a semiconductor manufacturing part. As one of such researches, there is a research on a method of manufacturing a part, such as a focus ring or an electrode of a SiC material instead of using a Si material.

Here, the SiC material is relatively high cost compared to a graphite material, which may lead to increasing product cost. In particular, in the case of producing a semiconductor manufacturing product, price of the SiC material becomes an issue, which may cause a degradation in productivity.

DISCLOSURE OF INVENTION

Technical Goals

Example embodiments provide a method for manufacturing a semiconductor manufacturing part using a simple method without a need to significantly increase production cost.

However, the example embodiments are not limited to what is described above, and it is thus obvious to those skilled in the art that other tasks not described herein may also be achieved from the example embodiments to be described hereinafter.

Technical Solutions

According to the present disclosure, there is provided a semiconductor manufacturing part including a SiC deposition layer, the semiconductor manufacturing part including a base material; and a SiC deposition layer formed on the base material. A thickness ratio of the base material and the SiC deposition layer is 1:1 to 100:1.

According to an example embodiment, the base material may include at least one selected from a group consisting of graphite, reaction sintered SiC, pressureless sintered SiC, hot press SiC, recrystallized SiC, and CVD SiC.

According to an example embodiment, the base material may be in a stepped structure having a step, and a cross-section of the step may include a curved surface or surfaces of the step form an obtuse angle.

According to an example embodiment, a thickness of the SiC deposition layer may be 2 mm to 20 mm.

According to an example embodiment, the SiC deposition layer may include a plurality of layers.

According to an example embodiment, a thickness of the SiC deposition layer formed on at least one surface of the base material may be 1.5 to 3 times compared to that of the SiC deposition layer formed on a surface opposite to the one surface of the base material.

According to the present disclosure, there is provided a method of manufacturing a semiconductor manufacturing part including a SiC deposition layer, the method including preparing a base material including at least one selected from a group consisting of graphite, reaction sintered SiC, pressureless sintered SiC, hot press SiC, recrystallized SiC, and CVD SiC; and forming the SiC deposition layer on the base material.

According to an example embodiment, a thickness ratio of the base material and the SiC deposition layer may be 1:1 to 100:1.

According to an example embodiment, the forming of the SiC deposition layer may be performed using a chemical vapor deposition (CVD) method.

According to an example embodiment, the forming of the SiC deposition layer may be performed at a temperature of 1000° C. to 1900° C.

According to an example embodiment, the forming of the SiC deposition layer may be performed under condition in which a temperature at a start of deposition is higher than a temperature at an end of deposition.

According to an example embodiment, the forming of the SiC deposition layer may be performed with sequentially increasing a temperature while forming the SiC deposition layer.

According to an example embodiment, the forming of the SiC deposition layer may be performed a plurality of number of times.

According to an example embodiment, the semiconductor manufacturing part manufacturing method may further include performing a residual stress removal operation of performing heat treatment at 1500° C. to 2000° C. after forming the SiC deposition layer.

According to an example embodiment, the base material may be mounted to a jig and the jig is in a tapered shape and have a width extending in a direction in which the jig contacts with a surface of the base material.

Advantageous Effects

A semiconductor manufacturing part including a SiC deposition layer according to example embodiments may be manufactured through a method of including a base material and forming the SiC deposition layer with a relatively thin thickness on the base material, thereby decreasing relatively high product cost and enhancing a productivity.

Also, although the SiC deposition layer included in the semiconductor manufacturing part is formed with the relatively thin thickness, the base material may not be exposed to plasma. Accordingly, it is possible to prevent a degradation in quality of goods when manufacturing a semiconductor product through a dry etching process by plasma.

