CROSS-REFERENCE TO RELATED APPLICATION

Korean Patent Application No. 10-2018-0149132, filed on Nov. 28, 2018, in the Korean Intellectual Property Office, and entitled: “Display Apparatus and Method of Manufacturing the Same,” is incorporated by reference herein in its entirety.

BACKGROUND

1. Field

Embodiments relate to a display apparatus and a method of manufacturing the display apparatus.

2. Description of the Related Art

Recently, a display apparatus having light weight and small size has been manufactured. A cathode ray tube (CRT) display apparatus has been used due to a performance and a competitive price. The CRT display apparatus may be limited as to size or portability. Therefore, a display apparatus such as a plasma display apparatus, a liquid crystal display apparatus, and an organic light emitting display apparatus has been highly regarded due to small size, light weight, and low-power-consumption.

SUMMARY

Embodiments are directed to a display apparatus, including a base substrate including a display area and a peripheral area, a conductive layer formed on the base substrate in an entirety of the peripheral area and the display area, a buffer layer on the conductive layer, a thin film transistor on the buffer layer in the display area, an electrode in a contact hole that is formed through the buffer layer to expose a side surface of the conductive layer in the peripheral area, the electrode making contact the conductive layer, an insulating pattern in the contact hole on the electrode, and a wiring on the insulating pattern and electrically connected to the electrode.

The electrode may be coupled to a ground voltage or a constant voltage.

The peripheral area may include a pad area in which a pad portion electrically connected to a driving unit is disposed, and a folding area between the pad portion and the display area, and the contact hole may be in the folding area.

The buffer layer may not be present in the folding area.

The insulating pattern may cover a portion where the buffer layer is not present in the folding area.

The conductive layer may be an n+ doped amorphous silicon layer.

The base substrate may include a first polyimide layer, a barrier film layer on the first polyimide layer, and a second polyimide layer on the barrier film layer.

The base substrate may further include a second conductive layer disposed between the barrier film layer and the second polyimide layer or between the barrier film layer and the first polyimide layer, and the second conductive layer may be exposed by the contact hole, and the second conductive layer may contact the electrode.

The base substrate may include a first polyimide layer, a barrier film layer on the first polyimide layer, and a second polyimide layer on the barrier film layer, and the conductive layer may be disposed between the barrier film layer and the second polyimide layer or between the barrier film layer and the first polyimide layer.

The contact hole may be formed through the conductive layer so as expose a side surface of the conductive layer, and the side surface of the conductive layer may contact the electrode.

The contact hole may be formed by removing a portion of the base substrate.

The thin film transistor may include an active pattern, a gate electrode, a source electrode and a drain electrode, and the display apparatus may further include a gate insulating layer disposed between the active pattern and the gate electrode, and an interlayer insulating layer between the gate electrode and the source and drain electrodes.

The display apparatus may further include a via insulating layer on the source and drain electrode, a first electrode on the via insulating layer and electrically connected to the drain electrode, a light emitting layer on the first electrode, and a second electrode on the light emitting layer.

The via insulating layer may cover the wiring.

The electrode may extend to an upper surface of the interlayer insulating layer, and the wiring may contact the electrode on the interlayer insulating layer.

Embodiments are also directed to a method of manufacturing a display apparatus, the method including forming a conductive layer on a base substrate, forming a buffer layer on the conductive layer, forming an active pattern on the buffer layer, forming an insulating layer on the active pattern, forming a contact hole by partially removing the insulating layer and the buffer layer to expose the conductive layer, forming an electrode that contacts the conductive layer in the contact hole, forming an insulating pattern on the electrode so as to expose a portion of the electrode, and forming a wiring electrically connected to the electrode on the insulating pattern.

The conductive layer may be an n+ doped amorphous silicon layer.

The method may further include forming a gate electrode on the insulating layer before forming the contact hole, and forming an interlayer insulating layer on the gate electrode. In forming the contact hole, the contact hole may be formed by partially removing the interlayer insulating layer, the insulating layer, and the buffer layer.

In forming the contact hole, a portion of the conductive layer may be removed to form the contact hole, and a side surface of the conductive layer may be exposed, and the side surface of the conductive layer may contact the electrode.

The base substrate may include at least one polyimide layer and at least one barrier film layer.

