CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit under 35 USC 119(a) of Korean Patent Application No. 10-2019-0142069 filed on Nov. 7, 2019, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes.

BACKGROUND

1. Field

The following description disclosure relates to a method and system with improved memory input and output speed in an operating system.

2. Description of the Related Art

In recent years, solid state drives (hereinafter, abbreviated as “SSD”) are being used as a data storage device to replace hard disks.

An SSD device stores information using memory semiconductor and is configured to be compatible with an advanced technology attachment (ATA) to perform a similar operation with a hard disk drive. Since the SSD device does not have a mechanically moving part, typical problems of hard disk drives, such as a long seek time, a latency, a mechanical latency, and a failure rate may be significantly reduced.

A reading function of the data storage device, provided by the operating system, performs an operation in each layer while passing through input/output layers to finally transmit an input/output instruction of the data storage device. Further, when the input/output operation of the data storage device is completed, the input/output operation is completed by returning to the layer.

To be more specific, in the related art, when it is requested to read data, a buffer cache is searched, a buffer memory is allocated, a buffer cache of the buffer memory is registered, a layering process of a file system is performed, it enters a block input/output layer, a DMA address of the buffer memory is allocated, and an input/output request of the data storage device is processed in sequence. When a hardware input/output process ends, after receiving a notification through an interrupt, the DMA address of the buffer memory is released, and a processor which requests the input/output is awaken and a context is switched.

In this case, when the input/output speed of the data storage device is slow (for example, a hard disk), the overall input/output latency is not largely affected by software input/output stack, but in the case of the SSD, the software input/output stack may affect the overall performance. Therefore, there may be a problem in that the input/output speed of the SSD is lowered as compared with the specified performance.

SUMMARY

This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

In one general aspect, a data management system includes a data storage device, a buffer memory, and a controller. The buffer memory is configured to temporally store data read during a reading operation of the data storage device. The controller is configured to, after transmitting a data input/output (I/O) instruction to the data storage device upon an indication of a data reading request, allocate the buffer memory, register a buffer cache of the buffer memory, allocate a direct memory access (DMA) address for the buffer memory, and release the DMA address.

The controller may be further configured to allocate the buffer memory and the DMA address in advance of performing the data I/O operation.

The controller may be further configured to register the buffer cache and release the DMA address while performing the data I/O operation.

The controller may be further configured to search through the buffer cache when there is the data reading request.

The controller may be further configured to receive a notification through an interrupt when the data I/O operation is completed.

The controller may be further configured to switch a context to perform another task after receiving the notification.

In another general aspect, a data management method includes searching through a buffer cache upon an indication of a reading request, transmitting a data input/output (I/O) instruction, allocating a buffer memory and a direct memory access (DMA) address in advance of performing the data I/O operation, and registering a buffer cache of the buffer memory and releasing the DMA address of the buffer memory while performing the data I/O operation.

A notification may be received through an interrupt when the data I/O operation is completed.

A controller may be configured to switch a context upon receiving the notification.

A non-transitory computer-readable storage medium storing instructions that, when executed by one or more processors, may configure the one or more processors to perform the method.

In another general aspect, a data management system includes a data storage device, a buffer memory, and a controller. The buffer memory is configured to store data read during a reading operation of the data storage device. The controller is configured to, after transmitting a data input/output (I/O) instruction to the data storage device upon an indication of a data reading request and before switching a context of the controller, allocate the buffer memory, register a buffer cache of the buffer memory, allocate a direct memory access (DMA) address for the buffer memory, and release the DMA address.

The controller may be further configured to, before performing the data I/O operation, allocate the buffer memory and the DMA address.

The controller may be further configured to register the buffer cache and release the DMA address while performing the data I/O operation.

The controller may be further configured to search through the buffer cache when there is the data reading request.

The controller may be further configured to receive a notification through an interrupt when the data I/O operation is completed.

Other features and aspects will be apparent from the following detailed description, the drawings, and the claims.

