TECHNICAL FIELD

The present disclosure relates to a semiconductor device and a method for manufacturing the same, and is particularly suitable when applied to a semiconductor element using a wide band gap semiconductor such as silicon carbide (hereinafter referred to as SiC) and a manufacturing method for the same.

BACKGROUND

In a semiconductor device, it is necessary to reduce on-resistance in order to reduce switching loss or the like. However, when a high drain voltage is applied at a time of short-circuit of a load, a value of a current flowing in a semiconductor element increases in inverse proportion to the on-resistance of a semiconductor element. In other words, as a semiconductor element having an on-resistance value becomes smaller, a value of a saturation current at the time of the load short-circuit becomes larger. As a result, the semiconductor element is likely to be damaged by self-heating, so that a withstand capacity of the SiC semiconductor device at the time of the load short-circuit is reduced. Therefore, there is a trade-off relationship between the reduction of the on-resistance and the improvement of the withstand capacity of the SiC semiconductor device at the time of the load is short-circuit. However, the improvement in this trade-off relationship, that is, compatibility between low on-resistance value and low saturation current, is desired.

SUMMARY

A semiconductor device includes: an inversion type semiconductor element that includes: a substrate having a first conductivity type or a second conductivity type; a first conductivity type layer formed on the substrate; a second conductivity type region that is formed on the first conductivity type layer; a JFET portion that is formed on the first conductivity type layer, is sandwiched by the second conductivity type region to be placed; a source region that is formed on the second conductivity region; a gate insulation film formed on a channel region that is a part of the second conductivity type region; a gate electrode formed on the gate insulation film; an interlayer insulation film covering the gate electrode and the gate insulation film, and including a contact hole; a source electrode electrically connected to the source region through the contact hole; and a drain electrode formed on a back side of the substrate.

