BACKGROUND OF THE INVENTION

Field of the Invention

The invention relates in general to a semiconductor device and a method for fabricating the same, and more particularly to a three-dimensional semiconductor device and a method for fabricating the same.

Description of the Related Art

Recently, as the demand for more excellent memory devices has gradually increased, various three-dimensional (3D) memory devices have been provided. However, in order for such three-dimensional memory devices to achieve higher storage capacity and higher performance, there is still a need to provide an improved three-dimensional memory device and a method for fabricating the same.

SUMMARY OF THE INVENTION

The present invention relates to a semiconductor device. Compared with the comparative example in which the channel layer is arranged outside the first conductive pillar and the second conductive pillar and surrounds the first conductive pillar and the second conductive pillar, since the channel layer of the semiconductor device of the present invention is disposed between the first conductive pillar and the second conductive pillars, it can have a shorter channel length, which not only improves the performance of the semiconductor device, but also increases the density of the chip.

According to an embodiment of the present invention, a semiconductor device is provided. The semiconductor device includes a stack and a plurality of memory strings. The stack is formed on a substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings penetrate along a first direction, and each of the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are electrically isolated from each other. The channel layer extends along the first direction, wherein the channel layer is disposed between the first conductive pillar and the second conductive pillar, and the channel layer is coupled to the first conductive pillar and the second conductive pillar. The memory structure surrounds the first conductive pillar, the second conductive pillar and the channel layer.

According to another embodiment of the present invention, a semiconductor device is provided. The semiconductor device includes a stack and a plurality of memory strings. The stack is formed on a substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings penetrate the stack along a first direction, and each of the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are electrically isolated from each other. The channel layer extends along the first direction, wherein the channel layer is coupled to the first conductive pillar and the second conductive pillar. The memory structure surrounds the first conductive pillar, the second conductive pillar and the channel layer. The conductive layer includes a first bottom conductive layer, and the first bottom conductive layer is disposed under the first conductive pillar and the second conductive pillar.

According to yet another embodiment of the present invention, a method for fabricating a semiconductor device is provided. The method includes the following steps. First, a stack is formed on a substrate. The stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. After that, a plurality of memory strings are formed. The memory strings penetrate the stack along a first direction, and each of the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are electrically isolated from each other. The channel layer extends along the first direction, wherein the channel layer is disposed between the first conductive pillar and the second conductive pillar, and the channel layer is coupled to the first conductive pillar and the second conductive pillar. The memory structure surrounds the first conductive pillar, the second conductive pillar and the channel layer.

The above and other aspects of the invention will become better understood with regard to the following detailed description of the preferred but non-limiting embodiment(s). The following description is made with reference to the accompanying drawings.

