BACKGROUND

Technical Field

The present invention relates to an active pen configured to transmit a downlink signal to a position detecting device, and a sensor integrated circuit for receiving the downlink signal transmitted by the active pen.

Description of the Art

Position detecting systems that support input with an active pen are lately desired to support simultaneous input with a plurality of active pens, and some technologies have been proposed to meet such demand. In one of the technologies, a plurality of active pens transmit downlink signals at different frequencies in the same time slot so that the plurality of active pens can transmit the downlink signals simultaneously. Patent Document 1 discloses an example of such technology.

PRIOR ART DOCUMENT

Patent Document

Patent Document 1: U.S. Patent Application Publication No. 2016/0246390.

BRIEF SUMMARY

Technical Problems

The inventors of the present application have considered use of a frequency dividing circuit as the simplest configuration to achieve downlink signals having different frequencies. In a case where, for example, a reference clock having 8 MHz is used, a signal having 500 kHz, a signal having 333.3 kHz, and a signal having 250 kHz can be created through frequency division by 1/16, 1/24, and 1/32, respectively. When downlink signals can be generated using these frequencies, carrier waves for the downlink signals can be created using a simple configuration, namely, the frequency dividing circuit.

As a result of more detailed study, however, it has been discovered that the configuration which simply uses the frequency dividing circuit has the following problems: computation on the side of a sensor integrated circuit configured to receive the downlink signals becomes complex, and different active styluses have largely different unused time within one time slot such that time cannot be effectively utilized. The following describes the problems in detail.

FIG. 14is a diagram illustrating the configurations of downlink signals according to the background art of the present invention. Note that, the technology illustrated inFIG. 14itself has been devised by the inventors of the present application, and was not published at the time of the filing of the present application.FIG. 14illustrates an example in which the downlink signal is configured with a pulse signal modulated by binary phase-shift keying (BPSK). In the example inFIG. 14, one symbol (a group of digital data that is sent per modulation) thus includes one bit. Further, in the example illustrated inFIG. 14, an active pen1transmits a downlink signal at 500 kHz, an active pen2transmits a downlink signal at 333.3 kHz, and an active pen3transmits a downlink signal at 250 kHz. In addition, in the example illustrated inFIG. 14, the duration of one time slot is 0.25 msec, and the size of data that is transmitted in one time slot is 21 bits.

In order to avoid the generation of harmonic noise, duration that is used for the transmission of one symbol (the duration of a window W illustrated inFIG. 14, hereinafter referred to as a “symbol duration”) is desirably set to a value equal to an integer multiple of the period of the pulse signal. When the symbol duration is set to such value, however, as illustrated inFIG. 14, values of the symbol durations differ between the frequencies. In the example inFIG. 14, the symbol duration is 10 μsec in the case where the frequency is 500 kHz, the symbol duration is 9 μsec in the case where the frequency is 333.3 kHz, and the symbol duration is 8 μsec in the case where the frequency is 250 kHz. This means that the start position and end position of the window W differ between the frequencies, resulting in complex computation for phase acquisition on the side of a sensor integrated circuit configured to receive the downlink signals.

Further, as illustrated inFIG. 14, there arises a problem that a large difference exists in unused time in one time slot between the active pens. For example, a difference in unused time between the active pen1configured to use the downlink signal having 500 kHz and the active pen3configured to use the downlink signal having 250 kHz is 82−40=42 μsec. This 42 μsec can be considered as time that cannot be effectively utilized.

It is therefore one object of the present invention to provide an active pen and a sensor integrated circuit capable of avoiding complex computation for phase acquisition on the side of a sensor integrated circuit configured to receive downlink signals, which are also capable of generating carrier waves for the downlink signals using a simple configuration, namely, a frequency dividing circuit, and are further capable of reducing a difference in unused time in one time slot between active pens.

Technical Solution

An active pen according to one aspect of the present invention is an active pen configured to transmit one or more symbol values in one time slot, the active pen including: a frequency dividing circuit configured to frequency-divide a reference clock with a frequency division ratio based on each of a plurality of frequencies different from each other, to thereby generate a plurality of carrier waves having frequencies different from each other; and a transmission circuit configured to transmit a first downlink signal in a symbol duration that is common among the plurality of frequencies, wherein the first downlink signal is obtained by modulating a first carrier wave, which is generated by the frequency dividing circuit, with a value of a first symbol that is a transmission target.

A sensor integrated circuit according to one aspect of the present invention is a sensor integrated circuit connected to a sensor electrode group, and configured to detect, based on a charge induced in the sensor electrode group, a plurality of downlink signals transmitted from one or more active pens by using one of a predetermined plurality of frequencies different from each other, to thereby detect a specified position based on each of the detected plurality of downlink signals and demodulate a value of a symbol transmitted by each of the detected plurality of downlink signals. The sensor integrated circuit includes: an analog-to-digital (AD) conversion circuit configured to acquire a reception level value corresponding to a charge induced in one of a plurality of sensor electrodes of the sensor electrode group; and a plurality of demodulation circuits each corresponding to one of the predetermined plurality of frequencies different from each other, and configured to perform frequency analysis on a series of the reception level values at a corresponding frequency to acquire one of the plurality of downlink signals transmitted at the corresponding frequency, and perform, per a symbol duration that is common among the predetermined plurality of frequencies, phase analysis on the acquired downlink signal, to thereby acquire the value of the symbol transmitted by the acquired downlink signal.

Advantageous Effects

According to the present invention, the symbol durations of the downlink signals transmitted from the respective active pens are equal to each other, and hence it is possible to avoid complex computation for phase acquisition on the side of the sensor integrated circuit configured to receive the downlink signals. Carrier waves for the downlink signals can be generated using a simple configuration, namely, a frequency dividing circuit. Further, the total durations of the downlink signals transmitted from the respective active pens are equal to each other, and hence it becomes possible to reduce the difference in unused time in one time slot between the active pens.

