BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1is a block diagram of a memory system.

FIG. 2is a block diagram of a memory system.

FIG. 3Ais a flow diagram illustrating a read operation.

FIG. 3Bis a flow diagram illustrating a write operation.

FIG. 4is a diagram illustrating controller actions performed for a read operation.

FIG. 5is a diagram illustrating memory component actions performed for a read operation.

FIG. 6is a diagram illustrating controller actions performed for a write operation.

FIG. 7is a diagram illustrating memory component actions performed for a write operation.

FIG. 8is a diagram illustrating controller actions performed for a write operation to a memory component that checks an error-detecting code.

FIG. 9is a diagram illustrating memory component actions performed for a write operation and checking of an error-detecting code.

FIG. 10is a diagram illustrating a memory system that checks an error-detecting code applied to the command/address communications.

FIG. 11is a flowchart illustrating a memory component access.

FIG. 12is a flowchart illustrating a method of accessing a memory component.

FIG. 13is a flowchart illustrating a method of determining whether an error occurred.

FIG. 14is a flowchart illustrating a method of providing error-detection information.

FIG. 15is a flowchart illustrating a method of transmitting error-detection information to a controller.

FIG. 16is a flowchart illustrating a method of receiving error-detection information from a memory component.

FIG. 17is a block diagram of a processing system.

