TECHNICAL FIELD

Embodiments of the present disclosure pertain to the field of electronic device manufacturing, and in particular, to three-dimensional (3D) memory structures. More particularly, embodiments of the disclosure are directed to methods for active cut self-aligned quadruple patterning (SAQP) applications.

BACKGROUND

Generally, an integrated circuit (IC) refers to a set of electronic devices, e.g., transistors formed on a small chip of semiconductor material, typically, silicon. Typically, the IC includes one or more layers of metallization having metal lines to connect the electronic devices of the IC to one another and to external connections. Typically, layers of the interlayer dielectric material are placed between the metallization layers of the IC for insulation.

For current dynamic random access memory (DRAM) active-cut patterning (D1x, D1y node), cross self-aligned double patterning (X-SADP) or lithography-etch-lithography-etch (LELE) schemes are employed. However, integration of these schemes causes shallow trench isolation (STI) active island area (also called Active Area) to be reduced as the technology node advances. If the Active Area shrinks, it can cause buried wordline patterning and yield issues. Therefore, there is an ongoing need in the art for methods of improving active cut areas.

SUMMARY

One or more embodiments of the disclosure are directed to methods of forming an electronic device. A substrate is provided for processing. The substrate comprises: a plurality of first lines extending along a first direction, the first lines comprising a first spacer material, a plurality of second lines comprising a second spacer material extending along the first direction, the second lines arranged on either side of the plurality of first lines and having a trench between adjacent second lines exposing a portion of the substrate. A conformal gapfill process is performed to fill the trench with carbon gapfill material to form a carbon line along the first direction and deposit an overburden carbon material having an opening aligned with the carbon gapfill material in the filled trench. A spin-on-carbon (SOC) layer is deposited on the carbon material to fill the opening in the overburden carbon material and cover the carbon gapfill material in the filled trench and the overburden carbon material. The SOC layer and the overburden carbon material are removed to expose a top surface of the first spacer material, the second spacer material and the carbon gapfill material.

Additional embodiments of the disclosure are directed to methods of forming an electronic device. A substrate comprising a plurality of first lines extending along a first direction, a plurality of carbon material lines extending along the first direction, each of the carbon material lines separated from adjacent first lines by a second line, an oxide layer on the first lines, second lines and carbon material lines, and a plurality of third lines on the oxide layer, the third lines extending along a second direction different than the first direction and spaced to form trenches between adjacent third lines is provided. A conformal gapfill process is performed to fill the trench between adjacent third lines with a fourth spacer material. Portions of the fourth spacer material are removed to provide a plurality of fourth lines of the fourth spacer material. Each of the fourth lines is adjacent to a third line so that each third line has a fourth line on either side thereof, and form an opening exposing the oxide layer. A first cut etch process is performed to remove the oxide layer and portions of the first lines and carbon material lines under the oxide layer, leaving the second lines.

Further embodiments of the disclosure are directed to processing tools for forming a semiconductor device. The processing tools comprise a central transfer station with a plurality of processing chambers disposed around the central transfer station. A robot is within the central transfer station and is configured to move a substrate between the plurality of processing chambers. A first processing chamber is connected to the central transfer station. The first processing chamber is configured to perform etch process. A second processing chamber is connected to the central transfer station. The second processing chamber is configured to perform deposition processes. A controller is connected to one or more of the central transfer station, the robot, the first processing chamber, and/or the second processing chamber. The controller has one or more configurations selected from a first configuration to move a substrate on the robot between the plurality of processing chambers, a second configuration to perform a conformal gapfill process in one or more of the processing chambers, a third configuration to perform one or more etch processes, a fourth configuration to perform a chemical-mechanical planarization process, and a fifth configuration to perform a lithography process.

