CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority under 35 U.S.C. § 119(a) to Korean patent application number 10-2019-0106747 filed on Aug. 29, 2019, which is incorporated herein by reference in its entirety.

BACKGROUND

Field of Invention

Various embodiments of the present disclosure generally relate to a memory system, and more particularly, to a memory system including a plurality of memory blocks.

Description of Related Art

A memory system may include a memory device and a memory controller.

The memory controller may control the operation of the memory system in response to a request from a host. The memory device may store data or output the stored data, under control of the memory controller. For example, the memory device is formed of a volatile memory device in which data stored therein is lost when power supply is interrupted, or a nonvolatile memory device which can retain data stored therein even when power supply is interrupted.

SUMMARY

Various embodiments of the present disclosure may provide a memory system capable of adjusting the number of open blocks.

An embodiment of the present disclosure may provide for a memory system including a memory device including a first memory block group and a second memory block group; and a memory controller configured to designate a first memory block of memory blocks included in the first memory block group as an open block and designate a second memory block of memory blocks included in the second memory block group as the open block, and perform a program operation on the first and the second memory blocks designated as the open blocks. When the first memory block designated as the open block is changed to a closed block, the memory controller may determine whether to designate a third memory block among the memory blocks included in the first or the second memory block group as a new open block based on a number of times voltage abnormalities have occurred on a voltage supplied to the memory device.

An embodiment of the present disclosure may provide for an operating method of a controller for controlling a memory device including first and second groups of memory blocks, the operating method comprising designating one or more free blocks as open blocks within each of the first and second groups; and selectively designating, when one among the open blocks becomes a closed block within the first and second groups, an additional free block as an open block within the first and second groups according to a number of abnormalities of power supply to the memory device during a predetermined amount of time, wherein the memory device stores data into the open blocks.

