TECHNICAL FIELD

The present invention relates to a photoelectric conversion element, and a solid-state imaging device in which a plurality of the photoelectric conversion elements is arrayed as imaging pixels, and more particularly relates to a solid-state imaging device that can perform a high-speed operation.

BACKGROUND ART

As recited by Patent Literature (PTL) 1, a group of the inventors of the present invention has already proposed a range measuring element that had a function of lock-in pixels for performing an optical charge detection in synchronization with an optical pulse. In a range sensor that performs an operation of optical time-of-flight (TOF) scheme as described in the PTL 1, a component caused by slow charges moving at a diffusion velocity exists in a neutral area (epitaxial layer), in a case of aiming at a super high-speed operation of sub-nanosecond level. Thus, due to the influence of the slow component, there is a disadvantage that a targeted ultra high-speed operation cannot be performed.

If a bias potential is applied to a substrate to generate an electric field, the slow charges moving at diffusion velocity in the neutral area can be transported at a high speed. However, in a situation in which the bias potential is kept to be applied to the substrate, there is a problem that power dissipation is increased by the injection of holes that are non-signal charges from p-type semiconductor regions other than a photodiode of a pixel and p-wells of a peripheral circuit and the like.

In order to block a parasitic current between a p+substrate and a p-well, the p-well is disposed in a pixel, a structure that blocks the parasitic current between the p+substrate and the p-well, by forming an n-type buried layer for widely covering the lower portion of the p-well in a part of the pixel is proposed by PTL2. However, in the invention described in the PTL 2, there is a problem that a potential profile to transport the signal charges at a high speed cannot be achieved within the pixel.

CITATION LIST

Patent Literature

[PTL 1] WO 2016/15791A1[PTL 2] JP 2015-177191A

SUMMARY OF INVENTION

Technical Problem

In light of the above problems, an object of the present invention is to provide a photoelectric conversion element that can perform a high-speed operation with low power dissipation, and a solid-state imaging device in which a plurality of the photoelectric conversion elements is arrayed as imaging pixels.

Solution to Problem

In order to achieve the above object, a first aspect of the present invention inheres in a photoelectric conversion element encompassing (a) a depletion-layer extension-promotion region having an upper layer of a first conductivity type, (b) a photoelectric conversion layer of the first conductivity type in contact with the upper layer of the depletion-layer extension-promotion region, having a lower impurity concentration than the upper layer, (c) a surface-buried region of a second conductivity type buried in a part of an upper portion of the photoelectric conversion layer, configured to implement a photodiode together with the photoelectric conversion layer, (d) a well region of the first conductivity type buried in another part of the upper portion of the photoelectric conversion layer, having higher impurity concentration than the photoelectric conversion layer, (e) a charge-accumulation region of the second conductivity type buried in a part of an upper portion of the well region, configured to accumulate signal charges temporally, (f) a plurality of intra-pixel circuit-elements merged in a part of the well region, configured to implement a circuit for reading out the signal charges from the charge-accumulation region, and (g) an injection-blocking element having a tab-region of the second conductivity type for dividing the well region into no less than two at least at a part of the well region, configured to block injection of non-signal charges having opposite conductivity type to the signal charges from the well region into the photoelectric conversion layer. In the photoelectric conversion element pertaining to the first aspect of the present invention, an entire range intended as a signal-charge generation-region in the photoelectric conversion layer is depleted by a voltage applied to the upper layer. Here, the first conductivity type and the second conductivity type are the conductivity types opposite to each other. That is, when the first conductivity type is the n-type, the second conductivity type is the p-type, and when the first conductivity type is the p-type, the second conductivity type is the n-type. Also, when the signal charges are electrons, the non-signal charges are holes, and when the signal charges are holes, the non-signal charges are electrons.

A second aspect of the present invention inheres in a solid-state imaging device encompassing (a) a pixel-array area having an array of a plurality of pixels and (b) a peripheral-circuit area merged on a single semiconductor chip with the pixel-array area, configured to drive the pixels and process signals from the pixels. Here, each of the pixels includes a depletion-layer extension-promotion region having an upper layer of a first conductivity type, a photoelectric conversion layer of the first conductivity type in contact with the upper layer of the depletion-layer extension-promotion region, having a lower impurity concentration than the upper layer, a surface-buried region of a second conductivity type buried in a part of an upper portion of the photoelectric conversion layer, configured to implement a photodiode together with the photoelectric conversion layer, a well region of the first conductivity type buried in another part of the upper portion of the photoelectric conversion layer, having higher impurity concentration than the photoelectric conversion layer, a charge-accumulation region of the second conductivity type buried in a part of an upper portion of the well region, configured to accumulate signal charges temporally, a plurality of intra-pixel circuit-elements merged in a part of the well region, configured to implement a circuit for reading out the signal charges from the charge-accumulation region, and an injection-blocking element having a tab-region of the second conductivity type for dividing the well region into no less than two at least at a part of the well region, configured to block injection of non-signal charges having opposite conductivity type to the signal charges from the well region into the photoelectric conversion layer. In each of the pixels arrayed in the solid-state imaging device pertaining to the second aspect of the present invention, an entire range intended as a signal-charge generation-region in the photoelectric conversion layer is depleted by a voltage applied to the upper layer.

Advantageous Effects of Invention

According to the present invention, it is possible to provide a photoelectric conversion element that can perform a high-speed operation with low power dissipation, and a solid-state imaging device in which a plurality of the photoelectric conversion elements is arrayed as imaging pixels.

