CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2020-002105, filed on Jan. 9, 2020, the entire contents of which are incorporated herein by reference.

FIELD

The embodiments discussed herein are related to an encoding circuit, a decoding circuit, and an encoding method.

BACKGROUND

With increases in transmission capacities of optical transmitting devices, multilevel modulation, such as quadrature phase-shift keying (QPSK), 16 quadrature amplitude modulation (QAM), and 64 QAM, is used, for example. In the multilevel modulation, a symbol that is among symbols arranged in a constellation and corresponds to a combination of values of each bit string within a frame signal to be modulated is allocated to the bit string (the allocation is hereinafter referred to as “symbol mapping”), and thus an optical signal with a phase and an intensity that are based on the symbol is generated.

A probabilistic shaping technique (hereinafter referred to as “PS”) generates a probability distribution for symbol mapping by converting values of bit strings so that, as a region within a constellation is closer to the center of the constellation, the number of symbols allocated in the region is larger (refer to, for example, U.S. patent Ser. No. 10/091,046). This improves noise tolerance of signal light generated from a frame.

In the PS, for example, a distribution matching (DM) process is used to change a mark rate of a bit string to a rate (of, for example, 80%) of greater than 50% and bias bit values. The bit values are converted so that the probability of mapping a symbol is higher toward the center of the constellation in each of first to fourth quadrants into which the constellation is partitioned. To determine a quadrant in which a symbol to be allocated is located, a random bit that causes the mark rate to be maintained at approximately 50% is used.

As the random bit, a parity bit generated by an encoding process of forward error correction (FEC) to be executed to correct an error of a bit string is used, for example. When FEC is used in combination with the PS, the parity bit is inserted in any of bit strings not to be subjected to the DM process and is used to determine a quadrant of a constellation for formation of a distribution in which the probability of mapping a symbol is higher toward the center of the constellation (refer to, for example, “F. Buchali, et al., “Rate Adaptation and Reach Increase by Probabilistically Shaped 64-QAM: An Experimental Demonstration”, JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL., 34, NO. 7, Apr. 1, 2016”).

SUMMARY

According to an aspect of the embodiments, an encoding circuit includes an allocator configured to allocate, to a plurality of bit strings within a first frame, a symbol that corresponds to each of values of the plurality of bit strings, the symbol being among a plurality of symbols within a constellation of multilevel modulation, a converter configured to convert values of target bit strings that exclude a predetermined bit string among the plurality of bit strings so that, as a region within the constellation is closer to a center of the constellation, a number of symbols allocated in the region among the plurality of symbols is larger, a generator configured to generate an error correction code for correcting an error of the plurality of bit strings after the conversion of the values of the target bit strings, and an insertion circuit configured to delay the error correction code and insert the error correction code in the predetermined bit string within a second frame that succeeds the first frame, wherein the allocator allocates, to the plurality of bit strings, one symbol that corresponds to the values of the target bit strings, the one symbol being among symbols within a quadrant that corresponds to a value of the predetermined bit string and among a plurality of quadrants into which the constellation is partitioned, and wherein the converter switches, based on the value of the predetermined bit string, association relationships between the values of the target bit strings before and after the conversion.

The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention.

