CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Korean Patent Application No. 10-2019-0079180, filed on Jul. 2, 2019, and all the benefits accruing therefrom under 35 U.S.C. § 119, the contents of which are incorporated by reference in their entirety.

BACKGROUND

The present invention relates to a semiconductor package test apparatus. More specifically, the present invention relates to a semiconductor package test apparatus including an interface board and a push block used to connect a semiconductor package to a tester in order to electrically test the semiconductor package.

Generally, semiconductor devices may be formed on a silicon wafer used as a semiconductor substrate by repetitively performing a series of manufacturing processes. Semiconductor devices formed as described above may be manufactured into semiconductor packages through a dicing process and a packaging process.

The semiconductor packages may be electrically tested by using a test handler and a tester. The semiconductor packages may be received in insert members mounted on a test tray, and may be electrically connected to the tester through an interface board. The interface board may include socket boards electrically connected to the tester, test sockets disposed on the socket boards and connecting the semiconductor packages and the socket boards, and socket guides for aligning the semiconductor packages and the test sockets to each other. The insert members of the test tray may be brought into close contact with the socket guides, and the semiconductor packages may be brought into close contact with the test sockets by the push blocks.

The semiconductor packages may be heated or cooled to a predetermined test temperature. As an example, the test handler may include a test chamber in which the test process is performed, and a temperature in the test chamber may be maintained at the test temperature. That is, the temperature of the semiconductor packages and the interface board may be uniformly controlled in the test chamber.

Alternatively, temperature adjustment units may be connected to the push blocks to heat or cool the semiconductor packages to the test temperature. That is, the temperature of the semiconductor packages may be adjusted by the push blocks and the temperature adjustment units. In such case, since there is no separate temperature control means for the interface board, the time required for temperature control of the semiconductor packages may be relatively increased.

SUMMARY

The present invention provides a semiconductor package test apparatus capable of controlling a temperature of an interface board along with a temperature of a semiconductor package.

In accordance with an aspect of the present invention, a semiconductor package test apparatus may include an interface board having connection terminals for electrically connecting a semiconductor package to a tester, a push block for pressing the semiconductor package toward the interface board to bring external terminals of the semiconductor package into contact with the connection terminals of the interface board, a temperature adjustment unit connected with the push block to heat or cool the semiconductor package to a test temperature through the push block, and a heat transfer member for thermally connecting the push block and the interface board.

In accordance with some embodiments of the present invention, the semiconductor package test apparatus may further include an insert member having a pocket receiving the semiconductor package so that the external terminals of the semiconductor package are exposed toward the interface board, and a test tray disposed between the interface board and the push block and to which the insert member is mounted.

In accordance with some embodiments of the present invention, the heat transfer member may be configured to pass through the insert member and be brought into contact with the interface board.

In accordance with some embodiments of the present invention, the heat transfer member may include a first heat transfer member configured to pass through the insert member and be brought into contact with the interface board, and a second heat transfer member for connecting the push block with the first heat transfer member.

In accordance with some embodiments of the present invention, the push block may include a flange member connected with the temperature adjustment unit, and a pressing member extending from the flange member toward the interface board to pressurize the semiconductor package. The second heat transfer member may extend from the flange member toward the interface board and be brought into contact with the first heat transfer member.

In accordance with some embodiments of the present invention, the semiconductor package test apparatus may further include a match plate to which the push block is mounted.

In accordance with some embodiments of the present invention, the semiconductor package test apparatus may further include an insulating member for preventing heat transfer between the match plate and the push block.

In accordance with some embodiments of the present invention, the heat transfer member may include a first heat transfer member configured to pass through the insert member and be brought into contact with the interface board, and a second heat transfer member configured to pass through the insulating member and connect the push block with the first heat transfer member.

In accordance with some embodiments of the present invention, the push block may include a flange member connected with the temperature adjustment unit, and a pressing member extending from the flange member toward the interface board to pressurize the semiconductor package. The second heat transfer member may extend from the flange member toward the interface board and be brought into contact with the first heat transfer member.

In accordance with some embodiments of the present invention, the interface board may include a socket board electrically connected to the tester, a test socket disposed on the socket board and electrically connecting between the semiconductor package and the socket board, and a socket guide for aligning the test socket and the semiconductor package to each other.

In accordance with some embodiments of the present invention, the heat transfer member may be configured to be brought into contact with the socket guide.

In accordance with another aspect of the present invention, a semiconductor package test apparatus may include a tester providing signals for electrically testing a semiconductor package, an interface board having connection terminals for electrically connecting the semiconductor package to the tester, an insert member having a pocket receiving the semiconductor package so that external terminals of the semiconductor package are exposed toward the interface board, a test tray disposed adjacent to the interface board and to which the insert member is mounted, a push block for pressing the semiconductor package toward the interface board to bring the external terminals of the semiconductor package into contact with the connection terminals of the interface board, a temperature adjustment unit connected with the push block to heat or cool the semiconductor package to a test temperature through the push block, and a heat transfer member for thermally connecting the temperature adjustment unit and the interface board through the insert member.

In accordance with some embodiments of the present invention, the semiconductor package test apparatus may further include an insulating member to which the push block is mounted, a match plate to which the insulating member is mounted, and a driving unit for pushing the match plate so that the semiconductor package is connected to the interface board by the push block.

In accordance with some embodiments of the present invention, the push block may include a flange member disposed on one side of the insulating member, and a pressing member extending from the flange member toward the interface board through the insulating member to pressurize the semiconductor package.

In accordance with some embodiments of the present invention, the temperature adjustment unit may include a thermoelectric device disposed on one side of the flange member.

In accordance with some embodiments of the present invention, the heat transfer member may extend from the flange member toward the interface board passing through the insulating member and the insert member, and be brought into contact with the interface board.

In accordance with some embodiments of the present invention, the heat transfer member may include a first heat transfer member configured to pass through the insert member and be brought into contact with the interface board, and a second heat transfer member extending from the flange member toward the interface board passing through the insulating member to connect the flange member and the first heat transfer member.

In accordance with some embodiments of the present invention, the interface board may include a socket board electrically connected to the tester, a test socket disposed on the socket board and electrically connecting between the semiconductor package and the socket board, and a socket guide for aligning the test socket and the semiconductor package to each other.

In accordance with some embodiments of the present invention, the heat transfer member may be configured to be brought into contact with the socket guide.

In accordance with some embodiments of the present invention, the semiconductor package test apparatus may further include a first alignment pin extending from the insulating member toward the interface board, and a second alignment pin extending from the socket guide toward the first alignment pin. The insert member may have a first alignment hole into which the first alignment pin is inserted and a second alignment hole into which the second alignment pin is inserted, and the second alignment pin may have an alignment groove into which an end portion of the first alignment pin is inserted.

The above summary of the invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The detailed description and claims that follow more particularly exemplify these embodiments.

