FIELD OF THE INVENTION

The present disclosure relates to network computing and more specifically, to updating firmware in a multiple-node storage system.

BACKGROUND

When a server or storage system is power cycled, the first action a central processing unit (CPU) takes is to send a message to activate the Basic Input and Output System (BIOS). The BIOS then runs a series of tests, called the POST (Power On Self-Test), to verify if the system devices are working correctly. The BIOS enables the essential functions for the server to operate. If the BIOS is corrupted, the CPU cannot function. However, a typical BIOS can restore a valid BIOS image in the event that it becomes corrupt. This is accomplished by storing a recovery program in a flash memory that is not in-system writable. This ensures the recovery program cannot be corrupted. The recovery program is usually a simple code that has the ability to initialize minimal system hardware to retrieve a new code image from a flash drive or other removable media. This power cycle and restore function also is required for the firmware for other controllers such as baseboard management controllers or memory switch controllers.

SUMMARY

The various examples of the present disclosure are directed towards a multiple storage node system including a first and second node. The first node includes a first baseboard management controller (BMC), a first flash ROM configured to store a first flash image, and a first switch device configured to connect the first BMC to the first flash ROM. The second node includes a second BMC connected to the first switch device, a second flash ROM configured to store a second flash image, and a second switch device configured to connect the second BMC to the second flash ROM. The first BMC is connected to the second switch device. Moreover, the second flash image is the same as the first flash image.

In some embodiments, the first node further includes a first storage controller, a third flash ROM configured to store a third flash image, and a third switch device configured to connect either the first BMC or the second BMC to the third flash ROM. In some embodiments, the second node further includes a second storage controller, a fourth flash ROM configured to store a fourth flash image, fourth flash image identical to the third flash image, and a fourth switch configured to connect either the first BMC or the second BMC to the fourth flash ROM.

The first node can also include a first plurality of storage devices connected to the first storage expander/switch controller and the second storage expander/switch controller. The first plurality of storage devices can include a hard disk drive (HDD), a solid state drive (SSD), and/or a non-volatile memory express (NVMe). In some embodiments, the NVMe is configured to serve as a host controller interface and storage protocol to facilitate transfer of data between the first storage expander/switch controller and the SSD drive.

Similarly, the second node can include a second plurality of storage devices connected to the first storage expander/switch controller and the second storage expander/switch controller. The second plurality of storage devices can include a hard disk drive (HDD), a solid state drive (SSD), and/or a non-volatile memory express (NVMe). The NVMe can be configured to serve as a host controller interface and storage protocol to facilitate transfer of data between the second storage expander/switch controller and the SSD drive.

In some embodiments the first flash image includes a first BMC firmware flash image and the second flash image includes a first storage expander/switch controller firmware flash image. The third flash image includes a second BMC firmware flash image and the fourth flash image includes a second storage expander/switch controller firmware flash image.

The first switch device, the second switch device, the third switch device, and the fourth switch device each include a multiplexor (MUX). The first switch device, the second switch device, the third switch device, and the fourth switch device can be configured to multiplex the first BMC and the second BMC.

In some embodiments the first BMC is configured to retrieve the third flash image stored in the third flash ROM, or the fourth flash image in the fourth flash ROM. Likewise, the second BMC can be configured to retrieve the first flash image stored in the first flash ROM, or the second flash image stored in the second flash ROM.

The various examples of the present disclosure are directed towards a method of updating a firmware in a multi storage node system. The method includes power cycling a first node. The first node includes a first BMC, a first flash ROM configured to store a first flash image, and a first switch device configured to connect the first BMC to the first flash ROM. The method also includes activating the first flash image in the first flash ROM. The method includes determining if a hardware component within the first node is not online or ready for a firmware update, the second flash image is corrupted, and/or the first node is unable to boot. The method also includes retrieving, by the first BMC, a second flash image stored in a second flash ROM stored on a second node. The first BMC is connected to a second switch device in the second node. The second flash image is the same as the first flash.

Additional features and advantages of the disclosure will be set forth in the description that follows, and in part, will be obvious from the description, or can be learned by practice of the principles disclosed herein. The features and advantages of the disclosure can be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the disclosure will become fully apparent from the following description and appended claims, or can be learned by the practice of the principles set forth herein.

