CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and benefits of Korean Patent Application No. 10-2019-0102425 under 35 U.S.C. § 119, filed in the Korean Intellectual Property Office on Aug. 21, 2019, the entire contents of which are incorporated herein by reference.

BACKGROUND

1. Field

Embodiments relate to a method of manufacturing a display apparatus having a dummy pattern in a margin area.

2. Description of the Related Art

Light weight and small display apparatus are being manufactured. A cathode ray tube (CRT) display apparatus has been used in the past due to performance and a competitive price. However the CRT display apparatus has a weakness in terms of size and portability. Therefore, a display apparatus such as a plasma display apparatus, a liquid crystal display apparatus and an organic light emitting display apparatus has been highly regarded due to its small size, light weight and low-power-consumption.

In manufacturing a display apparatus, after forming multiple conductive layers and insulating layers on a mother substrate including a panel area and a margin area that may surround the panel area, the margin area is cut off from the panel area, so that the panel area can be separated from the mother substrate. Various patterns may be formed in the margin area. In order to improve the quality of the display apparatus, it is necessary to improve the design of the margin area.

It is to be understood that this background of the technology section is, in part, intended to provide useful background for understanding the technology. However, this background of the technology section may also include ideas, concepts, or recognitions that were not part of what was known or appreciated by those skilled in the pertinent art prior to a corresponding effective filing date of the subject matter disclosed herein.

SUMMARY

Embodiments are provided for a method of manufacturing a display apparatus improving display quality.

According to an embodiment, a method of manufacturing a display apparatus may include forming a first conductive layer on a base substrate including a panel area and a margin area (or referred to as a peripheral area) disposed next to the panel area, the margin area including a dummy pattern area, forming a photoresist layer on the first conductive layer, forming a photoresist pattern by exposing and developing the photoresist layer, forming a first conductive pattern by etching the first conductive layer using the photoresist pattern, and removing the photoresist pattern. The forming the first conductive pattern includes forming a first pixel circuit pattern in the panel area, and forming a dummy pattern in the dummy pattern area of the margin area. An opening ratio of a portion where the dummy pattern is not formed with respect to the dummy pattern area is about 30% or more.

In an embodiment, the opening ratio of the dummy pattern area may be about 60% or less.

In an embodiment, the dummy pattern may have a repeating pattern and is uniformly formed with respect to the entire dummy pattern area.

In an embodiment, the dummy pattern may have a shape in which multiple rectangles may be arranged along a first direction and a second direction perpendicular to the first direction.

In an embodiment, a distance between neighboring rectangles of the dummy pattern may be more than about 20 μm (micrometer).

In an embodiment, the margin area may include a dummy active area. The method further may include forming an active layer including an active pattern of a thin film transistor in the panel area and a dummy active pattern in the dummy active area.

In an embodiment, the dummy active area may be between the panel area and the dummy pattern area.

In an embodiment, the margin area may include an edge area at an edge of the base substrate. The dummy pattern area may be between the edge area and the panel area, and the first conductive pattern may not be formed in the edge area.

In an embodiment, the forming the first conductive pattern may include wet etching the first conductive layer using an organic acid etchant.

In an embodiment, the forming the first pixel circuit pattern of the first conductive pattern may include forming a gate electrode or source and drain electrodes of a thin film transistor.

In an embodiment, the first conductive layer may include at least one of gold, silver, aluminum, platinum, nickel, titanium, palladium, magnesium, calcium, lithium, chromium, tantalum, molybdenum, scandium, neodymium, iridium, alloy containing aluminum, aluminum nitride, alloys containing silver, tungsten, tungsten nitride, alloys containing copper, alloys containing molybdenum, titanium nitride, tantalum nitride, strontium ruthenium oxide, zinc oxide, indium tin oxide, tin oxide, indium oxide, gallium oxide, and indium zinc oxide.

In an embodiment, the forming the first pixel circuit pattern of the first conductive pattern may include forming a pixel electrode electrically connected to a thin film transistor.

In an embodiment, the forming the first conductive layer may include forming a layer containing silver (Ag).

In an embodiment, the forming the first conductive layer may include forming a layer comprising at least one indium tin oxide, and forming a layer comprising at least one silver (Ag).

In an embodiment, the method may further include forming a light emitting layer and an opposite electrode on the pixel electrode.

In an embodiment, the method may further include forming an insulating layer on the first conductive pattern, and forming a second conductive pattern on the insulating layer.

In an embodiment, the forming the second conductive pattern may include forming a second pixel circuit pattern in the panel area, and forming a second dummy pattern in the dummy pattern area of the margin area.

In an embodiment, the method may further include cutting the margin area of the base substrate to separate the margin area from the panel area.

According to an embodiment, a method of manufacturing a display apparatus may include forming a thin film transistor in a panel area on a base substrate including the panel area and a margin area disposed next to the panel area, forming a conductive layer on the base substrate on which the thin film transistor is formed, patterning the conductive layer to form a dummy pattern in the margin area and a pixel electrode electrically connected to the thin film transistor in the panel area, forming a light emitting layer and an opposite electrode on the pixel electrode, and cutting the margin area of the base substrate to separate the margin area from the panel area.

In an embodiment, the forming the conductive layer may include forming a layer containing silver (Ag).

In an embodiment, the patterning the conductive layer may include forming a photoresist layer on the conductive layer, forming a photoresist pattern by exposing and developing the photoresist layer, and forming the pixel electrode and the dummy pattern by etching the conductive layer using the photoresist pattern.

In an embodiment, the etching the conductive layer may include wet etching the conducive layer using an organic acid based etching solution.

According to an embodiment, a dummy pattern may be formed in a dummy pattern area. An opening ratio of a portion where the dummy pattern is not formed with respect to the dummy pattern area may be about 30% or more. The dummy pattern may alleviate a loading effect in case that the photoresist layer is developed. Since the opening ratio of the dummy pattern region in which the dummy pattern is formed is about 30% or more, even a low skew etchant such as an organic acid etchant may be used to manufacture a display apparatus having excellent quality without residues.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

