BACKGROUND

Camera modules in consumer devices such as stand-alone digital cameras, mobile devices, automotive components, and medical devices include an image sensor and a pixel array thereof. The pixel array includes a plurality of pixels. A pixel array's pixel density is the number of pixels per unit area on the image sensor. In operation, the lens of a camera module forms an image, on the image sensor, of an object in its field of view. The object can be viewed a plurality of infinitesimally small point-sources of illumination—“impulses”—incident on the camera. The lens images each of the plurality of impulses at a plane of the pixel array as a respective one of a plurality of point-spread functions—“impulse responses.” The resolution of images captured by the image sensor depends in part on pixel size compared to the size of the impulse response. Accordingly, one way to increase a camera's maximum attainable resolution is to increase pixel density by decreasing pixel size. Motivation to decrease pixel sizes has led to development of pixels with vertical transfer gates.

Each pixel of the plurality of pixels includes a photodiode region, a floating diffusion region, and a transfer gate. The transfer gate controls current flow from the photodiode region to the floating diffusion region and may include a field-effect transistor. The electric potential of the photodiode region exceeds that of the floating diffusion region. Light reaching the photodiode region generates photoelectrons. Turning on the transfer gate forms a conducting channel that allows the accumulated photoelectrons to transfer or flow from photodiode region to the floating diffusion region. When the transfer gate is pulsed to an off-state, the potential barrier is higher than that of the photodiode region, hence preventing photoelectrons from flowing to the floating diffusion region.

In one common pixel architecture, the photodiode and the floating diffusion region are laterally displaced within the pixel, in a lateral direction parallel to a plane of the pixel array, with the transfer gate therebetween. This plane is horizontally orientated with respect to the vertical direction perpendicular thereto that defines the direction of normally-incident reaching the pixel array. Such a horizontal orientation limits how much the pixel density can be decreased. Hence, one way to increase pixel density is to orient the photodiode, transfer gate, and floating diffusion in a direction that has a vertical component. Such transfer gates are examples of vertical transfer gates.

SUMMARY OF THE EMBODIMENTS

Problems with pixels with vertical transfer gates include electron transport lag and electron back-scattering. Embodiments disclosed herein ameliorate these problems.

In a first aspect, a pixel includes a semiconductor substrate, a photodiode region, a floating diffusion region, and a dielectric layer. The semiconductor substrate has a substrate top surface forming a trench extending into the semiconductor substrate. The trench has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The photodiode region is in the semiconductor substrate and includes a bottom photodiode section beneath the trench and a top photodiode section. The top photodiode section (a) is adjacent to the trench, (b) adjoins the bottom photodiode section, (c) is implanted at a photodiode depth that is less than the trench depth relative to the planar region, and (d) extending toward and adjoining the bottom photodiode region. The floating diffusion region is in the semiconductor substrate, adjacent to the trench, and extends away from the planar region to a junction depth that is less than the trench depth. The dielectric layer lines the trench. A top region of the dielectric layer is between the planar region and the junction depth has a top thickness. A bottom region of the dielectric layer is between the photodiode depth and the trench depth, and has a bottom thickness that exceeds the top thickness.

In a second aspect, a pixel includes a semiconductor substrate, a photodiode region in the semiconductor substrate, a floating diffusion region in the semiconductor substrate, a dielectric layer lining the trench, and a gate-electrode material filling the trench. The semiconductor substrate has a substrate top surface forming a trench extending into the semiconductor substrate and has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The photodiode region includes (i) a bottom photodiode section beneath the trench and (ii) a top photodiode section adjacent to the trench, beginning at a photodiode depth that is less than the trench depth, extending toward and adjoining the bottom photodiode region. The photodiode depth is relative to the planar region. The floating diffusion region is in the semiconductor substrate, adjacent to the trench, and extends away from the planar region to a junction depth that is less than the trench depth. The dielectric layer has a top region formed between the planar region and the junction depth, and a bottom region formed between the photodiode depth and the trench depth. The semiconductor substrate, the gate-electrode material, and the bottom region of the dielectric layer therebetween form a first capacitor having a first capacitance. The semiconductor substrate, the gate-electrode material, and the top region of the dielectric layer therebetween form a second capacitor having a second capacitance that exceeds the first capacitance.

In a third aspect, a transfer-gate fabrication method includes lining a surface of a trench with a first dielectric layer. The trench extends into a top surface of a semiconductor substrate and has a trench depth relative to a planar region of the top surface surrounding the trench. The semiconductor substrate includes a photodiode region adjacent to the trench. The photodiode region is formed at a photodiode depth and extending away from the planar region. The photodiode depth, relative to the planar region, is less than the trench depth. The method also includes covering a bottom region of the first dielectric layer with an organic layer. The bottom region extends from the trench depth to an etch depth that does not exceed the photodiode depth. The method also includes etching a top region of first dielectric layer at depths between the top surface and the etch depth, and depositing a second dielectric layer on the surface of the trench at depths between the planar region and the trench depth.

