This application claims priority to India Provisional Application 202041024507, filed Jun. 11, 2020, titled “Fast Frequency Switching Scheme Using RF Synthesizers,” which is hereby incorporated by reference in its entirety.

BACKGROUND

Frequency synthesizers are used to drive, synchronize the operation of, and provide reference signals in a wide variety of electronic circuits. For example, frequency synthesizers are used to generate dock signals in networks, computers and video displays and enable modulation and demodulation in wireless communication devices. As operating frequencies of these circuits have increased over time, the demands on the output signals that frequency synthesizers generate have also increased. Frequency synthesizers should be capable of generating a high (e.g., megahertz or gigahertz-range) frequency output signal, and should do so with a minimum of phase noise, frequency jitter, drift, temperature, or age-dependent amplitude or frequency degradation.

SUMMARY

Frequency synthesizers that provide fast frequency switching and a high level of signal purity are disclosed herein. In one example, a frequency synthesizer includes a phase-locked loop (PLL). The PLL includes an oscillator control circuit and a voltage-controlled oscillator (VCO). The oscillator control circuit includes a capacitor control terminal and a current control terminal. The VCO includes an oscillator, a capacitor bank, and a bias circuit. The oscillator includes a capacitor terminal and a bias current terminal. The capacitor bank includes an oscillator terminal coupled to the capacitor terminal, and a selection terminal coupled to the capacitor control terminal. The bias circuit includes a current digital-to-analog converter (IDAC), a filter capacitor terminal, and an amplifier. The IDAC includes an input terminal coupled to the current control terminal, and an output terminal. The amplifier includes an input terminal coupled to the output terminal of the IDAC, and an output terminal coupled to the filter capacitor terminal and the bias current terminal.

In another example, a frequency synthesizer includes a PLL. The PLL includes a first VCO and a second VCO, each comprising an oscillator, a capacitor bank, and a bias circuit. The capacitor bank is configured to selectably adjust an output frequency of the oscillator. The bias circuit is configured to provide a bias current to the oscillator, and includes an IDAC, and an amplifier coupled to the IDAC and configured to drive the oscillator.

In a further example, a frequency synthesizer includes a first PLL and a second PLL, each including a first VCO, a second VCO, a calibration look-up table, a calibration circuit, and an oscillator control circuit. Each of the first VCO and the second VCO includes an oscillator, a capacitor bank, and a bias circuit. The capacitor bank is configured to selectably adjust an output frequency of the oscillator. The bias circuit is configured to provide a bias current to the oscillator, and includes an IDAC, and an amplifier coupled to the IDAC and configured to drive the oscillator. The calibration look-up table is configured to store a VCO selection, a capacitor selection, and bias current selection for each of multiple frequencies. The calibration circuit is configured to initialize the look-up table. The oscillator control circuit is configured to apply the VCO selection, the capacitor selection, and the bias current selection stored in the calibration look-up table for a given frequency to set the oscillator to produce the given frequency.

