<story><title>X86 is a high-level language</title><url>http://blog.erratasec.com/2015/03/x86-is-high-level-language.html#.VRLn95PF_XE</url></story><parent_chain><item><author>Animats</author><text>That&amp;#x27;s true of all superscalar machines. That&amp;#x27;s what killed RISC. The original idea of RISC was one instruction per clock and a very simple CPU control section. Early MIPS CPUs realized that.&lt;p&gt;Then superscalar came to microprocessors with the Pentium Pro. It took 3000 engineers at Intel to design that CPU, but it did much better than one instruction per clock while still handling all the weird cases in x86 instructions.  As the fabs improved, the Pentium Pro technology moved to the mainstream. The Pentium II and III were Pentium Pro architecture.&lt;p&gt;This killed the basic advantage of RISC.  The &amp;quot;all instructions the same length&amp;quot; concept really killed it - it meant 2x code bloat.  That meant bigger caches or worse cache performance.  It meant more RAM and more RAM bandwidth or worse memory performance.  The x86 instruction set, for all its faults, is compact.&lt;p&gt;For the crypto problem, the trouble is that modern crypto algorithms are not branch free.  DES was. Vernam was. Rotor machines were.  RSA and elliptic curve stuff, no.  This is independent of the CPU architecture.</text></item><item><author>na85</author><text>I think that&amp;#x27;s the author&amp;#x27;s point:  x86 is now a significant abstraction from the actual details of execution.</text></item><item><author>kazinator</author><text>&amp;quot;high level&amp;quot; doesn&amp;#x27;t refer to how it is implemented.&lt;p&gt;Even a RISC instruction set can be implemented by, say, either some very slick silicon gates, or by an emulator written in Javascript.&lt;p&gt;The existence of the Javascript emulator doesn&amp;#x27;t make the RISC instruction a high level language, on the grounds that an instruction like &amp;quot;ADD R1, R2, R3&amp;quot; triggers a complicated traversal within the Javascript code.&lt;p&gt;The &amp;quot;level&amp;quot; of a language should refer to the &amp;quot;abstraction level&amp;quot;. Years ago, I came to favor the definition of &amp;quot;abstraction level&amp;quot; given in the glossary of the Tunes project:&lt;p&gt;&lt;a href=&quot;http://tunes.org/wiki/abstraction_20level.html&quot; rel=&quot;nofollow&quot;&gt;http:&amp;#x2F;&amp;#x2F;tunes.org&amp;#x2F;wiki&amp;#x2F;abstraction_20level.html&lt;/a&gt;</text></item></parent_chain><comment><author>pcwalton</author><text>&amp;gt; This killed the basic advantage of RISC. The &amp;quot;all instructions the same length&amp;quot; concept really killed it - it meant 2x code bloat. That meant bigger caches or worse cache performance. It meant more RAM and more RAM bandwidth or worse memory performance. The x86 instruction set, for all its faults, is compact.&lt;p&gt;I&amp;#x27;m not really sure that is a big deal today, however. Maybe it was when caches were much smaller, but AArch64 went back from a variable width encoding scheme (Thumb) to uniform width instructions in 64-bit mode, without any problems that I&amp;#x27;m aware of, and the performance is quite good. At the same time, the x86-64 ISA has gotten quite a bit less space-efficient: because of the extension to 16 registers, REX prefixes are everywhere and eat up lots of bytes of the instruction stream.</text></comment>
<story><title>X86 is a high-level language</title><url>http://blog.erratasec.com/2015/03/x86-is-high-level-language.html#.VRLn95PF_XE</url></story><parent_chain><item><author>Animats</author><text>That&amp;#x27;s true of all superscalar machines. That&amp;#x27;s what killed RISC. The original idea of RISC was one instruction per clock and a very simple CPU control section. Early MIPS CPUs realized that.&lt;p&gt;Then superscalar came to microprocessors with the Pentium Pro. It took 3000 engineers at Intel to design that CPU, but it did much better than one instruction per clock while still handling all the weird cases in x86 instructions.  As the fabs improved, the Pentium Pro technology moved to the mainstream. The Pentium II and III were Pentium Pro architecture.&lt;p&gt;This killed the basic advantage of RISC.  The &amp;quot;all instructions the same length&amp;quot; concept really killed it - it meant 2x code bloat.  That meant bigger caches or worse cache performance.  It meant more RAM and more RAM bandwidth or worse memory performance.  The x86 instruction set, for all its faults, is compact.&lt;p&gt;For the crypto problem, the trouble is that modern crypto algorithms are not branch free.  DES was. Vernam was. Rotor machines were.  RSA and elliptic curve stuff, no.  This is independent of the CPU architecture.</text></item><item><author>na85</author><text>I think that&amp;#x27;s the author&amp;#x27;s point:  x86 is now a significant abstraction from the actual details of execution.</text></item><item><author>kazinator</author><text>&amp;quot;high level&amp;quot; doesn&amp;#x27;t refer to how it is implemented.&lt;p&gt;Even a RISC instruction set can be implemented by, say, either some very slick silicon gates, or by an emulator written in Javascript.&lt;p&gt;The existence of the Javascript emulator doesn&amp;#x27;t make the RISC instruction a high level language, on the grounds that an instruction like &amp;quot;ADD R1, R2, R3&amp;quot; triggers a complicated traversal within the Javascript code.&lt;p&gt;The &amp;quot;level&amp;quot; of a language should refer to the &amp;quot;abstraction level&amp;quot;. Years ago, I came to favor the definition of &amp;quot;abstraction level&amp;quot; given in the glossary of the Tunes project:&lt;p&gt;&lt;a href=&quot;http://tunes.org/wiki/abstraction_20level.html&quot; rel=&quot;nofollow&quot;&gt;http:&amp;#x2F;&amp;#x2F;tunes.org&amp;#x2F;wiki&amp;#x2F;abstraction_20level.html&lt;/a&gt;</text></item></parent_chain><comment><author>sdevlin</author><text>RSA is not &amp;quot;modern&amp;quot;.&lt;p&gt;Modern elliptic curves are chosen with side channels in mind. You won&amp;#x27;t find data-dependent branches or look-ups in straightforward implementations of Curve25519 scalar multiplication, for example.</text></comment>