<story><title>5/3nm Wars Begin</title><url>https://semiengineering.com/5-3nm-wars-begin/</url></story><parent_chain></parent_chain><comment><author>bogomipz</author><text>The article states:&lt;p&gt;&amp;gt;&amp;quot;Originally, the node name was tied to the transistor gate length dimensions.&amp;quot;&lt;p&gt;then further down:&lt;p&gt;&amp;gt;&amp;quot;CPP, a key transistor metric, measures the distance between a source and drain contact.&amp;quot;&lt;p&gt;I have mistakenly thought that node designations were based on distance between source and drain. Could someone say why gate length dimensions are the more significant measurement? The distance between source and drain somehow feels more intuitive to me. But maybe because this is easier to visualize?</text></comment>
<story><title>5/3nm Wars Begin</title><url>https://semiengineering.com/5-3nm-wars-begin/</url></story><parent_chain></parent_chain><comment><author>RandomTisk</author><text>Is this just further marketing malpractice or will there actually be 5 or 3nm features?</text></comment>