<story><title>Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors</title><url>https://www.anandtech.com/show/12773/intel-shows-xeon-scalable-gold-6138p-with-integrated-fpga-shipping-to-vendors</url></story><parent_chain><item><author>rjsw</author><text>Learning an HDL isn&amp;#x27;t that hard. I was productive within a few weeks of starting to use VHDL.&lt;p&gt;A former colleague is now an Altera&amp;#x2F;Intel FAE, I will ask how things are going the next time we meet up for a beer.</text></item><item><author>kev009</author><text>One stark flailure of the Altera acquisition is there has been little by way of tool chain integration.  This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of.  It&amp;#x27;s not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks.  Intel&amp;#x27;s marketing arm can&amp;#x27;t distort that reality, and their product development arm seems too taxed to bridge the gap.</text></item></parent_chain><comment><author>aseipp</author><text>Learning an HDL isn&amp;#x27;t that hard. But it&amp;#x27;s a very small part of the overall flow for real development, and arguably it&amp;#x27;s one of the easier parts anyway... That&amp;#x27;s sort of the &amp;quot;problem&amp;quot;, more or less.&lt;p&gt;Even very well-oiled products like the Amazon F1 and Intel&amp;#x27;s new acceleration cards are &lt;i&gt;pretty non-trivial&lt;/i&gt; to use unless you&amp;#x27;re an experienced engineer, and they clearly spent a &lt;i&gt;lot&lt;/i&gt; of time polishing off the roughest edges to make it as approachable as possible. Amazon more or less paid a team of seriously experienced people to make the whole flow as painless as possible (including a pretty good software SDK, and a lot of tooling around Vivado), and it&amp;#x27;s still non-trivial!&lt;p&gt;Some of the ARM&amp;#x2F;FPGA combos are a lot more approachable overall, but the tooling, BSPs etc are normally huge pains the moment you want to get creative, and the SDKs are comparatively worse, vs the &amp;quot;high end&amp;quot; ones listed above, in my opinion. Normally I just end up replacing them with my own Linux BSP, more or less, if I need the actual host side.&lt;p&gt;A really annoying aspect of all this though is that most kits which could offer features like high-speed peripherials (PCIe, etc) are pretty expensive for hobbyist developers to acquire and use, so there&amp;#x27;s certainly a bit of a self-fulfilling-prophecy going on here.</text></comment>
<story><title>Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors</title><url>https://www.anandtech.com/show/12773/intel-shows-xeon-scalable-gold-6138p-with-integrated-fpga-shipping-to-vendors</url></story><parent_chain><item><author>rjsw</author><text>Learning an HDL isn&amp;#x27;t that hard. I was productive within a few weeks of starting to use VHDL.&lt;p&gt;A former colleague is now an Altera&amp;#x2F;Intel FAE, I will ask how things are going the next time we meet up for a beer.</text></item><item><author>kev009</author><text>One stark flailure of the Altera acquisition is there has been little by way of tool chain integration.  This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of.  It&amp;#x27;s not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks.  Intel&amp;#x27;s marketing arm can&amp;#x27;t distort that reality, and their product development arm seems too taxed to bridge the gap.</text></item></parent_chain><comment><author>vvanders</author><text>Writing HDL isn&amp;#x27;t hard but doing it right(much like with C) I would argue is the tricky part.&lt;p&gt;The translation from Software -&amp;gt; Flip-Flops isn&amp;#x27;t nearly as natural and it&amp;#x27;s easy to try and apply SE techniques that while possible are totally unsuited for an FPGA.</text></comment>