<story><title>AMD Ryzen Machine Crashes on a Sequence of FMA3 Instructions</title><url>http://forum.hwbot.org/showthread.php?t=167605</url></story><parent_chain><item><author>yeukhon</author><text>Interesting. I guess unlike software, these sorts of bugs can&amp;#x27;t be fixed without producing a new one right?&lt;p&gt;Do CPU and GPU manufactures do any types of fuzzing?</text></item><item><author>jjuhl</author><text>Well, it&amp;#x27;s not like Intel CPUs don&amp;#x27;t have similar bugs.&lt;p&gt;See Skylake for example - the list of known errata starts on page 27 and continues on through page 63 : &lt;a href=&quot;http:&amp;#x2F;&amp;#x2F;www.intel.com&amp;#x2F;content&amp;#x2F;dam&amp;#x2F;www&amp;#x2F;public&amp;#x2F;us&amp;#x2F;en&amp;#x2F;documents&amp;#x2F;specification-updates&amp;#x2F;desktop-6th-gen-core-family-spec-update.pdf&quot; rel=&quot;nofollow&quot;&gt;http:&amp;#x2F;&amp;#x2F;www.intel.com&amp;#x2F;content&amp;#x2F;dam&amp;#x2F;www&amp;#x2F;public&amp;#x2F;us&amp;#x2F;en&amp;#x2F;documents&amp;#x2F;...&lt;/a&gt;</text></item></parent_chain><comment><author>matthew-wegner</author><text>In this case the fix is adding a resistor:&lt;p&gt;&amp;quot;If your system does not use SERIRQ and BIOS puts SERIRQ in Quiet-Mode, then the weak external pull up resistor is not required. All other cases must implement an external pull-up resistor, 8.2k to 10k, tied to 3.3V&amp;quot;&lt;p&gt;&lt;a href=&quot;https:&amp;#x2F;&amp;#x2F;www-ssl.intel.com&amp;#x2F;content&amp;#x2F;dam&amp;#x2F;www&amp;#x2F;public&amp;#x2F;us&amp;#x2F;en&amp;#x2F;documents&amp;#x2F;specification-updates&amp;#x2F;atom-c2000-family-spec-update.pdf&quot; rel=&quot;nofollow&quot;&gt;https:&amp;#x2F;&amp;#x2F;www-ssl.intel.com&amp;#x2F;content&amp;#x2F;dam&amp;#x2F;www&amp;#x2F;public&amp;#x2F;us&amp;#x2F;en&amp;#x2F;docum...&lt;/a&gt;&lt;p&gt;Depending on the motherboard, those pins may be exposed already.  Here&amp;#x27;s what the fix looks like a Synology unit: &lt;a href=&quot;https:&amp;#x2F;&amp;#x2F;www.reddit.com&amp;#x2F;r&amp;#x2F;synology&amp;#x2F;comments&amp;#x2F;609u1l&amp;#x2F;c2538_clock_fix_confirmed_ds2415&amp;#x2F;&quot; rel=&quot;nofollow&quot;&gt;https:&amp;#x2F;&amp;#x2F;www.reddit.com&amp;#x2F;r&amp;#x2F;synology&amp;#x2F;comments&amp;#x2F;609u1l&amp;#x2F;c2538_cloc...&lt;/a&gt;</text></comment>
<story><title>AMD Ryzen Machine Crashes on a Sequence of FMA3 Instructions</title><url>http://forum.hwbot.org/showthread.php?t=167605</url></story><parent_chain><item><author>yeukhon</author><text>Interesting. I guess unlike software, these sorts of bugs can&amp;#x27;t be fixed without producing a new one right?&lt;p&gt;Do CPU and GPU manufactures do any types of fuzzing?</text></item><item><author>jjuhl</author><text>Well, it&amp;#x27;s not like Intel CPUs don&amp;#x27;t have similar bugs.&lt;p&gt;See Skylake for example - the list of known errata starts on page 27 and continues on through page 63 : &lt;a href=&quot;http:&amp;#x2F;&amp;#x2F;www.intel.com&amp;#x2F;content&amp;#x2F;dam&amp;#x2F;www&amp;#x2F;public&amp;#x2F;us&amp;#x2F;en&amp;#x2F;documents&amp;#x2F;specification-updates&amp;#x2F;desktop-6th-gen-core-family-spec-update.pdf&quot; rel=&quot;nofollow&quot;&gt;http:&amp;#x2F;&amp;#x2F;www.intel.com&amp;#x2F;content&amp;#x2F;dam&amp;#x2F;www&amp;#x2F;public&amp;#x2F;us&amp;#x2F;en&amp;#x2F;documents&amp;#x2F;...&lt;/a&gt;</text></item></parent_chain><comment><author>rrdharan</author><text>They do tremendous amounts of validation. I believe random generation of input data is part of that.&lt;p&gt;Here&amp;#x27;s an old heavily cited paper from Intel on the topic; I&amp;#x27;m sure their state of the art has advanced considerably in the intervening 17 years since its publication:&lt;p&gt;&lt;a href=&quot;http:&amp;#x2F;&amp;#x2F;dl.acm.org&amp;#x2F;citation.cfm?id=623013&quot; rel=&quot;nofollow&quot;&gt;http:&amp;#x2F;&amp;#x2F;dl.acm.org&amp;#x2F;citation.cfm?id=623013&lt;/a&gt;</text></comment>