Since the Tejas is a relaxed static stability design, it is equipped with Aeronautical Development Establishment (ADE) developed full authority quadruplex fly-by-wire digital automatic flight control system (DAFCS) with fail-operational/fail-safe safety feature for automatic manoeuvre limiting and to ease pilot handling.
The Tejas flight control system is operated with dual redundant modular MIL-STD-1553B standard databus and open architecture Digital Flight Control Computer (DFCC) developed by Defence Avionics Research Establishment (DARE).
The mission computer uses a 32-bit processor based on Power ISA developed by Solid State Physics Laboratory (SSPL).
The Tejas aerodynamic configuration is based on a pure delta-wing layout with shoulder-mounted wings.
Its advanced flight control surfaces actuators are all hydraulically actuated with dual redundant hydraulic system powered by quad redundant electrical power supply.
The wing's outer leading edge incorporates three-section slats, while the inboard sections have additional slats to generate vortex lift over the inner wing and high-energy air-flow along the tail fin to enhance high-AoA stability and prevent departure from controlled flight.
The wing trailing edge is occupied by two-segment elevons to provide pitch and roll control.
The only empennage-mounted control surfaces are the single-piece rudder and two airbrakes located in the upper rear part of the fuselage, one each on either side of the fin.
Since the Tejas is a relaxed static stability design, it is equipped with Aeronautical Development Establishment (ADE) developed full authority quadruplex fly-by-wire digital automatic flight control system (DAFCS) with fail-operational/fail-safe safety feature for automatic manoeuvre limiting and to ease pilot handling. The Tejas flight control system is operated with dual redundant modular MIL-STD-1553B standard databus and open architecture Digital Flight Control Computer (DFCC) developed by Defence Avionics Research Establishment (DARE). The mission computer uses a 32-bit processor based on Power ISA developed by Solid State Physics Laboratory (SSPL). The Tejas aerodynamic configuration is based on a pure delta-wing layout with shoulder-mounted wings. Its advanced flight control surfaces actuators are all hydraulically actuated with dual redundant hydraulic system powered by quad redundant electrical power supply. The wing's outer leading edge incorporates three-section slats, while the inboard sections have additional slats to generate vortex lift over the inner wing and high-energy air-flow along the tail fin to enhance high-AoA stability and prevent departure from controlled flight. The wing trailing edge is occupied by two-segment elevons to provide pitch and roll control. The only empennage-mounted control surfaces are the single-piece rudder and two airbrakes located in the upper rear part of the fuselage, one each on either side of the fin.
HAL Tejas