The first system was the  Tandem/16 or T/16, later re-branded NonStop I. The machine consisted of between two and 16 CPUs, organized as a fault-tolerant computer cluster packaged in a single rack.
 Each CPU had its own private, unshared memory, its own I/O processor, its own private I/O bus to connect to I/O controllers, and dual connections to all the other CPUs over a custom inter-CPU backplane bus called Dynabus.
Each disk controller or network controller was duplicated and had dual connections to both CPUs and devices.
Each disk was mirrored, with separate connections to two independent disk controllers.
 If a disk failed, its data was still available from its mirrored copy.
 If a CPU or controller or bus failed, the disk was still reachable through alternative CPU, controller, and/or bus.
 Each disk or network controller was connected to two independent CPUs.
 Power supplies were each wired to only one side of some pair of CPUs, controllers, or buses, so that the system would keep running well without loss of connections if one power supply failed.
 The careful complex arrangement of parts and connections in customers' larger configurations were documented in a Mackie diagram, named after lead salesman David Mackie who invented the notation.

None of these duplicated parts were wasted "hot spares"; everything added to system throughput during normal operations.

Besides recovering well from failed parts, the T/16 was also designed to detect as many kinds of intermittent failures as possible, as soon as possible.
 This prompt detection is called "fail fast".
 The point was to find and isolate corrupted data before it was permanently written into databases and other disk files.
 In the T/16, error detection was by some added custom circuits that added little cost to the total design; no major parts were duplicated just to get error detection.

The T/16 CPU was a proprietary design.
 It was greatly influenced by the HP 3000 minicomputer.
 They were both microprogrammed, 16-bit, stack-based machines with segmented, 16-bit virtual addressing.
 Both were intended to be programmed exclusively in high-level languages, with no use of assembler.
 Both were initially implemented via standard low-density TTL chips, each holding a 4-bit slice of the 16-bit ALU.
 Both had a small number of top-of-stack, 16-bit data registers plus some extra address registers for accessing the memory stack.
 Both used Huffman encoding of operand address offsets, to fit a large variety of address modes and offset sizes into the 16-bit instruction format with very good code density.
 Both relied heavily on pools of indirect addresses to overcome the short instruction format.
 Both supported larger 32- and 64-bit operands via multiple ALU cycles, and memory-to-memory string operations.
Both used "big-endian" addressing of long versus short memory operands.
 These features had all been inspired by Burroughs B5500-B6800 mainframe stack machines.

The T/16 instruction set changed several features from the HP 3000 design.
 The T/16 supported paged virtual memory from the beginning.
 The HP 3000 series did not add paging until the PA-RISC generation, 10 years later (although MPE V it had a form of paging via the APL firmware, in 1978).
 Tandem added support for 32-bit addressing in its second machine; HP 3000 lacked this until its PA-RISC generation.
Paging and long addresses was critical for supporting complex system software and large applications.
 The T/16 treated its top-of-stack registers in a novel way; the compiler, not the microcode, was responsible for deciding when full registers were spilled to the memory stack and when empty registers were re-filled from the memory stack.
 On the HP 3000, this decision took extra microcode cycles in every instruction.
 The HP 3000 supported COBOL with several instructions for calculating directly on arbitrary-length BCD (binary-coded decimal) strings of digits.
 The T/16 simplified this to single instructions for converting between BCD strings and 64-bit binary integers.

In the T/16, each CPU consisted of two boa
The first system was the  Tandem/16 or T/16, later re-branded NonStop I. The machine consisted of between two and 16 CPUs, organized as a fault-tolerant computer cluster packaged in a single rack.  Each CPU had its own private, unshared memory, its own I/O processor, its own private I/O bus to connect to I/O controllers, and dual connections to all the other CPUs over a custom inter-CPU backplane bus called Dynabus. Each disk controller or network controller was duplicated and had dual connections to both CPUs and devices. Each disk was mirrored, with separate connections to two independent disk controllers.  If a disk failed, its data was still available from its mirrored copy.  If a CPU or controller or bus failed, the disk was still reachable through alternative CPU, controller, and/or bus.  Each disk or network controller was connected to two independent CPUs.  Power supplies were each wired to only one side of some pair of CPUs, controllers, or buses, so that the system would keep running well without loss of connections if one power supply failed.  The careful complex arrangement of parts and connections in customers' larger configurations were documented in a Mackie diagram, named after lead salesman David Mackie who invented the notation.
None of these duplicated parts were wasted "hot spares"; everything added to system throughput during normal operations.
Besides recovering well from failed parts, the T/16 was also designed to detect as many kinds of intermittent failures as possible, as soon as possible.  This prompt detection is called "fail fast".  The point was to find and isolate corrupted data before it was permanently written into databases and other disk files.  In the T/16, error detection was by some added custom circuits that added little cost to the total design; no major parts were duplicated just to get error detection.
The T/16 CPU was a proprietary design.  It was greatly influenced by the HP 3000 minicomputer.  They were both microprogrammed, 16-bit, stack-based machines with segmented, 16-bit virtual addressing.  Both were intended to be programmed exclusively in high-level languages, with no use of assembler.  Both were initially implemented via standard low-density TTL chips, each holding a 4-bit slice of the 16-bit ALU.  Both had a small number of top-of-stack, 16-bit data registers plus some extra address registers for accessing the memory stack.  Both used Huffman encoding of operand address offsets, to fit a large variety of address modes and offset sizes into the 16-bit instruction format with very good code density.  Both relied heavily on pools of indirect addresses to overcome the short instruction format.  Both supported larger 32- and 64-bit operands via multiple ALU cycles, and memory-to-memory string operations. Both used "big-endian" addressing of long versus short memory operands.  These features had all been inspired by Burroughs B5500-B6800 mainframe stack machines.
The T/16 instruction set changed several features from the HP 3000 design.  The T/16 supported paged virtual memory from the beginning.  The HP 3000 series did not add paging until the PA-RISC generation, 10 years later (although MPE V it had a form of paging via the APL firmware, in 1978).  Tandem added support for 32-bit addressing in its second machine; HP 3000 lacked this until its PA-RISC generation. Paging and long addresses was critical for supporting complex system software and large applications.  The T/16 treated its top-of-stack registers in a novel way; the compiler, not the microcode, was responsible for deciding when full registers were spilled to the memory stack and when empty registers were re-filled from the memory stack.  On the HP 3000, this decision took extra microcode cycles in every instruction.  The HP 3000 supported COBOL with several instructions for calculating directly on arbitrary-length BCD (binary-coded decimal) strings of digits.  The T/16 simplified this to single instructions for converting between BCD strings and 64-bit binary integers.
In the T/16, each CPU consisted of two boa
Tandem Computers