program main
  implicit none
  
  integer :: i,n,j,c,cc=0
  
  read(*,*)n
  
  do i = 1, n, 2
    c = 0
    do j = 1, n
      if (mod(i,j) == 0) then
        c = c + 1
      end if
    end do
    if (c == 8) then
      cc = cc + 1
    end if
  end do
  write(*,*)cc
end program main
      
; ModuleID = 'FIRModule'
source_filename = "FIRModule"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"

@_QFEcc = internal unnamed_addr global i32 0
@_QQcl.30960c10f2b3190d7c09db14a2c56565 = linkonce constant [73 x i8] c"/home/ubuntu/Downloads/TheStack_IR/Collated/Fortran/Source_5637/source.f\00"
@_QQEnvironmentDefaults = local_unnamed_addr constant ptr null

define void @_QQmain() local_unnamed_addr {
  %1 = alloca i32, align 4
  %2 = tail call ptr @_FortranAioBeginExternalListInput(i32 -1, ptr nonnull @_QQcl.30960c10f2b3190d7c09db14a2c56565, i32 6)
  %3 = call i1 @_FortranAioInputInteger(ptr %2, ptr nonnull %1, i32 4)
  %4 = call i32 @_FortranAioEndIoStatement(ptr %2)
  %5 = load i32, ptr %1, align 4, !tbaa !3
  %6 = sext i32 %5 to i64
  %7 = icmp sgt i32 %5, 0
  br i1 %7, label %.preheader.us.preheader, label %._crit_edge9

.preheader.us.preheader:                          ; preds = %0
  %_QFEcc.promoted = load i32, ptr @_QFEcc, align 4, !tbaa !3
  %8 = add nsw i64 %6, 1
  %9 = sdiv i64 %8, 2
  %xtraiter = and i64 %6, 1
  %10 = icmp eq i32 %5, 1
  %unroll_iter = and i64 %6, -2
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %16
  %11 = phi i64 [ %19, %16 ], [ %9, %.preheader.us.preheader ]
  %12 = phi i32 [ %18, %16 ], [ 1, %.preheader.us.preheader ]
  %13 = phi i32 [ %17, %16 ], [ %_QFEcc.promoted, %.preheader.us.preheader ]
  br i1 %10, label %._crit_edge.us.unr-lcssa, label %.preheader.us.new

14:                                               ; preds = %._crit_edge.us
  %15 = add i32 %13, 1
  store i32 %15, ptr @_QFEcc, align 4, !tbaa !3
  br label %16

16:                                               ; preds = %14, %._crit_edge.us
  %17 = phi i32 [ %15, %14 ], [ %13, %._crit_edge.us ]
  %18 = add nuw i32 %12, 2
  %19 = add nsw i64 %11, -1
  %20 = icmp sgt i64 %11, 1
  br i1 %20, label %.preheader.us, label %._crit_edge9

.preheader.us.new:                                ; preds = %.preheader.us, %.preheader.us.new
  %21 = phi i32 [ %29, %.preheader.us.new ], [ 1, %.preheader.us ]
  %.08.us = phi i32 [ %spec.select.us.1, %.preheader.us.new ], [ 0, %.preheader.us ]
  %niter = phi i64 [ %niter.next.1, %.preheader.us.new ], [ 0, %.preheader.us ]
  %22 = srem i32 %12, %21
  %23 = icmp eq i32 %22, 0
  %24 = zext i1 %23 to i32
  %spec.select.us = add i32 %.08.us, %24
  %25 = add nuw i32 %21, 1
  %26 = srem i32 %12, %25
  %27 = icmp eq i32 %26, 0
  %28 = zext i1 %27 to i32
  %spec.select.us.1 = add i32 %spec.select.us, %28
  %29 = add nuw i32 %21, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1.not = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1.not, label %._crit_edge.us.unr-lcssa, label %.preheader.us.new

._crit_edge.us.unr-lcssa:                         ; preds = %.preheader.us.new, %.preheader.us
  %spec.select.us.lcssa.ph = phi i32 [ undef, %.preheader.us ], [ %spec.select.us.1, %.preheader.us.new ]
  %.unr11 = phi i32 [ 1, %.preheader.us ], [ %29, %.preheader.us.new ]
  %.08.us.unr = phi i32 [ 0, %.preheader.us ], [ %spec.select.us.1, %.preheader.us.new ]
  br i1 %lcmp.mod.not, label %._crit_edge.us, label %._crit_edge.us.epilog-lcssa

._crit_edge.us.epilog-lcssa:                      ; preds = %._crit_edge.us.unr-lcssa
  %30 = srem i32 %12, %.unr11
  %31 = icmp eq i32 %30, 0
  %32 = zext i1 %31 to i32
  %spec.select.us.epil = add i32 %.08.us.unr, %32
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.unr-lcssa, %._crit_edge.us.epilog-lcssa
  %spec.select.us.lcssa = phi i32 [ %spec.select.us.lcssa.ph, %._crit_edge.us.unr-lcssa ], [ %spec.select.us.epil, %._crit_edge.us.epilog-lcssa ]
  %33 = icmp eq i32 %spec.select.us.lcssa, 8
  br i1 %33, label %14, label %16

._crit_edge9:                                     ; preds = %16, %0
  %34 = call ptr @_FortranAioBeginExternalListOutput(i32 -1, ptr nonnull @_QQcl.30960c10f2b3190d7c09db14a2c56565, i32 19)
  %35 = load i32, ptr @_QFEcc, align 4, !tbaa !3
  %36 = call i1 @_FortranAioOutputInteger32(ptr %34, i32 %35)
  %37 = call i32 @_FortranAioEndIoStatement(ptr %34)
  ret void
}

declare ptr @_FortranAioBeginExternalListInput(i32, ptr, i32) local_unnamed_addr

declare i1 @_FortranAioInputInteger(ptr, ptr, i32) local_unnamed_addr

declare i32 @_FortranAioEndIoStatement(ptr) local_unnamed_addr

declare ptr @_FortranAioBeginExternalListOutput(i32, ptr, i32) local_unnamed_addr

declare i1 @_FortranAioOutputInteger32(ptr, i32) local_unnamed_addr

!llvm.module.flags = !{!0, !1, !2}

!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{!4, !4, i64 0}
!4 = !{!"any data access", !5, i64 0}
!5 = !{!"any access", !6, i64 0}
!6 = !{!"Flang Type TBAA Root"}
