program league
  implicit none
  integer :: n, a(1000,1000) = 0, i, j, l, k(1000) = 1, m = 0
  logical :: used(1000) = .false., change
  read(*,*) n
  do i = 1, n
    read(*,*) a(i,1:n-1)
  end do
  do while (any(k(1:n) < n))
    m = m+1
    used(1:n) = k(1:n) == n
    change = .false.
    do i = 1, n
      if (used(i)) cycle
      j = a(i,k(i))
      if (used(j)) cycle
      if (a(j,k(j)) == i) then
        k(i) = k(i)+1
        k(j) = k(j)+1
        used(i) = .true.
        used(j) = .true.
        change = .true.
      end if
    end do
    if (.not.change) then
      m = -1
      exit
    end if
  end do
  write(*,'(i0)') m
end program league
; ModuleID = 'FIRModule'
source_filename = "FIRModule"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"

@_QFEa = internal global [1000 x [1000 x i32]] zeroinitializer
@_QFEk = internal unnamed_addr global [1000 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1]
@_QFEm = internal unnamed_addr global i32 0
@_QFEused = internal unnamed_addr global [1000 x i32] zeroinitializer
@_QQcl.8245aaa56743e32e07b153e9d3b305d9 = linkonce constant [73 x i8] c"/home/ubuntu/Downloads/TheStack_IR/Collated/Fortran/Source_3393/source.f\00"
@_QQcl.28693029 = linkonce constant [4 x i8] c"(i0)"
@_QQEnvironmentDefaults = local_unnamed_addr constant ptr null

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #1

define void @_QQmain() local_unnamed_addr {
  %1 = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, align 8
  %2 = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, align 8
  %3 = alloca i32, align 4
  %4 = tail call ptr @_FortranAioBeginExternalListInput(i32 -1, ptr nonnull @_QQcl.8245aaa56743e32e07b153e9d3b305d9, i32 5)
  %5 = call i1 @_FortranAioInputInteger(ptr %4, ptr nonnull %3, i32 4)
  %6 = call i32 @_FortranAioEndIoStatement(ptr %4)
  %7 = load i32, ptr %3, align 4, !tbaa !3
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph, label %.preheader

.lr.ph:                                           ; preds = %0
  %9 = zext i32 %7 to i64
  %.fca.1.gep16 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 1
  %.fca.2.gep18 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 2
  %.fca.3.gep20 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 3
  %.fca.4.gep22 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 4
  %.fca.5.gep24 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 5
  %.fca.6.gep26 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 6
  %.fca.7.0.0.gep28 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 7, i64 0, i64 0
  %.fca.7.0.1.gep30 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 7, i64 0, i64 1
  %.fca.7.0.2.gep32 = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 7, i64 0, i64 2
  br label %10

.preheader.loopexit:                              ; preds = %10
  %.pre.pre = load i32, ptr %3, align 4, !tbaa !3
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %0
  %.pre = phi i32 [ %.pre.pre, %.preheader.loopexit ], [ %7, %0 ]
  %.fca.1.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 1
  %.fca.2.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 2
  %.fca.3.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 3
  %.fca.4.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 4
  %.fca.5.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 5
  %.fca.6.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 6
  %.fca.7.0.0.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 7, i64 0, i64 0
  %.fca.7.0.1.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 7, i64 0, i64 1
  %.fca.7.0.2.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %2, i64 0, i32 7, i64 0, i64 2
  br label %20

10:                                               ; preds = %.lr.ph, %10
  %indvars.iv = phi i64 [ 1, %.lr.ph ], [ %indvars.iv.next, %10 ]
  %11 = call ptr @_FortranAioBeginExternalListInput(i32 -1, ptr nonnull @_QQcl.8245aaa56743e32e07b153e9d3b305d9, i32 7)
  %12 = load i32, ptr %3, align 4, !tbaa !3
  %13 = add i32 %12, -1
  %14 = add nsw i64 %indvars.iv, -1
  %15 = call i32 @llvm.smax.i32(i32 %13, i32 0)
  %16 = zext i32 %15 to i64
  %17 = getelementptr [1000 x [1000 x i32]], ptr @_QFEa, i64 0, i64 0, i64 %14
  store ptr %17, ptr %1, align 8, !tbaa !7
  store i64 4, ptr %.fca.1.gep16, align 8, !tbaa !7
  store i32 20180515, ptr %.fca.2.gep18, align 8, !tbaa !7
  store i8 1, ptr %.fca.3.gep20, align 4, !tbaa !7
  store i8 9, ptr %.fca.4.gep22, align 1, !tbaa !7
  store i8 0, ptr %.fca.5.gep24, align 2, !tbaa !7
  store i8 0, ptr %.fca.6.gep26, align 1, !tbaa !7
  store i64 1, ptr %.fca.7.0.0.gep28, align 8, !tbaa !7
  store i64 %16, ptr %.fca.7.0.1.gep30, align 8, !tbaa !7
  store i64 4000, ptr %.fca.7.0.2.gep32, align 8, !tbaa !7
  %18 = call i1 @_FortranAioInputDescriptor(ptr %11, ptr nonnull %1)
  %19 = call i32 @_FortranAioEndIoStatement(ptr %11)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv, %9
  br i1 %exitcond.not, label %.preheader.loopexit, label %10

20:                                               ; preds = %.preheader, %._crit_edge46
  %21 = phi i32 [ %.pre, %.preheader ], [ %49, %._crit_edge46 ]
  %22 = call i32 @llvm.smax.i32(i32 %21, i32 0)
  %23 = zext i32 %22 to i64
  %24 = shl nuw nsw i64 %23, 2
  %25 = call ptr @malloc(i64 %24)
  %.not47 = icmp slt i32 %21, 1
  br i1 %.not47, label %._crit_edge, label %.lr.ph39.preheader

.lr.ph39.preheader:                               ; preds = %20
  %min.iters.check63 = icmp ult i32 %22, 8
  br i1 %min.iters.check63, label %.lr.ph39.preheader82, label %vector.ph64

vector.ph64:                                      ; preds = %.lr.ph39.preheader
  %n.vec66 = and i64 %23, 2147483640
  %ind.end67 = and i64 %23, 7
  %broadcast.splatinsert75 = insertelement <4 x i32> poison, i32 %21, i64 0
  %broadcast.splat76 = shufflevector <4 x i32> %broadcast.splatinsert75, <4 x i32> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert77 = insertelement <4 x i32> poison, i32 %21, i64 0
  %broadcast.splat78 = shufflevector <4 x i32> %broadcast.splatinsert77, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body71

vector.body71:                                    ; preds = %vector.body71, %vector.ph64
  %index72 = phi i64 [ 0, %vector.ph64 ], [ %index.next79, %vector.body71 ]
  %26 = getelementptr i32, ptr @_QFEk, i64 %index72
  %wide.load73 = load <4 x i32>, ptr %26, align 16, !tbaa !3
  %27 = getelementptr i32, ptr %26, i64 4
  %wide.load74 = load <4 x i32>, ptr %27, align 16, !tbaa !3
  %28 = icmp slt <4 x i32> %wide.load73, %broadcast.splat76
  %29 = icmp slt <4 x i32> %wide.load74, %broadcast.splat78
  %30 = zext <4 x i1> %28 to <4 x i32>
  %31 = zext <4 x i1> %29 to <4 x i32>
  %32 = getelementptr i32, ptr %25, i64 %index72
  store <4 x i32> %30, ptr %32, align 4, !tbaa !3
  %33 = getelementptr i32, ptr %32, i64 4
  store <4 x i32> %31, ptr %33, align 4, !tbaa !3
  %index.next79 = add nuw i64 %index72, 8
  %34 = icmp eq i64 %index.next79, %n.vec66
  br i1 %34, label %middle.block61, label %vector.body71, !llvm.loop !9

middle.block61:                                   ; preds = %vector.body71
  %cmp.n70 = icmp eq i64 %n.vec66, %23
  br i1 %cmp.n70, label %._crit_edge, label %.lr.ph39.preheader82

.lr.ph39.preheader82:                             ; preds = %.lr.ph39.preheader, %middle.block61
  %.ph83 = phi i64 [ %23, %.lr.ph39.preheader ], [ %ind.end67, %middle.block61 ]
  %.ph84 = phi i64 [ 0, %.lr.ph39.preheader ], [ %n.vec66, %middle.block61 ]
  br label %.lr.ph39

.lr.ph39:                                         ; preds = %.lr.ph39.preheader82, %.lr.ph39
  %35 = phi i64 [ %43, %.lr.ph39 ], [ %.ph83, %.lr.ph39.preheader82 ]
  %36 = phi i64 [ %37, %.lr.ph39 ], [ %.ph84, %.lr.ph39.preheader82 ]
  %37 = add nuw nsw i64 %36, 1
  %38 = getelementptr i32, ptr @_QFEk, i64 %36
  %39 = load i32, ptr %38, align 4, !tbaa !3
  %40 = icmp slt i32 %39, %21
  %41 = zext i1 %40 to i32
  %42 = getelementptr i32, ptr %25, i64 %36
  store i32 %41, ptr %42, align 4, !tbaa !3
  %43 = add nsw i64 %35, -1
  %44 = icmp ugt i64 %35, 1
  br i1 %44, label %.lr.ph39, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph39, %middle.block61, %20
  store ptr %25, ptr %2, align 8, !tbaa !7
  store i64 4, ptr %.fca.1.gep, align 8, !tbaa !7
  store i32 20180515, ptr %.fca.2.gep, align 8, !tbaa !7
  store i8 1, ptr %.fca.3.gep, align 4, !tbaa !7
  store i8 14, ptr %.fca.4.gep, align 1, !tbaa !7
  store i8 0, ptr %.fca.5.gep, align 2, !tbaa !7
  store i8 0, ptr %.fca.6.gep, align 1, !tbaa !7
  store i64 1, ptr %.fca.7.0.0.gep, align 8, !tbaa !7
  store i64 %23, ptr %.fca.7.0.1.gep, align 8, !tbaa !7
  store i64 4, ptr %.fca.7.0.2.gep, align 8, !tbaa !7
  %45 = call i1 @_FortranAAny(ptr nonnull %2, ptr nonnull @_QQcl.8245aaa56743e32e07b153e9d3b305d9, i32 9, i32 1)
  call void @free(ptr %25)
  br i1 %45, label %46, label %.loopexit

46:                                               ; preds = %._crit_edge
  %47 = load i32, ptr @_QFEm, align 4, !tbaa !3
  %48 = add i32 %47, 1
  store i32 %48, ptr @_QFEm, align 4, !tbaa !3
  %49 = load i32, ptr %3, align 4, !tbaa !3
  %.not48 = icmp slt i32 %49, 1
  br i1 %.not48, label %._crit_edge46.thread, label %.lr.ph41.preheader

.lr.ph41.preheader:                               ; preds = %46
  %50 = zext i32 %49 to i64
  %min.iters.check = icmp ult i32 %49, 8
  br i1 %min.iters.check, label %.lr.ph41.preheader80, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph41.preheader
  %n.vec = and i64 %50, 4294967288
  %ind.end = and i64 %50, 7
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %49, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert59 = insertelement <4 x i32> poison, i32 %49, i64 0
  %broadcast.splat60 = shufflevector <4 x i32> %broadcast.splatinsert59, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %51 = getelementptr i32, ptr @_QFEk, i64 %index
  %wide.load = load <4 x i32>, ptr %51, align 16, !tbaa !3
  %52 = getelementptr i32, ptr %51, i64 4
  %wide.load58 = load <4 x i32>, ptr %52, align 16, !tbaa !3
  %53 = icmp eq <4 x i32> %wide.load, %broadcast.splat
  %54 = icmp eq <4 x i32> %wide.load58, %broadcast.splat60
  %55 = zext <4 x i1> %53 to <4 x i32>
  %56 = zext <4 x i1> %54 to <4 x i32>
  %57 = getelementptr i32, ptr @_QFEused, i64 %index
  store <4 x i32> %55, ptr %57, align 16, !tbaa !3
  %58 = getelementptr i32, ptr %57, i64 4
  store <4 x i32> %56, ptr %58, align 16, !tbaa !3
  %index.next = add nuw i64 %index, 8
  %59 = icmp eq i64 %index.next, %n.vec
  br i1 %59, label %middle.block, label %vector.body, !llvm.loop !13

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %50
  br i1 %cmp.n, label %._crit_edge42, label %.lr.ph41.preheader80

.lr.ph41.preheader80:                             ; preds = %.lr.ph41.preheader, %middle.block
  %.ph = phi i64 [ %50, %.lr.ph41.preheader ], [ %ind.end, %middle.block ]
  %.ph81 = phi i64 [ 0, %.lr.ph41.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph41

.lr.ph41:                                         ; preds = %.lr.ph41.preheader80, %.lr.ph41
  %60 = phi i64 [ %68, %.lr.ph41 ], [ %.ph, %.lr.ph41.preheader80 ]
  %61 = phi i64 [ %62, %.lr.ph41 ], [ %.ph81, %.lr.ph41.preheader80 ]
  %62 = add nuw nsw i64 %61, 1
  %63 = getelementptr i32, ptr @_QFEk, i64 %61
  %64 = load i32, ptr %63, align 4, !tbaa !3
  %65 = icmp eq i32 %64, %49
  %66 = zext i1 %65 to i32
  %67 = getelementptr i32, ptr @_QFEused, i64 %61
  store i32 %66, ptr %67, align 4, !tbaa !3
  %68 = add nsw i64 %60, -1
  %69 = icmp ugt i64 %60, 1
  br i1 %69, label %.lr.ph41, label %._crit_edge42, !llvm.loop !14

._crit_edge42:                                    ; preds = %.lr.ph41, %middle.block
  %70 = icmp sgt i32 %49, 0
  br i1 %70, label %.lr.ph45.preheader, label %._crit_edge46.thread

.lr.ph45.preheader:                               ; preds = %._crit_edge42
  %71 = zext i32 %49 to i64
  br label %.lr.ph45

.lr.ph45:                                         ; preds = %.lr.ph45.preheader, %99
  %indvars.iv50 = phi i64 [ 1, %.lr.ph45.preheader ], [ %indvars.iv.next51, %99 ]
  %.043 = phi i32 [ 0, %.lr.ph45.preheader ], [ %.1, %99 ]
  %72 = add nsw i64 %indvars.iv50, -1
  %73 = getelementptr [1000 x i32], ptr @_QFEused, i64 0, i64 %72
  %74 = load i32, ptr %73, align 4, !tbaa !3
  %.not37 = icmp eq i32 %74, 0
  br i1 %.not37, label %75, label %99

75:                                               ; preds = %.lr.ph45
  %76 = getelementptr [1000 x i32], ptr @_QFEk, i64 0, i64 %72
  %77 = load i32, ptr %76, align 4, !tbaa !3
  %78 = sext i32 %77 to i64
  %79 = add nsw i64 %78, -1
  %80 = getelementptr [1000 x [1000 x i32]], ptr @_QFEa, i64 0, i64 %79, i64 %72
  %81 = load i32, ptr %80, align 4, !tbaa !3
  %82 = sext i32 %81 to i64
  %83 = add nsw i64 %82, -1
  %84 = getelementptr [1000 x i32], ptr @_QFEused, i64 0, i64 %83
  %85 = load i32, ptr %84, align 4, !tbaa !3
  %.not38 = icmp eq i32 %85, 0
  br i1 %.not38, label %86, label %99

86:                                               ; preds = %75
  %87 = getelementptr [1000 x i32], ptr @_QFEk, i64 0, i64 %83
  %88 = load i32, ptr %87, align 4, !tbaa !3
  %89 = sext i32 %88 to i64
  %90 = add nsw i64 %89, -1
  %91 = getelementptr [1000 x [1000 x i32]], ptr @_QFEa, i64 0, i64 %90, i64 %83
  %92 = load i32, ptr %91, align 4, !tbaa !3
  %93 = zext i32 %92 to i64
  %94 = icmp eq i64 %indvars.iv50, %93
  br i1 %94, label %95, label %99

95:                                               ; preds = %86
  %96 = add i32 %77, 1
  store i32 %96, ptr %76, align 4, !tbaa !3
  %97 = load i32, ptr %87, align 4, !tbaa !3
  %98 = add i32 %97, 1
  store i32 %98, ptr %87, align 4, !tbaa !3
  store i32 1, ptr %73, align 4, !tbaa !3
  store i32 1, ptr %84, align 4, !tbaa !3
  br label %99

99:                                               ; preds = %95, %86, %75, %.lr.ph45
  %.1 = phi i32 [ 1, %95 ], [ %.043, %86 ], [ %.043, %75 ], [ %.043, %.lr.ph45 ]
  %indvars.iv.next51 = add nuw nsw i64 %indvars.iv50, 1
  %exitcond53.not = icmp eq i64 %indvars.iv50, %71
  br i1 %exitcond53.not, label %._crit_edge46, label %.lr.ph45

._crit_edge46:                                    ; preds = %99
  %.not = icmp eq i32 %.1, 0
  br i1 %.not, label %._crit_edge46.thread, label %20

._crit_edge46.thread:                             ; preds = %46, %._crit_edge42, %._crit_edge46
  store i32 -1, ptr @_QFEm, align 4, !tbaa !3
  br label %.loopexit

.loopexit:                                        ; preds = %._crit_edge, %._crit_edge46.thread
  %100 = call ptr @_FortranAioBeginExternalFormattedOutput(ptr nonnull @_QQcl.28693029, i64 4, ptr null, i32 -1, ptr nonnull @_QQcl.8245aaa56743e32e07b153e9d3b305d9, i32 30)
  %101 = load i32, ptr @_QFEm, align 4, !tbaa !3
  %102 = call i1 @_FortranAioOutputInteger32(ptr %100, i32 %101)
  %103 = call i32 @_FortranAioEndIoStatement(ptr %100)
  ret void
}

declare ptr @_FortranAioBeginExternalListInput(i32, ptr, i32) local_unnamed_addr

declare i1 @_FortranAioInputInteger(ptr, ptr, i32) local_unnamed_addr

declare i32 @_FortranAioEndIoStatement(ptr) local_unnamed_addr

declare i1 @_FortranAioInputDescriptor(ptr, ptr) local_unnamed_addr

declare i1 @_FortranAAny(ptr, ptr, i32, i32) local_unnamed_addr

declare ptr @_FortranAioBeginExternalFormattedOutput(ptr, i64, ptr, i32, ptr, i32) local_unnamed_addr

declare i1 @_FortranAioOutputInteger32(ptr, i32) local_unnamed_addr

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2

attributes #0 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" }
attributes #1 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2}

!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{!4, !4, i64 0}
!4 = !{!"any data access", !5, i64 0}
!5 = !{!"any access", !6, i64 0}
!6 = !{!"Flang Type TBAA Root"}
!7 = !{!8, !8, i64 0}
!8 = !{!"descriptor member", !5, i64 0}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.isvectorized", i32 1}
!11 = !{!"llvm.loop.unroll.runtime.disable"}
!12 = distinct !{!12, !11, !10}
!13 = distinct !{!13, !10, !11}
!14 = distinct !{!14, !11, !10}
