program sample
    implicit none

    integer(8):: N, i, j, k, l,z
    integer(8), allocatable::A(:)
    read(*,*) N
    allocate(A(N))
    read(*,*) A
    k = 1

    do i = 1, N
        z = mod(A(i),2)
        if(z == 1) then
            l = 1
        else
            l = 2
        end if
        k = k*l
    end do

    write(*,*) 3**N - k
    deallocate(A)

    stop
end program sample
; ModuleID = 'FIRModule'
source_filename = "FIRModule"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"

@_QFEa.0 = internal unnamed_addr global ptr null
@_QFEa.8 = internal unnamed_addr global i64 0
@_QQcl.811223b96df6d3d0e4ad6dbead6e5f48 = linkonce constant [73 x i8] c"/home/ubuntu/Downloads/TheStack_IR/Collated/Fortran/Source_6801/source.f\00"
@_QQEnvironmentDefaults = local_unnamed_addr constant ptr null

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #1

; Function Attrs: noreturn
define void @_QQmain() local_unnamed_addr #2 {
  %1 = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, align 8
  %2 = alloca i64, align 8
  %3 = tail call ptr @_FortranAioBeginExternalListInput(i32 -1, ptr nonnull @_QQcl.811223b96df6d3d0e4ad6dbead6e5f48, i32 6)
  %4 = call i1 @_FortranAioInputInteger(ptr %3, ptr nonnull %2, i32 8)
  %5 = call i32 @_FortranAioEndIoStatement(ptr %3)
  %6 = load i64, ptr %2, align 8, !tbaa !3
  %7 = call i64 @llvm.smax.i64(i64 %6, i64 0)
  %8 = shl i64 %7, 3
  %9 = call ptr @malloc(i64 %8)
  store ptr %9, ptr @_QFEa.0, align 8, !tbaa !7
  store i64 %7, ptr @_QFEa.8, align 8, !tbaa !7
  %10 = call ptr @_FortranAioBeginExternalListInput(i32 -1, ptr nonnull @_QQcl.811223b96df6d3d0e4ad6dbead6e5f48, i32 8)
  %.unpack = load ptr, ptr @_QFEa.0, align 8, !tbaa !7
  %.unpack159.unpack.unpack161 = load i64, ptr @_QFEa.8, align 8, !tbaa !7
  store ptr %.unpack, ptr %1, align 8, !tbaa !7
  %.fca.1.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 1
  store i64 8, ptr %.fca.1.gep, align 8, !tbaa !7
  %.fca.2.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 2
  store i32 20180515, ptr %.fca.2.gep, align 8, !tbaa !7
  %.fca.3.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 3
  store i8 1, ptr %.fca.3.gep, align 4, !tbaa !7
  %.fca.4.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 4
  store i8 10, ptr %.fca.4.gep, align 1, !tbaa !7
  %.fca.5.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 5
  store i8 0, ptr %.fca.5.gep, align 2, !tbaa !7
  %.fca.6.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 6
  store i8 0, ptr %.fca.6.gep, align 1, !tbaa !7
  %.fca.7.0.0.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 7, i64 0, i64 0
  store i64 1, ptr %.fca.7.0.0.gep, align 8, !tbaa !7
  %.fca.7.0.1.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 7, i64 0, i64 1
  store i64 %.unpack159.unpack.unpack161, ptr %.fca.7.0.1.gep, align 8, !tbaa !7
  %.fca.7.0.2.gep = getelementptr inbounds { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %1, i64 0, i32 7, i64 0, i64 2
  store i64 8, ptr %.fca.7.0.2.gep, align 8, !tbaa !7
  %11 = call i1 @_FortranAioInputDescriptor(ptr %10, ptr nonnull %1)
  %12 = call i32 @_FortranAioEndIoStatement(ptr %10)
  %13 = load i64, ptr %2, align 8, !tbaa !3
  %14 = icmp sgt i64 %13, 0
  br i1 %14, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %0
  %.unpack176 = load ptr, ptr @_QFEa.0, align 8, !tbaa !7
  %xtraiter = and i64 %13, 1
  %15 = icmp eq i64 %13, 1
  br i1 %15, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %13, -2
  br label %16

16:                                               ; preds = %16, %.lr.ph.new
  %17 = phi i64 [ 1, %.lr.ph.new ], [ %29, %16 ]
  %.0142188 = phi i64 [ 1, %.lr.ph.new ], [ %28, %16 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.1, %16 ]
  %18 = add nsw i64 %17, -1
  %19 = getelementptr i64, ptr %.unpack176, i64 %18
  %20 = load i64, ptr %19, align 8, !tbaa !3
  %21 = and i64 %20, -9223372036854775807
  %22 = icmp eq i64 %21, 1
  %. = select i1 %22, i64 1, i64 2
  %23 = mul i64 %., %.0142188
  %24 = getelementptr i64, ptr %.unpack176, i64 %17
  %25 = load i64, ptr %24, align 8, !tbaa !3
  %26 = and i64 %25, -9223372036854775807
  %27 = icmp eq i64 %26, 1
  %..1 = select i1 %27, i64 1, i64 2
  %28 = mul i64 %..1, %23
  %29 = add nuw i64 %17, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa.loopexit, label %16

._crit_edge.loopexit.unr-lcssa.loopexit:          ; preds = %16
  %30 = add i64 %17, 1
  br label %._crit_edge.loopexit.unr-lcssa

._crit_edge.loopexit.unr-lcssa:                   ; preds = %._crit_edge.loopexit.unr-lcssa.loopexit, %.lr.ph
  %.lcssa.ph = phi i64 [ undef, %.lr.ph ], [ %28, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %.unr = phi i64 [ 0, %.lr.ph ], [ %30, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %.0142188.unr = phi i64 [ 1, %.lr.ph ], [ %28, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %._crit_edge.loopexit.epilog-lcssa

._crit_edge.loopexit.epilog-lcssa:                ; preds = %._crit_edge.loopexit.unr-lcssa
  %31 = getelementptr i64, ptr %.unpack176, i64 %.unr
  %32 = load i64, ptr %31, align 8, !tbaa !3
  %33 = and i64 %32, -9223372036854775807
  %34 = icmp eq i64 %33, 1
  %..epil = select i1 %34, i64 1, i64 2
  %35 = mul i64 %..epil, %.0142188.unr
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.epilog-lcssa, %._crit_edge.loopexit.unr-lcssa, %0
  %.0142.lcssa = phi i64 [ 1, %0 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %35, %._crit_edge.loopexit.epilog-lcssa ]
  %36 = call ptr @_FortranAioBeginExternalListOutput(i32 -1, ptr nonnull @_QQcl.811223b96df6d3d0e4ad6dbead6e5f48, i32 21)
  %37 = load i64, ptr %2, align 8, !tbaa !3
  %38 = call i64 @__mlir_math_ipowi_i64(i64 3, i64 %37)
  %39 = sub i64 %38, %.0142.lcssa
  %40 = call i1 @_FortranAioOutputInteger64(ptr %36, i64 %39)
  %41 = call i32 @_FortranAioEndIoStatement(ptr %36)
  %.unpack164 = load ptr, ptr @_QFEa.0, align 8, !tbaa !7
  call void @free(ptr %.unpack164)
  store ptr null, ptr @_QFEa.0, align 8, !tbaa !7
  store i64 0, ptr @_QFEa.8, align 8, !tbaa !7
  %42 = call {} @_FortranAStopStatement(i32 0, i1 false, i1 false)
  unreachable
}

declare ptr @_FortranAioBeginExternalListInput(i32, ptr, i32) local_unnamed_addr

declare i1 @_FortranAioInputInteger(ptr, ptr, i32) local_unnamed_addr

declare i32 @_FortranAioEndIoStatement(ptr) local_unnamed_addr

declare i1 @_FortranAioInputDescriptor(ptr, ptr) local_unnamed_addr

declare ptr @_FortranAioBeginExternalListOutput(i32, ptr, i32) local_unnamed_addr

declare i1 @_FortranAioOutputInteger64(ptr, i64) local_unnamed_addr

declare {} @_FortranAStopStatement(i32, i1, i1) local_unnamed_addr

define linkonce_odr i64 @__mlir_math_ipowi_i64(i64 %0, i64 %1) local_unnamed_addr {
  %3 = icmp eq i64 %1, 0
  br i1 %3, label %common.ret, label %4

common.ret:                                       ; preds = %.lr.ph, %.preheader, %10, %9, %9, %2, %12
  %common.ret.op = phi i64 [ 0, %12 ], [ 1, %2 ], [ 1, %9 ], [ 1, %9 ], [ %., %10 ], [ %7, %.preheader ], [ %spec.select, %.lr.ph ]
  ret i64 %common.ret.op

4:                                                ; preds = %2
  %5 = icmp slt i64 %1, 1
  br i1 %5, label %9, label %.preheader

.preheader:                                       ; preds = %4
  %6 = and i64 %1, 1
  %.not3 = icmp eq i64 %6, 0
  %7 = select i1 %.not3, i64 1, i64 %0
  %8 = icmp eq i64 %1, 1
  br i1 %8, label %common.ret, label %.lr.ph

9:                                                ; preds = %4
  switch i64 %0, label %12 [
    i64 0, label %common.ret
    i64 1, label %common.ret
    i64 -1, label %10
  ]

10:                                               ; preds = %9
  %11 = and i64 %1, 1
  %.not2 = icmp eq i64 %11, 0
  %. = select i1 %.not2, i64 1, i64 -1
  br label %common.ret

12:                                               ; preds = %9
  br label %common.ret

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %spec.select4 = phi i64 [ %spec.select, %.lr.ph ], [ %7, %.preheader ]
  %13 = phi i64 [ %15, %.lr.ph ], [ %1, %.preheader ]
  %14 = phi i64 [ %16, %.lr.ph ], [ %0, %.preheader ]
  %15 = lshr i64 %13, 1
  %16 = mul i64 %14, %14
  %17 = and i64 %13, 2
  %.not = icmp eq i64 %17, 0
  %18 = select i1 %.not, i64 1, i64 %16
  %spec.select = mul i64 %18, %spec.select4
  %19 = icmp ult i64 %13, 4
  br i1 %19, label %common.ret, label %.lr.ph
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #3

attributes #0 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" }
attributes #1 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" }
attributes #2 = { noreturn }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2}

!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{!4, !4, i64 0}
!4 = !{!"any data access", !5, i64 0}
!5 = !{!"any access", !6, i64 0}
!6 = !{!"Flang Type TBAA Root"}
!7 = !{!8, !8, i64 0}
!8 = !{!"descriptor member", !5, i64 0}
