	.file	"extr_rt2800lib.c_rt2800_config_channel.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	rt2800_config_channel, @function
rt2800_config_channel:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rsi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rcx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	rdi, QWORD PTR 8[rcx]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	cmp	DWORD PTR [rdx], 14
	jg	.L2
	call	TXPOWER_G_TO_DEV@PLT
	mov	rdi, QWORD PTR [r12]
	mov	QWORD PTR 8[r12], rax
	call	TXPOWER_G_TO_DEV@PLT
	mov	QWORD PTR [r12], rax
.L3:
	mov	eax, DWORD PTR 16[rbp]
	add	eax, -128
	cmp	eax, 13
	ja	.L4
	lea	rdx, .L6[rip]
	mov	rcx, r12
	mov	rsi, r14
	mov	rdi, rbp
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	mov	rdx, rbx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L6:
	.long	.L11-.L6
	.long	.L10-.L6
	.long	.L10-.L6
	.long	.L10-.L6
	.long	.L10-.L6
	.long	.L10-.L6
	.long	.L9-.L6
	.long	.L5-.L6
	.long	.L8-.L6
	.long	.L7-.L6
	.long	.L5-.L6
	.long	.L5-.L6
	.long	.L5-.L6
	.long	.L5-.L6
	.text
	.p2align 4,,10
	.p2align 3
.L2:
	call	TXPOWER_A_TO_DEV@PLT
	mov	rdi, QWORD PTR [r12]
	mov	QWORD PTR 8[r12], rax
	call	TXPOWER_A_TO_DEV@PLT
	mov	QWORD PTR [r12], rax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L5:
	call	rt2800_config_channel_rf3xxx@PLT
	.p2align 4,,10
	.p2align 3
.L12:
	mov	esi, 136
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	jne	.L15
	mov	esi, 134
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	je	.L59
.L15:
	lea	r12, 20[rsp]
	mov	esi, 30
	mov	rdi, rbp
	mov	rdx, r12
	call	rt2800_rfcsr_read@PLT
	mov	esi, DWORD PTR RFCSR30_TX_H20M[rip]
	xor	edx, edx
	mov	rdi, r12
	call	rt2x00_set_field8@PLT
	mov	esi, DWORD PTR RFCSR30_RX_H20M[rip]
	xor	edx, edx
	mov	rdi, r12
	call	rt2x00_set_field8@PLT
	mov	edx, DWORD PTR 20[rsp]
	mov	esi, 30
	mov	rdi, rbp
	call	rt2800_rfcsr_write@PLT
	mov	rdx, r12
	mov	esi, 3
	mov	rdi, rbp
	call	rt2800_rfcsr_read@PLT
	mov	esi, DWORD PTR RFCSR3_VCOCAL_EN[rip]
	mov	edx, 1
	mov	rdi, r12
	call	rt2x00_set_field8@PLT
	mov	edx, DWORD PTR 20[rsp]
	mov	esi, 3
	mov	rdi, rbp
	call	rt2800_rfcsr_write@PLT
.L14:
	mov	esi, DWORD PTR RT3352[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	je	.L16
	xor	edx, edx
	mov	esi, 27
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	mov	eax, DWORD PTR 0[rbp]
	mov	esi, 66
	mov	rdi, rbp
	lea	edx, 38[rax]
	call	rt2800_bbp_write@PLT
	mov	edx, 32
	mov	esi, 27
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	mov	eax, DWORD PTR 0[rbp]
	mov	esi, 66
	mov	rdi, rbp
	lea	edx, 38[rax]
	call	rt2800_bbp_write@PLT
.L17:
	cmp	DWORD PTR [rbx], 14
	lea	r15, 4[rbp]
	jg	.L18
	mov	esi, DWORD PTR RT5390[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	je	.L60
.L20:
	lea	r12, 8[rsp]
	mov	esi, DWORD PTR TX_BAND_CFG[rip]
	mov	rdi, rbp
	mov	rdx, r12
	call	rt2800_register_read@PLT
	mov	rdi, r14
	call	conf_is_ht40_minus@PLT
	mov	esi, DWORD PTR TX_BAND_CFG_HT40_MINUS[rip]
	mov	rdi, r12
	mov	edx, eax
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_BAND_CFG_A[rip]
	xor	edx, edx
	cmp	DWORD PTR [rbx], 14
	setg	dl
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_BAND_CFG_BG[rip]
	xor	edx, edx
	cmp	DWORD PTR [rbx], 14
	setle	dl
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_BAND_CFG[rip]
	mov	edx, DWORD PTR 8[rsp]
	mov	rdi, rbp
	call	rt2800_register_write@PLT
	mov	esi, DWORD PTR RT3572[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	jne	.L61
.L26:
	cmp	DWORD PTR 8[rbp], 2
	mov	DWORD PTR 12[rsp], 0
	lea	r13, 12[rsp]
	je	.L62
.L27:
	cmp	DWORD PTR 12[rbp], 2
	je	.L63
.L28:
	mov	esi, DWORD PTR TX_PIN_CFG_LNA_PE_A0_EN[rip]
	mov	edx, 1
	mov	rdi, r13
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_PIN_CFG_LNA_PE_G0_EN[rip]
	mov	edx, 1
	mov	rdi, r13
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_PIN_CFG_RFTR_EN[rip]
	mov	edx, 1
	mov	rdi, r13
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_PIN_CFG_TRSW_EN[rip]
	mov	rdi, r13
	mov	edx, 1
	call	rt2x00_set_field32@PLT
	mov	edi, DWORD PTR CAPABILITY_BT_COEXIST[rip]
	mov	rsi, r15
	call	test_bit@PLT
	test	rax, rax
	je	.L29
	mov	esi, DWORD PTR TX_PIN_CFG_PA_PE_G0_EN[rip]
	mov	edx, 1
	mov	rdi, r13
	call	rt2x00_set_field32@PLT
.L30:
	mov	esi, DWORD PTR TX_PIN_CFG_PA_PE_A0_EN[rip]
	xor	edx, edx
	cmp	DWORD PTR [rbx], 14
	mov	rdi, r13
	setg	dl
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_PIN_CFG[rip]
	mov	edx, DWORD PTR 12[rsp]
	mov	rdi, rbp
	call	rt2800_register_write@PLT
	mov	esi, DWORD PTR RT3572[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	jne	.L64
.L31:
	mov	esi, DWORD PTR RT5592[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	jne	.L65
.L32:
	lea	r13, 16[rsp]
	mov	esi, 4
	mov	rdi, rbp
	mov	rdx, r13
	call	rt2800_bbp_read@PLT
	mov	rdi, r14
	call	conf_is_ht40@PLT
	mov	esi, DWORD PTR BBP4_BANDWIDTH[rip]
	mov	rdi, r13
	lea	edx, [rax+rax]
	call	rt2x00_set_field8@PLT
	mov	edx, DWORD PTR 16[rsp]
	mov	esi, 4
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	mov	rdx, r13
	mov	esi, 3
	mov	rdi, rbp
	call	rt2800_bbp_read@PLT
	mov	rdi, r14
	call	conf_is_ht40_minus@PLT
	mov	esi, DWORD PTR BBP3_HT40_MINUS[rip]
	mov	rdi, r13
	mov	edx, eax
	call	rt2x00_set_field8@PLT
	mov	edx, DWORD PTR 16[rsp]
	mov	esi, 3
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	mov	edx, DWORD PTR REV_RT2860C[rip]
	mov	esi, DWORD PTR RT2860[rip]
	mov	rdi, rbp
	call	rt2x00_rt_rev@PLT
	test	rax, rax
	jne	.L66
.L35:
	mov	edi, 1
	call	msleep@PLT
	mov	esi, DWORD PTR CH_IDLE_STA[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2800_register_read@PLT
	mov	esi, DWORD PTR CH_BUSY_STA[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2800_register_read@PLT
	mov	esi, DWORD PTR CH_BUSY_STA_SEC[rip]
	mov	rdi, rbp
	mov	rdx, r12
	call	rt2800_register_read@PLT
	mov	esi, DWORD PTR RT3352[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	jne	.L67
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L68
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	call	rt2800_config_channel_rf53xx@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L8:
	call	rt2800_config_channel_rf3290@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L7:
	call	rt2800_config_channel_rf3052@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L11:
	call	rt2800_config_channel_rf55xx@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L9:
	call	rt2800_config_channel_rf3322@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L29:
	xor	edx, edx
	mov	esi, DWORD PTR TX_PIN_CFG_PA_PE_G0_EN[rip]
	cmp	DWORD PTR [rbx], 14
	mov	rdi, r13
	setle	dl
	call	rt2x00_set_field32@PLT
	jmp	.L30
	.p2align 4,,10
	.p2align 3
.L18:
	mov	esi, DWORD PTR RT3572[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	je	.L23
	mov	edx, 148
	mov	esi, 82
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
.L24:
	mov	edi, DWORD PTR CAPABILITY_EXTERNAL_LNA_A[rip]
	mov	rsi, r15
	call	test_bit@PLT
	test	rax, rax
	je	.L25
	mov	edx, 70
	mov	esi, 75
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L16:
	mov	r12d, 55
	mov	rdi, rbp
	mov	esi, 62
	mov	edx, r12d
	sub	edx, DWORD PTR 0[rbp]
	call	rt2800_bbp_write@PLT
	mov	rdi, rbp
	mov	edx, r12d
	mov	esi, 63
	sub	edx, DWORD PTR 0[rbp]
	call	rt2800_bbp_write@PLT
	mov	rdi, rbp
	mov	edx, r12d
	mov	esi, 64
	sub	edx, DWORD PTR 0[rbp]
	call	rt2800_bbp_write@PLT
	xor	edx, edx
	mov	esi, 86
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L61:
	xor	edx, edx
	mov	esi, 8
	mov	rdi, rbp
	call	rt2800_rfcsr_write@PLT
	jmp	.L26
	.p2align 4,,10
	.p2align 3
.L66:
	mov	rdi, r14
	call	conf_is_ht40@PLT
	test	eax, eax
	je	.L36
	mov	rdi, rbp
	mov	edx, 26
	mov	esi, 69
	call	rt2800_bbp_write@PLT
	mov	rdi, rbp
	mov	edx, 10
	mov	esi, 70
	call	rt2800_bbp_write@PLT
	mov	edx, 22
	mov	esi, 73
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L35
	.p2align 4,,10
	.p2align 3
.L65:
	mov	edx, 141
	mov	esi, 195
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	mov	rdi, r14
	call	conf_is_ht40@PLT
	mov	rdi, rbp
	mov	esi, 196
	cmp	eax, 1
	sbb	edx, edx
	and	edx, 10
	add	edx, 16
	call	rt2800_bbp_write@PLT
	mov	eax, DWORD PTR 0[rbp]
	xor	edx, edx
	cmp	DWORD PTR [rbx], 15
	setge	dl
	mov	rdi, rbp
	mov	esi, 66
	add	eax, eax
	lea	edx, 28[rax+rdx*8]
	mov	DWORD PTR 8[rsp], edx
	call	rt2800_bbp_write_with_rx_chain@PLT
	mov	esi, DWORD PTR [rbx]
	mov	rdi, rbp
	call	rt2800_iq_calibrate@PLT
	jmp	.L32
	.p2align 4,,10
	.p2align 3
.L67:
	mov	rdx, r13
	mov	rdi, rbp
	mov	esi, 49
	call	rt2800_bbp_read@PLT
	mov	esi, DWORD PTR BBP49_UPDATE_FLAG[rip]
	xor	edx, edx
	mov	rdi, r13
	call	rt2x00_set_field8@PLT
	mov	edx, DWORD PTR 16[rsp]
	mov	esi, 49
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L64:
	mov	edx, 128
	mov	esi, 8
	mov	rdi, rbp
	call	rt2800_rfcsr_write@PLT
	jmp	.L31
	.p2align 4,,10
	.p2align 3
.L25:
	mov	edx, 80
	mov	esi, 75
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L23:
	mov	edx, 242
	mov	esi, 82
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L24
	.p2align 4,,10
	.p2align 3
.L63:
	mov	esi, DWORD PTR TX_PIN_CFG_LNA_PE_A1_EN[rip]
	mov	rdi, r13
	mov	edx, 1
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TX_PIN_CFG_LNA_PE_G1_EN[rip]
	mov	edx, 1
	mov	rdi, r13
	call	rt2x00_set_field32@PLT
	jmp	.L28
	.p2align 4,,10
	.p2align 3
.L62:
	mov	esi, DWORD PTR TX_PIN_CFG_PA_PE_A1_EN[rip]
	xor	edx, edx
	cmp	DWORD PTR [rbx], 14
	mov	rdi, r13
	setg	dl
	call	rt2x00_set_field32@PLT
	xor	edx, edx
	mov	esi, DWORD PTR TX_PIN_CFG_PA_PE_G1_EN[rip]
	cmp	DWORD PTR [rbx], 14
	setle	dl
	mov	rdi, r13
	call	rt2x00_set_field32@PLT
	jmp	.L27
	.p2align 4,,10
	.p2align 3
.L59:
	mov	esi, 133
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	jne	.L15
	mov	esi, 132
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	jne	.L15
	mov	esi, 131
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	jne	.L15
	mov	esi, 130
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	jne	.L15
	mov	esi, 129
	mov	rdi, rbp
	call	rt2x00_rf@PLT
	test	rax, rax
	jne	.L15
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L60:
	mov	esi, DWORD PTR RT5392[rip]
	mov	rdi, rbp
	call	rt2x00_rt@PLT
	test	rax, rax
	jne	.L20
	mov	edi, DWORD PTR CAPABILITY_EXTERNAL_LNA_BG[rip]
	mov	rsi, r15
	call	test_bit@PLT
	test	rax, rax
	je	.L22
	mov	rdi, rbp
	mov	edx, 98
	mov	esi, 82
	call	rt2800_bbp_write@PLT
	mov	edx, 70
	mov	esi, 75
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L36:
	mov	rdi, rbp
	mov	edx, 22
	mov	esi, 69
	call	rt2800_bbp_write@PLT
	mov	rdi, rbp
	mov	edx, 8
	mov	esi, 70
	call	rt2800_bbp_write@PLT
	mov	edx, 17
	mov	esi, 73
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L35
.L4:
	mov	rcx, r12
	mov	rdx, rbx
	mov	rsi, r14
	mov	rdi, rbp
	call	rt2800_config_channel_rf2xxx@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L22:
	mov	rdi, rbp
	mov	edx, 132
	mov	esi, 82
	call	rt2800_bbp_write@PLT
	mov	edx, 80
	mov	esi, 75
	mov	rdi, rbp
	call	rt2800_bbp_write@PLT
	jmp	.L20
.L68:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	rt2800_config_channel, .-rt2800_config_channel
	.comm	TX_PIN_CFG_TRSW_EN,4,4
	.comm	TX_PIN_CFG_RFTR_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_G1_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_G0_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_A1_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_A0_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_G1_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_G0_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_A1_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_A0_EN,4,4
	.comm	TX_PIN_CFG,4,4
	.comm	TX_BAND_CFG_HT40_MINUS,4,4
	.comm	TX_BAND_CFG_BG,4,4
	.comm	TX_BAND_CFG_A,4,4
	.comm	TX_BAND_CFG,4,4
	.comm	RT5592,4,4
	.comm	RT5392,4,4
	.comm	RT5390,4,4
	.comm	RT3572,4,4
	.comm	RT3352,4,4
	.comm	RT2860,4,4
	.comm	RFCSR3_VCOCAL_EN,4,4
	.comm	RFCSR30_TX_H20M,4,4
	.comm	RFCSR30_RX_H20M,4,4
	.comm	REV_RT2860C,4,4
	.comm	CH_IDLE_STA,4,4
	.comm	CH_BUSY_STA_SEC,4,4
	.comm	CH_BUSY_STA,4,4
	.comm	CAPABILITY_EXTERNAL_LNA_BG,4,4
	.comm	CAPABILITY_EXTERNAL_LNA_A,4,4
	.comm	CAPABILITY_BT_COEXIST,4,4
	.comm	BBP4_BANDWIDTH,4,4
	.comm	BBP49_UPDATE_FLAG,4,4
	.comm	BBP3_HT40_MINUS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rt2800lib.c_rt2800_config_channel.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rt2800_config_channel, %function
rt2800_config_channel:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r6, r3
	ldr	r3, [r2]
	sub	sp, sp, #28
	cmp	r3, #14
	ldr	r3, .L72
	mov	r4, r0
	mov	r5, r2
	mov	r7, r1
	ldr	r3, [r3]
	str	r3, [sp, #20]
	mov	r3,#0
	ldr	r0, [r6, #4]
	bgt	.L2
	bl	TXPOWER_G_TO_DEV
	str	r0, [r6, #4]
	ldr	r0, [r6]
	bl	TXPOWER_G_TO_DEV
	str	r0, [r6]
.L3:
	ldr	r3, [r4, #16]
	sub	r3, r3, #128
	cmp	r3, #13
	ldrls	pc, [pc, r3, asl #2]
	b	.L4
.L6:
	.word	.L11
	.word	.L10
	.word	.L10
	.word	.L10
	.word	.L10
	.word	.L10
	.word	.L9
	.word	.L5
	.word	.L8
	.word	.L7
	.word	.L5
	.word	.L5
	.word	.L5
	.word	.L5
.L2:
	bl	TXPOWER_A_TO_DEV
	str	r0, [r6, #4]
	ldr	r0, [r6]
	bl	TXPOWER_A_TO_DEV
	str	r0, [r6]
	b	.L3
.L5:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf3xxx
.L12:
	mov	r1, #136
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	bne	.L15
	mov	r1, #134
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	beq	.L63
.L15:
	mov	r1, #30
	add	r2, sp, #16
	mov	r0, r4
	bl	rt2800_rfcsr_read
	ldr	r3, .L72+4
	mov	r2, #0
	ldr	r1, [r3]
	add	r0, sp, #16
	bl	rt2x00_set_field8
	ldr	r3, .L72+8
	mov	r2, #0
	ldr	r1, [r3]
	add	r0, sp, #16
	bl	rt2x00_set_field8
	mov	r1, #30
	ldr	r2, [sp, #16]
	mov	r0, r4
	bl	rt2800_rfcsr_write
	mov	r1, #3
	add	r2, sp, #16
	mov	r0, r4
	bl	rt2800_rfcsr_read
	ldr	r3, .L72+12
	mov	r2, #1
	ldr	r1, [r3]
	add	r0, sp, #16
	bl	rt2x00_set_field8
	mov	r1, #3
	mov	r0, r4
	ldr	r2, [sp, #16]
	bl	rt2800_rfcsr_write
.L14:
	ldr	r9, .L72+16
	mov	r0, r4
	ldr	r1, [r9]
	bl	rt2x00_rt
	subs	r6, r0, #0
	beq	.L16
	mov	r2, #0
	mov	r1, #27
	mov	r0, r4
	bl	rt2800_bbp_write
	ldr	r2, [r4]
	mov	r1, #66
	add	r2, r2, #38
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #32
	mov	r1, #27
	mov	r0, r4
	bl	rt2800_bbp_write
	ldr	r2, [r4]
	mov	r1, #66
	mov	r0, r4
	add	r2, r2, #38
	bl	rt2800_bbp_write
.L17:
	ldr	r3, [r5]
	add	r10, r4, #4
	cmp	r3, #14
	bgt	.L18
	ldr	r3, .L72+20
	mov	r0, r4
	ldr	r1, [r3]
	bl	rt2x00_rt
	cmp	r0, #0
	beq	.L19
.L61:
	ldr	r8, .L72+24
.L20:
	ldr	r6, .L72+28
	add	r2, sp, #4
	ldr	r1, [r6]
	mov	r0, r4
	bl	rt2800_register_read
	ldr	r3, .L72+32
	mov	r0, r7
	ldr	fp, [r3]
	bl	conf_is_ht40_minus
	mov	r1, fp
	mov	r2, r0
	add	r0, sp, #4
	bl	rt2x00_set_field32
	ldr	r2, [r5]
	ldr	r3, .L72+36
	cmp	r2, #14
	movle	r2, #0
	movgt	r2, #1
	ldr	r1, [r3]
	add	r0, sp, #4
	bl	rt2x00_set_field32
	ldr	r2, [r5]
	ldr	r3, .L72+40
	cmp	r2, #14
	movgt	r2, #0
	movle	r2, #1
	ldr	r1, [r3]
	add	r0, sp, #4
	bl	rt2x00_set_field32
	ldr	r1, [r6]
	ldr	r2, [sp, #4]
	mov	r0, r4
	bl	rt2800_register_write
	mov	r0, r4
	ldr	r1, [r8]
	bl	rt2x00_rt
	cmp	r0, #0
	bne	.L64
.L26:
	mov	r2, #0
	ldr	r3, [r4, #8]
	str	r2, [sp, #8]
	cmp	r3, #2
	addne	r6, sp, #8
	beq	.L65
.L27:
	ldr	r3, [r4, #12]
	cmp	r3, #2
	beq	.L66
.L28:
	ldr	r3, .L72+44
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r3, .L72+48
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r3, .L72+52
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r3, .L72+56
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r3, .L72+60
	mov	r1, r10
	ldr	r0, [r3]
	bl	test_bit
	cmp	r0, #0
	beq	.L29
	ldr	r3, .L72+64
	mov	r2, #1
	mov	r0, r6
	ldr	r1, [r3]
	bl	rt2x00_set_field32
.L30:
	ldr	r2, [r5]
	ldr	r3, .L72+68
	cmp	r2, #14
	movle	r2, #0
	movgt	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r3, .L72+72
	ldr	r2, [sp, #8]
	ldr	r1, [r3]
	mov	r0, r4
	bl	rt2800_register_write
	mov	r0, r4
	ldr	r1, [r8]
	bl	rt2x00_rt
	cmp	r0, #0
	bne	.L67
.L31:
	ldr	r3, .L72+76
	mov	r0, r4
	ldr	r1, [r3]
	bl	rt2x00_rt
	cmp	r0, #0
	bne	.L68
.L32:
	mov	r1, #4
	add	r2, sp, #12
	mov	r0, r4
	bl	rt2800_bbp_read
	ldr	r3, .L72+80
	mov	r0, r7
	ldr	r5, [r3]
	bl	conf_is_ht40
	mov	r1, r5
	lsl	r2, r0, #1
	add	r0, sp, #12
	bl	rt2x00_set_field8
	mov	r1, #4
	ldr	r2, [sp, #12]
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r1, #3
	add	r2, sp, #12
	mov	r0, r4
	bl	rt2800_bbp_read
	ldr	r3, .L72+84
	mov	r0, r7
	ldr	r5, [r3]
	bl	conf_is_ht40_minus
	mov	r1, r5
	mov	r2, r0
	add	r0, sp, #12
	bl	rt2x00_set_field8
	mov	r1, #3
	ldr	r2, [sp, #12]
	mov	r0, r4
	bl	rt2800_bbp_write
	ldr	r3, .L72+88
	ldr	r2, .L72+92
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, [r3]
	bl	rt2x00_rt_rev
	cmp	r0, #0
	bne	.L69
.L35:
	mov	r0, #1
	bl	msleep
	ldr	r3, .L72+96
	add	r2, sp, #4
	ldr	r1, [r3]
	mov	r0, r4
	bl	rt2800_register_read
	ldr	r3, .L72+100
	add	r2, sp, #4
	ldr	r1, [r3]
	mov	r0, r4
	bl	rt2800_register_read
	ldr	r3, .L72+104
	add	r2, sp, #4
	ldr	r1, [r3]
	mov	r0, r4
	bl	rt2800_register_read
	mov	r0, r4
	ldr	r1, [r9]
	bl	rt2x00_rt
	cmp	r0, #0
	bne	.L70
.L1:
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, [sp, #20]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L71
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L10:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf53xx
	b	.L12
.L8:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf3290
	b	.L12
.L7:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf3052
	b	.L12
.L11:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf55xx
	b	.L12
.L9:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf3322
	b	.L12
.L29:
	ldr	r2, [r5]
	ldr	r3, .L72+64
	cmp	r2, #14
	movgt	r2, #0
	movle	r2, #1
	mov	r0, r6
	ldr	r1, [r3]
	bl	rt2x00_set_field32
	b	.L30
.L18:
	ldr	r8, .L72+24
	mov	r0, r4
	ldr	r1, [r8]
	bl	rt2x00_rt
	cmp	r0, #0
	movne	r2, #148
	moveq	r2, #242
	mov	r1, #82
	mov	r0, r4
	bl	rt2800_bbp_write
	ldr	r3, .L72+108
	mov	r1, r10
	ldr	r0, [r3]
	bl	test_bit
	cmp	r0, #0
	movne	r2, #70
	moveq	r2, #80
	mov	r1, #75
	mov	r0, r4
	bl	rt2800_bbp_write
	b	.L20
.L16:
	ldr	r2, [r4]
	mov	r1, #62
	mov	r0, r4
	rsb	r2, r2, #55
	bl	rt2800_bbp_write
	ldr	r2, [r4]
	mov	r1, #63
	mov	r0, r4
	rsb	r2, r2, #55
	bl	rt2800_bbp_write
	ldr	r2, [r4]
	mov	r1, #64
	mov	r0, r4
	rsb	r2, r2, #55
	bl	rt2800_bbp_write
	mov	r2, r6
	mov	r1, #86
	mov	r0, r4
	bl	rt2800_bbp_write
	b	.L17
.L64:
	mov	r2, #0
	mov	r1, #8
	mov	r0, r4
	bl	rt2800_rfcsr_write
	b	.L26
.L69:
	mov	r0, r7
	bl	conf_is_ht40
	cmp	r0, #0
	beq	.L36
	mov	r2, #26
	mov	r1, #69
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #10
	mov	r1, #70
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #22
	mov	r1, #73
	mov	r0, r4
	bl	rt2800_bbp_write
	b	.L35
.L68:
	mov	r2, #141
	mov	r1, #195
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r0, r7
	bl	conf_is_ht40
	cmp	r0, #0
	movne	r2, #16
	moveq	r2, #26
	mov	r1, #196
	mov	r0, r4
	bl	rt2800_bbp_write
	ldr	r2, [r5]
	ldr	r3, [r4]
	cmp	r2, #15
	movlt	r2, #28
	movge	r2, #36
	mov	r1, #66
	add	r2, r2, r3, lsl #1
	mov	r0, r4
	str	r2, [sp, #4]
	bl	rt2800_bbp_write_with_rx_chain
	mov	r0, r4
	ldr	r1, [r5]
	bl	rt2800_iq_calibrate
	b	.L32
.L70:
	add	r2, sp, #12
	mov	r1, #49
	mov	r0, r4
	bl	rt2800_bbp_read
	ldr	r3, .L72+112
	mov	r2, #0
	ldr	r1, [r3]
	add	r0, sp, #12
	bl	rt2x00_set_field8
	mov	r0, r4
	mov	r1, #49
	ldr	r2, [sp, #12]
	bl	rt2800_bbp_write
	b	.L1
.L67:
	mov	r2, #128
	mov	r1, #8
	mov	r0, r4
	bl	rt2800_rfcsr_write
	b	.L31
.L66:
	ldr	r3, .L72+116
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r3, .L72+120
	mov	r2, #1
	mov	r0, r6
	ldr	r1, [r3]
	bl	rt2x00_set_field32
	b	.L28
.L65:
	ldr	r2, [r5]
	ldr	r3, .L72+124
	cmp	r2, #14
	add	r6, sp, #8
	movle	r2, #0
	movgt	r2, #1
	ldr	r1, [r3]
	mov	r0, r6
	bl	rt2x00_set_field32
	ldr	r2, [r5]
	ldr	r3, .L72+128
	cmp	r2, #14
	mov	r0, r6
	movgt	r2, #0
	movle	r2, #1
	ldr	r1, [r3]
	bl	rt2x00_set_field32
	b	.L27
.L63:
	mov	r1, #133
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	bne	.L15
	mov	r1, #132
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	bne	.L15
	mov	r1, #131
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	bne	.L15
	mov	r1, #130
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	bne	.L15
	mov	r1, #129
	mov	r0, r4
	bl	rt2x00_rf
	cmp	r0, #0
	bne	.L15
	b	.L14
.L19:
	ldr	r3, .L72+132
	mov	r0, r4
	ldr	r1, [r3]
	bl	rt2x00_rt
	cmp	r0, #0
	bne	.L61
	ldr	r3, .L72+136
	mov	r1, r10
	ldr	r0, [r3]
	bl	test_bit
	cmp	r0, #0
	beq	.L22
	mov	r2, #98
	mov	r1, #82
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #70
	mov	r1, #75
	mov	r0, r4
	bl	rt2800_bbp_write
	ldr	r8, .L72+24
	b	.L20
.L36:
	mov	r2, #22
	mov	r1, #69
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #8
	mov	r1, #70
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #17
	mov	r1, #73
	mov	r0, r4
	bl	rt2800_bbp_write
	b	.L35
.L22:
	mov	r2, #132
	mov	r1, #82
	mov	r0, r4
	bl	rt2800_bbp_write
	mov	r2, #80
	mov	r1, #75
	mov	r0, r4
	bl	rt2800_bbp_write
	b	.L61
.L71:
	bl	__stack_chk_fail
.L4:
	mov	r3, r6
	mov	r2, r5
	mov	r1, r7
	mov	r0, r4
	bl	rt2800_config_channel_rf2xxx
	b	.L12
.L73:
	.align	2
.L72:
	.word	.LC0
	.word	RFCSR30_TX_H20M
	.word	RFCSR30_RX_H20M
	.word	RFCSR3_VCOCAL_EN
	.word	RT3352
	.word	RT5390
	.word	RT3572
	.word	TX_BAND_CFG
	.word	TX_BAND_CFG_HT40_MINUS
	.word	TX_BAND_CFG_A
	.word	TX_BAND_CFG_BG
	.word	TX_PIN_CFG_LNA_PE_A0_EN
	.word	TX_PIN_CFG_LNA_PE_G0_EN
	.word	TX_PIN_CFG_RFTR_EN
	.word	TX_PIN_CFG_TRSW_EN
	.word	CAPABILITY_BT_COEXIST
	.word	TX_PIN_CFG_PA_PE_G0_EN
	.word	TX_PIN_CFG_PA_PE_A0_EN
	.word	TX_PIN_CFG
	.word	RT5592
	.word	BBP4_BANDWIDTH
	.word	BBP3_HT40_MINUS
	.word	RT2860
	.word	REV_RT2860C
	.word	CH_IDLE_STA
	.word	CH_BUSY_STA
	.word	CH_BUSY_STA_SEC
	.word	CAPABILITY_EXTERNAL_LNA_A
	.word	BBP49_UPDATE_FLAG
	.word	TX_PIN_CFG_LNA_PE_A1_EN
	.word	TX_PIN_CFG_LNA_PE_G1_EN
	.word	TX_PIN_CFG_PA_PE_A1_EN
	.word	TX_PIN_CFG_PA_PE_G1_EN
	.word	RT5392
	.word	CAPABILITY_EXTERNAL_LNA_BG
	.size	rt2800_config_channel, .-rt2800_config_channel
	.comm	TX_PIN_CFG_TRSW_EN,4,4
	.comm	TX_PIN_CFG_RFTR_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_G1_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_G0_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_A1_EN,4,4
	.comm	TX_PIN_CFG_PA_PE_A0_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_G1_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_G0_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_A1_EN,4,4
	.comm	TX_PIN_CFG_LNA_PE_A0_EN,4,4
	.comm	TX_PIN_CFG,4,4
	.comm	TX_BAND_CFG_HT40_MINUS,4,4
	.comm	TX_BAND_CFG_BG,4,4
	.comm	TX_BAND_CFG_A,4,4
	.comm	TX_BAND_CFG,4,4
	.comm	RT5592,4,4
	.comm	RT5392,4,4
	.comm	RT5390,4,4
	.comm	RT3572,4,4
	.comm	RT3352,4,4
	.comm	RT2860,4,4
	.comm	RFCSR3_VCOCAL_EN,4,4
	.comm	RFCSR30_TX_H20M,4,4
	.comm	RFCSR30_RX_H20M,4,4
	.comm	REV_RT2860C,4,4
	.comm	CH_IDLE_STA,4,4
	.comm	CH_BUSY_STA_SEC,4,4
	.comm	CH_BUSY_STA,4,4
	.comm	CAPABILITY_EXTERNAL_LNA_BG,4,4
	.comm	CAPABILITY_EXTERNAL_LNA_A,4,4
	.comm	CAPABILITY_BT_COEXIST,4,4
	.comm	BBP4_BANDWIDTH,4,4
	.comm	BBP49_UPDATE_FLAG,4,4
	.comm	BBP3_HT40_MINUS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
