	.file	"extr_fsl_lpuart.c_lpuart_setup_watermark.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	lpuart_setup_watermark, @function
lpuart_setup_watermark:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	rdi, QWORD PTR UARTCR2[rip]
	add	rdi, QWORD PTR [rbx]
	call	readb@PLT
	movzx	edi, BYTE PTR UARTCR2_TIE[rip]
	or	dil, BYTE PTR UARTCR2_TCIE[rip]
	or	dil, BYTE PTR UARTCR2_TE[rip]
	or	dil, BYTE PTR UARTCR2_RIE[rip]
	mov	ebp, eax
	or	dil, BYTE PTR UARTCR2_RE[rip]
	mov	rsi, QWORD PTR UARTCR2[rip]
	not	edi
	add	rsi, QWORD PTR [rbx]
	and	edi, eax
	movzx	edi, dil
	call	writeb@PLT
	mov	rdi, QWORD PTR UARTPFIFO[rip]
	add	rdi, QWORD PTR [rbx]
	call	readb@PLT
	movzx	edi, BYTE PTR UARTPFIFO_TXFE[rip]
	or	dil, BYTE PTR UARTPFIFO_RXFE[rip]
	or	edi, eax
	mov	rsi, QWORD PTR UARTPFIFO[rip]
	add	rsi, QWORD PTR [rbx]
	movzx	edi, dil
	call	writeb@PLT
	movzx	edi, BYTE PTR UARTCFIFO_TXFLUSH[rip]
	or	dil, BYTE PTR UARTCFIFO_RXFLUSH[rip]
	mov	rsi, QWORD PTR UARTCFIFO[rip]
	movzx	edi, dil
	add	rsi, QWORD PTR [rbx]
	call	writeb@PLT
	mov	rdi, QWORD PTR UARTSR1[rip]
	add	rdi, QWORD PTR [rbx]
	call	readb@PLT
	test	DWORD PTR UARTSR1_RDRF[rip], eax
	jne	.L8
.L2:
	mov	rsi, QWORD PTR UARTTWFIFO[rip]
	xor	edi, edi
	add	rsi, QWORD PTR [rbx]
	call	writeb@PLT
	mov	rsi, QWORD PTR UARTRWFIFO[rip]
	mov	edi, 1
	add	rsi, QWORD PTR [rbx]
	call	writeb@PLT
	mov	rsi, QWORD PTR UARTCR2[rip]
	add	rsi, QWORD PTR [rbx]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	movzx	edi, bpl
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	writeb@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	mov	rdi, QWORD PTR UARTDR[rip]
	add	rdi, QWORD PTR [rbx]
	call	readb@PLT
	movzx	edi, BYTE PTR UARTSFIFO_RXUF[rip]
	mov	rsi, QWORD PTR UARTSFIFO[rip]
	add	rsi, QWORD PTR [rbx]
	call	writeb@PLT
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	lpuart_setup_watermark, .-lpuart_setup_watermark
	.comm	UARTTWFIFO,8,8
	.comm	UARTSR1_RDRF,4,4
	.comm	UARTSR1,8,8
	.comm	UARTSFIFO_RXUF,1,1
	.comm	UARTSFIFO,8,8
	.comm	UARTRWFIFO,8,8
	.comm	UARTPFIFO_TXFE,1,1
	.comm	UARTPFIFO_RXFE,1,1
	.comm	UARTPFIFO,8,8
	.comm	UARTDR,8,8
	.comm	UARTCR2_TIE,1,1
	.comm	UARTCR2_TE,1,1
	.comm	UARTCR2_TCIE,1,1
	.comm	UARTCR2_RIE,1,1
	.comm	UARTCR2_RE,1,1
	.comm	UARTCR2,8,8
	.comm	UARTCFIFO_TXFLUSH,1,1
	.comm	UARTCFIFO_RXFLUSH,1,1
	.comm	UARTCFIFO,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_fsl_lpuart.c_lpuart_setup_watermark.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	lpuart_setup_watermark, %function
lpuart_setup_watermark:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r5, .L9
	mov	r4, r0
	ldr	r3, [r5]
	ldr	r0, [r0]
	ldr	r6, .L9+4
	add	r0, r0, r3
	bl	readb
	mov	r2, r0
	ldr	r1, .L9+8
	ldr	r3, .L9+12
	ldrb	r0, [r1]	@ zero_extendqisi2
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	ip, .L9+16
	ldr	r1, .L9+20
	ldrb	ip, [ip]	@ zero_extendqisi2
	orr	r3, r3, r0
	ldr	r0, .L9+24
	ldrb	r1, [r1]	@ zero_extendqisi2
	ldrb	r0, [r0]	@ zero_extendqisi2
	orr	r3, r3, ip
	orr	r3, r3, r1
	ldr	ip, [r4]
	ldr	r1, [r5]
	orr	r3, r3, r0
	bic	r3, r2, r3
	add	r1, ip, r1
	and	r0, r3, #255
	and	r7, r2, #255
	bl	writeb
	ldr	r3, [r6]
	ldr	r0, [r4]
	add	r0, r0, r3
	bl	readb
	ldr	r2, .L9+28
	ldr	r3, .L9+32
	ldrb	ip, [r2]	@ zero_extendqisi2
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [r6]
	orr	r3, r3, ip
	ldr	r1, [r4]
	orr	r0, r3, r0
	add	r1, r1, r2
	and	r0, r0, #255
	bl	writeb
	ldr	r2, .L9+36
	ldr	r0, .L9+40
	ldr	r3, .L9+44
	ldr	r2, [r2]
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r1, [r4]
	ldrb	r0, [r0]	@ zero_extendqisi2
	add	r1, r1, r2
	orr	r0, r0, r3
	bl	writeb
	ldr	r3, .L9+48
	ldr	r0, [r4]
	ldr	r3, [r3]
	add	r0, r0, r3
	bl	readb
	ldr	r3, .L9+52
	ldr	r3, [r3]
	tst	r0, r3
	bne	.L8
.L2:
	ldr	r3, .L9+56
	ldr	r1, [r4]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writeb
	ldr	r3, .L9+60
	ldr	r1, [r4]
	ldr	r3, [r3]
	mov	r0, #1
	add	r1, r1, r3
	bl	writeb
	ldr	r1, [r4]
	ldr	r3, [r5]
	mov	r0, r7
	pop	{r4, r5, r6, r7, r8, lr}
	add	r1, r1, r3
	b	writeb
.L8:
	ldr	r3, .L9+64
	ldr	r0, [r4]
	ldr	r3, [r3]
	add	r0, r0, r3
	bl	readb
	ldr	r3, .L9+68
	ldr	r1, [r4]
	ldr	r2, [r3]
	ldr	r3, .L9+72
	add	r1, r1, r2
	ldrb	r0, [r3]	@ zero_extendqisi2
	bl	writeb
	b	.L2
.L10:
	.align	2
.L9:
	.word	UARTCR2
	.word	UARTPFIFO
	.word	UARTCR2_TCIE
	.word	UARTCR2_TIE
	.word	UARTCR2_TE
	.word	UARTCR2_RIE
	.word	UARTCR2_RE
	.word	UARTPFIFO_RXFE
	.word	UARTPFIFO_TXFE
	.word	UARTCFIFO
	.word	UARTCFIFO_TXFLUSH
	.word	UARTCFIFO_RXFLUSH
	.word	UARTSR1
	.word	UARTSR1_RDRF
	.word	UARTTWFIFO
	.word	UARTRWFIFO
	.word	UARTDR
	.word	UARTSFIFO
	.word	UARTSFIFO_RXUF
	.size	lpuart_setup_watermark, .-lpuart_setup_watermark
	.comm	UARTTWFIFO,4,4
	.comm	UARTSR1_RDRF,4,4
	.comm	UARTSR1,4,4
	.comm	UARTSFIFO_RXUF,1,1
	.comm	UARTSFIFO,4,4
	.comm	UARTRWFIFO,4,4
	.comm	UARTPFIFO_TXFE,1,1
	.comm	UARTPFIFO_RXFE,1,1
	.comm	UARTPFIFO,4,4
	.comm	UARTDR,4,4
	.comm	UARTCR2_TIE,1,1
	.comm	UARTCR2_TE,1,1
	.comm	UARTCR2_TCIE,1,1
	.comm	UARTCR2_RIE,1,1
	.comm	UARTCR2_RE,1,1
	.comm	UARTCR2,4,4
	.comm	UARTCFIFO_TXFLUSH,1,1
	.comm	UARTCFIFO_RXFLUSH,1,1
	.comm	UARTCFIFO,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
