	.file	"extr_rt5659.c_rt5659_set_bias_level.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"failed to enable MCLK: %d\n"
	.text
	.p2align 4
	.type	rt5659_set_bias_level, @function
rt5659_set_bias_level:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebx, esi
	call	snd_soc_component_get_dapm@PLT
	mov	rdi, r12
	mov	r13, rax
	call	snd_soc_component_get_drvdata@PLT
	mov	rbp, rax
	cmp	ebx, 129
	je	.L2
	cmp	ebx, 130
	je	.L3
	xor	r14d, r14d
	cmp	ebx, 128
	je	.L4
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r14d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edx, DWORD PTR RT5659_DIG_GATE_CTRL[rip]
	mov	edi, DWORD PTR 4[rax]
	xor	r14d, r14d
	mov	esi, DWORD PTR RT5659_DIG_MISC[rip]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	edx, DWORD PTR RT5659_PWR_LDO[rip]
	mov	edi, DWORD PTR 4[rbp]
	mov	esi, DWORD PTR RT5659_PWR_DIG_1[rip]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	edi, DWORD PTR 4[rbp]
	mov	esi, DWORD PTR RT5659_PWR_ANLG_1[rip]
	mov	edx, DWORD PTR RT5659_PWR_MB[rip]
	or	edx, DWORD PTR RT5659_PWR_VREF1[rip]
	or	edx, DWORD PTR RT5659_PWR_VREF2[rip]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	edi, 20
	call	msleep@PLT
	mov	edx, DWORD PTR RT5659_PWR_FV1[rip]
	mov	edi, DWORD PTR 4[rbp]
	or	edx, DWORD PTR RT5659_PWR_FV2[rip]
	mov	esi, DWORD PTR RT5659_PWR_ANLG_1[rip]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r14d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	cmp	DWORD PTR 0[r13], 130
	jne	.L1
	mov	edi, DWORD PTR [rax]
	call	clk_prepare_enable@PLT
	mov	r14d, eax
	test	eax, eax
	je	.L1
	mov	edi, DWORD PTR [r12]
	mov	edx, eax
	lea	rsi, .LC0[rip]
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L3:
	mov	edi, DWORD PTR 4[rax]
	mov	edx, DWORD PTR RT5659_PWR_LDO[rip]
	xor	ecx, ecx
	xor	r14d, r14d
	mov	esi, DWORD PTR RT5659_PWR_DIG_1[rip]
	call	regmap_update_bits@PLT
	mov	edi, DWORD PTR 4[rbp]
	mov	ecx, DWORD PTR RT5659_PWR_MB[rip]
	mov	edx, DWORD PTR RT5659_PWR_VREF1[rip]
	or	ecx, DWORD PTR RT5659_PWR_VREF2[rip]
	mov	esi, DWORD PTR RT5659_PWR_ANLG_1[rip]
	or	edx, DWORD PTR RT5659_PWR_FV1[rip]
	or	edx, DWORD PTR RT5659_PWR_FV2[rip]
	or	edx, ecx
	call	regmap_update_bits@PLT
	mov	edi, DWORD PTR 4[rbp]
	mov	edx, DWORD PTR RT5659_DIG_GATE_CTRL[rip]
	xor	ecx, ecx
	mov	esi, DWORD PTR RT5659_DIG_MISC[rip]
	call	regmap_update_bits@PLT
	mov	edi, DWORD PTR 0[rbp]
	call	clk_disable_unprepare@PLT
	pop	rbx
	.cfi_def_cfa_offset 40
	mov	eax, r14d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	rt5659_set_bias_level, .-rt5659_set_bias_level
	.comm	RT5659_PWR_VREF2,4,4
	.comm	RT5659_PWR_VREF1,4,4
	.comm	RT5659_PWR_MB,4,4
	.comm	RT5659_PWR_LDO,4,4
	.comm	RT5659_PWR_FV2,4,4
	.comm	RT5659_PWR_FV1,4,4
	.comm	RT5659_PWR_DIG_1,4,4
	.comm	RT5659_PWR_ANLG_1,4,4
	.comm	RT5659_DIG_MISC,4,4
	.comm	RT5659_DIG_GATE_CTRL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rt5659.c_rt5659_set_bias_level.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"failed to enable MCLK: %d\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rt5659_set_bias_level, %function
rt5659_set_bias_level:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r1
	mov	r6, r0
	bl	snd_soc_component_get_dapm
	mov	r7, r0
	mov	r0, r6
	bl	snd_soc_component_get_drvdata
	cmp	r4, #129
	mov	r5, r0
	beq	.L2
	cmp	r4, #130
	beq	.L3
	cmp	r4, #128
	beq	.L4
.L6:
	mov	r4, #0
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, pc}
.L2:
	ldr	r3, .L12
	ldr	r2, .L12+4
	ldr	r3, [r3]
	ldr	r1, [r2]
	ldr	r0, [r0, #4]
	mov	r2, r3
	bl	regmap_update_bits
	ldr	r3, .L12+8
	ldr	r2, .L12+12
	ldr	r3, [r3]
	ldr	r1, [r2]
	ldr	r0, [r5, #4]
	mov	r2, r3
	bl	regmap_update_bits
	ldr	r3, .L12+16
	ldr	r1, .L12+20
	ldr	r2, .L12+24
	ldr	r1, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r4, .L12+28
	orr	r3, r3, r1
	orr	r3, r3, r2
	mov	r2, r3
	ldr	r1, [r4]
	ldr	r0, [r5, #4]
	bl	regmap_update_bits
	mov	r0, #20
	bl	msleep
	ldr	r1, [r4]
	mov	r4, #0
	ldr	r3, .L12+32
	ldr	r2, .L12+36
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r0, [r5, #4]
	orr	r3, r3, r2
	mov	r2, r3
	bl	regmap_update_bits
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, pc}
.L4:
	ldr	r3, [r7]
	cmp	r3, #130
	bne	.L6
	ldr	r0, [r0]
	bl	clk_prepare_enable
	subs	r4, r0, #0
	beq	.L1
	mov	r2, r4
	ldr	r0, [r6]
	ldr	r1, .L12+40
	bl	dev_err
	b	.L1
.L3:
	mov	r4, #0
	ldr	r3, .L12+12
	ldr	r2, .L12+8
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r3, #0
	ldr	r0, [r0, #4]
	bl	regmap_update_bits
	ldr	r1, .L12+16
	ldr	r2, .L12+20
	ldr	r3, .L12+24
	ldr	r0, [r1]
	ldr	r2, [r2]
	ldr	r1, .L12+32
	ldr	r3, [r3]
	ldr	lr, [r1]
	orr	r2, r0, r2
	ldr	ip, .L12+36
	orr	r1, r2, r3
	orr	r2, r1, lr
	ldr	ip, [ip]
	ldr	r1, .L12+28
	orr	r2, r2, ip
	orr	r3, r0, r3
	ldr	r1, [r1]
	ldr	r0, [r5, #4]
	bl	regmap_update_bits
	ldr	r3, .L12+4
	ldr	r2, .L12
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r3, #0
	ldr	r0, [r5, #4]
	bl	regmap_update_bits
	ldr	r0, [r5]
	bl	clk_disable_unprepare
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, pc}
.L13:
	.align	2
.L12:
	.word	RT5659_DIG_GATE_CTRL
	.word	RT5659_DIG_MISC
	.word	RT5659_PWR_LDO
	.word	RT5659_PWR_DIG_1
	.word	RT5659_PWR_MB
	.word	RT5659_PWR_VREF1
	.word	RT5659_PWR_VREF2
	.word	RT5659_PWR_ANLG_1
	.word	RT5659_PWR_FV1
	.word	RT5659_PWR_FV2
	.word	.LC0
	.size	rt5659_set_bias_level, .-rt5659_set_bias_level
	.comm	RT5659_PWR_VREF2,4,4
	.comm	RT5659_PWR_VREF1,4,4
	.comm	RT5659_PWR_MB,4,4
	.comm	RT5659_PWR_LDO,4,4
	.comm	RT5659_PWR_FV2,4,4
	.comm	RT5659_PWR_FV1,4,4
	.comm	RT5659_PWR_DIG_1,4,4
	.comm	RT5659_PWR_ANLG_1,4,4
	.comm	RT5659_DIG_MISC,4,4
	.comm	RT5659_DIG_GATE_CTRL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
