	.file	"extr_ixgbe_common.c_ixgbe_set_vfta_generic.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	ixgbe_set_vfta_generic
	.type	ixgbe_set_vfta_generic, @function
ixgbe_set_vfta_generic:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	r9d, DWORD PTR IXGBE_ERR_PARAM[rip]
	mov	DWORD PTR [rsp], edx
	cmp	esi, 4095
	jle	.L27
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r9d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L27:
	.cfi_restore_state
	mov	r14d, esi
	mov	rbp, rdi
	mov	ebx, ecx
	mov	r15d, 1
	sar	r14d, 5
	mov	ecx, esi
	mov	r12d, esi
	and	r14d, 127
	sal	r15d, cl
	mov	edi, r14d
	call	IXGBE_VFTA@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	r13d, eax
	test	ebx, ebx
	je	.L4
	test	r15d, eax
	jne	.L5
	or	r13d, r15d
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L4:
	test	r15d, eax
	jne	.L28
.L5:
	mov	esi, DWORD PTR IXGBE_VT_CTL[rip]
	mov	rdi, rbp
	call	IXGBE_READ_REG@PLT
	test	DWORD PTR IXGBE_VT_CTL_VT_ENABLE[rip], eax
	jne	.L29
.L25:
	xor	r9d, r9d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L28:
	not	r15d
	and	r13d, r15d
.L6:
	mov	esi, DWORD PTR IXGBE_VT_CTL[rip]
	mov	rdi, rbp
	call	IXGBE_READ_REG@PLT
	test	DWORD PTR IXGBE_VT_CTL_VT_ENABLE[rip], eax
	jne	.L30
.L12:
	mov	edi, r14d
	call	IXGBE_VFTA@PLT
	mov	edx, r13d
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	xor	r9d, r9d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L29:
	xor	r15d, r15d
.L17:
	mov	esi, r12d
	mov	rdi, rbp
	call	ixgbe_find_vlvf_slot@PLT
	mov	r9d, eax
	test	eax, eax
	js	.L1
	lea	r10d, [rax+rax]
	test	ebx, ebx
	je	.L7
	mov	ebx, DWORD PTR [rsp]
	cmp	ebx, 31
	jle	.L31
	add	r10d, 1
	mov	DWORD PTR 8[rsp], eax
	mov	edi, r10d
	mov	DWORD PTR 4[rsp], r10d
	call	IXGBE_VLVFB@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	edx, DWORD PTR [rsp]
	mov	r10d, DWORD PTR 4[rsp]
	sub	edx, 32
	mov	edi, r10d
	bts	eax, edx
	mov	ebx, eax
	call	IXGBE_VLVFB@PLT
	mov	edx, ebx
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	mov	r9d, DWORD PTR 8[rsp]
.L9:
	test	ebx, ebx
	je	.L15
	mov	edi, r9d
	or	r12d, DWORD PTR IXGBE_VLVF_VIEN[rip]
	call	IXGBE_VLVF@PLT
	mov	edx, r12d
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
.L13:
	test	r15d, r15d
	je	.L25
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L30:
	mov	r15d, 1
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L7:
	mov	ebx, DWORD PTR [rsp]
	lea	r11d, 1[r10]
	cmp	ebx, 31
	jle	.L32
	mov	edi, r11d
	mov	DWORD PTR 8[rsp], r10d
	mov	DWORD PTR 4[rsp], r11d
	mov	DWORD PTR 12[rsp], eax
	call	IXGBE_VLVFB@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	edx, DWORD PTR [rsp]
	mov	r11d, DWORD PTR 4[rsp]
	sub	edx, 32
	mov	edi, r11d
	btr	eax, edx
	mov	ebx, eax
	call	IXGBE_VLVFB@PLT
	mov	edx, ebx
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	mov	r10d, DWORD PTR 8[rsp]
	mov	edi, r10d
	call	IXGBE_VLVFB@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	r9d, DWORD PTR 12[rsp]
	or	ebx, eax
.L11:
	test	ebx, ebx
	je	.L15
	mov	edi, r9d
	or	r12d, DWORD PTR IXGBE_VLVF_VIEN[rip]
	call	IXGBE_VLVF@PLT
	mov	edx, r12d
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	xor	r9d, r9d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L32:
	mov	edi, r10d
	mov	DWORD PTR 4[rsp], r11d
	mov	DWORD PTR [rsp], r10d
	mov	DWORD PTR 8[rsp], eax
	call	IXGBE_VLVFB@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	r10d, DWORD PTR [rsp]
	btr	eax, ebx
	mov	edi, r10d
	mov	ebx, eax
	call	IXGBE_VLVFB@PLT
	mov	edx, ebx
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	mov	r11d, DWORD PTR 4[rsp]
	mov	edi, r11d
	call	IXGBE_VLVFB@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	r9d, DWORD PTR 8[rsp]
	or	ebx, eax
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L31:
	mov	edi, r10d
	mov	DWORD PTR [rsp], r10d
	mov	DWORD PTR 4[rsp], eax
	call	IXGBE_VLVFB@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	r10d, DWORD PTR [rsp]
	bts	eax, ebx
	mov	edi, r10d
	mov	ebx, eax
	call	IXGBE_VLVFB@PLT
	mov	edx, ebx
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	mov	r9d, DWORD PTR 4[rsp]
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L15:
	mov	edi, r9d
	call	IXGBE_VLVF@PLT
	xor	edx, edx
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	jmp	.L13
	.cfi_endproc
.LFE0:
	.size	ixgbe_set_vfta_generic, .-ixgbe_set_vfta_generic
	.comm	IXGBE_VT_CTL_VT_ENABLE,4,4
	.comm	IXGBE_VT_CTL,4,4
	.comm	IXGBE_VLVF_VIEN,4,4
	.comm	IXGBE_ERR_PARAM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ixgbe_common.c_ixgbe_set_vfta_generic.c"
	.text
	.align	2
	.global	ixgbe_set_vfta_generic
	.syntax unified
	.arm
	.fpu softvfp
	.type	ixgbe_set_vfta_generic, %function
ixgbe_set_vfta_generic:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	cmp	r1, #4096
	sub	sp, sp, #12
	blt	.L2
	ldr	r3, .L34
	ldr	r8, [r3]
.L1:
	mov	r0, r8
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	mov	r8, #1
	asr	r10, r1, #5
	and	r10, r10, #127
	mov	r5, r0
	mov	r6, r3
	mov	r0, r10
	and	r3, r1, #31
	mov	r4, r1
	mov	r7, r2
	lsl	r8, r8, r3
	bl	IXGBE_VFTA
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_READ_REG
	cmp	r6, #0
	mov	r9, r0
	beq	.L4
	tst	r8, r0
	orreq	r9, r0, r8
	beq	.L6
.L5:
	ldr	r3, .L34+4
	mov	r0, r5
	ldr	r1, [r3]
	bl	IXGBE_READ_REG
	ldr	r3, .L34+8
	ldr	r3, [r3]
	tst	r0, r3
	bne	.L29
.L27:
	mov	r8, #0
.L31:
	mov	r0, r8
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L4:
	tst	r8, r0
	bicne	r9, r0, r8
	beq	.L5
.L6:
	ldr	r3, .L34+4
	mov	r0, r5
	ldr	r1, [r3]
	bl	IXGBE_READ_REG
	ldr	r3, .L34+8
	ldr	r3, [r3]
	tst	r0, r3
	bne	.L30
.L12:
	mov	r0, r10
	bl	IXGBE_VFTA
	mov	r2, r9
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	mov	r8, #0
	b	.L31
.L30:
	mov	fp, #1
.L17:
	mov	r1, r4
	mov	r0, r5
	bl	ixgbe_find_vlvf_slot
	subs	r8, r0, #0
	blt	.L1
	cmp	r6, #0
	lsl	r6, r8, #1
	beq	.L7
	cmp	r7, #31
	ble	.L32
	add	r6, r6, #1
	mov	r0, r6
	bl	IXGBE_VLVFB
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_READ_REG
	mov	r2, #1
	mov	r3, r0
	mov	r0, r6
	sub	r7, r7, #32
	orr	r7, r3, r2, lsl r7
.L25:
	bl	IXGBE_VLVFB
	mov	r2, r7
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	cmp	r7, #0
	beq	.L15
	mov	r0, r8
	bl	IXGBE_VLVF
	ldr	r3, .L34+12
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r5
	orr	r2, r4, r2
	bl	IXGBE_WRITE_REG
.L13:
	cmp	fp, #0
	beq	.L27
	b	.L12
.L29:
	mov	fp, #0
	b	.L17
.L7:
	cmp	r7, #31
	add	r3, r6, #1
	ble	.L33
	mov	r0, r3
	str	r3, [sp, #4]
	bl	IXGBE_VLVFB
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_READ_REG
	mov	r2, #1
	mov	r1, r0
	ldr	r3, [sp, #4]
	sub	r7, r7, #32
	mov	r0, r3
	bic	r7, r1, r2, lsl r7
	bl	IXGBE_VLVFB
	mov	r2, r7
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	mov	r0, r6
.L26:
	bl	IXGBE_VLVFB
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_READ_REG
	orr	r0, r7, r0
	cmp	r0, #0
	beq	.L15
	mov	r0, r8
	bl	IXGBE_VLVF
	ldr	r3, .L34+12
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r5
	orr	r2, r4, r2
	bl	IXGBE_WRITE_REG
	mov	r8, #0
	b	.L1
.L33:
	mov	r0, r6
	str	r3, [sp, #4]
	bl	IXGBE_VLVFB
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_READ_REG
	mov	r1, #1
	mov	r2, r0
	mov	r0, r6
	bic	r7, r2, r1, lsl r7
	bl	IXGBE_VLVFB
	mov	r2, r7
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	ldr	r3, [sp, #4]
	mov	r0, r3
	b	.L26
.L32:
	mov	r0, r6
	bl	IXGBE_VLVFB
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_READ_REG
	mov	r3, #1
	mov	r2, r0
	mov	r0, r6
	orr	r7, r2, r3, lsl r7
	b	.L25
.L15:
	mov	r0, r8
	bl	IXGBE_VLVF
	mov	r2, #0
	mov	r1, r0
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	b	.L13
.L35:
	.align	2
.L34:
	.word	IXGBE_ERR_PARAM
	.word	IXGBE_VT_CTL
	.word	IXGBE_VT_CTL_VT_ENABLE
	.word	IXGBE_VLVF_VIEN
	.size	ixgbe_set_vfta_generic, .-ixgbe_set_vfta_generic
	.comm	IXGBE_VT_CTL_VT_ENABLE,4,4
	.comm	IXGBE_VT_CTL,4,4
	.comm	IXGBE_VLVF_VIEN,4,4
	.comm	IXGBE_ERR_PARAM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
