	.file	"extr_rv770.c_rv770_init_golden_registers.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	rv770_init_golden_registers, @function
rv770_init_golden_registers:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	eax, DWORD PTR [rdi]
	mov	rbp, rdi
	cmp	eax, 130
	je	.L2
	jg	.L3
	cmp	eax, 128
	je	.L4
	cmp	eax, 129
	jne	.L1
	mov	edi, DWORD PTR rv740_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv740_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR rv740_mgcg_init[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv740_mgcg_init[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	edx, eax
	jmp	radeon_program_register_sequence@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	cmp	eax, 131
	jne	.L1
	mov	edi, DWORD PTR r7xx_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR r7xx_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR r7xx_golden_dyn_gpr_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR r7xx_golden_dyn_gpr_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR rv710_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv710_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR rv710_mgcg_init[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv710_mgcg_init[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	edx, eax
	jmp	radeon_program_register_sequence@PLT
	.p2align 4,,10
	.p2align 3
.L1:
	.cfi_restore_state
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edi, DWORD PTR r7xx_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR r7xx_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR r7xx_golden_dyn_gpr_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR r7xx_golden_dyn_gpr_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR rv730_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv730_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR rv730_mgcg_init[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv730_mgcg_init[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	edx, eax
	jmp	radeon_program_register_sequence@PLT
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	mov	edi, DWORD PTR r7xx_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR r7xx_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	edi, DWORD PTR r7xx_golden_dyn_gpr_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR r7xx_golden_dyn_gpr_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	mov	rax, QWORD PTR 8[rbp]
	cmp	DWORD PTR [rax], 39246
	je	.L12
	mov	edi, DWORD PTR rv770_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv770_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
.L9:
	mov	edi, DWORD PTR rv770_mgcg_init[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv770_mgcg_init[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	edx, eax
	jmp	radeon_program_register_sequence@PLT
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	edi, DWORD PTR rv770ce_golden_registers[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR rv770ce_golden_registers[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	radeon_program_register_sequence@PLT
	jmp	.L9
	.cfi_endproc
.LFE0:
	.size	rv770_init_golden_registers, .-rv770_init_golden_registers
	.comm	rv770ce_golden_registers,4,4
	.comm	rv770_mgcg_init,4,4
	.comm	rv770_golden_registers,4,4
	.comm	rv740_mgcg_init,4,4
	.comm	rv740_golden_registers,4,4
	.comm	rv730_mgcg_init,4,4
	.comm	rv730_golden_registers,4,4
	.comm	rv710_mgcg_init,4,4
	.comm	rv710_golden_registers,4,4
	.comm	r7xx_golden_registers,4,4
	.comm	r7xx_golden_dyn_gpr_registers,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rv770.c_rv770_init_golden_registers.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rv770_init_golden_registers, %function
rv770_init_golden_registers:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r0]
	push	{r4, r5, r6, lr}
	sub	r3, r3, #128
	mov	r4, r0
	cmp	r3, #3
	ldrls	pc, [pc, r3, asl #2]
	b	.L1
.L4:
	.word	.L7
	.word	.L6
	.word	.L5
	.word	.L3
.L3:
	ldr	r3, .L14
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+4
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+8
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+12
.L12:
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	pop	{r4, r5, r6, lr}
	b	radeon_program_register_sequence
.L7:
	ldr	r3, .L14
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+4
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r2, [r4, #4]
	ldr	r3, .L14+16
	ldr	r2, [r2]
	cmp	r2, r3
	ldreq	r3, .L14+20
	ldrne	r3, .L14+24
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+28
	b	.L12
.L6:
	ldr	r3, .L14+32
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+36
	b	.L12
.L5:
	ldr	r3, .L14
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+4
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+40
	ldr	r5, [r3]
	mov	r0, r5
	bl	ARRAY_SIZE
	mov	r1, r5
	mov	r2, r0
	mov	r0, r4
	bl	radeon_program_register_sequence
	ldr	r3, .L14+44
	b	.L12
.L1:
	pop	{r4, r5, r6, pc}
.L15:
	.align	2
.L14:
	.word	r7xx_golden_registers
	.word	r7xx_golden_dyn_gpr_registers
	.word	rv710_golden_registers
	.word	rv710_mgcg_init
	.word	39246
	.word	rv770ce_golden_registers
	.word	rv770_golden_registers
	.word	rv770_mgcg_init
	.word	rv740_golden_registers
	.word	rv740_mgcg_init
	.word	rv730_golden_registers
	.word	rv730_mgcg_init
	.size	rv770_init_golden_registers, .-rv770_init_golden_registers
	.comm	rv770ce_golden_registers,4,4
	.comm	rv770_mgcg_init,4,4
	.comm	rv770_golden_registers,4,4
	.comm	rv740_mgcg_init,4,4
	.comm	rv740_golden_registers,4,4
	.comm	rv730_mgcg_init,4,4
	.comm	rv730_golden_registers,4,4
	.comm	rv710_mgcg_init,4,4
	.comm	rv710_golden_registers,4,4
	.comm	r7xx_golden_registers,4,4
	.comm	r7xx_golden_dyn_gpr_registers,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
