	.file	"extr_via_clock.c_set_engine_pll_state.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	set_engine_pll_state, @function
set_engine_pll_state:
.LFB0:
	.cfi_startproc
	endbr64
	cmp	edi, 128
	je	.L4
	xor	edx, edx
	cmp	edi, 129
	je	.L2
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	mov	edx, 2
.L2:
	mov	edi, DWORD PTR VIASR[rip]
	mov	ecx, 3
	mov	esi, 45
	jmp	via_write_reg_mask@PLT
	.cfi_endproc
.LFE0:
	.size	set_engine_pll_state, .-set_engine_pll_state
	.comm	VIASR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_via_clock.c_set_engine_pll_state.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	set_engine_pll_state, %function
set_engine_pll_state:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	cmp	r0, #128
	beq	.L4
	cmp	r0, #129
	moveq	r2, #0
	bxne	lr
.L2:
	ldr	r3, .L7
	mov	r1, #45
	ldr	r0, [r3]
	mov	r3, #3
	b	via_write_reg_mask
.L4:
	mov	r2, #2
	b	.L2
.L8:
	.align	2
.L7:
	.word	VIASR
	.size	set_engine_pll_state, .-set_engine_pll_state
	.comm	VIASR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
