	.file	"extr_hwdrv_apci1500.c_v_APCI1500_Interrupt.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n\n\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"\nInterrupt from unknown source\n"
	.text
	.p2align 4
	.type	v_APCI1500_Interrupt, @function
v_APCI1500_Interrupt:
.LFB0:
	.cfi_startproc
	endbr64
	mov	rax, QWORD PTR devpriv[rip]
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	DWORD PTR i_InterruptMask[rip], 0
	mov	rdi, QWORD PTR 16[rax]
	add	rdi, 56
	call	inl@PLT
	test	eax, 8388608
	je	.L2
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_PORT_A_COMMAND_AND_STATUS[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	mov	ebx, eax
	and	eax, 96
	cmp	eax, 96
	je	.L22
.L3:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_PORT_B_COMMAND_AND_STATUS[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	mov	ebx, eax
	and	eax, 96
	cmp	eax, 96
	je	.L23
.L6:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_CPT_TMR1_CMD_STATUS[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	mov	ebx, eax
	and	eax, 96
	cmp	eax, 96
	je	.L24
.L10:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_CPT_TMR2_CMD_STATUS[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	mov	ebx, eax
	and	eax, 96
	cmp	eax, 96
	je	.L25
.L11:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_CPT_TMR3_CMD_STATUS[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	mov	ebx, eax
	and	eax, 96
	cmp	eax, 96
	je	.L26
.L12:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR SIGIO[rip]
	xor	edx, edx
	mov	esi, DWORD PTR 8[rax]
	call	send_sig@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_MASTER_INTERRUPT_CONTROL[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, 208
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	jmp	outb@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	lea	rdi, .LC1[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	printk@PLT
	.p2align 4,,10
	.p2align 3
.L26:
	.cfi_restore_state
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_CPT_TMR3_CMD_STATUS[rip]
	and	ebx, 15
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, ebx
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	or	edi, 32
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR APCI1500_COUNTER[rip]
	cmp	QWORD PTR i_CounterLogic[rip], rax
	je	.L27
	or	DWORD PTR i_InterruptMask[rip], 32
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L22:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_PORT_A_COMMAND_AND_STATUS[rip]
	and	ebx, 15
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, ebx
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	or	edi, 32
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	or	DWORD PTR i_InterruptMask[rip], 1
	mov	rax, QWORD PTR APCI1500_OR_PRIORITY[rip]
	cmp	QWORD PTR i_Logic[rip], rax
	je	.L28
	mov	DWORD PTR i_InputChannel[rip], 0
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L23:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_PORT_B_COMMAND_AND_STATUS[rip]
	and	ebx, 15
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, ebx
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	or	edi, 32
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	lea	rdi, .LC0[rip]
	call	printk@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR [rax]
	add	rdi, QWORD PTR APCI1500_Z8536_PORT_B[rip]
	call	inb@PLT
	mov	ebx, eax
	test	al, -64
	jne	.L29
	or	DWORD PTR i_InterruptMask[rip], 2
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L24:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_CPT_TMR1_CMD_STATUS[rip]
	and	ebx, 15
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, ebx
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	or	edi, 32
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	or	DWORD PTR i_InterruptMask[rip], 4
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L25:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_CPT_TMR2_CMD_STATUS[rip]
	and	ebx, 15
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, ebx
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	or	edi, 32
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	or	DWORD PTR i_InterruptMask[rip], 8
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L27:
	or	DWORD PTR i_InterruptMask[rip], 16
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L29:
	mov	rax, QWORD PTR devpriv[rip]
	xor	edi, edi
	mov	rsi, QWORD PTR 16[rax]
	add	rsi, 56
	call	outl@PLT
	test	bl, -128
	je	.L8
	or	DWORD PTR i_InterruptMask[rip], 64
.L8:
	and	ebx, 64
	je	.L6
	or	DWORD PTR i_InterruptMask[rip], 128
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L28:
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_PORT_A_SPECIFICATION[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	edi, DWORD PTR APCI1500_RW_PORT_A_INTERRUPT_CONTROL[rip]
	mov	rsi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rsi, QWORD PTR [rax]
	call	outb@PLT
	mov	rax, QWORD PTR devpriv[rip]
	mov	rdi, QWORD PTR APCI1500_Z8536_CONTROL_REGISTER[rip]
	add	rdi, QWORD PTR [rax]
	call	inb@PLT
	sar	eax
	add	eax, 1
	mov	DWORD PTR i_InputChannel[rip], eax
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	v_APCI1500_Interrupt, .-v_APCI1500_Interrupt
	.comm	i_Logic,8,8
	.comm	i_InterruptMask,4,4
	.comm	i_InputChannel,4,4
	.comm	i_CounterLogic,8,8
	.comm	devpriv,8,8
	.comm	SIGIO,4,4
	.comm	APCI1500_Z8536_PORT_B,8,8
	.comm	APCI1500_Z8536_CONTROL_REGISTER,8,8
	.comm	APCI1500_RW_PORT_B_COMMAND_AND_STATUS,4,4
	.comm	APCI1500_RW_PORT_A_SPECIFICATION,4,4
	.comm	APCI1500_RW_PORT_A_INTERRUPT_CONTROL,4,4
	.comm	APCI1500_RW_PORT_A_COMMAND_AND_STATUS,4,4
	.comm	APCI1500_RW_MASTER_INTERRUPT_CONTROL,4,4
	.comm	APCI1500_RW_CPT_TMR3_CMD_STATUS,4,4
	.comm	APCI1500_RW_CPT_TMR2_CMD_STATUS,4,4
	.comm	APCI1500_RW_CPT_TMR1_CMD_STATUS,4,4
	.comm	APCI1500_OR_PRIORITY,8,8
	.comm	APCI1500_COUNTER,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hwdrv_apci1500.c_v_APCI1500_Interrupt.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"\012\012\012\000"
	.align	2
.LC1:
	.ascii	"\012Interrupt from unknown source\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	v_APCI1500_Interrupt, %function
v_APCI1500_Interrupt:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r8, #0
	ldr	r4, .L29
	ldr	r6, .L29+4
	ldr	r3, [r4]
	str	r8, [r6]
	ldr	r0, [r3, #8]
	add	r0, r0, #56
	bl	inl
	tst	r0, #8388608
	beq	.L2
	ldr	r3, [r4]
	ldr	r5, .L29+8
	ldr	r1, [r3]
	ldr	r9, .L29+12
	ldr	r3, [r5]
	ldr	r0, [r9]
	add	r1, r1, r3
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	and	r3, r0, #96
	cmp	r3, #96
	mov	r7, r0
	beq	.L22
.L3:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r8, .L29+16
	add	r1, r1, r3
	ldr	r0, [r8]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	and	r3, r0, #96
	cmp	r3, #96
	mov	r7, r0
	beq	.L23
.L6:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r8, .L29+20
	add	r1, r1, r3
	ldr	r0, [r8]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	and	r3, r0, #96
	cmp	r3, #96
	mov	r7, r0
	beq	.L24
.L10:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r8, .L29+24
	add	r1, r1, r3
	ldr	r0, [r8]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	and	r3, r0, #96
	cmp	r3, #96
	mov	r7, r0
	beq	.L25
.L11:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r8, .L29+28
	add	r1, r1, r3
	ldr	r0, [r8]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	and	r3, r0, #96
	cmp	r3, #96
	mov	r7, r0
	beq	.L26
.L12:
	ldr	r2, [r4]
	ldr	r3, .L29+32
	ldr	r1, [r2, #4]
	ldr	r0, [r3]
	mov	r2, #0
	bl	send_sig
	ldr	r3, [r4]
	ldr	r2, [r5]
	ldr	r1, [r3]
	ldr	r3, .L29+36
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	mov	r0, #208
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	add	r1, r1, r3
	b	outb
.L2:
	ldr	r0, .L29+40
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	printk
.L26:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r0, [r8]
	add	r1, r1, r3
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	and	r0, r7, #15
	add	r1, r1, r3
	orr	r0, r0, #32
	bl	outb
	ldr	r2, .L29+44
	ldr	r3, .L29+48
	ldr	r2, [r2]
	ldr	r3, [r3]
	cmp	r2, r3
	ldr	r3, [r6]
	orreq	r3, r3, #16
	orrne	r3, r3, #32
	str	r3, [r6]
	b	.L12
.L22:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r0, [r9]
	add	r1, r1, r3
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	and	r0, r7, #15
	add	r1, r1, r3
	orr	r0, r0, #32
	bl	outb
	ldr	r2, .L29+52
	ldr	r3, .L29+56
	ldr	r1, [r2]
	ldr	r2, [r3]
	ldr	r3, [r6]
	cmp	r1, r2
	orr	r3, r3, #1
	str	r3, [r6]
	beq	.L27
	ldr	r3, .L29+60
	str	r8, [r3]
	b	.L3
.L23:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r0, [r8]
	add	r1, r1, r3
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	and	r0, r7, #15
	add	r1, r1, r3
	orr	r0, r0, #32
	bl	outb
	ldr	r0, .L29+64
	bl	printk
	ldr	r2, [r4]
	ldr	r3, .L29+68
	ldr	r0, [r2]
	ldr	r3, [r3]
	add	r0, r0, r3
	bl	inb
	tst	r0, #192
	mov	r7, r0
	bne	.L28
	ldr	r3, [r6]
	orr	r3, r3, #2
	str	r3, [r6]
	b	.L6
.L24:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r0, [r8]
	add	r1, r1, r3
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	and	r0, r7, #15
	add	r1, r1, r3
	orr	r0, r0, #32
	bl	outb
	ldr	r3, [r6]
	orr	r3, r3, #4
	str	r3, [r6]
	b	.L10
.L25:
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r0, [r8]
	add	r1, r1, r3
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2]
	and	r0, r7, #15
	add	r1, r1, r3
	orr	r0, r0, #32
	bl	outb
	ldr	r3, [r6]
	orr	r3, r3, #8
	str	r3, [r6]
	b	.L11
.L28:
	ldr	r3, [r4]
	mov	r0, #0
	ldr	r1, [r3, #8]
	add	r1, r1, #56
	bl	outl
	tst	r7, #128
	ldrne	r3, [r6]
	orrne	r3, r3, #64
	strne	r3, [r6]
	tst	r7, #64
	ldrne	r3, [r6]
	orrne	r3, r3, #128
	strne	r3, [r6]
	b	.L6
.L27:
	ldr	r3, [r4]
	ldr	r2, [r5]
	ldr	r1, [r3]
	ldr	r3, .L29+72
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	ldr	r3, [r4]
	ldr	r2, [r5]
	ldr	r1, [r3]
	ldr	r3, .L29+76
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	outb
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r0, [r2]
	add	r0, r0, r3
	bl	inb
	ldr	r2, .L29+60
	asr	r3, r0, #1
	add	r3, r3, #1
	str	r3, [r2]
	b	.L3
.L30:
	.align	2
.L29:
	.word	devpriv
	.word	i_InterruptMask
	.word	APCI1500_Z8536_CONTROL_REGISTER
	.word	APCI1500_RW_PORT_A_COMMAND_AND_STATUS
	.word	APCI1500_RW_PORT_B_COMMAND_AND_STATUS
	.word	APCI1500_RW_CPT_TMR1_CMD_STATUS
	.word	APCI1500_RW_CPT_TMR2_CMD_STATUS
	.word	APCI1500_RW_CPT_TMR3_CMD_STATUS
	.word	SIGIO
	.word	APCI1500_RW_MASTER_INTERRUPT_CONTROL
	.word	.LC1
	.word	i_CounterLogic
	.word	APCI1500_COUNTER
	.word	i_Logic
	.word	APCI1500_OR_PRIORITY
	.word	i_InputChannel
	.word	.LC0
	.word	APCI1500_Z8536_PORT_B
	.word	APCI1500_RW_PORT_A_SPECIFICATION
	.word	APCI1500_RW_PORT_A_INTERRUPT_CONTROL
	.size	v_APCI1500_Interrupt, .-v_APCI1500_Interrupt
	.comm	i_Logic,4,4
	.comm	i_InterruptMask,4,4
	.comm	i_InputChannel,4,4
	.comm	i_CounterLogic,4,4
	.comm	devpriv,4,4
	.comm	SIGIO,4,4
	.comm	APCI1500_Z8536_PORT_B,4,4
	.comm	APCI1500_Z8536_CONTROL_REGISTER,4,4
	.comm	APCI1500_RW_PORT_B_COMMAND_AND_STATUS,4,4
	.comm	APCI1500_RW_PORT_A_SPECIFICATION,4,4
	.comm	APCI1500_RW_PORT_A_INTERRUPT_CONTROL,4,4
	.comm	APCI1500_RW_PORT_A_COMMAND_AND_STATUS,4,4
	.comm	APCI1500_RW_MASTER_INTERRUPT_CONTROL,4,4
	.comm	APCI1500_RW_CPT_TMR3_CMD_STATUS,4,4
	.comm	APCI1500_RW_CPT_TMR2_CMD_STATUS,4,4
	.comm	APCI1500_RW_CPT_TMR1_CMD_STATUS,4,4
	.comm	APCI1500_OR_PRIORITY,4,4
	.comm	APCI1500_COUNTER,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
