	.file	"extr_si_dpm.c_si_set_pcie_lane_width_in_smc.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	si_set_pcie_lane_width_in_smc, @function
si_set_pcie_lane_width_in_smc:
.LFB0:
	.cfi_startproc
	endbr64
	mov	eax, DWORD PTR ATOM_PPLIB_PCIE_LINK_WIDTH_MASK[rip]
	mov	r8, rdx
	mov	edx, DWORD PTR [rsi]
	mov	ecx, DWORD PTR ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT[rip]
	and	edx, eax
	and	eax, DWORD PTR [r8]
	sar	edx, cl
	sar	eax, cl
	add	edx, 1
	add	eax, 1
	cmp	eax, edx
	jne	.L7
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movsx	rsi, edx
	mov	rbp, rdi
	call	amdgpu_set_pcie_lanes@PLT
	mov	rdi, rbp
	call	amdgpu_get_pcie_lanes@PLT
	mov	esi, DWORD PTR SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	mov	rdx, rax
	jmp	si_write_smc_soft_register@PLT
	.cfi_endproc
.LFE0:
	.size	si_set_pcie_lane_width_in_smc, .-si_set_pcie_lane_width_in_smc
	.comm	SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width,4,4
	.comm	ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT,4,4
	.comm	ATOM_PPLIB_PCIE_LINK_WIDTH_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_si_dpm.c_si_set_pcie_lane_width_in_smc.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	si_set_pcie_lane_width_in_smc, %function
si_set_pcie_lane_width_in_smc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, .L5
	push	{r4, lr}
	ldr	lr, .L5+4
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	ip, [r1]
	ldr	r1, [lr]
	and	r2, r2, r3
	asr	r2, r2, r1
	and	r3, r3, ip
	cmp	r2, r3, asr r1
	asr	r1, r3, r1
	popeq	{r4, pc}
	mov	r4, r0
	add	r1, r1, #1
	bl	amdgpu_set_pcie_lanes
	mov	r0, r4
	bl	amdgpu_get_pcie_lanes
	ldr	r3, .L5+8
	mov	r2, r0
	ldr	r1, [r3]
	mov	r0, r4
	pop	{r4, lr}
	b	si_write_smc_soft_register
.L6:
	.align	2
.L5:
	.word	ATOM_PPLIB_PCIE_LINK_WIDTH_MASK
	.word	ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT
	.word	SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width
	.size	si_set_pcie_lane_width_in_smc, .-si_set_pcie_lane_width_in_smc
	.comm	SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width,4,4
	.comm	ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT,4,4
	.comm	ATOM_PPLIB_PCIE_LINK_WIDTH_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
