	.file	"extr_stm32_i2s.c_stm32_i2s_set_sysclk.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"I2S MCLK frequency is %uHz\n"
	.text
	.p2align 4
	.type	stm32_i2s_set_sysclk, @function
stm32_i2s_set_sysclk:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12d, ecx
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	ebp, edx
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	snd_soc_dai_get_drvdata@PLT
	mov	edi, DWORD PTR [rbx]
	mov	edx, ebp
	lea	rsi, .LC0[rip]
	mov	r13, rax
	call	dev_dbg@PLT
	cmp	DWORD PTR SND_SOC_CLOCK_OUT[rip], r12d
	je	.L10
.L3:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	mov	rdi, r13
	call	STM32_I2S_IS_MASTER@PLT
	test	rax, rax
	je	.L3
	mov	edx, DWORD PTR I2S_CGFR_MCKOE[rip]
	mov	edi, DWORD PTR 4[r13]
	mov	DWORD PTR 0[r13], ebp
	mov	esi, DWORD PTR STM32_I2S_CGFR_REG[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	mov	ecx, edx
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	regmap_update_bits@PLT
	.cfi_endproc
.LFE0:
	.size	stm32_i2s_set_sysclk, .-stm32_i2s_set_sysclk
	.comm	STM32_I2S_CGFR_REG,4,4
	.comm	SND_SOC_CLOCK_OUT,4,4
	.comm	I2S_CGFR_MCKOE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_stm32_i2s.c_stm32_i2s_set_sysclk.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"I2S MCLK frequency is %uHz\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	stm32_i2s_set_sysclk, %function
stm32_i2s_set_sysclk:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r6, r0
	mov	r5, r3
	mov	r4, r2
	bl	snd_soc_dai_get_drvdata
	mov	r3, r0
	mov	r2, r4
	ldr	r0, [r6]
	ldr	r1, .L11
	mov	r6, r3
	bl	dev_dbg
	ldr	r3, .L11+4
	ldr	r3, [r3]
	cmp	r3, r5
	beq	.L10
.L3:
	mov	r0, #0
	pop	{r4, r5, r6, pc}
.L10:
	mov	r0, r6
	bl	STM32_I2S_IS_MASTER
	cmp	r0, #0
	beq	.L3
	ldr	r3, .L11+8
	ldr	r1, .L11+12
	ldr	r3, [r3]
	ldr	r0, [r6, #4]
	str	r4, [r6]
	mov	r2, r3
	pop	{r4, r5, r6, lr}
	ldr	r1, [r1]
	b	regmap_update_bits
.L12:
	.align	2
.L11:
	.word	.LC0
	.word	SND_SOC_CLOCK_OUT
	.word	I2S_CGFR_MCKOE
	.word	STM32_I2S_CGFR_REG
	.size	stm32_i2s_set_sysclk, .-stm32_i2s_set_sysclk
	.comm	STM32_I2S_CGFR_REG,4,4
	.comm	SND_SOC_CLOCK_OUT,4,4
	.comm	I2S_CGFR_MCKOE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
