	.file	"extr_a2xx_gpu.c_a2xx_me_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	a2xx_me_init, @function
a2xx_me_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	edx, 18
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	rax, QWORD PTR 8[rdi]
	mov	esi, DWORD PTR CP_ME_INIT[rip]
	mov	rbp, QWORD PTR [rax]
	mov	rdi, rbp
	call	OUT_PKT3@PLT
	mov	rdi, rbp
	mov	esi, 1023
	call	OUT_RING@PLT
	mov	rdi, rbp
	xor	esi, esi
	call	OUT_RING@PLT
	mov	rdi, rbp
	xor	esi, esi
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_RB_SURFACE_INFO[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_PA_SC_WINDOW_OFFSET[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_VGT_MAX_VTX_INDX[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_SQ_PROGRAM_CNTL[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_RB_DEPTHCONTROL[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_PA_SU_POINT_SIZE[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_PA_SC_LINE_CNTL[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	eax, DWORD PTR REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE[rip]
	mov	rdi, rbp
	lea	esi, -8192[rax]
	call	OUT_RING@PLT
	mov	rdi, rbp
	mov	esi, -2147483264
	call	OUT_RING@PLT
	mov	rdi, rbp
	mov	esi, 1
	call	OUT_RING@PLT
	mov	rdi, rbp
	xor	esi, esi
	call	OUT_RING@PLT
	mov	rdi, rbp
	xor	esi, esi
	call	OUT_RING@PLT
	mov	rdi, rbp
	mov	esi, 536871410
	call	OUT_RING@PLT
	mov	rdi, rbp
	xor	esi, esi
	call	OUT_RING@PLT
	mov	rdi, rbp
	xor	esi, esi
	call	OUT_RING@PLT
	mov	esi, DWORD PTR CP_SET_PROTECTED_MODE[rip]
	mov	edx, 1
	mov	rdi, rbp
	call	OUT_PKT3@PLT
	mov	rdi, rbp
	mov	esi, 1
	call	OUT_RING@PLT
	mov	rax, QWORD PTR [r12]
	mov	rdi, r12
	mov	rsi, rbp
	call	[QWORD PTR [rax]]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	rdi, r12
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	a2xx_idle@PLT
	.cfi_endproc
.LFE0:
	.size	a2xx_me_init, .-a2xx_me_init
	.comm	REG_A2XX_VGT_MAX_VTX_INDX,4,4
	.comm	REG_A2XX_SQ_PROGRAM_CNTL,4,4
	.comm	REG_A2XX_RB_SURFACE_INFO,4,4
	.comm	REG_A2XX_RB_DEPTHCONTROL,4,4
	.comm	REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE,4,4
	.comm	REG_A2XX_PA_SU_POINT_SIZE,4,4
	.comm	REG_A2XX_PA_SC_WINDOW_OFFSET,4,4
	.comm	REG_A2XX_PA_SC_LINE_CNTL,4,4
	.comm	CP_SET_PROTECTED_MODE,4,4
	.comm	CP_ME_INIT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_a2xx_gpu.c_a2xx_me_init.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	a2xx_me_init, %function
a2xx_me_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r2, [r0, #4]
	push	{r4, r5, r6, lr}
	ldr	r3, .L4
	ldr	r4, [r2]
	ldr	r1, [r3]
	mov	r2, #18
	mov	r5, r0
	mov	r0, r4
	bl	OUT_PKT3
	mov	r0, r4
	ldr	r1, .L4+4
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #0
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #0
	bl	OUT_RING
	ldr	r3, .L4+8
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+12
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+16
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+20
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+24
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+28
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+32
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	ldr	r3, .L4+36
	mov	r0, r4
	ldr	r1, [r3]
	sub	r1, r1, #8192
	bl	OUT_RING
	mov	r0, r4
	ldr	r1, .L4+40
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #1
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #0
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #0
	bl	OUT_RING
	mov	r0, r4
	ldr	r1, .L4+44
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #0
	bl	OUT_RING
	mov	r0, r4
	mov	r1, #0
	bl	OUT_RING
	ldr	r3, .L4+48
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r4
	bl	OUT_PKT3
	mov	r0, r4
	mov	r1, #1
	bl	OUT_RING
	ldr	r3, [r5]
	mov	r1, r4
	mov	r0, r5
	ldr	r3, [r3]
	blx	r3
	mov	r0, r5
	pop	{r4, r5, r6, lr}
	b	a2xx_idle
.L5:
	.align	2
.L4:
	.word	CP_ME_INIT
	.word	1023
	.word	REG_A2XX_RB_SURFACE_INFO
	.word	REG_A2XX_PA_SC_WINDOW_OFFSET
	.word	REG_A2XX_VGT_MAX_VTX_INDX
	.word	REG_A2XX_SQ_PROGRAM_CNTL
	.word	REG_A2XX_RB_DEPTHCONTROL
	.word	REG_A2XX_PA_SU_POINT_SIZE
	.word	REG_A2XX_PA_SC_LINE_CNTL
	.word	REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE
	.word	-2147483264
	.word	536871410
	.word	CP_SET_PROTECTED_MODE
	.size	a2xx_me_init, .-a2xx_me_init
	.comm	REG_A2XX_VGT_MAX_VTX_INDX,4,4
	.comm	REG_A2XX_SQ_PROGRAM_CNTL,4,4
	.comm	REG_A2XX_RB_SURFACE_INFO,4,4
	.comm	REG_A2XX_RB_DEPTHCONTROL,4,4
	.comm	REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE,4,4
	.comm	REG_A2XX_PA_SU_POINT_SIZE,4,4
	.comm	REG_A2XX_PA_SC_WINDOW_OFFSET,4,4
	.comm	REG_A2XX_PA_SC_LINE_CNTL,4,4
	.comm	CP_SET_PROTECTED_MODE,4,4
	.comm	CP_ME_INIT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
