	.file	"extr_simplify-rtx.c_simplify_replace_rtx.c"
	.intel_syntax noprefix
	.text
	.section	.text.unlikely,"ax",@progbits
.LCOLDB0:
	.text
.LHOTB0:
	.p2align 4
	.globl	simplify_replace_rtx
	.type	simplify_replace_rtx, @function
simplify_replace_rtx:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	GET_CODE@PLT
	mov	rdi, rbp
	mov	r14d, eax
	call	GET_MODE@PLT
	cmp	rbp, r13
	je	.L1
	mov	edi, r14d
	mov	r15d, eax
	call	GET_RTX_CLASS@PLT
	add	eax, -128
	cmp	eax, 8
	ja	.L28
	lea	rdx, .L4[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L4:
	.long	.L9-.L4
	.long	.L5-.L4
	.long	.L8-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L6-.L4
	.long	.L3-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.text
	.p2align 4,,10
	.p2align 3
.L7:
	cmp	r14d, DWORD PTR SUBREG[rip]
	je	.L34
.L10:
	mov	r12, rbp
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r12
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	mov	esi, 1
	mov	rdi, rbp
	mov	rbx, rax
	call	XEXP@PLT
	mov	rdi, rbx
	mov	QWORD PTR [rsp], rax
	call	GET_MODE@PLT
	cmp	eax, DWORD PTR VOIDmode[rip]
	je	.L13
	mov	rdi, rbx
	call	GET_MODE@PLT
	mov	DWORD PTR 8[rsp], eax
.L14:
	mov	rdx, r12
	mov	rdi, rbx
	mov	rsi, r13
	call	simplify_replace_rtx
	mov	rdi, QWORD PTR [rsp]
	mov	rdx, r12
	mov	rsi, r13
	mov	rbx, rax
	call	simplify_replace_rtx
	xor	esi, esi
	mov	rdi, rbp
	mov	r12, rax
	call	XEXP@PLT
	cmp	rax, rbx
	je	.L15
.L16:
	mov	edx, DWORD PTR 8[rsp]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	r8, r12
	mov	rcx, rbx
	mov	esi, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	edi, r14d
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	simplify_gen_relational@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	mov	esi, 1
	mov	rdi, rbp
	mov	rbx, rax
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	xor	esi, esi
	mov	rdi, rbp
	mov	r12, rax
	call	XEXP@PLT
	cmp	rax, rbx
	je	.L11
.L12:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rcx, r12
	mov	rdx, rbx
	mov	esi, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	edi, r14d
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	simplify_gen_binary@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	mov	rdi, rax
	mov	QWORD PTR [rsp], rax
	call	GET_MODE@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	rdx, r12
	mov	rsi, r13
	mov	ebx, eax
	call	simplify_replace_rtx
	mov	esi, 1
	mov	rdi, rbp
	mov	QWORD PTR 8[rsp], rax
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	mov	esi, 2
	mov	rdi, rbp
	mov	QWORD PTR [rsp], rax
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	xor	esi, esi
	mov	rdi, rbp
	mov	r12, rax
	call	XEXP@PLT
	mov	rcx, QWORD PTR 8[rsp]
	mov	r8, QWORD PTR [rsp]
	cmp	rax, rcx
	je	.L17
.L20:
	cmp	ebx, DWORD PTR VOIDmode[rip]
	je	.L35
.L19:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	r9, r12
	mov	edx, ebx
	mov	esi, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	edi, r14d
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	simplify_gen_ternary@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	cmp	r14d, DWORD PTR MEM[rip]
	je	.L36
	cmp	r14d, DWORD PTR LO_SUM[rip]
	je	.L37
	cmp	r14d, DWORD PTR REG[rip]
	jne	.L10
	mov	rsi, r13
	mov	rdi, rbp
	call	rtx_equal_p@PLT
	test	eax, eax
	je	.L10
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L9:
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	mov	rbx, rax
	mov	rdi, rax
	call	GET_MODE@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rbx
	mov	DWORD PTR [rsp], eax
	call	simplify_replace_rtx
	xor	esi, esi
	mov	rdi, rbp
	mov	r12, rax
	call	XEXP@PLT
	cmp	rax, r12
	je	.L10
	mov	ecx, DWORD PTR [rsp]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rdx, r12
	mov	esi, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	edi, r14d
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	simplify_gen_unary@PLT
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	mov	esi, 1
	mov	rdi, rbp
	call	XEXP@PLT
	cmp	rax, r12
	jne	.L12
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L15:
	mov	esi, 1
	mov	rdi, rbp
	call	XEXP@PLT
	cmp	rax, r12
	jne	.L16
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L13:
	mov	rdi, QWORD PTR [rsp]
	call	GET_MODE@PLT
	mov	DWORD PTR 8[rsp], eax
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L34:
	mov	rdi, rbp
	call	SUBREG_REG@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	mov	rdi, rbp
	mov	r12, rax
	call	SUBREG_REG@PLT
	cmp	rax, r12
	je	.L10
	mov	rdi, rbp
	call	SUBREG_BYTE@PLT
	mov	rdi, rbp
	mov	r14d, eax
	call	SUBREG_REG@PLT
	mov	rdi, rax
	call	GET_MODE@PLT
	mov	rdi, rbp
	mov	r13d, eax
	call	GET_MODE@PLT
	mov	rsi, r12
	mov	ecx, r14d
	mov	edx, r13d
	mov	edi, eax
	call	simplify_gen_subreg@PLT
	mov	r12, rax
	test	rax, rax
	jne	.L1
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L17:
	mov	esi, 1
	mov	rdi, rbp
	mov	QWORD PTR 8[rsp], r8
	mov	QWORD PTR [rsp], rcx
	call	XEXP@PLT
	mov	r8, QWORD PTR 8[rsp]
	mov	rcx, QWORD PTR [rsp]
	cmp	rax, r8
	jne	.L20
	mov	esi, 2
	mov	rdi, rbp
	call	XEXP@PLT
	mov	rcx, QWORD PTR [rsp]
	mov	r8, QWORD PTR 8[rsp]
	cmp	rax, r12
	jne	.L20
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L36:
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	xor	esi, esi
	mov	rdi, rbp
	mov	r12, rax
	call	XEXP@PLT
	cmp	rax, r12
	je	.L10
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rsi, r12
	mov	rdi, rbp
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	replace_equiv_address_nv@PLT
	.p2align 4,,10
	.p2align 3
.L35:
	.cfi_restore_state
	mov	rdi, rcx
	mov	QWORD PTR 8[rsp], r8
	mov	QWORD PTR [rsp], rcx
	call	GET_MODE@PLT
	mov	r8, QWORD PTR 8[rsp]
	mov	rcx, QWORD PTR [rsp]
	mov	ebx, eax
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L37:
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	mov	esi, 1
	mov	rdi, rbp
	mov	r14, rax
	call	XEXP@PLT
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, rax
	call	simplify_replace_rtx
	mov	rdi, r14
	mov	r12, rax
	call	GET_CODE@PLT
	cmp	eax, DWORD PTR HIGH[rip]
	je	.L23
.L26:
	xor	esi, esi
	mov	rdi, rbp
	call	XEXP@PLT
	cmp	rax, r14
	jne	.L25
	mov	esi, 1
	mov	rdi, rbp
	call	XEXP@PLT
	cmp	rax, r12
	je	.L10
.L25:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rdx, r12
	mov	rsi, r14
	mov	edi, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	gen_rtx_LO_SUM@PLT
.L23:
	.cfi_restore_state
	xor	esi, esi
	mov	rdi, r14
	call	XEXP@PLT
	mov	rsi, r12
	mov	rdi, rax
	call	rtx_equal_p@PLT
	test	eax, eax
	je	.L26
	jmp	.L1
	.cfi_endproc
	.section	.text.unlikely
	.cfi_startproc
	.type	simplify_replace_rtx.cold, @function
simplify_replace_rtx.cold:
.LFSB0:
.L28:
	.cfi_def_cfa_offset 80
	.cfi_offset 3, -56
	.cfi_offset 6, -48
	.cfi_offset 12, -40
	.cfi_offset 13, -32
	.cfi_offset 14, -24
	.cfi_offset 15, -16
	mov	r12, rbp
	jmp	.L1
	.cfi_endproc
.LFE0:
	.text
	.size	simplify_replace_rtx, .-simplify_replace_rtx
	.section	.text.unlikely
	.size	simplify_replace_rtx.cold, .-simplify_replace_rtx.cold
.LCOLDE0:
	.text
.LHOTE0:
	.comm	VOIDmode,4,4
	.comm	SUBREG,4,4
	.comm	REG,4,4
	.comm	MEM,4,4
	.comm	LO_SUM,4,4
	.comm	HIGH,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_simplify-rtx.c_simplify_replace_rtx.c"
	.text
	.align	2
	.global	simplify_replace_rtx
	.syntax unified
	.arm
	.fpu softvfp
	.type	simplify_replace_rtx, %function
simplify_replace_rtx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #12
	mov	r4, r0
	mov	r7, r1
	mov	r5, r2
	bl	GET_CODE
	mov	r6, r0
	mov	r0, r4
	bl	GET_MODE
	cmp	r4, r7
	beq	.L1
	mov	r8, r0
	mov	r0, r6
	bl	GET_RTX_CLASS
	sub	r0, r0, #128
	cmp	r0, #8
	ldrls	pc, [pc, r0, asl #2]
	b	.L28
.L4:
	.word	.L9
	.word	.L5
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L6
	.word	.L3
	.word	.L5
	.word	.L3
.L5:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	mov	r10, r0
	bl	GET_MODE
	mov	r2, r5
	mov	r1, r7
	mov	r9, r0
	mov	r0, r10
	bl	simplify_replace_rtx
	mov	r1, #1
	mov	r10, r0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r1, #2
	mov	fp, r0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r1, #0
	mov	r5, r0
	mov	r0, r4
	bl	XEXP
	cmp	r0, r10
	beq	.L17
.L20:
	ldr	r3, .L38
	ldr	r3, [r3]
	cmp	r9, r3
	beq	.L34
.L19:
	str	r5, [sp, #4]
	mov	r3, r10
	mov	r2, r9
	mov	r1, r8
	mov	r0, r6
	str	fp, [sp]
	bl	simplify_gen_ternary
	mov	r5, r0
.L1:
	mov	r0, r5
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
	ldr	r3, .L38+4
	ldr	r3, [r3]
	cmp	r6, r3
	beq	.L35
	ldr	r3, .L38+8
	ldr	r3, [r3]
	cmp	r6, r3
	beq	.L36
	ldr	r3, .L38+12
	ldr	r3, [r3]
	cmp	r6, r3
	beq	.L37
.L28:
	mov	r5, r4
	mov	r0, r5
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r1, #1
	mov	r9, r0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r1, #0
	mov	r5, r0
	mov	r0, r4
	bl	XEXP
	cmp	r0, r9
	beq	.L11
.L12:
	mov	r3, r5
	mov	r2, r9
	mov	r1, r8
	mov	r0, r6
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	simplify_gen_binary
.L6:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	mov	r1, #1
	mov	r9, r0
	mov	r0, r4
	bl	XEXP
	mov	fp, r0
	mov	r0, r9
	bl	GET_MODE
	ldr	r3, .L38
	ldr	r3, [r3]
	cmp	r0, r3
	movne	r0, r9
	moveq	r0, fp
	bl	GET_MODE
	mov	r2, r5
	mov	r1, r7
	mov	r10, r0
	mov	r0, r9
	bl	simplify_replace_rtx
	mov	r3, r0
	mov	r2, r5
	mov	r1, r7
	mov	r0, fp
	mov	r5, r3
	bl	simplify_replace_rtx
	mov	r1, #0
	mov	r7, r0
	mov	r0, r4
	bl	XEXP
	cmp	r0, r5
	beq	.L15
.L16:
	mov	r3, r5
	mov	r2, r10
	mov	r1, r8
	mov	r0, r6
	str	r7, [sp]
	bl	simplify_gen_relational
	mov	r5, r0
	b	.L1
.L9:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	mov	r9, r0
	bl	GET_MODE
	mov	r3, r0
	mov	r2, r5
	mov	r1, r7
	mov	r0, r9
	mov	r7, r3
	bl	simplify_replace_rtx
	mov	r1, #0
	mov	r5, r0
	mov	r0, r4
	bl	XEXP
	cmp	r0, r5
	beq	.L28
	mov	r3, r7
	mov	r2, r5
	mov	r1, r8
	mov	r0, r6
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	simplify_gen_unary
.L7:
	ldr	r3, .L38+16
	ldr	r3, [r3]
	cmp	r6, r3
	bne	.L28
	mov	r0, r4
	bl	SUBREG_REG
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r5, r0
	mov	r0, r4
	bl	SUBREG_REG
	cmp	r0, r5
	beq	.L28
	mov	r0, r4
	bl	GET_MODE
	mov	r6, r0
	mov	r0, r4
	bl	SUBREG_REG
	bl	GET_MODE
	mov	r7, r0
	mov	r0, r4
	bl	SUBREG_BYTE
	mov	r1, r5
	mov	r3, r0
	mov	r2, r7
	mov	r0, r6
	bl	simplify_gen_subreg
	subs	r5, r0, #0
	bne	.L1
	b	.L28
.L37:
	mov	r1, r7
	mov	r0, r4
	bl	rtx_equal_p
	cmp	r0, #0
	beq	.L28
	b	.L1
.L15:
	mov	r1, #1
	mov	r0, r4
	bl	XEXP
	cmp	r0, r7
	bne	.L16
	b	.L28
.L11:
	mov	r1, #1
	mov	r0, r4
	bl	XEXP
	cmp	r0, r5
	bne	.L12
	b	.L28
.L17:
	mov	r1, #1
	mov	r0, r4
	bl	XEXP
	cmp	r0, fp
	bne	.L20
	mov	r1, #2
	mov	r0, r4
	bl	XEXP
	cmp	r0, r5
	bne	.L20
	b	.L28
.L35:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r1, #0
	mov	r5, r0
	mov	r0, r4
	bl	XEXP
	cmp	r0, r5
	beq	.L28
	mov	r1, r5
	mov	r0, r4
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	replace_equiv_address_nv
.L34:
	mov	r0, r10
	bl	GET_MODE
	mov	r9, r0
	b	.L19
.L36:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r1, #1
	mov	r6, r0
	mov	r0, r4
	bl	XEXP
	mov	r2, r5
	mov	r1, r7
	bl	simplify_replace_rtx
	mov	r5, r0
	mov	r0, r6
	bl	GET_CODE
	ldr	r3, .L38+20
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L23
.L26:
	mov	r1, #0
	mov	r0, r4
	bl	XEXP
	cmp	r0, r6
	bne	.L25
	mov	r1, #1
	mov	r0, r4
	bl	XEXP
	cmp	r0, r5
	beq	.L28
.L25:
	mov	r2, r5
	mov	r1, r6
	mov	r0, r8
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	gen_rtx_LO_SUM
.L23:
	mov	r1, #0
	mov	r0, r6
	bl	XEXP
	mov	r1, r5
	bl	rtx_equal_p
	cmp	r0, #0
	beq	.L26
	b	.L1
.L39:
	.align	2
.L38:
	.word	VOIDmode
	.word	MEM
	.word	LO_SUM
	.word	REG
	.word	SUBREG
	.word	HIGH
	.size	simplify_replace_rtx, .-simplify_replace_rtx
	.comm	VOIDmode,4,4
	.comm	SUBREG,4,4
	.comm	REG,4,4
	.comm	MEM,4,4
	.comm	LO_SUM,4,4
	.comm	HIGH,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
