	.file	"extr_vp9_mc_msa.c_common_vt_8t_4w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	common_vt_8t_4w_msa, @function
common_vt_8t_4w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	lea	eax, [rsi+rsi*2]
	mov	r10, rdi
	mov	rdi, r8
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	cdqe
	xor	r14d, r14d
	xor	r15d, r15d
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	sal	rax, 2
	xor	r13d, r13d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xor	r12d, r12d
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xor	ebp, ebp
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, r10
	sub	rbx, rax
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	mov	QWORD PTR 16[rsp], rdx
	mov	DWORD PTR 28[rsp], ecx
	mov	DWORD PTR 12[rsp], r9d
	mov	DWORD PTR 24[rsp], esi
	call	LD_SH@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 120
	xor	r9d, r9d
	xor	esi, esi
	push	0
	.cfi_def_cfa_offset 128
	mov	edi, eax
	mov	r8d, 3
	mov	ecx, 2
	push	0
	.cfi_def_cfa_offset 136
	mov	edx, 1
	push	0
	.cfi_def_cfa_offset 144
	call	SPLATI_H4_SB@PLT
	add	rsp, 24
	.cfi_def_cfa_offset 120
	xor	eax, eax
	xor	r10d, r10d
	push	rax
	.cfi_def_cfa_offset 128
	mov	edx, r10d
	mov	rdi, rbx
	mov	r9d, ebp
	push	r15
	.cfi_def_cfa_offset 136
	mov	r8d, r13d
	mov	ecx, r12d
	push	r14
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR 56[rsp]
	call	LD_SB7@PLT
	mov	esi, DWORD PTR 56[rsp]
	xor	r11d, r11d
	add	rsp, 32
	.cfi_def_cfa_offset 112
	push	0
	.cfi_def_cfa_offset 120
	xor	r10d, r10d
	mov	r9d, r14d
	mov	r8d, r15d
	push	r11
	.cfi_def_cfa_offset 128
	lea	eax, 0[0+rsi*8]
	mov	ecx, r13d
	mov	edx, ebp
	push	0
	.cfi_def_cfa_offset 136
	sub	eax, esi
	mov	edi, r12d
	mov	esi, r10d
	push	0
	.cfi_def_cfa_offset 144
	cdqe
	push	r12
	.cfi_def_cfa_offset 152
	lea	rbx, [rbx+rax*4]
	push	r13
	.cfi_def_cfa_offset 160
	call	ILVR_B4_SB@PLT
	xor	r10d, r10d
	add	rsp, 48
	.cfi_def_cfa_offset 112
	xor	edx, edx
	mov	r9d, r10d
	mov	r8d, r12d
	mov	ecx, r15d
	mov	esi, ebp
	mov	edi, r14d
	call	ILVR_B2_SB@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 120
	xor	r11d, r11d
	xor	r10d, r10d
	push	r14
	.cfi_def_cfa_offset 128
	mov	r9d, r11d
	mov	r8d, r10d
	xor	ecx, ecx
	push	r13
	.cfi_def_cfa_offset 136
	mov	edx, r12d
	xor	esi, esi
	xor	edi, edi
	push	rbp
	.cfi_def_cfa_offset 144
	call	ILVR_D3_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 112
	mov	edx, r14d
	mov	esi, r13d
	mov	edi, ebp
	call	XORI_B3_128_SB@PLT
	mov	r9d, DWORD PTR 12[rsp]
	sar	r9d, 2
	lea	edx, -1[r9]
	mov	DWORD PTR 12[rsp], edx
	je	.L1
	mov	esi, DWORD PTR 24[rsp]
	lea	eax, 0[0+rsi*4]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, DWORD PTR 28[rsp]
	mov	QWORD PTR 32[rsp], rdx
	sal	eax, 2
	cdqe
	sal	rax, 2
	mov	QWORD PTR 40[rsp], rax
	.p2align 4,,10
	.p2align 3
.L3:
	mov	esi, DWORD PTR 24[rsp]
	xor	r12d, r12d
	xor	r13d, r13d
	xor	r9d, r9d
	xor	r8d, r8d
	mov	edx, r12d
	mov	rdi, rbx
	mov	ecx, r13d
	call	LD_SB4@PLT
	xor	r15d, r15d
	xor	r14d, r14d
	xor	r10d, r10d
	xor	ebp, ebp
	xor	r8d, r8d
	xor	r9d, r9d
	add	rbx, QWORD PTR 32[rsp]
	push	r15
	.cfi_def_cfa_offset 120
	mov	ecx, r12d
	xor	esi, esi
	mov	edi, r12d
	push	r10
	.cfi_def_cfa_offset 128
	mov	edx, r13d
	push	rbp
	.cfi_def_cfa_offset 136
	push	r14
	.cfi_def_cfa_offset 144
	push	r8
	.cfi_def_cfa_offset 152
	push	r9
	.cfi_def_cfa_offset 160
	call	ILVR_B4_SB@PLT
	xor	r10d, r10d
	add	rsp, 48
	.cfi_def_cfa_offset 112
	mov	r8d, r12d
	mov	ecx, r10d
	mov	edx, r15d
	mov	r9d, r13d
	mov	edi, ebp
	mov	esi, r14d
	call	ILVR_D2_SB@PLT
	mov	edi, r12d
	mov	esi, r13d
	call	XORI_B2_128_SB@PLT
	xor	r11d, r11d
	xor	r10d, r10d
	xor	r9d, r9d
	push	r11
	.cfi_def_cfa_offset 120
	xor	r8d, r8d
	mov	ecx, r12d
	mov	edx, r15d
	push	r10
	.cfi_def_cfa_offset 128
	xor	edi, edi
	mov	esi, r14d
	call	FILT_8TAP_DPADD_S_H@PLT
	xor	r11d, r11d
	xor	r10d, r10d
	xor	r9d, r9d
	push	r11
	.cfi_def_cfa_offset 136
	xor	r8d, r8d
	mov	ecx, r13d
	mov	edx, r12d
	push	r10
	.cfi_def_cfa_offset 144
	mov	esi, r15d
	mov	edi, r14d
	mov	ebp, eax
	call	FILT_8TAP_DPADD_S_H@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 112
	mov	edx, 7
	mov	edi, ebp
	mov	r12d, eax
	mov	esi, eax
	call	SRARI_H2_SH@PLT
	mov	edx, 7
	mov	esi, r12d
	mov	edi, ebp
	call	SAT_SH2_SH@PLT
	mov	esi, r12d
	mov	edi, ebp
	call	PCKEV_XORI128_UB@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 120
	mov	ecx, 2
	xor	esi, esi
	mov	edi, eax
	mov	eax, DWORD PTR 36[rsp]
	mov	edx, 1
	mov	r8d, 3
	push	rax
	.cfi_def_cfa_offset 128
	mov	r15, QWORD PTR 32[rsp]
	mov	r9, r15
	call	ST_W4@PLT
	mov	rcx, QWORD PTR 56[rsp]
	mov	rax, r15
	sub	DWORD PTR 28[rsp], 1
	add	rax, rcx
	mov	QWORD PTR 32[rsp], rax
	mov	eax, DWORD PTR 28[rsp]
	pop	rdx
	.cfi_def_cfa_offset 120
	pop	rcx
	.cfi_def_cfa_offset 112
	cmp	eax, -1
	jne	.L3
.L1:
	add	rsp, 56
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	common_vt_8t_4w_msa, .-common_vt_8t_4w_msa
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_vp9_mc_msa.c_common_vt_8t_4w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	common_vt_8t_4w_msa, %function
common_vt_8t_4w_msa:
	@ args = 8, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	sub	sp, sp, #68
	str	r1, [sp, #44]
	ldr	r0, [sp, #104]
	add	r1, r1, r1, lsl #1
	mov	r9, #0
	sub	r4, r4, r1, lsl #2
	str	r2, [sp, #40]
	str	r3, [sp, #48]
	bl	LD_SH
	mov	r2, #3
	mov	r3, #2
	mov	r1, r9
	str	r2, [sp]
	str	r9, [sp, #16]
	mov	r2, #1
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	str	r9, [sp, #4]
	bl	SPLATI_H4_SB
	mov	r2, r9
	mov	r3, r9
	ldr	r1, [sp, #44]
	mov	r0, r4
	str	r9, [sp, #16]
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	LD_SB7
	ldr	r7, [sp, #44]
	mov	r3, r9
	rsb	r2, r7, r7, lsl #3
	mov	r1, r9
	mov	r0, r9
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	str	r9, [sp, #4]
	str	r9, [sp]
	str	r9, [sp, #28]
	str	r9, [sp, #24]
	str	r9, [sp, #20]
	str	r9, [sp, #16]
	add	r8, r4, r2, lsl #2
	mov	r2, r9
	bl	ILVR_B4_SB
	mov	r3, r9
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	ILVR_B2_SB
	mov	r3, r9
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	str	r9, [sp, #4]
	str	r9, [sp]
	str	r9, [sp, #16]
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	bl	ILVR_D3_SB
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	bl	XORI_B3_128_SB
	ldr	r2, [sp, #108]
	asr	r3, r2, #2
	sub	r2, r3, #1
	cmp	r3, r9
	str	r2, [sp, #36]
	beq	.L1
	mov	r2, #3
	mov	fp, r8
	ldr	r3, [sp, #48]
	str	r2, [sp, #60]
	lsl	r3, r3, #4
	lsl	r2, r7, #4
	str	r2, [sp, #52]
	str	r3, [sp, #56]
.L3:
	mov	r5, #0
	mov	r4, r5
	mov	r8, r5
	mov	r3, r5
	mov	r2, r5
	mov	r0, fp
	ldr	r1, [sp, #44]
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	LD_SB4
	mov	r1, r5
	mov	r3, r5
	mov	r2, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	str	r5, [sp, #28]
	str	r5, [sp, #24]
	str	r5, [sp, #20]
	str	r5, [sp, #16]
	bl	ILVR_B4_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	stm	sp, {r4, r8}
	bl	ILVR_D2_SB
	mov	r1, r5
	mov	r0, r5
	bl	XORI_B2_128_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	FILT_8TAP_DPADD_S_H
	mov	ip, r0
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	mov	r4, ip
	bl	FILT_8TAP_DPADD_S_H
	mov	r10, r5
	mov	r5, r0
	mov	r2, #7
	mov	r1, r5
	mov	r0, r4
	bl	SRARI_H2_SH
	mov	r1, r5
	mov	r2, #7
	mov	r0, r4
	bl	SAT_SH2_SH
	ldr	r3, [sp, #36]
	mov	r1, r5
	mov	r0, r4
	sub	r4, r3, #1
	str	r4, [sp, #36]
	bl	PCKEV_XORI128_UB
	ldr	r3, [sp, #48]
	ldr	r5, [sp, #40]
	str	r3, [sp, #8]
	ldr	r3, [sp, #60]
	mov	r2, #1
	str	r3, [sp]
	mov	r1, r10
	mov	r3, #2
	str	r5, [sp, #4]
	bl	ST_W4
	ldr	r3, [sp, #52]
	cmn	r4, #1
	add	fp, fp, r3
	ldr	r3, [sp, #56]
	add	r3, r5, r3
	str	r3, [sp, #40]
	bne	.L3
.L1:
	add	sp, sp, #68
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	common_vt_8t_4w_msa, .-common_vt_8t_4w_msa
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
