	.file	"extr_verbs.c_qedr_prepare_sq_sges.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	qedr_prepare_sq_sges, @function
qedr_prepare_sq_sges:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	eax, DWORD PTR [rdx]
	mov	QWORD PTR [rsp], rdi
	mov	QWORD PTR 8[rsp], rsi
	test	eax, eax
	jle	.L5
	mov	rbp, rdx
	xor	r12d, r12d
	xor	r15d, r15d
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rdi, QWORD PTR [rsp]
	lea	r13, [r12+r12*2]
	add	r12, 1
	lea	r14, 0[0+r13*8]
	call	qed_chain_produce@PLT
	mov	rbx, rax
	mov	rax, QWORD PTR 8[rbp]
	mov	edi, DWORD PTR 16[rbx]
	mov	esi, DWORD PTR 16[rax+r14]
	call	DMA_REGPAIR_LE@PLT
	mov	rax, QWORD PTR 8[rbp]
	mov	rdi, QWORD PTR 8[rax+r14]
	call	cpu_to_le32@PLT
	mov	QWORD PTR 8[rbx], rax
	mov	rax, QWORD PTR 8[rbp]
	mov	rdi, QWORD PTR [rax+r13*8]
	call	cpu_to_le32@PLT
	mov	QWORD PTR [rbx], rax
	mov	rax, QWORD PTR 8[rbp]
	add	r15d, DWORD PTR [rax+r13*8]
	mov	eax, DWORD PTR 0[rbp]
	cmp	eax, r12d
	jg	.L3
.L2:
	mov	rcx, QWORD PTR 8[rsp]
	test	rcx, rcx
	je	.L1
	add	DWORD PTR [rcx], eax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	xor	r15d, r15d
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	qedr_prepare_sq_sges, .-qedr_prepare_sq_sges
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_verbs.c_qedr_prepare_sq_sges.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	qedr_prepare_sq_sges, %function
qedr_prepare_sq_sges:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r2]
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	cmp	r3, #0
	mov	r9, r1
	ble	.L5
	mov	r6, #0
	mov	r5, r2
	mov	r8, r0
	mov	r10, r6
.L3:
	mov	r0, r8
	bl	qed_chain_produce
	ldr	r3, [r5, #4]
	add	r7, r6, r6, lsl #1
	add	r3, r3, r7, lsl #2
	ldr	r1, [r3, #8]
	mov	r4, r0
	ldr	r0, [r0, #8]
	bl	DMA_REGPAIR_LE
	ldr	r3, [r5, #4]
	lsl	r2, r7, #2
	add	r3, r3, r2
	ldr	r0, [r3, #4]
	bl	cpu_to_le32
	ldr	r3, [r5, #4]
	str	r0, [r4, #4]
	ldr	r0, [r3, r7, lsl #2]
	bl	cpu_to_le32
	ldr	r2, [r5, #4]
	ldr	r3, [r5]
	ldr	r2, [r2, r7, lsl #2]
	add	r6, r6, #1
	cmp	r3, r6
	str	r0, [r4]
	add	r10, r10, r2
	bgt	.L3
.L2:
	cmp	r9, #0
	ldrne	r2, [r9]
	mov	r0, r10
	addne	r3, r2, r3
	strne	r3, [r9]
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L5:
	mov	r10, #0
	b	.L2
	.size	qedr_prepare_sq_sges, .-qedr_prepare_sq_sges
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
