	.file	"extr_core.c_x86_schedule_events.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	x86_schedule_events
	.type	x86_schedule_events, @function
x86_schedule_events:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	mov	r14, rdi
	push	r13
	push	r12
	push	rbx
	sub	rsp, 72
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	QWORD PTR -96[rbp], rdx
	mov	edi, DWORD PTR X86_PMC_IDX_MAX[rip]
	mov	DWORD PTR -104[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	call	BITS_TO_LONGS@PLT
	mov	rcx, rsp
	cdqe
	lea	rax, 15[0+rax*8]
	mov	rdx, rax
	and	rax, -4096
	sub	rcx, rax
	and	rdx, -16
	mov	rax, rcx
	cmp	rsp, rax
	je	.L3
.L78:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, rax
	jne	.L78
.L3:
	and	edx, 4095
	sub	rsp, rdx
	test	rdx, rdx
	jne	.L79
.L4:
	mov	esi, DWORD PTR X86_PMC_IDX_MAX[rip]
	mov	r15, rsp
	mov	rdi, r15
	call	bitmap_zero@PLT
	mov	eax, DWORD PTR [r14]
	mov	DWORD PTR -100[rbp], eax
	mov	edx, eax
	mov	eax, DWORD PTR 4[r14]
	test	DWORD PTR PERF_PMU_TXN_ADD[rip], eax
	jne	.L80
.L5:
	mov	rax, QWORD PTR x86_pmu[rip+40]
	test	rax, rax
	je	.L6
	mov	rdi, r14
	call	rax
.L6:
	mov	eax, DWORD PTR -104[rbp]
	mov	r12d, DWORD PTR X86_PMC_IDX_MAX[rip]
	test	eax, eax
	jle	.L30
	sub	eax, 1
	mov	DWORD PTR -72[rbp], 0
	xor	r13d, r13d
	mov	QWORD PTR -88[rbp], rax
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L31:
	mov	r13, rax
.L10:
	lea	rax, 0[0+r13*8]
	mov	DWORD PTR -68[rbp], r13d
	mov	QWORD PTR -80[rbp], rax
	mov	rax, QWORD PTR 8[r14]
	mov	rbx, QWORD PTR [rax+r13*8]
	test	rbx, rbx
	setne	dil
	cmp	DWORD PTR -100[rbp], r13d
	setg	al
	xor	edi, eax
	movzx	edi, dil
	call	WARN_ON_ONCE@PLT
	test	rbx, rbx
	mov	esi, DWORD PTR -68[rbp]
	je	.L8
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR PERF_X86_EVENT_DYNAMIC[rip], eax
	je	.L9
.L8:
	mov	rax, QWORD PTR 16[r14]
	lea	rdx, 0[0+r13*8]
	mov	rdi, r14
	mov	rdx, QWORD PTR [rax+rdx]
	call	[QWORD PTR x86_pmu[rip+32]]
	lea	rdx, 0[0+r13*8]
	mov	rbx, rax
	mov	rax, QWORD PTR 8[r14]
	mov	QWORD PTR [rax+rdx], rbx
.L9:
	mov	esi, DWORD PTR 16[rbx]
	mov	edi, r12d
	call	min@PLT
	mov	esi, DWORD PTR 16[rbx]
	mov	edi, DWORD PTR -72[rbp]
	mov	r12d, eax
	call	max@PLT
	mov	DWORD PTR -72[rbp], eax
	lea	rax, 1[r13]
	cmp	r13, QWORD PTR -88[rbp]
	jne	.L31
	xor	r13d, r13d
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L81:
	mov	rsi, QWORD PTR 8[rax]
	call	test_bit@PLT
	test	rax, rax
	je	.L7
	mov	edi, DWORD PTR [rbx]
	mov	rsi, r15
	call	test_bit@PLT
	test	rax, rax
	jne	.L7
	mov	edi, DWORD PTR [rbx]
	mov	rsi, r15
	call	__set_bit@PLT
	mov	rcx, QWORD PTR -96[rbp]
	test	rcx, rcx
	je	.L11
	mov	eax, DWORD PTR [rbx]
	mov	DWORD PTR [rcx+r13*4], eax
.L11:
	mov	eax, DWORD PTR -80[rbp]
	add	eax, 1
	mov	DWORD PTR -68[rbp], eax
	lea	rax, 1[r13]
	cmp	r13, QWORD PTR -88[rbp]
	je	.L7
	mov	r13, rax
.L12:
	mov	rax, QWORD PTR 16[r14]
	mov	DWORD PTR -80[rbp], r13d
	mov	DWORD PTR -68[rbp], r13d
	mov	rbx, QWORD PTR [rax+r13*8]
	mov	rax, QWORD PTR 8[r14]
	mov	edi, DWORD PTR [rbx]
	mov	rax, QWORD PTR [rax+r13*8]
	cmp	edi, -1
	jne	.L81
.L7:
	mov	edx, DWORD PTR -68[rbp]
	cmp	DWORD PTR -104[rbp], edx
	je	.L33
	xor	eax, eax
	mov	ebx, DWORD PTR x86_pmu[rip]
	call	is_ht_workaround_enabled@PLT
	test	rax, rax
	je	.L14
	mov	eax, DWORD PTR 32[r14]
	test	eax, eax
	je	.L82
.L14:
	mov	rdi, QWORD PTR 8[r14]
	mov	r9, QWORD PTR -96[rbp]
	mov	r8d, ebx
	mov	edx, r12d
	mov	ecx, DWORD PTR -72[rbp]
	mov	esi, DWORD PTR -104[rbp]
	call	perf_assign_events@PLT
	test	eax, eax
	mov	ebx, eax
	sete	al
	cmp	QWORD PTR -96[rbp], 0
	je	.L35
.L84:
	test	al, al
	je	.L35
	mov	eax, DWORD PTR -104[rbp]
	test	eax, eax
	jle	.L20
	lea	r13d, -1[rax]
	xor	r12d, r12d
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L34:
	mov	r12, rax
.L22:
	mov	rax, QWORD PTR x86_pmu[rip+24]
	test	rax, rax
	je	.L21
	mov	rcx, QWORD PTR -96[rbp]
	mov	esi, r12d
	mov	rdi, r14
	mov	edx, DWORD PTR [rcx+r12*4]
	call	rax
.L21:
	lea	rax, 1[r12]
	cmp	r13, r12
	jne	.L34
.L20:
	mov	rax, QWORD PTR x86_pmu[rip+8]
	test	rax, rax
	je	.L28
.L18:
	mov	rdi, r14
	call	rax
	test	ebx, ebx
	je	.L28
.L26:
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	mov	rdx, QWORD PTR -56[rbp]
	xor	rdx, QWORD PTR fs:40
	jne	.L83
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa 7, 8
	ret
	.p2align 4,,10
	.p2align 3
.L80:
	.cfi_restore_state
	mov	eax, edx
	mov	edx, DWORD PTR 40[r14]
	sub	eax, edx
	mov	DWORD PTR -100[rbp], eax
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L33:
	xor	ebx, ebx
	cmp	QWORD PTR -96[rbp], 0
	mov	eax, 1
	jne	.L84
.L35:
	mov	edx, DWORD PTR -104[rbp]
	cmp	DWORD PTR -100[rbp], edx
	jge	.L25
	mov	esi, DWORD PTR -104[rbp]
	movsx	rax, DWORD PTR -100[rbp]
	sub	esi, 1
	lea	r12, 0[0+rax*8]
	sub	esi, eax
	lea	r13, 1[rax+rsi]
	sal	r13, 3
	.p2align 4,,10
	.p2align 3
.L24:
	mov	rax, QWORD PTR x86_pmu[rip+16]
	test	rax, rax
	je	.L23
	mov	rdx, QWORD PTR 16[r14]
	mov	rdi, r14
	mov	rsi, QWORD PTR [rdx+r12]
	call	rax
.L23:
	mov	rax, QWORD PTR 8[r14]
	mov	QWORD PTR [rax+r12], 0
	add	r12, 8
	cmp	r13, r12
	jne	.L24
.L25:
	mov	rax, QWORD PTR x86_pmu[rip+8]
	test	rax, rax
	jne	.L18
	test	ebx, ebx
	jne	.L26
	.p2align 4,,10
	.p2align 3
.L28:
	xor	eax, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L79:
	or	QWORD PTR -8[rsp+rdx], 0
	jmp	.L4
.L82:
	mov	rax, QWORD PTR 24[r14]
	mov	edi, DWORD PTR [rax]
	call	READ_ONCE@PLT
	test	rax, rax
	je	.L14
	mov	eax, ebx
	shr	eax, 31
	add	ebx, eax
	sar	ebx
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L30:
	mov	DWORD PTR -72[rbp], 0
	mov	DWORD PTR -68[rbp], 0
	jmp	.L7
.L83:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	x86_schedule_events, .-x86_schedule_events
	.comm	x86_pmu,48,32
	.comm	X86_PMC_IDX_MAX,4,4
	.comm	PERF_X86_EVENT_DYNAMIC,4,4
	.comm	PERF_PMU_TXN_ADD,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_core.c_x86_schedule_events.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	x86_schedule_events
	.syntax unified
	.arm
	.fpu softvfp
	.type	x86_schedule_events, %function
x86_schedule_events:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #44
	ldr	r4, .L76
	ldr	r3, .L76+4
	mov	r5, r0
	str	r2, [fp, #-56]
	str	r1, [fp, #-48]
	ldr	r0, [r4]
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	bl	BITS_TO_LONGS
	lsl	r3, r0, #2
	add	r3, r3, #7
	bic	r3, r3, #7
	sub	sp, sp, r3
	add	r10, sp, #8
	mov	r0, r10
	ldr	r1, [r4]
	bl	bitmap_zero
	ldr	r3, .L76+8
	ldr	r2, [r5, #4]
	ldr	r3, [r3]
	ldr	r9, [r5]
	tst	r2, r3
	ldrne	r3, [r5, #24]
	subne	r9, r9, r3
	ldr	r3, .L76+12
	ldr	r3, [r3, #20]
	cmp	r3, #0
	beq	.L3
	mov	r0, r5
	blx	r3
.L3:
	ldr	r3, [fp, #-48]
	ldr	r4, [r4]
	cmp	r3, #0
	str	r4, [fp, #-52]
	ble	.L27
	mov	r8, #0
	ldr	r7, .L76+16
	mov	r6, r8
	str	r9, [fp, #-52]
	str	r10, [fp, #-60]
	b	.L7
.L28:
	mov	r6, r3
.L7:
	ldr	r3, [fp, #-52]
	lsl	r10, r6, #2
	cmp	r3, r6
	movle	r0, #0
	movgt	r0, #1
	ldr	r3, [r5, #8]
	ldr	r9, [r3, r6, lsl #2]
	cmp	r9, #0
	eorne	r0, r0, #1
	bl	WARN_ON_ONCE
	cmp	r9, #0
	beq	.L5
	ldr	r1, [r9]
	ldr	r2, [r7]
	tst	r1, r2
	beq	.L6
.L5:
	ldr	r2, [r5, #12]
	ldr	r3, .L76+12
	ldr	r2, [r2, r10]
	mov	r1, r6
	mov	r0, r5
	ldr	r3, [r3, #16]
	blx	r3
	mov	r9, r0
	ldr	r2, [r5, #8]
	str	r0, [r2, r10]
.L6:
	mov	r0, r4
	ldr	r1, [r9, #8]
	bl	min
	ldr	r1, [r9, #8]
	mov	r4, r0
	mov	r0, r8
	bl	max
	ldr	r2, [fp, #-48]
	add	r3, r6, #1
	cmp	r2, r3
	mov	r8, r0
	bne	.L28
	ldr	r9, [fp, #-52]
	ldr	r10, [fp, #-60]
	str	r4, [fp, #-52]
	str	r9, [fp, #-60]
	mov	r4, #0
	ldr	r9, [fp, #-56]
	str	r0, [fp, #-64]
	b	.L9
.L73:
	ldr	r1, [r3, #4]
	bl	test_bit
	cmp	r0, #0
	beq	.L69
	mov	r1, r10
	ldr	r0, [r7]
	bl	test_bit
	subs	r8, r0, #0
	bne	.L69
	mov	r1, r10
	ldr	r0, [r7]
	bl	__set_bit
	cmp	r9, #0
	ldrne	r3, [r7]
	strne	r3, [r9, r4, lsl #2]
	cmp	r4, r6
	add	r4, r4, #1
	beq	.L72
.L9:
	ldr	r2, [r5, #12]
	ldr	r3, [r5, #8]
	ldr	r7, [r2, r4, lsl #2]
	ldr	r3, [r3, r4, lsl #2]
	ldr	r0, [r7]
	cmn	r0, #1
	bne	.L73
.L69:
	ldr	r9, [fp, #-60]
.L4:
	ldr	r3, [fp, #-48]
	cmp	r3, r4
	beq	.L30
	ldr	r3, .L76+12
	ldr	r4, [r3]
	bl	is_ht_workaround_enabled
	cmp	r0, #0
	beq	.L13
	ldr	r3, [r5, #20]
	cmp	r3, #0
	beq	.L74
.L13:
	ldr	r3, [fp, #-56]
	str	r4, [sp]
	str	r3, [sp, #4]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-64]
	ldr	r1, [fp, #-48]
	ldr	r0, [r5, #8]
	bl	perf_assign_events
	clz	r3, r0
	mov	r8, r0
	lsr	r3, r3, #5
	b	.L12
.L30:
	mov	r3, #1
	mov	r8, #0
.L12:
	ldr	r2, [fp, #-56]
	cmp	r2, #0
	moveq	r3, #0
	cmp	r3, #0
	beq	.L11
	ldr	r3, [fp, #-48]
	cmp	r3, #0
	ble	.L18
.L10:
	mov	r4, #0
	ldr	r6, [fp, #-48]
	ldr	r7, [fp, #-56]
.L20:
	ldr	r3, .L76+12
	ldr	r3, [r3, #12]
	cmp	r3, #0
	beq	.L19
	mov	r1, r4
	mov	r0, r5
	ldr	r2, [r7, r4, lsl #2]
	blx	r3
.L19:
	add	r4, r4, #1
	cmp	r6, r4
	bne	.L20
.L18:
	ldr	r3, .L76+12
	ldr	r3, [r3, #4]
	cmp	r3, #0
	beq	.L25
.L16:
	mov	r0, r5
	blx	r3
	cmp	r8, #0
	beq	.L25
.L23:
	ldr	r3, .L76+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
.L1:
	ldr	r3, .L76+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L75
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L72:
	ldr	r3, [fp, #-56]
	ldr	r9, [fp, #-60]
	cmp	r3, #0
	bne	.L10
.L11:
	ldr	r7, [fp, #-48]
	cmp	r9, r7
	bge	.L22
	mov	r4, #0
.L15:
	ldr	r3, .L76+12
	lsl	r6, r9, #2
	ldr	r3, [r3, #8]
	cmp	r3, #0
	beq	.L21
	ldr	r2, [r5, #12]
	mov	r0, r5
	ldr	r1, [r2, r9, lsl #2]
	blx	r3
.L21:
	ldr	r3, [r5, #8]
	add	r9, r9, #1
	cmp	r7, r9
	str	r4, [r3, r6]
	bne	.L15
.L22:
	ldr	r3, .L76+12
	ldr	r3, [r3, #4]
	cmp	r3, #0
	bne	.L16
	cmp	r8, #0
	bne	.L23
.L25:
	mov	r0, #0
	b	.L1
.L74:
	ldr	r3, [r5, #16]
	ldr	r0, [r3]
	bl	READ_ONCE
	cmp	r0, #0
	addne	r4, r4, r4, lsr #31
	asrne	r4, r4, #1
	b	.L13
.L27:
	mov	r3, #0
	mov	r4, r3
	str	r3, [fp, #-64]
	b	.L4
.L75:
	bl	__stack_chk_fail
.L77:
	.align	2
.L76:
	.word	X86_PMC_IDX_MAX
	.word	.LC0
	.word	PERF_PMU_TXN_ADD
	.word	x86_pmu
	.word	PERF_X86_EVENT_DYNAMIC
	.word	EINVAL
	.size	x86_schedule_events, .-x86_schedule_events
	.comm	x86_pmu,24,4
	.comm	X86_PMC_IDX_MAX,4,4
	.comm	PERF_X86_EVENT_DYNAMIC,4,4
	.comm	PERF_PMU_TXN_ADD,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
