	.file	"extr_tg3.c_tg3_adjust_link.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	tg3_adjust_link, @function
tg3_adjust_link:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	netdev_priv@PLT
	mov	rbp, rax
	mov	esi, DWORD PTR 56[rax]
	mov	edi, DWORD PTR 60[rax]
	lea	r13, 16[rbp]
	call	mdiobus_get_phy@PLT
	mov	rdi, r13
	mov	rbx, rax
	call	spin_lock_bh@PLT
	mov	eax, DWORD PTR 0[rbp]
	mov	r12d, DWORD PTR MAC_MODE_PORT_MODE_MASK[rip]
	or	r12d, DWORD PTR MAC_MODE_HALF_DUPLEX[rip]
	mov	r14, QWORD PTR 24[rbp]
	not	r12d
	and	r12d, eax
	cmp	QWORD PTR [rbx], 0
	je	.L2
	mov	rax, QWORD PTR 8[rbx]
	cmp	rax, QWORD PTR SPEED_100[rip]
	je	.L20
	cmp	rax, QWORD PTR SPEED_10[rip]
	je	.L20
	cmp	rax, QWORD PTR SPEED_1000[rip]
	jne	.L6
.L7:
	mov	rax, QWORD PTR DUPLEX_HALF[rip]
	or	r12d, DWORD PTR MAC_MODE_PORT_MODE_GMII[rip]
	cmp	QWORD PTR 16[rbx], rax
	je	.L22
.L8:
	mov	edi, DWORD PTR 48[rbp]
	call	mii_advertise_flowctrl@PLT
	xor	edx, edx
	cmp	QWORD PTR 32[rbx], 0
	mov	esi, eax
	je	.L10
	mov	edx, DWORD PTR LPA_PAUSE_CAP[rip]
.L10:
	cmp	QWORD PTR 24[rbx], 0
	je	.L9
	or	edx, DWORD PTR LPA_PAUSE_ASYM[rip]
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L2:
	or	r12d, DWORD PTR MAC_MODE_PORT_MODE_GMII[rip]
.L11:
	cmp	eax, r12d
	je	.L12
	mov	DWORD PTR 0[rbp], r12d
	mov	edi, DWORD PTR MAC_MODE[rip]
	mov	esi, r12d
	call	tw32_f@PLT
	mov	edi, 40
	call	udelay@PLT
.L12:
	mov	rdi, rbp
	call	tg3_asic_rev@PLT
	cmp	rax, QWORD PTR ASIC_REV_5785[rip]
	je	.L23
.L13:
	mov	ecx, DWORD PTR TX_LENGTHS_IPG_CRS_SHIFT[rip]
	mov	esi, 2
	mov	eax, 6
	mov	edi, DWORD PTR MAC_TX_LENGTHS[rip]
	sal	esi, cl
	mov	ecx, DWORD PTR TX_LENGTHS_IPG_SHIFT[rip]
	sal	eax, cl
	mov	ecx, DWORD PTR TX_LENGTHS_SLOT_TIME_SHIFT[rip]
	or	esi, eax
	mov	rax, QWORD PTR SPEED_1000[rip]
	cmp	QWORD PTR 8[rbx], rax
	jne	.L15
	mov	rax, QWORD PTR DUPLEX_HALF[rip]
	cmp	QWORD PTR 16[rbx], rax
	je	.L24
.L15:
	mov	eax, 32
	sal	eax, cl
	or	esi, eax
	call	tw32@PLT
.L16:
	mov	rax, QWORD PTR [rbx]
	mov	rdx, QWORD PTR 8[rbx]
	mov	rcx, QWORD PTR 16[rbx]
	cmp	rax, QWORD PTR 8[rbp]
	je	.L25
.L17:
	mov	QWORD PTR 8[rbp], rax
	mov	rdi, r13
	mov	QWORD PTR 32[rbp], rdx
	mov	QWORD PTR 40[rbp], rcx
	call	spin_unlock_bh@PLT
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, rbp
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	tg3_link_report@PLT
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	rdi, rbp
	call	tg3_asic_rev@PLT
	cmp	rax, QWORD PTR ASIC_REV_5785[rip]
	jne	.L7
	.p2align 4,,10
	.p2align 3
.L20:
	mov	rax, QWORD PTR DUPLEX_HALF[rip]
	or	r12d, DWORD PTR MAC_MODE_PORT_MODE_MII[rip]
	cmp	QWORD PTR 16[rbx], rax
	jne	.L8
.L22:
	or	r12d, DWORD PTR MAC_MODE_HALF_DUPLEX[rip]
	xor	edx, edx
	xor	esi, esi
.L9:
	mov	rdi, rbp
	call	tg3_setup_flow_control@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L25:
	cmp	QWORD PTR 32[rbp], rdx
	jne	.L17
	cmp	QWORD PTR 40[rbp], rcx
	jne	.L17
	cmp	QWORD PTR 24[rbp], r14
	jne	.L17
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, r13
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	spin_unlock_bh@PLT
	.p2align 4,,10
	.p2align 3
.L23:
	.cfi_restore_state
	mov	esi, DWORD PTR MAC_MI_STAT_LNKSTAT_ATTN_ENAB[rip]
	mov	edi, DWORD PTR MAC_MI_STAT[rip]
	mov	rax, QWORD PTR SPEED_10[rip]
	cmp	QWORD PTR 8[rbx], rax
	je	.L26
	call	tw32@PLT
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L24:
	mov	eax, 255
	sal	eax, cl
	or	esi, eax
	call	tw32@PLT
	jmp	.L16
	.p2align 4,,10
	.p2align 3
.L26:
	or	esi, DWORD PTR MAC_MI_STAT_10MBPS_MODE[rip]
	call	tw32@PLT
	jmp	.L13
	.cfi_endproc
.LFE0:
	.size	tg3_adjust_link, .-tg3_adjust_link
	.comm	TX_LENGTHS_SLOT_TIME_SHIFT,4,4
	.comm	TX_LENGTHS_IPG_SHIFT,4,4
	.comm	TX_LENGTHS_IPG_CRS_SHIFT,4,4
	.comm	SPEED_1000,8,8
	.comm	SPEED_100,8,8
	.comm	SPEED_10,8,8
	.comm	MAC_TX_LENGTHS,4,4
	.comm	MAC_MODE_PORT_MODE_MII,4,4
	.comm	MAC_MODE_PORT_MODE_MASK,4,4
	.comm	MAC_MODE_PORT_MODE_GMII,4,4
	.comm	MAC_MODE_HALF_DUPLEX,4,4
	.comm	MAC_MODE,4,4
	.comm	MAC_MI_STAT_LNKSTAT_ATTN_ENAB,4,4
	.comm	MAC_MI_STAT_10MBPS_MODE,4,4
	.comm	MAC_MI_STAT,4,4
	.comm	LPA_PAUSE_CAP,4,4
	.comm	LPA_PAUSE_ASYM,4,4
	.comm	DUPLEX_HALF,8,8
	.comm	ASIC_REV_5785,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tg3.c_tg3_adjust_link.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tg3_adjust_link, %function
tg3_adjust_link:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	bl	netdev_priv
	mov	r4, r0
	ldr	r1, [r0, #28]
	ldr	r0, [r0, #32]
	bl	mdiobus_get_phy
	mov	r5, r0
	add	r7, r4, #8
	mov	r0, r7
	bl	spin_lock_bh
	ldr	fp, .L28
	ldr	r3, .L28+4
	ldr	r1, [r5]
	ldr	r6, [r3]
	ldr	r2, [fp]
	ldr	r3, [r4]
	orr	r6, r6, r2
	cmp	r1, #0
	ldr	r8, [r4, #12]
	bic	r6, r3, r6
	beq	.L2
	ldr	r2, .L28+8
	ldr	r3, [r5, #4]
	ldr	r2, [r2]
	cmp	r3, r2
	beq	.L3
	ldr	r2, .L28+12
	ldr	r2, [r2]
	cmp	r3, r2
	beq	.L3
	ldr	r9, .L28+16
	ldr	r2, [r9]
	cmp	r3, r2
	bne	.L6
	ldr	r10, .L28+20
.L7:
	ldr	r3, .L28+24
	ldr	r3, [r3]
	orr	r6, r6, r3
	b	.L5
.L2:
	ldr	r2, .L28+24
	ldr	r9, .L28+16
	ldr	r2, [r2]
	ldr	r10, .L28+20
	orr	r6, r6, r2
.L11:
	cmp	r3, r6
	beq	.L12
	ldr	r3, .L28+28
	mov	r1, r6
	ldr	r0, [r3]
	str	r6, [r4]
	bl	tw32_f
	mov	r0, #40
	bl	udelay
.L12:
	mov	r0, r4
	bl	tg3_asic_rev
	ldr	r3, [r10]
	cmp	r0, r3
	bne	.L13
	ldr	r3, .L28+12
	ldr	r1, [r5, #4]
	ldr	r3, [r3]
	ldr	r2, .L28+32
	cmp	r1, r3
	ldr	r3, .L28+36
	ldr	r0, [r2]
	ldr	r1, [r3]
	ldreq	r3, .L28+40
	ldreq	r3, [r3]
	orreq	r1, r1, r3
	bl	tw32
.L13:
	mov	r1, #6
	mov	r0, #2
	ldr	r3, [r9]
	ldr	ip, [r5, #4]
	ldr	r2, .L28+44
	cmp	ip, r3
	ldr	r3, .L28+48
	ldr	r2, [r2]
	ldr	r3, [r3]
	lsl	r1, r1, r2
	orr	r1, r1, r0, lsl r3
	ldr	r2, .L28+52
	ldr	r3, .L28+56
	ldr	r0, [r2]
	ldr	r3, [r3]
	bne	.L15
	ldr	r2, .L28+60
	ldr	ip, [r5, #8]
	ldr	r2, [r2]
	cmp	ip, r2
	beq	.L26
.L15:
	mov	r2, #32
	orr	r1, r1, r2, lsl r3
	bl	tw32
.L16:
	ldr	r1, [r4, #4]
	ldr	r3, [r5]
	ldr	r2, [r5, #4]
	cmp	r3, r1
	ldr	r1, [r5, #8]
	beq	.L27
.L17:
	mov	r0, r7
	str	r3, [r4, #4]
	str	r2, [r4, #16]
	str	r1, [r4, #20]
	bl	spin_unlock_bh
	mov	r0, r4
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	tg3_link_report
.L3:
	ldr	r3, .L28+64
	ldr	r9, .L28+16
	ldr	r3, [r3]
	ldr	r10, .L28+20
	orr	r6, r6, r3
.L5:
	ldr	r3, .L28+60
	ldr	r2, [r5, #8]
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L8
	mov	r2, #0
	mov	r1, r2
	ldr	r3, [fp]
	orr	r6, r6, r3
.L9:
	mov	r0, r4
	bl	tg3_setup_flow_control
	ldr	r3, [r4]
	b	.L11
.L27:
	ldr	r0, [r4, #16]
	cmp	r0, r2
	bne	.L17
	ldr	r0, [r4, #20]
	cmp	r0, r1
	bne	.L17
	ldr	r0, [r4, #12]
	cmp	r0, r8
	bne	.L17
	mov	r0, r7
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	spin_unlock_bh
.L8:
	ldr	r0, [r4, #24]
	bl	mii_advertise_flowctrl
	ldr	r2, [r5, #16]
	mov	r1, r0
	cmp	r2, #0
	ldrne	r3, .L28+68
	ldrne	r2, [r3]
	ldr	r3, [r5, #12]
	cmp	r3, #0
	ldrne	r3, .L28+72
	ldrne	r3, [r3]
	orrne	r2, r2, r3
	b	.L9
.L6:
	mov	r0, r4
	bl	tg3_asic_rev
	ldr	r10, .L28+20
	ldr	r3, [r10]
	cmp	r0, r3
	bne	.L7
	ldr	r3, .L28+64
	ldr	r3, [r3]
	orr	r6, r6, r3
	b	.L5
.L26:
	mov	r2, #255
	orr	r1, r1, r2, lsl r3
	bl	tw32
	b	.L16
.L29:
	.align	2
.L28:
	.word	MAC_MODE_HALF_DUPLEX
	.word	MAC_MODE_PORT_MODE_MASK
	.word	SPEED_100
	.word	SPEED_10
	.word	SPEED_1000
	.word	ASIC_REV_5785
	.word	MAC_MODE_PORT_MODE_GMII
	.word	MAC_MODE
	.word	MAC_MI_STAT
	.word	MAC_MI_STAT_LNKSTAT_ATTN_ENAB
	.word	MAC_MI_STAT_10MBPS_MODE
	.word	TX_LENGTHS_IPG_SHIFT
	.word	TX_LENGTHS_IPG_CRS_SHIFT
	.word	MAC_TX_LENGTHS
	.word	TX_LENGTHS_SLOT_TIME_SHIFT
	.word	DUPLEX_HALF
	.word	MAC_MODE_PORT_MODE_MII
	.word	LPA_PAUSE_CAP
	.word	LPA_PAUSE_ASYM
	.size	tg3_adjust_link, .-tg3_adjust_link
	.comm	TX_LENGTHS_SLOT_TIME_SHIFT,4,4
	.comm	TX_LENGTHS_IPG_SHIFT,4,4
	.comm	TX_LENGTHS_IPG_CRS_SHIFT,4,4
	.comm	SPEED_1000,4,4
	.comm	SPEED_100,4,4
	.comm	SPEED_10,4,4
	.comm	MAC_TX_LENGTHS,4,4
	.comm	MAC_MODE_PORT_MODE_MII,4,4
	.comm	MAC_MODE_PORT_MODE_MASK,4,4
	.comm	MAC_MODE_PORT_MODE_GMII,4,4
	.comm	MAC_MODE_HALF_DUPLEX,4,4
	.comm	MAC_MODE,4,4
	.comm	MAC_MI_STAT_LNKSTAT_ATTN_ENAB,4,4
	.comm	MAC_MI_STAT_10MBPS_MODE,4,4
	.comm	MAC_MI_STAT,4,4
	.comm	LPA_PAUSE_CAP,4,4
	.comm	LPA_PAUSE_ASYM,4,4
	.comm	DUPLEX_HALF,4,4
	.comm	ASIC_REV_5785,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
