	.file	"extr_elfxx-ia64.c_elfNN_ia64_relax_br.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	elfNN_ia64_relax_br, @function
elfNN_ia64_relax_br:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movsx	rsi, esi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	lea	r12, [rdi+rsi*4]
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	and	ebx, 3
	lea	rax, 0[0+rbx*4]
	sub	r12, rax
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rdi, r12
	lea	r15, 32[r12]
	call	bfd_getl64@PLT
	mov	rdi, r15
	mov	ebp, eax
	call	bfd_getl64@PLT
	mov	ecx, 46
	mov	edx, ebp
	mov	r14d, ebp
	sar	edx, cl
	mov	r13d, ebp
	and	r14d, 30
	mov	ecx, edx
	mov	edx, eax
	sar	r13d, 5
	sal	edx, 18
	sar	eax, 23
	or	edx, ecx
	cmp	rbx, 1
	je	.L2
	cmp	rbx, 2
	je	.L3
	test	rbx, rbx
	je	.L70
	xor	eax, eax
	call	abort@PLT
.L8:
	mov	edi, r13d
	call	IS_BR_COND@PLT
	test	rax, rax
	je	.L27
.L22:
	mov	edi, ebp
	and	edi, 1
	lea	eax, 4[rdi]
	cmp	r14d, 22
	je	.L26
.L23:
	mov	edi, ebp
	and	edi, -32
.L25:
	mov	rsi, r12
	or	edi, eax
	call	bfd_putl64@PLT
	mov	edi, r13d
	mov	rsi, r15
	sal	edi, 23
	call	bfd_putl64@PLT
	mov	eax, DWORD PTR TRUE[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L70:
	.cfi_restore_state
	mov	edi, edx
	mov	DWORD PTR 8[rsp], eax
	call	IS_NOP_B@PLT
	mov	r8d, DWORD PTR 8[rsp]
	test	eax, eax
	jne	.L5
.L14:
	mov	eax, DWORD PTR FALSE[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	cmp	r14d, 16
	je	.L71
	cmp	r14d, 18
	je	.L15
	cmp	r14d, 22
	je	.L72
	cmp	r14d, 24
	je	.L73
	cmp	r14d, 28
	jne	.L14
	mov	edi, edx
	mov	DWORD PTR 8[rsp], eax
	call	IS_NOP_F@PLT
	mov	r8d, DWORD PTR 8[rsp]
	test	eax, eax
	je	.L14
.L10:
	mov	edi, r8d
	mov	DWORD PTR 8[rsp], r8d
	call	IS_BR_COND@PLT
	mov	r8d, DWORD PTR 8[rsp]
	test	rax, rax
	je	.L74
	mov	edi, ebp
	mov	r13d, r8d
	and	edi, 1
	lea	eax, 4[rdi]
	jmp	.L23
	.p2align 4,,10
	.p2align 3
.L2:
	cmp	r14d, 18
	je	.L75
	cmp	r14d, 22
	jne	.L14
	mov	edi, r13d
	mov	DWORD PTR 12[rsp], eax
	mov	DWORD PTR 8[rsp], edx
	call	IS_NOP_B@PLT
	test	eax, eax
	je	.L14
	mov	r8d, DWORD PTR 12[rsp]
	mov	edi, r8d
	call	IS_NOP_B@PLT
	mov	edx, DWORD PTR 8[rsp]
	test	eax, eax
	je	.L14
.L12:
	mov	edi, edx
	mov	DWORD PTR 8[rsp], edx
	call	IS_BR_COND@PLT
	mov	edx, DWORD PTR 8[rsp]
	test	rax, rax
	je	.L76
	mov	edi, ebp
	mov	r13d, edx
	and	edi, 1
	lea	eax, 4[rdi]
	.p2align 4,,10
	.p2align 3
.L26:
	xor	edi, edi
	test	rbx, rbx
	je	.L24
	mov	edi, DWORD PTR PREDICATE_BITS[rip]
	sal	edi, 5
	and	edi, ebp
.L24:
	mov	ecx, DWORD PTR X4_SHIFT[rip]
	mov	ebp, 1
	add	ecx, 5
	sal	rbp, cl
	or	edi, ebp
	jmp	.L25
	.p2align 4,,10
	.p2align 3
.L5:
	mov	edi, r8d
	call	IS_NOP_B@PLT
	test	eax, eax
	jne	.L8
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L74:
	mov	r13d, r8d
.L27:
	mov	edi, r13d
	call	IS_BR_CALL@PLT
	test	rax, rax
	jne	.L22
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L71:
	mov	edi, edx
	mov	DWORD PTR 8[rsp], eax
	call	IS_NOP_I@PLT
	test	eax, eax
	je	.L14
.L68:
	mov	r8d, DWORD PTR 8[rsp]
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L75:
	mov	edi, eax
	mov	DWORD PTR 8[rsp], edx
	call	IS_NOP_B@PLT
	mov	edx, DWORD PTR 8[rsp]
	test	eax, eax
	je	.L14
	mov	r8d, edx
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L15:
	mov	edi, edx
	mov	DWORD PTR 8[rsp], eax
	call	IS_NOP_B@PLT
	test	eax, eax
	je	.L14
	jmp	.L68
	.p2align 4,,10
	.p2align 3
.L72:
	mov	edi, r13d
	mov	DWORD PTR 8[rsp], edx
	mov	DWORD PTR 12[rsp], eax
	call	IS_NOP_B@PLT
	mov	edx, DWORD PTR 8[rsp]
	mov	r8d, DWORD PTR 12[rsp]
	test	eax, eax
	je	.L14
	mov	edi, edx
	mov	DWORD PTR 8[rsp], r8d
	call	IS_NOP_B@PLT
	test	eax, eax
	je	.L14
	mov	r8d, DWORD PTR 8[rsp]
	mov	edx, r8d
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L73:
	mov	edi, edx
	mov	DWORD PTR 8[rsp], eax
	call	IS_NOP_M@PLT
	test	eax, eax
	je	.L14
	jmp	.L68
	.p2align 4,,10
	.p2align 3
.L76:
	mov	r13d, edx
	jmp	.L27
	.cfi_endproc
.LFE0:
	.size	elfNN_ia64_relax_br, .-elfNN_ia64_relax_br
	.comm	X4_SHIFT,4,4
	.comm	TRUE,4,4
	.comm	PREDICATE_BITS,4,4
	.comm	FALSE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_elfxx-ia64.c_elfNN_ia64_relax_br.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	elfNN_ia64_relax_br, %function
elfNN_ia64_relax_br:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	and	r6, r0, #3
	add	r0, r0, r1, lsl #2
	sub	r4, r0, r6, lsl #2
	mov	r0, r4
	bl	bfd_getl64
	add	r8, r4, #32
	mov	r7, r0
	mov	r0, r8
	bl	bfd_getl64
	mov	r9, #46
	lsl	r3, r0, #18
	cmp	r6, #1
	asr	r5, r0, #23
	orr	r9, r3, r7, asr r9
	and	r10, r7, #30
	asr	fp, r7, #5
	beq	.L2
	cmp	r6, #2
	beq	.L3
	cmp	r6, #0
	beq	.L71
	bl	abort
.L8:
	mov	r0, fp
	bl	IS_BR_COND
	cmp	r0, #0
	beq	.L27
	and	r3, r7, #1
	cmp	r10, #22
	add	r3, r3, #4
	beq	.L26
.L23:
	bic	r0, r7, #31
.L25:
	mov	r1, r4
	orr	r0, r0, r3
	bl	bfd_putl64
	mov	r1, r8
	lsl	r0, fp, #23
	bl	bfd_putl64
	ldr	r3, .L76
	ldr	r0, [r3]
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L71:
	mov	r0, r9
	bl	IS_NOP_B
	cmp	r0, #0
	bne	.L5
.L14:
	ldr	r3, .L76+4
	ldr	r0, [r3]
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	cmp	r10, #16
	beq	.L72
	cmp	r10, #18
	beq	.L15
	cmp	r10, #22
	beq	.L73
	cmp	r10, #24
	beq	.L74
	cmp	r10, #28
	bne	.L14
	mov	r0, r9
	bl	IS_NOP_F
	cmp	r0, #0
	beq	.L14
.L10:
	mov	r0, r5
	bl	IS_BR_COND
	cmp	r0, #0
	andne	r3, r7, #1
	movne	fp, r5
	addne	r3, r3, #4
	bne	.L23
	mov	fp, r5
.L27:
	mov	r0, fp
	bl	IS_BR_CALL
	cmp	r0, #0
	beq	.L14
	and	r3, r7, #1
	cmp	r10, #22
	add	r3, r3, #4
	bne	.L23
.L26:
	mov	r0, #1
	cmp	r6, #0
	ldrne	r2, .L76+8
	ldrne	r6, [r2]
	ldr	r2, .L76+12
	andne	r6, r7, r6, lsl #5
	ldr	r7, [r2]
	add	r7, r7, #5
	orr	r0, r6, r0, lsl r7
	b	.L25
.L2:
	cmp	r10, #18
	beq	.L75
	cmp	r10, #22
	bne	.L14
	mov	r0, fp
	bl	IS_NOP_B
	cmp	r0, #0
	beq	.L14
	mov	r0, r5
	bl	IS_NOP_B
	cmp	r0, #0
	beq	.L14
.L12:
	mov	r0, r9
	bl	IS_BR_COND
	cmp	r0, #0
	andne	r3, r7, #1
	movne	fp, r9
	addne	r3, r3, #4
	bne	.L26
	mov	fp, r9
	b	.L27
.L5:
	mov	r0, r5
	bl	IS_NOP_B
	cmp	r0, #0
	bne	.L8
	b	.L14
.L72:
	mov	r0, r9
	bl	IS_NOP_I
	cmp	r0, #0
	beq	.L14
	b	.L10
.L75:
	mov	r0, r5
	bl	IS_NOP_B
	cmp	r0, #0
	beq	.L14
	mov	r5, r9
	b	.L10
.L15:
	mov	r0, r9
	bl	IS_NOP_B
	cmp	r0, #0
	beq	.L14
	b	.L10
.L73:
	mov	r0, fp
	bl	IS_NOP_B
	cmp	r0, #0
	beq	.L14
	mov	r0, r9
	bl	IS_NOP_B
	cmp	r0, #0
	movne	r9, r5
	bne	.L12
	b	.L14
.L74:
	mov	r0, r9
	bl	IS_NOP_M
	cmp	r0, #0
	beq	.L14
	b	.L10
.L77:
	.align	2
.L76:
	.word	TRUE
	.word	FALSE
	.word	PREDICATE_BITS
	.word	X4_SHIFT
	.size	elfNN_ia64_relax_br, .-elfNN_ia64_relax_br
	.comm	X4_SHIFT,4,4
	.comm	TRUE,4,4
	.comm	PREDICATE_BITS,4,4
	.comm	FALSE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
