	.file	"extr_tc-mips.c_mips_cpu_info_from_isa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mips_cpu_info_from_isa, @function
mips_cpu_info_from_isa:
.LFB0:
	.cfi_startproc
	endbr64
	mov	rax, QWORD PTR mips_cpu_info_table[rip]
	mov	r8, QWORD PTR 8[rax]
	test	r8, r8
	je	.L1
	mov	edx, DWORD PTR MIPS_CPU_IS_ISA[rip]
	.p2align 4,,10
	.p2align 3
.L4:
	mov	r8, rax
	test	DWORD PTR [rax], edx
	je	.L3
	cmp	DWORD PTR 4[rax], edi
	je	.L1
.L3:
	mov	r8, QWORD PTR 24[rax]
	add	rax, 16
	test	r8, r8
	jne	.L4
.L1:
	mov	rax, r8
	ret
	.cfi_endproc
.LFE0:
	.size	mips_cpu_info_from_isa, .-mips_cpu_info_from_isa
	.comm	mips_cpu_info_table,8,8
	.comm	MIPS_CPU_IS_ISA,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tc-mips.c_mips_cpu_info_from_isa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mips_cpu_info_from_isa, %function
mips_cpu_info_from_isa:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r3, .L15
	mov	ip, r0
	ldr	r3, [r3]
	ldr	r0, [r3, #8]
	cmp	r0, #0
	bxeq	lr
	ldr	r2, .L15+4
	ldr	r1, [r2]
	b	.L4
.L3:
	ldr	r0, [r3, #20]
	add	r3, r3, #12
	cmp	r0, #0
	bxeq	lr
.L4:
	ldr	r2, [r3]
	tst	r1, r2
	beq	.L3
	ldr	r2, [r3, #4]
	cmp	r2, ip
	bne	.L3
	mov	r0, r3
	bx	lr
.L16:
	.align	2
.L15:
	.word	mips_cpu_info_table
	.word	MIPS_CPU_IS_ISA
	.size	mips_cpu_info_from_isa, .-mips_cpu_info_from_isa
	.comm	mips_cpu_info_table,4,4
	.comm	MIPS_CPU_IS_ISA,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
