	.file	"extr_amdgpu_pm.c_amdgpu_set_pp_dpm_fclk.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	amdgpu_set_pp_dpm_fclk, @function
amdgpu_set_pp_dpm_fclk:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdx
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	rbx, rcx
	sub	rsp, 16
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	dev_get_drvdata@PLT
	lea	rdx, 4[rsp]
	mov	rsi, rbx
	mov	rdi, rbp
	mov	r12, QWORD PTR [rax]
	mov	DWORD PTR 4[rsp], 0
	call	amdgpu_read_mask@PLT
	test	eax, eax
	je	.L12
.L1:
	mov	rsi, QWORD PTR 8[rsp]
	xor	rsi, QWORD PTR fs:40
	jne	.L13
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	rdi, r12
	call	is_support_sw_smu@PLT
	test	rax, rax
	jne	.L14
	mov	rax, QWORD PTR [r12]
	cmp	QWORD PTR [rax], 0
	jne	.L15
.L5:
	mov	eax, ebx
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L15:
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR PP_FCLK[rip]
	mov	rdi, r12
	call	amdgpu_dpm_force_clock_level@PLT
.L4:
	test	eax, eax
	je	.L5
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR SMU_FCLK[rip]
	lea	rdi, 8[r12]
	call	smu_force_clk_levels@PLT
	jmp	.L4
.L13:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	amdgpu_set_pp_dpm_fclk, .-amdgpu_set_pp_dpm_fclk
	.comm	SMU_FCLK,4,4
	.comm	PP_FCLK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amdgpu_pm.c_amdgpu_set_pp_dpm_fclk.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	amdgpu_set_pp_dpm_fclk, %function
amdgpu_set_pp_dpm_fclk:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, lr}
	mov	r4, r3
	ldr	r3, .L19
	sub	sp, sp, #12
	mov	r5, r2
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	dev_get_drvdata
	mov	r3, #0
	mov	ip, r0
	mov	r1, r4
	mov	r0, r5
	mov	r2, sp
	ldr	r5, [ip]
	str	r3, [sp]
	bl	amdgpu_read_mask
	cmp	r0, #0
	beq	.L15
.L1:
	ldr	r3, .L19
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L16
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, pc}
.L15:
	mov	r0, r5
	bl	is_support_sw_smu
	cmp	r0, #0
	bne	.L17
	ldr	r3, [r5]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L18
.L5:
	mov	r0, r4
	b	.L1
.L17:
	ldr	r3, .L19+4
	ldr	r2, [sp]
	ldr	r1, [r3]
	add	r0, r5, #4
	bl	smu_force_clk_levels
.L4:
	cmp	r0, #0
	beq	.L5
	ldr	r3, .L19+8
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L18:
	ldr	r3, .L19+12
	mov	r0, r5
	ldr	r1, [r3]
	ldr	r2, [sp]
	bl	amdgpu_dpm_force_clock_level
	b	.L4
.L16:
	bl	__stack_chk_fail
.L20:
	.align	2
.L19:
	.word	.LC0
	.word	SMU_FCLK
	.word	EINVAL
	.word	PP_FCLK
	.size	amdgpu_set_pp_dpm_fclk, .-amdgpu_set_pp_dpm_fclk
	.comm	SMU_FCLK,4,4
	.comm	PP_FCLK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
