	.file	"extr_marvell_nand.c_marvell_nfc_hw_ecc_bch_read_page.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	marvell_nfc_hw_ecc_bch_read_page, @function
marvell_nfc_hw_ecc_bch_read_page:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15d, edx
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 88
	.cfi_def_cfa_offset 144
	mov	QWORD PTR 48[rsp], rsi
	mov	DWORD PTR 32[rsp], ecx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 72[rsp], rax
	xor	eax, eax
	call	nand_to_mtd@PLT
	mov	rdi, rbp
	mov	r13, rax
	call	to_marvell_nand@PLT
	mov	r8, QWORD PTR 0[rbp]
	mov	esi, DWORD PTR 8[rbp]
	mov	rdi, rbp
	mov	r12, QWORD PTR [rax]
	mov	QWORD PTR 8[rsp], r8
	mov	ebx, DWORD PTR [r12]
	mov	r14d, DWORD PTR 4[r12]
	mov	DWORD PTR 68[rsp], 0
	call	marvell_nfc_select_target@PLT
	test	r15d, r15d
	mov	r8, QWORD PTR 8[rsp]
	jne	.L38
.L2:
	mov	rdi, rbp
	mov	QWORD PTR 8[rsp], r8
	call	marvell_nfc_enable_hw_ecc@PLT
	mov	r9d, DWORD PTR 8[r12]
	test	r9d, r9d
	jle	.L3
	mov	r8, QWORD PTR 8[rsp]
	lea	rax, 68[rsp]
	mov	r10, r12
	xor	r13d, r13d
	mov	r12d, ebx
	mov	QWORD PTR 16[rsp], rax
	mov	r15, QWORD PTR 48[rsp]
	mov	DWORD PTR 28[rsp], 0
	mov	rbx, r8
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L5:
	movsx	rax, r12d
	add	r13d, 1
	lea	r15, [r15+rax*4]
	movsx	rax, r14d
	lea	rbx, [rbx+rax*4]
	cmp	DWORD PTR 8[r10], r13d
	jle	.L39
.L6:
	cmp	DWORD PTR 12[r10], r13d
	jg	.L4
	mov	r12d, DWORD PTR 16[r10]
	mov	r14d, DWORD PTR 20[r10]
.L4:
	mov	QWORD PTR 8[rsp], r10
	sub	rsp, 8
	.cfi_def_cfa_offset 152
	mov	r8, rbx
	mov	r9d, r14d
	mov	eax, DWORD PTR 40[rsp]
	mov	ecx, r12d
	mov	rdx, r15
	mov	esi, r13d
	mov	rdi, rbp
	push	rax
	.cfi_def_cfa_offset 160
	call	marvell_nfc_hw_ecc_bch_read_chunk@PLT
	mov	rsi, QWORD PTR 32[rsp]
	mov	rdi, rbp
	call	marvell_nfc_hw_ecc_correct@PLT
	pop	rdi
	.cfi_def_cfa_offset 152
	pop	r8
	.cfi_def_cfa_offset 144
	test	eax, eax
	mov	r10, QWORD PTR 8[rsp]
	je	.L5
	mov	edi, r13d
	call	BIT@PLT
	mov	r10, QWORD PTR 8[rsp]
	or	DWORD PTR 28[rsp], eax
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L39:
	mov	rdi, rbp
	mov	r12, r10
	call	marvell_nfc_disable_hw_ecc@PLT
	mov	esi, DWORD PTR 28[rsp]
	test	esi, esi
	je	.L8
	mov	ecx, DWORD PTR 8[r12]
	xor	r15d, r15d
	test	ecx, ecx
	jg	.L9
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L41:
	mov	r13d, DWORD PTR 16[r12]
	mov	ebx, DWORD PTR 28[r12]
	lea	r9d, [rsi+r13]
	lea	r11d, [r14+r9]
.L15:
	mov	rax, QWORD PTR 48[rsp]
	movsx	rdx, edx
	movsx	rcx, ecx
	cmp	DWORD PTR 32[r12], 2048
	lea	rax, [rax+rdx*4]
	mov	QWORD PTR 8[rsp], rax
	lea	rax, 0[0+rcx*4]
	mov	QWORD PTR 32[rsp], rax
	je	.L40
.L13:
	movsx	r9, r10d
	mov	esi, r11d
	xor	r8d, r8d
	mov	ecx, ebx
	sal	r9, 2
	mov	rdi, rbp
	mov	rdx, r9
	add	rdx, QWORD PTR 0[rbp]
	mov	QWORD PTR 40[rsp], r9
	call	nand_change_read_column_op@PLT
	mov	rcx, QWORD PTR 32[rsp]
	mov	edx, r13d
	mov	r8d, r14d
	push	QWORD PTR 16[rsp]
	.cfi_def_cfa_offset 152
	mov	rax, QWORD PTR 0[rbp]
	mov	rdi, rbp
	push	rbx
	.cfi_def_cfa_offset 160
	mov	r9, QWORD PTR 56[rsp]
	mov	rsi, QWORD PTR 24[rsp]
	add	rcx, rax
	add	r9, rax
	call	marvell_nfc_check_empty_chunk@PLT
	pop	rax
	.cfi_def_cfa_offset 152
	pop	rdx
	.cfi_def_cfa_offset 144
.L11:
	add	r15d, 1
	cmp	DWORD PTR 8[r12], r15d
	jle	.L8
.L9:
	mov	edi, r15d
	call	BIT@PLT
	test	DWORD PTR 28[rsp], eax
	je	.L11
	mov	eax, DWORD PTR 4[r12]
	mov	ebx, DWORD PTR 24[r12]
	mov	r8d, DWORD PTR 12[r12]
	mov	r13d, DWORD PTR [r12]
	mov	r9d, eax
	lea	edi, 2[rbx]
	mov	r14d, DWORD PTR 20[r12]
	mov	ecx, eax
	imul	r9d, r8d
	lea	esi, 0[r13+rax]
	mov	edx, r13d
	imul	edi, r15d
	add	esi, ebx
	imul	esi, r15d
	add	r9d, r14d
	imul	edx, r15d
	imul	ecx, r15d
	lea	r10d, [r9+rdi]
	cmp	r8d, r15d
	jle	.L41
	lea	r9d, 0[r13+rsi]
	mov	r14d, eax
	lea	r11d, [rax+r9]
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L40:
	cmp	DWORD PTR 36[r12], 8
	jne	.L13
	mov	rdx, QWORD PTR 8[rsp]
	xor	r8d, r8d
	mov	ecx, r13d
	mov	rdi, rbp
	mov	DWORD PTR 56[rsp], r11d
	mov	DWORD PTR 40[rsp], r10d
	mov	DWORD PTR 60[rsp], r9d
	call	nand_change_read_column_op@PLT
	mov	r9d, DWORD PTR 60[rsp]
	xor	r8d, r8d
	mov	ecx, r14d
	mov	rdx, QWORD PTR 32[rsp]
	mov	rdi, rbp
	add	rdx, QWORD PTR 0[rbp]
	mov	esi, r9d
	call	nand_change_read_column_op@PLT
	mov	r11d, DWORD PTR 56[rsp]
	mov	r10d, DWORD PTR 40[rsp]
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rdi, rbp
	call	marvell_nfc_disable_hw_ecc@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rbx, QWORD PTR 72[rsp]
	xor	rbx, QWORD PTR fs:40
	mov	eax, DWORD PTR 68[rsp]
	jne	.L42
	add	rsp, 88
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L38:
	.cfi_restore_state
	mov	edx, DWORD PTR 0[r13]
	mov	rdi, QWORD PTR 0[rbp]
	mov	esi, 255
	call	memset@PLT
	mov	r8, QWORD PTR 8[rsp]
	jmp	.L2
.L42:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	marvell_nfc_hw_ecc_bch_read_page, .-marvell_nfc_hw_ecc_bch_read_page
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_marvell_nand.c_marvell_nfc_hw_ecc_bch_read_page.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	marvell_nfc_hw_ecc_bch_read_page, %function
marvell_nfc_hw_ecc_bch_read_page:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r10, r3
	sub	sp, sp, #52
	ldr	r3, .L40
	str	r1, [sp, #32]
	mov	r7, r0
	mov	r8, r2
	ldr	r3, [r3]
	str	r3, [sp, #44]
	mov	r3,#0
	bl	nand_to_mtd
	mov	r4, r0
	mov	r0, r7
	bl	to_marvell_nand
	mov	r3, #0
	ldr	fp, [r0]
	ldr	r1, [r7, #4]
	mov	r0, r7
	ldr	r9, [fp]
	ldr	r6, [fp, #4]
	ldr	r5, [r7]
	str	r3, [sp, #40]
	bl	marvell_nfc_select_target
	cmp	r8, #0
	bne	.L35
.L2:
	mov	r0, r7
	bl	marvell_nfc_enable_hw_ecc
	ldr	r3, [fp, #8]
	cmp	r3, #0
	ble	.L3
	mov	r4, #0
	ldr	r8, [sp, #32]
	str	r4, [sp, #20]
	b	.L6
.L5:
	ldr	r2, [fp, #8]
	add	r4, r4, #1
	cmp	r2, r4
	add	r8, r8, r9, lsl #2
	add	r5, r5, r6, lsl #2
	ble	.L36
.L6:
	ldr	r2, [fp, #12]
	mov	r1, r4
	cmp	r2, r4
	ldrle	r9, [fp, #16]
	ldrle	r6, [fp, #20]
	mov	r3, r9
	mov	r2, r8
	mov	r0, r7
	stm	sp, {r5, r6, r10}
	bl	marvell_nfc_hw_ecc_bch_read_chunk
	mov	r0, r7
	add	r1, sp, #40
	bl	marvell_nfc_hw_ecc_correct
	cmp	r0, #0
	beq	.L5
	mov	r0, r4
	bl	BIT
	ldr	r3, [sp, #20]
	orr	r3, r3, r0
	str	r3, [sp, #20]
	b	.L5
.L36:
	mov	r0, r7
	bl	marvell_nfc_disable_hw_ecc
	ldr	r3, [sp, #20]
	cmp	r3, #0
	beq	.L8
	ldr	r3, [fp, #8]
	cmp	r3, #0
	movgt	r10, #0
	bgt	.L9
	b	.L8
.L38:
	ldr	r4, [fp, #16]
	ldr	r5, [fp, #28]
	add	r2, r1, r4
	str	r2, [sp, #36]
	add	r2, r8, r2
	str	r2, [sp, #28]
.L15:
	ldr	r2, [fp, #32]
	ldr	r0, [sp, #32]
	lsl	r3, r3, #2
	cmp	r2, #2048
	add	r6, r0, r6, lsl #2
	str	r3, [sp, #24]
	beq	.L37
.L13:
	mov	r3, #0
	ldr	r2, [r7]
	ldr	r1, [sp, #28]
	str	r3, [sp]
	add	r2, r2, r9, lsl #2
	mov	r3, r5
	mov	r0, r7
	bl	nand_change_read_column_op
	ldr	r3, [r7]
	lsl	r0, r9, #2
	add	r0, r3, r0
	str	r0, [sp, #4]
	ldr	r0, [sp, #24]
	add	r2, sp, #40
	str	r2, [sp, #12]
	add	r3, r3, r0
	mov	r2, r4
	mov	r1, r6
	mov	r0, r7
	str	r5, [sp, #8]
	str	r8, [sp]
	bl	marvell_nfc_check_empty_chunk
.L11:
	ldr	r3, [fp, #8]
	add	r10, r10, #1
	cmp	r3, r10
	ble	.L8
.L9:
	mov	r0, r10
	bl	BIT
	ldr	r3, [sp, #20]
	tst	r0, r3
	beq	.L11
	ldr	r2, [fp, #4]
	ldr	r3, [fp, #12]
	ldr	r8, [fp, #20]
	ldr	r4, [fp]
	mla	r0, r3, r2, r8
	ldr	r5, [fp, #24]
	add	r1, r4, r2
	add	r1, r1, r5
	cmp	r3, r10
	add	r3, r5, #2
	mla	r9, r10, r3, r0
	mul	r1, r10, r1
	mul	r6, r10, r4
	mul	r3, r10, r2
	ble	.L38
	add	r0, r4, r1
	str	r0, [sp, #36]
	add	r0, r2, r0
	mov	r8, r2
	str	r0, [sp, #28]
	b	.L15
.L37:
	ldr	r3, [fp, #36]
	cmp	r3, #8
	bne	.L13
	mov	r3, #0
	mov	r2, r6
	str	r3, [sp]
	mov	r0, r7
	mov	r3, r4
	bl	nand_change_read_column_op
	mov	r3, #0
	ldr	r2, [r7]
	str	r3, [sp]
	ldr	r3, [sp, #24]
	mov	r0, r7
	add	r2, r2, r3
	ldr	r1, [sp, #36]
	mov	r3, r8
	bl	nand_change_read_column_op
	b	.L13
.L3:
	mov	r0, r7
	bl	marvell_nfc_disable_hw_ecc
.L8:
	ldr	r3, .L40
	ldr	r0, [sp, #40]
	ldr	r2, [r3]
	ldr	r3, [sp, #44]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L39
	add	sp, sp, #52
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L35:
	mov	r1, #255
	ldr	r2, [r4]
	ldr	r0, [r7]
	bl	memset
	b	.L2
.L39:
	bl	__stack_chk_fail
.L41:
	.align	2
.L40:
	.word	.LC0
	.size	marvell_nfc_hw_ecc_bch_read_page, .-marvell_nfc_hw_ecc_bch_read_page
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
