	.file	"extr_atombios_encoders.c_atombios_external_encoder_setup.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Unknown table version: %d, %d\n"
	.text
	.p2align 4
	.type	atombios_external_encoder_setup, @function
atombios_external_encoder_setup:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rsi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, edx
	sub	rsp, 104
	.cfi_def_cfa_offset 160
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 88[rsp], rax
	xor	eax, eax
	mov	rax, QWORD PTR [rdi]
	mov	r14, QWORD PTR [rax]
	call	to_radeon_encoder@PLT
	mov	rdi, r12
	mov	r13, rax
	call	to_radeon_encoder@PLT
	mov	edi, DWORD PTR COMMAND[rip]
	mov	esi, DWORD PTR ExternalEncoderControl[rip]
	mov	r15, rax
	call	GetIndexIntoMasterTable@PLT
	cmp	DWORD PTR EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT[rip], ebx
	mov	rdi, rbp
	mov	r12d, eax
	mov	eax, DWORD PTR [r15]
	mov	DWORD PTR 16[rsp], eax
	mov	eax, DWORD PTR ENUM_ID_MASK[rip]
	mov	DWORD PTR 20[rsp], eax
	mov	eax, DWORD PTR ENUM_ID_SHIFT[rip]
	mov	DWORD PTR 24[rsp], eax
	je	.L37
	call	radeon_get_connector_for_encoder@PLT
	mov	rdi, rax
.L3:
	test	rdi, rdi
	je	.L28
	call	to_radeon_connector@PLT
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR [rax]
	and	eax, DWORD PTR OBJECT_ID_MASK[rip]
	mov	ecx, DWORD PTR [rdx]
	mov	DWORD PTR 8[rsp], ecx
	mov	ecx, DWORD PTR 4[rdx]
	mov	DWORD PTR 12[rsp], ecx
	mov	ecx, DWORD PTR OBJECT_ID_SHIFT[rip]
	sar	eax, cl
	mov	DWORD PTR 28[rsp], eax
.L4:
	lea	r15, 48[rsp]
	xor	esi, esi
	mov	edx, 40
	mov	rdi, r15
	call	memset@PLT
	mov	edi, DWORD PTR [r14]
	lea	rcx, 44[rsp]
	mov	esi, r12d
	lea	rdx, 40[rsp]
	call	atom_parse_cmd_header@PLT
	test	eax, eax
	je	.L1
	mov	esi, DWORD PTR 40[rsp]
	cmp	esi, 1
	je	.L6
	mov	edx, DWORD PTR 44[rsp]
	cmp	esi, 2
	je	.L38
	lea	rdi, .LC0[rip]
	call	DRM_ERROR@PLT
.L1:
	mov	rax, QWORD PTR 88[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L39
	add	rsp, 104
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L38:
	.cfi_restore_state
	cmp	edx, 2
	jle	.L40
	cmp	edx, 3
	jne	.L10
	cmp	DWORD PTR EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT[rip], ebx
	mov	DWORD PTR 48[rsp], ebx
	je	.L41
	movsx	rdi, DWORD PTR 4[r13]
	mov	rax, rdi
	imul	rdi, rdi, 1717986919
	sar	eax, 31
	sar	rdi, 34
	sub	edi, eax
	call	cpu_to_le16@PLT
	mov	QWORD PTR 72[rsp], rax
.L16:
	mov	rdi, rbp
	call	atombios_get_encoder_mode@PLT
	mov	rdi, rax
	mov	QWORD PTR 64[rsp], rax
	call	ENCODER_MODE_IS_DP@PLT
	test	eax, eax
	je	.L17
	cmp	DWORD PTR 8[rsp], 270000
	je	.L42
	cmp	DWORD PTR 8[rsp], 540000
	jne	.L19
	mov	eax, DWORD PTR EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_5_40GHZ[rip]
	or	DWORD PTR 60[rsp], eax
.L19:
	mov	eax, DWORD PTR 12[rsp]
	mov	DWORD PTR 52[rsp], eax
.L20:
	movzx	ecx, BYTE PTR 24[rsp]
	mov	eax, DWORD PTR 16[rsp]
	and	eax, DWORD PTR 20[rsp]
	sar	eax, cl
	cmp	eax, 129
	je	.L22
	cmp	eax, 130
	je	.L23
	cmp	eax, 128
	je	.L43
.L25:
	mov	rdi, rbp
	call	radeon_atom_get_bpc@PLT
	mov	DWORD PTR 56[rsp], eax
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edi, DWORD PTR [r14]
	mov	rdx, r15
	mov	esi, r12d
	call	atom_execute_table@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L40:
	test	edx, edx
	jg	.L44
.L10:
	mov	esi, 2
	lea	rdi, .LC0[rip]
	call	DRM_ERROR@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L28:
	mov	DWORD PTR 28[rsp], 0
	mov	DWORD PTR 12[rsp], 0
	mov	DWORD PTR 8[rsp], 0
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L37:
	call	radeon_get_connector_for_encoder_init@PLT
	mov	rdi, rax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L44:
	movsx	rdi, DWORD PTR 4[r13]
	mov	DWORD PTR 48[rsp], ebx
	mov	rax, rdi
	imul	rdi, rdi, 1717986919
	sar	eax, 31
	sar	rdi, 34
	sub	edi, eax
	call	cpu_to_le16@PLT
	mov	rdi, rbp
	mov	QWORD PTR 72[rsp], rax
	call	atombios_get_encoder_mode@PLT
	mov	rdi, rax
	mov	QWORD PTR 64[rsp], rax
	call	ENCODER_MODE_IS_DP@PLT
	test	eax, eax
	je	.L12
	cmp	DWORD PTR 8[rsp], 270000
	jne	.L13
	mov	eax, DWORD PTR ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ[rip]
	or	DWORD PTR 56[rsp], eax
.L13:
	mov	eax, DWORD PTR 12[rsp]
	mov	DWORD PTR 52[rsp], eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L41:
	mov	edi, DWORD PTR 28[rsp]
	call	cpu_to_le16@PLT
	mov	QWORD PTR 80[rsp], rax
	jmp	.L16
	.p2align 4,,10
	.p2align 3
.L12:
	mov	esi, DWORD PTR 4[r13]
	mov	rdi, rbp
	call	radeon_dig_monitor_is_duallink@PLT
	cmp	eax, 1
	sbb	eax, eax
	and	eax, -4
	add	eax, 8
	mov	DWORD PTR 52[rsp], eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L17:
	mov	esi, DWORD PTR 4[r13]
	mov	rdi, rbp
	call	radeon_dig_monitor_is_duallink@PLT
	cmp	eax, 1
	sbb	eax, eax
	and	eax, -4
	add	eax, 8
	mov	DWORD PTR 52[rsp], eax
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L43:
	mov	eax, DWORD PTR EXTERNAL_ENCODER_CONFIG_V3_ENCODER3[rip]
	or	DWORD PTR 60[rsp], eax
	jmp	.L25
	.p2align 4,,10
	.p2align 3
.L23:
	mov	eax, DWORD PTR EXTERNAL_ENCODER_CONFIG_V3_ENCODER1[rip]
	or	DWORD PTR 60[rsp], eax
	jmp	.L25
	.p2align 4,,10
	.p2align 3
.L22:
	mov	eax, DWORD PTR EXTERNAL_ENCODER_CONFIG_V3_ENCODER2[rip]
	or	DWORD PTR 60[rsp], eax
	jmp	.L25
	.p2align 4,,10
	.p2align 3
.L42:
	mov	eax, DWORD PTR EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ[rip]
	or	DWORD PTR 60[rsp], eax
	jmp	.L19
.L39:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	atombios_external_encoder_setup, .-atombios_external_encoder_setup
	.comm	OBJECT_ID_SHIFT,4,4
	.comm	OBJECT_ID_MASK,4,4
	.comm	ExternalEncoderControl,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_ENCODER3,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_ENCODER2,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_ENCODER1,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_5_40GHZ,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ,4,4
	.comm	EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT,4,4
	.comm	ENUM_ID_SHIFT,4,4
	.comm	ENUM_ID_MASK,4,4
	.comm	COMMAND,4,4
	.comm	ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_atombios_encoders.c_atombios_external_encoder_setup.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Unknown table version: %d, %d\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	atombios_external_encoder_setup, %function
atombios_external_encoder_setup:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, [r0]
	mov	r7, r2
	ldr	r2, .L45
	sub	sp, sp, #60
	mov	r4, r1
	ldr	r2, [r2]
	str	r2, [sp, #52]
	mov	r2,#0
	ldr	r9, [r3]
	mov	r5, r0
	bl	to_radeon_encoder
	mov	r8, r0
	mov	r0, r4
	bl	to_radeon_encoder
	ldr	r2, .L45+4
	ldr	r3, .L45+8
	mov	r4, r0
	ldr	r1, [r2]
	ldr	r0, [r3]
	bl	GetIndexIntoMasterTable
	ldr	r10, .L45+12
	ldr	r2, .L45+16
	ldr	r1, [r10]
	ldr	r3, .L45+20
	ldr	r2, [r2]
	ldr	r3, [r3]
	cmp	r1, r7
	ldr	r1, [r4]
	mov	r6, r0
	str	r1, [sp, #4]
	mov	r0, r5
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	beq	.L37
	bl	radeon_get_connector_for_encoder
.L3:
	cmp	r0, #0
	beq	.L28
	bl	to_radeon_connector
	ldr	r3, .L45+24
	ldr	r1, .L45+28
	ldr	r2, [r3]
	ldr	r3, [r0, #4]
	ldr	r4, [r0]
	ldr	fp, [r3]
	ldr	r0, [r1]
	ldr	r3, [r3, #4]
	and	r4, r4, r2
	asr	r4, r4, r0
	str	r3, [sp]
.L4:
	mov	r3, #0
	str	r3, [sp, #24]
	str	r3, [sp, #28]
	str	r3, [sp, #32]
	str	r3, [sp, #36]
	str	r3, [sp, #40]
	str	r3, [sp, #44]
	str	r3, [sp, #48]
	mov	r1, r6
	ldr	r0, [r9]
	add	r3, sp, #20
	add	r2, sp, #16
	bl	atom_parse_cmd_header
	cmp	r0, #0
	beq	.L1
	ldr	r1, [sp, #16]
	cmp	r1, #1
	beq	.L6
	cmp	r1, #2
	ldr	r2, [sp, #20]
	beq	.L38
	ldr	r0, .L45+32
	bl	DRM_ERROR
.L1:
	ldr	r3, .L45
	ldr	r2, [r3]
	ldr	r3, [sp, #52]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L39
	add	sp, sp, #60
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L38:
	cmp	r2, #2
	ble	.L40
	cmp	r2, #3
	bne	.L10
	ldr	r3, [r10]
	str	r7, [sp, #24]
	cmp	r3, r7
	beq	.L41
	ldr	r3, [r8, #4]
	ldr	r2, .L45+36
	asr	r0, r3, #31
	smull	r1, r3, r2, r3
	rsb	r0, r0, r3, asr #2
	bl	cpu_to_le16
	str	r0, [sp, #44]
.L16:
	mov	r0, r5
	bl	atombios_get_encoder_mode
	str	r0, [sp, #40]
	bl	ENCODER_MODE_IS_DP
	cmp	r0, #0
	beq	.L17
	ldr	r3, .L45+40
	cmp	fp, r3
	beq	.L42
	ldr	r3, .L45+44
	cmp	fp, r3
	ldreq	r2, .L45+48
	ldreq	r3, [sp, #36]
	ldreq	r2, [r2]
	orreq	r3, r3, r2
	streq	r3, [sp, #36]
.L19:
	ldr	r3, [sp]
	str	r3, [sp, #28]
.L20:
	ldmib	sp, {r2, r3}
	and	r3, r3, r2
	ldr	r2, [sp, #12]
	asr	r3, r3, r2
	cmp	r3, #129
	beq	.L22
	cmp	r3, #130
	beq	.L23
	cmp	r3, #128
	beq	.L43
.L25:
	mov	r0, r5
	bl	radeon_atom_get_bpc
	str	r0, [sp, #32]
.L6:
	mov	r1, r6
	ldr	r0, [r9]
	add	r2, sp, #24
	bl	atom_execute_table
	b	.L1
.L40:
	cmp	r2, #0
	bgt	.L44
.L10:
	mov	r1, #2
	ldr	r0, .L45+32
	bl	DRM_ERROR
	b	.L1
.L28:
	mov	r4, r0
	mov	fp, r0
	str	r0, [sp]
	b	.L4
.L37:
	bl	radeon_get_connector_for_encoder_init
	b	.L3
.L44:
	ldr	r3, [r8, #4]
	ldr	r0, .L45+36
	str	r7, [sp, #24]
	smull	r2, r0, r3, r0
	asr	r3, r3, #31
	rsb	r0, r3, r0, asr #2
	bl	cpu_to_le16
	mov	r3, r0
	mov	r0, r5
	str	r3, [sp, #40]
	bl	atombios_get_encoder_mode
	str	r0, [sp, #36]
	bl	ENCODER_MODE_IS_DP
	cmp	r0, #0
	beq	.L12
	ldr	r3, .L45+40
	cmp	fp, r3
	ldreq	r2, .L45+52
	ldreq	r3, [sp, #32]
	ldreq	r2, [r2]
	orreq	r3, r3, r2
	streq	r3, [sp, #32]
	ldr	r3, [sp]
	str	r3, [sp, #28]
	b	.L6
.L41:
	mov	r0, r4
	bl	cpu_to_le16
	str	r0, [sp, #48]
	b	.L16
.L12:
	mov	r0, r5
	ldr	r1, [r8, #4]
	bl	radeon_dig_monitor_is_duallink
	cmp	r0, #0
	movne	r3, #8
	moveq	r3, #4
	str	r3, [sp, #28]
	b	.L6
.L17:
	mov	r0, r5
	ldr	r1, [r8, #4]
	bl	radeon_dig_monitor_is_duallink
	cmp	r0, #0
	movne	r3, #8
	moveq	r3, #4
	str	r3, [sp, #28]
	b	.L20
.L23:
	ldr	r2, .L45+56
	ldr	r3, [sp, #36]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [sp, #36]
	b	.L25
.L22:
	ldr	r2, .L45+60
	ldr	r3, [sp, #36]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [sp, #36]
	b	.L25
.L43:
	ldr	r2, .L45+64
	ldr	r3, [sp, #36]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [sp, #36]
	b	.L25
.L42:
	ldr	r2, .L45+68
	ldr	r3, [sp, #36]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [sp, #36]
	b	.L19
.L39:
	bl	__stack_chk_fail
.L46:
	.align	2
.L45:
	.word	.LC1
	.word	ExternalEncoderControl
	.word	COMMAND
	.word	EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT
	.word	ENUM_ID_MASK
	.word	ENUM_ID_SHIFT
	.word	OBJECT_ID_MASK
	.word	OBJECT_ID_SHIFT
	.word	.LC0
	.word	1717986919
	.word	270000
	.word	540000
	.word	EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_5_40GHZ
	.word	ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ
	.word	EXTERNAL_ENCODER_CONFIG_V3_ENCODER1
	.word	EXTERNAL_ENCODER_CONFIG_V3_ENCODER2
	.word	EXTERNAL_ENCODER_CONFIG_V3_ENCODER3
	.word	EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ
	.size	atombios_external_encoder_setup, .-atombios_external_encoder_setup
	.comm	OBJECT_ID_SHIFT,4,4
	.comm	OBJECT_ID_MASK,4,4
	.comm	ExternalEncoderControl,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_ENCODER3,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_ENCODER2,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_ENCODER1,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_5_40GHZ,4,4
	.comm	EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ,4,4
	.comm	EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT,4,4
	.comm	ENUM_ID_SHIFT,4,4
	.comm	ENUM_ID_MASK,4,4
	.comm	COMMAND,4,4
	.comm	ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
