	.file	"extr_nvidia-agp.c_nvidia_insert_memory.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	nvidia_insert_memory, @function
nvidia_insert_memory:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, edx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, esi
	mov	esi, edx
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	mov	edi, DWORD PTR 24[rdi]
	call	agp_generic_type_to_mask_type@PLT
	test	eax, eax
	jne	.L2
	cmp	DWORD PTR 0[rbp], r12d
	je	.L3
.L2:
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	eax, DWORD PTR 4[rbp]
	test	eax, eax
	je	.L1
	lea	ecx, [rax+rbx]
	mov	eax, DWORD PTR agp_memory_reserved[rip]
	mov	esi, DWORD PTR nvidia_private[rip]
	cdq
	idiv	DWORD PTR PAGE_SIZE[rip]
	sub	esi, eax
	cmp	ecx, esi
	jg	.L2
	cmp	ecx, ebx
	jle	.L5
	movsx	r13, ebx
	xor	r12d, r12d
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edx, DWORD PTR 4[rbp]
	add	r13, 1
	lea	eax, [r12+r13]
	add	edx, ebx
	cmp	edx, eax
	jle	.L5
.L7:
	mov	rax, QWORD PTR agp_bridge[rip]
	mov	rdi, QWORD PTR nvidia_private[rip+8]
	add	rdi, QWORD PTR 8[rax]
	add	rdi, r13
	call	readl@PLT
	mov	rdi, QWORD PTR agp_bridge[rip]
	mov	esi, eax
	call	PGE_EMPTY@PLT
	test	eax, eax
	jne	.L6
	mov	eax, DWORD PTR EBUSY[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L5:
	mov	edx, DWORD PTR 8[rbp]
	test	edx, edx
	je	.L19
.L8:
	mov	eax, DWORD PTR 4[rbp]
	test	eax, eax
	jle	.L9
	xor	r12d, r12d
	movsx	r14, ebx
	lea	r15d, 1[rbx]
	.p2align 4,,10
	.p2align 3
.L10:
	mov	rax, QWORD PTR agp_bridge[rip]
	mov	r13, QWORD PTR nvidia_private[rip+8]
	lea	rdx, [r14+r12]
	add	r13, QWORD PTR 8[rax]
	mov	rax, QWORD PTR [rax]
	add	r13, rdx
	mov	rbx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR 16[rbp]
	mov	edi, DWORD PTR [rax+r12*4]
	call	page_to_phys@PLT
	mov	rdi, QWORD PTR agp_bridge[rip]
	xor	edx, edx
	mov	esi, eax
	call	rbx
	mov	rsi, r13
	lea	ebx, [r15+r12]
	add	r12, 1
	mov	edi, eax
	call	writel@PLT
	cmp	DWORD PTR 4[rbp], r12d
	jg	.L10
.L9:
	mov	rdx, QWORD PTR agp_bridge[rip]
	mov	rax, QWORD PTR nvidia_private[rip+8]
	movsx	rbx, ebx
	add	rax, QWORD PTR 8[rdx]
	lea	rdi, -1[rax+rbx]
	call	readl@PLT
	mov	rax, QWORD PTR agp_bridge[rip]
	mov	rdi, rbp
	mov	rax, QWORD PTR [rax]
	call	[QWORD PTR [rax]]
	xor	eax, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L19:
	xor	eax, eax
	call	global_cache_flush@PLT
	mov	DWORD PTR 8[rbp], 1
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	nvidia_insert_memory, .-nvidia_insert_memory
	.comm	nvidia_private,16,16
	.comm	agp_memory_reserved,4,4
	.comm	agp_bridge,8,8
	.comm	PAGE_SIZE,4,4
	.comm	EINVAL,4,4
	.comm	EBUSY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nvidia-agp.c_nvidia_insert_memory.c"
	.text
	.global	__aeabi_idiv
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvidia_insert_memory, %function
nvidia_insert_memory:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [r0, #16]
	mov	r1, r2
	mov	r6, r2
	bl	agp_generic_type_to_mask_type
	cmp	r0, #0
	bne	.L2
	ldr	r3, [r4]
	cmp	r3, r6
	bne	.L2
	ldr	r7, [r4, #4]
	cmp	r7, #0
	mov	r0, r7
	popeq	{r4, r5, r6, r7, r8, r9, r10, pc}
	ldr	r2, .L21
	ldr	r3, .L21+4
	ldr	r0, [r2]
	ldr	r1, [r3]
	bl	__aeabi_idiv
	ldr	r9, .L21+8
	add	r2, r7, r5
	ldr	r3, [r9]
	sub	r3, r3, r0
	cmp	r2, r3
	bgt	.L2
	cmp	r2, r5
	ldrle	r8, .L21+12
	ble	.L5
	mov	r6, r5
	ldr	r8, .L21+12
	b	.L7
.L6:
	ldr	r7, [r4, #4]
	add	r3, r5, r7
	cmp	r3, r6
	ble	.L5
.L7:
	ldr	r7, [r8]
	ldr	r3, [r9, #4]
	ldr	r0, [r7, #4]
	add	r0, r0, r3
	add	r0, r0, r6
	bl	readl
	mov	r1, r0
	mov	r0, r7
	bl	PGE_EMPTY
	cmp	r0, #0
	add	r6, r6, #1
	bne	.L6
	ldr	r3, .L21+16
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L2:
	ldr	r3, .L21+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L5:
	ldr	r3, [r4, #8]
	cmp	r3, #0
	beq	.L20
.L8:
	cmp	r7, #0
	ble	.L9
	mov	r6, #0
.L10:
	ldr	r7, [r8]
	ldr	r2, [r4, #12]
	ldr	r3, [r7]
	ldr	r0, [r2, r6, lsl #2]
	ldr	r10, [r3, #4]
	bl	page_to_phys
	mov	r2, #0
	mov	r1, r0
	mov	r0, r7
	blx	r10
	ldr	r2, [r8]
	ldr	r3, [r9, #4]
	ldr	r1, [r2, #4]
	add	r6, r6, #1
	add	r1, r1, r3
	add	r1, r1, r5
	bl	writel
	ldr	r3, [r4, #4]
	add	r5, r5, #1
	cmp	r3, r6
	bgt	.L10
.L9:
	ldr	r2, [r8]
	ldr	r3, [r9, #4]
	ldr	r0, [r2, #4]
	add	r0, r0, r3
	add	r0, r0, r5
	sub	r0, r0, #1
	bl	readl
	ldr	r3, [r8]
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r3, [r3]
	blx	r3
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L20:
	bl	global_cache_flush
	mov	r3, #1
	ldr	r7, [r4, #4]
	str	r3, [r4, #8]
	b	.L8
.L22:
	.align	2
.L21:
	.word	agp_memory_reserved
	.word	PAGE_SIZE
	.word	nvidia_private
	.word	agp_bridge
	.word	EBUSY
	.word	EINVAL
	.size	nvidia_insert_memory, .-nvidia_insert_memory
	.comm	nvidia_private,8,4
	.comm	agp_memory_reserved,4,4
	.comm	agp_bridge,4,4
	.comm	PAGE_SIZE,4,4
	.comm	EINVAL,4,4
	.comm	EBUSY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
