	.file	"extr_jz4780_nemc.c_jz4780_nemc_configure_bank.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"ingenic,nemc-tAS"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"invalid value of %s %u (%u cycles), maximum %u cycles supported\n"
	.section	.rodata.str1.1
.LC2:
	.string	"ingenic,nemc-tAH"
.LC3:
	.string	"ingenic,nemc-tBP"
.LC4:
	.string	"ingenic,nemc-tAW"
.LC5:
	.string	"ingenic,nemc-tSTRV"
	.text
	.p2align 4
	.type	jz4780_nemc_configure_bank, @function
jz4780_nemc_configure_bank:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	ecx, edx
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	mov	eax, DWORD PTR [rdi]
	sar	eax, cl
	and	eax, 1
	je	.L17
	xor	r13d, r13d
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L18
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r13d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L17:
	.cfi_restore_state
	mov	rbx, rdi
	mov	edi, edx
	mov	ebp, esi
	mov	r14d, edx
	mov	r13d, eax
	lea	r15, 4[rsp]
	call	JZ_NEMC_SMCR@PLT
	mov	rdi, rbx
	mov	esi, eax
	call	CSR_READ_4@PLT
	mov	ecx, DWORD PTR JZ_NEMC_SMCR_SMT_SHIFT[rip]
	mov	edi, ebp
	mov	r12d, eax
	mov	eax, DWORD PTR JZ_NEMC_SMCR_SMT_MASK[rip]
	not	eax
	and	eax, r12d
	mov	r12d, DWORD PTR JZ_NEMC_SMCR_SMT_NORMAL[rip]
	sal	r12d, cl
	or	r12d, eax
	call	ofw_bus_get_node@PLT
	mov	ecx, 4
	mov	rdx, r15
	lea	rsi, .LC0[rip]
	mov	edi, eax
	mov	ebp, eax
	call	OF_getencprop@PLT
	test	rax, rax
	jle	.L3
	mov	esi, DWORD PTR 4[rsp]
	mov	rdi, rbx
	call	JZ4780_NEMC_NS_TO_TICKS@PLT
	cmp	eax, 15
	jg	.L19
	mov	r8d, DWORD PTR JZ_NEMC_SMCR_TAS_MASK[rip]
	mov	ecx, DWORD PTR JZ_NEMC_SMCR_TAS_SHIFT[rip]
	not	r8d
	sal	eax, cl
	and	r12d, r8d
	or	r12d, eax
.L3:
	mov	ecx, 4
	mov	rdx, r15
	lea	rsi, .LC2[rip]
	mov	edi, ebp
	call	OF_getencprop@PLT
	test	rax, rax
	jle	.L5
	mov	esi, DWORD PTR 4[rsp]
	mov	rdi, rbx
	call	JZ4780_NEMC_NS_TO_TICKS@PLT
	cmp	eax, 15
	jg	.L20
	mov	r8d, DWORD PTR JZ_NEMC_SMCR_TAH_MASK[rip]
	mov	ecx, DWORD PTR JZ_NEMC_SMCR_TAH_SHIFT[rip]
	not	r8d
	sal	eax, cl
	and	r12d, r8d
	or	r12d, eax
.L5:
	mov	ecx, 4
	mov	rdx, r15
	lea	rsi, .LC3[rip]
	mov	edi, ebp
	call	OF_getencprop@PLT
	test	rax, rax
	jle	.L7
	mov	esi, DWORD PTR 4[rsp]
	mov	rdi, rbx
	call	JZ4780_NEMC_NS_TO_TICKS@PLT
	cmp	eax, 31
	jg	.L21
	mov	r8d, DWORD PTR JZ_NEMC_SMCR_TBP_MASK[rip]
	mov	rdx, QWORD PTR ticks_to_tBP_tAW[rip]
	cdqe
	mov	ecx, DWORD PTR JZ_NEMC_SMCR_TBP_SHIFT[rip]
	not	r8d
	and	r12d, r8d
	mov	r8d, DWORD PTR [rdx+rax*4]
	sal	r8d, cl
	or	r12d, r8d
.L7:
	mov	ecx, 4
	mov	rdx, r15
	lea	rsi, .LC4[rip]
	mov	edi, ebp
	call	OF_getencprop@PLT
	test	rax, rax
	jle	.L9
	mov	esi, DWORD PTR 4[rsp]
	mov	rdi, rbx
	call	JZ4780_NEMC_NS_TO_TICKS@PLT
	cmp	eax, 31
	jg	.L22
	mov	r8d, DWORD PTR JZ_NEMC_SMCR_TAW_MASK[rip]
	mov	rdx, QWORD PTR ticks_to_tBP_tAW[rip]
	cdqe
	mov	ecx, DWORD PTR JZ_NEMC_SMCR_TAW_SHIFT[rip]
	not	r8d
	and	r12d, r8d
	mov	r8d, DWORD PTR [rdx+rax*4]
	sal	r8d, cl
	or	r12d, r8d
.L9:
	mov	ecx, 4
	mov	rdx, r15
	lea	rsi, .LC5[rip]
	mov	edi, ebp
	call	OF_getencprop@PLT
	test	rax, rax
	jle	.L11
	mov	esi, DWORD PTR 4[rsp]
	mov	rdi, rbx
	call	JZ4780_NEMC_NS_TO_TICKS@PLT
	cmp	eax, 63
	jg	.L23
	mov	r8d, DWORD PTR JZ_NEMC_SMCR_STRV_MASK[rip]
	mov	ecx, DWORD PTR JZ_NEMC_SMCR_STRV_SHIFT[rip]
	not	r8d
	sal	eax, cl
	and	r12d, r8d
	or	r12d, eax
.L11:
	mov	edi, r14d
	call	JZ_NEMC_SMCR@PLT
	mov	edx, r12d
	mov	rdi, rbx
	mov	esi, eax
	call	CSR_WRITE_4@PLT
	mov	eax, 1
	mov	ecx, r14d
	sal	eax, cl
	or	DWORD PTR [rbx], eax
	jmp	.L1
.L19:
	mov	edi, DWORD PTR 4[rbx]
	mov	ecx, DWORD PTR 4[rsp]
	mov	r9d, 15
	mov	r8d, eax
	lea	rdx, .LC0[rip]
	lea	rsi, .LC1[rip]
	mov	r13d, -1
	call	device_printf@PLT
	jmp	.L1
.L20:
	mov	edi, DWORD PTR 4[rbx]
	mov	ecx, DWORD PTR 4[rsp]
	mov	r9d, 15
	mov	r8d, eax
	lea	rdx, .LC2[rip]
	lea	rsi, .LC1[rip]
	mov	r13d, -1
	call	device_printf@PLT
	jmp	.L1
.L21:
	mov	edi, DWORD PTR 4[rbx]
	mov	ecx, DWORD PTR 4[rsp]
	mov	r9d, 15
	mov	r8d, eax
	lea	rdx, .LC3[rip]
	lea	rsi, .LC1[rip]
	mov	r13d, -1
	call	device_printf@PLT
	jmp	.L1
.L22:
	mov	edi, DWORD PTR 4[rbx]
	mov	ecx, DWORD PTR 4[rsp]
	mov	r9d, 15
	mov	r8d, eax
	lea	rdx, .LC4[rip]
	lea	rsi, .LC1[rip]
	mov	r13d, -1
	call	device_printf@PLT
	jmp	.L1
.L23:
	mov	edi, DWORD PTR 4[rbx]
	mov	ecx, DWORD PTR 4[rsp]
	mov	r9d, 15
	mov	r8d, eax
	lea	rdx, .LC5[rip]
	lea	rsi, .LC1[rip]
	mov	r13d, -1
	call	device_printf@PLT
	jmp	.L1
.L18:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	jz4780_nemc_configure_bank, .-jz4780_nemc_configure_bank
	.comm	ticks_to_tBP_tAW,8,8
	.comm	JZ_NEMC_SMCR_TBP_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TBP_MASK,4,4
	.comm	JZ_NEMC_SMCR_TAW_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TAW_MASK,4,4
	.comm	JZ_NEMC_SMCR_TAS_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TAS_MASK,4,4
	.comm	JZ_NEMC_SMCR_TAH_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TAH_MASK,4,4
	.comm	JZ_NEMC_SMCR_STRV_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_STRV_MASK,4,4
	.comm	JZ_NEMC_SMCR_SMT_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_SMT_NORMAL,4,4
	.comm	JZ_NEMC_SMCR_SMT_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_jz4780_nemc.c_jz4780_nemc_configure_bank.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"ingenic,nemc-tAS\000"
	.align	2
.LC1:
	.ascii	"invalid value of %s %u (%u cycles), maximum %u cycl"
	.ascii	"es supported\012\000"
	.align	2
.LC2:
	.ascii	"ingenic,nemc-tAH\000"
	.align	2
.LC3:
	.ascii	"ingenic,nemc-tBP\000"
	.align	2
.LC4:
	.ascii	"ingenic,nemc-tAW\000"
	.align	2
.LC5:
	.ascii	"ingenic,nemc-tSTRV\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	jz4780_nemc_configure_bank, %function
jz4780_nemc_configure_bank:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r3, [r0]
	sub	sp, sp, #16
	asr	r3, r3, r2
	ands	r5, r3, #1
	ldr	r3, .L24
	movne	r5, #0
	ldr	r3, [r3]
	str	r3, [sp, #12]
	mov	r3,#0
	beq	.L17
.L1:
	ldr	r3, .L24
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L18
	mov	r0, r5
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L17:
	mov	r6, r0
	mov	r0, r2
	mov	r8, r1
	mov	r7, r2
	bl	JZ_NEMC_SMCR
	mov	r1, r0
	mov	r0, r6
	bl	CSR_READ_4
	mov	r4, r0
	ldr	r1, .L24+4
	ldr	r2, .L24+8
	ldr	r3, .L24+12
	ldr	r1, [r1]
	ldr	r2, [r2]
	ldr	r3, [r3]
	bic	r4, r4, r1
	mov	r0, r8
	orr	r4, r4, r2, lsl r3
	bl	ofw_bus_get_node
	mov	r3, #4
	ldr	r1, .L24+16
	add	r2, sp, #8
	mov	r8, r0
	bl	OF_getencprop
	cmp	r0, #0
	ble	.L3
	mov	r0, r6
	ldr	r1, [sp, #8]
	bl	JZ4780_NEMC_NS_TO_TICKS
	cmp	r0, #15
	bgt	.L19
	ldr	r3, .L24+20
	ldr	r2, .L24+24
	ldr	r3, [r3]
	ldr	r2, [r2]
	bic	r4, r4, r3
	orr	r4, r4, r0, lsl r2
.L3:
	mov	r3, #4
	mov	r0, r8
	ldr	r1, .L24+28
	add	r2, sp, #8
	bl	OF_getencprop
	cmp	r0, #0
	ble	.L5
	mov	r0, r6
	ldr	r1, [sp, #8]
	bl	JZ4780_NEMC_NS_TO_TICKS
	cmp	r0, #15
	bgt	.L20
	ldr	r3, .L24+32
	ldr	r2, .L24+36
	ldr	r3, [r3]
	ldr	r2, [r2]
	bic	r4, r4, r3
	orr	r4, r4, r0, lsl r2
.L5:
	mov	r3, #4
	mov	r0, r8
	ldr	r1, .L24+40
	add	r2, sp, #8
	bl	OF_getencprop
	cmp	r0, #0
	ble	.L7
	mov	r0, r6
	ldr	r1, [sp, #8]
	bl	JZ4780_NEMC_NS_TO_TICKS
	cmp	r0, #31
	bgt	.L21
	ldr	r2, .L24+44
	ldr	r3, .L24+48
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, .L24+52
	bic	r4, r4, r3
	ldr	r2, [r2, r0, lsl #2]
	ldr	r3, [r1]
	orr	r4, r4, r2, lsl r3
.L7:
	mov	r3, #4
	mov	r0, r8
	ldr	r1, .L24+56
	add	r2, sp, #8
	bl	OF_getencprop
	cmp	r0, #0
	ble	.L9
	mov	r0, r6
	ldr	r1, [sp, #8]
	bl	JZ4780_NEMC_NS_TO_TICKS
	cmp	r0, #31
	bgt	.L22
	ldr	r2, .L24+44
	ldr	r3, .L24+60
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, .L24+64
	bic	r4, r4, r3
	ldr	r2, [r2, r0, lsl #2]
	ldr	r3, [r1]
	orr	r4, r4, r2, lsl r3
.L9:
	mov	r0, r8
	mov	r3, #4
	ldr	r1, .L24+68
	add	r2, sp, #8
	bl	OF_getencprop
	cmp	r0, #0
	ble	.L11
	mov	r0, r6
	ldr	r1, [sp, #8]
	bl	JZ4780_NEMC_NS_TO_TICKS
	cmp	r0, #63
	bgt	.L23
	ldr	r3, .L24+72
	ldr	r2, .L24+76
	ldr	r3, [r3]
	ldr	r2, [r2]
	bic	r4, r4, r3
	orr	r4, r4, r0, lsl r2
.L11:
	mov	r0, r7
	bl	JZ_NEMC_SMCR
	mov	r2, r4
	mov	r1, r0
	mov	r0, r6
	bl	CSR_WRITE_4
	mov	r3, #1
	ldr	r2, [r6]
	orr	r7, r2, r3, lsl r7
	str	r7, [r6]
	b	.L1
.L19:
	mov	r3, #15
	str	r0, [sp]
	ldr	r0, [r6, #4]
	ldr	r2, .L24+16
	str	r3, [sp, #4]
	ldr	r1, .L24+80
	ldr	r3, [sp, #8]
	bl	device_printf
	mvn	r5, #0
	b	.L1
.L20:
	mov	r3, #15
	str	r0, [sp]
	ldr	r0, [r6, #4]
	ldr	r2, .L24+28
	str	r3, [sp, #4]
	ldr	r1, .L24+80
	ldr	r3, [sp, #8]
	bl	device_printf
	mvn	r5, #0
	b	.L1
.L21:
	mov	r3, #15
	str	r0, [sp]
	ldr	r0, [r6, #4]
	ldr	r2, .L24+40
	str	r3, [sp, #4]
	ldr	r1, .L24+80
	ldr	r3, [sp, #8]
	bl	device_printf
	mvn	r5, #0
	b	.L1
.L22:
	mov	r3, #15
	str	r0, [sp]
	ldr	r0, [r6, #4]
	ldr	r2, .L24+56
	str	r3, [sp, #4]
	ldr	r1, .L24+80
	ldr	r3, [sp, #8]
	bl	device_printf
	mvn	r5, #0
	b	.L1
.L23:
	mov	r3, #15
	str	r0, [sp]
	ldr	r0, [r6, #4]
	ldr	r2, .L24+68
	str	r3, [sp, #4]
	ldr	r1, .L24+80
	ldr	r3, [sp, #8]
	bl	device_printf
	mvn	r5, #0
	b	.L1
.L18:
	bl	__stack_chk_fail
.L25:
	.align	2
.L24:
	.word	.LC6
	.word	JZ_NEMC_SMCR_SMT_MASK
	.word	JZ_NEMC_SMCR_SMT_NORMAL
	.word	JZ_NEMC_SMCR_SMT_SHIFT
	.word	.LC0
	.word	JZ_NEMC_SMCR_TAS_MASK
	.word	JZ_NEMC_SMCR_TAS_SHIFT
	.word	.LC2
	.word	JZ_NEMC_SMCR_TAH_MASK
	.word	JZ_NEMC_SMCR_TAH_SHIFT
	.word	.LC3
	.word	ticks_to_tBP_tAW
	.word	JZ_NEMC_SMCR_TBP_MASK
	.word	JZ_NEMC_SMCR_TBP_SHIFT
	.word	.LC4
	.word	JZ_NEMC_SMCR_TAW_MASK
	.word	JZ_NEMC_SMCR_TAW_SHIFT
	.word	.LC5
	.word	JZ_NEMC_SMCR_STRV_MASK
	.word	JZ_NEMC_SMCR_STRV_SHIFT
	.word	.LC1
	.size	jz4780_nemc_configure_bank, .-jz4780_nemc_configure_bank
	.comm	ticks_to_tBP_tAW,4,4
	.comm	JZ_NEMC_SMCR_TBP_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TBP_MASK,4,4
	.comm	JZ_NEMC_SMCR_TAW_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TAW_MASK,4,4
	.comm	JZ_NEMC_SMCR_TAS_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TAS_MASK,4,4
	.comm	JZ_NEMC_SMCR_TAH_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_TAH_MASK,4,4
	.comm	JZ_NEMC_SMCR_STRV_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_STRV_MASK,4,4
	.comm	JZ_NEMC_SMCR_SMT_SHIFT,4,4
	.comm	JZ_NEMC_SMCR_SMT_NORMAL,4,4
	.comm	JZ_NEMC_SMCR_SMT_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
