	.file	"extr_wilc_spi.c_wilc_spi_sync_ext.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Too many interrupts (%d)...\n"
.LC1:
	.string	"Failed read reg (%08x)...\n"
.LC2:
	.string	"Failed write reg (%08x)...\n"
	.text
	.p2align 4
	.type	wilc_spi_sync_ext, @function
wilc_spi_sync_ext:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	edi, DWORD PTR 8[rdi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	to_spi_device@PLT
	cmp	DWORD PTR MAX_NUM_INT[rip], r12d
	mov	r14, rax
	jl	.L35
	mov	rax, QWORD PTR 0[rbp]
	lea	r15, 4[rsp]
	mov	rdi, rbp
	mov	rdx, r15
	mov	DWORD PTR [rax], r12d
	mov	esi, DWORD PTR WILC_PIN_MUX_0[rip]
	call	wilc_spi_read_reg@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L36
	mov	edi, 8
	call	BIT@PLT
	mov	esi, DWORD PTR WILC_PIN_MUX_0[rip]
	or	eax, DWORD PTR 4[rsp]
	mov	rdi, rbp
	mov	edx, eax
	mov	DWORD PTR 4[rsp], eax
	call	wilc_spi_write_reg@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L37
	mov	esi, DWORD PTR WILC_INTR_ENABLE[rip]
	mov	rdx, r15
	mov	rdi, rbp
	call	wilc_spi_read_reg@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L6
	xor	r13d, r13d
	test	r12d, r12d
	jg	.L7
	mov	eax, DWORD PTR 4[rsp]
	.p2align 4,,10
	.p2align 3
.L10:
	mov	esi, DWORD PTR WILC_INTR_ENABLE[rip]
	mov	edx, eax
	mov	rdi, rbp
	call	wilc_spi_write_reg@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L38
	test	r12d, r12d
	jne	.L12
.L16:
	mov	r13d, 1
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L39:
	test	r12d, r12d
	jle	.L10
.L7:
	lea	edi, 27[r13]
	add	r13d, 1
	sub	r12d, 1
	call	BIT@PLT
	or	eax, DWORD PTR 4[rsp]
	mov	DWORD PTR 4[rsp], eax
	cmp	r13d, 4
	jle	.L39
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L36:
	mov	edx, DWORD PTR WILC_PIN_MUX_0[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, r14
	call	dev_err@PLT
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L40
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r13d
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L35:
	.cfi_restore_state
	mov	edx, r12d
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	xor	r13d, r13d
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L37:
	mov	edx, DWORD PTR WILC_PIN_MUX_0[rip]
	lea	rsi, .LC2[rip]
	mov	rdi, r14
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L12:
	mov	esi, DWORD PTR WILC_INTR2_ENABLE[rip]
	mov	rdx, r15
	mov	rdi, rbp
	call	wilc_spi_read_reg@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L13
	xor	r13d, r13d
	test	r12d, r12d
	jle	.L18
.L14:
	mov	edi, r13d
	add	r13d, 1
	call	BIT@PLT
	or	DWORD PTR 4[rsp], eax
	mov	eax, r12d
	sub	eax, r13d
	cmp	r13d, 2
	jg	.L18
	test	eax, eax
	jg	.L14
.L18:
	mov	esi, DWORD PTR WILC_INTR2_ENABLE[rip]
	mov	rdx, r15
	mov	rdi, rbp
	call	wilc_spi_read_reg@PLT
	mov	r13d, eax
	test	eax, eax
	jne	.L16
	mov	edx, DWORD PTR WILC_INTR2_ENABLE[rip]
	lea	rsi, .LC2[rip]
	mov	rdi, r14
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edx, DWORD PTR WILC_INTR_ENABLE[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, r14
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L38:
	mov	edx, DWORD PTR WILC_INTR_ENABLE[rip]
	lea	rsi, .LC2[rip]
	mov	rdi, r14
	call	dev_err@PLT
	jmp	.L1
.L13:
	mov	edx, DWORD PTR WILC_INTR2_ENABLE[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, r14
	call	dev_err@PLT
	jmp	.L1
.L40:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	wilc_spi_sync_ext, .-wilc_spi_sync_ext
	.comm	WILC_PIN_MUX_0,4,4
	.comm	WILC_INTR_ENABLE,4,4
	.comm	WILC_INTR2_ENABLE,4,4
	.comm	MAX_NUM_INT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_wilc_spi.c_wilc_spi_sync_ext.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Too many interrupts (%d)...\012\000"
	.align	2
.LC1:
	.ascii	"Failed read reg (%08x)...\012\000"
	.align	2
.LC2:
	.ascii	"Failed write reg (%08x)...\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	wilc_spi_sync_ext, %function
wilc_spi_sync_ext:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, lr}
	mov	r7, r1
	ldr	r3, .L31
	sub	sp, sp, #12
	mov	r6, r0
	ldr	r0, [r0, #4]
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	to_spi_device
	ldr	r3, .L31+4
	ldr	r3, [r3]
	cmp	r3, r7
	blt	.L25
	ldr	r3, [r6]
	ldr	r8, .L31+8
	str	r7, [r3]
	mov	r5, r0
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r8]
	bl	wilc_spi_read_reg
	subs	r4, r0, #0
	beq	.L26
	mov	r0, #8
	bl	BIT
	ldr	r2, [sp]
	ldr	r1, [r8]
	orr	r2, r0, r2
	mov	r0, r6
	str	r2, [sp]
	bl	wilc_spi_write_reg
	subs	r4, r0, #0
	beq	.L27
	ldr	r9, .L31+12
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r9]
	bl	wilc_spi_read_reg
	subs	r4, r0, #0
	beq	.L6
	cmp	r7, #0
	movgt	r8, r7
	addgt	r4, r7, #27
	ble	.L28
.L7:
	sub	r0, r4, r8
	sub	r8, r8, #1
	bl	BIT
	sub	r3, r7, r8
	cmp	r3, #4
	movle	r3, #1
	movgt	r3, #0
	cmp	r8, #0
	movle	r3, #0
	ldr	r2, [sp]
	cmp	r3, #0
	orr	r2, r0, r2
	str	r2, [sp]
	bne	.L7
.L9:
	mov	r0, r6
	ldr	r1, [r9]
	bl	wilc_spi_write_reg
	subs	r4, r0, #0
	beq	.L29
	cmp	r8, #0
	bne	.L11
.L15:
	mov	r4, #1
	b	.L1
.L26:
	mov	r0, r5
	ldr	r2, [r8]
	ldr	r1, .L31+16
	bl	dev_err
.L1:
	ldr	r3, .L31
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L30
	mov	r0, r4
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, pc}
.L25:
	mov	r2, r7
	ldr	r1, .L31+20
	bl	dev_err
	mov	r4, #0
	b	.L1
.L27:
	mov	r0, r5
	ldr	r2, [r8]
	ldr	r1, .L31+24
	bl	dev_err
	b	.L1
.L11:
	ldr	r7, .L31+28
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	wilc_spi_read_reg
	subs	r4, r0, #0
	beq	.L12
	cmp	r8, #0
	movgt	r4, #0
	ble	.L16
.L13:
	mov	r0, r4
	add	r4, r4, #1
	bl	BIT
	cmp	r4, #2
	sub	r3, r8, r4
	movle	r2, #1
	movgt	r2, #0
	cmp	r3, #0
	movle	r2, #0
	ldr	r3, [sp]
	cmp	r2, #0
	orr	r3, r3, r0
	str	r3, [sp]
	bne	.L13
.L16:
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	wilc_spi_read_reg
	subs	r4, r0, #0
	bne	.L15
	mov	r0, r5
	ldr	r2, [r7]
	ldr	r1, .L31+24
	bl	dev_err
	b	.L1
.L6:
	mov	r0, r5
	ldr	r2, [r9]
	ldr	r1, .L31+16
	bl	dev_err
	b	.L1
.L29:
	mov	r0, r5
	ldr	r2, [r9]
	ldr	r1, .L31+24
	bl	dev_err
	b	.L1
.L28:
	mov	r8, r7
	ldr	r2, [sp]
	b	.L9
.L12:
	mov	r0, r5
	ldr	r2, [r7]
	ldr	r1, .L31+16
	bl	dev_err
	b	.L1
.L30:
	bl	__stack_chk_fail
.L32:
	.align	2
.L31:
	.word	.LC3
	.word	MAX_NUM_INT
	.word	WILC_PIN_MUX_0
	.word	WILC_INTR_ENABLE
	.word	.LC1
	.word	.LC0
	.word	.LC2
	.word	WILC_INTR2_ENABLE
	.size	wilc_spi_sync_ext, .-wilc_spi_sync_ext
	.comm	WILC_PIN_MUX_0,4,4
	.comm	WILC_INTR_ENABLE,4,4
	.comm	WILC_INTR2_ENABLE,4,4
	.comm	MAX_NUM_INT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
