	.file	"extr_gfxhub_v1_0.c_gfxhub_v1_0_init_system_aperture_regs.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	gfxhub_v1_0_init_system_aperture_regs, @function
gfxhub_v1_0_init_system_aperture_regs:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xor	ecx, ecx
	xor	esi, esi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	edx, DWORD PTR mmMC_VM_AGP_BASE[rip]
	mov	edi, DWORD PTR GC[rip]
	call	WREG32_SOC15_RLC@PLT
	movsx	ecx, BYTE PTR 23[rbx]
	mov	edx, DWORD PTR mmMC_VM_AGP_BOT[rip]
	xor	esi, esi
	mov	edi, DWORD PTR GC[rip]
	call	WREG32_SOC15_RLC@PLT
	movsx	ecx, BYTE PTR 27[rbx]
	mov	edx, DWORD PTR mmMC_VM_AGP_TOP[rip]
	xor	esi, esi
	mov	edi, DWORD PTR GC[rip]
	call	WREG32_SOC15_RLC@PLT
	mov	esi, DWORD PTR 20[rbx]
	mov	edi, DWORD PTR 36[rbx]
	call	min@PLT
	mov	edi, DWORD PTR GC[rip]
	mov	edx, DWORD PTR mmMC_VM_SYSTEM_APERTURE_LOW_ADDR[rip]
	xor	esi, esi
	sar	eax, 18
	mov	ecx, eax
	call	WREG32_SOC15_RLC@PLT
	mov	rax, QWORD PTR CHIP_RAVEN[rip]
	cmp	QWORD PTR [rbx], rax
	mov	esi, DWORD PTR 24[rbx]
	mov	edi, DWORD PTR 28[rbx]
	jne	.L3
	cmp	DWORD PTR 8[rbx], 7
	jg	.L8
.L3:
	call	max@PLT
	sar	eax, 18
.L6:
	mov	edx, DWORD PTR mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR[rip]
	mov	edi, DWORD PTR GC[rip]
	mov	ecx, eax
	xor	esi, esi
	call	WREG32_SOC15_RLC@PLT
	mov	ebp, DWORD PTR 40[rbx]
	sub	ebp, DWORD PTR 32[rbx]
	xor	esi, esi
	add	ebp, DWORD PTR 16[rbx]
	mov	edx, DWORD PTR mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB[rip]
	mov	edi, DWORD PTR GC[rip]
	mov	ecx, ebp
	sar	ecx, 12
	call	WREG32_SOC15@PLT
	mov	ecx, 44
	mov	edx, DWORD PTR mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB[rip]
	xor	esi, esi
	mov	edi, DWORD PTR GC[rip]
	sar	ebp, cl
	mov	ecx, ebp
	call	WREG32_SOC15@PLT
	mov	eax, DWORD PTR 12[rbx]
	mov	edx, DWORD PTR mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32[rip]
	xor	esi, esi
	mov	edi, DWORD PTR GC[rip]
	sar	eax, 12
	mov	ecx, eax
	call	WREG32_SOC15@PLT
	mov	eax, DWORD PTR 12[rbx]
	mov	ecx, 44
	xor	esi, esi
	mov	edx, DWORD PTR mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32[rip]
	mov	edi, DWORD PTR GC[rip]
	sar	eax, cl
	mov	ecx, eax
	call	WREG32_SOC15@PLT
	mov	ecx, DWORD PTR ACTIVE_PAGE_MIGRATION_PTE_READ_RETRY[rip]
	xor	esi, esi
	mov	edx, DWORD PTR VM_L2_PROTECTION_FAULT_CNTL2[rip]
	mov	edi, DWORD PTR GC[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	r8d, 1
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	WREG32_FIELD15@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	sar	edi, 18
	sar	esi, 18
	add	edi, 1
	call	max@PLT
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	gfxhub_v1_0_init_system_aperture_regs, .-gfxhub_v1_0_init_system_aperture_regs
	.comm	mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,4,4
	.comm	mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,4,4
	.comm	mmMC_VM_AGP_TOP,4,4
	.comm	mmMC_VM_AGP_BOT,4,4
	.comm	mmMC_VM_AGP_BASE,4,4
	.comm	VM_L2_PROTECTION_FAULT_CNTL2,4,4
	.comm	GC,4,4
	.comm	CHIP_RAVEN,8,8
	.comm	ACTIVE_PAGE_MIGRATION_PTE_READ_RETRY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gfxhub_v1_0.c_gfxhub_v1_0_init_system_aperture_regs.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gfxhub_v1_0_init_system_aperture_regs, %function
gfxhub_v1_0_init_system_aperture_regs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	r3, #0
	push	{r4, r5, r6, r7, lr}
	mov	r4, r0
	ldr	r5, .L8
	ldr	r2, .L8+4
	sub	sp, sp, #12
	mov	r1, r3
	ldr	r2, [r2]
	ldr	r0, [r5]
	bl	WREG32_SOC15_RLC
	ldr	r2, .L8+8
	mov	r1, #0
	ldrsb	r3, [r4, #19]
	ldr	r2, [r2]
	ldr	r0, [r5]
	bl	WREG32_SOC15_RLC
	ldr	r2, .L8+12
	mov	r1, #0
	ldr	r2, [r2]
	ldrsb	r3, [r4, #23]
	ldr	r0, [r5]
	bl	WREG32_SOC15_RLC
	ldr	r3, .L8+16
	ldr	r1, [r4, #16]
	ldr	r0, [r4, #32]
	ldr	r7, [r3]
	ldr	r6, [r5]
	bl	min
	mov	r3, r0
	mov	r2, r7
	asr	r3, r3, #18
	mov	r0, r6
	mov	r1, #0
	bl	WREG32_SOC15_RLC
	ldr	r3, .L8+20
	ldr	r2, [r4]
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L2
	ldr	r2, [r4, #4]
	ldr	r3, .L8+24
	cmp	r2, #7
	ldr	r7, [r3]
	ldr	r6, [r5]
	ldr	r0, [r4, #24]
	ldr	r1, [r4, #20]
	bgt	.L7
.L3:
	bl	max
	mov	r2, r7
	asr	r3, r0, #18
	mov	r1, #0
	mov	r0, r6
	bl	WREG32_SOC15_RLC
.L4:
	mov	r7, #44
	ldr	r2, [r4, #28]
	ldr	r6, [r4, #36]
	ldr	r3, [r4, #12]
	sub	r6, r6, r2
	ldr	r2, .L8+28
	add	r6, r6, r3
	asr	r3, r6, #12
	mov	r1, #0
	ldr	r2, [r2]
	ldr	r0, [r5]
	bl	WREG32_SOC15
	ldr	r2, .L8+32
	asr	r3, r6, r7
	mov	r1, #0
	ldr	r2, [r2]
	ldr	r0, [r5]
	bl	WREG32_SOC15
	ldr	r3, [r4, #8]
	ldr	r2, .L8+36
	mov	r1, #0
	ldr	r2, [r2]
	ldr	r0, [r5]
	asr	r3, r3, #12
	bl	WREG32_SOC15
	ldr	r3, [r4, #8]
	ldr	r2, .L8+40
	asr	r3, r3, r7
	mov	r1, #0
	ldr	r2, [r2]
	ldr	r0, [r5]
	bl	WREG32_SOC15
	mov	r1, #1
	ldr	r3, .L8+44
	ldr	r2, .L8+48
	str	r1, [sp]
	ldr	r0, [r5]
	mov	r1, #0
	ldr	r3, [r3]
	ldr	r2, [r2]
	bl	WREG32_FIELD15
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L2:
	ldr	r3, .L8+24
	ldr	r6, [r5]
	ldr	r7, [r3]
	ldr	r0, [r4, #24]
	ldr	r1, [r4, #20]
	b	.L3
.L7:
	asr	r0, r0, #18
	asr	r1, r1, #18
	add	r0, r0, #1
	bl	max
	mov	r2, r7
	mov	r3, r0
	mov	r1, #0
	mov	r0, r6
	bl	WREG32_SOC15_RLC
	b	.L4
.L9:
	.align	2
.L8:
	.word	GC
	.word	mmMC_VM_AGP_BASE
	.word	mmMC_VM_AGP_BOT
	.word	mmMC_VM_AGP_TOP
	.word	mmMC_VM_SYSTEM_APERTURE_LOW_ADDR
	.word	CHIP_RAVEN
	.word	mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR
	.word	mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB
	.word	mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB
	.word	mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32
	.word	mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32
	.word	ACTIVE_PAGE_MIGRATION_PTE_READ_RETRY
	.word	VM_L2_PROTECTION_FAULT_CNTL2
	.size	gfxhub_v1_0_init_system_aperture_regs, .-gfxhub_v1_0_init_system_aperture_regs
	.comm	mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,4,4
	.comm	mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,4,4
	.comm	mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,4,4
	.comm	mmMC_VM_AGP_TOP,4,4
	.comm	mmMC_VM_AGP_BOT,4,4
	.comm	mmMC_VM_AGP_BASE,4,4
	.comm	VM_L2_PROTECTION_FAULT_CNTL2,4,4
	.comm	GC,4,4
	.comm	CHIP_RAVEN,4,4
	.comm	ACTIVE_PAGE_MIGRATION_PTE_READ_RETRY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
