	.file	"extr_nv_i2c.c_nvidia_gpio_setscl.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	nvidia_gpio_setscl, @function
nvidia_gpio_setscl:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	r12, QWORD PTR 8[rdi]
	mov	rbx, rdi
	mov	rax, QWORD PTR [rdi]
	mov	rdi, r12
	lea	rsi, 1[rax]
	call	NVReadCrtc@PLT
	mov	rsi, QWORD PTR [rbx]
	mov	rdi, r12
	pop	rbx
	.cfi_def_cfa_offset 24
	mov	edx, eax
	and	eax, 208
	and	edx, 240
	or	edx, 32
	test	ebp, ebp
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	cmove	edx, eax
	add	rsi, 1
	or	edx, 1
	jmp	NVWriteCrtc@PLT
	.cfi_endproc
.LFE0:
	.size	nvidia_gpio_setscl, .-nvidia_gpio_setscl
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nv_i2c.c_nvidia_gpio_setscl.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvidia_gpio_setscl, %function
nvidia_gpio_setscl:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldm	r0, {r3, r6}
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	add	r1, r3, #1
	bl	NVReadCrtc
	cmp	r5, #0
	andne	r2, r0, #240
	ldr	r1, [r4]
	andeq	r2, r0, #208
	orrne	r2, r2, #32
	mov	r0, r6
	pop	{r4, r5, r6, lr}
	orr	r2, r2, #1
	add	r1, r1, #1
	b	NVWriteCrtc
	.size	nvidia_gpio_setscl, .-nvidia_gpio_setscl
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
