	.file	"extr_dlil.c_dlil_main_input_thread_func.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	dlil_main_input_thread_func, @function
dlil_main_input_thread_func:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdi
	xor	edi, edi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	lea	r15, 24[r14]
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	lea	rbp, 8[r14]
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	lea	rbx, 12[r14]
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	cmp	QWORD PTR dlil_main_input_thread[rip], r14
	sete	dil
	call	VERIFY@PLT
	xor	edi, edi
	cmp	QWORD PTR 32[r14], 0
	sete	dil
	call	VERIFY@PLT
	mov	rax, QWORD PTR IFNET_MODEL_INPUT_POLL_OFF[rip]
	xor	edi, edi
	cmp	QWORD PTR [r14], rax
	sete	dil
	call	VERIFY@PLT
	.p2align 4,,10
	.p2align 3
.L6:
	mov	rdi, rbx
	call	lck_mtx_lock_spin@PLT
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L21:
	mov	eax, DWORD PTR PZERO[rip]
	mov	ecx, DWORD PTR 28[r14]
	xor	r8d, r8d
	mov	rsi, rbx
	mov	DWORD PTR 8[r14], 0
	mov	rdi, rbp
	lea	edx, -1[rax]
	or	edx, DWORD PTR PSPIN[rip]
	call	msleep@PLT
.L19:
	mov	edx, DWORD PTR DLIL_INPUT_RUNNING[rip]
	mov	eax, DWORD PTR 8[r14]
	mov	ecx, edx
	not	ecx
	test	ecx, eax
	je	.L21
	mov	ecx, DWORD PTR DLIL_INPUT_WAITING[rip]
	or	eax, edx
	xor	edi, edi
	not	ecx
	and	eax, ecx
	test	DWORD PTR DLIL_INPUT_TERMINATE[rip], eax
	mov	DWORD PTR 8[r14], eax
	sete	dil
	call	VERIFY@PLT
	mov	rdi, r15
	mov	r12d, DWORD PTR DLIL_PROTO_WAITING[rip]
	or	r12d, DWORD PTR DLIL_PROTO_REGISTER[rip]
	and	r12d, DWORD PTR 8[r14]
	call	qlen@PLT
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	mov	rdi, r15
	mov	DWORD PTR 8[rsp], eax
	call	_getq_all@PLT
	mov	rdi, r14
	mov	r13, rax
	call	qlen@PLT
	xor	esi, esi
	xor	ecx, ecx
	xor	edx, edx
	mov	rdi, r14
	mov	DWORD PTR 12[rsp], eax
	call	_getq_all@PLT
	mov	QWORD PTR 16[r14], 0
	mov	rdi, rbx
	mov	QWORD PTR [rsp], rax
	call	lck_mtx_unlock@PLT
	mov	rsi, QWORD PTR [rsp]
	test	rsi, rsi
	je	.L4
	mov	rcx, QWORD PTR [r14]
	mov	edx, DWORD PTR 12[rsp]
	mov	rdi, QWORD PTR lo_ifp[rip]
	call	dlil_input_packet_list_extended@PLT
.L4:
	test	r13, r13
	je	.L5
	mov	rcx, QWORD PTR [r14]
	mov	edx, DWORD PTR 8[rsp]
	mov	rsi, r13
	xor	edi, edi
	call	dlil_input_packet_list_extended@PLT
.L5:
	test	r12d, r12d
	je	.L6
	xor	eax, eax
	call	proto_input_run@PLT
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	dlil_main_input_thread_func, .-dlil_main_input_thread_func
	.comm	lo_ifp,8,8
	.comm	dlil_main_input_thread,8,8
	.comm	PZERO,4,4
	.comm	PSPIN,4,4
	.comm	IFNET_MODEL_INPUT_POLL_OFF,8,8
	.comm	DLIL_PROTO_WAITING,4,4
	.comm	DLIL_PROTO_REGISTER,4,4
	.comm	DLIL_INPUT_WAITING,4,4
	.comm	DLIL_INPUT_TERMINATE,4,4
	.comm	DLIL_INPUT_RUNNING,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_dlil.c_dlil_main_input_thread_func.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dlil_main_input_thread_func, %function
dlil_main_input_thread_func:
	@ Volatile: function does not return.
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	r4, r0
	ldr	r3, .L20
	mov	r5, r0
	ldr	r0, [r3]
	push	{r7, fp, lr}
	sub	r0, r0, r4
	clz	r0, r0
	sub	sp, sp, #36
	lsr	r0, r0, #5
	bl	VERIFY
	ldr	r0, [r4, #24]
	mov	r9, #0
	clz	r0, r0
	lsr	r0, r0, #5
	bl	VERIFY
	ldr	r3, .L20+4
	ldr	r0, [r5], #8
	ldr	r3, [r3]
	mov	fp, r9
	sub	r0, r0, r3
	clz	r0, r0
	lsr	r0, r0, #5
	bl	VERIFY
	ldr	r10, .L20+8
	add	r3, r4, #16
	ldr	r7, .L20+12
	ldr	r6, .L20+16
	str	r3, [sp, #8]
	add	r8, r4, #4
.L6:
	mov	r0, r5
	bl	lck_mtx_lock_spin
	ldr	r3, [r4, #4]
	ldr	r2, [r10]
	bics	r1, r3, r2
	bne	.L2
.L3:
	ldr	r3, [r7]
	ldr	r2, [r6]
	sub	r3, r3, #1
	str	r9, [r4, #4]
	str	fp, [sp]
	orr	r2, r3, r2
	mov	r1, r5
	ldr	r3, [r4, #20]
	mov	r0, r8
	bl	msleep
	ldr	r3, [r4, #4]
	ldr	r2, [r10]
	bics	r1, r3, r2
	beq	.L3
.L2:
	ldr	r1, .L20+20
	orr	r3, r3, r2
	ldr	r2, .L20+24
	ldr	r1, [r1]
	ldr	r2, [r2]
	bic	r3, r3, r1
	tst	r3, r2
	moveq	r0, #1
	movne	r0, #0
	str	r3, [r4, #4]
	bl	VERIFY
	ldr	r2, .L20+28
	ldr	r3, .L20+32
	ldr	r1, [r2]
	ldr	r3, [r3]
	ldr	r2, [r4, #4]
	orr	r3, r3, r1
	and	r3, r3, r2
	ldr	r0, [sp, #8]
	str	r3, [sp, #12]
	bl	qlen
	mov	r3, #0
	mov	ip, r0
	mov	r2, r3
	mov	r1, r3
	ldr	r0, [sp, #8]
	str	ip, [sp, #24]
	bl	_getq_all
	mov	r3, r0
	mov	r0, r4
	str	r3, [sp, #16]
	bl	qlen
	mov	r3, #0
	mov	ip, r0
	mov	r1, r3
	mov	r2, r3
	mov	r0, r4
	str	ip, [sp, #28]
	bl	_getq_all
	str	r9, [r4, #12]
	str	r0, [sp, #20]
	mov	r0, r5
	bl	lck_mtx_unlock
	ldr	r1, [sp, #20]
	cmp	r1, #0
	beq	.L4
	ldr	r0, .L20+36
	ldr	r2, [sp, #28]
	ldr	r3, [r4]
	ldr	r0, [r0]
	bl	dlil_input_packet_list_extended
.L4:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	beq	.L5
	mov	r1, r3
	mov	r0, #0
	ldr	r2, [sp, #24]
	ldr	r3, [r4]
	bl	dlil_input_packet_list_extended
.L5:
	ldr	r3, [sp, #12]
	cmp	r3, #0
	beq	.L6
	bl	proto_input_run
	b	.L6
.L21:
	.align	2
.L20:
	.word	dlil_main_input_thread
	.word	IFNET_MODEL_INPUT_POLL_OFF
	.word	DLIL_INPUT_RUNNING
	.word	PZERO
	.word	PSPIN
	.word	DLIL_INPUT_WAITING
	.word	DLIL_INPUT_TERMINATE
	.word	DLIL_PROTO_REGISTER
	.word	DLIL_PROTO_WAITING
	.word	lo_ifp
	.size	dlil_main_input_thread_func, .-dlil_main_input_thread_func
	.comm	lo_ifp,4,4
	.comm	dlil_main_input_thread,4,4
	.comm	PZERO,4,4
	.comm	PSPIN,4,4
	.comm	IFNET_MODEL_INPUT_POLL_OFF,4,4
	.comm	DLIL_PROTO_WAITING,4,4
	.comm	DLIL_PROTO_REGISTER,4,4
	.comm	DLIL_INPUT_WAITING,4,4
	.comm	DLIL_INPUT_TERMINATE,4,4
	.comm	DLIL_INPUT_RUNNING,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
