	.file	"extr_h264chroma_msa.c_avc_chroma_hv_4x8_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	avc_chroma_hv_4x8_msa, @function
avc_chroma_hv_4x8_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, r8d
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, r9d
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	mov	edi, ecx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	DWORD PTR 20[rsp], edx
	mov	QWORD PTR 24[rsp], rsi
	call	__msa_fill_b@PLT
	mov	edi, r14d
	xor	r14d, r14d
	mov	r13d, eax
	call	__msa_fill_b@PLT
	mov	edi, r13d
	xor	r13d, r13d
	mov	esi, eax
	call	__msa_ilvr_b@PLT
	mov	edi, r12d
	mov	ebx, eax
	call	__msa_fill_h@PLT
	mov	edi, DWORD PTR 96[rsp]
	mov	DWORD PTR 12[rsp], eax
	call	__msa_fill_h@PLT
	mov	rdi, QWORD PTR chroma_mask_arr[rip]
	mov	DWORD PTR 16[rsp], eax
	call	LD_SB@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 104
	xor	r11d, r11d
	xor	r10d, r10d
	push	0
	.cfi_def_cfa_offset 112
	mov	r12d, DWORD PTR 36[rsp]
	mov	r9d, r11d
	xor	r8d, r8d
	mov	ecx, r14d
	mov	edx, r10d
	mov	rdi, rbp
	mov	r15d, eax
	mov	esi, r12d
	call	LD_UB5@PLT
	lea	eax, [r12+r12*4]
	mov	r10d, r12d
	xor	r12d, r12d
	cdqe
	xor	r9d, r9d
	mov	r8d, r13d
	mov	ecx, r12d
	lea	rdi, 0[rbp+rax*4]
	xor	ebp, ebp
	mov	esi, r10d
	mov	DWORD PTR 36[rsp], r10d
	mov	edx, ebp
	call	LD_UB4@PLT
	xor	r10d, r10d
	push	r14
	.cfi_def_cfa_offset 120
	mov	r9d, r15d
	push	r10
	.cfi_def_cfa_offset 128
	mov	edi, r10d
	mov	r8d, r15d
	xor	ecx, ecx
	mov	edx, r14d
	mov	esi, r14d
	call	VSHF_B2_UB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 96
	xor	r11d, r11d
	mov	r9d, r15d
	push	r11
	.cfi_def_cfa_offset 104
	mov	edx, r11d
	mov	esi, r11d
	mov	r8d, r15d
	push	0
	.cfi_def_cfa_offset 112
	xor	ecx, ecx
	xor	edi, edi
	call	VSHF_B2_UB@PLT
	push	rbp
	.cfi_def_cfa_offset 120
	mov	r9d, r15d
	mov	r8d, r15d
	push	0
	.cfi_def_cfa_offset 128
	mov	ecx, r12d
	mov	edx, ebp
	mov	esi, ebp
	xor	edi, edi
	call	VSHF_B2_UB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 96
	mov	r9d, r15d
	mov	r8d, r15d
	push	r13
	.cfi_def_cfa_offset 104
	xor	r15d, r15d
	xor	ecx, ecx
	mov	edx, r13d
	push	r12
	.cfi_def_cfa_offset 112
	mov	esi, r13d
	mov	edi, r12d
	call	VSHF_B2_UB@PLT
	push	0
	.cfi_def_cfa_offset 120
	xor	r11d, r11d
	xor	r10d, r10d
	push	r15
	.cfi_def_cfa_offset 128
	mov	ecx, r11d
	mov	edi, r10d
	mov	r9d, ebx
	push	0
	.cfi_def_cfa_offset 136
	mov	r8d, ebx
	mov	esi, r14d
	xor	edx, edx
	push	0
	.cfi_def_cfa_offset 144
	push	rbx
	.cfi_def_cfa_offset 152
	push	rbx
	.cfi_def_cfa_offset 160
	call	DOTP_UB4_UH@PLT
	add	rsp, 64
	.cfi_def_cfa_offset 96
	mov	r9d, ebx
	mov	r8d, ebx
	push	0
	.cfi_def_cfa_offset 104
	mov	ecx, r13d
	mov	edx, r12d
	mov	esi, ebp
	push	0
	.cfi_def_cfa_offset 112
	xor	edi, edi
	push	0
	.cfi_def_cfa_offset 120
	push	0
	.cfi_def_cfa_offset 128
	push	rbx
	.cfi_def_cfa_offset 136
	push	rbx
	.cfi_def_cfa_offset 144
	xor	ebx, ebx
	call	DOTP_UB4_UH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 96
	mov	r8d, r15d
	xor	edx, edx
	push	r13
	.cfi_def_cfa_offset 104
	xor	edi, edi
	push	r14
	.cfi_def_cfa_offset 112
	push	rbp
	.cfi_def_cfa_offset 120
	push	r12
	.cfi_def_cfa_offset 128
	mov	ecx, DWORD PTR 44[rsp]
	push	rcx
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	mov	r9d, DWORD PTR 64[rsp]
	mov	esi, r9d
	mov	DWORD PTR 60[rsp], ecx
	call	MUL4@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 96
	xor	r11d, r11d
	xor	r10d, r10d
	push	r11
	.cfi_def_cfa_offset 104
	xor	r8d, r8d
	xor	edx, edx
	xor	edi, edi
	push	r10
	.cfi_def_cfa_offset 112
	push	rbx
	.cfi_def_cfa_offset 120
	push	r15
	.cfi_def_cfa_offset 128
	mov	ecx, DWORD PTR 44[rsp]
	push	rcx
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	mov	r9d, DWORD PTR 64[rsp]
	mov	esi, r9d
	call	MUL4@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 96
	mov	r9d, ebp
	mov	r8d, r12d
	mov	ecx, r13d
	mov	edx, r14d
	mov	esi, ebp
	mov	edi, r12d
	call	ADD2@PLT
	xor	r11d, r11d
	xor	r10d, r10d
	mov	r9d, r13d
	mov	ecx, r11d
	mov	edx, r10d
	mov	r8d, r14d
	mov	esi, ebx
	mov	edi, r15d
	call	ADD2@PLT
	mov	ecx, r13d
	mov	edx, r14d
	mov	esi, ebp
	mov	edi, r12d
	mov	r8d, 6
	call	SRARI_H4_UH@PLT
	mov	ecx, r13d
	mov	edx, r14d
	mov	esi, ebp
	mov	edi, r12d
	mov	r8d, 7
	call	SAT_UH4_UH@PLT
	mov	r9d, ebx
	mov	r8d, r15d
	mov	ecx, r14d
	mov	edx, r13d
	mov	esi, r12d
	mov	edi, ebp
	call	PCKEV_B2_UB@PLT
	mov	r10d, DWORD PTR 20[rsp]
	mov	esi, ebx
	mov	edi, r15d
	mov	r9d, 3
	mov	r8d, 2
	mov	ecx, 1
	xor	edx, edx
	push	r10
	.cfi_def_cfa_offset 104
	push	QWORD PTR 32[rsp]
	.cfi_def_cfa_offset 112
	push	3
	.cfi_def_cfa_offset 120
	push	2
	.cfi_def_cfa_offset 128
	push	1
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	call	ST_W8@PLT
	add	rsp, 88
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	avc_chroma_hv_4x8_msa, .-avc_chroma_hv_4x8_msa
	.comm	chroma_mask_arr,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_h264chroma_msa.c_avc_chroma_hv_4x8_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	avc_chroma_hv_4x8_msa, %function
avc_chroma_hv_4x8_msa:
	@ args = 12, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	fp, r0
	sub	sp, sp, #60
	mov	r0, r3
	str	r2, [sp, #32]
	str	r1, [sp, #52]
	str	fp, [sp, #40]
	bl	__msa_fill_b
	mov	r4, r0
	ldr	r0, [sp, #96]
	bl	__msa_fill_b
	mov	r1, r0
	mov	r0, r4
	bl	__msa_ilvr_b
	mov	r3, r0
	ldr	r0, [sp, #100]
	str	r3, [sp, #36]
	bl	__msa_fill_h
	mov	r3, r0
	ldr	r0, [sp, #104]
	str	r3, [sp, #44]
	bl	__msa_fill_h
	ldr	r3, .L4
	str	r0, [sp, #48]
	ldr	r0, [r3]
	bl	LD_SB
	mov	r8, #0
	mov	r4, r0
	mov	fp, r8
	mov	r5, r8
	mov	r2, r8
	mov	r3, r8
	ldr	r1, [sp, #32]
	ldr	r0, [sp, #40]
	str	r8, [sp, #8]
	str	r8, [sp, #4]
	str	r8, [sp]
	bl	LD_UB5
	ldr	ip, [sp, #32]
	ldr	r1, [sp, #40]
	add	r0, ip, ip, lsl #2
	mov	r2, r8
	mov	r3, r8
	add	r0, r1, r0, lsl #2
	str	r8, [sp, #4]
	mov	r1, ip
	str	r8, [sp]
	bl	LD_UB4
	mov	r2, r8
	mov	r3, r8
	mov	r1, r8
	str	r4, [sp, #4]
	str	r4, [sp]
	mov	r0, r8
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B2_UB
	mov	r2, r8
	mov	r3, r8
	mov	r1, r8
	str	r4, [sp, #4]
	str	r4, [sp]
	mov	r0, r8
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B2_UB
	mov	r2, r8
	mov	r3, r8
	mov	r1, r8
	str	r4, [sp, #4]
	str	r4, [sp]
	mov	r0, r8
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B2_UB
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	str	r4, [sp, #4]
	str	r4, [sp]
	mov	r0, r8
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B2_UB
	ldr	r2, [sp, #36]
	mov	r3, r8
	mov	r1, r8
	str	r2, [sp, #12]
	str	r2, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r0, r8
	mov	r2, r8
	str	r8, [sp, #28]
	str	r8, [sp, #24]
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	bl	DOTP_UB4_UH
	ldr	r2, [sp, #36]
	mov	r3, r8
	mov	r1, r8
	str	r2, [sp, #12]
	str	r2, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r0, r8
	mov	r2, r8
	str	r8, [sp, #28]
	str	r8, [sp, #24]
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	bl	DOTP_UB4_UH
	ldr	r6, [sp, #44]
	ldr	r7, [sp, #48]
	mov	r3, r6
	mov	r2, r8
	mov	r1, r7
	str	r6, [sp, #12]
	mov	r0, r8
	str	r7, [sp, #4]
	str	r8, [sp, #8]
	str	r8, [sp]
	str	r8, [sp, #28]
	str	r8, [sp, #24]
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	bl	MUL4
	mov	r3, r6
	mov	r1, r7
	mov	r2, r8
	str	r6, [sp, #12]
	mov	r0, r8
	str	r7, [sp, #4]
	str	r8, [sp, #8]
	str	r8, [sp]
	str	r8, [sp, #28]
	str	r8, [sp, #24]
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	bl	MUL4
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stm	sp, {r5, fp}
	bl	ADD2
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	str	r8, [sp, #4]
	str	r8, [sp]
	bl	ADD2
	mov	ip, #6
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	str	ip, [sp]
	mov	r0, r8
	bl	SRARI_H4_UH
	mov	ip, #7
	mov	r4, r8
	mov	r6, r8
	str	ip, [sp]
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	bl	SAT_UH4_UH
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stm	sp, {r4, r6}
	bl	PCKEV_B2_UB
	mov	lr, #3
	mov	ip, #2
	mov	r3, #1
	ldr	r0, [sp, #52]
	ldr	r1, [sp, #32]
	str	r0, [sp, #24]
	str	r1, [sp, #28]
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	str	lr, [sp, #20]
	str	lr, [sp, #4]
	str	ip, [sp, #16]
	str	ip, [sp]
	str	r3, [sp, #12]
	str	r8, [sp, #8]
	bl	ST_W8
	add	sp, sp, #60
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
	.align	2
.L4:
	.word	chroma_mask_arr
	.size	avc_chroma_hv_4x8_msa, .-avc_chroma_hv_4x8_msa
	.comm	chroma_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
