	.file	"extr_vcn_v1_0.c_vcn_v1_0_dec_ring_set_wptr.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	vcn_v1_0_dec_ring_set_wptr, @function
vcn_v1_0_dec_ring_set_wptr:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	rbx, rdi
	mov	edi, DWORD PTR [rdi]
	mov	rax, QWORD PTR 8[rbx]
	mov	eax, DWORD PTR [rax]
	test	DWORD PTR AMD_PG_SUPPORT_VCN_DPG[rip], eax
	jne	.L8
.L2:
	call	lower_32_bits@PLT
	mov	edx, DWORD PTR mmUVD_RBC_RB_WPTR[rip]
	xor	esi, esi
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	edi, DWORD PTR UVD[rip]
	mov	ecx, eax
	jmp	WREG32_SOC15@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	call	lower_32_bits@PLT
	mov	edi, DWORD PTR UVD[rip]
	mov	edx, DWORD PTR mmUVD_SCRATCH2[rip]
	xor	esi, esi
	or	eax, -2147483648
	mov	ecx, eax
	call	WREG32_SOC15@PLT
	mov	edi, DWORD PTR [rbx]
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	vcn_v1_0_dec_ring_set_wptr, .-vcn_v1_0_dec_ring_set_wptr
	.comm	mmUVD_SCRATCH2,4,4
	.comm	mmUVD_RBC_RB_WPTR,4,4
	.comm	UVD,4,4
	.comm	AMD_PG_SUPPORT_VCN_DPG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_vcn_v1_0.c_vcn_v1_0_dec_ring_set_wptr.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vcn_v1_0_dec_ring_set_wptr, %function
vcn_v1_0_dec_ring_set_wptr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r2, [r0, #4]
	ldr	r3, .L9
	ldr	r2, [r2]
	ldr	r3, [r3]
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r6, .L9+4
	tst	r2, r3
	mov	r4, r0
	ldr	r5, [r6]
	ldr	r0, [r0]
	bne	.L8
.L2:
	ldr	r3, .L9+8
	ldr	r4, [r3]
	bl	lower_32_bits
	mov	r2, r4
	mov	r3, r0
	mov	r1, #0
	mov	r0, r5
	pop	{r4, r5, r6, r7, r8, lr}
	b	WREG32_SOC15
.L8:
	ldr	r3, .L9+12
	ldr	r7, [r3]
	bl	lower_32_bits
	mov	r2, r7
	orr	r3, r0, #-2147483648
	mov	r1, #0
	mov	r0, r5
	bl	WREG32_SOC15
	ldr	r5, [r6]
	ldr	r0, [r4]
	b	.L2
.L10:
	.align	2
.L9:
	.word	AMD_PG_SUPPORT_VCN_DPG
	.word	UVD
	.word	mmUVD_RBC_RB_WPTR
	.word	mmUVD_SCRATCH2
	.size	vcn_v1_0_dec_ring_set_wptr, .-vcn_v1_0_dec_ring_set_wptr
	.comm	mmUVD_SCRATCH2,4,4
	.comm	mmUVD_RBC_RB_WPTR,4,4
	.comm	UVD,4,4
	.comm	AMD_PG_SUPPORT_VCN_DPG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
