	.file	"extr_stv0900_core.c_stv0900_start_search.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	stv0900_start_search
	.type	stv0900_start_search, @function
stv0900_start_search:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	edx, 31
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	ebx, esi
	mov	esi, DWORD PTR DEMOD_MODE[rip]
	call	stv0900_write_bits@PLT
	mov	eax, DWORD PTR 0[rbp]
	cmp	eax, 16
	je	.L32
.L2:
	cmp	eax, 31
	jle	.L33
.L3:
	mov	rdx, QWORD PTR 8[rbp]
	cmp	eax, 32
	jg	.L4
	cmp	DWORD PTR [rdx], 5000000
	mov	esi, DWORD PTR CARCFG[rip]
	jle	.L34
	mov	edx, 196
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR RTCS2[rip]
	mov	edx, 68
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
.L6:
	mov	esi, DWORD PTR CFRINIT1[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR CFRINIT0[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	cmp	DWORD PTR 0[rbp], 31
	jg	.L35
.L14:
	mov	esi, DWORD PTR SFRSTEP[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR TMGTHRISE[rip]
	mov	edx, 224
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR TMGTHFALL[rip]
	mov	edx, 192
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR SCAN_ENABLE[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_bits@PLT
	mov	esi, DWORD PTR CFR_AUTOSCAN[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_bits@PLT
	mov	esi, DWORD PTR S1S2_SEQUENTIAL[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_bits@PLT
	mov	esi, DWORD PTR RTC[rip]
	mov	edx, 136
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	eax, DWORD PTR 0[rbp]
	cmp	eax, 31
	jle	.L17
	mov	rdx, QWORD PTR 8[rbp]
	mov	esi, DWORD PTR CARFREQ[rip]
	mov	edx, DWORD PTR [rdx+rbx*4]
	cmp	edx, 1999999
	jg	.L18
	cmp	eax, 32
	je	.L36
	mov	edx, 137
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
.L20:
	mov	esi, DWORD PTR CARHDR[rip]
	mov	edx, 64
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	rax, QWORD PTR 16[rbp]
	mov	eax, DWORD PTR [rax+rbx*4]
	cmp	eax, 128
	jne	.L37
.L24:
	mov	esi, DWORD PTR DMDISTATE[rip]
	mov	edx, 31
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	edx, 24
.L30:
	mov	esi, DWORD PTR DMDISTATE[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	rdi, rbp
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	stv0900_write_reg@PLT
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	cmp	DWORD PTR [rdx+rbx*4], 5000000
	mov	esi, DWORD PTR RTCS2[rip]
	jle	.L38
	mov	edx, 68
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
.L8:
	mov	esi, DWORD PTR CARCFG[rip]
	mov	edx, 70
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	rax, QWORD PTR 16[rbp]
	cmp	DWORD PTR [rax+rbx*4], 128
	je	.L39
	mov	rax, QWORD PTR 32[rbp]
	mov	rcx, QWORD PTR 8[rbp]
	movsx	rdx, DWORD PTR [rax+rbx*4]
	mov	rax, rdx
	imul	rdx, rdx, 274877907
	sar	eax, 31
	sar	rdx, 39
	sub	edx, eax
	cmp	DWORD PTR [rcx+rbx*4], 5000000
	lea	eax, 600[rdx]
	jle	.L40
.L12:
	movsx	rcx, DWORD PTR 24[rbp]
	sal	eax, 16
	mov	rdx, rcx
	imul	rcx, rcx, 274877907
	sar	edx, 31
	sar	rcx, 38
	sub	ecx, edx
	cdq
	idiv	ecx
	mov	r12d, eax
.L10:
	mov	edi, r12d
	call	MSB@PLT
	mov	esi, DWORD PTR CFR_UP1[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	stv0900_write_bits@PLT
	mov	edi, r12d
	neg	r12d
	call	LSB@PLT
	mov	esi, DWORD PTR CFR_UP0[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	stv0900_write_bits@PLT
	mov	edi, r12d
	call	MSB@PLT
	mov	esi, DWORD PTR CFR_LOW1[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	stv0900_write_bits@PLT
	mov	edi, r12d
	call	LSB@PLT
	mov	esi, DWORD PTR CFR_LOW0[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	stv0900_write_bits@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L38:
	mov	edx, 104
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L34:
	mov	rdi, rbp
	mov	edx, 68
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR CFRUP1[rip]
	mov	rdi, rbp
	mov	edx, 15
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR CFRUP0[rip]
	mov	rdi, rbp
	mov	edx, 255
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR CFRLOW1[rip]
	mov	rdi, rbp
	mov	edx, 240
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR CFRLOW0[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR RTCS2[rip]
	mov	edx, 104
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L17:
	mov	rax, QWORD PTR 8[rbp]
	mov	esi, DWORD PTR CARFREQ[rip]
	cmp	DWORD PTR [rax+rbx*4], 9999999
	jg	.L23
	mov	edx, 239
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
.L21:
	mov	rax, QWORD PTR 16[rbp]
	mov	eax, DWORD PTR [rax+rbx*4]
	cmp	eax, 128
	je	.L24
.L37:
	cmp	eax, 129
	je	.L25
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L25:
	.cfi_restore_state
	mov	esi, DWORD PTR DMDISTATE[rip]
	mov	edx, 31
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	edx, 21
	jmp	.L30
	.p2align 4,,10
	.p2align 3
.L35:
	mov	esi, DWORD PTR EQUALCFG[rip]
	mov	edx, 65
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR FFECFG[rip]
	mov	edx, 65
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rax, QWORD PTR [rax+rbx*8]
	cmp	rax, QWORD PTR STV0900_SEARCH_DVBS1[rip]
	je	.L15
	cmp	rax, QWORD PTR STV0900_SEARCH_DSS[rip]
	je	.L15
	cmp	rax, QWORD PTR STV0900_AUTO_SEARCH[rip]
	jne	.L14
.L15:
	mov	esi, DWORD PTR VITSCALE[rip]
	mov	rdi, rbp
	mov	edx, 130
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR VAVSRVIT[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L33:
	mov	esi, DWORD PTR CARHDR[rip]
	mov	edx, 85
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L23:
	mov	edx, 237
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L18:
	cmp	edx, 9999999
	jle	.L41
	mov	edx, 75
.L29:
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	esi, DWORD PTR CARHDR[rip]
	mov	edx, 32
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L32:
	mov	esi, DWORD PTR CORRELEXP[rip]
	mov	edx, 170
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L40:
	lea	eax, 80[rdx]
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L41:
	mov	edx, 76
	jmp	.L29
	.p2align 4,,10
	.p2align 3
.L36:
	mov	edx, 57
	mov	rdi, rbp
	call	stv0900_write_reg@PLT
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L39:
	movsx	rcx, DWORD PTR 24[rbp]
	mov	rax, rcx
	imul	rcx, rcx, 274877907
	sar	eax, 31
	sar	rcx, 38
	sub	ecx, eax
	mov	eax, 65536000
	cdq
	idiv	ecx
	mov	r12d, eax
	jmp	.L10
	.cfi_endproc
.LFE0:
	.size	stv0900_start_search, .-stv0900_start_search
	.comm	VITSCALE,4,4
	.comm	VAVSRVIT,4,4
	.comm	TMGTHRISE,4,4
	.comm	TMGTHFALL,4,4
	.comm	STV0900_SEARCH_DVBS1,8,8
	.comm	STV0900_SEARCH_DSS,8,8
	.comm	STV0900_AUTO_SEARCH,8,8
	.comm	SFRSTEP,4,4
	.comm	SCAN_ENABLE,4,4
	.comm	S1S2_SEQUENTIAL,4,4
	.comm	RTCS2,4,4
	.comm	RTC,4,4
	.comm	FFECFG,4,4
	.comm	EQUALCFG,4,4
	.comm	DMDISTATE,4,4
	.comm	DEMOD_MODE,4,4
	.comm	CORRELEXP,4,4
	.comm	CFR_UP1,4,4
	.comm	CFR_UP0,4,4
	.comm	CFR_LOW1,4,4
	.comm	CFR_LOW0,4,4
	.comm	CFR_AUTOSCAN,4,4
	.comm	CFRUP1,4,4
	.comm	CFRUP0,4,4
	.comm	CFRLOW1,4,4
	.comm	CFRLOW0,4,4
	.comm	CFRINIT1,4,4
	.comm	CFRINIT0,4,4
	.comm	CARHDR,4,4
	.comm	CARFREQ,4,4
	.comm	CARCFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_stv0900_core.c_stv0900_start_search.c"
	.text
	.global	__aeabi_idiv
	.align	2
	.global	stv0900_start_search
	.syntax unified
	.arm
	.fpu softvfp
	.type	stv0900_start_search, %function
stv0900_start_search:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r0
	ldr	r3, .L37
	mov	r5, r1
	mov	r2, #31
	ldr	r1, [r3]
	bl	stv0900_write_bits
	ldr	r3, [r4]
	cmp	r3, #16
	beq	.L32
.L2:
	cmp	r3, #31
	ble	.L33
.L3:
	cmp	r3, #32
	ldr	r3, [r4, #4]
	bgt	.L4
	ldr	r1, [r3]
	ldr	r2, .L37+4
	ldr	r3, .L37+8
	cmp	r1, r2
	ldr	r1, [r3]
	bgt	.L5
	mov	r2, #68
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+12
	mov	r2, #15
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+16
	mov	r2, #255
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+20
	mov	r2, #240
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+24
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+28
	mov	r2, #104
	mov	r0, r4
	ldr	r1, [r3]
	bl	stv0900_write_reg
	b	.L6
.L4:
	ldr	r2, .L37+4
	ldr	r1, [r3, r5, lsl #2]
	ldr	r3, .L37+28
	cmp	r1, r2
	movle	r2, #104
	movgt	r2, #68
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+8
	mov	r2, #70
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4, #8]
	ldr	r3, [r3, r5, lsl #2]
	cmp	r3, #128
	beq	.L34
	ldr	r3, [r4, #16]
	ldr	r0, .L37+32
	ldr	r3, [r3, r5, lsl #2]
	ldr	r1, [r4, #4]
	smull	ip, r2, r0, r3
	ldr	ip, [r1, r5, lsl #2]
	ldr	r1, .L37+4
	asr	r0, r3, #31
	cmp	ip, r1
	ldr	r3, [r4, #12]
	ldr	r1, .L37+32
	rsb	r0, r0, r2, asr #7
	smull	r2, r1, r3, r1
	addle	r0, r0, #80
	addgt	r0, r0, #600
	asr	r3, r3, #31
	lsl	r0, r0, #16
	rsb	r1, r3, r1, asr #6
	bl	__aeabi_idiv
	mov	r6, r0
.L10:
	ldr	r3, .L37+36
	mov	r0, r6
	ldr	r7, [r3]
	bl	MSB
	mov	r1, r7
	mov	r2, r0
	mov	r0, r4
	bl	stv0900_write_bits
	ldr	r3, .L37+40
	mov	r0, r6
	ldr	r7, [r3]
	bl	LSB
	mov	r1, r7
	mov	r2, r0
	mov	r0, r4
	bl	stv0900_write_bits
	rsb	r6, r6, #0
	ldr	r3, .L37+44
	mov	r0, r6
	ldr	r7, [r3]
	bl	MSB
	mov	r1, r7
	mov	r2, r0
	mov	r0, r4
	bl	stv0900_write_bits
	ldr	r3, .L37+48
	mov	r0, r6
	ldr	r6, [r3]
	bl	LSB
	mov	r1, r6
	mov	r2, r0
	mov	r0, r4
	bl	stv0900_write_bits
.L6:
	ldr	r3, .L37+52
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+56
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4]
	cmp	r3, #31
	bgt	.L35
.L14:
	ldr	r3, .L37+60
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+64
	mov	r2, #224
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+68
	mov	r2, #192
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+72
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_bits
	ldr	r3, .L37+76
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_bits
	ldr	r3, .L37+80
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_bits
	ldr	r3, .L37+84
	mov	r2, #136
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4]
	cmp	r3, #31
	ble	.L17
	ldr	r2, [r4, #4]
	ldr	r0, .L37+88
	ldr	r2, [r2, r5, lsl #2]
	ldr	r1, .L37+92
	cmp	r2, r0
	ldr	r1, [r1]
	bge	.L18
	cmp	r3, #32
	moveq	r2, #57
	movne	r2, #137
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+96
	mov	r2, #64
	mov	r0, r4
	ldr	r1, [r3]
	bl	stv0900_write_reg
.L21:
	ldr	r3, [r4, #8]
	ldr	r3, [r3, r5, lsl #2]
	cmp	r3, #128
	beq	.L24
.L36:
	cmp	r3, #129
	popne	{r4, r5, r6, r7, r8, pc}
	ldr	r5, .L37+100
	mov	r2, #31
	ldr	r1, [r5]
	mov	r0, r4
	bl	stv0900_write_reg
	mov	r0, r4
	ldr	r1, [r5]
	mov	r2, #21
	pop	{r4, r5, r6, r7, r8, lr}
	b	stv0900_write_reg
.L5:
	mov	r2, #196
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+28
	mov	r2, #68
	mov	r0, r4
	ldr	r1, [r3]
	bl	stv0900_write_reg
	b	.L6
.L17:
	ldr	r3, [r4, #4]
	ldr	r2, .L37+104
	ldr	r1, [r3, r5, lsl #2]
	ldr	r3, .L37+92
	cmp	r1, r2
	movle	r2, #239
	movgt	r2, #237
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4, #8]
	ldr	r3, [r3, r5, lsl #2]
	cmp	r3, #128
	bne	.L36
.L24:
	ldr	r5, .L37+100
	mov	r2, #31
	ldr	r1, [r5]
	mov	r0, r4
	bl	stv0900_write_reg
	mov	r0, r4
	ldr	r1, [r5]
	mov	r2, #24
	pop	{r4, r5, r6, r7, r8, lr}
	b	stv0900_write_reg
.L35:
	ldr	r3, .L37+108
	mov	r2, #65
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+112
	mov	r2, #65
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4, #20]
	ldr	r2, .L37+116
	ldr	r3, [r3, r5, lsl #2]
	ldr	r2, [r2]
	cmp	r3, r2
	beq	.L15
	ldr	r2, .L37+120
	ldr	r2, [r2]
	cmp	r3, r2
	beq	.L15
	ldr	r2, .L37+124
	ldr	r2, [r2]
	cmp	r3, r2
	bne	.L14
.L15:
	ldr	r3, .L37+128
	mov	r2, #130
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, .L37+132
	mov	r2, #0
	mov	r0, r4
	ldr	r1, [r3]
	bl	stv0900_write_reg
	b	.L14
.L33:
	ldr	r3, .L37+96
	mov	r2, #85
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4]
	b	.L3
.L18:
	ldr	r3, .L37+104
	mov	r0, r4
	cmp	r2, r3
	movle	r2, #76
	movgt	r2, #75
	bl	stv0900_write_reg
	ldr	r3, .L37+96
	mov	r2, #32
	mov	r0, r4
	ldr	r1, [r3]
	bl	stv0900_write_reg
	b	.L21
.L32:
	ldr	r3, .L37+136
	mov	r2, #170
	ldr	r1, [r3]
	mov	r0, r4
	bl	stv0900_write_reg
	ldr	r3, [r4]
	b	.L2
.L34:
	ldr	r3, [r4, #12]
	ldr	r2, .L37+32
	asr	r1, r3, #31
	smull	r0, r3, r2, r3
	mov	r0, #65536000
	rsb	r1, r1, r3, asr #6
	bl	__aeabi_idiv
	mov	r6, r0
	b	.L10
.L38:
	.align	2
.L37:
	.word	DEMOD_MODE
	.word	5000000
	.word	CARCFG
	.word	CFRUP1
	.word	CFRUP0
	.word	CFRLOW1
	.word	CFRLOW0
	.word	RTCS2
	.word	274877907
	.word	CFR_UP1
	.word	CFR_UP0
	.word	CFR_LOW1
	.word	CFR_LOW0
	.word	CFRINIT1
	.word	CFRINIT0
	.word	SFRSTEP
	.word	TMGTHRISE
	.word	TMGTHFALL
	.word	SCAN_ENABLE
	.word	CFR_AUTOSCAN
	.word	S1S2_SEQUENTIAL
	.word	RTC
	.word	2000000
	.word	CARFREQ
	.word	CARHDR
	.word	DMDISTATE
	.word	9999999
	.word	EQUALCFG
	.word	FFECFG
	.word	STV0900_SEARCH_DVBS1
	.word	STV0900_SEARCH_DSS
	.word	STV0900_AUTO_SEARCH
	.word	VITSCALE
	.word	VAVSRVIT
	.word	CORRELEXP
	.size	stv0900_start_search, .-stv0900_start_search
	.comm	VITSCALE,4,4
	.comm	VAVSRVIT,4,4
	.comm	TMGTHRISE,4,4
	.comm	TMGTHFALL,4,4
	.comm	STV0900_SEARCH_DVBS1,4,4
	.comm	STV0900_SEARCH_DSS,4,4
	.comm	STV0900_AUTO_SEARCH,4,4
	.comm	SFRSTEP,4,4
	.comm	SCAN_ENABLE,4,4
	.comm	S1S2_SEQUENTIAL,4,4
	.comm	RTCS2,4,4
	.comm	RTC,4,4
	.comm	FFECFG,4,4
	.comm	EQUALCFG,4,4
	.comm	DMDISTATE,4,4
	.comm	DEMOD_MODE,4,4
	.comm	CORRELEXP,4,4
	.comm	CFR_UP1,4,4
	.comm	CFR_UP0,4,4
	.comm	CFR_LOW1,4,4
	.comm	CFR_LOW0,4,4
	.comm	CFR_AUTOSCAN,4,4
	.comm	CFRUP1,4,4
	.comm	CFRUP0,4,4
	.comm	CFRLOW1,4,4
	.comm	CFRLOW0,4,4
	.comm	CFRINIT1,4,4
	.comm	CFRINIT0,4,4
	.comm	CARHDR,4,4
	.comm	CARFREQ,4,4
	.comm	CARCFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
