	.file	"extr_intel.c_collect_cpu_info_early.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	collect_cpu_info_early, @function
collect_cpu_info_early:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xor	esi, esi
	mov	edx, 20
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rdi
	sub	rsp, 40
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	call	memset@PLT
	lea	rcx, 20[rsp]
	lea	rdx, 16[rsp]
	mov	DWORD PTR 8[rsp], 1
	lea	rsi, 12[rsp]
	lea	rdi, 8[rsp]
	mov	DWORD PTR 16[rsp], 0
	call	native_cpuid@PLT
	mov	r12d, DWORD PTR 8[rsp]
	mov	edi, r12d
	call	x86_family@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	ebp, eax
	call	x86_model@PLT
	cmp	eax, 4
	ja	.L6
	xor	r13d, r13d
	cmp	ebp, 6
	ja	.L6
.L2:
	xor	eax, eax
	call	intel_get_microcode_revision@PLT
	mov	DWORD PTR 4[rbx], r12d
	mov	DWORD PTR 8[rbx], r13d
	mov	DWORD PTR 12[rbx], eax
	mov	DWORD PTR 16[rbx], 0
	mov	DWORD PTR [rbx], 1
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L10
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	edi, DWORD PTR MSR_IA32_PLATFORM_ID[rip]
	xor	edx, edx
	xor	esi, esi
	mov	r13d, 1
	call	native_rdmsr@PLT
	jmp	.L2
.L10:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	collect_cpu_info_early, .-collect_cpu_info_early
	.comm	MSR_IA32_PLATFORM_ID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_intel.c_collect_cpu_info_early.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	collect_cpu_info_early, %function
collect_cpu_info_early:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	mov	r6, #0
	mov	r7, #1
	ldr	r3, .L9
	sub	sp, sp, #44
	mov	r1, r6
	mov	r2, #20
	ldr	r3, [r3]
	str	r3, [sp, #36]
	mov	r3,#0
	mov	r4, r0
	str	r6, [sp, #32]
	bl	memset
	add	r3, sp, #16
	add	r2, sp, #12
	add	r1, sp, #8
	add	r0, sp, #4
	str	r6, [sp, #12]
	str	r7, [sp, #4]
	bl	native_cpuid
	ldr	r6, [sp, #4]
	mov	r0, r6
	bl	x86_family
	mov	r5, r0
	ldr	r0, [sp, #4]
	bl	x86_model
	cmp	r5, #6
	cmpls	r0, #4
	movhi	r5, #1
	movls	r5, #0
	bhi	.L7
.L2:
	bl	intel_get_microcode_revision
	mov	ip, #1
	str	r0, [sp, #28]
	str	r6, [sp, #20]
	str	r5, [sp, #24]
	add	r3, sp, #20
	ldm	r3, {r0, r1, r2, r3}
	stmib	r4, {r0, r1, r2, r3}
	ldr	r3, .L9
	str	ip, [r4]
	ldr	r2, [r3]
	ldr	r3, [sp, #36]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L8
	mov	r0, #0
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L7:
	mov	r2, #0
	ldr	r3, .L9+4
	mov	r1, r2
	ldr	r0, [r3]
	mov	r5, r7
	bl	native_rdmsr
	b	.L2
.L8:
	bl	__stack_chk_fail
.L10:
	.align	2
.L9:
	.word	.LC0
	.word	MSR_IA32_PLATFORM_ID
	.size	collect_cpu_info_early, .-collect_cpu_info_early
	.comm	MSR_IA32_PLATFORM_ID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
