	.file	"extr_t1isa.c_t1_detectandinit.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	t1_detectandinit, @function
t1_detectandinit:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	eax, edx
	lea	r14d, 0[0+rdx*8]
	lea	edx, [rdx+rdx]
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	and	edx, 4
	and	r14d, 8
	and	esi, 15
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	or	r14d, edx
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	ebp, edi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	r12d, ebp
	mov	ebx, 1
	shr	r12d, 4
	movzx	r13d, r12b
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	edx, DWORD PTR HEMA_VERSION_ID[rip]
	mov	rcx, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rcx
	xor	ecx, ecx
	mov	BYTE PTR 4[rsp], 17
	sal	edx, 4
	or	r14d, edx
	mov	edx, eax
	sar	eax, 3
	sar	edx
	and	eax, 1
	and	edx, 2
	or	r14d, edx
	xor	edx, edx
	or	r14d, eax
	mov	eax, 5
	mov	WORD PTR 6[rsp], dx
	mov	edx, 15
	mov	WORD PTR 2[rsp], ax
	mov	rax, QWORD PTR hema_irq_table[rip]
	movzx	eax, BYTE PTR [rax+rsi]
	mov	esi, DWORD PTR T1_RESETBOARD[rip]
	mov	BYTE PTR 5[rsp], al
	call	t1outp@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_OUTSTAT[rip]
	call	t1inp@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	mov	esi, ebx
	mov	edx, r13d
	mov	edi, ebp
	add	ebx, 1
	call	t1outp@PLT
	cmp	ebx, 16
	jne	.L2
	mov	esi, DWORD PTR HEMA_PAL_ID[rip]
	mov	edx, r13d
	mov	edi, ebp
	mov	rbx, rsp
	lea	r13, 6[rsp]
	and	esi, 15
	call	t1outp@PLT
	mov	esi, DWORD PTR HEMA_PAL_ID[rip]
	movzx	edx, r14b
	mov	edi, ebp
	sar	esi, 4
	call	t1outp@PLT
	xor	edx, edx
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L20:
	movzx	edx, BYTE PTR 1[rbx]
.L4:
	xor	esi, esi
	mov	edi, ebp
	add	rbx, 1
	call	t1outp@PLT
	cmp	r13, rbx
	jne	.L20
	mov	esi, r12d
	xor	edx, edx
	mov	edi, ebp
	and	esi, 3
	call	t1outp@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR T1_RESETLINK[rip]
	xor	edx, edx
	mov	edi, ebp
	add	esi, DWORD PTR T1_FASTLINK[rip]
	call	t1outp@PLT
	xor	edx, edx
	mov	esi, DWORD PTR T1_RESETLINK[rip]
	mov	edi, ebp
	add	esi, DWORD PTR T1_SLOWLINK[rip]
	call	t1outp@PLT
	mov	edi, 10
	call	mdelay@PLT
	mov	esi, DWORD PTR T1_RESETLINK[rip]
	mov	edx, 1
	mov	edi, ebp
	add	esi, DWORD PTR T1_FASTLINK[rip]
	call	t1outp@PLT
	mov	edx, 1
	mov	esi, DWORD PTR T1_RESETLINK[rip]
	mov	edi, ebp
	add	esi, DWORD PTR T1_SLOWLINK[rip]
	call	t1outp@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR T1_RESETLINK[rip]
	xor	edx, edx
	mov	edi, ebp
	add	esi, DWORD PTR T1_FASTLINK[rip]
	call	t1outp@PLT
	xor	edx, edx
	mov	esi, DWORD PTR T1_RESETLINK[rip]
	mov	edi, ebp
	add	esi, DWORD PTR T1_SLOWLINK[rip]
	call	t1outp@PLT
	mov	edi, 10
	call	mdelay@PLT
	xor	edx, edx
	mov	esi, DWORD PTR T1_ANALYSE[rip]
	mov	edi, ebp
	add	esi, DWORD PTR T1_FASTLINK[rip]
	call	t1outp@PLT
	mov	edi, 5
	call	mdelay@PLT
	mov	esi, DWORD PTR T1_ANALYSE[rip]
	xor	edx, edx
	mov	edi, ebp
	add	esi, DWORD PTR T1_SLOWLINK[rip]
	call	t1outp@PLT
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_OUTSTAT[rip]
	call	t1inp@PLT
	mov	r8d, eax
	mov	eax, 1
	cmp	r8d, 1
	je	.L21
.L1:
	mov	rcx, QWORD PTR 8[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L22
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L21:
	.cfi_restore_state
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_INSTAT[rip]
	call	t1inp@PLT
	mov	r8d, eax
	mov	eax, 2
	test	r8d, r8d
	jne	.L1
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_IRQENABLE[rip]
	call	t1inp@PLT
	mov	r8d, eax
	mov	eax, 3
	test	r8d, r8d
	jne	.L1
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_FIFOSTAT[rip]
	call	t1inp@PLT
	and	eax, 240
	mov	edx, eax
	mov	eax, 4
	cmp	edx, 112
	jne	.L1
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_IRQMASTER[rip]
	call	t1inp@PLT
	mov	r8d, eax
	mov	eax, 5
	and	r8d, 14
	jne	.L1
	mov	esi, DWORD PTR T1_FASTLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_IDENT[rip]
	call	t1inp@PLT
	and	eax, 125
	mov	edx, eax
	mov	eax, 6
	cmp	edx, 1
	jne	.L1
	mov	esi, DWORD PTR T1_SLOWLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_OUTSTAT[rip]
	call	t1inp@PLT
	mov	r8d, eax
	mov	eax, 7
	cmp	r8d, 1
	jne	.L1
	mov	esi, DWORD PTR T1_SLOWLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_IRQMASTER[rip]
	call	t1inp@PLT
	mov	r8d, eax
	mov	eax, 8
	and	r8d, 14
	jne	.L1
	mov	esi, DWORD PTR T1_SLOWLINK[rip]
	mov	edi, ebp
	add	rsi, QWORD PTR T1_IDENT[rip]
	call	t1inp@PLT
	mov	edx, 9
	and	eax, 125
	cmovne	eax, edx
	jmp	.L1
.L22:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	t1_detectandinit, .-t1_detectandinit
	.comm	hema_irq_table,8,8
	.comm	T1_SLOWLINK,4,4
	.comm	T1_RESETLINK,4,4
	.comm	T1_RESETBOARD,4,4
	.comm	T1_OUTSTAT,8,8
	.comm	T1_IRQMASTER,8,8
	.comm	T1_IRQENABLE,8,8
	.comm	T1_INSTAT,8,8
	.comm	T1_IDENT,8,8
	.comm	T1_FIFOSTAT,8,8
	.comm	T1_FASTLINK,4,4
	.comm	T1_ANALYSE,4,4
	.comm	HEMA_VERSION_ID,4,4
	.comm	HEMA_PAL_ID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_t1isa.c_t1_detectandinit.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	t1_detectandinit, %function
t1_detectandinit:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	ip, #0
	mov	lr, #17
	mov	r4, #5
	mov	r5, r0
	ldr	r3, .L23
	lsl	r7, r2, #1
	ldr	r8, [r3]
	lsl	r3, r2, #3
	and	r3, r3, #8
	and	r7, r7, #4
	orr	r7, r3, r7
	ldr	r6, .L23+4
	asr	r3, r2, #1
	orr	r7, r7, r8, lsl #4
	and	r3, r3, #2
	ldr	r6, [r6]
	orr	r7, r7, r3
	lsl	r2, r2, #28
	ldr	r3, .L23+8
	and	r1, r1, #15
	orr	r7, r7, r2, lsr #31
	ldr	r2, .L23+12
	sub	sp, sp, #16
	ldrb	r6, [r6, r1]	@ zero_extendqisi2
	ldr	r2, [r2]
	str	r2, [sp, #12]
	mov	r2,#0
	ldr	r1, [r3]
	mov	r2, #15
	ldr	r8, .L23+16
	ldr	r9, .L23+20
	strb	lr, [sp, #8]
	strh	ip, [sp, #10]	@ movhi
	strb	r6, [sp, #9]
	strh	r4, [sp, #6]	@ movhi
	bl	t1outp
	mov	r0, #100
	bl	mdelay
	ldr	r1, [r8]
	ldr	r3, [r9]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	mov	r4, #1
	lsr	r10, r5, #4
	and	r7, r7, #255
	and	r6, r10, #255
.L2:
	mov	r1, r4
	mov	r2, r6
	mov	r0, r5
	add	r4, r4, #1
	bl	t1outp
	cmp	r4, #16
	bne	.L2
	ldr	r4, .L23+24
	mov	r2, r6
	ldr	r1, [r4]
	mov	r0, r5
	and	r1, r1, #15
	bl	t1outp
	ldr	r1, [r4]
	mov	r2, r7
	mov	r0, r5
	asr	r1, r1, #4
	bl	t1outp
	add	r4, sp, #6
	mov	r2, #0
	add	r6, sp, #11
	b	.L4
.L20:
	ldrb	r2, [r4], #1	@ zero_extendqisi2
.L4:
	mov	r1, #0
	mov	r0, r5
	bl	t1outp
	cmp	r4, r6
	bne	.L20
	ldr	r4, .L23+28
	mov	r2, #0
	and	r1, r10, #3
	mov	r0, r5
	bl	t1outp
	mov	r0, #100
	bl	mdelay
	ldr	r3, [r4]
	ldr	r1, [r8]
	ldr	r6, .L23+32
	add	r1, r1, r3
	mov	r2, #0
	mov	r0, r5
	bl	t1outp
	ldr	r3, [r4]
	ldr	r1, [r6]
	mov	r2, #0
	add	r1, r1, r3
	mov	r0, r5
	bl	t1outp
	mov	r0, #10
	bl	mdelay
	ldr	r3, [r4]
	ldr	r1, [r8]
	mov	r2, #1
	add	r1, r1, r3
	mov	r0, r5
	bl	t1outp
	ldr	r3, [r4]
	ldr	r1, [r6]
	mov	r2, #1
	add	r1, r1, r3
	mov	r0, r5
	bl	t1outp
	mov	r0, #100
	bl	mdelay
	ldr	r3, [r4]
	ldr	r1, [r8]
	mov	r2, #0
	add	r1, r1, r3
	mov	r0, r5
	bl	t1outp
	ldr	r3, [r4]
	ldr	r1, [r6]
	mov	r2, #0
	add	r1, r1, r3
	ldr	r4, .L23+36
	mov	r0, r5
	bl	t1outp
	mov	r0, #10
	bl	mdelay
	ldr	r3, [r4]
	ldr	r1, [r8]
	mov	r2, #0
	add	r1, r1, r3
	mov	r0, r5
	bl	t1outp
	mov	r0, #5
	bl	mdelay
	ldr	r3, [r4]
	ldr	r1, [r6]
	mov	r2, #0
	add	r1, r1, r3
	mov	r0, r5
	bl	t1outp
	ldr	r1, [r8]
	ldr	r3, [r9]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	cmp	r0, #1
	movne	r0, #1
	beq	.L21
.L1:
	ldr	r3, .L23+12
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L22
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L21:
	ldr	r3, .L23+40
	ldr	r1, [r8]
	ldr	r3, [r3]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	cmp	r0, #0
	movne	r0, #2
	bne	.L1
	ldr	r3, .L23+44
	ldr	r1, [r8]
	ldr	r3, [r3]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	cmp	r0, #0
	movne	r0, #3
	bne	.L1
	ldr	r3, .L23+48
	ldr	r1, [r8]
	ldr	r3, [r3]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	and	r3, r0, #240
	cmp	r3, #112
	movne	r0, #4
	bne	.L1
	ldr	r4, .L23+52
	ldr	r1, [r8]
	ldr	r3, [r4]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	tst	r0, #14
	movne	r0, #5
	bne	.L1
	ldr	r7, .L23+56
	ldr	r1, [r8]
	ldr	r3, [r7]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	and	r3, r0, #125
	cmp	r3, #1
	movne	r0, #6
	bne	.L1
	ldr	r3, [r9]
	ldr	r1, [r6]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	cmp	r0, #1
	movne	r0, #7
	bne	.L1
	ldr	r3, [r4]
	ldr	r1, [r6]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	tst	r0, #14
	movne	r0, #8
	bne	.L1
	ldr	r1, [r6]
	ldr	r3, [r7]
	mov	r0, r5
	add	r1, r1, r3
	bl	t1inp
	ands	r0, r0, #125
	movne	r0, #9
	b	.L1
.L22:
	bl	__stack_chk_fail
.L24:
	.align	2
.L23:
	.word	HEMA_VERSION_ID
	.word	hema_irq_table
	.word	T1_RESETBOARD
	.word	.LC0
	.word	T1_FASTLINK
	.word	T1_OUTSTAT
	.word	HEMA_PAL_ID
	.word	T1_RESETLINK
	.word	T1_SLOWLINK
	.word	T1_ANALYSE
	.word	T1_INSTAT
	.word	T1_IRQENABLE
	.word	T1_FIFOSTAT
	.word	T1_IRQMASTER
	.word	T1_IDENT
	.size	t1_detectandinit, .-t1_detectandinit
	.comm	hema_irq_table,4,4
	.comm	T1_SLOWLINK,4,4
	.comm	T1_RESETLINK,4,4
	.comm	T1_RESETBOARD,4,4
	.comm	T1_OUTSTAT,4,4
	.comm	T1_IRQMASTER,4,4
	.comm	T1_IRQENABLE,4,4
	.comm	T1_INSTAT,4,4
	.comm	T1_IDENT,4,4
	.comm	T1_FIFOSTAT,4,4
	.comm	T1_FASTLINK,4,4
	.comm	T1_ANALYSE,4,4
	.comm	HEMA_VERSION_ID,4,4
	.comm	HEMA_PAL_ID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
