	.file	"extr_if_bge.c_bge_reset.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"NVRAM lock timedout!\n"
.LC1:
	.string	"Disabling fastboot\n"
.LC2:
	.string	"reset timed out\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC3:
	.string	"firmware handshake timed out, found 0x%08x\n"
	.text
	.p2align 4
	.type	bge_reset, @function
bge_reset:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	ebx, DWORD PTR BGE_MACMODE_HALF_DUPLEX[rip]
	mov	r12d, DWORD PTR 48[rdi]
	mov	eax, DWORD PTR [rdi]
	or	ebx, DWORD PTR BGE_MACMODE_PORTMODE[rip]
	test	DWORD PTR BGE_MFW_ON_APE[rip], eax
	je	.L2
	mov	eax, DWORD PTR BGE_MACMODE_APE_RX_EN[rip]
	or	eax, DWORD PTR BGE_MACMODE_APE_TX_EN[rip]
	or	ebx, eax
.L2:
	mov	esi, DWORD PTR BGE_MAC_MODE[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	rdi, rbp
	mov	DWORD PTR 4[rsp], eax
	call	BGE_IS_575X_PLUS@PLT
	test	rax, rax
	jne	.L3
	mov	rcx, QWORD PTR bge_writereg_ind@GOTPCREL[rip]
	mov	rax, QWORD PTR 8[rbp]
	mov	QWORD PTR 8[rsp], rcx
.L4:
	cmp	QWORD PTR BGE_ASICREV_BCM5700[rip], rax
	je	.L7
	cmp	QWORD PTR BGE_ASICREV_BCM5701[rip], rax
	jne	.L94
.L7:
	mov	esi, DWORD PTR BGE_APE_LOCK_GRC[rip]
	mov	rdi, rbp
	call	bge_ape_lock@PLT
	mov	esi, DWORD PTR BGE_PCI_CACHESZ[rip]
	mov	edx, 4
	mov	edi, r12d
	call	pci_read_config@PLT
	mov	esi, DWORD PTR BGE_PCI_CMD[rip]
	mov	edx, 4
	mov	edi, r12d
	mov	r14d, eax
	call	pci_read_config@PLT
	mov	esi, DWORD PTR BGE_PCI_MISC_CTL[rip]
	mov	ecx, 4
	mov	edi, r12d
	mov	edx, DWORD PTR BGE_PCIMISCCTL_INDIRECT_ACCESS[rip]
	or	edx, DWORD PTR BGE_PCIMISCCTL_MASK_PCI_INTR[rip]
	mov	r13d, eax
	or	edx, DWORD PTR BGE_HIF_SWAP_OPTIONS[rip]
	or	edx, DWORD PTR BGE_PCIMISCCTL_PCISTATE_RW[rip]
	call	pci_write_config@PLT
	mov	rax, QWORD PTR BGE_ASICREV_BCM5752[rip]
	cmp	QWORD PTR 8[rbp], rax
	jne	.L11
	cmp	QWORD PTR bootverbose[rip], 0
	jne	.L95
.L13:
	mov	esi, DWORD PTR BGE_FASTBOOT_PC[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	CSR_WRITE_4@PLT
.L15:
	mov	edx, DWORD PTR BGE_SRAM_FW_MB_MAGIC[rip]
	mov	esi, DWORD PTR BGE_SRAM_FW_MB[rip]
	mov	rdi, rbp
	call	bge_writemem_ind@PLT
	mov	r8d, DWORD PTR BGE_MISCCFG_RESET_CORE_CLOCKS[rip]
	mov	eax, DWORD PTR 16[rbp]
	or	r8d, DWORD PTR BGE_32BITTIME_66MHZ[rip]
	mov	r15d, r8d
	test	DWORD PTR BGE_FLAG_PCIE[rip], eax
	je	.L16
	mov	rcx, QWORD PTR BGE_ASICREV_BCM5785[rip]
	cmp	QWORD PTR 8[rbp], rcx
	je	.L18
	test	DWORD PTR BGE_FLAG_5717_PLUS[rip], eax
	je	.L96
.L18:
	mov	rax, QWORD PTR BGE_CHIPID_BCM5750_A0[rip]
	cmp	QWORD PTR 24[rbp], rax
	jne	.L97
.L16:
	mov	rax, QWORD PTR BGE_ASICREV_BCM5906[rip]
	cmp	QWORD PTR 8[rbp], rax
	je	.L98
.L20:
	mov	rdi, rbp
	call	BGE_IS_5705_PLUS@PLT
	test	rax, rax
	je	.L21
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_CPMU_PRESENT[rip], eax
	je	.L99
.L21:
	mov	rax, QWORD PTR 8[rsp]
	mov	esi, DWORD PTR BGE_MISC_CFG[rip]
	mov	edx, r15d
	mov	rdi, rbp
	call	rax
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_PCIE[rip], eax
	je	.L22
	mov	edi, 100000
	call	DELAY@PLT
.L23:
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_PCIE[rip], eax
	je	.L24
	mov	rax, QWORD PTR BGE_CHIPID_BCM5750_A0[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L100
.L25:
	mov	esi, DWORD PTR PCIER_DEVICE_CTL[rip]
	mov	edx, 2
	add	esi, DWORD PTR 32[rbp]
	mov	edi, r12d
	call	pci_read_config@PLT
	mov	edx, DWORD PTR PCIEM_CTL_RELAXED_ORD_ENABLE[rip]
	mov	ecx, 2
	mov	edi, r12d
	or	edx, DWORD PTR PCIEM_CTL_NOSNOOP_ENABLE[rip]
	mov	esi, DWORD PTR PCIER_DEVICE_CTL[rip]
	not	edx
	add	esi, DWORD PTR 32[rbp]
	and	edx, eax
	call	pci_write_config@PLT
	mov	esi, DWORD PTR 44[rbp]
	mov	edi, r12d
	call	pci_set_max_read_req@PLT
	mov	edx, DWORD PTR PCIEM_STA_CORRECTABLE_ERROR[rip]
	mov	ecx, 2
	mov	edi, r12d
	mov	esi, DWORD PTR PCIER_DEVICE_STA[rip]
	or	edx, DWORD PTR PCIEM_STA_NON_FATAL_ERROR[rip]
	add	esi, DWORD PTR 32[rbp]
	or	edx, DWORD PTR PCIEM_STA_FATAL_ERROR[rip]
	or	edx, DWORD PTR PCIEM_STA_UNSUPPORTED_REQ[rip]
	call	pci_write_config@PLT
.L24:
	mov	esi, DWORD PTR BGE_PCI_MISC_CTL[rip]
	mov	edx, DWORD PTR BGE_PCIMISCCTL_INDIRECT_ACCESS[rip]
	mov	ecx, 4
	mov	edi, r12d
	or	edx, DWORD PTR BGE_PCIMISCCTL_MASK_PCI_INTR[rip]
	or	edx, DWORD PTR BGE_HIF_SWAP_OPTIONS[rip]
	or	edx, DWORD PTR BGE_PCIMISCCTL_PCISTATE_RW[rip]
	call	pci_write_config@PLT
	mov	edx, DWORD PTR BGE_PCISTATE_ROM_ENABLE[rip]
	mov	rax, QWORD PTR BGE_CHIPID_BCM5704_A0[rip]
	or	edx, DWORD PTR BGE_PCISTATE_ROM_RETRY_ENABLE[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L101
.L26:
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR BGE_MFW_ON_APE[rip], eax
	je	.L27
	mov	eax, DWORD PTR BGE_PCISTATE_ALLOW_APE_CTLSPC_WR[rip]
	or	eax, DWORD PTR BGE_PCISTATE_ALLOW_APE_SHMEM_WR[rip]
	or	eax, DWORD PTR BGE_PCISTATE_ALLOW_APE_PSPACE_WR[rip]
	or	edx, eax
.L27:
	mov	esi, DWORD PTR BGE_PCI_PCISTATE[rip]
	mov	ecx, 4
	mov	edi, r12d
	call	pci_write_config@PLT
	mov	ecx, 4
	mov	edx, r14d
	mov	edi, r12d
	mov	esi, DWORD PTR BGE_PCI_CACHESZ[rip]
	call	pci_write_config@PLT
	mov	ecx, 4
	mov	edx, r13d
	mov	edi, r12d
	mov	esi, DWORD PTR BGE_PCI_CMD[rip]
	call	pci_write_config@PLT
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_PCIX[rip], eax
	jne	.L102
.L28:
	mov	rdi, rbp
	call	BGE_IS_5714_FAMILY@PLT
	test	rax, rax
	je	.L31
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_MSI[rip], eax
	jne	.L103
.L32:
	mov	esi, DWORD PTR BGE_MARB_MODE[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	esi, DWORD PTR BGE_MARB_MODE[rip]
	or	eax, DWORD PTR BGE_MARBMODE_ENABLE[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	CSR_WRITE_4@PLT
.L33:
	mov	rdi, rbp
	call	bge_dma_swap_options@PLT
	mov	esi, DWORD PTR BGE_MODE_CTL[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	CSR_WRITE_4@PLT
	mov	esi, DWORD PTR BGE_MAC_MODE[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	r13d, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR BGE_MAC_MODE[rip]
	mov	rdi, rbp
	xor	r13d, eax
	and	ebx, r13d
	xor	ebx, eax
	mov	edx, ebx
	mov	r13d, ebx
	call	CSR_WRITE_4@PLT
	mov	edi, 40
	call	DELAY@PLT
	mov	esi, DWORD PTR BGE_APE_LOCK_GRC[rip]
	mov	rdi, rbp
	call	bge_ape_unlock@PLT
	mov	rax, QWORD PTR BGE_ASICREV_BCM5906[rip]
	cmp	QWORD PTR 8[rbp], rax
	je	.L34
	mov	eax, DWORD PTR BGE_TIMEOUT[rip]
	xor	ebx, ebx
	test	eax, eax
	jg	.L35
	jmp	.L36
	.p2align 4,,10
	.p2align 3
.L104:
	add	ebx, 1
	cmp	DWORD PTR BGE_TIMEOUT[rip], ebx
	jle	.L36
.L35:
	mov	edi, 10
	call	DELAY@PLT
	mov	esi, DWORD PTR BGE_SRAM_FW_MB[rip]
	mov	rdi, rbp
	call	bge_readmem_ind@PLT
	mov	r13d, eax
	mov	eax, DWORD PTR BGE_SRAM_FW_MB_MAGIC[rip]
	not	eax
	cmp	eax, r13d
	jne	.L104
.L36:
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_EADDR[rip], eax
	jne	.L105
.L43:
	mov	rax, QWORD PTR BGE_CHIPID_BCM57765_A0[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L106
.L41:
	mov	eax, DWORD PTR 16[rbp]
	mov	rcx, QWORD PTR BGE_ASICREV_BCM5704[rip]
	cmp	QWORD PTR 8[rbp], rcx
	je	.L107
.L45:
	test	DWORD PTR BGE_FLAG_PCIE[rip], eax
	jne	.L46
.L91:
	mov	rax, QWORD PTR 8[rbp]
.L47:
	xor	r12d, r12d
	cmp	QWORD PTR BGE_ASICREV_BCM5720[rip], rax
	je	.L108
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L22:
	.cfi_restore_state
	mov	edi, 1000
	call	DELAY@PLT
	jmp	.L23
	.p2align 4,,10
	.p2align 3
.L105:
	cmp	DWORD PTR BGE_TIMEOUT[rip], ebx
	jne	.L43
	mov	edx, r13d
	lea	rsi, .LC3[rip]
	mov	edi, r12d
	xor	eax, eax
	call	device_printf@PLT
	jmp	.L43
	.p2align 4,,10
	.p2align 3
.L94:
	mov	edx, DWORD PTR BGE_NVRAMSWARB_SET1[rip]
	mov	esi, DWORD PTR BGE_NVRAM_SWARB[rip]
	mov	rdi, rbp
	mov	r13d, 8000
	call	CSR_WRITE_4@PLT
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L110:
	mov	edi, 20
	call	DELAY@PLT
	sub	r13d, 1
	je	.L109
.L9:
	mov	esi, DWORD PTR BGE_NVRAM_SWARB[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	test	DWORD PTR BGE_NVRAMSWARB_GNT1[rip], eax
	je	.L110
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L99:
	or	r15d, DWORD PTR BGE_MISCCFG_GPHY_PD_OVERRIDE[rip]
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L97:
	mov	esi, DWORD PTR BGE_MISC_CFG[rip]
	mov	edx, 536870912
	mov	rdi, rbp
	or	r15d, 536870912
	call	CSR_WRITE_4@PLT
	mov	rax, QWORD PTR BGE_ASICREV_BCM5906[rip]
	cmp	QWORD PTR 8[rbp], rax
	jne	.L20
.L98:
	mov	esi, DWORD PTR BGE_VCPU_STATUS[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	esi, DWORD PTR BGE_VCPU_STATUS[rip]
	or	eax, DWORD PTR BGE_VCPU_STATUS_DRV_RESET[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	CSR_WRITE_4@PLT
	mov	esi, DWORD PTR BGE_VCPU_EXT_CTRL[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	edx, DWORD PTR BGE_VCPU_EXT_CTRL_HALT_CPU[rip]
	mov	esi, DWORD PTR BGE_VCPU_EXT_CTRL[rip]
	mov	rdi, rbp
	not	edx
	and	edx, eax
	call	CSR_WRITE_4@PLT
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L103:
	mov	edi, r12d
	mov	esi, DWORD PTR PCIR_MSI_CTRL[rip]
	mov	edx, 2
	add	esi, DWORD PTR 40[rbp]
	call	pci_read_config@PLT
	or	eax, DWORD PTR PCIM_MSICTRL_MSI_ENABLE[rip]
	mov	ecx, 2
	mov	edi, r12d
	mov	edx, eax
	mov	esi, DWORD PTR PCIR_MSI_CTRL[rip]
	add	esi, DWORD PTR 40[rbp]
	call	pci_write_config@PLT
	mov	esi, DWORD PTR BGE_MSI_MODE[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	esi, DWORD PTR BGE_MSI_MODE[rip]
	or	eax, DWORD PTR BGE_MSIMODE_ENABLE[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	CSR_WRITE_4@PLT
	jmp	.L32
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rdi, rbp
	call	BGE_IS_5755_PLUS@PLT
	test	rax, rax
	je	.L15
	cmp	QWORD PTR bootverbose[rip], 0
	je	.L13
.L95:
	lea	rsi, .LC1[rip]
	mov	edi, r12d
	xor	eax, eax
	call	device_printf@PLT
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L34:
	mov	eax, DWORD PTR BGE_TIMEOUT[rip]
	xor	ebx, ebx
	test	eax, eax
	jg	.L39
	jmp	.L37
	.p2align 4,,10
	.p2align 3
.L38:
	mov	edi, 100
	add	ebx, 1
	call	DELAY@PLT
	mov	eax, DWORD PTR BGE_TIMEOUT[rip]
	cmp	eax, ebx
	jle	.L37
.L39:
	mov	esi, DWORD PTR BGE_VCPU_STATUS[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	test	DWORD PTR BGE_VCPU_STATUS_INIT_DONE[rip], eax
	je	.L38
	mov	eax, DWORD PTR BGE_TIMEOUT[rip]
.L37:
	cmp	ebx, eax
	jne	.L41
	mov	edi, r12d
	lea	rsi, .LC2[rip]
	xor	eax, eax
	mov	r12d, 1
	call	device_printf@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L101:
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_PCIX[rip], eax
	je	.L26
	or	edx, DWORD PTR BGE_PCISTATE_RETRY_SAME_DMA[rip]
	jmp	.L26
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rdi, rbp
	call	BGE_IS_5714_FAMILY@PLT
	test	rax, rax
	mov	rax, QWORD PTR 8[rbp]
	jne	.L50
	cmp	rax, QWORD PTR BGE_ASICREV_BCM5906[rip]
	je	.L50
	mov	edx, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_PCIE[rip], edx
	jne	.L51
	mov	rcx, QWORD PTR bge_writemem_ind@GOTPCREL[rip]
	mov	QWORD PTR 8[rsp], rcx
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L50:
	mov	rcx, QWORD PTR bge_writereg_ind@GOTPCREL[rip]
	mov	QWORD PTR 8[rsp], rcx
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L31:
	mov	edx, DWORD PTR BGE_MARBMODE_ENABLE[rip]
	mov	esi, DWORD PTR BGE_MARB_MODE[rip]
	mov	rdi, rbp
	call	CSR_WRITE_4@PLT
	jmp	.L33
	.p2align 4,,10
	.p2align 3
.L102:
	mov	esi, DWORD PTR PCIXR_COMMAND[rip]
	mov	edx, 2
	add	esi, DWORD PTR 36[rbp]
	mov	edi, r12d
	call	pci_read_config@PLT
	mov	edx, DWORD PTR PCIXM_COMMAND_ERO[rip]
	not	edx
	and	edx, eax
	mov	rax, QWORD PTR 8[rbp]
	cmp	rax, QWORD PTR BGE_ASICREV_BCM5703[rip]
	je	.L111
	cmp	rax, QWORD PTR BGE_ASICREV_BCM5704[rip]
	je	.L112
.L30:
	mov	esi, DWORD PTR PCIXR_COMMAND[rip]
	mov	ecx, 2
	add	esi, DWORD PTR 36[rbp]
	mov	edi, r12d
	call	pci_write_config@PLT
	jmp	.L28
	.p2align 4,,10
	.p2align 3
.L107:
	test	DWORD PTR BGE_FLAG_TBI[rip], eax
	je	.L45
	mov	esi, DWORD PTR BGE_SERDES_CFG[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	esi, DWORD PTR BGE_SERDES_CFG[rip]
	mov	rdi, rbp
	and	eax, -4096
	mov	edx, eax
	or	edx, 2176
	call	CSR_WRITE_4@PLT
	mov	eax, DWORD PTR 16[rbp]
	test	DWORD PTR BGE_FLAG_PCIE[rip], eax
	je	.L91
	.p2align 4,,10
	.p2align 3
.L46:
	mov	rdi, rbp
	call	BGE_IS_5717_PLUS@PLT
	test	eax, eax
	mov	rax, QWORD PTR 8[rbp]
	jne	.L47
	mov	rcx, QWORD PTR BGE_CHIPID_BCM5750_A0[rip]
	cmp	QWORD PTR 24[rbp], rcx
	je	.L47
	cmp	QWORD PTR BGE_ASICREV_BCM5785[rip], rax
	je	.L47
	mov	rdi, rbp
	mov	esi, 31744
	call	CSR_READ_4@PLT
	mov	esi, 31744
	mov	rdi, rbp
	or	eax, 33554432
	mov	edx, eax
	call	CSR_WRITE_4@PLT
	jmp	.L91
	.p2align 4,,10
	.p2align 3
.L96:
	mov	esi, 32300
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	cmp	eax, 96
	jne	.L18
	mov	edx, 32
	mov	esi, 32300
	mov	rdi, rbp
	call	CSR_WRITE_4@PLT
	jmp	.L18
	.p2align 4,,10
	.p2align 3
.L100:
	mov	edi, 500000
	call	DELAY@PLT
	mov	edi, r12d
	mov	edx, 4
	mov	esi, 196
	call	pci_read_config@PLT
	mov	ecx, 4
	mov	esi, 196
	mov	edi, r12d
	or	ah, -128
	mov	edx, eax
	call	pci_write_config@PLT
	jmp	.L25
	.p2align 4,,10
	.p2align 3
.L112:
	mov	eax, DWORD PTR PCIXM_COMMAND_MAX_SPLITS[rip]
	or	eax, DWORD PTR PCIXM_COMMAND_MAX_READ[rip]
	not	eax
	and	edx, eax
	or	edx, DWORD PTR PCIXM_COMMAND_MAX_READ_2048[rip]
	jmp	.L30
	.p2align 4,,10
	.p2align 3
.L108:
	mov	edx, DWORD PTR CPMU_CLCK_ORIDE_MAC_ORIDE_EN[rip]
	mov	esi, DWORD PTR BGE_CPMU_CLCK_ORIDE[rip]
	mov	rdi, rbp
	call	BGE_CLRBIT@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L106:
	mov	edi, 10000
	call	DELAY@PLT
	jmp	.L41
	.p2align 4,,10
	.p2align 3
.L111:
	mov	eax, DWORD PTR PCIXM_COMMAND_MAX_READ[rip]
	not	eax
	and	edx, eax
	or	edx, DWORD PTR PCIXM_COMMAND_MAX_READ_2048[rip]
	jmp	.L30
.L109:
	cmp	QWORD PTR bootverbose[rip], 0
	je	.L7
	lea	rsi, .LC0[rip]
	mov	edi, r12d
	xor	eax, eax
	call	device_printf@PLT
	jmp	.L7
.L51:
	mov	rcx, QWORD PTR bge_writemem_direct@GOTPCREL[rip]
	mov	QWORD PTR 8[rsp], rcx
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	bge_reset, .-bge_reset
	.comm	bootverbose,8,8
	.comm	PCIXR_COMMAND,4,4
	.comm	PCIXM_COMMAND_MAX_SPLITS,4,4
	.comm	PCIXM_COMMAND_MAX_READ_2048,4,4
	.comm	PCIXM_COMMAND_MAX_READ,4,4
	.comm	PCIXM_COMMAND_ERO,4,4
	.comm	PCIR_MSI_CTRL,4,4
	.comm	PCIM_MSICTRL_MSI_ENABLE,4,4
	.comm	PCIER_DEVICE_STA,4,4
	.comm	PCIER_DEVICE_CTL,4,4
	.comm	PCIEM_STA_UNSUPPORTED_REQ,4,4
	.comm	PCIEM_STA_NON_FATAL_ERROR,4,4
	.comm	PCIEM_STA_FATAL_ERROR,4,4
	.comm	PCIEM_STA_CORRECTABLE_ERROR,4,4
	.comm	PCIEM_CTL_RELAXED_ORD_ENABLE,4,4
	.comm	PCIEM_CTL_NOSNOOP_ENABLE,4,4
	.comm	CPMU_CLCK_ORIDE_MAC_ORIDE_EN,4,4
	.comm	BGE_VCPU_STATUS_INIT_DONE,4,4
	.comm	BGE_VCPU_STATUS_DRV_RESET,4,4
	.comm	BGE_VCPU_STATUS,4,4
	.comm	BGE_VCPU_EXT_CTRL_HALT_CPU,4,4
	.comm	BGE_VCPU_EXT_CTRL,4,4
	.comm	BGE_TIMEOUT,4,4
	.comm	BGE_SRAM_FW_MB_MAGIC,4,4
	.comm	BGE_SRAM_FW_MB,4,4
	.comm	BGE_SERDES_CFG,4,4
	.comm	BGE_PCI_PCISTATE,4,4
	.comm	BGE_PCI_MISC_CTL,4,4
	.comm	BGE_PCI_CMD,4,4
	.comm	BGE_PCI_CACHESZ,4,4
	.comm	BGE_PCISTATE_ROM_RETRY_ENABLE,4,4
	.comm	BGE_PCISTATE_ROM_ENABLE,4,4
	.comm	BGE_PCISTATE_RETRY_SAME_DMA,4,4
	.comm	BGE_PCISTATE_ALLOW_APE_SHMEM_WR,4,4
	.comm	BGE_PCISTATE_ALLOW_APE_PSPACE_WR,4,4
	.comm	BGE_PCISTATE_ALLOW_APE_CTLSPC_WR,4,4
	.comm	BGE_PCIMISCCTL_PCISTATE_RW,4,4
	.comm	BGE_PCIMISCCTL_MASK_PCI_INTR,4,4
	.comm	BGE_PCIMISCCTL_INDIRECT_ACCESS,4,4
	.comm	BGE_NVRAM_SWARB,4,4
	.comm	BGE_NVRAMSWARB_SET1,4,4
	.comm	BGE_NVRAMSWARB_GNT1,4,4
	.comm	BGE_MSI_MODE,4,4
	.comm	BGE_MSIMODE_ENABLE,4,4
	.comm	BGE_MODE_CTL,4,4
	.comm	BGE_MISC_CFG,4,4
	.comm	BGE_MISCCFG_RESET_CORE_CLOCKS,4,4
	.comm	BGE_MISCCFG_GPHY_PD_OVERRIDE,4,4
	.comm	BGE_MFW_ON_APE,4,4
	.comm	BGE_MARB_MODE,4,4
	.comm	BGE_MARBMODE_ENABLE,4,4
	.comm	BGE_MAC_MODE,4,4
	.comm	BGE_MACMODE_PORTMODE,4,4
	.comm	BGE_MACMODE_HALF_DUPLEX,4,4
	.comm	BGE_MACMODE_APE_TX_EN,4,4
	.comm	BGE_MACMODE_APE_RX_EN,4,4
	.comm	BGE_HIF_SWAP_OPTIONS,4,4
	.comm	BGE_FLAG_TBI,4,4
	.comm	BGE_FLAG_PCIX,4,4
	.comm	BGE_FLAG_PCIE,4,4
	.comm	BGE_FLAG_MSI,4,4
	.comm	BGE_FLAG_EADDR,4,4
	.comm	BGE_FLAG_CPMU_PRESENT,4,4
	.comm	BGE_FLAG_5717_PLUS,4,4
	.comm	BGE_FASTBOOT_PC,4,4
	.comm	BGE_CPMU_CLCK_ORIDE,4,4
	.comm	BGE_CHIPID_BCM57765_A0,8,8
	.comm	BGE_CHIPID_BCM5750_A0,8,8
	.comm	BGE_CHIPID_BCM5704_A0,8,8
	.comm	BGE_ASICREV_BCM5906,8,8
	.comm	BGE_ASICREV_BCM5785,8,8
	.comm	BGE_ASICREV_BCM5752,8,8
	.comm	BGE_ASICREV_BCM5720,8,8
	.comm	BGE_ASICREV_BCM5704,8,8
	.comm	BGE_ASICREV_BCM5703,8,8
	.comm	BGE_ASICREV_BCM5701,8,8
	.comm	BGE_ASICREV_BCM5700,8,8
	.comm	BGE_APE_LOCK_GRC,4,4
	.comm	BGE_32BITTIME_66MHZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_if_bge.c_bge_reset.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"NVRAM lock timedout!\012\000"
	.align	2
.LC1:
	.ascii	"Disabling fastboot\012\000"
	.align	2
.LC2:
	.ascii	"reset timed out\012\000"
	.align	2
.LC3:
	.ascii	"firmware handshake timed out, found 0x%08x\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bge_reset, %function
bge_reset:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	ldr	r3, .L117
	ldr	r2, .L117+4
	ldr	r1, .L117+8
	ldr	r0, [r0]
	ldr	r1, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	sub	sp, sp, #36
	tst	r0, r1
	orr	r1, r3, r2
	ldr	r5, [r4, #32]
	str	r1, [sp, #4]
	beq	.L2
	ldr	r3, .L117+12
	ldr	r2, .L117+16
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r2
	orr	r3, r1, r3
	str	r3, [sp, #4]
.L2:
	ldr	r3, .L117+20
	mov	r0, r4
	ldr	r1, [r3]
	bl	CSR_READ_4
	mov	r3, r0
	mov	r0, r4
	str	r3, [sp, #8]
	bl	BGE_IS_575X_PLUS
	cmp	r0, #0
	bne	.L3
.L96:
	ldr	r2, .L117+24
	ldr	r3, [r4, #4]
	ldr	fp, .L117+28
	ldr	r8, .L117+32
	str	r2, [sp, #28]
.L4:
	ldr	r2, .L117+36
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L7
	ldr	r2, .L117+40
	ldr	r2, [r2]
	cmp	r2, r3
	bne	.L101
.L7:
	ldr	r3, .L117+44
	mov	r0, r4
	ldr	r1, [r3]
	bl	bge_ape_lock
	ldr	r3, .L117+48
	mov	r2, #4
	ldr	r1, [r3]
	mov	r0, r5
	bl	pci_read_config
	mov	r3, r0
	ldr	r1, .L117+52
	mov	r2, #4
	ldr	r1, [r1]
	mov	r0, r5
	str	r3, [sp, #12]
	bl	pci_read_config
	mov	ip, r0
	ldr	r10, .L117+56
	ldr	r2, .L117+60
	ldr	r3, [r10]
	ldr	r2, [r2]
	ldr	r1, .L117+64
	orr	r3, r3, r2
	ldr	r2, .L117+68
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r2, r3, r2
	ldr	r3, .L117+72
	mov	r0, r5
	ldr	r1, [r3]
	mov	r3, #4
	str	ip, [sp, #16]
	bl	pci_write_config
	ldr	r3, .L117+76
	ldr	r2, [r4, #4]
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L11
	ldr	r3, .L117+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L102
.L13:
	ldr	r3, .L117+84
	mov	r2, #0
	mov	r0, r4
	ldr	r1, [r3]
	bl	CSR_WRITE_4
.L15:
	ldr	r7, .L117+88
	ldr	r6, .L117+92
	mov	r0, r4
	ldr	r2, [r7]
	ldr	r1, [r6]
	bl	bge_writemem_ind
	ldr	r1, .L117+96
	ldr	r3, .L117+100
	ldr	r2, [r4, #8]
	ldr	r0, [r8]
	ldr	r1, [r1]
	ldr	r3, [r3]
	tst	r2, r0
	orr	r3, r1, r3
	beq	.L97
	ldr	r1, .L117+104
	ldr	r0, [r4, #4]
	ldr	r1, [r1]
	cmp	r0, r1
	beq	.L18
	ldr	r1, .L117+108
	ldr	r1, [r1]
	tst	r2, r1
	beq	.L103
.L18:
	ldr	r2, .L117+112
	ldr	r1, [r4, #12]
	ldr	r2, [r2]
	cmp	r1, r2
	bne	.L91
.L97:
	ldr	r2, .L117+116
	ldr	r1, [r4, #4]
	str	r2, [sp, #24]
	ldr	r2, [fp]
	cmp	r1, r2
	beq	.L104
.L20:
	mov	r0, r4
	str	r3, [sp, #20]
	bl	BGE_IS_5705_PLUS
	cmp	r0, #0
	ldr	r3, [sp, #20]
	beq	.L21
	ldr	r2, .L117+120
	ldr	r1, [r4, #8]
	ldr	r2, [r2]
	tst	r1, r2
	ldreq	r2, .L117+124
	ldreq	r2, [r2]
	orreq	r3, r3, r2
.L21:
	mov	r2, r3
	ldr	r3, [sp, #24]
	mov	r0, r4
	ldr	r1, [r3]
	ldr	r3, [sp, #28]
	blx	r3
	ldr	r2, [r4, #8]
	ldr	r3, [r8]
	tst	r2, r3
	moveq	r0, #1000
	ldrne	r0, .L117+128
	bl	DELAY
	ldr	r2, [r4, #8]
	ldr	r3, [r8]
	tst	r2, r3
	beq	.L24
	ldr	r3, .L117+112
	ldr	r2, [r4, #12]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L105
.L25:
	ldr	r9, .L117+132
	ldr	r1, [r4, #16]
	ldr	r3, [r9]
	mov	r2, #2
	add	r1, r1, r3
	mov	r0, r5
	bl	pci_read_config
	ldr	r3, .L117+136
	ldr	r2, .L117+140
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	ip, [r4, #16]
	ldr	r1, [r9]
	orr	r2, r3, r2
	add	r1, ip, r1
	bic	r2, r0, r2
	mov	r3, #2
	mov	r0, r5
	bl	pci_write_config
	ldr	r1, [r4, #28]
	mov	r0, r5
	bl	pci_set_max_read_req
	ldr	r3, .L117+144
	ldr	r2, .L117+148
	ldr	ip, .L117+152
	ldr	r2, [r2]
	ldr	r0, .L117+156
	ldr	r3, [r3]
	ldr	r1, .L117+160
	ldr	ip, [ip]
	orr	r3, r3, r2
	ldr	r1, [r1]
	ldr	r2, [r0]
	ldr	r0, [r4, #16]
	orr	r3, r3, ip
	orr	r2, r3, r2
	add	r1, r0, r1
	mov	r3, #2
	mov	r0, r5
	bl	pci_write_config
.L24:
	ldr	r2, .L117+60
	ldr	r3, [r10]
	ldr	r2, [r2]
	ldr	r1, .L117+64
	orr	r3, r3, r2
	ldr	r2, .L117+68
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r2, r3, r2
	ldr	r3, .L117+72
	mov	r0, r5
	ldr	r1, [r3]
	mov	r3, #4
	bl	pci_write_config
	ldr	r1, .L117+164
	ldr	r3, .L117+168
	ldr	r2, .L117+172
	ldr	r1, [r1]
	ldr	r0, [r4, #12]
	ldr	r3, [r3]
	ldr	r2, [r2]
	cmp	r0, r1
	ldr	r9, .L117+176
	orr	r2, r3, r2
	bne	.L26
	ldr	r3, [r9]
	ldr	r1, [r4, #8]
	tst	r1, r3
	ldrne	r3, .L117+180
	ldrne	r3, [r3]
	orrne	r2, r2, r3
.L26:
	ldr	r3, .L117+8
	ldr	r1, [r4]
	ldr	r3, [r3]
	tst	r1, r3
	beq	.L27
	ldr	r3, .L117+184
	ldr	r0, .L117+188
	ldr	r1, .L117+192
	ldr	r3, [r3]
	ldr	r0, [r0]
	ldr	r1, [r1]
	orr	r3, r3, r0
	orr	r3, r3, r1
	orr	r2, r2, r3
.L27:
	ldr	r3, .L117+196
	mov	r0, r5
	ldr	r1, [r3]
	mov	r3, #4
	bl	pci_write_config
	ldr	r3, .L117+48
	ldr	r2, [sp, #12]
	ldr	r1, [r3]
	mov	r0, r5
	mov	r3, #4
	bl	pci_write_config
	ldr	r3, .L117+52
	ldr	r2, [sp, #16]
	ldr	r1, [r3]
	mov	r0, r5
	mov	r3, #4
	bl	pci_write_config
	ldr	r3, [r9]
	ldr	r2, [r4, #8]
	tst	r2, r3
	bne	.L106
.L28:
	mov	r0, r4
	bl	BGE_IS_5714_FAMILY
	cmp	r0, #0
	beq	.L31
	ldr	r3, .L117+200
	ldr	r2, [r4, #8]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L107
.L32:
	ldr	r9, .L117+204
	mov	r0, r4
	ldr	r1, [r9]
	bl	CSR_READ_4
	mov	r2, r0
	ldr	r3, .L117+208
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r1, [r9]
	orr	r2, r2, r3
	bl	CSR_WRITE_4
.L33:
	ldr	r3, .L117+212
	mov	r0, r4
	ldr	r9, [r3]
	bl	bge_dma_swap_options
	ldr	r10, .L117+20
	mov	r2, r0
	mov	r1, r9
	mov	r0, r4
	bl	CSR_WRITE_4
	ldr	r1, [r10]
	mov	r0, r4
	bl	CSR_READ_4
	ldr	r9, [sp, #8]
	ldr	r3, [sp, #4]
	eor	r9, r9, r0
	and	r9, r9, r3
	eor	r9, r9, r0
	mov	r2, r9
	ldr	r1, [r10]
	mov	r0, r4
	bl	CSR_WRITE_4
	mov	r0, #40
	bl	DELAY
	ldr	r3, .L117+44
	mov	r0, r4
	ldr	r1, [r3]
	bl	bge_ape_unlock
	ldr	r3, [fp]
	ldr	r2, [r4, #4]
	ldr	r10, .L117+216
	cmp	r2, r3
	ldr	r3, [r10]
	beq	.L34
	cmp	r3, #0
	mov	fp, #0
	bgt	.L35
	b	.L36
.L108:
	ldr	r3, [r10]
	add	fp, fp, #1
	cmp	r3, fp
	ble	.L94
.L35:
	mov	r0, #10
	bl	DELAY
	mov	r0, r4
	ldr	r1, [r6]
	bl	bge_readmem_ind
	ldr	r3, [r7]
	mvn	r3, r3
	cmp	r3, r0
	bne	.L108
.L94:
	mov	r9, r0
.L36:
	ldr	r3, .L117+220
	ldr	r2, [r4, #8]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L109
.L43:
	ldr	r3, .L117+224
	ldr	r2, [r4, #12]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L110
.L41:
	ldr	r3, .L117+228
	ldr	r1, [r4, #4]
	ldr	r2, [r3]
	ldr	r3, [r4, #8]
	cmp	r1, r2
	beq	.L111
.L45:
	ldr	r2, [r8]
	tst	r3, r2
	bne	.L46
.L98:
	ldr	r3, [r4, #4]
.L47:
	ldr	r2, .L117+232
	ldr	r2, [r2]
	cmp	r2, r3
	movne	r0, #0
	beq	.L112
.L1:
	add	sp, sp, #36
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L109:
	ldr	r3, [r10]
	cmp	r3, fp
	bne	.L43
	mov	r2, r9
	mov	r0, r5
	ldr	r1, .L117+236
	bl	device_printf
	b	.L43
.L101:
	ldr	r3, .L117+240
	ldr	r7, .L117+244
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, [r7]
	bl	CSR_WRITE_4
	mov	r6, #8000
	ldr	r9, .L117+248
	b	.L9
.L114:
	mov	r0, #20
	bl	DELAY
	subs	r6, r6, #1
	beq	.L113
.L9:
	mov	r0, r4
	ldr	r1, [r7]
	bl	CSR_READ_4
	ldr	r3, [r9]
	tst	r0, r3
	beq	.L114
	b	.L7
.L91:
	str	r3, [sp, #20]
	ldr	r3, .L117+116
	mov	r2, #536870912
	ldr	r1, [r3]
	mov	r0, r4
	str	r3, [sp, #24]
	bl	CSR_WRITE_4
	ldr	r1, [r4, #4]
	ldr	r2, [fp]
	ldr	r3, [sp, #20]
	cmp	r1, r2
	orr	r3, r3, #536870912
	bne	.L20
.L104:
	ldr	r9, .L117+252
	mov	r0, r4
	ldr	r1, [r9]
	str	r3, [sp, #20]
	bl	CSR_READ_4
	ldr	r2, .L117+256
	ldr	r1, [r9]
	ldr	r2, [r2]
	ldr	r9, .L117+260
	orr	r2, r0, r2
	mov	r0, r4
	bl	CSR_WRITE_4
	ldr	r1, [r9]
	mov	r0, r4
	bl	CSR_READ_4
	mov	r2, r0
	ldr	r0, .L117+264
	ldr	r1, [r9]
	ldr	ip, [r0]
	mov	r0, r4
	bic	r2, r2, ip
	bl	CSR_WRITE_4
	ldr	r3, [sp, #20]
	b	.L20
.L107:
	ldr	r9, .L117+268
	ldr	r1, [r4, #24]
	ldr	r3, [r9]
	mov	r2, #2
	add	r1, r1, r3
	mov	r0, r5
	bl	pci_read_config
	ldr	r3, .L117+272
	ldr	r2, [r9]
	ldr	r1, [r4, #24]
	ldr	r3, [r3]
	ldr	r9, .L117+276
	add	r1, r1, r2
	orr	r2, r0, r3
	mov	r3, #2
	mov	r0, r5
	bl	pci_write_config
	ldr	r1, [r9]
	mov	r0, r4
	bl	CSR_READ_4
	mov	r2, r0
	ldr	r3, .L117+280
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r1, [r9]
	orr	r2, r2, r3
	bl	CSR_WRITE_4
	b	.L32
.L11:
	mov	r0, r4
	bl	BGE_IS_5755_PLUS
	cmp	r0, #0
	beq	.L15
	ldr	r3, .L117+80
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L13
.L102:
	mov	r0, r5
	ldr	r1, .L117+284
	bl	device_printf
	b	.L13
.L34:
	cmp	r3, #0
	mov	r6, #0
	ble	.L37
	ldr	r9, .L117+252
	ldr	r7, .L117+288
	b	.L39
.L38:
	mov	r0, #100
	bl	DELAY
	ldr	r3, [r10]
	add	r6, r6, #1
	cmp	r3, r6
	ble	.L37
.L39:
	mov	r0, r4
	ldr	r1, [r9]
	bl	CSR_READ_4
	ldr	r3, [r7]
	tst	r0, r3
	beq	.L38
	ldr	r3, [r10]
.L37:
	cmp	r6, r3
	bne	.L41
	mov	r0, r5
	ldr	r1, .L117+292
	bl	device_printf
	mov	r0, #1
	b	.L1
.L3:
	mov	r0, r4
	bl	BGE_IS_5714_FAMILY
	cmp	r0, #0
	bne	.L96
	ldr	fp, .L117+28
	ldr	r3, [r4, #4]
	ldr	r2, [fp]
	cmp	r3, r2
	beq	.L50
	ldr	r8, .L117+32
	ldr	r0, [r4, #8]
	ldr	r2, [r8]
	ldr	r1, .L117+296
	tst	r0, r2
	ldr	r2, .L117+300
	movne	r2, r1
	str	r2, [sp, #28]
	b	.L4
.L31:
	ldr	r3, .L117+204
	ldr	r2, .L117+208
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, [r3]
	bl	CSR_WRITE_4
	b	.L33
.L106:
	ldr	r9, .L117+304
	ldr	r1, [r4, #20]
	ldr	r3, [r9]
	mov	r2, #2
	add	r1, r1, r3
	mov	r0, r5
	bl	pci_read_config
	ldr	r3, .L117+308
	ldr	r2, .L117+312
	ldr	r1, [r3]
	ldr	r3, [r4, #4]
	ldr	r2, [r2]
	cmp	r3, r1
	bic	r2, r0, r2
	beq	.L115
	ldr	r1, .L117+228
	ldr	r1, [r1]
	cmp	r3, r1
	beq	.L116
.L30:
	ldr	r3, [r9]
	ldr	r1, [r4, #20]
	mov	r0, r5
	add	r1, r1, r3
	mov	r3, #2
	bl	pci_write_config
	b	.L28
.L111:
	ldr	r2, .L117+316
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L45
	ldr	r5, .L117+320
	mov	r0, r4
	ldr	r1, [r5]
	bl	CSR_READ_4
	bic	r2, r0, #4080
	bic	r2, r2, #15
	orr	r2, r2, #2176
	mov	r0, r4
	ldr	r1, [r5]
	bl	CSR_WRITE_4
	ldr	r3, [r4, #8]
	ldr	r2, [r8]
	tst	r3, r2
	beq	.L98
.L46:
	mov	r0, r4
	bl	BGE_IS_5717_PLUS
	cmp	r0, #0
	bne	.L98
	ldr	r3, .L117+112
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, [r4, #4]
	cmp	r1, r2
	beq	.L47
	ldr	r2, .L117+104
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L47
	mov	r1, #31744
	mov	r0, r4
	bl	CSR_READ_4
	mov	r1, #31744
	orr	r2, r0, #33554432
	mov	r0, r4
	bl	CSR_WRITE_4
	b	.L98
.L103:
	mov	r0, r4
	ldr	r1, .L117+324
	str	r3, [sp, #20]
	bl	CSR_READ_4
	cmp	r0, #96
	ldr	r3, [sp, #20]
	bne	.L18
	mov	r2, #32
	mov	r0, r4
	ldr	r1, .L117+324
	bl	CSR_WRITE_4
	ldr	r3, [sp, #20]
	b	.L18
.L105:
	ldr	r0, .L117+328
	bl	DELAY
	mov	r2, #4
	mov	r1, #196
	mov	r0, r5
	bl	pci_read_config
	mov	r3, #4
	orr	r2, r0, #32768
	mov	r1, #196
	mov	r0, r5
	bl	pci_write_config
	b	.L25
.L116:
	ldr	r1, .L117+332
	ldr	r3, .L117+336
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r1, .L117+340
	orr	r3, r3, r0
	ldr	r1, [r1]
	bic	r2, r2, r3
	orr	r2, r2, r1
	b	.L30
.L112:
	ldr	r3, .L117+344
	ldr	r2, .L117+348
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, [r3]
	bl	BGE_CLRBIT
	mov	r0, #0
	add	sp, sp, #36
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L110:
	ldr	r0, .L117+352
	bl	DELAY
	b	.L41
.L115:
	ldr	r3, .L117+332
	ldr	r1, .L117+340
	ldr	r3, [r3]
	ldr	r1, [r1]
	bic	r2, r2, r3
	orr	r2, r2, r1
	b	.L30
.L113:
	ldr	r3, .L117+80
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L7
	mov	r0, r5
	ldr	r1, .L117+356
	bl	device_printf
	b	.L7
.L50:
	ldr	r2, .L117+24
	ldr	r8, .L117+32
	str	r2, [sp, #28]
	b	.L4
.L118:
	.align	2
.L117:
	.word	BGE_MACMODE_HALF_DUPLEX
	.word	BGE_MACMODE_PORTMODE
	.word	BGE_MFW_ON_APE
	.word	BGE_MACMODE_APE_RX_EN
	.word	BGE_MACMODE_APE_TX_EN
	.word	BGE_MAC_MODE
	.word	bge_writereg_ind
	.word	BGE_ASICREV_BCM5906
	.word	BGE_FLAG_PCIE
	.word	BGE_ASICREV_BCM5700
	.word	BGE_ASICREV_BCM5701
	.word	BGE_APE_LOCK_GRC
	.word	BGE_PCI_CACHESZ
	.word	BGE_PCI_CMD
	.word	BGE_PCIMISCCTL_INDIRECT_ACCESS
	.word	BGE_PCIMISCCTL_MASK_PCI_INTR
	.word	BGE_HIF_SWAP_OPTIONS
	.word	BGE_PCIMISCCTL_PCISTATE_RW
	.word	BGE_PCI_MISC_CTL
	.word	BGE_ASICREV_BCM5752
	.word	bootverbose
	.word	BGE_FASTBOOT_PC
	.word	BGE_SRAM_FW_MB_MAGIC
	.word	BGE_SRAM_FW_MB
	.word	BGE_MISCCFG_RESET_CORE_CLOCKS
	.word	BGE_32BITTIME_66MHZ
	.word	BGE_ASICREV_BCM5785
	.word	BGE_FLAG_5717_PLUS
	.word	BGE_CHIPID_BCM5750_A0
	.word	BGE_MISC_CFG
	.word	BGE_FLAG_CPMU_PRESENT
	.word	BGE_MISCCFG_GPHY_PD_OVERRIDE
	.word	100000
	.word	PCIER_DEVICE_CTL
	.word	PCIEM_CTL_RELAXED_ORD_ENABLE
	.word	PCIEM_CTL_NOSNOOP_ENABLE
	.word	PCIEM_STA_CORRECTABLE_ERROR
	.word	PCIEM_STA_NON_FATAL_ERROR
	.word	PCIEM_STA_FATAL_ERROR
	.word	PCIEM_STA_UNSUPPORTED_REQ
	.word	PCIER_DEVICE_STA
	.word	BGE_CHIPID_BCM5704_A0
	.word	BGE_PCISTATE_ROM_ENABLE
	.word	BGE_PCISTATE_ROM_RETRY_ENABLE
	.word	BGE_FLAG_PCIX
	.word	BGE_PCISTATE_RETRY_SAME_DMA
	.word	BGE_PCISTATE_ALLOW_APE_CTLSPC_WR
	.word	BGE_PCISTATE_ALLOW_APE_SHMEM_WR
	.word	BGE_PCISTATE_ALLOW_APE_PSPACE_WR
	.word	BGE_PCI_PCISTATE
	.word	BGE_FLAG_MSI
	.word	BGE_MARB_MODE
	.word	BGE_MARBMODE_ENABLE
	.word	BGE_MODE_CTL
	.word	BGE_TIMEOUT
	.word	BGE_FLAG_EADDR
	.word	BGE_CHIPID_BCM57765_A0
	.word	BGE_ASICREV_BCM5704
	.word	BGE_ASICREV_BCM5720
	.word	.LC3
	.word	BGE_NVRAMSWARB_SET1
	.word	BGE_NVRAM_SWARB
	.word	BGE_NVRAMSWARB_GNT1
	.word	BGE_VCPU_STATUS
	.word	BGE_VCPU_STATUS_DRV_RESET
	.word	BGE_VCPU_EXT_CTRL
	.word	BGE_VCPU_EXT_CTRL_HALT_CPU
	.word	PCIR_MSI_CTRL
	.word	PCIM_MSICTRL_MSI_ENABLE
	.word	BGE_MSI_MODE
	.word	BGE_MSIMODE_ENABLE
	.word	.LC1
	.word	BGE_VCPU_STATUS_INIT_DONE
	.word	.LC2
	.word	bge_writemem_direct
	.word	bge_writemem_ind
	.word	PCIXR_COMMAND
	.word	BGE_ASICREV_BCM5703
	.word	PCIXM_COMMAND_ERO
	.word	BGE_FLAG_TBI
	.word	BGE_SERDES_CFG
	.word	32300
	.word	500000
	.word	PCIXM_COMMAND_MAX_READ
	.word	PCIXM_COMMAND_MAX_SPLITS
	.word	PCIXM_COMMAND_MAX_READ_2048
	.word	BGE_CPMU_CLCK_ORIDE
	.word	CPMU_CLCK_ORIDE_MAC_ORIDE_EN
	.word	10000
	.word	.LC0
	.size	bge_reset, .-bge_reset
	.comm	bootverbose,4,4
	.comm	PCIXR_COMMAND,4,4
	.comm	PCIXM_COMMAND_MAX_SPLITS,4,4
	.comm	PCIXM_COMMAND_MAX_READ_2048,4,4
	.comm	PCIXM_COMMAND_MAX_READ,4,4
	.comm	PCIXM_COMMAND_ERO,4,4
	.comm	PCIR_MSI_CTRL,4,4
	.comm	PCIM_MSICTRL_MSI_ENABLE,4,4
	.comm	PCIER_DEVICE_STA,4,4
	.comm	PCIER_DEVICE_CTL,4,4
	.comm	PCIEM_STA_UNSUPPORTED_REQ,4,4
	.comm	PCIEM_STA_NON_FATAL_ERROR,4,4
	.comm	PCIEM_STA_FATAL_ERROR,4,4
	.comm	PCIEM_STA_CORRECTABLE_ERROR,4,4
	.comm	PCIEM_CTL_RELAXED_ORD_ENABLE,4,4
	.comm	PCIEM_CTL_NOSNOOP_ENABLE,4,4
	.comm	CPMU_CLCK_ORIDE_MAC_ORIDE_EN,4,4
	.comm	BGE_VCPU_STATUS_INIT_DONE,4,4
	.comm	BGE_VCPU_STATUS_DRV_RESET,4,4
	.comm	BGE_VCPU_STATUS,4,4
	.comm	BGE_VCPU_EXT_CTRL_HALT_CPU,4,4
	.comm	BGE_VCPU_EXT_CTRL,4,4
	.comm	BGE_TIMEOUT,4,4
	.comm	BGE_SRAM_FW_MB_MAGIC,4,4
	.comm	BGE_SRAM_FW_MB,4,4
	.comm	BGE_SERDES_CFG,4,4
	.comm	BGE_PCI_PCISTATE,4,4
	.comm	BGE_PCI_MISC_CTL,4,4
	.comm	BGE_PCI_CMD,4,4
	.comm	BGE_PCI_CACHESZ,4,4
	.comm	BGE_PCISTATE_ROM_RETRY_ENABLE,4,4
	.comm	BGE_PCISTATE_ROM_ENABLE,4,4
	.comm	BGE_PCISTATE_RETRY_SAME_DMA,4,4
	.comm	BGE_PCISTATE_ALLOW_APE_SHMEM_WR,4,4
	.comm	BGE_PCISTATE_ALLOW_APE_PSPACE_WR,4,4
	.comm	BGE_PCISTATE_ALLOW_APE_CTLSPC_WR,4,4
	.comm	BGE_PCIMISCCTL_PCISTATE_RW,4,4
	.comm	BGE_PCIMISCCTL_MASK_PCI_INTR,4,4
	.comm	BGE_PCIMISCCTL_INDIRECT_ACCESS,4,4
	.comm	BGE_NVRAM_SWARB,4,4
	.comm	BGE_NVRAMSWARB_SET1,4,4
	.comm	BGE_NVRAMSWARB_GNT1,4,4
	.comm	BGE_MSI_MODE,4,4
	.comm	BGE_MSIMODE_ENABLE,4,4
	.comm	BGE_MODE_CTL,4,4
	.comm	BGE_MISC_CFG,4,4
	.comm	BGE_MISCCFG_RESET_CORE_CLOCKS,4,4
	.comm	BGE_MISCCFG_GPHY_PD_OVERRIDE,4,4
	.comm	BGE_MFW_ON_APE,4,4
	.comm	BGE_MARB_MODE,4,4
	.comm	BGE_MARBMODE_ENABLE,4,4
	.comm	BGE_MAC_MODE,4,4
	.comm	BGE_MACMODE_PORTMODE,4,4
	.comm	BGE_MACMODE_HALF_DUPLEX,4,4
	.comm	BGE_MACMODE_APE_TX_EN,4,4
	.comm	BGE_MACMODE_APE_RX_EN,4,4
	.comm	BGE_HIF_SWAP_OPTIONS,4,4
	.comm	BGE_FLAG_TBI,4,4
	.comm	BGE_FLAG_PCIX,4,4
	.comm	BGE_FLAG_PCIE,4,4
	.comm	BGE_FLAG_MSI,4,4
	.comm	BGE_FLAG_EADDR,4,4
	.comm	BGE_FLAG_CPMU_PRESENT,4,4
	.comm	BGE_FLAG_5717_PLUS,4,4
	.comm	BGE_FASTBOOT_PC,4,4
	.comm	BGE_CPMU_CLCK_ORIDE,4,4
	.comm	BGE_CHIPID_BCM57765_A0,4,4
	.comm	BGE_CHIPID_BCM5750_A0,4,4
	.comm	BGE_CHIPID_BCM5704_A0,4,4
	.comm	BGE_ASICREV_BCM5906,4,4
	.comm	BGE_ASICREV_BCM5785,4,4
	.comm	BGE_ASICREV_BCM5752,4,4
	.comm	BGE_ASICREV_BCM5720,4,4
	.comm	BGE_ASICREV_BCM5704,4,4
	.comm	BGE_ASICREV_BCM5703,4,4
	.comm	BGE_ASICREV_BCM5701,4,4
	.comm	BGE_ASICREV_BCM5700,4,4
	.comm	BGE_APE_LOCK_GRC,4,4
	.comm	BGE_32BITTIME_66MHZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
