	.file	"extr_mb.c_show_cpuinfo.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Unknown"
.LC1:
	.string	"little"
.LC2:
	.string	"big"
.LC3:
	.string	"yes"
.LC4:
	.string	"no"
.LC5:
	.string	"v2"
.LC6:
	.string	"v1"
.LC7:
	.string	"fsl "
.LC8:
	.string	""
.LC9:
	.string	"fpu "
.LC10:
	.string	"zero "
.LC11:
	.string	"dopb "
.LC12:
	.string	"iopb "
.LC13:
	.string	"ill "
.LC14:
	.string	"unal "
.LC15:
	.string	"op0x0 "
.LC16:
	.string	"un"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC17:
	.string	"CPU-Family:\tMicroBlaze\nFPGA-Arch:\t%s\nCPU-Ver:\t%s, %s endian\nCPU-MHz:\t%d.%02d\nBogoMips:\t%lu.%02lu\n"
	.align 8
.LC18:
	.string	"HW:\n Shift:\t\t%s\n MSR:\t\t%s\n PCMP:\t\t%s\n DIV:\t\t%s\n"
	.section	.rodata.str1.1
.LC19:
	.string	" MMU:\t\t%x\n"
.LC20:
	.string	" MUL:\t\t%s\n FPU:\t\t%s\n"
.LC21:
	.string	" Exc:\t\t%s%s%s%s%s%s%s%s\n"
.LC22:
	.string	"Stream-insns:\t%sprivileged\n"
	.section	.rodata.str1.8
	.align 8
.LC23:
	.string	"Icache:\t\t%ukB\tline length:\t%dB\n"
	.section	.rodata.str1.1
.LC24:
	.string	"Icache:\t\tno\n"
	.section	.rodata.str1.8
	.align 8
.LC25:
	.string	"Dcache:\t\t%ukB\tline length:\t%dB\n"
	.section	.rodata.str1.1
.LC26:
	.string	"Dcache-Policy:\t"
.LC27:
	.string	"write-back\n"
.LC28:
	.string	"write-through\n"
.LC29:
	.string	"Dcache:\t\tno\n"
.LC30:
	.string	"HW-Debug:\t%s\n"
	.section	.rodata.str1.8
	.align 8
.LC31:
	.string	"PVR-USR1:\t%02x\nPVR-USR2:\t%08x\n"
	.section	.rodata.str1.1
.LC32:
	.string	"Page size:\t%lu\n"
	.text
	.p2align 4
	.type	show_cpuinfo, @function
show_cpuinfo:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	rax, QWORD PTR family_string_lookup[rip]
	mov	r10, QWORD PTR 8[rax]
	test	r10, r10
	je	.L28
	mov	rdx, QWORD PTR cpuinfo[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L53:
	mov	r10, QWORD PTR 24[rax]
	add	rax, 16
	test	r10, r10
	je	.L28
.L3:
	cmp	rdx, QWORD PTR [rax]
	jne	.L53
.L2:
	mov	rax, QWORD PTR cpu_ver_lookup[rip]
	mov	rcx, QWORD PTR 8[rax]
	test	rcx, rcx
	je	.L29
	mov	rdx, QWORD PTR cpuinfo[rip+8]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L54:
	mov	rcx, QWORD PTR 24[rax]
	add	rax, 16
	test	rcx, rcx
	je	.L29
.L5:
	cmp	rdx, QWORD PTR [rax]
	jne	.L54
.L4:
	mov	r9d, DWORD PTR HZ[rip]
	mov	eax, 5000
	mov	edi, DWORD PTR loops_per_jiffy[rip]
	lea	rbx, .LC4[rip]
	cdq
	idiv	r9d
	mov	esi, eax
	mov	eax, edi
	cdq
	idiv	esi
	movsx	rsi, eax
	cdq
	imul	rsi, rsi, 1374389535
	sar	rsi, 37
	sub	esi, edx
	imul	esi, esi, 100
	sub	eax, esi
	mov	esi, eax
	mov	eax, 500000
	cdq
	idiv	r9d
	movsx	r9, DWORD PTR cpuinfo[rip+16]
	mov	r8d, eax
	mov	eax, edi
	lea	rdi, .LC2[rip]
	cdq
	idiv	r8d
	mov	r8, r9
	imul	r9, r9, 1125899907
	mov	r11d, r8d
	sar	r11d, 31
	sar	r9, 50
	mov	edx, r9d
	sub	edx, r11d
	imul	edx, edx, 1000000
	sub	r8d, edx
	cmp	QWORD PTR cpuinfo[rip+120], 0
	mov	edx, r8d
	lea	r8, .LC1[rip]
	cmove	r8, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 40
	sub	r9d, r11d
	mov	rdi, rbp
	push	rsi
	.cfi_def_cfa_offset 48
	lea	rsi, .LC17[rip]
	push	rax
	.cfi_def_cfa_offset 56
	xor	eax, eax
	push	rdx
	.cfi_def_cfa_offset 64
	mov	rdx, r10
	call	seq_printf@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 32
	mov	r9, rbx
	mov	r8, rbx
	mov	eax, DWORD PTR cpuinfo[rip+20]
	test	DWORD PTR PVR0_USE_DIV_MASK[rip], eax
	lea	rdx, .LC3[rip]
	mov	rcx, rbx
	cmovne	r9, rdx
	test	DWORD PTR PVR2_USE_PCMP_INSTR[rip], eax
	lea	rsi, .LC18[rip]
	mov	rdi, rbp
	cmovne	r8, rdx
	test	DWORD PTR PVR2_USE_MSR_INSTR[rip], eax
	cmovne	rcx, rdx
	test	DWORD PTR PVR0_USE_BARREL_MASK[rip], eax
	cmove	rdx, rbx
	xor	eax, eax
	call	seq_printf@PLT
	mov	rdx, QWORD PTR cpuinfo[rip+24]
	lea	rsi, .LC19[rip]
	xor	eax, eax
	mov	rdi, rbp
	call	seq_printf@PLT
	mov	eax, DWORD PTR cpuinfo[rip+36]
	lea	rcx, .LC5[rip]
	test	DWORD PTR PVR2_USE_FPU2_MASK[rip], eax
	jne	.L11
	test	DWORD PTR PVR0_USE_FPU_MASK[rip], eax
	lea	rcx, .LC6[rip]
	cmove	rcx, rbx
.L11:
	mov	eax, DWORD PTR cpuinfo[rip+32]
	lea	rdx, .LC5[rip]
	test	DWORD PTR PVR2_USE_MUL64_MASK[rip], eax
	jne	.L12
	test	DWORD PTR PVR0_USE_HW_MUL_MASK[rip], eax
	lea	rdx, .LC6[rip]
	lea	rax, .LC4[rip]
	cmove	rdx, rax
.L12:
	lea	rsi, .LC20[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	seq_printf@PLT
	lea	rbx, .LC8[rip]
	mov	eax, DWORD PTR cpuinfo[rip+40]
	lea	r11, .LC7[rip]
	test	DWORD PTR PVR2_USE_FSL_EXC[rip], eax
	lea	r10, .LC9[rip]
	lea	rdi, .LC10[rip]
	cmove	r11, rbx
	test	DWORD PTR PVR2_FPU_EXC_MASK[rip], eax
	lea	rsi, .LC11[rip]
	cmove	r10, rbx
	test	DWORD PTR PVR2_DIV_ZERO_EXC_MASK[rip], eax
	cmove	rdi, rbx
	test	DWORD PTR PVR2_DOPB_BUS_EXC_MASK[rip], eax
	push	r11
	.cfi_def_cfa_offset 40
	cmove	rsi, rbx
	lea	r9, .LC12[rip]
	push	r10
	.cfi_def_cfa_offset 48
	test	DWORD PTR PVR2_IOPB_BUS_EXC_MASK[rip], eax
	cmove	r9, rbx
	lea	r8, .LC13[rip]
	test	DWORD PTR PVR2_ILL_OPCODE_EXC_MASK[rip], eax
	push	rdi
	.cfi_def_cfa_offset 56
	cmove	r8, rbx
	lea	rcx, .LC14[rip]
	push	rsi
	.cfi_def_cfa_offset 64
	mov	rdi, rbp
	test	DWORD PTR PVR2_UNALIGNED_EXC_MASK[rip], eax
	lea	rdx, .LC15[rip]
	cmove	rcx, rbx
	test	DWORD PTR PVR2_OPCODE_0x0_ILL_MASK[rip], eax
	lea	rsi, .LC21[rip]
	cmove	rdx, rbx
	xor	eax, eax
	call	seq_printf@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 32
	lea	rdx, .LC16[rip]
	mov	rdi, rbp
	cmp	QWORD PTR cpuinfo[rip+112], 0
	lea	rsi, .LC22[rip]
	cmove	rdx, rbx
	xor	eax, eax
	call	seq_printf@PLT
	cmp	QWORD PTR cpuinfo[rip+104], 0
	je	.L22
	mov	edx, DWORD PTR cpuinfo[rip+44]
	mov	ecx, DWORD PTR cpuinfo[rip+96]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC23[rip]
	sar	edx, 10
	call	seq_printf@PLT
.L23:
	cmp	QWORD PTR cpuinfo[rip+88], 0
	je	.L24
	mov	edx, DWORD PTR cpuinfo[rip+48]
	mov	ecx, DWORD PTR cpuinfo[rip+80]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC25[rip]
	sar	edx, 10
	call	seq_printf@PLT
	lea	rsi, .LC26[rip]
	mov	rdi, rbp
	call	seq_puts@PLT
	cmp	QWORD PTR cpuinfo[rip+72], 0
	je	.L25
	lea	rsi, .LC27[rip]
	mov	rdi, rbp
	call	seq_puts@PLT
	jmp	.L26
	.p2align 4,,10
	.p2align 3
.L29:
	lea	rcx, .LC0[rip]
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L28:
	lea	r10, .LC0[rip]
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L24:
	lea	rsi, .LC29[rip]
	mov	rdi, rbp
	call	seq_puts@PLT
.L26:
	cmp	QWORD PTR cpuinfo[rip+64], 0
	lea	rax, .LC4[rip]
	mov	rdi, rbp
	lea	rdx, .LC3[rip]
	lea	rsi, .LC30[rip]
	cmove	rdx, rax
	xor	eax, eax
	call	seq_printf@PLT
	mov	ecx, DWORD PTR cpuinfo[rip+52]
	mov	rdi, rbp
	xor	eax, eax
	mov	edx, DWORD PTR cpuinfo[rip+56]
	lea	rsi, .LC31[rip]
	call	seq_printf@PLT
	mov	rdx, QWORD PTR PAGE_SIZE[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC32[rip]
	call	seq_printf@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L22:
	.cfi_restore_state
	lea	rsi, .LC24[rip]
	mov	rdi, rbp
	call	seq_puts@PLT
	jmp	.L23
	.p2align 4,,10
	.p2align 3
.L25:
	lea	rsi, .LC28[rip]
	mov	rdi, rbp
	call	seq_puts@PLT
	jmp	.L26
	.cfi_endproc
.LFE0:
	.size	show_cpuinfo, .-show_cpuinfo
	.comm	loops_per_jiffy,4,4
	.comm	family_string_lookup,8,8
	.comm	cpuinfo,128,32
	.comm	cpu_ver_lookup,8,8
	.comm	PVR2_USE_PCMP_INSTR,4,4
	.comm	PVR2_USE_MUL64_MASK,4,4
	.comm	PVR2_USE_MSR_INSTR,4,4
	.comm	PVR2_USE_FSL_EXC,4,4
	.comm	PVR2_USE_FPU2_MASK,4,4
	.comm	PVR2_UNALIGNED_EXC_MASK,4,4
	.comm	PVR2_OPCODE_0x0_ILL_MASK,4,4
	.comm	PVR2_IOPB_BUS_EXC_MASK,4,4
	.comm	PVR2_ILL_OPCODE_EXC_MASK,4,4
	.comm	PVR2_FPU_EXC_MASK,4,4
	.comm	PVR2_DOPB_BUS_EXC_MASK,4,4
	.comm	PVR2_DIV_ZERO_EXC_MASK,4,4
	.comm	PVR0_USE_HW_MUL_MASK,4,4
	.comm	PVR0_USE_FPU_MASK,4,4
	.comm	PVR0_USE_DIV_MASK,4,4
	.comm	PVR0_USE_BARREL_MASK,4,4
	.comm	PAGE_SIZE,8,8
	.comm	HZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mb.c_show_cpuinfo.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Unknown\000"
	.align	2
.LC1:
	.ascii	"little\000"
	.align	2
.LC2:
	.ascii	"big\000"
	.align	2
.LC3:
	.ascii	"yes\000"
	.align	2
.LC4:
	.ascii	"no\000"
	.align	2
.LC5:
	.ascii	"v2\000"
	.align	2
.LC6:
	.ascii	"v1\000"
	.align	2
.LC7:
	.ascii	"op0x0 \000"
	.align	2
.LC8:
	.ascii	"\000"
	.align	2
.LC9:
	.ascii	"unal \000"
	.align	2
.LC10:
	.ascii	"ill \000"
	.align	2
.LC11:
	.ascii	"iopb \000"
	.align	2
.LC12:
	.ascii	"dopb \000"
	.align	2
.LC13:
	.ascii	"zero \000"
	.align	2
.LC14:
	.ascii	"fpu \000"
	.align	2
.LC15:
	.ascii	"fsl \000"
	.align	2
.LC16:
	.ascii	"un\000"
	.align	2
.LC17:
	.ascii	"CPU-Family:\011MicroBlaze\012FPGA-Arch:\011%s\012CP"
	.ascii	"U-Ver:\011%s, %s endian\012CPU-MHz:\011%d.%02d\012B"
	.ascii	"ogoMips:\011%lu.%02lu\012\000"
	.global	__aeabi_idiv
	.align	2
.LC18:
	.ascii	"HW:\012 Shift:\011\011%s\012 MSR:\011\011%s\012 PCM"
	.ascii	"P:\011\011%s\012 DIV:\011\011%s\012\000"
	.align	2
.LC19:
	.ascii	" MMU:\011\011%x\012\000"
	.align	2
.LC20:
	.ascii	" MUL:\011\011%s\012 FPU:\011\011%s\012\000"
	.align	2
.LC21:
	.ascii	" Exc:\011\011%s%s%s%s%s%s%s%s\012\000"
	.align	2
.LC22:
	.ascii	"Stream-insns:\011%sprivileged\012\000"
	.align	2
.LC23:
	.ascii	"Icache:\011\011%ukB\011line length:\011%dB\012\000"
	.align	2
.LC24:
	.ascii	"Icache:\011\011no\012\000"
	.align	2
.LC25:
	.ascii	"Dcache:\011\011%ukB\011line length:\011%dB\012\000"
	.align	2
.LC26:
	.ascii	"Dcache-Policy:\011\000"
	.align	2
.LC27:
	.ascii	"write-back\012\000"
	.align	2
.LC28:
	.ascii	"write-through\012\000"
	.align	2
.LC29:
	.ascii	"Dcache:\011\011no\012\000"
	.align	2
.LC30:
	.ascii	"HW-Debug:\011%s\012\000"
	.align	2
.LC31:
	.ascii	"PVR-USR1:\011%02x\012PVR-USR2:\011%08x\012\000"
	.align	2
.LC32:
	.ascii	"Page size:\011%lu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	show_cpuinfo, %function
show_cpuinfo:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, .L56
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r3, [r3]
	mov	r7, r0
	ldr	r4, [r3, #4]
	sub	sp, sp, #24
	cmp	r4, #0
	beq	.L28
	ldr	r6, .L56+4
	add	r3, r3, #8
	ldr	r1, [r6]
	b	.L3
.L54:
	ldr	r4, [r3, #-4]
	cmp	r4, #0
	beq	.L53
.L3:
	ldr	r2, [r3, #-8]
	add	r3, r3, #8
	cmp	r1, r2
	bne	.L54
.L2:
	ldr	r3, .L56+8
	ldr	r1, [r3]
	ldr	r5, [r1, #4]
	cmp	r5, #0
	beq	.L29
	ldr	r2, [r6, #4]
	add	r1, r1, #8
	b	.L5
.L55:
	ldr	r5, [r1, #-4]
	cmp	r5, #0
	beq	.L29
.L5:
	ldr	r3, [r1, #-8]
	add	r1, r1, #8
	cmp	r2, r3
	bne	.L55
.L4:
	ldr	r3, .L56+12
	ldr	r2, [r6, #76]
	ldr	r10, [r3]
	ldr	r0, .L56+16
	ldr	r3, .L56+20
	ldr	r9, [r0]
	cmp	r2, #0
	mov	r1, r10
	ldr	r0, .L56+24
	ldr	r8, .L56+28
	moveq	r8, r3
	bl	__aeabi_idiv
	mov	r1, r0
	mov	r0, r9
	bl	__aeabi_idiv
	ldr	r2, .L56+32
	asr	r3, r0, #31
	smull	r1, r2, r0, r2
	rsb	r3, r3, r2, asr #5
	add	r3, r3, r3, lsl #2
	add	r3, r3, r3, lsl #2
	sub	r3, r0, r3, lsl #2
	mov	r1, r10
	ldr	r0, .L56+36
	str	r3, [sp, #16]
	bl	__aeabi_idiv
	mov	r1, r0
	mov	r0, r9
	bl	__aeabi_idiv
	ldr	r2, [r6, #8]
	ldr	r3, .L56+40
	asr	r1, r2, #31
	smull	ip, r3, r2, r3
	rsb	r1, r1, r3, asr #18
	rsb	r3, r1, r1, lsl #5
	rsb	r3, r3, r3, lsl #6
	add	r3, r1, r3, lsl #3
	sub	ip, r2, r3, lsl #6
	stmib	sp, {r1, ip}
	mov	r2, r4
	mov	r3, r5
	ldr	r1, .L56+44
	str	r0, [sp, #12]
	str	r8, [sp]
	mov	r0, r7
	bl	seq_printf
	ldr	r2, .L56+48
	ldr	r3, .L56+52
	ldr	ip, [r2]
	ldr	r0, [r6, #12]
	ldr	r2, .L56+56
	ldr	r3, [r3]
	ldr	r1, .L56+60
	ldr	r4, .L56+64
	ldr	lr, .L56+68
	tst	r0, ip
	ldr	ip, [r2]
	ldr	lr, [lr]
	movne	r2, r1
	moveq	r2, r4
	tst	r0, r3
	movne	r3, r1
	moveq	r3, r4
	tst	r0, ip
	movne	ip, r1
	moveq	ip, r4
	tst	r0, lr
	moveq	r1, r4
	str	ip, [sp]
	str	r1, [sp, #4]
	mov	r0, r7
	ldr	r1, .L56+72
	bl	seq_printf
	ldr	r2, [r6, #16]
	mov	r0, r7
	ldr	r1, .L56+76
	bl	seq_printf
	ldr	r2, .L56+80
	ldr	r3, [r6, #20]
	ldr	r2, [r2]
	tst	r3, r2
	bne	.L35
	ldr	r1, .L56+84
	ldr	r2, .L56+88
	ldr	r1, [r1]
	tst	r3, r1
	moveq	r2, r4
.L11:
	ldr	r3, .L56+92
	ldr	r1, [r6, #24]
	ldr	r3, [r3]
	tst	r1, r3
	bne	.L37
	ldr	r0, .L56+96
	ldr	r3, .L56+88
	ldr	ip, [r0]
	ldr	r0, .L56+64
	tst	r1, ip
	moveq	r3, r0
.L12:
	ldr	r1, .L56+100
	mov	r0, r7
	bl	seq_printf
	ldr	r2, .L56+104
	ldr	r1, [r6, #28]
	ldr	r0, [r2]
	ldr	r3, .L56+108
	ldr	ip, .L56+112
	ldr	r3, [r3]
	ldr	r4, .L56+116
	tst	r1, r0
	ldr	r0, .L56+120
	ldr	lr, [ip]
	ldr	r0, [r0]
	ldr	r2, .L56+124
	moveq	r2, r4
	tst	r1, r3
	ldr	r3, .L56+128
	moveq	r3, r4
	tst	r1, lr
	ldr	lr, .L56+132
	moveq	lr, r4
	tst	r1, r0
	ldr	r0, .L56+136
	moveq	r0, r4
	ldr	ip, .L56+140
	ldr	r5, .L56+144
	ldr	ip, [ip]
	ldr	r8, [r5]
	tst	r1, ip
	ldr	ip, .L56+148
	ldr	r5, [ip]
	ldr	ip, .L56+152
	moveq	ip, r4
	tst	r1, r8
	str	r0, [sp, #4]
	ldr	r0, .L56+156
	moveq	r0, r4
	str	lr, [sp]
	ldr	lr, .L56+160
	tst	r1, r5
	ldr	lr, [lr]
	str	ip, [sp, #8]
	ldr	ip, .L56+164
	moveq	ip, r4
	tst	r1, lr
	str	r0, [sp, #12]
	ldr	r0, .L56+168
	moveq	r0, r4
	ldr	r1, .L56+172
	str	ip, [sp, #16]
	str	r0, [sp, #20]
	mov	r0, r7
	bl	seq_printf
	ldr	r2, [r6, #72]
	ldr	r3, .L56+176
	cmp	r2, #0
	movne	r2, r3
	moveq	r2, r4
	mov	r0, r7
	ldr	r1, .L56+180
	bl	seq_printf
	ldr	r3, [r6, #68]
	cmp	r3, #0
	beq	.L22
	ldr	r2, [r6, #32]
	mov	r0, r7
	ldr	r3, [r6, #64]
	ldr	r1, .L56+184
	asr	r2, r2, #10
	bl	seq_printf
.L23:
	ldr	r3, [r6, #60]
	cmp	r3, #0
	beq	.L24
	ldr	r2, [r6, #36]
	ldr	r3, [r6, #56]
	ldr	r1, .L56+188
	asr	r2, r2, #10
	mov	r0, r7
	bl	seq_printf
	ldr	r1, .L56+192
	mov	r0, r7
	bl	seq_puts
	ldr	r3, [r6, #52]
	mov	r0, r7
	cmp	r3, #0
	ldrne	r1, .L56+196
	ldreq	r1, .L56+200
	bl	seq_puts
.L26:
	ldr	r0, [r6, #48]
	ldr	r3, .L56+64
	cmp	r0, #0
	ldr	r2, .L56+60
	mov	r0, r7
	moveq	r2, r3
	ldr	r1, .L56+204
	bl	seq_printf
	ldr	r3, [r6, #40]
	ldr	r2, [r6, #44]
	mov	r0, r7
	ldr	r1, .L56+208
	bl	seq_printf
	ldr	r3, .L56+212
	mov	r0, r7
	ldr	r2, [r3]
	ldr	r1, .L56+216
	bl	seq_printf
	mov	r0, #0
	add	sp, sp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L29:
	ldr	r5, .L56+220
	b	.L4
.L24:
	mov	r0, r7
	ldr	r1, .L56+224
	bl	seq_puts
	b	.L26
.L22:
	mov	r0, r7
	ldr	r1, .L56+228
	bl	seq_puts
	b	.L23
.L37:
	ldr	r3, .L56+232
	b	.L12
.L35:
	ldr	r2, .L56+232
	b	.L11
.L53:
	ldr	r4, .L56+220
	b	.L2
.L28:
	ldr	r4, .L56+220
	ldr	r6, .L56+4
	b	.L2
.L57:
	.align	2
.L56:
	.word	family_string_lookup
	.word	cpuinfo
	.word	cpu_ver_lookup
	.word	HZ
	.word	loops_per_jiffy
	.word	.LC2
	.word	5000
	.word	.LC1
	.word	1374389535
	.word	500000
	.word	1125899907
	.word	.LC17
	.word	PVR0_USE_BARREL_MASK
	.word	PVR2_USE_MSR_INSTR
	.word	PVR2_USE_PCMP_INSTR
	.word	.LC3
	.word	.LC4
	.word	PVR0_USE_DIV_MASK
	.word	.LC18
	.word	.LC19
	.word	PVR2_USE_MUL64_MASK
	.word	PVR0_USE_HW_MUL_MASK
	.word	.LC6
	.word	PVR2_USE_FPU2_MASK
	.word	PVR0_USE_FPU_MASK
	.word	.LC20
	.word	PVR2_OPCODE_0x0_ILL_MASK
	.word	PVR2_UNALIGNED_EXC_MASK
	.word	PVR2_ILL_OPCODE_EXC_MASK
	.word	.LC8
	.word	PVR2_IOPB_BUS_EXC_MASK
	.word	.LC7
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	PVR2_DOPB_BUS_EXC_MASK
	.word	PVR2_DIV_ZERO_EXC_MASK
	.word	PVR2_FPU_EXC_MASK
	.word	.LC12
	.word	.LC13
	.word	PVR2_USE_FSL_EXC
	.word	.LC14
	.word	.LC15
	.word	.LC21
	.word	.LC16
	.word	.LC22
	.word	.LC23
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	.LC30
	.word	.LC31
	.word	PAGE_SIZE
	.word	.LC32
	.word	.LC0
	.word	.LC29
	.word	.LC24
	.word	.LC5
	.size	show_cpuinfo, .-show_cpuinfo
	.comm	loops_per_jiffy,4,4
	.comm	family_string_lookup,4,4
	.comm	cpuinfo,80,4
	.comm	cpu_ver_lookup,4,4
	.comm	PVR2_USE_PCMP_INSTR,4,4
	.comm	PVR2_USE_MUL64_MASK,4,4
	.comm	PVR2_USE_MSR_INSTR,4,4
	.comm	PVR2_USE_FSL_EXC,4,4
	.comm	PVR2_USE_FPU2_MASK,4,4
	.comm	PVR2_UNALIGNED_EXC_MASK,4,4
	.comm	PVR2_OPCODE_0x0_ILL_MASK,4,4
	.comm	PVR2_IOPB_BUS_EXC_MASK,4,4
	.comm	PVR2_ILL_OPCODE_EXC_MASK,4,4
	.comm	PVR2_FPU_EXC_MASK,4,4
	.comm	PVR2_DOPB_BUS_EXC_MASK,4,4
	.comm	PVR2_DIV_ZERO_EXC_MASK,4,4
	.comm	PVR0_USE_HW_MUL_MASK,4,4
	.comm	PVR0_USE_FPU_MASK,4,4
	.comm	PVR0_USE_DIV_MASK,4,4
	.comm	PVR0_USE_BARREL_MASK,4,4
	.comm	PAGE_SIZE,4,4
	.comm	HZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
