	.file	"extr_i386.c_ix86_expand_int_movcc.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	ix86_expand_int_movcc
	.type	ix86_expand_int_movcc, @function
ix86_expand_int_movcc:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 72
	.cfi_def_cfa_offset 128
	mov	rdi, QWORD PTR 8[rdi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 56[rsp], rax
	xor	eax, eax
	call	GET_CODE@PLT
	mov	rdi, QWORD PTR 0[rbp]
	mov	r12, rax
	call	GET_MODE@PLT
	mov	r15d, r12d
	mov	rbx, rax
	xor	eax, eax
	call	start_sequence@PLT
	lea	rdx, 48[rsp]
	lea	rsi, 40[rsp]
	mov	edi, r12d
	call	ix86_expand_compare@PLT
	mov	QWORD PTR 32[rsp], rax
	xor	eax, eax
	call	get_insns@PLT
	mov	r13, rax
	xor	eax, eax
	call	end_sequence@PLT
	mov	rdi, QWORD PTR 32[rsp]
	call	GET_CODE@PLT
	mov	QWORD PTR [rsp], rax
	mov	rax, QWORD PTR ix86_compare_op1[rip]
	cmp	rax, QWORD PTR const0_rtx[rip]
	je	.L170
	xor	r14d, r14d
	cmp	rax, QWORD PTR constm1_rtx[rip]
	je	.L171
.L3:
	cmp	DWORD PTR HImode[rip], ebx
	je	.L172
.L4:
	cmp	QWORD PTR TARGET_64BIT[rip], 0
	mov	eax, DWORD PTR DImode[rip]
	je	.L7
	mov	eax, DWORD PTR TImode[rip]
.L7:
	cmp	eax, ebx
	jne	.L173
.L5:
	mov	esi, DWORD PTR TARGET_CMOVE[rip]
	test	esi, esi
	jne	.L63
.L66:
	cmp	DWORD PTR BRANCH_COST[rip], 2
	jg	.L174
.L64:
	xor	eax, eax
.L1:
	mov	rcx, QWORD PTR 56[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L175
	add	rsp, 72
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L63:
	.cfi_restore_state
	cmp	DWORD PTR QImode[rip], ebx
	jne	.L53
.L55:
	cmp	QWORD PTR TARGET_PARTIAL_REG_STALL[rip], 0
	jne	.L66
.L53:
	mov	rdi, QWORD PTR 16[rbp]
	mov	esi, ebx
	call	nonimmediate_operand@PLT
	test	eax, eax
	je	.L176
.L71:
	mov	rdi, QWORD PTR 24[rbp]
	mov	esi, ebx
	call	nonimmediate_operand@PLT
	test	eax, eax
	je	.L177
.L72:
	cmp	QWORD PTR 48[rsp], 0
	jne	.L178
.L74:
	cmp	QWORD PTR 40[rsp], 0
	mov	rdi, QWORD PTR 16[rbp]
	jne	.L179
.L76:
	mov	esi, DWORD PTR VOIDmode[rip]
	call	register_operand@PLT
	test	eax, eax
	je	.L180
.L79:
	cmp	DWORD PTR QImode[rip], ebx
	je	.L181
.L84:
	mov	rdi, r13
	call	emit_insn@PLT
	mov	rcx, QWORD PTR 24[rbp]
	mov	rdx, QWORD PTR 16[rbp]
	mov	edi, ebx
	mov	rsi, QWORD PTR 32[rsp]
	call	gen_rtx_IF_THEN_ELSE@PLT
	mov	rsi, QWORD PTR 0[rbp]
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rdx, rax
	call	gen_rtx_SET@PLT
	mov	rdi, rax
	call	emit_insn@PLT
	cmp	QWORD PTR 48[rsp], 0
	jne	.L182
.L86:
	cmp	QWORD PTR 40[rsp], 0
	jne	.L183
.L163:
	mov	eax, 1
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L173:
	mov	rdi, QWORD PTR 16[rbp]
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR CONST_INT[rip]
	jne	.L5
	mov	rdi, QWORD PTR 24[rbp]
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR CONST_INT[rip]
	jne	.L5
	mov	rax, QWORD PTR 0[rbp]
	mov	rdi, QWORD PTR 16[rbp]
	mov	DWORD PTR 28[rsp], r12d
	mov	QWORD PTR 16[rsp], rax
	call	INTVAL@PLT
	mov	rdi, QWORD PTR 24[rbp]
	mov	DWORD PTR 8[rsp], eax
	call	INTVAL@PLT
	mov	ecx, DWORD PTR 8[rsp]
	mov	DWORD PTR 12[rsp], eax
	sub	ecx, eax
	mov	DWORD PTR 24[rsp], ecx
	test	r14d, r14d
	jne	.L8
	mov	rdx, QWORD PTR ix86_compare_op1[rip]
	mov	rsi, QWORD PTR ix86_compare_op0[rip]
	lea	rcx, 32[rsp]
	mov	edi, r12d
	call	ix86_expand_carry_flag_compare@PLT
	test	rax, rax
	jne	.L184
	mov	r15d, DWORD PTR 24[rsp]
	mov	rdi, QWORD PTR ix86_compare_op0[rip]
	test	r15d, r15d
	js	.L185
.L30:
	mov	r12d, DWORD PTR UNKNOWN[rip]
	call	GET_MODE@PLT
	mov	rdi, rax
	call	GET_MODE_CLASS@PLT
	cmp	rax, QWORD PTR MODE_INT[rip]
	je	.L186
.L32:
	mov	eax, DWORD PTR 24[rsp]
	cmp	DWORD PTR UNKNOWN[rip], r12d
	lea	r15d, -1[rax]
	je	.L35
	mov	rdi, QWORD PTR ix86_compare_op0[rip]
	call	GET_MODE@PLT
	mov	rdi, QWORD PTR 16[rsp]
	mov	QWORD PTR [rsp], rax
	call	GET_MODE@PLT
	cmp	QWORD PTR [rsp], rax
	je	.L187
.L35:
	cmp	r15d, 4
	jbe	.L42
	mov	eax, DWORD PTR 24[rsp]
	sub	eax, 8
	cmp	eax, 1
	jbe	.L42
.L43:
	mov	ecx, DWORD PTR TARGET_CMOVE[rip]
	test	ecx, ecx
	je	.L52
	cmp	DWORD PTR QImode[rip], ebx
	jne	.L53
	cmp	QWORD PTR TARGET_PARTIAL_REG_STALL[rip], 0
	je	.L55
	cmp	DWORD PTR BRANCH_COST[rip], 1
	jle	.L55
.L90:
	cmp	DWORD PTR 12[rsp], 0
	je	.L188
	mov	eax, DWORD PTR 12[rsp]
	mov	ecx, DWORD PTR 8[rsp]
	mov	DWORD PTR 8[rsp], eax
	mov	DWORD PTR 12[rsp], ecx
.L56:
	cmp	DWORD PTR UNKNOWN[rip], r12d
	je	.L58
	cmp	DWORD PTR GE[rip], r12d
	je	.L102
	cmp	DWORD PTR 8[rsp], 0
	je	.L102
.L59:
	push	rax
	.cfi_def_cfa_offset 136
	mov	rcx, QWORD PTR ix86_compare_op1[rip]
	xor	r9d, r9d
	mov	rdx, QWORD PTR ix86_compare_op0[rip]
	mov	r8d, DWORD PTR VOIDmode[rip]
	push	-1
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR 44[rsp]
	mov	rdi, QWORD PTR 32[rsp]
	call	emit_store_flag@PLT
	mov	r12, rax
	pop	rax
	.cfi_def_cfa_offset 136
	pop	rdx
	.cfi_def_cfa_offset 128
	mov	eax, DWORD PTR 12[rsp]
	mov	ecx, DWORD PTR 8[rsp]
	mov	DWORD PTR 8[rsp], eax
	mov	DWORD PTR 12[rsp], ecx
.L61:
	mov	rdi, r12
	mov	r15d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	esi, ebx
	sub	edi, DWORD PTR 12[rsp]
	mov	r14, rax
	call	gen_int_mode@PLT
	mov	rdi, r12
	mov	r13, rax
	call	copy_rtx@PLT
	mov	esi, DWORD PTR AND[rip]
	mov	rcx, r13
	mov	edi, ebx
	push	r10
	.cfi_def_cfa_offset 136
	mov	rdx, rax
	mov	r9d, 1
	mov	r8, r14
	push	r15
	.cfi_def_cfa_offset 144
	call	expand_simple_binop@PLT
	pop	r11
	.cfi_def_cfa_offset 136
	pop	r13
	.cfi_def_cfa_offset 128
	cmp	DWORD PTR 12[rsp], 0
	mov	r12, rax
	jne	.L189
.L62:
	mov	rsi, QWORD PTR 0[rbp]
	mov	rdi, r12
	call	rtx_equal_p@PLT
	test	eax, eax
	jne	.L163
	mov	rdi, r12
	call	copy_rtx@PLT
	mov	rdi, QWORD PTR 0[rbp]
	mov	rsi, rax
	call	emit_move_insn@PLT
	mov	eax, 1
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L174:
	mov	rdi, QWORD PTR 16[rbp]
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR CONST_INT[rip]
	je	.L190
	mov	rdi, QWORD PTR 24[rbp]
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR CONST_INT[rip]
	jne	.L64
	mov	rdi, QWORD PTR 24[rbp]
	mov	r13, QWORD PTR 16[rbp]
	call	INTVAL@PLT
	test	eax, eax
	jne	.L70
	mov	rax, QWORD PTR constm1_rtx[rip]
	cmp	QWORD PTR 16[rbp], rax
	je	.L70
	mov	QWORD PTR 16[rbp], rax
	mov	r15d, DWORD PTR and_optab[rip]
	jmp	.L69
	.p2align 4,,10
	.p2align 3
.L172:
	cmp	QWORD PTR TARGET_FAST_PREFIX[rip], 0
	jne	.L4
	mov	esi, DWORD PTR TARGET_CMOVE[rip]
	test	esi, esi
	je	.L66
	jmp	.L63
	.p2align 4,,10
	.p2align 3
.L170:
	cmp	r12d, DWORD PTR GE[rip]
	mov	r14d, 1
	je	.L3
	cmp	r12d, DWORD PTR LT[rip]
	je	.L3
	xor	r14d, r14d
	cmp	rax, QWORD PTR constm1_rtx[rip]
	jne	.L3
	.p2align 4,,10
	.p2align 3
.L171:
	cmp	r12d, DWORD PTR GT[rip]
	mov	r14d, 1
	je	.L3
	xor	r14d, r14d
	cmp	DWORD PTR LE[rip], r12d
	sete	r14b
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L180:
	cmp	DWORD PTR QImode[rip], ebx
	je	.L81
	mov	rdi, QWORD PTR 24[rbp]
	mov	esi, DWORD PTR VOIDmode[rip]
	call	register_operand@PLT
	test	eax, eax
	jne	.L79
.L81:
	mov	rsi, QWORD PTR 16[rbp]
	mov	edi, ebx
	call	force_reg@PLT
	mov	QWORD PTR 16[rbp], rax
	jmp	.L79
	.p2align 4,,10
	.p2align 3
.L190:
	mov	rdi, QWORD PTR 16[rbp]
	mov	r13, QWORD PTR 24[rbp]
	call	INTVAL@PLT
	test	eax, eax
	jne	.L68
	mov	rax, QWORD PTR constm1_rtx[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L68
	mov	QWORD PTR 24[rbp], rax
	mov	r15d, DWORD PTR and_optab[rip]
.L69:
	mov	edi, ebx
	mov	r14, QWORD PTR 0[rbp]
	call	gen_reg_rtx@PLT
	mov	rdi, rbp
	mov	QWORD PTR 0[rbp], rax
	mov	r12, rax
	call	ix86_expand_int_movcc
	test	eax, eax
	je	.L64
	mov	eax, DWORD PTR OPTAB_WIDEN[rip]
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	rcx, r12
	mov	rdx, r13
	xor	r9d, r9d
	mov	r8, r14
	mov	esi, r15d
	mov	edi, ebx
	push	rax
	.cfi_def_cfa_offset 144
	call	expand_binop@PLT
	mov	rsi, r14
	mov	rdi, rax
	mov	rbp, rax
	call	rtx_equal_p@PLT
	pop	rdx
	.cfi_def_cfa_offset 136
	pop	rcx
	.cfi_def_cfa_offset 128
	test	eax, eax
	jne	.L163
	mov	rdi, rbp
	call	copy_rtx@PLT
	mov	rdi, r14
	mov	rbp, rax
.L164:
	call	copy_rtx@PLT
	mov	rsi, rbp
	mov	rdi, rax
.L165:
	call	emit_move_insn@PLT
	jmp	.L163
	.p2align 4,,10
	.p2align 3
.L68:
	mov	rdi, QWORD PTR 16[rbp]
	call	INTVAL@PLT
	cmp	eax, -1
	jne	.L64
	mov	rax, QWORD PTR const0_rtx[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L64
	mov	QWORD PTR 24[rbp], rax
	mov	r15d, DWORD PTR ior_optab[rip]
	jmp	.L69
	.p2align 4,,10
	.p2align 3
.L183:
	mov	rdi, QWORD PTR 0[rbp]
	call	copy_rtx@PLT
	mov	rdi, QWORD PTR 16[rbp]
	mov	r12, rax
	call	copy_rtx@PLT
	mov	rsi, QWORD PTR 40[rsp]
	mov	rcx, r12
	mov	edi, ebx
	mov	rdx, rax
	call	gen_rtx_IF_THEN_ELSE@PLT
	mov	rdi, QWORD PTR 0[rbp]
	mov	r12, rax
	call	copy_rtx@PLT
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rdx, r12
	mov	rsi, rax
	call	gen_rtx_SET@PLT
	mov	rdi, rax
	call	emit_insn@PLT
	mov	eax, 1
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L182:
	mov	rdi, QWORD PTR 0[rbp]
	call	copy_rtx@PLT
	mov	rdi, QWORD PTR 24[rbp]
	mov	r12, rax
	call	copy_rtx@PLT
	mov	rsi, QWORD PTR 48[rsp]
	mov	rcx, r12
	mov	edi, ebx
	mov	rdx, rax
	call	gen_rtx_IF_THEN_ELSE@PLT
	mov	rdi, QWORD PTR 0[rbp]
	mov	r12, rax
	call	copy_rtx@PLT
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rdx, r12
	mov	rsi, rax
	call	gen_rtx_SET@PLT
	mov	rdi, rax
	call	emit_insn@PLT
	jmp	.L86
	.p2align 4,,10
	.p2align 3
.L179:
	mov	rsi, rdi
	mov	rdi, QWORD PTR 0[rbp]
	call	reg_overlap_mentioned_p@PLT
	test	rax, rax
	jne	.L77
	mov	rdi, QWORD PTR 16[rbp]
	jmp	.L76
	.p2align 4,,10
	.p2align 3
.L178:
	mov	rsi, QWORD PTR 24[rbp]
	mov	rdi, QWORD PTR 0[rbp]
	call	reg_overlap_mentioned_p@PLT
	test	rax, rax
	je	.L74
	mov	edi, ebx
	call	gen_reg_rtx@PLT
	mov	rsi, QWORD PTR 24[rbp]
	mov	r12, rax
	mov	rdi, rax
	call	emit_move_insn@PLT
	mov	QWORD PTR 24[rbp], r12
	jmp	.L74
	.p2align 4,,10
	.p2align 3
.L177:
	mov	rsi, QWORD PTR 24[rbp]
	mov	edi, ebx
	call	force_reg@PLT
	mov	QWORD PTR 24[rbp], rax
	jmp	.L72
	.p2align 4,,10
	.p2align 3
.L176:
	mov	rsi, QWORD PTR 16[rbp]
	mov	edi, ebx
	call	force_reg@PLT
	mov	QWORD PTR 16[rbp], rax
	jmp	.L71
	.p2align 4,,10
	.p2align 3
.L181:
	mov	rdi, QWORD PTR 24[rbp]
	mov	esi, DWORD PTR VOIDmode[rip]
	call	register_operand@PLT
	test	eax, eax
	jne	.L84
	mov	rsi, QWORD PTR 24[rbp]
	mov	edi, ebx
	call	force_reg@PLT
	mov	QWORD PTR 24[rbp], rax
	jmp	.L84
	.p2align 4,,10
	.p2align 3
.L70:
	mov	rdi, QWORD PTR 24[rbp]
	call	INTVAL@PLT
	cmp	eax, -1
	jne	.L64
	mov	rax, QWORD PTR const0_rtx[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L64
	mov	QWORD PTR 16[rbp], rax
	mov	r15d, DWORD PTR ior_optab[rip]
	jmp	.L69
	.p2align 4,,10
	.p2align 3
.L77:
	mov	edi, ebx
	call	gen_reg_rtx@PLT
	mov	rsi, QWORD PTR 16[rbp]
	mov	rdi, rax
	mov	QWORD PTR [rsp], rax
	call	emit_move_insn@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	QWORD PTR 16[rbp], rdi
	jmp	.L76
.L8:
	cmp	r12d, DWORD PTR GT[rip]
	je	.L87
	cmp	r12d, DWORD PTR GE[rip]
	je	.L87
	mov	eax, DWORD PTR 12[rsp]
	sub	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 24[rsp], eax
.L22:
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	esi, r15d
	xor	r9d, r9d
	mov	r8d, DWORD PTR VOIDmode[rip]
	mov	rcx, QWORD PTR ix86_compare_op1[rip]
	mov	rdx, QWORD PTR ix86_compare_op0[rip]
	push	-1
	.cfi_def_cfa_offset 144
	mov	rdi, QWORD PTR 32[rsp]
	call	emit_store_flag@PLT
	pop	r14
	.cfi_def_cfa_offset 136
	pop	r15
	.cfi_def_cfa_offset 128
	mov	rbp, rax
.L20:
	cmp	DWORD PTR 24[rsp], 1
	je	.L191
	cmp	DWORD PTR 8[rsp], -1
	je	.L192
	cmp	DWORD PTR 24[rsp], -1
	jne	.L26
	mov	r11d, DWORD PTR 12[rsp]
	test	r11d, r11d
	je	.L26
	mov	rdi, rbp
	call	copy_rtx@PLT
	mov	esi, DWORD PTR NOT[rip]
	mov	rdx, rbp
	mov	edi, ebx
	mov	rcx, rax
	mov	r8d, 1
	call	expand_simple_unop@PLT
	mov	r10d, DWORD PTR 8[rsp]
	mov	rbp, rax
	test	r10d, r10d
	jne	.L193
	.p2align 4,,10
	.p2align 3
.L24:
	mov	rsi, QWORD PTR 16[rsp]
	mov	rdi, rbp
	call	rtx_equal_p@PLT
	test	eax, eax
	jne	.L163
	mov	rdi, rbp
	call	copy_rtx@PLT
	mov	rdi, QWORD PTR 16[rsp]
	mov	rbp, rax
	jmp	.L164
.L42:
	cmp	DWORD PTR QImode[rip], ebx
	je	.L44
	cmp	DWORD PTR HImode[rip], ebx
	je	.L44
.L45:
	cmp	DWORD PTR DImode[rip], ebx
	mov	r15d, DWORD PTR VOIDmode[rip]
	jne	.L46
	mov	edi, DWORD PTR 12[rsp]
	call	GEN_INT@PLT
	mov	esi, r15d
	mov	rdi, rax
	call	x86_64_immediate_operand@PLT
	test	rax, rax
	je	.L43
	mov	r15d, DWORD PTR VOIDmode[rip]
.L46:
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	rcx, QWORD PTR ix86_compare_op1[rip]
	xor	r9d, r9d
	mov	r8d, r15d
	push	1
	.cfi_def_cfa_offset 144
	mov	rdx, QWORD PTR ix86_compare_op0[rip]
	mov	esi, DWORD PTR 44[rsp]
	mov	rdi, QWORD PTR 32[rsp]
	call	emit_store_flag@PLT
	pop	rdi
	.cfi_def_cfa_offset 136
	pop	r8
	.cfi_def_cfa_offset 128
	cmp	DWORD PTR 24[rsp], 1
	mov	r12, rax
	mov	rdi, rax
	je	.L194
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 24[rsp]
	mov	r14d, 1
	mov	r15, rax
	and	edi, -2
	call	GEN_INT@PLT
	mov	rsi, r15
	mov	edi, ebx
	mov	rdx, rax
	call	gen_rtx_MULT@PLT
	mov	r13, rax
	test	BYTE PTR 24[rsp], 1
	jne	.L195
.L48:
	mov	esi, DWORD PTR 12[rsp]
	test	esi, esi
	jne	.L196
.L49:
	mov	rsi, r12
	mov	rdi, r13
	call	rtx_equal_p@PLT
	test	eax, eax
	jne	.L62
	cmp	r14d, 1
	je	.L197
	mov	rdi, r13
	call	copy_rtx@PLT
	mov	rdi, r12
	mov	r13, rax
	call	copy_rtx@PLT
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rdx, r13
	mov	rsi, rax
	call	gen_rtx_SET@PLT
	mov	rdi, rax
	call	emit_insn@PLT
	jmp	.L62
.L26:
	mov	r9d, DWORD PTR 8[rsp]
	test	r9d, r9d
	je	.L198
	mov	rdi, rbp
	mov	r14d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	r15d, DWORD PTR 12[rsp]
	mov	esi, ebx
	mov	r13, rax
	sub	edi, r15d
	call	gen_int_mode@PLT
	mov	rdi, rbp
	mov	r12, rax
	call	copy_rtx@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	rcx, r12
	mov	r8, r13
	push	r14
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR AND[rip]
	mov	rdx, rax
	mov	edi, ebx
	mov	r9d, 1
	call	expand_simple_binop@PLT
	pop	rcx
	.cfi_def_cfa_offset 136
	pop	rsi
	.cfi_def_cfa_offset 128
	mov	rbp, rax
	test	r15d, r15d
	je	.L24
	mov	rdi, rax
	mov	r14d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, r15d
	mov	r13, rax
.L162:
	call	GEN_INT@PLT
	mov	rdi, rbp
	mov	r12, rax
	call	copy_rtx@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	r8, r13
	mov	rcx, r12
	push	r14
	.cfi_def_cfa_offset 144
	mov	rdx, rax
	mov	r9d, 1
.L161:
	mov	esi, DWORD PTR PLUS[rip]
	mov	edi, ebx
	call	expand_simple_binop@PLT
	mov	rbp, rax
	pop	rax
	.cfi_def_cfa_offset 136
	pop	rdx
	.cfi_def_cfa_offset 128
	jmp	.L24
.L191:
	mov	r13d, DWORD PTR 12[rsp]
	test	r13d, r13d
	je	.L24
	mov	rdi, rbp
	mov	r13d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 12[rsp]
	mov	r12, rax
	call	GEN_INT@PLT
	sub	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 136
	mov	r8, r12
	mov	rdx, rbp
	push	r13
	.cfi_def_cfa_offset 144
	mov	rcx, rax
	mov	r9d, 1
	jmp	.L161
.L184:
	.cfi_restore_state
	mov	rdi, QWORD PTR 32[rsp]
	call	GET_CODE@PLT
	mov	rdi, QWORD PTR 32[rsp]
	xor	esi, esi
	mov	rbp, rax
	call	XEXP@PLT
	mov	rdi, rax
	call	GET_MODE@PLT
	cmp	rax, QWORD PTR CCFPmode[rip]
	je	.L11
	mov	rdi, QWORD PTR 32[rsp]
	xor	esi, esi
	call	XEXP@PLT
	mov	rdi, rax
	call	GET_MODE@PLT
	cmp	rax, QWORD PTR CCFPUmode[rip]
	je	.L11
	cmp	DWORD PTR LTU[rip], ebp
	mov	edi, ebp
	je	.L13
	mov	rdi, QWORD PTR 32[rsp]
	call	GET_CODE@PLT
	mov	rdi, rax
	call	reverse_condition@PLT
.L160:
	mov	rdi, QWORD PTR 32[rsp]
	mov	esi, eax
	call	PUT_CODE@PLT
	mov	eax, DWORD PTR 12[rsp]
	mov	ecx, DWORD PTR 8[rsp]
	mov	DWORD PTR 8[rsp], eax
	mov	DWORD PTR 12[rsp], ecx
.L15:
	mov	rsi, QWORD PTR ix86_compare_op0[rip]
	mov	rdi, QWORD PTR 16[rsp]
	call	reg_overlap_mentioned_p@PLT
	test	rax, rax
	jne	.L18
	mov	rbp, QWORD PTR 16[rsp]
	mov	rsi, QWORD PTR ix86_compare_op1[rip]
	mov	rdi, rbp
	call	reg_overlap_mentioned_p@PLT
	test	rax, rax
	je	.L17
.L18:
	mov	edi, ebx
	call	gen_reg_rtx@PLT
	mov	rbp, rax
.L17:
	cmp	DWORD PTR DImode[rip], ebx
	mov	r12, QWORD PTR 32[rsp]
	je	.L199
	mov	edi, DWORD PTR SImode[rip]
	mov	rsi, rbp
	call	gen_lowpart@PLT
	mov	rsi, r12
	mov	edi, eax
	call	gen_x86_movsicc_0_m1@PLT
	mov	rdi, rax
	call	emit_insn@PLT
	jmp	.L20
.L87:
	mov	edi, r12d
	call	reverse_condition@PLT
	mov	ecx, DWORD PTR 8[rsp]
	mov	r15d, eax
	mov	eax, DWORD PTR 12[rsp]
	mov	DWORD PTR 12[rsp], ecx
	mov	DWORD PTR 8[rsp], eax
	jmp	.L22
.L44:
	cmp	QWORD PTR TARGET_PARTIAL_REG_STALL[rip], 0
	jne	.L43
	jmp	.L45
.L11:
	mov	edi, ebp
	call	ix86_fp_compare_code_to_integer@PLT
	cmp	eax, DWORD PTR LTU[rip]
	je	.L200
	mov	rdi, QWORD PTR 32[rsp]
	call	GET_CODE@PLT
	mov	rdi, rax
	call	reverse_condition_maybe_unordered@PLT
	jmp	.L160
.L192:
	mov	rdi, rbp
	mov	r13d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 12[rsp]
	mov	r12, rax
	call	GEN_INT@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	r8, r12
	mov	rdx, rbp
	push	r13
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR IOR[rip]
	mov	edi, ebx
	mov	rcx, rax
	mov	r9d, 1
	call	expand_simple_binop@PLT
	pop	rbx
	.cfi_def_cfa_offset 136
	pop	r12
	.cfi_def_cfa_offset 128
	mov	rbp, rax
	jmp	.L24
.L52:
	cmp	DWORD PTR BRANCH_COST[rip], 1
	jle	.L66
	jmp	.L90
.L185:
	mov	r15d, DWORD PTR 12[rsp]
	mov	ecx, r15d
	sub	ecx, DWORD PTR 8[rsp]
	mov	DWORD PTR 24[rsp], ecx
	call	GET_MODE@PLT
	mov	rdi, rax
	call	FLOAT_MODE_P@PLT
	mov	edi, DWORD PTR [rsp]
	test	rax, rax
	je	.L31
	call	reverse_condition_maybe_unordered@PLT
	mov	edi, r12d
	call	reverse_condition_maybe_unordered@PLT
	mov	rdi, QWORD PTR ix86_compare_op0[rip]
	mov	DWORD PTR 28[rsp], eax
	mov	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 8[rsp], r15d
	mov	DWORD PTR 12[rsp], eax
	jmp	.L30
.L198:
	mov	rdi, rbp
	call	copy_rtx@PLT
	mov	esi, DWORD PTR NOT[rip]
	mov	rdx, rbp
	mov	edi, ebx
	mov	rcx, rax
	mov	r8d, 1
	call	expand_simple_unop@PLT
	mov	r14d, DWORD PTR OPTAB_DIRECT[rip]
	mov	rdi, rax
	mov	rbp, rax
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 12[rsp]
	mov	esi, ebx
	mov	r13, rax
	call	gen_int_mode@PLT
	mov	rdi, rbp
	mov	r12, rax
	call	copy_rtx@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	r8, r13
	mov	edi, ebx
	push	r14
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR AND[rip]
	mov	rdx, rax
	mov	rcx, r12
	mov	r9d, 1
	call	expand_simple_binop@PLT
	pop	rdi
	.cfi_def_cfa_offset 136
	pop	r8
	.cfi_def_cfa_offset 128
	mov	rbp, rax
	jmp	.L24
.L199:
	mov	rdi, rbp
	mov	rsi, r12
	call	gen_x86_movdicc_0_m1_rex64@PLT
	mov	rdi, rax
	call	emit_insn@PLT
	jmp	.L20
.L186:
	mov	rdi, QWORD PTR ix86_compare_op1[rip]
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR CONST_INT[rip]
	jne	.L32
	mov	rax, QWORD PTR ix86_compare_op1[rip]
	cmp	rax, QWORD PTR const0_rtx[rip]
	je	.L201
.L33:
	cmp	rax, QWORD PTR constm1_rtx[rip]
	jne	.L32
	mov	eax, DWORD PTR 28[rsp]
	cmp	DWORD PTR LE[rip], eax
	je	.L202
	mov	eax, DWORD PTR 28[rsp]
	cmp	DWORD PTR GT[rip], eax
	jne	.L32
	mov	r12d, DWORD PTR GE[rip]
	jmp	.L32
.L187:
	cmp	DWORD PTR 12[rsp], -1
	sete	al
	cmp	DWORD PTR 8[rsp], -1
	sete	dl
	test	al, al
	jne	.L100
	test	dl, dl
	je	.L35
.L100:
	cmp	r15d, 4
	jbe	.L37
	mov	ecx, DWORD PTR 24[rsp]
	sub	ecx, 8
	cmp	ecx, 1
	jbe	.L37
.L38:
	mov	r15d, DWORD PTR 8[rsp]
	cmp	r15d, -1
	je	.L39
	mov	edi, DWORD PTR 28[rsp]
	call	reverse_condition@PLT
	mov	DWORD PTR 12[rsp], r15d
	mov	DWORD PTR 28[rsp], eax
.L39:
	mov	r8d, DWORD PTR VOIDmode[rip]
	mov	rcx, QWORD PTR ix86_compare_op1[rip]
	push	r9
	.cfi_def_cfa_offset 136
	xor	r9d, r9d
	push	-1
	.cfi_def_cfa_offset 144
	mov	rdx, QWORD PTR ix86_compare_op0[rip]
	mov	esi, DWORD PTR 44[rsp]
	mov	rdi, QWORD PTR 32[rsp]
	call	emit_store_flag@PLT
	mov	edi, DWORD PTR 28[rsp]
	mov	r13d, DWORD PTR OPTAB_DIRECT[rip]
	mov	r12, rax
	call	GEN_INT@PLT
	mov	esi, DWORD PTR IOR[rip]
	mov	edi, ebx
	mov	r8, r12
	mov	rcx, rax
	mov	r9d, 1
	mov	rdx, r12
	mov	DWORD PTR [rsp], r13d
	call	expand_simple_binop@PLT
	mov	rdi, QWORD PTR 0[rbp]
	pop	r10
	.cfi_def_cfa_offset 136
	mov	rsi, rax
	pop	r11
	.cfi_def_cfa_offset 128
	cmp	rdi, rax
	je	.L163
	jmp	.L165
.L200:
	mov	edi, eax
.L13:
	call	reverse_condition@PLT
	mov	edi, r12d
	call	reverse_condition@PLT
	mov	eax, DWORD PTR 12[rsp]
	sub	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 24[rsp], eax
	jmp	.L15
.L194:
	call	copy_rtx@PLT
	mov	r13, rax
	jmp	.L48
.L31:
	call	reverse_condition@PLT
	mov	edi, r12d
	call	reverse_condition@PLT
	mov	ecx, DWORD PTR 12[rsp]
	mov	rdi, QWORD PTR ix86_compare_op0[rip]
	mov	DWORD PTR 28[rsp], eax
	mov	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 8[rsp], ecx
	mov	DWORD PTR 12[rsp], eax
	jmp	.L30
.L196:
	mov	edi, DWORD PTR 12[rsp]
	add	r14d, 1
	call	GEN_INT@PLT
	mov	rsi, r13
	mov	edi, ebx
	mov	rdx, rax
	call	gen_rtx_PLUS@PLT
	mov	r13, rax
	jmp	.L49
.L193:
	mov	rdi, rax
	mov	r14d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	r13, rax
	jmp	.L162
.L195:
	mov	rdx, r15
	mov	rsi, rax
	mov	edi, ebx
	mov	r14d, 2
	call	gen_rtx_PLUS@PLT
	mov	r13, rax
	jmp	.L48
.L37:
	cmp	DWORD PTR LT[rip], r12d
	jne	.L101
	test	dl, dl
	jne	.L39
.L101:
	cmp	DWORD PTR GE[rip], r12d
	jne	.L35
	test	al, al
	je	.L35
	jmp	.L38
.L175:
	call	__stack_chk_fail@PLT
.L197:
	mov	rdi, r12
	call	copy_rtx@PLT
	mov	rdi, r13
	mov	rsi, rax
	call	force_operand@PLT
	mov	r12, rax
	jmp	.L62
.L102:
	mov	edi, DWORD PTR 28[rsp]
	call	reverse_condition@PLT
	mov	ecx, DWORD PTR 12[rsp]
	mov	DWORD PTR 28[rsp], eax
	mov	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 8[rsp], ecx
	mov	DWORD PTR 12[rsp], eax
	jmp	.L59
.L189:
	mov	rdi, rax
	mov	r15d, DWORD PTR OPTAB_DIRECT[rip]
	call	copy_rtx@PLT
	mov	edi, DWORD PTR 12[rsp]
	mov	r14, rax
	call	GEN_INT@PLT
	mov	rdi, r12
	mov	r13, rax
	call	copy_rtx@PLT
	mov	esi, DWORD PTR PLUS[rip]
	mov	r8, r14
	mov	rcx, r13
	push	rdi
	.cfi_def_cfa_offset 136
	mov	r9d, 1
	mov	rdx, rax
	mov	edi, ebx
	push	r15
	.cfi_def_cfa_offset 144
	call	expand_simple_binop@PLT
	pop	r8
	.cfi_def_cfa_offset 136
	pop	r9
	.cfi_def_cfa_offset 128
	mov	r12, rax
	jmp	.L62
.L188:
	mov	rdi, QWORD PTR ix86_compare_op0[rip]
	call	GET_MODE@PLT
	mov	rdi, rax
	call	FLOAT_MODE_P@PLT
	mov	edi, DWORD PTR 28[rsp]
	test	rax, rax
	je	.L57
	call	reverse_condition_maybe_unordered@PLT
	mov	DWORD PTR 28[rsp], eax
	jmp	.L56
.L58:
	push	r14
	.cfi_def_cfa_offset 136
	mov	r8d, DWORD PTR VOIDmode[rip]
	xor	r9d, r9d
	mov	rcx, QWORD PTR ix86_compare_op1[rip]
	mov	rdx, QWORD PTR ix86_compare_op0[rip]
	push	1
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR 44[rsp]
	mov	rdi, QWORD PTR 32[rsp]
	call	emit_store_flag@PLT
	mov	r15d, DWORD PTR OPTAB_DIRECT[rip]
	mov	r12, rax
	mov	rdi, rax
	call	copy_rtx@PLT
	mov	rdi, r12
	mov	r14, QWORD PTR constm1_rtx[rip]
	mov	r13, rax
	call	copy_rtx@PLT
	mov	esi, DWORD PTR PLUS[rip]
	mov	r8, r13
	mov	edi, ebx
	mov	rdx, rax
	mov	r9d, 1
	mov	rcx, r14
	mov	DWORD PTR [rsp], r15d
	call	expand_simple_binop@PLT
	pop	r15
	.cfi_def_cfa_offset 136
	mov	r12, rax
	pop	rax
	.cfi_def_cfa_offset 128
	jmp	.L61
.L57:
	call	reverse_condition@PLT
	cmp	DWORD PTR UNKNOWN[rip], r12d
	mov	DWORD PTR 28[rsp], eax
	je	.L58
	mov	edi, r12d
	call	reverse_condition@PLT
	mov	r12d, eax
	jmp	.L56
.L201:
	mov	ecx, DWORD PTR 28[rsp]
	cmp	DWORD PTR LT[rip], ecx
	je	.L97
	cmp	DWORD PTR GE[rip], ecx
	jne	.L33
.L97:
	mov	r12d, DWORD PTR 28[rsp]
	jmp	.L32
.L202:
	mov	r12d, DWORD PTR LT[rip]
	jmp	.L32
	.cfi_endproc
.LFE0:
	.size	ix86_expand_int_movcc, .-ix86_expand_int_movcc
	.comm	ix86_compare_op1,8,8
	.comm	ix86_compare_op0,8,8
	.comm	ior_optab,4,4
	.comm	constm1_rtx,8,8
	.comm	const0_rtx,8,8
	.comm	and_optab,4,4
	.comm	VOIDmode,4,4
	.comm	UNKNOWN,4,4
	.comm	TImode,4,4
	.comm	TARGET_PARTIAL_REG_STALL,8,8
	.comm	TARGET_FAST_PREFIX,8,8
	.comm	TARGET_CMOVE,4,4
	.comm	TARGET_64BIT,8,8
	.comm	SImode,4,4
	.comm	QImode,4,4
	.comm	PLUS,4,4
	.comm	OPTAB_WIDEN,4,4
	.comm	OPTAB_DIRECT,4,4
	.comm	NOT,4,4
	.comm	MODE_INT,8,8
	.comm	LTU,4,4
	.comm	LT,4,4
	.comm	LE,4,4
	.comm	IOR,4,4
	.comm	HImode,4,4
	.comm	GT,4,4
	.comm	GE,4,4
	.comm	DImode,4,4
	.comm	CONST_INT,8,8
	.comm	CCFPmode,8,8
	.comm	CCFPUmode,8,8
	.comm	BRANCH_COST,4,4
	.comm	AND,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_i386.c_ix86_expand_int_movcc.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	ix86_expand_int_movcc
	.syntax unified
	.arm
	.fpu softvfp
	.type	ix86_expand_int_movcc, %function
ix86_expand_int_movcc:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L194
	sub	sp, sp, #68
	mov	r4, r0
	ldr	r0, [r0, #4]
	ldr	r3, [r3]
	str	r3, [sp, #60]
	mov	r3,#0
	bl	GET_CODE
	mov	r6, r0
	ldr	r0, [r4]
	bl	GET_MODE
	mov	r5, r0
	bl	start_sequence
	add	r2, sp, #56
	add	r1, sp, #52
	mov	r0, r6
	bl	ix86_expand_compare
	str	r0, [sp, #48]
	bl	get_insns
	mov	r10, r0
	bl	end_sequence
	ldr	r0, [sp, #48]
	bl	GET_CODE
	ldr	fp, .L194+4
	ldr	r8, .L194+8
	ldr	r3, [fp]
	ldr	r2, [r8]
	str	r0, [sp, #20]
	cmp	r3, r2
	beq	.L162
.L2:
	ldr	r2, .L194+116
	ldr	r2, [r2]
	cmp	r3, r2
	movne	r3, #0
	strne	r3, [sp, #16]
	beq	.L163
.L3:
	ldr	r9, .L194+12
	ldr	r3, [r9]
	cmp	r5, r3
	beq	.L164
.L4:
	ldr	r3, .L194+16
	ldr	r3, [r3]
	cmp	r3, #0
	ldrne	r3, .L194+20
	ldreq	r3, .L194+24
	ldr	r3, [r3]
	cmp	r3, r5
	bne	.L165
.L5:
	ldr	r3, .L194+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L62
.L155:
	ldr	r3, .L194+32
.L65:
	ldr	r3, [r3]
	cmp	r3, #2
	bgt	.L166
.L63:
	mov	r0, #0
.L1:
	ldr	r3, .L194
	ldr	r2, [r3]
	ldr	r3, [sp, #60]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L167
	add	sp, sp, #68
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L62:
	ldr	r7, .L194+36
	ldr	r3, [r7]
	cmp	r5, r3
	bne	.L53
	ldr	r2, .L194+40
.L55:
	ldr	r3, [r2]
	cmp	r3, #0
	bne	.L155
.L53:
	mov	r1, r5
	ldr	r0, [r4, #8]
	bl	nonimmediate_operand
	cmp	r0, #0
	beq	.L168
.L70:
	mov	r1, r5
	ldr	r0, [r4, #12]
	bl	nonimmediate_operand
	cmp	r0, #0
	beq	.L169
.L71:
	ldr	r3, [sp, #56]
	cmp	r3, #0
	bne	.L170
.L73:
	ldr	r3, [sp, #52]
	ldr	r8, [r4, #8]
	cmp	r3, #0
	bne	.L171
.L75:
	ldr	r6, .L194+104
	mov	r0, r8
	ldr	r1, [r6]
	bl	register_operand
	cmp	r0, #0
	beq	.L172
.L78:
	ldr	r3, [r7]
	cmp	r5, r3
	beq	.L173
.L83:
	mov	r0, r10
	bl	emit_insn
	ldr	r3, [r4, #12]
	ldr	r2, [r4, #8]
	ldr	r1, [sp, #48]
	mov	r0, r5
	ldr	r7, [r6]
	ldr	r8, [r4]
	bl	gen_rtx_IF_THEN_ELSE
	mov	r1, r8
	mov	r2, r0
	mov	r0, r7
	bl	gen_rtx_SET
	bl	emit_insn
	ldr	r3, [sp, #56]
	cmp	r3, #0
	bne	.L174
.L85:
	ldr	r3, [sp, #52]
	cmp	r3, #0
	bne	.L175
.L156:
	mov	r0, #1
	b	.L1
.L165:
	ldr	r0, [r4, #8]
	bl	GET_CODE
	ldr	r7, .L194+44
	ldr	r3, [r7]
	cmp	r0, r3
	bne	.L5
	ldr	r0, [r4, #12]
	bl	GET_CODE
	ldr	r3, [r7]
	cmp	r0, r3
	bne	.L5
	ldr	r3, [r4]
	ldr	r0, [r4, #8]
	str	r3, [sp, #36]
	bl	INTVAL
	mov	r3, r0
	ldr	r0, [r4, #12]
	str	r3, [sp, #24]
	bl	INTVAL
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	cmp	r2, #0
	sub	r3, r3, r0
	str	r0, [sp, #28]
	str	r3, [sp, #32]
	mov	r0, r6
	str	r6, [sp, #40]
	bne	.L8
	ldr	r2, .L194+108
	add	r3, sp, #48
	ldr	r1, [r2]
	ldr	r2, [fp]
	bl	ix86_expand_carry_flag_compare
	subs	r3, r0, #0
	str	r3, [sp, #44]
	bne	.L176
	ldr	r3, [sp, #32]
	cmp	r3, #0
	ldr	r3, .L194+108
	ldr	r0, [r3]
	blt	.L177
.L30:
	ldr	r3, .L194+124
	ldr	r3, [r3]
	str	r3, [sp, #16]
	bl	GET_MODE
	bl	GET_MODE_CLASS
	ldr	r3, .L194+48
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L178
.L32:
	ldr	r2, [sp, #32]
	ldr	r3, .L194+124
	sub	r6, r2, #1
	ldr	r3, [r3]
	ldr	r2, [sp, #16]
	cmp	r3, r2
	beq	.L35
	ldr	r3, .L194+108
	ldr	r0, [r3]
	bl	GET_MODE
	mov	r7, r0
	ldr	r0, [sp, #36]
	bl	GET_MODE
	cmp	r7, r0
	beq	.L179
.L35:
	cmp	r6, #4
	bls	.L40
	ldr	r3, [sp, #32]
	sub	r3, r3, #8
	cmp	r3, #1
	bls	.L40
.L41:
	ldr	r3, .L194+28
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L52
	ldr	r7, .L194+36
	ldr	r3, [r7]
	cmp	r5, r3
	bne	.L53
	ldr	r2, .L194+40
	ldr	r3, [r2]
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L194+32
	ldr	r3, [r3]
	cmp	r3, #1
	ble	.L55
.L89:
	ldr	r3, [sp, #28]
	cmp	r3, #0
	beq	.L180
.L56:
	ldr	r3, .L194+124
	ldr	r2, [sp, #16]
	ldr	r3, [r3]
	cmp	r3, r2
	beq	.L58
	ldr	r3, .L194+128
	ldr	r6, [sp, #28]
	ldr	r3, [r3]
	cmp	r6, #0
	cmpne	r3, r2
	bne	.L59
	ldr	r0, [sp, #40]
	bl	reverse_condition
	ldr	r2, [sp, #24]
	str	r0, [sp, #40]
	str	r2, [sp, #28]
	str	r6, [sp, #24]
.L59:
	mvn	lr, #0
	mov	ip, #0
	ldr	r2, .L194+104
	ldr	r3, [fp]
	ldr	r6, [r2]
	ldr	r2, .L194+108
	ldr	r1, [sp, #40]
	ldr	r2, [r2]
	ldr	r0, [sp, #36]
	stm	sp, {r6, ip, lr}
	bl	emit_store_flag
	mov	r6, r0
	ldr	r3, [sp, #24]
	ldr	r2, [sp, #28]
	ldr	r7, .L194+120
	str	r2, [sp, #24]
	str	r3, [sp, #28]
.L60:
	ldr	r3, .L194+52
	mov	r0, r6
	ldr	r8, [r3]
	bl	copy_rtx
	ldr	r3, [sp, #28]
	ldr	fp, [sp, #24]
	mov	r1, r5
	mov	r10, r0
	sub	r0, r3, fp
	bl	gen_int_mode
	mov	r3, r0
	mov	r0, r6
	mov	r9, #1
	mov	r6, r3
	bl	copy_rtx
	ldr	ip, [r7]
	mov	r3, r6
	stm	sp, {r0, r9, ip}
	mov	r2, r10
	mov	r1, r8
	mov	r0, r5
	bl	expand_simple_binop
	cmp	fp, #0
	mov	r6, r0
	bne	.L181
.L61:
	ldr	r1, [r4]
	mov	r0, r6
	bl	rtx_equal_p
	cmp	r0, #0
	moveq	r0, r6
	ldreq	r4, [r4]
	bne	.L156
	b	.L158
.L166:
	ldr	r0, [r4, #8]
	bl	GET_CODE
	ldr	r6, .L194+44
	ldr	r3, [r6]
	cmp	r0, r3
	beq	.L182
	ldr	r0, [r4, #12]
	bl	GET_CODE
	ldr	r3, [r6]
	cmp	r0, r3
	bne	.L63
	ldr	r0, [r4, #12]
	ldr	r7, [r4, #8]
	bl	INTVAL
	cmp	r0, #0
	bne	.L69
	ldr	r3, .L194+116
	ldr	r2, [r4, #8]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L69
	ldr	r2, .L194+56
	str	r3, [r4, #8]
	ldr	r9, [r2]
	b	.L68
.L164:
	ldr	r3, .L194+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L194+28
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L155
	b	.L62
.L162:
	ldr	r2, .L194+128
	ldr	r2, [r2]
	cmp	r6, r2
	beq	.L94
	ldr	r2, .L194+132
	ldr	r2, [r2]
	cmp	r6, r2
	bne	.L2
.L94:
	mov	r3, #1
	str	r3, [sp, #16]
	b	.L3
.L163:
	ldr	r3, .L194+64
	ldr	r3, [r3]
	cmp	r6, r3
	beq	.L94
	ldr	r3, .L194+68
	ldr	r3, [r3]
	sub	r3, r3, r6
	clz	r3, r3
	lsr	r3, r3, #5
	str	r3, [sp, #16]
	b	.L3
.L172:
	ldr	r3, [r7]
	cmp	r5, r3
	beq	.L80
	ldr	r1, [r6]
	ldr	r0, [r4, #12]
	bl	register_operand
	cmp	r0, #0
	bne	.L78
.L80:
	mov	r0, r5
	ldr	r1, [r4, #8]
	bl	force_reg
	str	r0, [r4, #8]
	b	.L78
.L182:
	ldr	r0, [r4, #8]
	ldr	r7, [r4, #12]
	bl	INTVAL
	cmp	r0, #0
	bne	.L67
	ldr	r3, .L194+116
	ldr	r2, [r4, #12]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L67
	ldr	r2, .L194+56
	str	r3, [r4, #12]
	ldr	r9, [r2]
.L68:
	mov	r0, r5
	ldr	r8, [r4]
	bl	gen_reg_rtx
	str	r0, [r4]
	mov	r6, r0
	mov	r0, r4
	bl	ix86_expand_int_movcc
	cmp	r0, #0
	beq	.L63
	mov	ip, #0
	ldr	r3, .L194+72
	str	r8, [sp]
	ldr	lr, [r3]
	mov	r2, r7
	mov	r3, r6
	mov	r1, r9
	stmib	sp, {ip, lr}
	mov	r0, r5
	bl	expand_binop
	mov	r1, r8
	mov	r4, r0
	bl	rtx_equal_p
	cmp	r0, #0
	bne	.L156
	mov	r0, r8
.L157:
	bl	copy_rtx
	mov	r3, r0
	mov	r0, r4
	mov	r4, r3
.L158:
	bl	copy_rtx
	mov	r1, r0
	mov	r0, r4
.L159:
	bl	emit_move_insn
	b	.L156
.L67:
	ldr	r0, [r4, #8]
	bl	INTVAL
	cmn	r0, #1
	bne	.L63
	ldr	r3, [r8]
	ldr	r2, [r4, #12]
	cmp	r2, r3
	beq	.L63
	ldr	r2, .L194+76
	str	r3, [r4, #12]
	ldr	r9, [r2]
	b	.L68
.L175:
	ldr	r0, [r4]
	ldr	r7, [r6]
	bl	copy_rtx
	mov	r6, r0
	ldr	r0, [r4, #8]
	ldr	r8, [sp, #52]
	bl	copy_rtx
	mov	r2, r0
	ldr	r0, [r4]
	mov	r4, r2
	bl	copy_rtx
	mov	r2, r4
	mov	r3, r0
	mov	r1, r8
	mov	r0, r5
	bl	gen_rtx_IF_THEN_ELSE
	mov	r1, r6
	mov	r2, r0
	mov	r0, r7
	bl	gen_rtx_SET
	bl	emit_insn
	mov	r0, #1
	b	.L1
.L174:
	ldr	r0, [r4]
	ldr	r9, [r6]
	bl	copy_rtx
	mov	r7, r0
	ldr	r0, [r4, #12]
	ldr	r10, [sp, #56]
	bl	copy_rtx
	mov	r8, r0
	ldr	r0, [r4]
	bl	copy_rtx
	mov	r2, r8
	mov	r3, r0
	mov	r1, r10
	mov	r0, r5
	bl	gen_rtx_IF_THEN_ELSE
	mov	r1, r7
	mov	r2, r0
	mov	r0, r9
	bl	gen_rtx_SET
	bl	emit_insn
	b	.L85
.L171:
	mov	r1, r8
	ldr	r0, [r4]
	bl	reg_overlap_mentioned_p
	cmp	r0, #0
	bne	.L76
	ldr	r8, [r4, #8]
	b	.L75
.L170:
	ldr	r1, [r4, #12]
	ldr	r0, [r4]
	bl	reg_overlap_mentioned_p
	cmp	r0, #0
	beq	.L73
	mov	r0, r5
	bl	gen_reg_rtx
	mov	r6, r0
	ldr	r1, [r4, #12]
	bl	emit_move_insn
	str	r6, [r4, #12]
	b	.L73
.L169:
	mov	r0, r5
	ldr	r1, [r4, #12]
	bl	force_reg
	str	r0, [r4, #12]
	b	.L71
.L168:
	mov	r0, r5
	ldr	r1, [r4, #8]
	bl	force_reg
	str	r0, [r4, #8]
	b	.L70
.L173:
	ldr	r1, [r6]
	ldr	r0, [r4, #12]
	bl	register_operand
	cmp	r0, #0
	bne	.L83
	mov	r0, r5
	ldr	r1, [r4, #12]
	bl	force_reg
	str	r0, [r4, #12]
	b	.L83
.L69:
	ldr	r0, [r4, #12]
	bl	INTVAL
	cmn	r0, #1
	bne	.L63
	ldr	r3, [r8]
	ldr	r2, [r4, #12]
	cmp	r2, r3
	beq	.L63
	ldr	r2, .L194+76
	str	r3, [r4, #8]
	ldr	r9, [r2]
	b	.L68
.L76:
	mov	r0, r5
	bl	gen_reg_rtx
	mov	r8, r0
	ldr	r1, [r4, #8]
	bl	emit_move_insn
	str	r8, [r4, #8]
	b	.L75
.L8:
	ldr	r3, .L194+64
	ldr	r3, [r3]
	cmp	r6, r3
	beq	.L86
	ldr	r3, .L194+128
	ldr	r3, [r3]
	cmp	r6, r3
	beq	.L86
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	sub	r3, r3, r2
	str	r3, [sp, #32]
.L22:
	mvn	ip, #0
	mov	r0, #0
	ldr	r2, .L194+104
	ldr	r3, [fp]
	ldr	r2, [r2]
	stmib	sp, {r0, ip}
	str	r2, [sp]
	ldr	r2, .L194+108
	mov	r1, r6
	ldr	r2, [r2]
	ldr	r0, [sp, #36]
	bl	emit_store_flag
	mov	r4, r0
.L20:
	ldr	r3, [sp, #32]
	cmp	r3, #1
	beq	.L183
	ldr	r3, [sp, #24]
	cmn	r3, #1
	beq	.L184
	ldr	r3, [sp, #32]
	ldr	r2, [sp, #28]
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	cmp	r2, #0
	moveq	r3, #0
	cmp	r3, #0
	bne	.L185
	ldr	r3, [sp, #24]
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L194+52
	mov	r0, r4
	ldr	r8, [r3]
	bl	copy_rtx
	ldr	r3, [sp, #24]
	ldr	r10, [sp, #28]
	mov	r1, r5
	mov	r6, r0
	sub	r0, r3, r10
	bl	gen_int_mode
	mov	r3, r0
	mov	r0, r4
	mov	r7, #1
	mov	r4, r3
	bl	copy_rtx
	ldr	r9, .L194+120
	mov	r3, r4
	ldr	ip, [r9]
	mov	r2, r6
	stm	sp, {r0, r7, ip}
	mov	r1, r8
	mov	r0, r5
	bl	expand_simple_binop
	cmp	r10, #0
	mov	r4, r0
	beq	.L24
	ldr	r3, .L194+112
	ldr	r8, [r3]
	bl	copy_rtx
	mov	r6, r0
	mov	r0, r10
	bl	GEN_INT
	mov	r3, r0
	mov	r0, r4
	mov	r4, r3
	bl	copy_rtx
	ldr	ip, [r9]
	mov	r3, r4
	stm	sp, {r0, r7, ip}
	mov	r2, r6
	mov	r1, r8
	mov	r0, r5
	bl	expand_simple_binop
	mov	r4, r0
.L24:
	mov	r0, r4
	ldr	r1, [sp, #36]
	bl	rtx_equal_p
	cmp	r0, #0
	bne	.L156
	ldr	r0, [sp, #36]
	b	.L157
.L40:
	ldr	r3, .L194+36
	ldr	r3, [r3]
	cmp	r5, r3
	beq	.L42
	ldr	r3, [r9]
	cmp	r5, r3
	beq	.L42
.L43:
	ldr	r3, .L194+24
	ldr	r6, .L194+104
	ldr	r3, [r3]
	cmp	r5, r3
	bne	.L47
	ldr	r0, [sp, #28]
	bl	GEN_INT
	ldr	r1, [r6]
	bl	x86_64_immediate_operand
	cmp	r0, #0
	beq	.L41
.L47:
	mov	r7, #1
	mov	lr, #0
	ldr	ip, [r6]
	ldr	r2, .L194+108
	ldr	r3, [fp]
	ldr	r2, [r2]
	ldr	r1, [sp, #40]
	stm	sp, {ip, lr}
	ldr	r0, [sp, #36]
	str	r7, [sp, #8]
	bl	emit_store_flag
	ldr	r3, [sp, #32]
	mov	r8, r0
	cmp	r3, r7
	beq	.L187
	bl	copy_rtx
	ldr	r9, [sp, #32]
	mov	r10, r0
	bic	r0, r9, #1
	bl	GEN_INT
	mov	r1, r10
	mov	r2, r0
	mov	r0, r5
	bl	gen_rtx_MULT
	tst	r9, #1
	streq	r7, [sp, #44]
	mov	r9, r0
	bne	.L188
.L48:
	ldr	r3, [sp, #28]
	cmp	r3, #0
	bne	.L189
.L49:
	mov	r1, r8
	mov	r0, r9
	bl	rtx_equal_p
	cmp	r0, #0
	bne	.L50
	ldr	r3, [sp, #44]
	mov	r0, r8
	cmp	r3, #1
	beq	.L190
	ldr	r6, [r6]
	bl	copy_rtx
	mov	r5, r0
	mov	r0, r9
	bl	copy_rtx
	mov	r1, r5
	mov	r2, r0
	mov	r0, r6
	bl	gen_rtx_SET
	bl	emit_insn
.L50:
	ldr	r1, [r4]
	mov	r0, r8
	bl	rtx_equal_p
	cmp	r0, #0
	moveq	r0, r8
	ldreq	r4, [r4]
	bne	.L156
	b	.L158
.L183:
	ldr	r3, [sp, #28]
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L194+112
	ldr	r0, [sp, #28]
	ldr	r7, [r3]
	bl	GEN_INT
	mov	r6, r0
	mov	r0, r4
	bl	copy_rtx
	ldr	r2, .L194+120
	mov	r3, r6
	ldr	ip, [r2]
	ldr	r2, [sp, #32]
	str	r0, [sp]
	str	r2, [sp, #4]
	mov	r1, r7
	mov	r2, r4
	mov	r0, r5
	str	ip, [sp, #8]
	bl	expand_simple_binop
	mov	r4, r0
	b	.L24
.L176:
	ldr	r0, [sp, #48]
	bl	GET_CODE
	ldr	r1, [sp, #16]
	mov	r4, r0
	ldr	r0, [sp, #48]
	bl	XEXP
	bl	GET_MODE
	ldr	r3, .L194+80
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L11
	ldr	r1, [sp, #16]
	ldr	r0, [sp, #48]
	bl	XEXP
	bl	GET_MODE
	ldr	r3, .L194+84
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L11
	ldr	r3, .L194+88
	ldr	r3, [r3]
	cmp	r4, r3
	moveq	r0, r4
	beq	.L13
	ldr	r4, [sp, #48]
	mov	r0, r4
	bl	GET_CODE
	bl	reverse_condition
.L154:
	mov	r1, r0
	mov	r0, r4
	bl	PUT_CODE
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	str	r3, [sp, #24]
	str	r2, [sp, #28]
.L15:
	ldr	r3, .L194+108
	ldr	r0, [sp, #36]
	ldr	r1, [r3]
	bl	reg_overlap_mentioned_p
	cmp	r0, #0
	bne	.L18
	ldr	r4, [sp, #36]
	ldr	r1, [fp]
	mov	r0, r4
	bl	reg_overlap_mentioned_p
	cmp	r0, #0
	beq	.L17
.L18:
	mov	r0, r5
	bl	gen_reg_rtx
	mov	r4, r0
.L17:
	ldr	r3, .L194+24
	ldr	r3, [r3]
	cmp	r5, r3
	beq	.L191
	ldr	r3, .L194+92
	mov	r1, r4
	ldr	r0, [r3]
	bl	gen_lowpart
	ldr	r1, [sp, #48]
	bl	gen_x86_movsicc_0_m1
	bl	emit_insn
	b	.L20
.L86:
	mov	r0, r6
	bl	reverse_condition
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r6, r0
	str	r2, [sp, #28]
	str	r3, [sp, #24]
	b	.L22
.L42:
	ldr	r3, .L194+40
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L41
	b	.L43
.L11:
	mov	r0, r4
	bl	ix86_fp_compare_code_to_integer
	ldr	r3, .L194+88
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L13
	ldr	r4, [sp, #48]
	mov	r0, r4
	bl	GET_CODE
	bl	reverse_condition_maybe_unordered
	b	.L154
.L185:
	ldr	r3, .L194+96
	mov	r0, r4
	ldr	r7, [r3]
	mov	r6, #1
	bl	copy_rtx
	mov	r2, r4
	mov	r3, r0
	mov	r1, r7
	mov	r0, r5
	str	r6, [sp]
	bl	expand_simple_unop
	ldr	r3, [sp, #24]
	mov	r4, r0
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L194+112
	ldr	r8, [r3]
	bl	copy_rtx
	mov	r7, r0
	ldr	r0, [sp, #24]
	bl	GEN_INT
	mov	r3, r0
	mov	r0, r4
	mov	r4, r3
	bl	copy_rtx
	ldr	r2, .L194+120
	mov	r3, r4
	ldr	ip, [r2]
	mov	r1, r8
	stm	sp, {r0, r6}
	mov	r2, r7
	mov	r0, r5
	str	ip, [sp, #8]
	bl	expand_simple_binop
	mov	r4, r0
	b	.L24
.L184:
	ldr	r3, .L194+100
	ldr	r0, [sp, #28]
	ldr	r7, [r3]
	bl	GEN_INT
	mov	r6, r0
	mov	r0, r4
	bl	copy_rtx
	mov	ip, #1
	ldr	r2, .L194+120
	mov	r3, r6
	ldr	lr, [r2]
	mov	r1, r7
	mov	r2, r4
	str	r0, [sp]
	stmib	sp, {ip, lr}
	mov	r0, r5
	bl	expand_simple_binop
	mov	r4, r0
	b	.L24
.L52:
	ldr	r3, .L194+32
	ldr	r2, [r3]
	cmp	r2, #1
	ble	.L65
	b	.L89
.L177:
	bl	GET_MODE
	bl	FLOAT_MODE_P
	ldr	r6, [sp, #28]
	ldr	r3, [sp, #24]
	cmp	r0, #0
	sub	r2, r6, r3
	ldr	r0, [sp, #20]
	str	r2, [sp, #32]
	beq	.L31
	bl	reverse_condition_maybe_unordered
	ldr	r0, [sp, #40]
	bl	reverse_condition_maybe_unordered
	ldr	r3, [sp, #24]
	ldr	r2, .L194+108
	str	r0, [sp, #40]
	str	r6, [sp, #24]
	ldr	r0, [r2]
	str	r3, [sp, #28]
	b	.L30
.L191:
	ldr	r1, [sp, #48]
	mov	r0, r4
	bl	gen_x86_movdicc_0_m1_rex64
	bl	emit_insn
	b	.L20
.L186:
	ldr	r3, .L194+96
	mov	r0, r4
	ldr	r6, [r3]
	mov	r7, #1
	bl	copy_rtx
	mov	r2, r4
	mov	r1, r6
	mov	r3, r0
	str	r7, [sp]
	mov	r0, r5
	bl	expand_simple_unop
	ldr	r3, .L194+52
	mov	r9, r0
	ldr	r8, [r3]
	bl	copy_rtx
	mov	r1, r5
	mov	r4, r0
	ldr	r0, [sp, #28]
	bl	gen_int_mode
	mov	r6, r0
	mov	r0, r9
	bl	copy_rtx
	ldr	r3, .L194+120
	str	r7, [sp, #4]
	ldr	ip, [r3]
	mov	r2, r4
	str	r0, [sp]
	mov	r3, r6
	mov	r1, r8
	mov	r0, r5
	str	ip, [sp, #8]
	bl	expand_simple_binop
	mov	r4, r0
	b	.L24
.L178:
	ldr	r0, [fp]
	bl	GET_CODE
	ldr	r3, [r7]
	cmp	r0, r3
	bne	.L32
	ldr	r3, [fp]
	ldr	r2, [r8]
	cmp	r3, r2
	beq	.L192
.L33:
	ldr	r2, .L194+116
	ldr	r2, [r2]
	cmp	r3, r2
	bne	.L32
	ldr	r3, .L194+68
	ldr	r2, [sp, #40]
	ldr	r3, [r3]
	cmp	r3, r2
	beq	.L193
	ldr	r3, .L194+64
	ldr	r2, [sp, #40]
	ldr	r3, [r3]
	cmp	r3, r2
	ldreq	r3, .L194+128
	ldreq	r3, [r3]
	streq	r3, [sp, #16]
	b	.L32
.L179:
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	cmn	r3, #1
	movne	r3, #0
	moveq	r3, #1
	cmn	r2, #1
	movne	r2, #0
	moveq	r2, #1
	orrs	r1, r3, r2
	beq	.L35
	cmp	r6, #4
	bls	.L36
	ldr	r1, [sp, #32]
	sub	r1, r1, #8
	cmp	r1, #1
	bls	.L36
.L37:
	ldr	r6, [sp, #24]
	cmn	r6, #1
	beq	.L38
	ldr	r0, [sp, #40]
	bl	reverse_condition
	str	r6, [sp, #28]
	str	r0, [sp, #40]
.L38:
	mvn	lr, #0
	mov	ip, #0
	ldr	r2, .L194+104
	ldr	r3, [fp]
	ldr	r6, [r2]
	ldr	r2, .L194+108
	ldr	r1, [sp, #40]
	ldr	r2, [r2]
	ldr	r0, [sp, #36]
	stm	sp, {r6, ip, lr}
	bl	emit_store_flag
	mov	r7, r0
	ldr	r3, .L194+100
	ldr	r0, [sp, #28]
	ldr	r8, [r3]
	mov	r6, #1
	bl	GEN_INT
	ldr	r2, .L194+120
	str	r7, [sp]
	ldr	ip, [r2]
	mov	r3, r0
	mov	r1, r8
	mov	r2, r7
	mov	r0, r5
	stmib	sp, {r6, ip}
	bl	expand_simple_binop
	mov	r1, r0
	ldr	r0, [r4]
	cmp	r0, r1
	beq	.L156
	b	.L159
.L187:
	bl	copy_rtx
	mov	r9, r0
	b	.L48
.L13:
	bl	reverse_condition
	mov	r0, r6
	bl	reverse_condition
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	sub	r3, r3, r2
	str	r3, [sp, #32]
	b	.L15
.L189:
	mov	r0, r3
	bl	GEN_INT
	mov	r1, r9
	mov	r2, r0
	mov	r0, r5
	bl	gen_rtx_PLUS
	ldr	r3, [sp, #44]
	mov	r9, r0
	add	r3, r3, #1
	str	r3, [sp, #44]
	b	.L49
.L31:
	bl	reverse_condition
	ldr	r0, [sp, #40]
	bl	reverse_condition
	ldr	r3, [sp, #24]
	ldr	r2, [sp, #28]
	str	r3, [sp, #28]
	ldr	r3, .L194+108
	str	r0, [sp, #40]
	str	r2, [sp, #24]
	ldr	r0, [r3]
	b	.L30
.L195:
	.align	2
.L194:
	.word	.LC0
	.word	ix86_compare_op1
	.word	const0_rtx
	.word	HImode
	.word	TARGET_64BIT
	.word	TImode
	.word	DImode
	.word	TARGET_CMOVE
	.word	BRANCH_COST
	.word	QImode
	.word	TARGET_PARTIAL_REG_STALL
	.word	CONST_INT
	.word	MODE_INT
	.word	AND
	.word	and_optab
	.word	TARGET_FAST_PREFIX
	.word	GT
	.word	LE
	.word	OPTAB_WIDEN
	.word	ior_optab
	.word	CCFPmode
	.word	CCFPUmode
	.word	LTU
	.word	SImode
	.word	NOT
	.word	IOR
	.word	VOIDmode
	.word	ix86_compare_op0
	.word	PLUS
	.word	constm1_rtx
	.word	OPTAB_DIRECT
	.word	UNKNOWN
	.word	GE
	.word	LT
.L188:
	mov	r1, r0
	mov	r2, r10
	mov	r0, r5
	bl	gen_rtx_PLUS
	mov	r3, #2
	mov	r9, r0
	str	r3, [sp, #44]
	b	.L48
.L36:
	ldr	r1, .L194+132
	ldr	r0, [sp, #16]
	ldr	r1, [r1]
	cmp	r1, r0
	movne	r2, #0
	andeq	r2, r2, #1
	cmp	r2, #0
	bne	.L38
	ldr	r2, .L194+128
	ldr	r2, [r2]
	cmp	r2, r0
	movne	r3, #0
	andeq	r3, r3, #1
	cmp	r3, #0
	beq	.L35
	b	.L37
.L190:
	bl	copy_rtx
	mov	r1, r0
	mov	r0, r9
	bl	force_operand
	mov	r8, r0
	b	.L50
.L167:
	bl	__stack_chk_fail
.L181:
	ldr	r3, .L194+112
	ldr	r10, [r3]
	bl	copy_rtx
	mov	r8, r0
	ldr	r0, [sp, #24]
	bl	GEN_INT
	mov	r3, r0
	mov	r0, r6
	mov	r6, r3
	bl	copy_rtx
	ldr	ip, [r7]
	mov	r3, r6
	stm	sp, {r0, r9, ip}
	mov	r2, r8
	mov	r1, r10
	mov	r0, r5
	bl	expand_simple_binop
	mov	r6, r0
	b	.L61
.L180:
	ldr	r3, .L194+108
	ldr	r0, [r3]
	bl	GET_MODE
	bl	FLOAT_MODE_P
	subs	r6, r0, #0
	ldr	r0, [sp, #40]
	beq	.L57
	bl	reverse_condition_maybe_unordered
	ldr	r3, [sp, #24]
	ldr	r2, [sp, #28]
	str	r0, [sp, #40]
	str	r2, [sp, #24]
	str	r3, [sp, #28]
	b	.L56
.L98:
	ldr	r3, [sp, #24]
	str	r6, [sp, #24]
	str	r3, [sp, #28]
.L58:
	mov	ip, #0
	mov	r6, #1
	ldr	r2, .L194+104
	ldr	r3, [fp]
	ldr	lr, [r2]
	ldr	r2, .L194+108
	ldr	r1, [sp, #40]
	ldr	r2, [r2]
	ldr	r0, [sp, #36]
	str	lr, [sp]
	str	ip, [sp, #4]
	str	r6, [sp, #8]
	bl	emit_store_flag
	ldr	r3, .L194+112
	mov	r7, r0
	ldr	r9, [r3]
	bl	copy_rtx
	ldr	r3, .L194+116
	mov	r8, r0
	mov	r0, r7
	ldr	r10, [r3]
	bl	copy_rtx
	ldr	r7, .L194+120
	str	r6, [sp, #4]
	ldr	ip, [r7]
	mov	r3, r10
	str	r0, [sp]
	mov	r2, r8
	mov	r1, r9
	mov	r0, r5
	str	ip, [sp, #8]
	bl	expand_simple_binop
	mov	r6, r0
	b	.L60
.L57:
	bl	reverse_condition
	ldr	r3, .L194+124
	str	r0, [sp, #40]
	ldr	r3, [r3]
	ldr	r0, [sp, #16]
	cmp	r3, r0
	beq	.L98
	bl	reverse_condition
	ldr	r3, [sp, #24]
	str	r0, [sp, #16]
	str	r3, [sp, #28]
	str	r6, [sp, #24]
	b	.L56
.L192:
	ldr	r2, .L194+132
	ldr	r1, [sp, #40]
	ldr	r2, [r2]
	cmp	r2, r1
	beq	.L96
	ldr	r2, .L194+128
	ldr	r2, [r2]
	cmp	r2, r1
	bne	.L33
.L96:
	ldr	r3, [sp, #40]
	str	r3, [sp, #16]
	b	.L32
.L193:
	ldr	r3, .L194+132
	ldr	r3, [r3]
	str	r3, [sp, #16]
	b	.L32
	.size	ix86_expand_int_movcc, .-ix86_expand_int_movcc
	.comm	ix86_compare_op1,4,4
	.comm	ix86_compare_op0,4,4
	.comm	ior_optab,4,4
	.comm	constm1_rtx,4,4
	.comm	const0_rtx,4,4
	.comm	and_optab,4,4
	.comm	VOIDmode,4,4
	.comm	UNKNOWN,4,4
	.comm	TImode,4,4
	.comm	TARGET_PARTIAL_REG_STALL,4,4
	.comm	TARGET_FAST_PREFIX,4,4
	.comm	TARGET_CMOVE,4,4
	.comm	TARGET_64BIT,4,4
	.comm	SImode,4,4
	.comm	QImode,4,4
	.comm	PLUS,4,4
	.comm	OPTAB_WIDEN,4,4
	.comm	OPTAB_DIRECT,4,4
	.comm	NOT,4,4
	.comm	MODE_INT,4,4
	.comm	LTU,4,4
	.comm	LT,4,4
	.comm	LE,4,4
	.comm	IOR,4,4
	.comm	HImode,4,4
	.comm	GT,4,4
	.comm	GE,4,4
	.comm	DImode,4,4
	.comm	CONST_INT,4,4
	.comm	CCFPmode,4,4
	.comm	CCFPUmode,4,4
	.comm	BRANCH_COST,4,4
	.comm	AND,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
