	.file	"extr_svm.c_set_msr_interception.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	set_msr_interception, @function
set_msr_interception:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdi
	mov	edi, esi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, edx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, ecx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, esi
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	valid_msr_intercept@PLT
	xor	edi, edi
	test	eax, eax
	sete	dil
	call	WARN_ON@PLT
	mov	edi, ebx
	and	ebx, 15
	call	svm_msrpm_offset@PLT
	lea	ebp, [rbx+rbx]
	xor	edi, edi
	cmp	QWORD PTR MSR_INVALID[rip], rax
	lea	rbx, [r14+rax*8]
	sete	dil
	lea	r15d, 1[rbp]
	mov	rdx, QWORD PTR [rbx]
	mov	QWORD PTR [rsp], rdx
	call	BUG_ON@PLT
	test	r13d, r13d
	mov	r13, rsp
	mov	edi, ebp
	mov	rsi, r13
	je	.L2
	call	clear_bit@PLT
	mov	rsi, r13
	mov	edi, r15d
	test	r12d, r12d
	je	.L4
.L10:
	call	clear_bit@PLT
.L5:
	mov	rax, QWORD PTR [rsp]
	mov	QWORD PTR [rbx], rax
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L9
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	call	set_bit@PLT
	mov	rsi, r13
	mov	edi, r15d
	test	r12d, r12d
	jne	.L10
.L4:
	call	set_bit@PLT
	jmp	.L5
.L9:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	set_msr_interception, .-set_msr_interception
	.comm	MSR_INVALID,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_svm.c_set_msr_interception.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	set_msr_interception, %function
set_msr_interception:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, lr}
	mov	r7, r3
	ldr	r3, .L11
	sub	sp, sp, #12
	mov	r6, r0
	mov	r0, r1
	mov	r4, r1
	mov	r8, r2
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	valid_msr_intercept
	clz	r0, r0
	lsr	r0, r0, #5
	bl	WARN_ON
	mov	r0, r4
	bl	svm_msrpm_offset
	mov	r5, r0
	ldr	r2, .L11+4
	ldr	r3, [r6, r0, lsl #2]
	ldr	r0, [r2]
	str	r3, [sp]
	sub	r0, r0, r5
	clz	r0, r0
	lsr	r0, r0, #5
	bl	BUG_ON
	cmp	r8, #0
	mov	r8, sp
	and	r4, r4, #15
	lsl	r4, r4, #1
	mov	r0, r4
	mov	r1, r8
	add	r9, r4, #1
	beq	.L2
	bl	clear_bit
	cmp	r7, #0
	mov	r1, r8
	mov	r0, r9
	beq	.L4
.L10:
	bl	clear_bit
.L5:
	ldr	r3, [sp]
	str	r3, [r6, r5, lsl #2]
	ldr	r3, .L11
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L9
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, pc}
.L2:
	bl	set_bit
	cmp	r7, #0
	mov	r1, r8
	mov	r0, r9
	bne	.L10
.L4:
	bl	set_bit
	b	.L5
.L9:
	bl	__stack_chk_fail
.L12:
	.align	2
.L11:
	.word	.LC0
	.word	MSR_INVALID
	.size	set_msr_interception, .-set_msr_interception
	.comm	MSR_INVALID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
