	.file	"extr_cz_ih.c_cz_ih_decode_iv.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	cz_ih_decode_iv, @function
cz_ih_decode_iv:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	mov	eax, DWORD PTR [rsi]
	mov	rdx, QWORD PTR 8[rsi]
	sar	eax, 2
	cdqe
	mov	edi, DWORD PTR [rdx+rax*4]
	lea	r14, 0[0+rax*4]
	call	le32_to_cpu@PLT
	mov	r15d, eax
	mov	rax, QWORD PTR 8[rbx]
	and	r15d, 255
	mov	edi, DWORD PTR 4[rax+r14]
	call	le32_to_cpu@PLT
	mov	r13d, eax
	mov	rax, QWORD PTR 8[rbx]
	and	r13d, 268435455
	mov	edi, DWORD PTR 8[rax+r14]
	call	le32_to_cpu@PLT
	mov	r12d, eax
	mov	rax, QWORD PTR 8[rbx]
	mov	edi, DWORD PTR 12[rax+r14]
	call	le32_to_cpu@PLT
	mov	eax, DWORD PTR AMDGPU_IRQ_CLIENTID_LEGACY[rip]
	mov	DWORD PTR 0[rbp], r15d
	mov	DWORD PTR 28[rbp], eax
	mov	rax, QWORD PTR 8[rbp]
	mov	DWORD PTR [rax], r13d
	movzx	eax, r12b
	mov	DWORD PTR 16[rbp], eax
	mov	eax, r12d
	shr	r12d, 16
	movzx	eax, ah
	mov	DWORD PTR 24[rbp], r12d
	mov	DWORD PTR 20[rbp], eax
	add	DWORD PTR [rbx], 16
	add	rsp, 8
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	cz_ih_decode_iv, .-cz_ih_decode_iv
	.comm	AMDGPU_IRQ_CLIENTID_LEGACY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cz_ih.c_cz_ih_decode_iv.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cz_ih_decode_iv, %function
cz_ih_decode_iv:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r7, [r1]
	mov	r4, r1
	ldr	r3, [r1, #4]
	asr	r1, r7, #2
	ldr	r0, [r3, r1, lsl #2]
	mov	r5, r2
	bl	le32_to_cpu
	ldr	r3, [r4, #4]
	bic	r7, r7, #3
	add	r3, r3, r7
	mov	r9, r0
	ldr	r0, [r3, #4]
	bl	le32_to_cpu
	ldr	r3, [r4, #4]
	mov	r8, r0
	add	r3, r3, r7
	ldr	r0, [r3, #8]
	bl	le32_to_cpu
	mov	r6, r0
	ldr	r3, [r4, #4]
	and	r9, r9, #255
	add	r7, r3, r7
	ldr	r0, [r7, #12]
	bl	le32_to_cpu
	ldr	r2, .L4
	ldr	r3, [r5, #4]
	ldr	r2, [r2]
	bic	r8, r8, #-268435456
	str	r2, [r5, #20]
	str	r9, [r5]
	str	r8, [r3]
	ldr	r3, [r4]
	asr	r2, r6, #8
	and	r1, r6, #255
	and	r2, r2, #255
	lsr	r6, r6, #16
	add	r3, r3, #16
	str	r1, [r5, #8]
	str	r2, [r5, #12]
	str	r6, [r5, #16]
	str	r3, [r4]
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L5:
	.align	2
.L4:
	.word	AMDGPU_IRQ_CLIENTID_LEGACY
	.size	cz_ih_decode_iv, .-cz_ih_decode_iv
	.comm	AMDGPU_IRQ_CLIENTID_LEGACY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
