	.file	"extr_radeon_encoders.c_radeon_panel_mode_fixup.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	radeon_panel_mode_fixup
	.type	radeon_panel_mode_fixup, @function
radeon_panel_mode_fixup:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rsi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	to_radeon_encoder@PLT
	mov	r15, rax
	mov	rax, QWORD PTR [rbx]
	mov	esi, DWORD PTR 16[r15]
	mov	r13d, DWORD PTR [r15]
	mov	rbp, QWORD PTR [rax]
	mov	eax, DWORD PTR 4[r15]
	mov	edx, esi
	mov	edi, DWORD PTR 12[r15]
	mov	r12d, DWORD PTR 8[r15]
	sub	edx, eax
	sub	r13d, eax
	mov	eax, DWORD PTR 20[r15]
	mov	ecx, DWORD PTR 24[r15]
	mov	DWORD PTR 4[rsp], edx
	mov	edx, DWORD PTR 28[r15]
	sub	r12d, edi
	mov	ebx, eax
	sub	ecx, esi
	sub	edx, eax
	mov	eax, DWORD PTR 68[r15]
	sub	ebx, edi
	mov	rdi, rbp
	mov	DWORD PTR 8[rsp], ecx
	mov	DWORD PTR 68[r14], eax
	mov	eax, DWORD PTR 64[r15]
	mov	DWORD PTR 12[rsp], edx
	mov	DWORD PTR 64[r14], eax
	call	ASIC_IS_AVIVO@PLT
	test	rax, rax
	je	.L2
	mov	eax, DWORD PTR 4[r15]
	mov	DWORD PTR 4[r14], eax
	mov	eax, DWORD PTR 12[r15]
	mov	DWORD PTR 12[r14], eax
.L2:
	mov	eax, DWORD PTR 4[r15]
	mov	rdi, r14
	lea	esi, [rax+r13]
	add	eax, DWORD PTR 4[rsp]
	mov	DWORD PTR 16[r14], eax
	add	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 24[r14], eax
	mov	eax, DWORD PTR 12[r15]
	mov	DWORD PTR [r14], esi
	lea	esi, [rax+r12]
	add	eax, ebx
	mov	DWORD PTR 20[r14], eax
	add	eax, DWORD PTR 12[rsp]
	mov	DWORD PTR 8[r14], esi
	mov	esi, DWORD PTR CRTC_INTERLACE_HALVE_V[rip]
	mov	DWORD PTR 28[r14], eax
	call	drm_mode_set_crtcinfo@PLT
	mov	rdi, rbp
	call	ASIC_IS_AVIVO@PLT
	test	rax, rax
	jne	.L3
	mov	esi, DWORD PTR 32[r14]
	mov	eax, DWORD PTR 36[r14]
.L4:
	mov	ebp, DWORD PTR 4[rsp]
	add	ebx, eax
	add	r13d, esi
	add	r12d, eax
	mov	DWORD PTR 56[r14], ebx
	add	ebx, DWORD PTR 12[rsp]
	add	ebp, esi
	mov	DWORD PTR 40[r14], r13d
	mov	DWORD PTR 44[r14], ebp
	add	ebp, DWORD PTR 8[rsp]
	mov	DWORD PTR 48[r14], ebp
	mov	DWORD PTR 52[r14], r12d
	mov	DWORD PTR 60[r14], ebx
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	esi, DWORD PTR 4[r15]
	mov	eax, DWORD PTR 12[r15]
	mov	DWORD PTR 32[r14], esi
	mov	DWORD PTR 36[r14], eax
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	radeon_panel_mode_fixup, .-radeon_panel_mode_fixup
	.comm	CRTC_INTERLACE_HALVE_V,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_radeon_encoders.c_radeon_panel_mode_fixup.c"
	.text
	.align	2
	.global	radeon_panel_mode_fixup
	.syntax unified
	.arm
	.fpu softvfp
	.type	radeon_panel_mode_fixup, %function
radeon_panel_mode_fixup:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #12
	mov	r4, r1
	mov	r6, r0
	bl	to_radeon_encoder
	mov	r5, r0
	ldr	r3, [r6]
	ldr	ip, [r0, #68]
	ldr	r2, [r3]
	ldr	r0, [r0, #64]
	ldr	r7, [r5, #4]
	ldr	r6, [r5, #12]
	ldr	r9, [r5]
	ldr	r8, [r5, #8]
	ldr	r10, [r5, #28]
	add	r1, r5, #16
	ldm	r1, {r1, r3, fp}
	str	ip, [r4, #68]
	str	r0, [r4, #64]
	mov	r0, r2
	sub	fp, fp, r1
	sub	r10, r10, r3
	str	r2, [sp, #4]
	sub	r9, r9, r7
	sub	r8, r8, r6
	sub	r7, r1, r7
	sub	r6, r3, r6
	bl	ASIC_IS_AVIVO
	cmp	r0, #0
	ldrne	r1, [r5, #4]
	ldrne	r3, [r5, #12]
	strne	r1, [r4, #4]
	ldr	r0, [r5, #4]
	strne	r3, [r4, #12]
	ldr	r3, [r5, #12]
	add	r1, r0, r7
	str	r1, [r4, #16]
	add	r0, r0, r9
	add	r1, r1, fp
	str	r1, [r4, #24]
	str	r0, [r4]
	add	r1, r3, r6
	ldr	r0, .L10
	add	r3, r3, r8
	ldr	r2, [sp, #4]
	str	r1, [r4, #20]
	add	r1, r1, r10
	str	r3, [r4, #8]
	str	r1, [r4, #28]
	ldr	r1, [r0]
	mov	r0, r4
	str	r2, [sp, #4]
	bl	drm_mode_set_crtcinfo
	ldr	r2, [sp, #4]
	mov	r0, r2
	bl	ASIC_IS_AVIVO
	cmp	r0, #0
	ldrne	r2, [r5, #4]
	ldrne	r3, [r5, #12]
	ldreq	r2, [r4, #32]
	ldreq	r3, [r4, #36]
	add	r7, r7, r2
	add	r6, r6, r3
	add	fp, r7, fp
	add	r10, r6, r10
	add	r9, r9, r2
	add	r8, r8, r3
	strne	r2, [r4, #32]
	strne	r3, [r4, #36]
	str	fp, [r4, #48]
	str	r10, [r4, #60]
	str	r7, [r4, #44]
	str	r6, [r4, #56]
	str	r9, [r4, #40]
	str	r8, [r4, #52]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	.align	2
.L10:
	.word	CRTC_INTERLACE_HALVE_V
	.size	radeon_panel_mode_fixup, .-radeon_panel_mode_fixup
	.comm	CRTC_INTERLACE_HALVE_V,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
