	.file	"extr_cfgrtl.c_insert_insn_end_bb_new.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	insert_insn_end_bb_new
	.type	insert_insn_end_bb_new, @function
insert_insn_end_bb_new:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	r14d, esi
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rdi
	mov	edi, esi
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, r13
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	BB_END@PLT
	mov	r12, rax
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rdi, rbp
	call	NEXT_INSN@PLT
	mov	rbp, rax
.L2:
	mov	rdi, rbp
	call	NEXT_INSN@PLT
	cmp	rax, QWORD PTR NULL_RTX[rip]
	jne	.L3
	mov	rdi, r12
	call	JUMP_P@PLT
	test	rax, rax
	jne	.L8
	mov	rdi, r12
	call	NONJUMP_INSN_P@PLT
	test	rax, rax
	je	.L7
	mov	edi, r14d
	call	single_succ_p@PLT
	test	eax, eax
	jne	.L28
.L8:
	mov	rdi, r12
	call	PATTERN@PLT
	mov	edi, eax
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR ADDR_VEC[rip]
	je	.L5
	mov	rdi, r12
	call	PATTERN@PLT
	mov	edi, eax
	call	GET_CODE@PLT
	cmp	rax, QWORD PTR ADDR_DIFF_VEC[rip]
	je	.L5
.L9:
	mov	rsi, r12
.L26:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, r13
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	emit_insn_before_noloc@PLT
.L28:
	.cfi_restore_state
	mov	edi, r14d
	call	single_succ_edge@PLT
	mov	eax, DWORD PTR [rax]
	test	DWORD PTR EDGE_ABNORMAL[rip], eax
	jne	.L8
	.p2align 4,,10
	.p2align 3
.L7:
	mov	rdi, r12
	call	CALL_P@PLT
	test	rax, rax
	je	.L10
	mov	edi, r14d
	call	single_succ_p@PLT
	test	eax, eax
	je	.L13
	mov	edi, r14d
	call	single_succ_edge@PLT
	mov	eax, DWORD PTR [rax]
	test	DWORD PTR EDGE_ABNORMAL[rip], eax
	je	.L10
.L13:
	mov	edi, r14d
	call	BB_HEAD@PLT
	mov	rdi, r12
	mov	esi, eax
	call	find_first_parameter_load@PLT
	mov	rbp, rax
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L14:
	mov	rdi, rbp
	call	NEXT_INSN@PLT
	mov	rbp, rax
.L12:
	mov	rdi, rbp
	call	LABEL_P@PLT
	test	rax, rax
	jne	.L14
	mov	rdi, rbp
	call	NOTE_INSN_BASIC_BLOCK_P@PLT
	test	rax, rax
	jne	.L14
	mov	rsi, rbp
	jmp	.L26
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rdi, r12
	call	prev_real_insn@PLT
	mov	r12, rax
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L10:
	add	rsp, 8
	.cfi_def_cfa_offset 40
	mov	rsi, r12
	mov	rdi, r13
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	emit_insn_after_noloc@PLT
	.cfi_endproc
.LFE0:
	.size	insert_insn_end_bb_new, .-insert_insn_end_bb_new
	.comm	REG_CC_SETTER,4,4
	.comm	NULL_RTX,8,8
	.comm	EDGE_ABNORMAL,4,4
	.comm	ADDR_VEC,8,8
	.comm	ADDR_DIFF_VEC,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cfgrtl.c_insert_insn_end_bb_new.c"
	.text
	.align	2
	.global	insert_insn_end_bb_new
	.syntax unified
	.arm
	.fpu softvfp
	.type	insert_insn_end_bb_new, %function
insert_insn_end_bb_new:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r7, r0
	mov	r0, r1
	mov	r8, r1
	bl	BB_END
	mov	r4, r7
	mov	r6, r0
	ldr	r5, .L28
	b	.L2
.L3:
	mov	r0, r4
	bl	NEXT_INSN
	mov	r4, r0
.L2:
	mov	r0, r4
	bl	NEXT_INSN
	ldr	r3, [r5]
	cmp	r0, r3
	bne	.L3
	mov	r0, r6
	bl	JUMP_P
	cmp	r0, #0
	bne	.L8
	mov	r0, r6
	bl	NONJUMP_INSN_P
	cmp	r0, #0
	beq	.L7
	mov	r0, r8
	bl	single_succ_p
	cmp	r0, #0
	bne	.L27
.L8:
	mov	r0, r6
	bl	PATTERN
	bl	GET_CODE
	ldr	r3, .L28+4
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L5
	mov	r0, r6
	bl	PATTERN
	bl	GET_CODE
	ldr	r3, .L28+8
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L5
	mov	r1, r6
	mov	r0, r7
	pop	{r4, r5, r6, r7, r8, lr}
	b	emit_insn_before_noloc
.L27:
	mov	r0, r8
	bl	single_succ_edge
	ldr	r3, .L28+12
	ldr	r2, [r0]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L8
.L7:
	mov	r0, r6
	bl	CALL_P
	cmp	r0, #0
	beq	.L10
	mov	r0, r8
	bl	single_succ_p
	cmp	r0, #0
	beq	.L13
	mov	r0, r8
	bl	single_succ_edge
	ldr	r3, .L28+12
	ldr	r2, [r0]
	ldr	r3, [r3]
	tst	r2, r3
	beq	.L10
.L13:
	mov	r0, r8
	bl	BB_HEAD
	mov	r1, r0
	mov	r0, r6
	bl	find_first_parameter_load
	mov	r4, r0
	b	.L12
.L14:
	mov	r0, r4
	bl	NEXT_INSN
	mov	r4, r0
.L12:
	mov	r0, r4
	bl	LABEL_P
	cmp	r0, #0
	bne	.L14
	mov	r0, r4
	bl	NOTE_INSN_BASIC_BLOCK_P
	cmp	r0, #0
	bne	.L14
	mov	r1, r4
	mov	r0, r7
	pop	{r4, r5, r6, r7, r8, lr}
	b	emit_insn_before_noloc
.L5:
	mov	r0, r6
	bl	prev_real_insn
	mov	r6, r0
	mov	r0, r7
	mov	r1, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	emit_insn_before_noloc
.L10:
	mov	r1, r6
	mov	r0, r7
	pop	{r4, r5, r6, r7, r8, lr}
	b	emit_insn_after_noloc
.L29:
	.align	2
.L28:
	.word	NULL_RTX
	.word	ADDR_VEC
	.word	ADDR_DIFF_VEC
	.word	EDGE_ABNORMAL
	.size	insert_insn_end_bb_new, .-insert_insn_end_bb_new
	.comm	REG_CC_SETTER,4,4
	.comm	NULL_RTX,4,4
	.comm	EDGE_ABNORMAL,4,4
	.comm	ADDR_VEC,4,4
	.comm	ADDR_DIFF_VEC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
