	.file	"extr_hevc_mc_biw_msa.c_hevc_biwgt_copy_64w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	hevc_biwgt_copy_64w_msa, @function
hevc_biwgt_copy_64w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movsx	r12, esi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movsx	rbp, ecx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movsx	rbx, r9d
	sub	rsp, 72
	.cfi_def_cfa_offset 128
	mov	r13d, DWORD PTR 168[rsp]
	mov	r15d, DWORD PTR 144[rsp]
	mov	QWORD PTR 8[rsp], rdi
	movzx	eax, WORD PTR 136[rsp]
	mov	edi, DWORD PTR 160[rsp]
	mov	QWORD PTR 16[rsp], rdx
	mov	ecx, r13d
	add	edi, DWORD PTR 152[rsp]
	sal	r15d, 16
	mov	QWORD PTR 24[rsp], r8
	sal	edi, cl
	or	r15d, eax
	mov	r14d, DWORD PTR 128[rsp]
	call	__msa_fill_w@PLT
	mov	edi, r15d
	mov	DWORD PTR 32[rsp], eax
	call	__msa_fill_w@PLT
	lea	edi, 1[r13]
	mov	DWORD PTR 4[rsp], eax
	call	__msa_fill_w@PLT
	mov	DWORD PTR 36[rsp], eax
	lea	eax, -1[r14]
	mov	DWORD PTR [rsp], eax
	test	r14d, r14d
	je	.L1
	lea	rax, 0[0+r12*4]
	mov	QWORD PTR 40[rsp], rax
	lea	rax, 0[0+rbp*4]
	mov	QWORD PTR 48[rsp], rax
	lea	rax, 0[0+rbx*4]
	mov	QWORD PTR 56[rsp], rax
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rbx, QWORD PTR 8[rsp]
	xor	ebp, ebp
	xor	r12d, r12d
	xor	r9d, r9d
	mov	r8d, ebp
	xor	ecx, ecx
	mov	edx, r12d
	mov	esi, 16
	mov	rdi, rbx
	xor	r13d, r13d
	xor	r14d, r14d
	xor	r15d, r15d
	call	LD_SB4@PLT
	mov	rdx, QWORD PTR 40[rsp]
	mov	rax, rbx
	xor	r10d, r10d
	mov	ecx, r10d
	xor	r9d, r9d
	xor	r8d, r8d
	mov	esi, 8
	add	rax, rdx
	xor	edx, edx
	mov	QWORD PTR 8[rsp], rax
	push	0
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	push	0
	.cfi_def_cfa_offset 152
	push	0
	.cfi_def_cfa_offset 160
	mov	rbx, QWORD PTR 48[rsp]
	mov	rdi, rbx
	call	LD_SH8@PLT
	mov	rsi, QWORD PTR 80[rsp]
	mov	rax, rbx
	xor	r11d, r11d
	xor	ebx, ebx
	mov	r9d, ebp
	xor	r8d, r8d
	xor	ecx, ecx
	add	rax, rsi
	xor	edx, edx
	mov	esi, r12d
	xor	edi, edi
	mov	QWORD PTR 48[rsp], rax
	add	rsp, 32
	.cfi_def_cfa_offset 128
	push	0
	.cfi_def_cfa_offset 136
	push	rbx
	.cfi_def_cfa_offset 144
	push	0
	.cfi_def_cfa_offset 152
	push	r11
	.cfi_def_cfa_offset 160
	push	0
	.cfi_def_cfa_offset 168
	push	0
	.cfi_def_cfa_offset 176
	call	ILVR_B4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 128
	mov	r9d, ebp
	xor	r8d, r8d
	push	r14
	.cfi_def_cfa_offset 136
	xor	ecx, ecx
	xor	edx, edx
	mov	esi, r12d
	push	r15
	.cfi_def_cfa_offset 144
	xor	edi, edi
	push	0
	.cfi_def_cfa_offset 152
	push	r13
	.cfi_def_cfa_offset 160
	push	0
	.cfi_def_cfa_offset 168
	push	0
	.cfi_def_cfa_offset 176
	call	ILVL_B4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 128
	xor	ecx, ecx
	xor	esi, esi
	xor	r11d, r11d
	mov	edx, ebx
	mov	r8d, 6
	mov	edi, r11d
	call	SLLI_4V@PLT
	mov	r8d, 6
	mov	ecx, r14d
	xor	esi, esi
	mov	edx, r15d
	mov	edi, r13d
	call	SLLI_4V@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	xor	r11d, r11d
	xor	r10d, r10d
	push	0
	.cfi_def_cfa_offset 144
	mov	r9d, r10d
	mov	edi, r11d
	xor	r8d, r8d
	push	0
	.cfi_def_cfa_offset 152
	xor	ecx, ecx
	xor	edx, edx
	mov	esi, r13d
	push	r13
	.cfi_def_cfa_offset 160
	push	r11
	.cfi_def_cfa_offset 168
	mov	ebp, DWORD PTR 72[rsp]
	push	rbp
	.cfi_def_cfa_offset 176
	mov	r12d, DWORD PTR 84[rsp]
	push	r12
	.cfi_def_cfa_offset 184
	mov	eax, DWORD PTR 60[rsp]
	push	rax
	.cfi_def_cfa_offset 192
	push	0
	.cfi_def_cfa_offset 200
	push	0
	.cfi_def_cfa_offset 208
	call	HEVC_BIW_RND_CLIP4_MAX_SATU@PLT
	add	rsp, 72
	.cfi_def_cfa_offset 136
	mov	edi, ebx
	xor	r9d, r9d
	push	r14
	.cfi_def_cfa_offset 144
	xor	r8d, r8d
	mov	ecx, r14d
	xor	edx, edx
	push	0
	.cfi_def_cfa_offset 152
	mov	esi, r15d
	push	r15
	.cfi_def_cfa_offset 160
	push	rbx
	.cfi_def_cfa_offset 168
	push	rbp
	.cfi_def_cfa_offset 176
	xor	ebp, ebp
	push	r12
	.cfi_def_cfa_offset 184
	mov	eax, DWORD PTR 60[rsp]
	xor	r12d, r12d
	push	rax
	.cfi_def_cfa_offset 192
	push	0
	.cfi_def_cfa_offset 200
	push	0
	.cfi_def_cfa_offset 208
	call	HEVC_BIW_RND_CLIP4_MAX_SATU@PLT
	xor	r11d, r11d
	add	rsp, 80
	.cfi_def_cfa_offset 128
	mov	r9d, r12d
	mov	esi, r11d
	mov	r8d, ebp
	xor	ecx, ecx
	xor	edx, edx
	mov	edi, r13d
	call	PCKEV_B2_UB@PLT
	xor	r10d, r10d
	mov	esi, ebx
	mov	r8d, r13d
	mov	r9d, r10d
	xor	ecx, ecx
	mov	edx, r14d
	mov	edi, r15d
	call	PCKEV_B2_UB@PLT
	mov	rbx, QWORD PTR 24[rsp]
	xor	r10d, r10d
	mov	edx, r13d
	mov	r9d, 16
	mov	ecx, r10d
	mov	esi, r12d
	mov	edi, ebp
	mov	r8, rbx
	call	ST_UB4@PLT
	mov	rax, QWORD PTR 56[rsp]
	sub	DWORD PTR [rsp], 1
	add	rbx, rax
	mov	eax, DWORD PTR [rsp]
	mov	QWORD PTR 24[rsp], rbx
	cmp	eax, -1
	jne	.L3
.L1:
	add	rsp, 72
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	hevc_biwgt_copy_64w_msa, .-hevc_biwgt_copy_64w_msa
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevc_mc_biw_msa.c_hevc_biwgt_copy_64w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	hevc_biwgt_copy_64w_msa, %function
hevc_biwgt_copy_64w_msa:
	@ args = 32, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r10, r0
	sub	sp, sp, #92
	ldr	ip, [sp, #152]
	ldr	r0, [sp, #148]
	ldr	r6, [sp, #156]
	ldrh	r7, [sp, #140]
	add	r0, r0, ip
	ldr	ip, [sp, #144]
	lsl	r0, r0, r6
	orr	r7, r7, ip, lsl #16
	mov	r4, r1
	ldr	r5, [sp, #136]
	str	r2, [sp, #56]
	mov	r8, r3
	str	r10, [sp, #52]
	bl	__msa_fill_w
	mov	r3, r0
	mov	r0, r7
	str	r3, [sp, #60]
	bl	__msa_fill_w
	mov	r3, r0
	add	r0, r6, #1
	str	r3, [sp, #64]
	bl	__msa_fill_w
	sub	r3, r5, #1
	cmp	r5, #0
	str	r3, [sp, #72]
	str	r0, [sp, #68]
	beq	.L1
	lsl	r3, r4, #2
	str	r3, [sp, #76]
	lsl	r3, r8, #2
	str	r3, [sp, #80]
	ldr	r3, [sp, #132]
	lsl	r3, r3, #2
	str	r3, [sp, #84]
.L3:
	mov	r4, #0
	mov	r1, #16
	mov	r3, r4
	mov	r2, r4
	str	r4, [sp, #4]
	str	r4, [sp]
	ldr	r0, [sp, #52]
	bl	LD_SB4
	mov	r3, r4
	mov	r2, r4
	mov	r1, #8
	str	r4, [sp, #20]
	str	r4, [sp, #16]
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	str	r4, [sp, #4]
	str	r4, [sp]
	ldr	r0, [sp, #56]
	bl	LD_SH8
	mov	r2, r4
	mov	r3, r4
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #12]
	str	r4, [sp, #4]
	str	r4, [sp, #8]
	str	r4, [sp]
	str	r4, [sp, #28]
	str	r4, [sp, #24]
	str	r4, [sp, #20]
	str	r4, [sp, #16]
	bl	ILVR_B4_SH
	mov	r2, r4
	mov	r3, r4
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #12]
	str	r4, [sp, #4]
	str	r4, [sp, #8]
	str	r4, [sp]
	str	r4, [sp, #28]
	str	r4, [sp, #24]
	str	r4, [sp, #20]
	str	r4, [sp, #16]
	bl	ILVL_B4_SH
	mov	lr, #6
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	lr, [sp]
	bl	SLLI_4V
	mov	lr, #6
	mov	r3, r4
	str	lr, [sp]
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	bl	SLLI_4V
	ldr	r3, [sp, #60]
	ldr	r2, [sp, #68]
	ldr	r1, [sp, #64]
	mov	r0, r4
	str	r4, [sp, #12]
	str	r4, [sp, #40]
	str	r4, [sp, #36]
	str	r4, [sp, #32]
	str	r4, [sp, #28]
	str	r4, [sp, #8]
	str	r4, [sp, #4]
	str	r4, [sp]
	str	r3, [sp, #24]
	str	r2, [sp, #20]
	mov	r3, r4
	mov	r2, r4
	str	r1, [sp, #16]
	mov	r1, r4
	bl	HEVC_BIW_RND_CLIP4_MAX_SATU
	ldr	r3, [sp, #60]
	ldr	r2, [sp, #68]
	ldr	r1, [sp, #64]
	mov	r0, r4
	str	r4, [sp, #40]
	str	r4, [sp, #36]
	str	r4, [sp, #32]
	str	r4, [sp, #28]
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	str	r4, [sp, #4]
	str	r4, [sp]
	str	r3, [sp, #24]
	str	r2, [sp, #20]
	mov	r3, r4
	mov	r2, r4
	str	r1, [sp, #16]
	mov	r1, r4
	bl	HEVC_BIW_RND_CLIP4_MAX_SATU
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #4]
	str	r4, [sp]
	bl	PCKEV_B2_UB
	ldr	ip, [sp, #72]
	mov	r5, r4
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #4]
	str	r4, [sp]
	sub	r4, ip, #1
	str	r4, [sp, #72]
	bl	PCKEV_B2_UB
	mov	ip, #16
	str	ip, [sp, #4]
	ldr	ip, [sp, #128]
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	ip, [sp]
	bl	ST_UB4
	ldr	r3, [sp, #52]
	ldr	r2, [sp, #76]
	cmn	r4, #1
	add	r2, r3, r2
	str	r2, [sp, #52]
	ldr	r3, [sp, #56]
	ldr	r2, [sp, #80]
	add	r3, r3, r2
	str	r3, [sp, #56]
	ldr	r2, [sp, #84]
	ldr	r3, [sp, #128]
	add	r3, r3, r2
	str	r3, [sp, #128]
	bne	.L3
.L1:
	add	sp, sp, #92
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	hevc_biwgt_copy_64w_msa, .-hevc_biwgt_copy_64w_msa
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
