	.file	"extr_tlan.c_TLan_PhyFinishAutoNeg.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"TLAN:  Giving autonegotiation more time.\n"
	.align 8
.LC1:
	.string	"TLAN:  Please check that your adapter has\n"
	.align 8
.LC2:
	.string	"TLAN:  been properly connected to a HUB or Switch.\n"
	.align 8
.LC3:
	.string	"TLAN:  Trying to establish link in the background...\n"
	.align 8
.LC4:
	.string	"TLAN: %s: Autonegotiation complete.\n"
	.align 8
.LC5:
	.string	"TLAN:  Starting internal PHY with FULL-DUPLEX\n"
	.align 8
.LC6:
	.string	"TLAN:  Starting internal PHY with HALF-DUPLEX\n"
	.text
	.p2align 4
	.type	TLan_PhyFinishAutoNeg, @function
TLan_PhyFinishAutoNeg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 40
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	lea	r13, 20[rsp]
	call	netdev_priv@PLT
	mov	rcx, r13
	mov	rdi, rbp
	mov	rdx, QWORD PTR 8[rax]
	mov	rbx, rax
	mov	rax, QWORD PTR [rax]
	mov	r12d, DWORD PTR [rax+rdx*4]
	mov	edx, DWORD PTR MII_GEN_STS[rip]
	mov	esi, r12d
	call	TLan_MiiReadReg@PLT
	mov	edi, 1000
	call	udelay@PLT
	mov	rcx, r13
	mov	esi, r12d
	mov	rdi, rbp
	mov	edx, DWORD PTR MII_GEN_STS[rip]
	call	TLan_MiiReadReg@PLT
	mov	eax, DWORD PTR 20[rsp]
	test	DWORD PTR MII_GS_AUTOCMPLT[rip], eax
	jne	.L2
	mov	eax, DWORD PTR 40[rbx]
	lea	edx, 1[rax]
	mov	DWORD PTR 40[rbx], edx
	test	eax, eax
	je	.L23
.L3:
	mov	eax, DWORD PTR HZ[rip]
	mov	edx, DWORD PTR TLAN_TIMER_PHY_FINISH_AN[rip]
	mov	rdi, rbp
	lea	esi, 0[0+rax*8]
	call	TLan_SetTimer@PLT
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L24
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	esi, DWORD PTR 4[rbp]
	lea	rdi, .LC4[rip]
	call	printk@PLT
	lea	rcx, 12[rsp]
	mov	esi, r12d
	mov	rdi, rbp
	mov	edx, DWORD PTR MII_AN_ADV[rip]
	call	TLan_MiiReadReg@PLT
	lea	rcx, 16[rsp]
	mov	esi, r12d
	mov	rdi, rbp
	mov	edx, DWORD PTR MII_AN_LPA[rip]
	call	TLan_MiiReadReg@PLT
	mov	eax, DWORD PTR 12[rsp]
	and	eax, DWORD PTR 16[rsp]
	test	ah, 1
	jne	.L21
	mov	edx, eax
	and	edx, 192
	cmp	edx, 64
	je	.L21
.L6:
	mov	rdx, QWORD PTR 8[rbx]
	test	eax, 384
	jne	.L7
	mov	rcx, QWORD PTR 24[rbx]
	mov	ecx, DWORD PTR [rcx]
	test	DWORD PTR TLAN_ADAPTER_USE_INTERN_10[rip], ecx
	jne	.L25
.L7:
	test	rdx, rdx
	je	.L8
.L9:
	movsx	rsi, DWORD PTR HZ[rip]
	mov	edx, DWORD PTR TLAN_TIMER_FINISH_RESET[rip]
	mov	rdi, rbp
	mov	rax, rsi
	imul	rsi, rsi, 1717986919
	sar	eax, 31
	sar	rsi, 34
	sub	esi, eax
	call	TLan_SetTimer@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L21:
	mov	rdx, QWORD PTR TRUE[rip]
	mov	QWORD PTR 32[rbx], rdx
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L25:
	test	rdx, rdx
	jne	.L26
.L8:
	mov	ecx, DWORD PTR MII_GC_AUTOENB[rip]
	mov	edx, DWORD PTR MII_GEN_CTL[rip]
	mov	rsi, QWORD PTR TLAN_DUPLEX_FULL[rip]
	cmp	QWORD PTR 16[rbx], rsi
	je	.L10
	test	al, 64
	je	.L11
.L10:
	mov	rdi, rbp
	or	ecx, DWORD PTR MII_GC_DUPLEX[rip]
	mov	esi, r12d
	call	TLan_MiiWriteReg@PLT
	lea	rdi, .LC5[rip]
	call	pr_info@PLT
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L23:
	lea	rdi, .LC0[rip]
	call	pr_info@PLT
	lea	rdi, .LC1[rip]
	call	pr_info@PLT
	lea	rdi, .LC2[rip]
	call	pr_info@PLT
	lea	rdi, .LC3[rip]
	call	pr_info@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rdi, rbp
	mov	esi, r12d
	call	TLan_MiiWriteReg@PLT
	lea	rdi, .LC6[rip]
	call	pr_info@PLT
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L26:
	mov	QWORD PTR 8[rbx], 0
	mov	edi, DWORD PTR 0[rbp]
	mov	esi, DWORD PTR TLAN_NET_CONFIG[rip]
	mov	edx, DWORD PTR TLAN_NET_CFG_1FRAG[rip]
	or	edx, DWORD PTR TLAN_NET_CFG_1CHAN[rip]
	or	edx, DWORD PTR TLAN_NET_CFG_PHY_EN[rip]
	call	TLan_DioWrite16@PLT
	mov	edx, DWORD PTR TLAN_TIMER_PHY_PDOWN[rip]
	mov	rdi, rbp
	imul	eax, DWORD PTR HZ[rip], 400
	movsx	rsi, eax
	sar	eax, 31
	imul	rsi, rsi, 274877907
	sar	rsi, 38
	sub	esi, eax
	call	TLan_SetTimer@PLT
	jmp	.L1
.L24:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	TLan_PhyFinishAutoNeg, .-TLan_PhyFinishAutoNeg
	.comm	TRUE,8,8
	.comm	TLAN_TIMER_PHY_PDOWN,4,4
	.comm	TLAN_TIMER_PHY_FINISH_AN,4,4
	.comm	TLAN_TIMER_FINISH_RESET,4,4
	.comm	TLAN_NET_CONFIG,4,4
	.comm	TLAN_NET_CFG_PHY_EN,4,4
	.comm	TLAN_NET_CFG_1FRAG,4,4
	.comm	TLAN_NET_CFG_1CHAN,4,4
	.comm	TLAN_DUPLEX_FULL,8,8
	.comm	TLAN_ADAPTER_USE_INTERN_10,4,4
	.comm	MII_GS_AUTOCMPLT,4,4
	.comm	MII_GEN_STS,4,4
	.comm	MII_GEN_CTL,4,4
	.comm	MII_GC_DUPLEX,4,4
	.comm	MII_GC_AUTOENB,4,4
	.comm	MII_AN_LPA,4,4
	.comm	MII_AN_ADV,4,4
	.comm	HZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tlan.c_TLan_PhyFinishAutoNeg.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"TLAN:  Giving autonegotiation more time.\012\000"
	.align	2
.LC1:
	.ascii	"TLAN:  Please check that your adapter has\012\000"
	.align	2
.LC2:
	.ascii	"TLAN:  been properly connected to a HUB or Switch.\012"
	.ascii	"\000"
	.align	2
.LC3:
	.ascii	"TLAN:  Trying to establish link in the background.."
	.ascii	".\012\000"
	.align	2
.LC4:
	.ascii	"TLAN: %s: Autonegotiation complete.\012\000"
	.align	2
.LC5:
	.ascii	"TLAN:  Starting internal PHY with FULL-DUPLEX\012\000"
	.align	2
.LC6:
	.ascii	"TLAN:  Starting internal PHY with HALF-DUPLEX\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TLan_PhyFinishAutoNeg, %function
TLan_PhyFinishAutoNeg:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	ldr	r3, .L27
	sub	sp, sp, #20
	mov	r4, r0
	ldr	r3, [r3]
	str	r3, [sp, #12]
	mov	r3,#0
	bl	netdev_priv
	ldr	r2, [r0, #4]
	ldr	r3, [r0]
	ldr	r7, .L27+4
	ldr	r6, [r3, r2, lsl #2]
	mov	r5, r0
	mov	r1, r6
	ldr	r2, [r7]
	add	r3, sp, #8
	mov	r0, r4
	bl	TLan_MiiReadReg
	mov	r0, #1000
	bl	udelay
	ldr	r2, [r7]
	add	r3, sp, #8
	mov	r1, r6
	mov	r0, r4
	bl	TLan_MiiReadReg
	ldr	r3, .L27+8
	ldr	r2, [sp, #8]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L2
	ldr	r3, [r5, #20]
	cmp	r3, #0
	add	r3, r3, #1
	str	r3, [r5, #20]
	beq	.L23
.L3:
	ldr	r2, .L27+12
	ldr	r3, .L27+16
	ldr	r1, [r2]
	mov	r0, r4
	ldr	r2, [r3]
	lsl	r1, r1, #3
	bl	TLan_SetTimer
.L1:
	ldr	r3, .L27
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L24
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L2:
	ldr	r1, [r4, #4]
	ldr	r0, .L27+20
	bl	printk
	ldr	r2, .L27+24
	mov	r3, sp
	mov	r1, r6
	ldr	r2, [r2]
	mov	r0, r4
	bl	TLan_MiiReadReg
	ldr	r2, .L27+28
	mov	r1, r6
	add	r3, sp, #4
	mov	r0, r4
	ldr	r2, [r2]
	bl	TLan_MiiReadReg
	ldm	sp, {r1, r3}
	and	r1, r1, r3
	tst	r1, #256
	bne	.L21
	and	r3, r1, #192
	cmp	r3, #64
	beq	.L21
.L6:
	ands	r0, r1, #384
	ldr	r3, [r5, #4]
	bne	.L7
	ldr	ip, [r5, #12]
	ldr	r2, .L27+32
	ldr	ip, [ip]
	ldr	r2, [r2]
	tst	ip, r2
	bne	.L25
.L7:
	cmp	r3, #0
	beq	.L8
.L9:
	ldr	r3, .L27+12
	ldr	r1, .L27+36
	ldr	r3, [r3]
	ldr	r2, .L27+40
	smull	r0, r1, r3, r1
	asr	r3, r3, #31
	mov	r0, r4
	ldr	r2, [r2]
	rsb	r1, r3, r1, asr #2
	bl	TLan_SetTimer
	b	.L1
.L21:
	ldr	r3, .L27+44
	ldr	r3, [r3]
	str	r3, [r5, #16]
	b	.L6
.L25:
	cmp	r3, #0
	bne	.L26
.L8:
	ldr	r3, .L27+48
	ldr	r0, [r5, #8]
	ldr	r3, [r3]
	ldr	r2, .L27+52
	cmp	r0, r3
	ldr	r3, .L27+56
	ldr	r2, [r2]
	ldr	r3, [r3]
	beq	.L10
	tst	r1, #64
	beq	.L11
.L10:
	ldr	r1, .L27+60
	ldr	r0, [r1]
	mov	r1, r6
	orr	r3, r3, r0
	mov	r0, r4
	bl	TLan_MiiWriteReg
	ldr	r0, .L27+64
	bl	pr_info
	b	.L9
.L23:
	ldr	r0, .L27+68
	bl	pr_info
	ldr	r0, .L27+72
	bl	pr_info
	ldr	r0, .L27+76
	bl	pr_info
	ldr	r0, .L27+80
	bl	pr_info
	b	.L3
.L11:
	mov	r1, r6
	mov	r0, r4
	bl	TLan_MiiWriteReg
	ldr	r0, .L27+84
	bl	pr_info
	b	.L9
.L26:
	ldr	r3, .L27+88
	ldr	r1, .L27+92
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	r2, .L27+96
	orr	r3, r3, r1
	ldr	r2, [r2]
	ldr	r1, .L27+100
	str	r0, [r5, #4]
	orr	r2, r3, r2
	ldr	r1, [r1]
	ldr	r0, [r4]
	bl	TLan_DioWrite16
	ldr	r3, .L27+12
	ldr	r1, .L27+104
	ldr	r3, [r3]
	ldr	r2, .L27+108
	add	r3, r3, r3, lsl #2
	add	r3, r3, r3, lsl #2
	lsl	r3, r3, #4
	smull	r0, r1, r3, r1
	asr	r3, r3, #31
	mov	r0, r4
	ldr	r2, [r2]
	rsb	r1, r3, r1, asr #6
	bl	TLan_SetTimer
	b	.L1
.L24:
	bl	__stack_chk_fail
.L28:
	.align	2
.L27:
	.word	.LC7
	.word	MII_GEN_STS
	.word	MII_GS_AUTOCMPLT
	.word	HZ
	.word	TLAN_TIMER_PHY_FINISH_AN
	.word	.LC4
	.word	MII_AN_ADV
	.word	MII_AN_LPA
	.word	TLAN_ADAPTER_USE_INTERN_10
	.word	1717986919
	.word	TLAN_TIMER_FINISH_RESET
	.word	TRUE
	.word	TLAN_DUPLEX_FULL
	.word	MII_GEN_CTL
	.word	MII_GC_AUTOENB
	.word	MII_GC_DUPLEX
	.word	.LC5
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC6
	.word	TLAN_NET_CFG_1FRAG
	.word	TLAN_NET_CFG_1CHAN
	.word	TLAN_NET_CFG_PHY_EN
	.word	TLAN_NET_CONFIG
	.word	274877907
	.word	TLAN_TIMER_PHY_PDOWN
	.size	TLan_PhyFinishAutoNeg, .-TLan_PhyFinishAutoNeg
	.comm	TRUE,4,4
	.comm	TLAN_TIMER_PHY_PDOWN,4,4
	.comm	TLAN_TIMER_PHY_FINISH_AN,4,4
	.comm	TLAN_TIMER_FINISH_RESET,4,4
	.comm	TLAN_NET_CONFIG,4,4
	.comm	TLAN_NET_CFG_PHY_EN,4,4
	.comm	TLAN_NET_CFG_1FRAG,4,4
	.comm	TLAN_NET_CFG_1CHAN,4,4
	.comm	TLAN_DUPLEX_FULL,4,4
	.comm	TLAN_ADAPTER_USE_INTERN_10,4,4
	.comm	MII_GS_AUTOCMPLT,4,4
	.comm	MII_GEN_STS,4,4
	.comm	MII_GEN_CTL,4,4
	.comm	MII_GC_DUPLEX,4,4
	.comm	MII_GC_AUTOENB,4,4
	.comm	MII_AN_LPA,4,4
	.comm	MII_AN_ADV,4,4
	.comm	HZ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
