	.file	"extr_gfx_v7_0.c_gfx_v7_0_init_microcode.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"bonaire"
.LC1:
	.string	"kaveri"
.LC2:
	.string	"kabini"
.LC3:
	.string	"mullins"
.LC4:
	.string	"hawaii"
.LC5:
	.string	"\n"
.LC6:
	.string	"amdgpu/%s_pfp.bin"
.LC7:
	.string	"amdgpu/%s_me.bin"
.LC8:
	.string	"amdgpu/%s_ce.bin"
.LC9:
	.string	"amdgpu/%s_mec.bin"
.LC10:
	.string	"amdgpu/%s_rlc.bin"
.LC11:
	.string	"amdgpu/%s_mec2.bin"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC12:
	.string	"gfx7: Failed to load firmware \"%s\"\n"
	.text
	.p2align 4
	.type	gfx_v7_0_init_microcode, @function
gfx_v7_0_init_microcode:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rdi
	lea	rdi, .LC5[rip]
	sub	rsp, 56
	.cfi_def_cfa_offset 96
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 40[rsp], rax
	xor	eax, eax
	call	DRM_DEBUG@PLT
	mov	eax, DWORD PTR [rbx]
	add	eax, -128
	cmp	eax, 4
	ja	.L2
	lea	rdx, .L4[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L4:
	.long	.L8-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L15-.L4
	.text
	.p2align 4,,10
	.p2align 3
.L5:
	lea	r13, .LC4[rip]
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rbp, rsp
	mov	rcx, r13
	mov	esi, 30
	lea	rdx, .LC6[rip]
	mov	rdi, rbp
	call	snprintf@PLT
	mov	edx, DWORD PTR 56[rbx]
	lea	rdi, 48[rbx]
	mov	rsi, rbp
	call	request_firmware@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L22
.L9:
	mov	rsi, rbp
	lea	rdi, .LC12[rip]
	call	pr_err@PLT
	mov	rdi, QWORD PTR 48[rbx]
	call	release_firmware@PLT
	mov	QWORD PTR 48[rbx], 0
	mov	rdi, QWORD PTR 40[rbx]
	call	release_firmware@PLT
	mov	QWORD PTR 40[rbx], 0
	mov	rdi, QWORD PTR 32[rbx]
	call	release_firmware@PLT
	mov	QWORD PTR 32[rbx], 0
	mov	rdi, QWORD PTR 24[rbx]
	call	release_firmware@PLT
	mov	QWORD PTR 24[rbx], 0
	mov	rdi, QWORD PTR 16[rbx]
	call	release_firmware@PLT
	mov	QWORD PTR 16[rbx], 0
	mov	rdi, QWORD PTR 8[rbx]
	call	release_firmware@PLT
	mov	QWORD PTR 8[rbx], 0
.L1:
	mov	rax, QWORD PTR 40[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L23
	add	rsp, 56
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	lea	r13, .LC0[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L22:
	mov	rdi, QWORD PTR 48[rbx]
	call	amdgpu_ucode_validate@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rcx, r13
	lea	rdx, .LC7[rip]
	mov	esi, 30
	mov	rdi, rbp
	call	snprintf@PLT
	mov	edx, DWORD PTR 56[rbx]
	lea	rdi, 40[rbx]
	mov	rsi, rbp
	call	request_firmware@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rdi, QWORD PTR 40[rbx]
	call	amdgpu_ucode_validate@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rcx, r13
	lea	rdx, .LC8[rip]
	mov	esi, 30
	mov	rdi, rbp
	call	snprintf@PLT
	mov	edx, DWORD PTR 56[rbx]
	lea	rdi, 32[rbx]
	mov	rsi, rbp
	call	request_firmware@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rdi, QWORD PTR 32[rbx]
	call	amdgpu_ucode_validate@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rcx, r13
	lea	rdx, .LC9[rip]
	mov	esi, 30
	mov	rdi, rbp
	call	snprintf@PLT
	mov	edx, DWORD PTR 56[rbx]
	lea	rdi, 24[rbx]
	mov	rsi, rbp
	call	request_firmware@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rdi, QWORD PTR 24[rbx]
	call	amdgpu_ucode_validate@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	cmp	DWORD PTR [rbx], 129
	je	.L10
.L12:
	mov	rcx, r13
	lea	rdx, .LC10[rip]
	mov	esi, 30
	mov	rdi, rbp
	call	snprintf@PLT
	mov	edx, DWORD PTR 56[rbx]
	lea	rdi, 8[rbx]
	mov	rsi, rbp
	call	request_firmware@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rdi, QWORD PTR 8[rbx]
	call	amdgpu_ucode_validate@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L1
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L6:
	lea	r13, .LC2[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L8:
	lea	r13, .LC3[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L7:
	lea	r13, .LC1[rip]
	jmp	.L3
.L2:
	xor	eax, eax
	call	BUG@PLT
	jmp	.L3
.L10:
	mov	rcx, r13
	lea	rdx, .LC11[rip]
	mov	esi, 30
	mov	rdi, rbp
	call	snprintf@PLT
	mov	edx, DWORD PTR 56[rbx]
	lea	rdi, 16[rbx]
	mov	rsi, rbp
	call	request_firmware@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L9
	mov	rdi, QWORD PTR 16[rbx]
	call	amdgpu_ucode_validate@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L12
	jmp	.L9
.L23:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	gfx_v7_0_init_microcode, .-gfx_v7_0_init_microcode
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gfx_v7_0.c_gfx_v7_0_init_microcode.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"\012\000"
	.align	2
.LC1:
	.ascii	"amdgpu/%s_pfp.bin\000"
	.align	2
.LC2:
	.ascii	"amdgpu/%s_me.bin\000"
	.align	2
.LC3:
	.ascii	"amdgpu/%s_ce.bin\000"
	.align	2
.LC4:
	.ascii	"amdgpu/%s_mec.bin\000"
	.align	2
.LC5:
	.ascii	"amdgpu/%s_rlc.bin\000"
	.align	2
.LC6:
	.ascii	"amdgpu/%s_mec2.bin\000"
	.align	2
.LC7:
	.ascii	"gfx7: Failed to load firmware \"%s\"\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gfx_v7_0_init_microcode, %function
gfx_v7_0_init_microcode:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r4, r0
	ldr	r3, .L18
	sub	sp, sp, #40
	ldr	r0, .L18+4
	ldr	r3, [r3]
	str	r3, [sp, #36]
	mov	r3,#0
	bl	DRM_DEBUG
	ldr	r3, [r4]
	sub	r3, r3, #128
	cmp	r3, #4
	bhi	.L2
	ldr	r2, .L18+8
	ldr	r6, [r2, r3, lsl #2]
.L3:
	mov	r3, r6
	mov	r1, #30
	ldr	r2, .L18+12
	add	r0, sp, #4
	bl	snprintf
	ldr	r2, [r4, #28]
	add	r1, sp, #4
	add	r0, r4, #24
	bl	request_firmware
	subs	r5, r0, #0
	beq	.L16
.L4:
	mov	r6, #0
	add	r1, sp, #4
	ldr	r0, .L18+16
	bl	pr_err
	ldr	r0, [r4, #24]
	bl	release_firmware
	ldr	r0, [r4, #20]
	str	r6, [r4, #24]
	bl	release_firmware
	ldr	r0, [r4, #16]
	str	r6, [r4, #20]
	bl	release_firmware
	ldr	r0, [r4, #12]
	str	r6, [r4, #16]
	bl	release_firmware
	ldr	r0, [r4, #8]
	str	r6, [r4, #12]
	bl	release_firmware
	ldr	r0, [r4, #4]
	str	r6, [r4, #8]
	bl	release_firmware
	str	r6, [r4, #4]
.L1:
	ldr	r3, .L18
	ldr	r2, [r3]
	ldr	r3, [sp, #36]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L17
	mov	r0, r5
	add	sp, sp, #40
	@ sp needed
	pop	{r4, r5, r6, pc}
.L16:
	ldr	r0, [r4, #24]
	bl	amdgpu_ucode_validate
	subs	r5, r0, #0
	bne	.L4
	mov	r3, r6
	mov	r1, #30
	ldr	r2, .L18+20
	add	r0, sp, #4
	bl	snprintf
	ldr	r2, [r4, #28]
	add	r1, sp, #4
	add	r0, r4, #20
	bl	request_firmware
	subs	r5, r0, #0
	bne	.L4
	ldr	r0, [r4, #20]
	bl	amdgpu_ucode_validate
	subs	r5, r0, #0
	bne	.L4
	mov	r3, r6
	mov	r1, #30
	ldr	r2, .L18+24
	add	r0, sp, #4
	bl	snprintf
	ldr	r2, [r4, #28]
	add	r1, sp, #4
	add	r0, r4, #16
	bl	request_firmware
	subs	r5, r0, #0
	bne	.L4
	ldr	r0, [r4, #16]
	bl	amdgpu_ucode_validate
	subs	r5, r0, #0
	bne	.L4
	mov	r3, r6
	mov	r1, #30
	ldr	r2, .L18+28
	add	r0, sp, #4
	bl	snprintf
	ldr	r2, [r4, #28]
	add	r1, sp, #4
	add	r0, r4, #12
	bl	request_firmware
	subs	r5, r0, #0
	bne	.L4
	ldr	r0, [r4, #12]
	bl	amdgpu_ucode_validate
	subs	r5, r0, #0
	bne	.L4
	ldr	r3, [r4]
	cmp	r3, #129
	beq	.L5
.L7:
	mov	r3, r6
	mov	r1, #30
	ldr	r2, .L18+32
	add	r0, sp, #4
	bl	snprintf
	ldr	r2, [r4, #28]
	add	r1, sp, #4
	add	r0, r4, #4
	bl	request_firmware
	subs	r5, r0, #0
	bne	.L4
	ldr	r0, [r4, #4]
	bl	amdgpu_ucode_validate
	subs	r5, r0, #0
	beq	.L1
	b	.L4
.L2:
	bl	BUG
	b	.L3
.L5:
	mov	r3, r6
	mov	r1, #30
	ldr	r2, .L18+36
	add	r0, sp, #4
	bl	snprintf
	ldr	r2, [r4, #28]
	add	r1, sp, #4
	add	r0, r4, #8
	bl	request_firmware
	subs	r5, r0, #0
	bne	.L4
	ldr	r0, [r4, #8]
	bl	amdgpu_ucode_validate
	subs	r5, r0, #0
	beq	.L7
	b	.L4
.L17:
	bl	__stack_chk_fail
.L19:
	.align	2
.L18:
	.word	.LC8
	.word	.LC0
	.word	.LANCHOR0
	.word	.LC1
	.word	.LC7
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.size	gfx_v7_0_init_microcode, .-gfx_v7_0_init_microcode
	.section	.rodata.str1.4
	.align	2
.LC9:
	.ascii	"mullins\000"
	.align	2
.LC10:
	.ascii	"kaveri\000"
	.align	2
.LC11:
	.ascii	"kabini\000"
	.align	2
.LC12:
	.ascii	"hawaii\000"
	.align	2
.LC13:
	.ascii	"bonaire\000"
	.section	.rodata
	.align	2
	.set	.LANCHOR0,. + 0
	.type	CSWTCH.1, %object
	.size	CSWTCH.1, 20
CSWTCH.1:
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
