	.file	"extr_perf_event_intel_lbr.c_intel_pmu_lbr_reset.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	intel_pmu_lbr_reset
	.type	intel_pmu_lbr_reset, @function
intel_pmu_lbr_reset:
.LFB0:
	.cfi_startproc
	endbr64
	mov	eax, DWORD PTR x86_pmu[rip+8]
	test	eax, eax
	je	.L1
	mov	rax, QWORD PTR LBR_FORMAT_32[rip]
	cmp	QWORD PTR x86_pmu[rip], rax
	mov	eax, 0
	je	.L5
	jmp	intel_pmu_lbr_reset_64@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	jmp	intel_pmu_lbr_reset_32@PLT
	.p2align 4,,10
	.p2align 3
.L1:
	ret
	.cfi_endproc
.LFE0:
	.size	intel_pmu_lbr_reset, .-intel_pmu_lbr_reset
	.comm	x86_pmu,16,16
	.comm	LBR_FORMAT_32,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_perf_event_intel_lbr.c_intel_pmu_lbr_reset.c"
	.text
	.align	2
	.global	intel_pmu_lbr_reset
	.syntax unified
	.arm
	.fpu softvfp
	.type	intel_pmu_lbr_reset, %function
intel_pmu_lbr_reset:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r3, .L6
	ldr	r2, [r3, #4]
	cmp	r2, #0
	bxeq	lr
	ldr	r1, .L6+4
	ldr	r2, [r3]
	ldr	r3, [r1]
	cmp	r2, r3
	beq	.L5
	b	intel_pmu_lbr_reset_64
.L5:
	b	intel_pmu_lbr_reset_32
.L7:
	.align	2
.L6:
	.word	x86_pmu
	.word	LBR_FORMAT_32
	.size	intel_pmu_lbr_reset, .-intel_pmu_lbr_reset
	.comm	x86_pmu,8,4
	.comm	LBR_FORMAT_32,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
