	.file	"extr_sdhci.c_sdhci_data_irq.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Got data interrupt 0x%08x, but there is no active command.\n"
	.align 8
.LC1:
	.string	"Got data interrupt 0x%08x, but there is no active data operation.\n"
	.align 8
.LC2:
	.string	"Got data interrupt 0x%08x, but there is busy-only command.\n"
	.text
	.p2align 4
	.type	sdhci_data_irq, @function
sdhci_data_irq:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	edx, esi
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR 40[rdi]
	mov	DWORD PTR 12[rsp], esi
	test	rax, rax
	je	.L52
	mov	rcx, QWORD PTR 24[rax]
	test	rcx, rcx
	je	.L53
.L4:
	test	DWORD PTR SDHCI_INT_DATA_TIMEOUT[rip], edx
	jne	.L54
	mov	esi, DWORD PTR SDHCI_INT_DATA_CRC[rip]
	or	esi, DWORD PTR SDHCI_INT_DATA_END_BIT[rip]
	test	esi, edx
	je	.L6
	mov	rsi, QWORD PTR MMC_ERR_BADCRC[rip]
	mov	QWORD PTR 8[rax], rsi
.L6:
	test	rcx, rcx
	je	.L7
.L50:
	mov	rdx, QWORD PTR 8[rax]
.L8:
	test	rdx, rdx
	jne	.L10
	mov	edi, DWORD PTR 12[rsp]
	and	edi, DWORD PTR SDHCI_INT_DATA_AVAIL[rip]
	je	.L11
	mov	rax, QWORD PTR 16[rax]
	cmp	rax, QWORD PTR MMC_SEND_TUNING_BLOCK[rip]
	mov	edi, 1
	je	.L11
	xor	edi, edi
	cmp	QWORD PTR MMC_SEND_TUNING_BLOCK_HS200[rip], rax
	sete	dil
.L11:
	call	__predict_false@PLT
	test	rax, rax
	jne	.L55
	mov	eax, DWORD PTR 12[rsp]
	mov	edx, DWORD PTR SDHCI_INT_DATA_AVAIL[rip]
	or	edx, DWORD PTR SDHCI_INT_SPACE_AVAIL[rip]
	test	edx, eax
	je	.L13
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR SDHCI_PLATFORM_TRANSFER[rip], eax
	je	.L14
	mov	edi, DWORD PTR 32[rbp]
	mov	rsi, rbp
	call	SDHCI_PLATFORM_WILL_HANDLE@PLT
	test	rax, rax
	jne	.L56
.L14:
	mov	rdi, rbp
	call	sdhci_transfer_pio@PLT
	mov	eax, DWORD PTR 12[rsp]
.L13:
	test	DWORD PTR SDHCI_INT_DMA_END[rip], eax
	je	.L15
	mov	rax, QWORD PTR 40[rbp]
	mov	r14d, DWORD PTR 8[rbp]
	mov	esi, DWORD PTR 48[rbp]
	mov	edi, DWORD PTR 52[rbp]
	mov	rbx, QWORD PTR 24[rax]
	mov	eax, DWORD PTR 8[rbx]
	test	DWORD PTR MMC_DATA_READ[rip], eax
	je	.L16
	mov	edx, DWORD PTR BUS_DMASYNC_POSTREAD[rip]
	mov	r12, QWORD PTR [rbx]
	mov	r13, QWORD PTR 16[rbp]
	call	bus_dmamap_sync@PLT
	mov	rdi, r12
	mov	esi, r14d
	sub	rdi, r13
	call	ulmin@PLT
	mov	rcx, QWORD PTR 16[rbp]
	mov	rsi, QWORD PTR 56[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR 16[rbx]
	lea	rdi, [rax+rcx*4]
	call	memcpy@PLT
.L17:
	mov	rax, QWORD PTR 16[rbp]
	mov	r12, QWORD PTR [rbx]
	movsx	r13, r14d
	add	rax, r13
	mov	QWORD PTR 16[rbp], rax
	sub	r12, rax
	mov	eax, DWORD PTR 8[rbx]
	test	DWORD PTR MMC_DATA_READ[rip], eax
	je	.L18
	mov	esi, DWORD PTR 48[rbp]
	mov	edi, DWORD PTR 52[rbp]
	mov	edx, DWORD PTR BUS_DMASYNC_PREREAD[rip]
	call	bus_dmamap_sync@PLT
.L19:
	cmp	r13, r12
	je	.L57
.L20:
	mov	edx, DWORD PTR 28[rbp]
	mov	esi, DWORD PTR SDHCI_DMA_ADDRESS[rip]
	mov	rdi, rbp
	call	WR4@PLT
	mov	eax, DWORD PTR 12[rsp]
.L15:
	test	DWORD PTR SDHCI_INT_DATA_END[rip], eax
	je	.L21
	mov	edx, DWORD PTR 4[rbp]
	mov	eax, DWORD PTR PLATFORM_DATA_STARTED[rip]
	test	edx, eax
	je	.L22
	not	eax
	mov	edi, DWORD PTR 32[rbp]
	mov	rsi, rbp
	and	eax, edx
	mov	DWORD PTR 4[rbp], eax
	call	SDHCI_PLATFORM_FINISH_TRANSFER@PLT
.L21:
	mov	rax, QWORD PTR 40[rbp]
	test	rax, rax
	je	.L1
	cmp	QWORD PTR 8[rax], 0
	jne	.L10
.L1:
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L54:
	.cfi_restore_state
	mov	rsi, QWORD PTR MMC_ERR_TIMEOUT[rip]
	mov	QWORD PTR 8[rax], rsi
	test	rcx, rcx
	jne	.L50
.L7:
	mov	ecx, DWORD PTR SDHCI_INT_DATA_AVAIL[rip]
	or	ecx, DWORD PTR SDHCI_INT_SPACE_AVAIL[rip]
	or	ecx, DWORD PTR SDHCI_INT_DMA_END[rip]
	test	ecx, edx
	je	.L50
	lea	rsi, .LC2[rip]
	mov	rdi, rbp
	call	slot_printf@PLT
	mov	rdi, rbp
	call	sdhci_dumpregs@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rdx, QWORD PTR MMC_ERR_INVALID[rip]
	mov	QWORD PTR 8[rax], rdx
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L53:
	mov	esi, DWORD PTR [rax]
	test	DWORD PTR MMC_RSP_BUSY[rip], esi
	jne	.L4
	lea	rsi, .LC1[rip]
	call	slot_printf@PLT
	mov	rdi, rbp
	call	sdhci_dumpregs@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L10:
	mov	edx, DWORD PTR 4[rbp]
	mov	eax, DWORD PTR PLATFORM_DATA_STARTED[rip]
	test	edx, eax
	je	.L23
	not	eax
	mov	edi, DWORD PTR 32[rbp]
	mov	rsi, rbp
	and	eax, edx
	mov	DWORD PTR 4[rbp], eax
	call	SDHCI_PLATFORM_FINISH_TRANSFER@PLT
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L23:
	.cfi_restore_state
	mov	rdi, rbp
	call	sdhci_finish_data@PLT
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L22:
	.cfi_restore_state
	mov	rdi, rbp
	call	sdhci_finish_data@PLT
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L16:
	mov	edx, DWORD PTR BUS_DMASYNC_POSTWRITE[rip]
	call	bus_dmamap_sync@PLT
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L55:
	mov	rax, QWORD PTR 64[rbp]
	mov	edx, DWORD PTR MMC_TUNE_DONE[rip]
	mov	rdi, rbp
	or	DWORD PTR [rax], edx
	call	sdhci_finish_command@PLT
	mov	rdi, rbp
	call	sdhci_finish_data@PLT
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L18:
	.cfi_restore_state
	mov	esi, r14d
	mov	rdi, r12
	call	ulmin@PLT
	mov	rcx, QWORD PTR 16[rbp]
	mov	rdi, QWORD PTR 56[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR 16[rbx]
	lea	rsi, [rax+rcx*4]
	call	memcpy@PLT
	mov	esi, DWORD PTR 48[rbp]
	mov	edi, DWORD PTR 52[rbp]
	mov	edx, DWORD PTR BUS_DMASYNC_PREWRITE[rip]
	call	bus_dmamap_sync@PLT
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L52:
	lea	rsi, .LC0[rip]
	call	slot_printf@PLT
	mov	rdi, rbp
	call	sdhci_dumpregs@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L56:
	mov	edi, DWORD PTR 32[rbp]
	lea	rdx, 12[rsp]
	mov	rsi, rbp
	call	SDHCI_PLATFORM_START_TRANSFER@PLT
	mov	eax, DWORD PTR PLATFORM_DATA_STARTED[rip]
	or	DWORD PTR 4[rbp], eax
	mov	eax, DWORD PTR 12[rsp]
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L57:
	mov	edx, DWORD PTR SDHCI_INT_DMA_END[rip]
	mov	esi, DWORD PTR SDHCI_SIGNAL_ENABLE[rip]
	mov	rdi, rbp
	not	edx
	and	edx, DWORD PTR 24[rbp]
	mov	DWORD PTR 24[rbp], edx
	call	WR4@PLT
	jmp	.L20
	.cfi_endproc
.LFE0:
	.size	sdhci_data_irq, .-sdhci_data_irq
	.comm	SDHCI_SIGNAL_ENABLE,4,4
	.comm	SDHCI_PLATFORM_TRANSFER,4,4
	.comm	SDHCI_INT_SPACE_AVAIL,4,4
	.comm	SDHCI_INT_DMA_END,4,4
	.comm	SDHCI_INT_DATA_TIMEOUT,4,4
	.comm	SDHCI_INT_DATA_END_BIT,4,4
	.comm	SDHCI_INT_DATA_END,4,4
	.comm	SDHCI_INT_DATA_CRC,4,4
	.comm	SDHCI_INT_DATA_AVAIL,4,4
	.comm	SDHCI_DMA_ADDRESS,4,4
	.comm	PLATFORM_DATA_STARTED,4,4
	.comm	MMC_TUNE_DONE,4,4
	.comm	MMC_SEND_TUNING_BLOCK_HS200,8,8
	.comm	MMC_SEND_TUNING_BLOCK,8,8
	.comm	MMC_RSP_BUSY,4,4
	.comm	MMC_ERR_TIMEOUT,8,8
	.comm	MMC_ERR_INVALID,8,8
	.comm	MMC_ERR_BADCRC,8,8
	.comm	MMC_DATA_READ,4,4
	.comm	BUS_DMASYNC_PREWRITE,4,4
	.comm	BUS_DMASYNC_PREREAD,4,4
	.comm	BUS_DMASYNC_POSTWRITE,4,4
	.comm	BUS_DMASYNC_POSTREAD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sdhci.c_sdhci_data_irq.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Got data interrupt 0x%08x, but there is no active c"
	.ascii	"ommand.\012\000"
	.align	2
.LC1:
	.ascii	"Got data interrupt 0x%08x, but there is no active d"
	.ascii	"ata operation.\012\000"
	.align	2
.LC2:
	.ascii	"Got data interrupt 0x%08x, but there is busy-only c"
	.ascii	"ommand.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sdhci_data_irq, %function
sdhci_data_irq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, [r0, #28]
	sub	sp, sp, #12
	cmp	r3, #0
	mov	r4, r0
	mov	r2, r1
	str	r1, [sp, #4]
	beq	.L55
	ldr	r1, [r3, #12]
	cmp	r1, #0
	beq	.L56
.L4:
	ldr	r0, .L61
	ldr	r0, [r0]
	tst	r2, r0
	bne	.L57
	ldr	r0, .L61+4
	ldr	ip, .L61+8
	ldr	r0, [r0]
	ldr	ip, [ip]
	orr	r0, r0, ip
	tst	r0, r2
	ldrne	r0, .L61+12
	ldrne	r0, [r0]
	strne	r0, [r3, #4]
	cmp	r1, #0
	beq	.L7
.L53:
	ldr	r2, [r3, #4]
.L8:
	cmp	r2, #0
	bne	.L10
	ldr	r5, .L61+16
	ldr	r0, [sp, #4]
	ldr	r2, [r5]
	ands	r0, r0, r2
	beq	.L11
	ldr	r2, .L61+20
	ldr	r3, [r3, #8]
	ldr	r2, [r2]
	cmp	r3, r2
	ldrne	r2, .L61+24
	moveq	r0, #1
	ldrne	r0, [r2]
	subne	r0, r0, r3
	clzne	r0, r0
	lsrne	r0, r0, #5
.L11:
	bl	__predict_false
	cmp	r0, #0
	bne	.L58
	ldr	r3, .L61+28
	ldr	r2, [r5]
	ldr	r1, [r3]
	ldr	r3, [sp, #4]
	orr	r2, r2, r1
	tst	r2, r3
	beq	.L13
	ldr	r3, .L61+32
	ldr	r2, [r4]
	ldr	r3, [r3]
	tst	r2, r3
	beq	.L14
	mov	r1, r4
	ldr	r0, [r4, #24]
	bl	SDHCI_PLATFORM_WILL_HANDLE
	cmp	r0, #0
	bne	.L59
.L14:
	mov	r0, r4
	bl	sdhci_transfer_pio
	ldr	r3, [sp, #4]
.L13:
	ldr	r7, .L61+36
	ldr	r2, [r7]
	tst	r3, r2
	beq	.L15
	ldr	r3, [r4, #28]
	ldr	r6, .L61+40
	ldr	r5, [r3, #12]
	ldr	r3, [r6]
	ldr	r2, [r5, #4]
	ldr	r8, [r4, #8]
	tst	r2, r3
	ldr	r0, [r4, #36]
	ldr	r1, [r4, #32]
	beq	.L16
	ldr	r3, .L61+44
	ldr	r10, [r4, #12]
	ldr	r2, [r3]
	ldr	fp, [r5]
	bl	bus_dmamap_sync
	ldr	r3, [r4, #12]
	ldr	r9, [r5, #8]
	mov	r1, r8
	sub	r0, fp, r10
	add	r9, r9, r3, lsl #2
	ldr	r10, [r4, #40]
	bl	ulmin
	mov	r1, r10
	mov	r2, r0
	mov	r0, r9
	bl	memcpy
.L17:
	ldr	r2, [r6]
	ldr	r1, [r5, #4]
	ldr	r3, [r4, #12]
	ldr	r6, [r5]
	add	r3, r8, r3
	tst	r1, r2
	str	r3, [r4, #12]
	sub	r6, r6, r3
	beq	.L18
	ldr	r3, .L61+48
	ldr	r1, [r4, #32]
	ldr	r2, [r3]
	ldr	r0, [r4, #36]
	bl	bus_dmamap_sync
.L19:
	cmp	r8, r6
	beq	.L60
.L20:
	ldr	r3, .L61+52
	mov	r0, r4
	ldr	r1, [r3]
	ldr	r2, [r4, #20]
	bl	WR4
	ldr	r3, [sp, #4]
.L15:
	ldr	r2, .L61+56
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L21
	ldr	r2, .L61+60
	ldr	r3, [r4, #4]
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L22
	bic	r3, r3, r2
	mov	r1, r4
	ldr	r0, [r4, #24]
	str	r3, [r4, #4]
	bl	SDHCI_PLATFORM_FINISH_TRANSFER
.L21:
	ldr	r3, [r4, #28]
	cmp	r3, #0
	beq	.L1
	ldr	r3, [r3, #4]
	cmp	r3, #0
	bne	.L10
.L1:
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L57:
	ldr	r0, .L61+64
	cmp	r1, #0
	ldr	r0, [r0]
	str	r0, [r3, #4]
	bne	.L53
.L7:
	ldr	r1, .L61+16
	ldr	ip, .L61+28
	ldr	r0, .L61+36
	ldr	r1, [r1]
	ldr	ip, [ip]
	ldr	r0, [r0]
	orr	r1, r1, ip
	orr	r1, r1, r0
	tst	r1, r2
	beq	.L53
	ldr	r1, .L61+68
	mov	r0, r4
	bl	slot_printf
	mov	r0, r4
	bl	sdhci_dumpregs
	ldr	r2, .L61+72
	ldr	r3, [r4, #28]
	ldr	r2, [r2]
	str	r2, [r3, #4]
	b	.L8
.L56:
	ldr	ip, .L61+76
	ldr	lr, [r3]
	ldr	ip, [ip]
	tst	lr, ip
	bne	.L4
	ldr	r1, .L61+80
	bl	slot_printf
	mov	r0, r4
	bl	sdhci_dumpregs
	b	.L1
.L10:
	ldr	r2, .L61+60
	ldr	r3, [r4, #4]
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L23
	bic	r3, r3, r2
	mov	r1, r4
	ldr	r0, [r4, #24]
	str	r3, [r4, #4]
	bl	SDHCI_PLATFORM_FINISH_TRANSFER
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L23:
	mov	r0, r4
	bl	sdhci_finish_data
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L22:
	mov	r0, r4
	bl	sdhci_finish_data
	b	.L21
.L16:
	ldr	r3, .L61+84
	ldr	r2, [r3]
	bl	bus_dmamap_sync
	b	.L17
.L58:
	ldr	r2, [r4, #44]
	ldr	r1, .L61+88
	ldr	r3, [r2]
	ldr	r1, [r1]
	mov	r0, r4
	orr	r3, r3, r1
	str	r3, [r2]
	bl	sdhci_finish_command
	mov	r0, r4
	bl	sdhci_finish_data
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L18:
	ldr	r5, [r5, #8]
	mov	r1, r8
	mov	r0, r6
	add	r5, r5, r3, lsl #2
	ldr	r9, [r4, #40]
	bl	ulmin
	mov	r1, r5
	mov	r2, r0
	mov	r0, r9
	bl	memcpy
	ldr	r3, .L61+92
	ldr	r1, [r4, #32]
	ldr	r2, [r3]
	ldr	r0, [r4, #36]
	bl	bus_dmamap_sync
	b	.L19
.L55:
	ldr	r1, .L61+96
	bl	slot_printf
	mov	r0, r4
	bl	sdhci_dumpregs
	b	.L1
.L59:
	mov	r1, r4
	add	r2, sp, #4
	ldr	r0, [r4, #24]
	bl	SDHCI_PLATFORM_START_TRANSFER
	ldr	r3, .L61+60
	ldr	r2, [r4, #4]
	ldr	r1, [r3]
	ldr	r3, [sp, #4]
	orr	r2, r2, r1
	str	r2, [r4, #4]
	b	.L13
.L60:
	ldr	r1, [r7]
	ldr	r2, [r4, #16]
	ldr	r3, .L61+100
	bic	r2, r2, r1
	mov	r0, r4
	ldr	r1, [r3]
	str	r2, [r4, #16]
	bl	WR4
	b	.L20
.L62:
	.align	2
.L61:
	.word	SDHCI_INT_DATA_TIMEOUT
	.word	SDHCI_INT_DATA_CRC
	.word	SDHCI_INT_DATA_END_BIT
	.word	MMC_ERR_BADCRC
	.word	SDHCI_INT_DATA_AVAIL
	.word	MMC_SEND_TUNING_BLOCK
	.word	MMC_SEND_TUNING_BLOCK_HS200
	.word	SDHCI_INT_SPACE_AVAIL
	.word	SDHCI_PLATFORM_TRANSFER
	.word	SDHCI_INT_DMA_END
	.word	MMC_DATA_READ
	.word	BUS_DMASYNC_POSTREAD
	.word	BUS_DMASYNC_PREREAD
	.word	SDHCI_DMA_ADDRESS
	.word	SDHCI_INT_DATA_END
	.word	PLATFORM_DATA_STARTED
	.word	MMC_ERR_TIMEOUT
	.word	.LC2
	.word	MMC_ERR_INVALID
	.word	MMC_RSP_BUSY
	.word	.LC1
	.word	BUS_DMASYNC_POSTWRITE
	.word	MMC_TUNE_DONE
	.word	BUS_DMASYNC_PREWRITE
	.word	.LC0
	.word	SDHCI_SIGNAL_ENABLE
	.size	sdhci_data_irq, .-sdhci_data_irq
	.comm	SDHCI_SIGNAL_ENABLE,4,4
	.comm	SDHCI_PLATFORM_TRANSFER,4,4
	.comm	SDHCI_INT_SPACE_AVAIL,4,4
	.comm	SDHCI_INT_DMA_END,4,4
	.comm	SDHCI_INT_DATA_TIMEOUT,4,4
	.comm	SDHCI_INT_DATA_END_BIT,4,4
	.comm	SDHCI_INT_DATA_END,4,4
	.comm	SDHCI_INT_DATA_CRC,4,4
	.comm	SDHCI_INT_DATA_AVAIL,4,4
	.comm	SDHCI_DMA_ADDRESS,4,4
	.comm	PLATFORM_DATA_STARTED,4,4
	.comm	MMC_TUNE_DONE,4,4
	.comm	MMC_SEND_TUNING_BLOCK_HS200,4,4
	.comm	MMC_SEND_TUNING_BLOCK,4,4
	.comm	MMC_RSP_BUSY,4,4
	.comm	MMC_ERR_TIMEOUT,4,4
	.comm	MMC_ERR_INVALID,4,4
	.comm	MMC_ERR_BADCRC,4,4
	.comm	MMC_DATA_READ,4,4
	.comm	BUS_DMASYNC_PREWRITE,4,4
	.comm	BUS_DMASYNC_PREREAD,4,4
	.comm	BUS_DMASYNC_POSTWRITE,4,4
	.comm	BUS_DMASYNC_POSTREAD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
