	.file	"extr_pwm-meson.c_meson_pwm_calc.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"invalid source clock frequency\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"fin_freq: %lu Hz\n"
.LC2:
	.string	"unable to get period pre_div\n"
.LC3:
	.string	"unable to get period cnt\n"
.LC4:
	.string	"period=%u pre_div=%u cnt=%u\n"
.LC5:
	.string	"unable to get duty cycle\n"
	.section	.rodata.str1.8
	.align 8
.LC6:
	.string	"duty=%u pre_div=%u duty_cnt=%u\n"
	.text
	.p2align 4
	.type	meson_pwm_calc, @function
meson_pwm_calc:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	mov	rdi, rsi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	pwm_get_chip_data@PLT
	mov	r14d, DWORD PTR [rbx]
	mov	r13d, DWORD PTR 4[rbx]
	mov	rbp, rax
	mov	rax, QWORD PTR PWM_POLARITY_INVERSED[rip]
	cmp	QWORD PTR 8[rbx], rax
	jne	.L2
	mov	eax, r13d
	sub	eax, r14d
	mov	r14d, eax
.L2:
	mov	edi, DWORD PTR 12[rbp]
	call	clk_get_rate@PLT
	mov	rbx, rax
	test	rax, rax
	je	.L12
	mov	edi, DWORD PTR [r12]
	mov	edx, eax
	lea	rsi, .LC1[rip]
	xor	eax, eax
	call	dev_dbg@PLT
	mov	eax, DWORD PTR NSEC_PER_SEC[rip]
	mov	edi, r13d
	imul	rdi, rbx
	mov	esi, eax
	sal	esi, 16
	sub	esi, eax
	mov	QWORD PTR [rsp], rdi
	call	div64_u64@PLT
	cmp	DWORD PTR MISC_CLK_DIV_MASK[rip], eax
	mov	rdi, QWORD PTR [rsp]
	mov	r15d, eax
	jb	.L13
	mov	esi, DWORD PTR NSEC_PER_SEC[rip]
	lea	eax, 1[rax]
	mov	DWORD PTR 12[rsp], eax
	imul	esi, eax
	call	div64_u64@PLT
	cmp	eax, 65535
	ja	.L14
	mov	edi, DWORD PTR [r12]
	mov	DWORD PTR [rsp], eax
	mov	r8d, eax
	mov	ecx, r15d
	xor	eax, eax
	mov	edx, r13d
	lea	rsi, .LC4[rip]
	call	dev_dbg@PLT
	cmp	r14d, r13d
	mov	r9d, DWORD PTR [rsp]
	je	.L15
	test	r14d, r14d
	jne	.L8
	mov	DWORD PTR 0[rbp], r15d
	xor	eax, eax
	mov	DWORD PTR 4[rbp], 0
	mov	DWORD PTR 8[rbp], r9d
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	edi, DWORD PTR [r12]
	lea	rsi, .LC2[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	edi, DWORD PTR [r12]
	lea	rsi, .LC0[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	mov	DWORD PTR 0[rbp], r15d
	xor	eax, eax
	mov	DWORD PTR 4[rbp], r9d
	mov	DWORD PTR 8[rbp], 0
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edi, DWORD PTR [r12]
	lea	rsi, .LC3[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	mov	edi, r14d
	mov	esi, DWORD PTR 12[rsp]
	imul	esi, DWORD PTR NSEC_PER_SEC[rip]
	mov	DWORD PTR [rsp], r9d
	imul	rdi, rbx
	call	div64_u64@PLT
	mov	r9d, DWORD PTR [rsp]
	cmp	eax, 65535
	mov	ebx, eax
	ja	.L16
	mov	edi, DWORD PTR [r12]
	mov	r8d, eax
	mov	ecx, r15d
	mov	edx, r14d
	lea	rsi, .LC6[rip]
	xor	eax, eax
	mov	DWORD PTR [rsp], r9d
	call	dev_dbg@PLT
	mov	r9d, DWORD PTR [rsp]
	mov	DWORD PTR 0[rbp], r15d
	xor	eax, eax
	mov	DWORD PTR 4[rbp], ebx
	sub	r9d, ebx
	mov	DWORD PTR 8[rbp], r9d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L16:
	mov	edi, DWORD PTR [r12]
	lea	rsi, .LC5[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	meson_pwm_calc, .-meson_pwm_calc
	.comm	PWM_POLARITY_INVERSED,8,8
	.comm	NSEC_PER_SEC,4,4
	.comm	MISC_CLK_DIV_MASK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pwm-meson.c_meson_pwm_calc.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"invalid source clock frequency\012\000"
	.align	2
.LC1:
	.ascii	"fin_freq: %lu Hz\012\000"
	.align	2
.LC2:
	.ascii	"unable to get period pre_div\012\000"
	.align	2
.LC3:
	.ascii	"unable to get period cnt\012\000"
	.align	2
.LC4:
	.ascii	"period=%u pre_div=%u cnt=%u\012\000"
	.align	2
.LC5:
	.ascii	"unable to get duty cycle\012\000"
	.align	2
.LC6:
	.ascii	"duty=%u pre_div=%u duty_cnt=%u\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	meson_pwm_calc, %function
meson_pwm_calc:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r5, r2
	sub	sp, sp, #20
	mov	r7, r0
	mov	r0, r1
	bl	pwm_get_chip_data
	ldm	r5, {r4, r8}
	ldr	r3, .L17
	ldr	r2, [r5, #8]
	ldr	r3, [r3]
	mov	r6, r0
	cmp	r2, r3
	ldr	r0, [r0, #12]
	subeq	r4, r8, r4
	bl	clk_get_rate
	subs	r5, r0, #0
	beq	.L12
	mul	r9, r5, r8
	ldr	r10, .L17+4
	mov	r2, r5
	ldr	r1, .L17+8
	ldr	r0, [r7]
	bl	dev_dbg
	ldr	r1, [r10]
	mov	r0, r9
	rsb	r1, r1, r1, lsl #16
	bl	div64_u64
	ldr	r2, .L17+12
	mov	fp, r0
	ldr	r2, [r2]
	cmp	r2, r0
	bcc	.L13
	ldr	r1, [r10]
	add	r3, r0, #1
	str	r3, [sp, #12]
	mul	r3, r1, r3
	mov	r0, r9
	mov	r1, r3
	bl	div64_u64
	cmp	r0, #65536
	mov	r9, r0
	bcs	.L14
	str	r0, [sp]
	mov	r3, fp
	mov	r2, r8
	ldr	r1, .L17+16
	ldr	r0, [r7]
	bl	dev_dbg
	cmp	r4, r8
	beq	.L15
	cmp	r4, #0
	bne	.L8
	mov	r0, r4
	stmib	r6, {r4, r9}
	str	fp, [r6]
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L13:
	ldr	r0, [r7]
	ldr	r1, .L17+20
	bl	dev_err
	ldr	r3, .L17+24
	ldr	r0, [r3]
	rsb	r0, r0, #0
.L1:
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L12:
	ldr	r0, [r7]
	ldr	r1, .L17+28
	bl	dev_err
	ldr	r3, .L17+24
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L15:
	mov	r0, #0
	str	fp, [r6]
	str	r9, [r6, #4]
	str	r0, [r6, #8]
	b	.L1
.L14:
	ldr	r0, [r7]
	ldr	r1, .L17+32
	bl	dev_err
	ldr	r3, .L17+24
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
	ldr	r1, [r10]
	ldr	r3, [sp, #12]
	mul	r0, r5, r4
	mul	r3, r1, r3
	mov	r1, r3
	bl	div64_u64
	cmp	r0, #65536
	mov	r5, r0
	bcs	.L16
	str	r0, [sp]
	mov	r2, r4
	mov	r3, fp
	ldr	r0, [r7]
	ldr	r1, .L17+36
	sub	r9, r9, r5
	bl	dev_dbg
	mov	r0, #0
	str	r9, [r6, #8]
	str	fp, [r6]
	str	r5, [r6, #4]
	b	.L1
.L16:
	ldr	r0, [r7]
	ldr	r1, .L17+40
	bl	dev_err
	ldr	r3, .L17+24
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L18:
	.align	2
.L17:
	.word	PWM_POLARITY_INVERSED
	.word	NSEC_PER_SEC
	.word	.LC1
	.word	MISC_CLK_DIV_MASK
	.word	.LC4
	.word	.LC2
	.word	EINVAL
	.word	.LC0
	.word	.LC3
	.word	.LC6
	.word	.LC5
	.size	meson_pwm_calc, .-meson_pwm_calc
	.comm	PWM_POLARITY_INVERSED,4,4
	.comm	NSEC_PER_SEC,4,4
	.comm	MISC_CLK_DIV_MASK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
