	.file	"extr_cmu.c_vr41xx_supply_clock.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	vr41xx_supply_clock
	.type	vr41xx_supply_clock, @function
vr41xx_supply_clock:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	ebx, edi
	lea	rdi, cmu_lock[rip]
	call	spin_lock_irq@PLT
	lea	edi, -128[rbx]
	cmp	edi, 12
	ja	.L2
	lea	rdx, .L4[rip]
	movsx	rax, DWORD PTR [rdx+rdi*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L4:
	.long	.L16-.L4
	.long	.L15-.L4
	.long	.L14-.L4
	.long	.L13-.L4
	.long	.L12-.L4
	.long	.L11-.L4
	.long	.L10-.L4
	.long	.L9-.L4
	.long	.L8-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.text
	.p2align 4,,10
	.p2align 3
.L5:
	mov	esi, DWORD PTR cmuclkmsk2[rip]
	or	esi, DWORD PTR MSKCEU[rip]
	mov	DWORD PTR cmuclkmsk2[rip], esi
.L20:
	mov	edi, DWORD PTR CMUCLKMSK2[rip]
	call	cmu_write@PLT
	lea	rdi, cmu_lock[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	spin_unlock_irq@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKAIU[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
.L22:
	mov	edi, DWORD PTR CMUCLKMSK[rip]
	call	cmu_write@PLT
	lea	rdi, cmu_lock[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	spin_unlock_irq@PLT
	.p2align 4,,10
	.p2align 3
.L16:
	.cfi_restore_state
	mov	esi, DWORD PTR MSKSIU[rip]
	or	esi, DWORD PTR MSKSSIU[rip]
	or	esi, DWORD PTR cmuclkmsk[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L15:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKPIU[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L14:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKPPCIU[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L13:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKPCIU[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L12:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKKIU[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L11:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKSHSP[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L10:
	mov	esi, DWORD PTR MSKFIR[rip]
	or	esi, DWORD PTR MSKFFIR[rip]
	or	esi, DWORD PTR cmuclkmsk[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L9:
	mov	esi, DWORD PTR cmuclkmsk2[rip]
	or	esi, DWORD PTR MSKMAC1[rip]
	mov	DWORD PTR cmuclkmsk2[rip], esi
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L8:
	mov	esi, DWORD PTR cmuclkmsk2[rip]
	or	esi, DWORD PTR MSKMAC0[rip]
	mov	DWORD PTR cmuclkmsk2[rip], esi
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L7:
	xor	eax, eax
	call	current_cpu_type@PLT
	cmp	eax, DWORD PTR CPU_VR4111[rip]
	jne	.L18
.L19:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	or	esi, DWORD PTR MSKDSIU[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L6:
	mov	esi, DWORD PTR MSKCSI[rip]
	or	esi, DWORD PTR MSKSCSI[rip]
	or	esi, DWORD PTR cmuclkmsk[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L18:
	xor	eax, eax
	call	current_cpu_type@PLT
	cmp	eax, DWORD PTR CPU_VR4121[rip]
	je	.L19
	mov	esi, DWORD PTR MSKSIU[rip]
	or	esi, DWORD PTR MSKDSIU[rip]
	or	esi, DWORD PTR cmuclkmsk[rip]
	mov	DWORD PTR cmuclkmsk[rip], esi
	jmp	.L22
.L2:
	mov	esi, DWORD PTR cmuclkmsk[rip]
	jmp	.L22
	.cfi_endproc
.LFE0:
	.size	vr41xx_supply_clock, .-vr41xx_supply_clock
	.comm	cmuclkmsk2,4,4
	.comm	cmuclkmsk,4,4
	.comm	cmu_lock,4,4
	.comm	MSKSSIU,4,4
	.comm	MSKSIU,4,4
	.comm	MSKSHSP,4,4
	.comm	MSKSCSI,4,4
	.comm	MSKPPCIU,4,4
	.comm	MSKPIU,4,4
	.comm	MSKPCIU,4,4
	.comm	MSKMAC1,4,4
	.comm	MSKMAC0,4,4
	.comm	MSKKIU,4,4
	.comm	MSKFIR,4,4
	.comm	MSKFFIR,4,4
	.comm	MSKDSIU,4,4
	.comm	MSKCSI,4,4
	.comm	MSKCEU,4,4
	.comm	MSKAIU,4,4
	.comm	CPU_VR4121,4,4
	.comm	CPU_VR4111,4,4
	.comm	CMUCLKMSK2,4,4
	.comm	CMUCLKMSK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cmu.c_vr41xx_supply_clock.c"
	.text
	.align	2
	.global	vr41xx_supply_clock
	.syntax unified
	.arm
	.fpu softvfp
	.type	vr41xx_supply_clock, %function
vr41xx_supply_clock:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, lr}
	mov	r4, r0
	ldr	r0, .L26
	bl	spin_lock_irq
	sub	r0, r4, #128
	cmp	r0, #12
	ldrls	pc, [pc, r0, asl #2]
	b	.L2
.L4:
	.word	.L16
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L5
	.word	.L3
.L3:
	ldr	r3, .L26+4
	ldr	r2, .L26+8
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
.L22:
	ldr	r3, .L26+12
	ldr	r0, [r3]
	bl	cmu_write
	pop	{r4, lr}
	ldr	r0, .L26
	b	spin_unlock_irq
.L16:
	ldr	r1, .L26+16
	ldr	r2, .L26+20
.L24:
	ldr	r3, .L26+4
	ldr	r0, [r2]
	ldr	r1, [r1]
	ldr	r2, [r3]
	orr	r1, r1, r0
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L15:
	ldr	r3, .L26+4
	ldr	r2, .L26+24
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L14:
	ldr	r3, .L26+4
	ldr	r2, .L26+28
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L13:
	ldr	r3, .L26+4
	ldr	r2, .L26+32
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L12:
	ldr	r3, .L26+4
	ldr	r2, .L26+36
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L11:
	ldr	r3, .L26+4
	ldr	r2, .L26+40
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L10:
	ldr	r1, .L26+44
	ldr	r2, .L26+48
	b	.L24
.L9:
	ldr	r3, .L26+52
	ldr	r2, .L26+56
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
.L20:
	ldr	r3, .L26+60
	ldr	r0, [r3]
	bl	cmu_write
	pop	{r4, lr}
	ldr	r0, .L26
	b	spin_unlock_irq
.L8:
	ldr	r3, .L26+52
	ldr	r2, .L26+64
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L20
.L7:
	bl	current_cpu_type
	ldr	r3, .L26+68
	ldr	r3, [r3]
	cmp	r0, r3
	bne	.L18
.L19:
	ldr	r3, .L26+4
	ldr	r2, .L26+72
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L22
.L6:
	ldr	r1, .L26+76
	ldr	r2, .L26+80
	b	.L24
.L5:
	ldr	r3, .L26+52
	ldr	r2, .L26+84
	ldr	r1, [r3]
	ldr	r2, [r2]
	orr	r1, r1, r2
	str	r1, [r3]
	b	.L20
.L18:
	bl	current_cpu_type
	ldr	r3, .L26+88
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L19
	ldr	r1, .L26+16
	ldr	r2, .L26+72
	b	.L24
.L2:
	ldr	r3, .L26+4
	ldr	r1, [r3]
	b	.L22
.L27:
	.align	2
.L26:
	.word	cmu_lock
	.word	cmuclkmsk
	.word	MSKAIU
	.word	CMUCLKMSK
	.word	MSKSIU
	.word	MSKSSIU
	.word	MSKPIU
	.word	MSKPPCIU
	.word	MSKPCIU
	.word	MSKKIU
	.word	MSKSHSP
	.word	MSKFIR
	.word	MSKFFIR
	.word	cmuclkmsk2
	.word	MSKMAC1
	.word	CMUCLKMSK2
	.word	MSKMAC0
	.word	CPU_VR4111
	.word	MSKDSIU
	.word	MSKCSI
	.word	MSKSCSI
	.word	MSKCEU
	.word	CPU_VR4121
	.size	vr41xx_supply_clock, .-vr41xx_supply_clock
	.comm	cmuclkmsk2,4,4
	.comm	cmuclkmsk,4,4
	.comm	cmu_lock,4,4
	.comm	MSKSSIU,4,4
	.comm	MSKSIU,4,4
	.comm	MSKSHSP,4,4
	.comm	MSKSCSI,4,4
	.comm	MSKPPCIU,4,4
	.comm	MSKPIU,4,4
	.comm	MSKPCIU,4,4
	.comm	MSKMAC1,4,4
	.comm	MSKMAC0,4,4
	.comm	MSKKIU,4,4
	.comm	MSKFIR,4,4
	.comm	MSKFFIR,4,4
	.comm	MSKDSIU,4,4
	.comm	MSKCSI,4,4
	.comm	MSKCEU,4,4
	.comm	MSKAIU,4,4
	.comm	CPU_VR4121,4,4
	.comm	CPU_VR4111,4,4
	.comm	CMUCLKMSK2,4,4
	.comm	CMUCLKMSK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
