	.file	"extr_sc27xx_adc.c_sc27xx_adc_read.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"timeout to get the hwspinlock\n"
	.align 8
.LC1:
	.string	"read adc timeout, status = 0x%x\n"
	.text
	.p2align 4
	.type	sc27xx_adc_read, @function
sc27xx_adc_read:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	r14, rdi
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rcx
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	ebp, edx
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebx, esi
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	esi, DWORD PTR SC27XX_ADC_HWLOCK_TIMEOUT[rip]
	mov	edi, DWORD PTR [rdi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	hwspin_lock_timeout_raw@PLT
	test	eax, eax
	jne	.L11
	mov	edx, DWORD PTR SC27XX_ADC_EN[rip]
	mov	edi, DWORD PTR 16[r14]
	mov	rsi, QWORD PTR SC27XX_ADC_CTL[rip]
	add	rsi, QWORD PTR 8[r14]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L12
.L9:
	mov	edi, DWORD PTR [r14]
	call	hwspin_unlock_raw@PLT
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L13
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	edx, DWORD PTR SC27XX_ADC_IRQ_CLR[rip]
	mov	edi, DWORD PTR 16[r14]
	mov	rsi, QWORD PTR SC27XX_ADC_INT_CLR[rip]
	add	rsi, QWORD PTR 8[r14]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L5
	mov	ecx, DWORD PTR SC27XX_ADC_SCALE_SHIFT[rip]
	mov	edx, DWORD PTR SC27XX_ADC_SCALE_MASK[rip]
	mov	eax, DWORD PTR SC27XX_ADC_CHN_ID_MASK[rip]
	mov	edi, DWORD PTR 16[r14]
	sal	ebp, cl
	mov	rsi, QWORD PTR SC27XX_ADC_CH_CFG[rip]
	add	rsi, QWORD PTR 8[r14]
	mov	ecx, ebp
	and	ebx, eax
	and	ecx, edx
	or	edx, eax
	or	ecx, ebx
	call	regmap_update_bits@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L14
.L5:
	mov	edi, DWORD PTR 16[r14]
	mov	edx, DWORD PTR SC27XX_ADC_EN[rip]
	xor	ecx, ecx
	mov	rsi, QWORD PTR SC27XX_ADC_CTL[rip]
	add	rsi, QWORD PTR 8[r14]
	call	regmap_update_bits@PLT
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L11:
	mov	edi, DWORD PTR 20[r14]
	mov	r12d, eax
	lea	rsi, .LC0[rip]
	xor	eax, eax
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L14:
	mov	ecx, DWORD PTR SC27XX_ADC_12BIT_MODE[rip]
	mov	edx, DWORD PTR SC27XX_ADC_RUN_NUM_MASK[rip]
	mov	edi, DWORD PTR 16[r14]
	mov	rsi, QWORD PTR SC27XX_ADC_CTL[rip]
	or	edx, ecx
	add	rsi, QWORD PTR 8[r14]
	call	regmap_update_bits@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L5
	mov	edx, DWORD PTR SC27XX_ADC_CHN_RUN[rip]
	mov	edi, DWORD PTR 16[r14]
	mov	rsi, QWORD PTR SC27XX_ADC_CTL[rip]
	add	rsi, QWORD PTR 8[r14]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L5
	mov	ecx, DWORD PTR SC27XX_ADC_IRQ_RAW[rip]
	xor	edx, edx
	mov	edi, DWORD PTR 16[r14]
	mov	r9d, DWORD PTR SC27XX_ADC_RDY_TIMEOUT[rip]
	mov	r8d, DWORD PTR SC27XX_ADC_POLL_RAW_STATUS[rip]
	mov	rsi, QWORD PTR SC27XX_ADC_INT_RAW[rip]
	and	ecx, edx
	add	rsi, QWORD PTR 8[r14]
	call	regmap_read_poll_timeout@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L15
	mov	edi, DWORD PTR 16[r14]
	mov	rsi, QWORD PTR SC27XX_ADC_DATA[rip]
	lea	rdx, 4[rsp]
	add	rsi, QWORD PTR 8[r14]
	call	regmap_read@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L5
	mov	edi, DWORD PTR 16[r14]
	mov	edx, DWORD PTR SC27XX_ADC_EN[rip]
	xor	ecx, ecx
	mov	rsi, QWORD PTR 8[r14]
	add	rsi, QWORD PTR SC27XX_ADC_CTL[rip]
	mov	eax, DWORD PTR SC27XX_ADC_DATA_MASK[rip]
	and	DWORD PTR 4[rsp], eax
	call	regmap_update_bits@PLT
	mov	edi, DWORD PTR [r14]
	call	hwspin_unlock_raw@PLT
	mov	eax, DWORD PTR 4[rsp]
	mov	DWORD PTR 0[r13], eax
	jmp	.L1
.L15:
	mov	edi, DWORD PTR 20[r14]
	xor	edx, edx
	lea	rsi, .LC1[rip]
	xor	eax, eax
	call	dev_err@PLT
	jmp	.L5
.L13:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	sc27xx_adc_read, .-sc27xx_adc_read
	.comm	SC27XX_ADC_SCALE_SHIFT,4,4
	.comm	SC27XX_ADC_SCALE_MASK,4,4
	.comm	SC27XX_ADC_RUN_NUM_SHIFT,4,4
	.comm	SC27XX_ADC_RUN_NUM_MASK,4,4
	.comm	SC27XX_ADC_RDY_TIMEOUT,4,4
	.comm	SC27XX_ADC_POLL_RAW_STATUS,4,4
	.comm	SC27XX_ADC_IRQ_RAW,4,4
	.comm	SC27XX_ADC_IRQ_CLR,4,4
	.comm	SC27XX_ADC_INT_RAW,8,8
	.comm	SC27XX_ADC_INT_CLR,8,8
	.comm	SC27XX_ADC_HWLOCK_TIMEOUT,4,4
	.comm	SC27XX_ADC_EN,4,4
	.comm	SC27XX_ADC_DATA_MASK,4,4
	.comm	SC27XX_ADC_DATA,8,8
	.comm	SC27XX_ADC_CTL,8,8
	.comm	SC27XX_ADC_CH_CFG,8,8
	.comm	SC27XX_ADC_CHN_RUN,4,4
	.comm	SC27XX_ADC_CHN_ID_MASK,4,4
	.comm	SC27XX_ADC_12BIT_MODE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sc27xx_adc.c_sc27xx_adc_read.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"timeout to get the hwspinlock\012\000"
	.align	2
.LC1:
	.ascii	"read adc timeout, status = 0x%x\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sc27xx_adc_read, %function
sc27xx_adc_read:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r7, r1
	ldr	r1, .L16
	mov	r8, r3
	ldr	r3, .L16+4
	sub	sp, sp, #16
	mov	r5, r0
	ldr	r1, [r1]
	ldr	r0, [r0]
	mov	r6, r2
	ldr	r3, [r3]
	str	r3, [sp, #12]
	mov	r3,#0
	bl	hwspin_lock_timeout_raw
	subs	r4, r0, #0
	bne	.L11
	ldr	r10, .L16+8
	ldr	r9, .L16+12
	ldr	r0, [r5, #4]
	ldr	r3, [r10]
	ldr	r1, [r9]
	mov	r2, r3
	add	r1, r0, r1
	ldr	r0, [r5, #8]
	bl	regmap_update_bits
	subs	r4, r0, #0
	beq	.L12
.L9:
	ldr	r0, [r5]
	bl	hwspin_unlock_raw
.L1:
	ldr	r3, .L16+4
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L13
	mov	r0, r4
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L12:
	ldr	r2, .L16+16
	ldr	r3, .L16+20
	ldr	r1, [r2]
	ldr	r0, [r5, #4]
	ldr	r3, [r3]
	add	r1, r0, r1
	mov	r2, r3
	ldr	r0, [r5, #8]
	bl	regmap_update_bits
	subs	r4, r0, #0
	bne	.L5
	ldr	r1, .L16+24
	ldr	r2, .L16+28
	ldr	r3, .L16+32
	ldr	r0, [r1]
	ldr	r1, .L16+36
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	ip, [r5, #4]
	and	r6, r2, r6, lsl r3
	and	r3, r0, r7
	orr	r2, r2, r0
	orr	r3, r3, r6
	ldr	r0, [r5, #8]
	add	r1, ip, r1
	bl	regmap_update_bits
	subs	r4, r0, #0
	beq	.L14
.L5:
	ldr	r3, [r9]
	ldr	r1, [r5, #4]
	ldr	r2, [r10]
	add	r1, r1, r3
	ldr	r0, [r5, #8]
	mov	r3, #0
	bl	regmap_update_bits
	b	.L9
.L11:
	ldr	r0, [r5, #12]
	ldr	r1, .L16+40
	bl	dev_err
	b	.L1
.L14:
	ldr	r3, .L16+44
	ldr	r2, .L16+48
	ldr	r0, [r5, #4]
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, [r9]
	orr	r2, r3, r2
	add	r1, r0, r1
	ldr	r0, [r5, #8]
	bl	regmap_update_bits
	subs	r4, r0, #0
	bne	.L5
	ldr	r3, .L16+52
	ldr	r0, [r5, #4]
	ldr	r3, [r3]
	ldr	r1, [r9]
	mov	r2, r3
	add	r1, r0, r1
	ldr	r0, [r5, #8]
	bl	regmap_update_bits
	subs	r4, r0, #0
	bne	.L5
	ldr	r3, .L16+56
	ldr	r1, .L16+60
	ldr	r3, [r3]
	ldr	r2, .L16+64
	ldr	r0, [r5, #4]
	ldr	r1, [r1]
	ldr	r2, [r2]
	str	r3, [sp]
	mov	r3, #0
	str	r2, [sp, #4]
	add	r1, r0, r1
	mov	r2, r3
	ldr	r0, [r5, #8]
	bl	regmap_read_poll_timeout
	subs	r4, r0, #0
	bne	.L15
	ldr	r3, .L16+68
	ldr	r1, [r5, #4]
	ldr	r3, [r3]
	ldr	r0, [r5, #8]
	add	r2, sp, #8
	add	r1, r1, r3
	bl	regmap_read
	subs	r4, r0, #0
	bne	.L5
	ldr	r3, .L16+72
	ldr	r0, [r9]
	ldr	r3, [r3]
	ldr	ip, [sp, #8]
	ldr	r1, [r5, #4]
	and	ip, ip, r3
	add	r1, r0, r1
	mov	r3, r4
	ldr	r2, [r10]
	ldr	r0, [r5, #8]
	str	ip, [sp, #8]
	bl	regmap_update_bits
	ldr	r0, [r5]
	bl	hwspin_unlock_raw
	ldr	r3, [sp, #8]
	str	r3, [r8]
	b	.L1
.L15:
	mov	r2, #0
	ldr	r1, .L16+76
	ldr	r0, [r5, #12]
	bl	dev_err
	b	.L5
.L13:
	bl	__stack_chk_fail
.L17:
	.align	2
.L16:
	.word	SC27XX_ADC_HWLOCK_TIMEOUT
	.word	.LC2
	.word	SC27XX_ADC_EN
	.word	SC27XX_ADC_CTL
	.word	SC27XX_ADC_INT_CLR
	.word	SC27XX_ADC_IRQ_CLR
	.word	SC27XX_ADC_CHN_ID_MASK
	.word	SC27XX_ADC_SCALE_MASK
	.word	SC27XX_ADC_SCALE_SHIFT
	.word	SC27XX_ADC_CH_CFG
	.word	.LC0
	.word	SC27XX_ADC_12BIT_MODE
	.word	SC27XX_ADC_RUN_NUM_MASK
	.word	SC27XX_ADC_CHN_RUN
	.word	SC27XX_ADC_POLL_RAW_STATUS
	.word	SC27XX_ADC_INT_RAW
	.word	SC27XX_ADC_RDY_TIMEOUT
	.word	SC27XX_ADC_DATA
	.word	SC27XX_ADC_DATA_MASK
	.word	.LC1
	.size	sc27xx_adc_read, .-sc27xx_adc_read
	.comm	SC27XX_ADC_SCALE_SHIFT,4,4
	.comm	SC27XX_ADC_SCALE_MASK,4,4
	.comm	SC27XX_ADC_RUN_NUM_SHIFT,4,4
	.comm	SC27XX_ADC_RUN_NUM_MASK,4,4
	.comm	SC27XX_ADC_RDY_TIMEOUT,4,4
	.comm	SC27XX_ADC_POLL_RAW_STATUS,4,4
	.comm	SC27XX_ADC_IRQ_RAW,4,4
	.comm	SC27XX_ADC_IRQ_CLR,4,4
	.comm	SC27XX_ADC_INT_RAW,4,4
	.comm	SC27XX_ADC_INT_CLR,4,4
	.comm	SC27XX_ADC_HWLOCK_TIMEOUT,4,4
	.comm	SC27XX_ADC_EN,4,4
	.comm	SC27XX_ADC_DATA_MASK,4,4
	.comm	SC27XX_ADC_DATA,4,4
	.comm	SC27XX_ADC_CTL,4,4
	.comm	SC27XX_ADC_CH_CFG,4,4
	.comm	SC27XX_ADC_CHN_RUN,4,4
	.comm	SC27XX_ADC_CHN_ID_MASK,4,4
	.comm	SC27XX_ADC_12BIT_MODE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
