	.file	"extr_s390.c_s390_expand_atomic.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	s390_expand_atomic
	.type	s390_expand_atomic, @function
s390_expand_atomic:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, esi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, r8
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rcx
	sub	rsp, 72
	.cfi_def_cfa_offset 128
	mov	DWORD PTR 12[rsp], r9d
	mov	DWORD PTR 8[rsp], edi
	mov	edi, DWORD PTR SImode[rip]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 56[rsp], rax
	xor	eax, eax
	call	gen_reg_rtx@PLT
	mov	edi, DWORD PTR SImode[rip]
	mov	r12, rax
	call	gen_reg_rtx@PLT
	mov	QWORD PTR [rsp], rax
	xor	eax, eax
	call	gen_label_rtx@PLT
	mov	edi, 1
	mov	r15, rax
	test	r14, r14
	jne	.L35
.L2:
	call	gcc_assert@PLT
	mov	rdi, rbx
	call	MEM_P@PLT
	mov	edi, eax
	call	gcc_assert@PLT
	mov	edx, DWORD PTR 8[rsp]
	lea	rdi, 16[rsp]
	mov	rsi, rbx
	call	init_alignment_context@PLT
	cmp	QWORD PTR 48[rsp], 0
	je	.L3
	cmp	r13d, 129
	je	.L36
.L3:
	mov	rdx, QWORD PTR 16[rsp]
	mov	esi, DWORD PTR 8[rsp]
	mov	rdi, rbp
	call	s390_expand_mask_and_shift@PLT
	mov	rbp, rax
	lea	eax, -130[r13]
	and	eax, -3
	je	.L37
	mov	edi, DWORD PTR SImode[rip]
	cmp	r13d, 131
	je	.L20
	cmp	r13d, 134
	je	.L20
.L7:
	mov	esi, DWORD PTR 24[rsp]
	call	force_reg@PLT
	mov	rdi, r15
	mov	rbx, rax
	call	emit_label@PLT
	mov	rsi, rbx
	mov	rdi, r12
	call	emit_move_insn@PLT
	lea	eax, -128[r13]
	cmp	eax, 6
	ja	.L9
	lea	rdx, .L11[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L11:
	.long	.L10-.L11
	.long	.L5-.L11
	.long	.L12-.L11
	.long	.L13-.L11
	.long	.L12-.L11
	.long	.L10-.L11
	.long	.L10-.L11
	.text
	.p2align 4,,10
	.p2align 3
.L10:
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	rdx, r12
	mov	rcx, rbp
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	edi, DWORD PTR SImode[rip]
	mov	r9d, 1
	mov	esi, r13d
	push	rax
	.cfi_def_cfa_offset 144
	call	expand_simple_binop@PLT
	pop	r8
	.cfi_def_cfa_offset 136
	pop	r9
	.cfi_def_cfa_offset 128
	mov	r12, rax
.L15:
	mov	edi, DWORD PTR NE[rip]
	mov	edx, DWORD PTR 24[rsp]
	mov	rsi, rbx
	mov	r8, r12
	mov	rcx, rbx
	call	s390_emit_compare_and_swap@PLT
	mov	rdi, r15
	mov	esi, eax
	call	s390_emit_jump@PLT
	test	r14, r14
	je	.L1
	mov	eax, DWORD PTR 12[rsp]
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	r9d, 1
	mov	esi, DWORD PTR LSHIFTRT[rip]
	mov	edi, DWORD PTR SImode[rip]
	test	eax, eax
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	cmove	r12, rbx
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	push	rax
	.cfi_def_cfa_offset 144
	mov	rcx, QWORD PTR 32[rsp]
	mov	rdx, r12
	call	expand_simple_binop@PLT
	mov	edx, 1
	mov	rdi, r14
	mov	rsi, rax
	call	convert_move@PLT
	pop	rdx
	.cfi_def_cfa_offset 136
	pop	rcx
	.cfi_def_cfa_offset 128
.L1:
	mov	rax, QWORD PTR 56[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L38
	add	rsp, 72
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	esi, r13d
	mov	rdx, r12
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	edi, DWORD PTR SImode[rip]
	mov	r9d, 1
	push	rax
	.cfi_def_cfa_offset 144
	mov	rcx, QWORD PTR 16[rsp]
	call	expand_simple_binop@PLT
	mov	rcx, QWORD PTR 48[rsp]
	mov	esi, 134
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	rdx, rax
	mov	edi, DWORD PTR SImode[rip]
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	mov	r9d, 1
	mov	DWORD PTR [rsp], eax
	call	expand_simple_binop@PLT
	pop	r13
	.cfi_def_cfa_offset 136
	mov	rbp, rax
	pop	rax
	.cfi_def_cfa_offset 128
.L5:
	cmp	QWORD PTR 48[rsp], 0
	je	.L14
	mov	rdi, rbp
	call	MEM_P@PLT
	test	eax, eax
	jne	.L39
.L14:
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	rdx, r12
	mov	edi, DWORD PTR SImode[rip]
	mov	r9d, 1
	mov	esi, 134
	push	rax
	.cfi_def_cfa_offset 144
	mov	rcx, QWORD PTR 56[rsp]
	call	expand_simple_binop@PLT
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	rcx, rbp
	mov	esi, 133
	mov	rdx, rax
	mov	edi, DWORD PTR SImode[rip]
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	mov	r9d, 1
	mov	DWORD PTR [rsp], eax
	call	expand_simple_binop@PLT
	pop	r10
	.cfi_def_cfa_offset 136
	pop	r11
	.cfi_def_cfa_offset 128
	mov	r12, rax
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L13:
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	rdx, r12
	mov	edi, DWORD PTR SImode[rip]
	mov	r9d, 1
	mov	esi, 128
	push	rax
	.cfi_def_cfa_offset 144
	mov	rcx, QWORD PTR 48[rsp]
	call	expand_simple_binop@PLT
	mov	edi, DWORD PTR SImode[rip]
	mov	esi, 134
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	rdx, rax
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	mov	r9d, 1
	mov	rcx, rbp
	mov	DWORD PTR [rsp], eax
	call	expand_simple_binop@PLT
	pop	rsi
	.cfi_def_cfa_offset 136
	pop	rdi
	.cfi_def_cfa_offset 128
	mov	r12, rax
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L20:
	mov	eax, DWORD PTR OPTAB_DIRECT[rip]
	sub	rsp, 8
	.cfi_def_cfa_offset 136
	mov	rdx, rbp
	mov	r9d, 1
	mov	r8d, DWORD PTR NULL_RTX[rip]
	mov	esi, 128
	push	rax
	.cfi_def_cfa_offset 144
	mov	rcx, QWORD PTR 56[rsp]
	call	expand_simple_binop@PLT
	mov	edi, DWORD PTR SImode[rip]
	mov	rbp, rax
	pop	rax
	.cfi_def_cfa_offset 136
	pop	rdx
	.cfi_def_cfa_offset 128
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L37:
	mov	rdi, QWORD PTR [rsp]
	mov	rsi, rbp
	call	emit_move_insn@PLT
	mov	edi, DWORD PTR SImode[rip]
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L35:
	mov	esi, DWORD PTR VOIDmode[rip]
	mov	rdi, r14
	call	register_operand@PLT
	xor	edi, edi
	test	rax, rax
	setne	dil
	jmp	.L2
.L9:
	xor	eax, eax
	call	gcc_unreachable@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L36:
	mov	rdi, rbp
	call	MEM_P@PLT
	test	eax, eax
	jne	.L33
	mov	rdx, QWORD PTR 16[rsp]
	mov	esi, DWORD PTR 8[rsp]
	mov	rdi, rbp
	call	s390_expand_mask_and_shift@PLT
	mov	rbp, rax
.L33:
	mov	esi, DWORD PTR 24[rsp]
	mov	edi, DWORD PTR SImode[rip]
	call	force_reg@PLT
	mov	rdi, r15
	mov	rbx, rax
	call	emit_label@PLT
	mov	rsi, rbx
	mov	rdi, r12
	call	emit_move_insn@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L39:
	mov	edi, DWORD PTR 8[rsp]
	mov	r13d, DWORD PTR SImode[rip]
	call	GET_MODE_BITSIZE@PLT
	mov	r8, rbp
	mov	ecx, r13d
	xor	edx, edx
	mov	esi, eax
	mov	rdi, r12
	call	store_bit_field@PLT
	jmp	.L15
.L38:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	s390_expand_atomic, .-s390_expand_atomic
	.comm	VOIDmode,4,4
	.comm	SImode,4,4
	.comm	OPTAB_DIRECT,4,4
	.comm	NULL_RTX,4,4
	.comm	NE,4,4
	.comm	LSHIFTRT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_s390.c_s390_expand_atomic.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	s390_expand_atomic
	.syntax unified
	.arm
	.fpu softvfp
	.type	s390_expand_atomic, %function
s390_expand_atomic:
	@ args = 8, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r8, .L40
	mov	r7, r3
	ldr	r3, .L40+4
	sub	sp, sp, #52
	mov	fp, r0
	ldr	r0, [r8]
	mov	r9, r2
	mov	r6, r1
	ldr	r3, [r3]
	str	r3, [sp, #44]
	mov	r3,#0
	ldr	r5, [sp, #88]
	bl	gen_reg_rtx
	mov	r4, r0
	ldr	r0, [r8]
	bl	gen_reg_rtx
	str	r0, [sp, #20]
	bl	gen_label_rtx
	cmp	r9, #0
	mov	r10, r0
	moveq	r0, #1
	bne	.L34
.L2:
	bl	gcc_assert
	mov	r0, r7
	bl	MEM_P
	bl	gcc_assert
	mov	r2, fp
	mov	r1, r7
	add	r0, sp, #24
	bl	init_alignment_context
	ldr	r2, [sp, #40]
	subs	r3, r6, #129
	movne	r3, #1
	cmp	r2, #0
	moveq	r3, #1
	cmp	r3, #0
	mov	r0, r5
	beq	.L35
	mov	r1, fp
	ldr	r2, [sp, #24]
	bl	s390_expand_mask_and_shift
	sub	r3, r6, #130
	bics	r3, r3, #2
	mov	r5, r0
	beq	.L36
	cmp	r6, #134
	cmpne	r6, #131
	ldr	r0, [r8]
	beq	.L37
.L7:
	ldr	r1, [sp, #28]
	bl	force_reg
	mov	r7, r0
	mov	r0, r10
	bl	emit_label
	mov	r1, r7
	mov	r0, r4
	bl	emit_move_insn
	sub	r3, r6, #128
	cmp	r3, #6
	ldrls	pc, [pc, r3, asl #2]
	b	.L8
.L10:
	.word	.L9
	.word	.L5
	.word	.L11
	.word	.L12
	.word	.L11
	.word	.L9
	.word	.L9
.L9:
	mov	r0, #1
	ldr	r2, .L40+8
	ldr	r3, .L40+12
	ldr	lr, [r2]
	ldr	ip, [r3]
	mov	r2, r4
	str	r0, [sp, #4]
	mov	r3, r5
	mov	r1, r6
	ldr	r0, [r8]
	str	lr, [sp, #8]
	str	ip, [sp]
	bl	expand_simple_binop
	mov	r4, r0
.L14:
	ldr	r3, .L40+16
	str	r4, [sp]
	mov	r1, r7
	ldr	r0, [r3]
	ldr	r2, [sp, #28]
	mov	r3, r7
	bl	s390_emit_compare_and_swap
	mov	r1, r0
	mov	r0, r10
	bl	s390_emit_jump
	cmp	r9, #0
	beq	.L1
	mov	r5, #1
	ldr	r3, .L40+12
	ldr	r2, .L40+8
	ldr	r1, [r3]
	ldr	r3, [sp, #92]
	ldr	ip, [r2]
	cmp	r3, #0
	ldr	r3, .L40+20
	movne	r2, r4
	moveq	r2, r7
	stm	sp, {r1, r5, ip}
	ldr	r0, [r8]
	ldr	r1, [r3]
	ldr	r3, [sp, #24]
	bl	expand_simple_binop
	mov	r2, r5
	mov	r1, r0
	mov	r0, r9
	bl	convert_move
.L1:
	ldr	r3, .L40+4
	ldr	r2, [r3]
	ldr	r3, [sp, #44]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L38
	add	sp, sp, #52
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	mov	r1, r6
	mov	r6, #1
	ldr	r5, .L40+12
	ldr	r3, .L40+8
	ldr	r2, [r5]
	ldr	r0, [r3]
	ldr	r3, [sp, #20]
	str	r0, [sp, #8]
	str	r2, [sp]
	ldr	r0, [r8]
	mov	r2, r4
	str	r6, [sp, #4]
	bl	expand_simple_binop
	ldr	r3, .L40+8
	mov	r2, r0
	ldr	r1, [r3]
	ldr	r3, [r5]
	ldr	r0, [r8]
	stm	sp, {r3, r6}
	str	r1, [sp, #8]
	ldr	r3, [sp, #32]
	mov	r1, #134
	bl	expand_simple_binop
	mov	r5, r0
.L5:
	ldr	r3, [sp, #40]
	cmp	r3, #0
	beq	.L13
	mov	r0, r5
	bl	MEM_P
	cmp	r0, #0
	bne	.L39
.L13:
	mov	r2, r4
	mov	r4, #1
	ldr	fp, .L40+8
	ldr	r6, .L40+12
	ldr	r1, [fp]
	ldr	r3, [r6]
	ldr	r0, [r8]
	str	r1, [sp, #8]
	str	r3, [sp]
	mov	r1, #134
	ldr	r3, [sp, #36]
	str	r4, [sp, #4]
	bl	expand_simple_binop
	ldr	r1, [fp]
	ldr	r3, [r6]
	mov	r2, r0
	stm	sp, {r3, r4}
	str	r1, [sp, #8]
	mov	r3, r5
	mov	r1, #133
	ldr	r0, [r8]
	bl	expand_simple_binop
	mov	r4, r0
	b	.L14
.L37:
	mov	r3, #1
	ldr	r1, .L40+8
	ldr	r2, .L40+12
	ldr	ip, [r1]
	ldr	r1, [r2]
	mov	r2, r5
	stm	sp, {r1, r3, ip}
	mov	r1, #128
	ldr	r3, [sp, #36]
	bl	expand_simple_binop
	mov	r5, r0
	ldr	r0, [r8]
	b	.L7
.L12:
	mov	r2, r4
	mov	r4, #1
	ldr	fp, .L40+8
	ldr	r6, .L40+12
	ldr	r1, [fp]
	ldr	r3, [r6]
	ldr	r0, [r8]
	str	r1, [sp, #8]
	str	r3, [sp]
	mov	r1, #128
	ldr	r3, [sp, #32]
	str	r4, [sp, #4]
	bl	expand_simple_binop
	ldr	r1, [fp]
	ldr	r3, [r6]
	mov	r2, r0
	stm	sp, {r3, r4}
	str	r1, [sp, #8]
	mov	r3, r5
	mov	r1, #134
	ldr	r0, [r8]
	bl	expand_simple_binop
	mov	r4, r0
	b	.L14
.L34:
	ldr	r3, .L40+24
	mov	r0, r9
	ldr	r1, [r3]
	bl	register_operand
	subs	r0, r0, #0
	movne	r0, #1
	b	.L2
.L36:
	mov	r1, r0
	ldr	r0, [sp, #20]
	bl	emit_move_insn
	ldr	r0, [r8]
	b	.L7
.L39:
	mov	r0, fp
	bl	GET_MODE_BITSIZE
	mov	r2, #0
	mov	r1, r0
	ldr	r3, [r8]
	mov	r0, r4
	str	r5, [sp]
	bl	store_bit_field
	b	.L14
.L35:
	bl	MEM_P
	cmp	r0, #0
	bne	.L32
	mov	r0, r5
	mov	r1, fp
	ldr	r2, [sp, #24]
	bl	s390_expand_mask_and_shift
	mov	r5, r0
.L32:
	ldr	r1, [sp, #28]
	ldr	r0, [r8]
	bl	force_reg
	mov	r7, r0
	mov	r0, r10
	bl	emit_label
	mov	r1, r7
	mov	r0, r4
	bl	emit_move_insn
	b	.L5
.L38:
	bl	__stack_chk_fail
.L8:
	bl	gcc_unreachable
	b	.L14
.L41:
	.align	2
.L40:
	.word	SImode
	.word	.LC0
	.word	OPTAB_DIRECT
	.word	NULL_RTX
	.word	NE
	.word	LSHIFTRT
	.word	VOIDmode
	.size	s390_expand_atomic, .-s390_expand_atomic
	.comm	VOIDmode,4,4
	.comm	SImode,4,4
	.comm	OPTAB_DIRECT,4,4
	.comm	NULL_RTX,4,4
	.comm	NE,4,4
	.comm	LSHIFTRT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
