	.file	"extr_dtl1_cs.c_dtl1_interrupt.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"RLSI"
.LC1:
	.string	"Unhandled IIR=%#x"
	.text
	.p2align 4
	.type	dtl1_interrupt, @function
dtl1_interrupt:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xor	edi, edi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	eax, DWORD PTR 24[rsi]
	mov	r12d, DWORD PTR IRQ_NONE[rip]
	test	eax, eax
	sete	dil
	call	BUG_ON@PLT
	mov	rax, QWORD PTR 16[r13]
	mov	ebp, DWORD PTR [rax]
	lea	rax, 4[r13]
	mov	rdi, rax
	mov	QWORD PTR 8[rsp], rax
	call	spin_lock@PLT
	mov	rdi, QWORD PTR UART_IIR[rip]
	add	rdi, rbp
	call	inb@PLT
	and	eax, DWORD PTR UART_IIR_ID[rip]
	je	.L2
	mov	r15d, eax
	mov	ebx, 102
	lea	r14, .LC0[rip]
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L24:
	cmp	r15d, 128
	je	.L23
	mov	esi, r15d
	lea	rdi, .LC1[rip]
	xor	eax, eax
	call	BT_ERR@PLT
.L7:
	sub	ebx, 1
	je	.L2
.L25:
	mov	rdi, QWORD PTR UART_IIR[rip]
	add	rdi, rbp
	call	inb@PLT
	and	eax, DWORD PTR UART_IIR_ID[rip]
	mov	r15d, eax
	je	.L2
.L8:
	mov	rdi, QWORD PTR UART_LSR[rip]
	mov	r12d, DWORD PTR IRQ_HANDLED[rip]
	add	rdi, rbp
	call	inb@PLT
	cmp	r15d, 129
	je	.L3
	cmp	r15d, 130
	jne	.L24
	mov	rdi, r13
	call	dtl1_receive@PLT
	sub	ebx, 1
	jne	.L25
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rdi, QWORD PTR UART_MSR[rip]
	add	rdi, rbp
	call	inb@PLT
	and	al, BYTE PTR UART_MSR_RI[rip]
	cmp	BYTE PTR 0[r13], al
	je	.L9
	mov	BYTE PTR 0[r13], al
	mov	edi, DWORD PTR XMIT_WAITING[rip]
	lea	rsi, 8[r13]
	call	clear_bit@PLT
	mov	rdi, r13
	call	dtl1_write_wakeup@PLT
	mov	r12d, DWORD PTR IRQ_HANDLED[rip]
.L9:
	mov	rdi, QWORD PTR 8[rsp]
	call	spin_unlock@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	rdi, r14
	xor	eax, eax
	call	BT_ERR@PLT
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L23:
	test	DWORD PTR UART_LSR_THRE[rip], eax
	je	.L7
	mov	rdi, r13
	call	dtl1_write_wakeup@PLT
	jmp	.L7
	.cfi_endproc
.LFE0:
	.size	dtl1_interrupt, .-dtl1_interrupt
	.comm	XMIT_WAITING,4,4
	.comm	UART_MSR_RI,1,1
	.comm	UART_MSR,8,8
	.comm	UART_LSR_THRE,4,4
	.comm	UART_LSR,8,8
	.comm	UART_IIR_ID,4,4
	.comm	UART_IIR,8,8
	.comm	IRQ_NONE,4,4
	.comm	IRQ_HANDLED,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_dtl1_cs.c_dtl1_interrupt.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"RLSI\000"
	.align	2
.LC1:
	.ascii	"Unhandled IIR=%#x\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dtl1_interrupt, %function
dtl1_interrupt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r0, [r1, #16]
	ldr	r3, .L27
	clz	r0, r0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	fp, r1
	ldr	r6, [r3]
	add	r3, r1, #4
	mov	r4, r3
	sub	sp, sp, #12
	lsr	r0, r0, #5
	str	r3, [sp, #4]
	ldr	r8, .L27+4
	bl	BUG_ON
	ldr	r3, [fp, #12]
	mov	r0, r4
	ldr	r5, [r3]
	bl	spin_lock
	ldr	r0, [r8]
	ldr	r7, .L27+8
	add	r0, r5, r0
	bl	inb
	ldr	r1, [r7]
	ands	r10, r0, r1
	beq	.L2
	mov	r4, #102
	ldr	r9, .L27+12
	b	.L8
.L25:
	cmp	r10, #128
	beq	.L24
	mov	r1, r10
	ldr	r0, .L27+16
	bl	BT_ERR
.L7:
	subs	r4, r4, #1
	beq	.L2
.L26:
	ldr	r0, [r8]
	add	r0, r5, r0
	bl	inb
	ldr	r10, [r7]
	ands	r10, r0, r10
	beq	.L2
.L8:
	ldr	r0, [r9]
	ldr	r3, .L27+20
	add	r0, r5, r0
	ldr	r6, [r3]
	bl	inb
	cmp	r10, #129
	beq	.L3
	cmp	r10, #130
	bne	.L25
	mov	r0, fp
	bl	dtl1_receive
	subs	r4, r4, #1
	bne	.L26
.L2:
	ldr	r3, .L27+24
	ldr	r0, [r3]
	add	r0, r5, r0
	bl	inb
	ldr	r3, .L27+28
	ldrb	r2, [fp]	@ zero_extendqisi2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r0, r3
	cmp	r2, r0
	beq	.L9
	mov	r1, fp
	ldr	r3, .L27+32
	strb	r0, [r1], #8
	ldr	r0, [r3]
	bl	clear_bit
	mov	r0, fp
	bl	dtl1_write_wakeup
	ldr	r3, .L27+20
	ldr	r6, [r3]
.L9:
	ldr	r0, [sp, #4]
	bl	spin_unlock
	mov	r0, r6
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	ldr	r0, .L27+36
	bl	BT_ERR
	b	.L7
.L24:
	ldr	r3, .L27+40
	ldr	r3, [r3]
	tst	r0, r3
	beq	.L7
	mov	r0, fp
	bl	dtl1_write_wakeup
	b	.L7
.L28:
	.align	2
.L27:
	.word	IRQ_NONE
	.word	UART_IIR
	.word	UART_IIR_ID
	.word	UART_LSR
	.word	.LC1
	.word	IRQ_HANDLED
	.word	UART_MSR
	.word	UART_MSR_RI
	.word	XMIT_WAITING
	.word	.LC0
	.word	UART_LSR_THRE
	.size	dtl1_interrupt, .-dtl1_interrupt
	.comm	XMIT_WAITING,4,4
	.comm	UART_MSR_RI,1,1
	.comm	UART_MSR,4,4
	.comm	UART_LSR_THRE,4,4
	.comm	UART_LSR,4,4
	.comm	UART_IIR_ID,4,4
	.comm	UART_IIR,4,4
	.comm	IRQ_NONE,4,4
	.comm	IRQ_HANDLED,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
