	.file	"extr_hevcdsp_msa.c_hevc_hv_4t_8multx4_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	hevc_hv_4t_8multx4_msa, @function
hevc_hv_4t_8multx4_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	lea	rax, 0[0+rsi*4]
	mov	r10, rdi
	mov	rdi, r8
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	sub	r10, rax
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	lea	rax, -4[r10]
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, r9
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 88
	.cfi_def_cfa_offset 144
	mov	QWORD PTR 64[rsp], rsi
	mov	rbx, QWORD PTR 144[rsp]
	mov	QWORD PTR 40[rsp], rdx
	mov	QWORD PTR 72[rsp], rcx
	mov	QWORD PTR 32[rsp], rax
	call	LD_SH@PLT
	xor	r8d, r8d
	xor	ecx, ecx
	mov	edx, 1
	xor	esi, esi
	mov	edi, eax
	call	SPLATI_H2_SH@PLT
	mov	rdi, rbp
	call	LD_SH@PLT
	mov	ebp, eax
	mov	esi, eax
	mov	edi, eax
	call	UNPCK_R_SB_SH@PLT
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	mov	edi, ebp
	call	SPLATI_W2_SH@PLT
	mov	edi, DWORD PTR ff_hevc_mask_arr[rip]
	call	LD_SB@PLT
	mov	edi, 128
	mov	QWORD PTR [rsp], rax
	add	rax, 2
	mov	QWORD PTR 8[rsp], rax
	call	__msa_ldi_h@PLT
	sal	eax, 6
	mov	ebp, eax
	lea	rax, -1[rbx]
	mov	QWORD PTR 16[rsp], rax
	test	rbx, rbx
	je	.L1
	.p2align 4,,10
	.p2align 3
.L3:
	xor	ebx, ebx
	xor	r15d, r15d
	sub	rsp, 8
	.cfi_def_cfa_offset 152
	xor	r14d, r14d
	push	r14
	.cfi_def_cfa_offset 160
	xor	r12d, r12d
	xor	r13d, r13d
	xor	r10d, r10d
	push	r15
	.cfi_def_cfa_offset 168
	xor	r11d, r11d
	mov	r9, r10
	mov	r8, r12
	push	rbx
	.cfi_def_cfa_offset 176
	mov	rsi, QWORD PTR 96[rsp]
	mov	rcx, r13
	mov	rdx, r11
	mov	rdi, QWORD PTR 64[rsp]
	call	LD_SB7@PLT
	xor	r10d, r10d
	xor	r11d, r11d
	mov	r9, r15
	add	QWORD PTR 64[rsp], 32
	add	rsp, 24
	.cfi_def_cfa_offset 152
	mov	rcx, r10
	mov	r8, rbx
	push	r14
	.cfi_def_cfa_offset 160
	mov	rdx, r12
	mov	rsi, r13
	mov	rdi, r11
	call	XORI_B7_128_SB@PLT
	push	0
	.cfi_def_cfa_offset 168
	xor	r11d, r11d
	push	0
	.cfi_def_cfa_offset 176
	mov	r9, QWORD PTR 40[rsp]
	mov	rcx, r11
	mov	rdx, r11
	mov	r8, QWORD PTR 32[rsp]
	mov	rsi, r11
	mov	rdi, r11
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 144
	mov	rcx, r13
	mov	rdx, r13
	push	0
	.cfi_def_cfa_offset 152
	mov	rsi, r13
	mov	rdi, r13
	push	0
	.cfi_def_cfa_offset 160
	mov	r9, QWORD PTR 24[rsp]
	mov	r8, QWORD PTR 16[rsp]
	call	VSHF_B2_SB@PLT
	xor	r11d, r11d
	push	0
	.cfi_def_cfa_offset 168
	mov	rcx, r12
	push	r11
	.cfi_def_cfa_offset 176
	mov	r9, QWORD PTR 40[rsp]
	mov	rdx, r12
	mov	rsi, r12
	mov	r8, QWORD PTR 32[rsp]
	mov	rdi, r12
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 144
	mov	ecx, r13d
	mov	edx, r12d
	xor	esi, esi
	xor	edi, edi
	mov	r9d, ebp
	mov	r8d, ebp
	call	DPADD_SB2_SH@PLT
	mov	ecx, r13d
	mov	edx, r12d
	xor	esi, esi
	xor	edi, edi
	mov	r9d, ebp
	mov	r8d, ebp
	call	DPADD_SB2_SH@PLT
	xor	r11d, r11d
	mov	r9d, ebp
	mov	r8d, ebp
	mov	rdi, r11
	mov	ecx, r13d
	mov	edx, r12d
	xor	esi, esi
	call	DPADD_SB2_SH@PLT
	xor	ecx, ecx
	xor	edx, edx
	mov	esi, ebp
	mov	edi, ebp
	call	ILVRL_H2_SH@PLT
	xor	ecx, ecx
	xor	edx, edx
	mov	esi, ebp
	mov	edi, ebp
	call	ILVRL_H2_SH@PLT
	push	0
	.cfi_def_cfa_offset 152
	xor	r10d, r10d
	push	0
	.cfi_def_cfa_offset 160
	mov	r9, QWORD PTR 24[rsp]
	mov	rcx, r10
	mov	rdx, r10
	mov	r8, QWORD PTR 16[rsp]
	mov	rsi, r10
	mov	rdi, r10
	call	VSHF_B2_SB@PLT
	push	0
	.cfi_def_cfa_offset 168
	mov	rcx, rbx
	mov	rdx, rbx
	push	0
	.cfi_def_cfa_offset 176
	mov	r9, QWORD PTR 40[rsp]
	mov	rsi, rbx
	mov	rdi, rbx
	mov	r8, QWORD PTR 32[rsp]
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 144
	xor	r11d, r11d
	mov	rcx, r15
	push	0
	.cfi_def_cfa_offset 152
	mov	rdx, r15
	mov	rsi, r15
	mov	rdi, r15
	push	r11
	.cfi_def_cfa_offset 160
	mov	r9, QWORD PTR 24[rsp]
	mov	r8, QWORD PTR 16[rsp]
	call	VSHF_B2_SB@PLT
	push	rbx
	.cfi_def_cfa_offset 168
	mov	rcx, r14
	mov	rdx, r14
	push	r15
	.cfi_def_cfa_offset 176
	mov	r9, QWORD PTR 40[rsp]
	mov	rsi, r14
	mov	rdi, r14
	mov	r8, QWORD PTR 32[rsp]
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 144
	mov	ecx, r13d
	mov	edx, r12d
	xor	esi, esi
	xor	edi, edi
	mov	r9d, ebp
	mov	r8d, ebp
	call	DPADD_SB2_SH@PLT
	mov	ecx, r13d
	mov	edx, r12d
	xor	esi, esi
	xor	edi, edi
	mov	r9d, ebp
	mov	r8d, ebp
	call	DPADD_SB2_SH@PLT
	xor	r11d, r11d
	mov	ecx, r13d
	mov	edx, r12d
	mov	rdi, r11
	xor	esi, esi
	mov	r9d, ebp
	mov	r8d, ebp
	call	DPADD_SB2_SH@PLT
	mov	r9d, ebp
	mov	r8d, ebp
	mov	ecx, r13d
	mov	edx, r12d
	mov	rsi, rbx
	mov	rdi, r15
	call	DPADD_SB2_SH@PLT
	mov	ecx, r15d
	mov	edx, r14d
	mov	esi, ebp
	mov	edi, ebp
	call	ILVRL_H2_SH@PLT
	xor	ecx, ecx
	xor	edx, edx
	mov	esi, ebp
	mov	edi, ebp
	call	ILVRL_H2_SH@PLT
	xor	r10d, r10d
	xor	r11d, r11d
	mov	esi, ebp
	mov	ecx, r10d
	mov	edx, r11d
	mov	edi, ebp
	call	ILVRL_H2_SH@PLT
	xor	r8d, r8d
	xor	r9d, r9d
	mov	esi, ebp
	mov	ecx, r8d
	mov	edx, r9d
	mov	edi, ebp
	call	ILVRL_H2_SH@PLT
	xor	edi, edi
	mov	ecx, r12d
	mov	edx, ebx
	mov	esi, r14d
	call	HEVC_FILT_4TAP@PLT
	mov	ecx, r12d
	mov	edx, ebx
	mov	esi, r15d
	xor	edi, edi
	mov	DWORD PTR 48[rsp], eax
	call	HEVC_FILT_4TAP@PLT
	mov	ecx, r12d
	mov	edx, ebx
	xor	esi, esi
	xor	edi, edi
	mov	DWORD PTR 52[rsp], eax
	call	HEVC_FILT_4TAP@PLT
	mov	ecx, r12d
	mov	edx, ebx
	xor	esi, esi
	xor	edi, edi
	mov	r13d, eax
	call	HEVC_FILT_4TAP@PLT
	xor	r11d, r11d
	mov	ecx, r12d
	mov	edx, ebx
	mov	esi, r11d
	mov	edi, r14d
	mov	DWORD PTR 28[rsp], eax
	call	HEVC_FILT_4TAP@PLT
	xor	r10d, r10d
	mov	ecx, r12d
	mov	edx, ebx
	mov	esi, r10d
	mov	edi, r15d
	mov	r14d, eax
	call	HEVC_FILT_4TAP@PLT
	xor	r9d, r9d
	mov	ecx, r12d
	mov	edx, ebx
	mov	esi, r9d
	xor	edi, edi
	mov	DWORD PTR 60[rsp], eax
	call	HEVC_FILT_4TAP@PLT
	xor	r8d, r8d
	mov	ecx, r12d
	mov	edx, ebx
	mov	esi, r8d
	xor	edi, edi
	mov	r15d, eax
	call	HEVC_FILT_4TAP@PLT
	mov	ebx, DWORD PTR 48[rsp]
	mov	ecx, DWORD PTR 28[rsp]
	mov	edx, r13d
	mov	r12d, DWORD PTR 52[rsp]
	mov	r8d, 6
	mov	DWORD PTR 56[rsp], eax
	mov	edi, ebx
	mov	esi, r12d
	call	SRA_4V@PLT
	mov	r11d, DWORD PTR 56[rsp]
	mov	edx, r15d
	mov	edi, r14d
	mov	r10d, DWORD PTR 60[rsp]
	mov	r8d, 6
	mov	ecx, r11d
	mov	DWORD PTR 52[rsp], r11d
	mov	esi, r10d
	mov	DWORD PTR 48[rsp], r10d
	call	SRA_4V@PLT
	mov	edx, DWORD PTR 28[rsp]
	mov	edi, r12d
	mov	r9d, r13d
	mov	r8d, ebx
	mov	ecx, r13d
	mov	esi, ebx
	call	PCKEV_H2_SW@PLT
	mov	r11d, DWORD PTR 52[rsp]
	mov	r9d, r15d
	mov	r8d, r14d
	mov	r10d, DWORD PTR 48[rsp]
	mov	ecx, r15d
	mov	esi, r14d
	mov	edx, r11d
	mov	edi, r10d
	call	PCKEV_H2_SW@PLT
	mov	r12, QWORD PTR 40[rsp]
	mov	ecx, r15d
	mov	edx, r14d
	mov	r9, QWORD PTR 72[rsp]
	mov	esi, r13d
	mov	edi, ebx
	mov	r8, r12
	call	ST_SW4@PLT
	mov	rax, r12
	sub	QWORD PTR 16[rsp], 1
	add	rax, 32
	mov	QWORD PTR 40[rsp], rax
	mov	rax, QWORD PTR 16[rsp]
	cmp	rax, -1
	jne	.L3
.L1:
	add	rsp, 88
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	hevc_hv_4t_8multx4_msa, .-hevc_hv_4t_8multx4_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevcdsp_msa.c_hevc_hv_4t_8multx4_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	hevc_hv_4t_8multx4_msa, %function
hevc_hv_4t_8multx4_msa:
	@ args = 12, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	ip, r1
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #60
	mvn	ip, ip
	str	r1, [sp, #48]
	mov	r1, r0
	mov	r4, #0
	str	r3, [sp, #52]
	ldr	r0, [sp, #96]
	add	r3, r1, ip, lsl #2
	ldr	r5, [sp, #104]
	str	r2, [sp, #44]
	str	r3, [sp, #32]
	bl	LD_SH
	mov	r3, r4
	mov	r2, #1
	mov	r1, r4
	str	r4, [sp]
	bl	SPLATI_H2_SH
	ldr	r0, [sp, #100]
	bl	LD_SH
	mov	r1, r0
	mov	r4, r0
	bl	UNPCK_R_SB_SH
	mov	r3, #0
	mov	r0, r4
	mov	r1, r3
	mov	r2, r3
	bl	SPLATI_W2_SH
	ldr	r3, .L10
	sub	r2, r5, #1
	ldr	r0, [r3]
	str	r2, [sp, #40]
	bl	LD_SB
	mov	r3, r0
	mov	r4, r3
	mov	r0, #128
	str	r3, [sp, #24]
	bl	__msa_ldi_h
	add	r3, r4, #2
	cmp	r5, #0
	str	r3, [sp, #28]
	beq	.L1
	lsl	r9, r0, #6
.L3:
	mov	r4, #0
	ldr	r1, [sp, #48]
	mov	r3, r4
	mov	r2, r4
	str	r4, [sp, #16]
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	str	r4, [sp, #4]
	str	r4, [sp]
	ldr	r0, [sp, #32]
	bl	LD_SB7
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #8]
	str	r4, [sp, #4]
	str	r4, [sp]
	bl	XORI_B7_128_SB
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	bl	VSHF_B2_SB
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	bl	VSHF_B2_SB
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	bl	VSHF_B2_SB
	mov	r1, r4
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r9
	mov	r0, r9
	bl	ILVRL_H2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r9
	mov	r0, r9
	bl	ILVRL_H2_SH
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	bl	VSHF_B2_SB
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	bl	VSHF_B2_SB
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	bl	VSHF_B2_SB
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #24]
	mov	r1, r4
	mov	r0, r4
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r4
	mov	r2, r4
	str	r4, [sp, #12]
	str	r4, [sp, #8]
	bl	VSHF_B2_SB
	mov	r1, r4
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r1, r4
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r1, r4
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r9
	mov	r0, r9
	bl	ILVRL_H2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r9
	mov	r0, r9
	bl	ILVRL_H2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r9
	mov	r0, r9
	bl	ILVRL_H2_SH
	mov	r3, r4
	mov	r2, r4
	mov	r1, r9
	mov	r0, r9
	bl	ILVRL_H2_SH
	mov	r1, r4
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	bl	HEVC_FILT_4TAP
	mov	r3, r4
	mov	r6, r0
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	bl	HEVC_FILT_4TAP
	mov	ip, r0
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	str	ip, [sp, #36]
	bl	HEVC_FILT_4TAP
	mov	r3, r4
	mov	r7, r0
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	bl	HEVC_FILT_4TAP
	mov	r1, r4
	mov	fp, r0
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	bl	HEVC_FILT_4TAP
	mov	r1, r4
	mov	r8, r0
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	bl	HEVC_FILT_4TAP
	mov	r1, r4
	mov	r10, r0
	mov	r3, r4
	mov	r2, r4
	mov	r0, r4
	bl	HEVC_FILT_4TAP
	mov	ip, r0
	mov	r3, r4
	mov	r2, r4
	mov	r1, r4
	mov	r0, r4
	mov	r4, ip
	bl	HEVC_FILT_4TAP
	mov	r3, #6
	mov	r5, r0
	mov	r2, r7
	ldr	r1, [sp, #36]
	str	r3, [sp]
	mov	r0, r6
	mov	r3, fp
	bl	SRA_4V
	mov	r3, #6
	mov	r2, r4
	mov	r1, r10
	str	r3, [sp]
	mov	r0, r8
	mov	r3, r5
	bl	SRA_4V
	mov	r2, fp
	mov	r3, r7
	mov	r1, r6
	stm	sp, {r6, r7}
	ldr	r0, [sp, #36]
	bl	PCKEV_H2_SW
	ldr	ip, [sp, #40]
	mov	r2, r5
	mov	r3, r4
	sub	r5, ip, #1
	mov	r1, r8
	str	r4, [sp, #4]
	mov	r0, r10
	str	r8, [sp]
	str	r5, [sp, #40]
	bl	PCKEV_H2_SW
	mov	r3, r4
	ldr	ip, [sp, #52]
	ldr	r4, [sp, #44]
	mov	r2, r8
	mov	r1, r7
	mov	r0, r6
	str	ip, [sp, #4]
	str	r4, [sp]
	bl	ST_SW4
	ldr	r3, [sp, #32]
	cmn	r5, #1
	add	r3, r3, #32
	str	r3, [sp, #32]
	add	r3, r4, #32
	str	r3, [sp, #44]
	bne	.L3
.L1:
	add	sp, sp, #60
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	.align	2
.L10:
	.word	ff_hevc_mask_arr
	.size	hevc_hv_4t_8multx4_msa, .-hevc_hv_4t_8multx4_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
