	.file	"extr_timers.c_hw_timer_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	hw_timer_init
	.type	hw_timer_init, @function
hw_timer_init:
.LFB0:
	.cfi_startproc
	endbr64
	sub	rsp, 8
	.cfi_def_cfa_offset 16
	mov	edi, DWORD PTR MCFTIMER_TMR[rip]
	call	TA@PLT
	mov	edi, DWORD PTR MCFTIMER_TMR_DISABLE[rip]
	mov	esi, eax
	call	__raw_writew@PLT
	mov	eax, DWORD PTR FREQ[rip]
	mov	edi, DWORD PTR MCFTIMER_TRR[rip]
	cdq
	idiv	DWORD PTR HZ[rip]
	mov	DWORD PTR mcftmr_cycles_per_jiffy[rip], eax
	call	TA@PLT
	mov	esi, eax
	mov	eax, DWORD PTR mcftmr_cycles_per_jiffy[rip]
	lea	edi, -1[rax]
	call	__raw_writetrr@PLT
	mov	edi, DWORD PTR MCFTIMER_TMR[rip]
	call	TA@PLT
	mov	edi, DWORD PTR MCFTIMER_TMR_ENORI[rip]
	or	edi, DWORD PTR MCFTIMER_TMR_CLK16[rip]
	mov	esi, eax
	or	edi, DWORD PTR MCFTIMER_TMR_RESTART[rip]
	or	edi, DWORD PTR MCFTIMER_TMR_ENABLE[rip]
	call	__raw_writew@PLT
	mov	esi, DWORD PTR mcftmr_clk[rip]
	mov	edi, DWORD PTR FREQ[rip]
	call	clocksource_hz2mult@PLT
	lea	rdi, mcftmr_clk[rip]
	mov	DWORD PTR mcftmr_clk[rip+4], eax
	call	clocksource_register@PLT
	mov	edi, DWORD PTR MCF_IRQ_TIMER[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 8
	lea	rsi, mcftmr_timer_irq[rip]
	jmp	setup_irq@PLT
	.cfi_endproc
.LFE0:
	.size	hw_timer_init, .-hw_timer_init
	.comm	mcftmr_timer_irq,4,4
	.comm	mcftmr_cycles_per_jiffy,4,4
	.comm	mcftmr_clk,8,8
	.comm	MCF_IRQ_TIMER,4,4
	.comm	MCFTIMER_TRR,4,4
	.comm	MCFTIMER_TMR_RESTART,4,4
	.comm	MCFTIMER_TMR_ENORI,4,4
	.comm	MCFTIMER_TMR_ENABLE,4,4
	.comm	MCFTIMER_TMR_DISABLE,4,4
	.comm	MCFTIMER_TMR_CLK16,4,4
	.comm	MCFTIMER_TMR,4,4
	.comm	HZ,4,4
	.comm	FREQ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_timers.c_hw_timer_init.c"
	.text
	.global	__aeabi_idiv
	.align	2
	.global	hw_timer_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	hw_timer_init, %function
hw_timer_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r5, .L4
	ldr	r3, .L4+4
	ldr	r0, [r5]
	ldr	r4, [r3]
	bl	TA
	mov	r1, r0
	mov	r0, r4
	bl	__raw_writew
	ldr	r6, .L4+8
	ldr	r3, .L4+12
	ldr	r0, [r6]
	ldr	r1, [r3]
	bl	__aeabi_idiv
	mov	r4, r0
	ldr	r2, .L4+16
	ldr	r3, .L4+20
	ldr	r0, [r2]
	str	r4, [r3]
	bl	TA
	mov	r1, r0
	sub	r0, r4, #1
	bl	__raw_writetrr
	ldr	r1, .L4+24
	ldr	r3, .L4+28
	ldr	r2, .L4+32
	ldr	r4, [r1]
	ldr	r1, [r3]
	ldr	r3, .L4+36
	ldr	r2, [r2]
	ldr	r3, [r3]
	orr	r4, r4, r1
	orr	r4, r4, r2
	ldr	r0, [r5]
	orr	r4, r4, r3
	bl	TA
	ldr	r5, .L4+40
	mov	r1, r0
	mov	r0, r4
	bl	__raw_writew
	ldr	r1, [r5]
	ldr	r0, [r6]
	bl	clocksource_hz2mult
	mov	r3, r0
	mov	r0, r5
	str	r3, [r5, #4]
	bl	clocksource_register
	pop	{r4, r5, r6, lr}
	ldr	r3, .L4+44
	ldr	r1, .L4+48
	ldr	r0, [r3]
	b	setup_irq
.L5:
	.align	2
.L4:
	.word	MCFTIMER_TMR
	.word	MCFTIMER_TMR_DISABLE
	.word	FREQ
	.word	HZ
	.word	MCFTIMER_TRR
	.word	mcftmr_cycles_per_jiffy
	.word	MCFTIMER_TMR_ENORI
	.word	MCFTIMER_TMR_CLK16
	.word	MCFTIMER_TMR_RESTART
	.word	MCFTIMER_TMR_ENABLE
	.word	mcftmr_clk
	.word	MCF_IRQ_TIMER
	.word	mcftmr_timer_irq
	.size	hw_timer_init, .-hw_timer_init
	.comm	mcftmr_timer_irq,4,4
	.comm	mcftmr_cycles_per_jiffy,4,4
	.comm	mcftmr_clk,8,4
	.comm	MCF_IRQ_TIMER,4,4
	.comm	MCFTIMER_TRR,4,4
	.comm	MCFTIMER_TMR_RESTART,4,4
	.comm	MCFTIMER_TMR_ENORI,4,4
	.comm	MCFTIMER_TMR_ENABLE,4,4
	.comm	MCFTIMER_TMR_DISABLE,4,4
	.comm	MCFTIMER_TMR_CLK16,4,4
	.comm	MCFTIMER_TMR,4,4
	.comm	HZ,4,4
	.comm	FREQ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
