	.file	"extr_lxfb_ops.c_lx_graphics_enable.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	lx_graphics_enable, @function
lx_graphics_enable:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	esi, DWORD PTR VP_VRR[rip]
	xor	edx, edx
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	rbp, QWORD PTR 8[rdi]
	mov	rbx, rdi
	mov	rdi, rbp
	call	write_vp@PLT
	mov	esi, DWORD PTR VP_DCFG[rip]
	mov	rdi, rbp
	call	read_vp@PLT
	mov	ecx, DWORD PTR VP_DCFG_CRT_HSYNC_POL[rip]
	mov	edx, DWORD PTR VP_DCFG_CRT_VSYNC_POL[rip]
	mov	r12d, DWORD PTR VP_DCFG_CRT_SYNC_SKW[rip]
	or	r12d, DWORD PTR VP_DCFG_PWR_SEQ_DELAY[rip]
	or	r12d, ecx
	or	r12d, edx
	not	r12d
	and	r12d, eax
	mov	eax, DWORD PTR VP_DCFG_CRT_SYNC_SKW_DEFAULT[rip]
	or	eax, DWORD PTR VP_DCFG_PWR_SEQ_DELAY_DEFAULT[rip]
	or	eax, DWORD PTR VP_DCFG_GV_GAM[rip]
	or	r12d, eax
	mov	eax, DWORD PTR [rbx]
	or	ecx, r12d
	test	DWORD PTR FB_SYNC_HOR_HIGH_ACT[rip], eax
	cmovne	r12d, ecx
	or	edx, r12d
	test	DWORD PTR FB_SYNC_VERT_HIGH_ACT[rip], eax
	mov	eax, DWORD PTR 0[rbp]
	cmovne	r12d, edx
	test	DWORD PTR OUTPUT_PANEL[rip], eax
	jne	.L23
.L4:
	test	DWORD PTR OUTPUT_CRT[rip], eax
	je	.L5
	mov	eax, DWORD PTR VP_DCFG_CRT_EN[rip]
	or	eax, DWORD PTR VP_DCFG_HSYNC_EN[rip]
	or	eax, DWORD PTR VP_DCFG_VSYNC_EN[rip]
	or	eax, DWORD PTR VP_DCFG_DAC_BL_EN[rip]
	or	r12d, eax
.L5:
	mov	esi, DWORD PTR VP_DCFG[rip]
	mov	edx, r12d
	mov	rdi, rbp
	call	write_vp@PLT
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR OUTPUT_CRT[rip], eax
	jne	.L24
.L6:
	test	DWORD PTR OUTPUT_PANEL[rip], eax
	jne	.L25
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L23:
	.cfi_restore_state
	mov	esi, DWORD PTR FP_PT1[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	write_fp@PLT
	mov	edx, DWORD PTR FP_PT2_SCRC[rip]
	mov	esi, DWORD PTR FP_PT2[rip]
	mov	rdi, rbp
	call	write_fp@PLT
	mov	edx, DWORD PTR FP_DFC_BC[rip]
	mov	esi, DWORD PTR FP_DFC[rip]
	mov	rdi, rbp
	call	write_fp@PLT
	mov	edx, DWORD PTR MSR_LX_MSR_PADSEL_TFT_SEL_HIGH[rip]
	mov	esi, DWORD PTR MSR_LX_MSR_PADSEL_TFT_SEL_LOW[rip]
	mov	edi, DWORD PTR MSR_LX_MSR_PADSEL[rip]
	call	wrmsr@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L25:
	mov	esi, DWORD PTR FP_PM[rip]
	mov	rdi, rbp
	call	read_fp@PLT
	mov	esi, DWORD PTR FP_PM[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	rdi, rbp
	or	eax, DWORD PTR FP_PM_P[rip]
	pop	rbp
	.cfi_def_cfa_offset 16
	mov	edx, eax
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	write_fp@PLT
	.p2align 4,,10
	.p2align 3
.L24:
	.cfi_restore_state
	mov	esi, DWORD PTR VP_MISC[rip]
	mov	rdi, rbp
	call	read_vp@PLT
	mov	edx, DWORD PTR VP_MISC_DACPWRDN[rip]
	or	edx, DWORD PTR VP_MISC_APWRDN[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR VP_MISC[rip]
	not	edx
	and	edx, eax
	call	write_vp@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	lx_graphics_enable, .-lx_graphics_enable
	.comm	VP_VRR,4,4
	.comm	VP_MISC_DACPWRDN,4,4
	.comm	VP_MISC_APWRDN,4,4
	.comm	VP_MISC,4,4
	.comm	VP_DCFG_VSYNC_EN,4,4
	.comm	VP_DCFG_PWR_SEQ_DELAY_DEFAULT,4,4
	.comm	VP_DCFG_PWR_SEQ_DELAY,4,4
	.comm	VP_DCFG_HSYNC_EN,4,4
	.comm	VP_DCFG_GV_GAM,4,4
	.comm	VP_DCFG_DAC_BL_EN,4,4
	.comm	VP_DCFG_CRT_VSYNC_POL,4,4
	.comm	VP_DCFG_CRT_SYNC_SKW_DEFAULT,4,4
	.comm	VP_DCFG_CRT_SYNC_SKW,4,4
	.comm	VP_DCFG_CRT_HSYNC_POL,4,4
	.comm	VP_DCFG_CRT_EN,4,4
	.comm	VP_DCFG,4,4
	.comm	OUTPUT_PANEL,4,4
	.comm	OUTPUT_CRT,4,4
	.comm	MSR_LX_MSR_PADSEL_TFT_SEL_LOW,4,4
	.comm	MSR_LX_MSR_PADSEL_TFT_SEL_HIGH,4,4
	.comm	MSR_LX_MSR_PADSEL,4,4
	.comm	FP_PT2_SCRC,4,4
	.comm	FP_PT2,4,4
	.comm	FP_PT1,4,4
	.comm	FP_PM_P,4,4
	.comm	FP_PM,4,4
	.comm	FP_DFC_BC,4,4
	.comm	FP_DFC,4,4
	.comm	FB_SYNC_VERT_HIGH_ACT,4,4
	.comm	FB_SYNC_HOR_HIGH_ACT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_lxfb_ops.c_lx_graphics_enable.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	lx_graphics_enable, %function
lx_graphics_enable:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r3, .L27
	ldr	r6, [r0, #4]
	ldr	r5, .L27+4
	ldr	r1, [r3]
	mov	r7, r0
	mov	r2, #0
	mov	r0, r6
	bl	write_vp
	ldr	r1, [r5]
	mov	r0, r6
	bl	read_vp
	ldr	r2, .L27+8
	ldr	r3, .L27+12
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	lr, .L27+16
	orr	r2, r2, r3
	ldr	r3, .L27+20
	ldr	r4, [lr]
	ldr	ip, .L27+24
	ldr	r3, [r3]
	ldr	r1, .L27+28
	ldr	ip, [ip]
	orr	r3, r3, r4
	ldr	r4, .L27+32
	ldr	r1, [r1]
	ldr	r4, [r4]
	orr	r2, r2, ip
	ldr	r8, .L27+36
	orr	r2, r2, r1
	bic	r2, r0, r2
	orr	r3, r3, r4
	orr	r4, r3, r2
	ldr	lr, [r7]
	ldr	r3, .L27+40
	ldr	r7, [r8]
	ldr	r3, [r3]
	tst	lr, r7
	ldr	r7, .L27+44
	orrne	r4, r4, ip
	ldr	r2, [r7]
	tst	lr, r3
	ldr	r3, [r6]
	orrne	r4, r4, r1
	tst	r3, r2
	bne	.L25
.L4:
	ldr	r8, .L27+48
	ldr	r2, [r8]
	tst	r3, r2
	beq	.L5
	ldr	r3, .L27+52
	ldr	r2, .L27+56
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L27+60
	orr	r3, r3, r2
	ldr	r2, .L27+64
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
	orr	r4, r4, r3
.L5:
	mov	r2, r4
	mov	r0, r6
	ldr	r1, [r5]
	bl	write_vp
	ldr	r2, [r8]
	ldr	r3, [r6]
	tst	r3, r2
	bne	.L26
.L6:
	ldr	r2, [r7]
	tst	r3, r2
	popeq	{r4, r5, r6, r7, r8, pc}
	ldr	r3, .L27+68
	mov	r0, r6
	ldr	r4, [r3]
	mov	r1, r4
	bl	read_fp
	mov	r2, r0
	ldr	r3, .L27+72
	mov	r1, r4
	ldr	r3, [r3]
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	orr	r2, r2, r3
	b	write_fp
.L26:
	ldr	r4, .L27+76
	mov	r0, r6
	ldr	r1, [r4]
	bl	read_vp
	ldr	r3, .L27+80
	ldr	r2, .L27+84
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, [r4]
	orr	r2, r3, r2
	bic	r2, r0, r2
	mov	r0, r6
	bl	write_vp
	ldr	r3, [r6]
	b	.L6
.L25:
	ldr	r3, .L27+88
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r6
	bl	write_fp
	ldr	r3, .L27+92
	ldr	r2, .L27+96
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r6
	bl	write_fp
	ldr	r3, .L27+100
	ldr	r2, .L27+104
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r6
	bl	write_fp
	ldr	r3, .L27+108
	ldr	r2, .L27+112
	ldr	r1, .L27+116
	ldr	r0, [r3]
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	wrmsr
	ldr	r3, [r6]
	b	.L4
.L28:
	.align	2
.L27:
	.word	VP_VRR
	.word	VP_DCFG
	.word	VP_DCFG_CRT_SYNC_SKW
	.word	VP_DCFG_PWR_SEQ_DELAY
	.word	VP_DCFG_PWR_SEQ_DELAY_DEFAULT
	.word	VP_DCFG_CRT_SYNC_SKW_DEFAULT
	.word	VP_DCFG_CRT_HSYNC_POL
	.word	VP_DCFG_CRT_VSYNC_POL
	.word	VP_DCFG_GV_GAM
	.word	FB_SYNC_HOR_HIGH_ACT
	.word	FB_SYNC_VERT_HIGH_ACT
	.word	OUTPUT_PANEL
	.word	OUTPUT_CRT
	.word	VP_DCFG_CRT_EN
	.word	VP_DCFG_HSYNC_EN
	.word	VP_DCFG_VSYNC_EN
	.word	VP_DCFG_DAC_BL_EN
	.word	FP_PM
	.word	FP_PM_P
	.word	VP_MISC
	.word	VP_MISC_DACPWRDN
	.word	VP_MISC_APWRDN
	.word	FP_PT1
	.word	FP_PT2
	.word	FP_PT2_SCRC
	.word	FP_DFC
	.word	FP_DFC_BC
	.word	MSR_LX_MSR_PADSEL
	.word	MSR_LX_MSR_PADSEL_TFT_SEL_HIGH
	.word	MSR_LX_MSR_PADSEL_TFT_SEL_LOW
	.size	lx_graphics_enable, .-lx_graphics_enable
	.comm	VP_VRR,4,4
	.comm	VP_MISC_DACPWRDN,4,4
	.comm	VP_MISC_APWRDN,4,4
	.comm	VP_MISC,4,4
	.comm	VP_DCFG_VSYNC_EN,4,4
	.comm	VP_DCFG_PWR_SEQ_DELAY_DEFAULT,4,4
	.comm	VP_DCFG_PWR_SEQ_DELAY,4,4
	.comm	VP_DCFG_HSYNC_EN,4,4
	.comm	VP_DCFG_GV_GAM,4,4
	.comm	VP_DCFG_DAC_BL_EN,4,4
	.comm	VP_DCFG_CRT_VSYNC_POL,4,4
	.comm	VP_DCFG_CRT_SYNC_SKW_DEFAULT,4,4
	.comm	VP_DCFG_CRT_SYNC_SKW,4,4
	.comm	VP_DCFG_CRT_HSYNC_POL,4,4
	.comm	VP_DCFG_CRT_EN,4,4
	.comm	VP_DCFG,4,4
	.comm	OUTPUT_PANEL,4,4
	.comm	OUTPUT_CRT,4,4
	.comm	MSR_LX_MSR_PADSEL_TFT_SEL_LOW,4,4
	.comm	MSR_LX_MSR_PADSEL_TFT_SEL_HIGH,4,4
	.comm	MSR_LX_MSR_PADSEL,4,4
	.comm	FP_PT2_SCRC,4,4
	.comm	FP_PT2,4,4
	.comm	FP_PT1,4,4
	.comm	FP_PM_P,4,4
	.comm	FP_PM,4,4
	.comm	FP_DFC_BC,4,4
	.comm	FP_DFC,4,4
	.comm	FB_SYNC_VERT_HIGH_ACT,4,4
	.comm	FB_SYNC_HOR_HIGH_ACT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
