	.file	"extr_goya.c_goya_init_tpc_cmdq.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	goya_init_tpc_cmdq, @function
goya_init_tpc_cmdq:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	ebx, DWORD PTR mmTPC1_CMDQ_CQ_CFG1[rip]
	mov	rdi, QWORD PTR mmSYNC_MNGR_MON_PAY_ADDRL_0[rip]
	sub	ebx, DWORD PTR mmTPC0_CMDQ_CQ_CFG1[rip]
	add	rdi, QWORD PTR CFG_BASE[rip]
	imul	ebx, esi
	call	lower_32_bits@PLT
	mov	rdi, QWORD PTR mmSYNC_MNGR_MON_PAY_ADDRL_0[rip]
	add	rdi, QWORD PTR CFG_BASE[rip]
	mov	DWORD PTR 12[rsp], eax
	call	upper_32_bits@PLT
	mov	rdi, QWORD PTR mmSYNC_MNGR_SOB_OBJ_0[rip]
	add	rdi, QWORD PTR CFG_BASE[rip]
	mov	DWORD PTR 8[rsp], eax
	call	lower_32_bits@PLT
	mov	rdi, QWORD PTR mmSYNC_MNGR_SOB_OBJ_0[rip]
	add	rdi, QWORD PTR CFG_BASE[rip]
	mov	r15d, eax
	call	upper_32_bits@PLT
	mov	rdi, QWORD PTR mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR[rip]
	add	rdi, QWORD PTR CFG_BASE[rip]
	mov	r14d, eax
	call	lower_32_bits@PLT
	mov	rdi, QWORD PTR mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR[rip]
	add	rdi, QWORD PTR CFG_BASE[rip]
	mov	r13d, eax
	call	upper_32_bits@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO[rip]
	mov	esi, DWORD PTR 12[rsp]
	mov	r12d, eax
	add	edi, ebx
	call	WREG32@PLT
	mov	r8d, DWORD PTR 8[rsp]
	mov	edi, DWORD PTR mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI[rip]
	mov	esi, r8d
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO[rip]
	mov	esi, r15d
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI[rip]
	mov	esi, r14d
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_CQ_CFG1[rip]
	mov	esi, 1310740
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_GLBL_ERR_ADDR_LO[rip]
	mov	esi, r13d
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_GLBL_ERR_ADDR_HI[rip]
	mov	esi, r12d
	add	edi, ebx
	call	WREG32@PLT
	mov	esi, DWORD PTR GOYA_ASYNC_EVENT_ID_TPC0_CMDQ[rip]
	mov	edi, DWORD PTR mmTPC0_CMDQ_GLBL_ERR_WDATA[rip]
	add	esi, ebp
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_GLBL_ERR_CFG[rip]
	mov	esi, DWORD PTR CMDQ_TPC_ERR_MSG_EN[rip]
	add	edi, ebx
	call	WREG32@PLT
	mov	edi, DWORD PTR mmTPC0_CMDQ_GLBL_PROT[rip]
	mov	esi, DWORD PTR CMDQ_TPC_ERR_PROT[rip]
	add	edi, ebx
	call	WREG32@PLT
	add	ebx, DWORD PTR mmTPC0_CMDQ_GLBL_CFG0[rip]
	mov	esi, DWORD PTR CMDQ_TPC_ENABLE[rip]
	add	rsp, 24
	.cfi_def_cfa_offset 56
	mov	edi, ebx
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	WREG32@PLT
	.cfi_endproc
.LFE0:
	.size	goya_init_tpc_cmdq, .-goya_init_tpc_cmdq
	.comm	mmTPC1_CMDQ_CQ_CFG1,4,4
	.comm	mmTPC0_CMDQ_GLBL_PROT,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_WDATA,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_CFG,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_ADDR_LO,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_ADDR_HI,4,4
	.comm	mmTPC0_CMDQ_GLBL_CFG0,4,4
	.comm	mmTPC0_CMDQ_CQ_CFG1,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI,4,4
	.comm	mmSYNC_MNGR_SOB_OBJ_0,8,8
	.comm	mmSYNC_MNGR_MON_PAY_ADDRL_0,8,8
	.comm	mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,8,8
	.comm	GOYA_ASYNC_EVENT_ID_TPC0_CMDQ,4,4
	.comm	CMDQ_TPC_ERR_PROT,4,4
	.comm	CMDQ_TPC_ERR_MSG_EN,4,4
	.comm	CMDQ_TPC_ENABLE,4,4
	.comm	CFG_BASE,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_goya.c_goya_init_tpc_cmdq.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	goya_init_tpc_cmdq, %function
goya_init_tpc_cmdq:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r2, .L4
	ldr	r5, .L4+4
	ldr	r7, .L4+8
	ldr	r3, .L4+12
	ldr	r4, [r2]
	ldr	r0, [r5]
	ldr	r2, [r7]
	mov	r6, r1
	ldr	r1, [r3]
	add	r0, r0, r2
	sub	r4, r4, r1
	bl	lower_32_bits
	ldr	ip, [r5]
	ldr	r2, [r7]
	mov	fp, r0
	add	r0, ip, r2
	bl	upper_32_bits
	ldr	r7, .L4+16
	ldr	r1, [r5]
	ldr	r2, [r7]
	mov	r10, r0
	add	r0, r1, r2
	bl	lower_32_bits
	ldr	r2, [r7]
	ldr	r1, [r5]
	mov	r9, r0
	add	r0, r1, r2
	bl	upper_32_bits
	ldr	r7, .L4+20
	ldr	r1, [r5]
	ldr	r2, [r7]
	mov	r8, r0
	add	r0, r1, r2
	bl	lower_32_bits
	ldr	r1, [r5]
	ldr	r2, [r7]
	mov	r7, r0
	add	r0, r1, r2
	bl	upper_32_bits
	mul	r4, r6, r4
	ldr	r2, .L4+24
	mov	r5, r0
	ldr	r0, [r2]
	mov	r1, fp
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+28
	mov	r1, r10
	ldr	r0, [r2]
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+32
	mov	r1, r9
	ldr	r0, [r2]
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+36
	mov	r1, r8
	ldr	r0, [r2]
	add	r0, r4, r0
	bl	WREG32
	ldr	r3, .L4+12
	ldr	r1, .L4+40
	ldr	r0, [r3]
	add	r0, r4, r0
	bl	WREG32
	ldr	r3, .L4+44
	mov	r1, r7
	ldr	r0, [r3]
	add	r0, r4, r0
	bl	WREG32
	ldr	r3, .L4+48
	mov	r1, r5
	ldr	r0, [r3]
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+52
	ldr	r3, .L4+56
	ldr	r1, [r2]
	ldr	r0, [r3]
	add	r1, r6, r1
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+60
	ldr	r3, .L4+64
	ldr	r0, [r2]
	ldr	r1, [r3]
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+68
	ldr	r3, .L4+72
	ldr	r0, [r2]
	ldr	r1, [r3]
	add	r0, r4, r0
	bl	WREG32
	ldr	r2, .L4+76
	ldr	r3, .L4+80
	ldr	r0, [r2]
	ldr	r1, [r3]
	add	r0, r4, r0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	WREG32
.L5:
	.align	2
.L4:
	.word	mmTPC1_CMDQ_CQ_CFG1
	.word	CFG_BASE
	.word	mmSYNC_MNGR_MON_PAY_ADDRL_0
	.word	mmTPC0_CMDQ_CQ_CFG1
	.word	mmSYNC_MNGR_SOB_OBJ_0
	.word	mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR
	.word	mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO
	.word	mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI
	.word	mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO
	.word	mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI
	.word	1310740
	.word	mmTPC0_CMDQ_GLBL_ERR_ADDR_LO
	.word	mmTPC0_CMDQ_GLBL_ERR_ADDR_HI
	.word	GOYA_ASYNC_EVENT_ID_TPC0_CMDQ
	.word	mmTPC0_CMDQ_GLBL_ERR_WDATA
	.word	mmTPC0_CMDQ_GLBL_ERR_CFG
	.word	CMDQ_TPC_ERR_MSG_EN
	.word	mmTPC0_CMDQ_GLBL_PROT
	.word	CMDQ_TPC_ERR_PROT
	.word	mmTPC0_CMDQ_GLBL_CFG0
	.word	CMDQ_TPC_ENABLE
	.size	goya_init_tpc_cmdq, .-goya_init_tpc_cmdq
	.comm	mmTPC1_CMDQ_CQ_CFG1,4,4
	.comm	mmTPC0_CMDQ_GLBL_PROT,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_WDATA,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_CFG,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_ADDR_LO,4,4
	.comm	mmTPC0_CMDQ_GLBL_ERR_ADDR_HI,4,4
	.comm	mmTPC0_CMDQ_GLBL_CFG0,4,4
	.comm	mmTPC0_CMDQ_CQ_CFG1,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO,4,4
	.comm	mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI,4,4
	.comm	mmSYNC_MNGR_SOB_OBJ_0,4,4
	.comm	mmSYNC_MNGR_MON_PAY_ADDRL_0,4,4
	.comm	mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,4,4
	.comm	GOYA_ASYNC_EVENT_ID_TPC0_CMDQ,4,4
	.comm	CMDQ_TPC_ERR_PROT,4,4
	.comm	CMDQ_TPC_ERR_MSG_EN,4,4
	.comm	CMDQ_TPC_ENABLE,4,4
	.comm	CFG_BASE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
