	.file	"extr_BraIA64.c_IA64_Convert.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	IA64_Convert
	.type	IA64_Convert, @function
IA64_Convert:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xor	eax, eax
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	DWORD PTR -12[rsp], ecx
	cmp	esi, 15
	jle	.L1
	mov	r14, QWORD PTR kBranchTable[rip]
	mov	r12, rdx
	lea	ebp, -16[rsi]
	xor	r10d, r10d
	.p2align 4,,10
	.p2align 3
.L11:
	mov	eax, DWORD PTR [rdi+r10*4]
	xor	esi, esi
	mov	r8d, 5
	lea	r13, [r12+r10]
	and	eax, 31
	mov	r11, QWORD PTR [r14+rax*8]
.L4:
	bt	r11, rsi
	jc	.L3
.L7:
	add	esi, 1
	add	r8, 41
	cmp	esi, 3
	jne	.L4
	add	r10, 16
	cmp	ebp, r10d
	jge	.L11
	and	ebp, -16
	lea	eax, 16[rbp]
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	rax, r8
	mov	rbx, r8
	xor	ecx, ecx
	xor	edx, edx
	shr	rax, 3
	and	ebx, 7
	add	rax, r10
	lea	r9, [rdi+rax*4]
	mov	rax, r9
	.p2align 4,,10
	.p2align 3
.L6:
	mov	r15d, DWORD PTR [rax]
	add	rax, 4
	sal	r15d, cl
	add	ecx, 8
	add	edx, r15d
	cmp	ecx, 48
	jne	.L6
	mov	ecx, ebx
	mov	eax, edx
	sar	eax, cl
	mov	ecx, 37
	mov	DWORD PTR -16[rsp], eax
	sar	eax, cl
	and	eax, 15
	cmp	eax, 5
	jne	.L7
	test	DWORD PTR -16[rsp], 3584
	jne	.L7
	mov	ecx, DWORD PTR -16[rsp]
	mov	eax, ecx
	sar	eax, 13
	mov	r15d, eax
	mov	eax, ecx
	mov	ecx, 36
	sar	eax, cl
	and	r15d, 1048575
	mov	ecx, DWORD PTR -12[rsp]
	sal	rax, 20
	and	eax, 1048576
	or	rax, r15
	sal	rax, 4
	lea	r15, [rax+r13]
	sub	rax, r13
	test	ecx, ecx
	mov	ecx, DWORD PTR -16[rsp]
	cmove	r15, rax
	mov	eax, 1
	and	ecx, 8191
	mov	QWORD PTR -8[rsp], r15
	mov	r15d, ecx
	mov	ecx, ebx
	sal	eax, cl
	mov	ecx, eax
	mov	rax, QWORD PTR -8[rsp]
	sub	ecx, 1
	shr	rax, 4
	and	edx, ecx
	mov	ecx, ebx
	sal	eax, 13
	or	r15d, eax
	sal	r15d, cl
	xor	ecx, ecx
	or	edx, r15d
	.p2align 4,,10
	.p2align 3
.L10:
	mov	eax, edx
	add	r9, 4
	sar	eax, cl
	add	ecx, 8
	mov	DWORD PTR -4[r9], eax
	cmp	ecx, 48
	jne	.L10
	jmp	.L7
	.cfi_endproc
.LFE0:
	.size	IA64_Convert, .-IA64_Convert
	.comm	kBranchTable,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_BraIA64.c_IA64_Convert.c"
	.text
	.align	2
	.global	IA64_Convert
	.syntax unified
	.arm
	.fpu softvfp
	.type	IA64_Convert, %function
IA64_Convert:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	cmp	r1, #15
	sub	sp, sp, #20
	movle	r0, #0
	str	r3, [sp, #8]
	ble	.L1
	mov	fp, r2
	mov	r6, #0
	mov	r10, #37
	ldr	r3, .L20
	sub	r9, r1, #16
	ldr	r3, [r3]
	str	r3, [sp]
.L11:
	mov	r4, #0
	mov	lr, #5
	add	r2, fp, r6
	ldr	r3, [r0, r6, lsl #2]
	str	r2, [sp, #4]
	ldr	r2, [sp]
	and	r3, r3, #31
	ldr	r7, [r2, r3, lsl #2]
.L4:
	lsr	r3, r7, r4
	tst	r3, #1
	bne	.L3
.L7:
	add	lr, lr, #41
	cmp	lr, #128
	add	r4, r4, #1
	bne	.L4
	add	r6, r6, #16
	cmp	r9, r6
	bge	.L11
	bic	r0, r9, #15
	add	r0, r0, #16
.L1:
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	mov	r3, #0
	add	r5, r6, lr, lsr #3
	add	r5, r0, r5, lsl #2
	mov	r1, r5
	mov	r2, r3
	and	r8, lr, #7
.L6:
	ldr	ip, [r1], #4
	add	r2, r2, ip, lsl r3
	add	r3, r3, #8
	cmp	r3, #48
	bne	.L6
	asr	r1, r2, r8
	asr	r3, r1, r10
	and	r3, r3, #15
	cmp	r3, #5
	bne	.L7
	tst	r1, #3584
	bne	.L7
	mov	r3, #36
	asr	r3, r1, r3
	lsl	r3, r3, #20
	and	ip, r3, #1048576
	ldr	r3, .L20+4
	and	r3, r3, r1, asr #13
	str	r3, [sp, #12]
	ldr	r3, [sp, #8]
	lsl	r1, r1, #19
	cmp	r3, #0
	ldr	r3, [sp, #12]
	lsr	r1, r1, #19
	orr	r3, ip, r3
	lsl	ip, r3, #4
	ldr	r3, [sp, #4]
	addne	ip, ip, r3
	subeq	ip, ip, r3
	lsr	ip, ip, #4
	orr	r1, r1, ip, lsl #13
	mov	ip, #1
	mov	r3, #0
	lsl	ip, ip, r8
	sub	ip, ip, #1
	and	r2, r2, ip
	orr	r8, r2, r1, lsl r8
.L10:
	asr	r2, r8, r3
	add	r3, r3, #8
	cmp	r3, #48
	str	r2, [r5], #4
	bne	.L10
	b	.L7
.L21:
	.align	2
.L20:
	.word	kBranchTable
	.word	1048575
	.size	IA64_Convert, .-IA64_Convert
	.comm	kBranchTable,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
