	.file	"extr_ar5212_misc.c_ar5212SetBasicRate.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	ar5212SetBasicRate
	.type	ar5212SetBasicRate, @function
ar5212SetBasicRate:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rsi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	AH_PRIVATE@PLT
	mov	rdi, QWORD PTR [rax]
	cmp	QWORD PTR AH_NULL[rip], rdi
	je	.L1
	call	IEEE80211_IS_CHAN_CCK@PLT
	test	eax, eax
	je	.L1
	mov	edx, DWORD PTR [rbx]
	mov	esi, DWORD PTR AR_STA_ID1[rip]
	test	edx, edx
	jle	.L5
	mov	rax, QWORD PTR 8[rbx]
	lea	ecx, -1[rdx]
	xor	ebx, ebx
	lea	rdx, 4[rax]
	lea	rcx, [rdx+rcx*4]
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L26:
	add	rdx, 4
.L7:
	mov	eax, DWORD PTR [rax]
	test	al, -128
	je	.L6
	and	eax, 127
	cmp	ebx, eax
	cmovl	ebx, eax
.L6:
	mov	rax, rdx
	cmp	rdx, rcx
	jne	.L26
	mov	rdi, rbp
	call	OS_REG_READ@PLT
	test	ebx, ebx
	je	.L8
	cmp	ebx, 5
	jg	.L8
	or	eax, DWORD PTR AR_STA_ID1_BASE_RATE_11B[rip]
	mov	edx, eax
.L24:
	mov	esi, DWORD PTR AR_STA_ID1[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	rdi, rbp
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	OS_REG_WRITE@PLT
	.p2align 4,,10
	.p2align 3
.L1:
	.cfi_restore_state
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	rdi, rbp
	call	OS_REG_READ@PLT
.L8:
	mov	edx, DWORD PTR AR_STA_ID1_BASE_RATE_11B[rip]
	not	edx
	and	edx, eax
	jmp	.L24
	.cfi_endproc
.LFE0:
	.size	ar5212SetBasicRate, .-ar5212SetBasicRate
	.comm	AR_STA_ID1_BASE_RATE_11B,4,4
	.comm	AR_STA_ID1,4,4
	.comm	AH_NULL,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ar5212_misc.c_ar5212SetBasicRate.c"
	.text
	.align	2
	.global	ar5212SetBasicRate
	.syntax unified
	.arm
	.fpu softvfp
	.type	ar5212SetBasicRate, %function
ar5212SetBasicRate:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r6, r1
	mov	r5, r0
	bl	AH_PRIVATE
	ldr	r3, .L21
	ldr	r0, [r0]
	ldr	r3, [r3]
	cmp	r3, r0
	popeq	{r4, r5, r6, r7, r8, pc}
	bl	IEEE80211_IS_CHAN_CCK
	cmp	r0, #0
	popeq	{r4, r5, r6, r7, r8, pc}
	ldr	lr, [r6]
	ldr	r7, .L21+4
	cmp	lr, #0
	ldr	r1, [r7]
	ble	.L5
	mov	r4, #0
	ldr	r3, [r6, #4]
	sub	r3, r3, #4
	add	lr, r3, lr, lsl #2
.L7:
	ldr	r2, [r3, #4]!
	tst	r2, #128
	and	ip, r2, #127
	beq	.L6
	cmp	r4, ip
	movlt	r4, ip
.L6:
	cmp	r3, lr
	bne	.L7
	mov	r0, r5
	bl	OS_REG_READ
	cmp	r4, #5
	movgt	r3, #0
	movle	r3, #1
	cmp	r4, #0
	movne	r4, r3
	moveq	r4, #0
	cmp	r4, #0
	mov	r2, r0
	beq	.L8
	ldr	r3, .L21+8
	mov	r0, r5
	ldr	r3, [r3]
	ldr	r1, [r7]
	orr	r2, r2, r3
	pop	{r4, r5, r6, r7, r8, lr}
	b	OS_REG_WRITE
.L5:
	mov	r0, r5
	bl	OS_REG_READ
	mov	r2, r0
.L8:
	ldr	r3, .L21+8
	mov	r0, r5
	ldr	r3, [r3]
	ldr	r1, [r7]
	bic	r2, r2, r3
	pop	{r4, r5, r6, r7, r8, lr}
	b	OS_REG_WRITE
.L22:
	.align	2
.L21:
	.word	AH_NULL
	.word	AR_STA_ID1
	.word	AR_STA_ID1_BASE_RATE_11B
	.size	ar5212SetBasicRate, .-ar5212SetBasicRate
	.comm	AR_STA_ID1_BASE_RATE_11B,4,4
	.comm	AR_STA_ID1,4,4
	.comm	AH_NULL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
