	.file	"extr_gfx_v10_0.c_gfx_v10_0_update_medium_grain_clock_gating.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	gfx_v10_0_update_medium_grain_clock_gating, @function
gfx_v10_0_update_medium_grain_clock_gating:
.LFB0:
	.cfi_startproc
	endbr64
	test	esi, esi
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	edx, DWORD PTR mmRLC_CGTT_MGCG_OVERRIDE[rip]
	mov	rbx, rdi
	mov	esi, 0
	mov	edi, DWORD PTR GC[rip]
	je	.L2
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR AMD_CG_SUPPORT_GFX_MGCG[rip], eax
	jne	.L34
.L2:
	call	RREG32_SOC15@PLT
	mov	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK[rip]
	or	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK[rip]
	or	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK[rip]
	or	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK[rip]
	or	ecx, eax
	cmp	eax, ecx
	jne	.L35
.L9:
	mov	edx, DWORD PTR mmRLC_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	RREG32_SOC15@PLT
	mov	ecx, DWORD PTR RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK[rip]
	test	ecx, eax
	jne	.L36
.L10:
	mov	edx, DWORD PTR mmCP_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	RREG32_SOC15@PLT
	mov	ecx, DWORD PTR CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK[rip]
	test	ecx, eax
	jne	.L37
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L35:
	.cfi_restore_state
	mov	edx, DWORD PTR mmRLC_CGTT_MGCG_OVERRIDE[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	WREG32_SOC15@PLT
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L37:
	not	ecx
	and	ecx, eax
.L31:
	mov	edx, DWORD PTR mmCP_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	WREG32_SOC15@PLT
	.p2align 4,,10
	.p2align 3
.L34:
	.cfi_restore_state
	call	RREG32_SOC15@PLT
	mov	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK[rip]
	or	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK[rip]
	or	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK[rip]
	not	ecx
	and	ecx, eax
	or	ecx, DWORD PTR RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK[rip]
	cmp	eax, ecx
	jne	.L38
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR AMD_CG_SUPPORT_GFX_MGLS[rip], eax
	je	.L1
.L40:
	test	DWORD PTR AMD_CG_SUPPORT_GFX_RLC_LS[rip], eax
	jne	.L39
.L6:
	test	DWORD PTR AMD_CG_SUPPORT_GFX_CP_LS[rip], eax
	je	.L1
	mov	edx, DWORD PTR mmCP_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	RREG32_SOC15@PLT
	mov	ecx, DWORD PTR CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK[rip]
	or	ecx, eax
	cmp	eax, ecx
	jne	.L31
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L36:
	.cfi_restore_state
	mov	edx, DWORD PTR mmRLC_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	not	ecx
	xor	esi, esi
	and	ecx, eax
	call	WREG32_SOC15@PLT
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L38:
	mov	edx, DWORD PTR mmRLC_CGTT_MGCG_OVERRIDE[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	WREG32_SOC15@PLT
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR AMD_CG_SUPPORT_GFX_MGLS[rip], eax
	je	.L1
	jmp	.L40
	.p2align 4,,10
	.p2align 3
.L39:
	mov	edx, DWORD PTR mmRLC_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	RREG32_SOC15@PLT
	mov	ecx, DWORD PTR RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK[rip]
	or	ecx, eax
	cmp	eax, ecx
	je	.L30
	mov	edx, DWORD PTR mmRLC_MEM_SLP_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	WREG32_SOC15@PLT
.L30:
	mov	eax, DWORD PTR [rbx]
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	gfx_v10_0_update_medium_grain_clock_gating, .-gfx_v10_0_update_medium_grain_clock_gating
	.comm	mmRLC_MEM_SLP_CNTL,4,4
	.comm	mmRLC_CGTT_MGCG_OVERRIDE,4,4
	.comm	mmCP_MEM_SLP_CNTL,4,4
	.comm	RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK,4,4
	.comm	GC,4,4
	.comm	CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK,4,4
	.comm	AMD_CG_SUPPORT_GFX_RLC_LS,4,4
	.comm	AMD_CG_SUPPORT_GFX_MGLS,4,4
	.comm	AMD_CG_SUPPORT_GFX_MGCG,4,4
	.comm	AMD_CG_SUPPORT_GFX_CP_LS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gfx_v10_0.c_gfx_v10_0_update_medium_grain_clock_gating.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gfx_v10_0_update_medium_grain_clock_gating, %function
gfx_v10_0_update_medium_grain_clock_gating:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r4, .L38
	ldr	r5, .L38+4
	cmp	r1, #0
	mov	r6, r0
	ldr	r2, [r5]
	ldr	r0, [r4]
	beq	.L2
	ldr	r3, .L38+8
	ldr	r1, [r6]
	ldr	r3, [r3]
	tst	r1, r3
	bne	.L33
.L2:
	mov	r1, #0
	bl	RREG32_SOC15
	ldr	r3, .L38+12
	ldr	r2, .L38+16
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L38+20
	orr	r3, r3, r2
	ldr	r2, .L38+24
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
	bics	r2, r3, r0
	orr	r3, r3, r0
	bne	.L34
.L9:
	ldr	r5, .L38+28
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	RREG32_SOC15
	ldr	r3, .L38+32
	ldr	r3, [r3]
	tst	r3, r0
	bne	.L35
.L10:
	ldr	r5, .L38+36
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	RREG32_SOC15
	ldr	r3, .L38+40
	ldr	r3, [r3]
	tst	r3, r0
	popeq	{r4, r5, r6, pc}
	bic	r3, r0, r3
.L31:
	ldr	r2, [r5]
	ldr	r0, [r4]
	mov	r1, #0
	pop	{r4, r5, r6, lr}
	b	WREG32_SOC15
.L34:
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	WREG32_SOC15
	b	.L9
.L33:
	mov	r1, #0
	bl	RREG32_SOC15
	ldr	r3, .L38+16
	ldr	r2, .L38+20
	ldr	r1, .L38+24
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r1]
	orr	r3, r3, r2
	ldr	r2, .L38+12
	orr	r3, r3, r1
	ldr	r2, [r2]
	bic	r3, r0, r3
	orr	r3, r3, r2
	cmp	r0, r3
	bne	.L36
.L3:
	ldr	r2, .L38+44
	ldr	r3, [r6]
	ldr	r2, [r2]
	tst	r3, r2
	popeq	{r4, r5, r6, pc}
	ldr	r2, .L38+48
	ldr	r2, [r2]
	tst	r3, r2
	bne	.L37
.L6:
	ldr	r2, .L38+52
	ldr	r2, [r2]
	tst	r3, r2
	popeq	{r4, r5, r6, pc}
	ldr	r5, .L38+36
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	RREG32_SOC15
	ldr	r3, .L38+40
	ldr	r3, [r3]
	bics	r2, r3, r0
	orr	r3, r0, r3
	popeq	{r4, r5, r6, pc}
	b	.L31
.L35:
	bic	r3, r0, r3
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	WREG32_SOC15
	b	.L10
.L36:
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	WREG32_SOC15
	b	.L3
.L37:
	ldr	r5, .L38+28
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	RREG32_SOC15
	ldr	r3, .L38+32
	ldr	r3, [r3]
	bics	r2, r3, r0
	orr	r3, r0, r3
	beq	.L30
	mov	r1, #0
	ldr	r2, [r5]
	ldr	r0, [r4]
	bl	WREG32_SOC15
.L30:
	ldr	r3, [r6]
	b	.L6
.L39:
	.align	2
.L38:
	.word	GC
	.word	mmRLC_CGTT_MGCG_OVERRIDE
	.word	AMD_CG_SUPPORT_GFX_MGCG
	.word	RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK
	.word	RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK
	.word	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK
	.word	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK
	.word	mmRLC_MEM_SLP_CNTL
	.word	RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK
	.word	mmCP_MEM_SLP_CNTL
	.word	CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK
	.word	AMD_CG_SUPPORT_GFX_MGLS
	.word	AMD_CG_SUPPORT_GFX_RLC_LS
	.word	AMD_CG_SUPPORT_GFX_CP_LS
	.size	gfx_v10_0_update_medium_grain_clock_gating, .-gfx_v10_0_update_medium_grain_clock_gating
	.comm	mmRLC_MEM_SLP_CNTL,4,4
	.comm	mmRLC_CGTT_MGCG_OVERRIDE,4,4
	.comm	mmCP_MEM_SLP_CNTL,4,4
	.comm	RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK,4,4
	.comm	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK,4,4
	.comm	GC,4,4
	.comm	CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK,4,4
	.comm	AMD_CG_SUPPORT_GFX_RLC_LS,4,4
	.comm	AMD_CG_SUPPORT_GFX_MGLS,4,4
	.comm	AMD_CG_SUPPORT_GFX_MGCG,4,4
	.comm	AMD_CG_SUPPORT_GFX_CP_LS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
