	.file	"extr_stm32_fmc2_nand.c_stm32_fmc2_probe.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"IRQ error missing or invalid\n"
.LC1:
	.string	"failed to request irq\n"
.LC2:
	.string	"can not enable the clock\n"
	.text
	.p2align 4
	.type	stm32_fmc2_probe, @function
stm32_fmc2_probe:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	esi, 152
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	edx, DWORD PTR GFP_KERNEL[rip]
	call	devm_kzalloc@PLT
	mov	r13d, DWORD PTR ENOMEM[rip]
	neg	r13d
	test	rax, rax
	je	.L1
	mov	QWORD PTR 144[rax], r12
	mov	rbp, rax
	lea	rax, 48[rax]
	mov	rdi, rax
	mov	QWORD PTR 8[rsp], rax
	call	nand_controller_init@PLT
	lea	rax, stm32_fmc2_nand_controller_ops[rip]
	mov	rdi, rbp
	mov	QWORD PTR 48[rbp], rax
	call	stm32_fmc2_parse_dt@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L39
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r13d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L39:
	.cfi_restore_state
	mov	esi, DWORD PTR IORESOURCE_MEM[rip]
	xor	edx, edx
	mov	rdi, r12
	call	platform_get_resource@PLT
	mov	rdi, r12
	mov	rsi, rax
	mov	rbx, rax
	call	devm_ioremap_resource@PLT
	mov	QWORD PTR 136[rbp], rax
	mov	rdi, rax
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L40
	mov	eax, DWORD PTR [rbx]
	mov	DWORD PTR 128[rbp], eax
	mov	eax, DWORD PTR FMC2_MAX_CE[rip]
	test	eax, eax
	jle	.L5
	xor	ebx, ebx
	mov	r13d, 1
	.p2align 4,,10
	.p2align 3
.L9:
	mov	r14d, DWORD PTR 0[rbp]
	mov	edi, ebx
	call	BIT@PLT
	test	r14d, eax
	je	.L6
	mov	esi, DWORD PTR IORESOURCE_MEM[rip]
	mov	edx, r13d
	mov	rdi, r12
	lea	r14, 0[0+rbx*8]
	call	platform_get_resource@PLT
	mov	rcx, QWORD PTR 120[rbp]
	mov	rdi, r12
	mov	rsi, rax
	mov	r15, rax
	add	rcx, r14
	mov	QWORD PTR [rsp], rcx
	call	devm_ioremap_resource@PLT
	mov	rcx, QWORD PTR [rsp]
	mov	QWORD PTR [rcx], rax
	mov	rax, QWORD PTR 120[rbp]
	mov	rdi, QWORD PTR [rax+rbx*8]
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L41
	mov	edx, DWORD PTR [r15]
	mov	rax, QWORD PTR 112[rbp]
	mov	rdi, r12
	mov	DWORD PTR [rax+rbx*4], edx
	mov	esi, DWORD PTR IORESOURCE_MEM[rip]
	lea	edx, 1[r13]
	call	platform_get_resource@PLT
	mov	r15, QWORD PTR 104[rbp]
	mov	rdi, r12
	mov	rsi, rax
	call	devm_ioremap_resource@PLT
	add	r15, r14
	mov	QWORD PTR [r15], rax
	mov	rax, QWORD PTR 104[rbp]
	mov	rdi, QWORD PTR [rax+rbx*8]
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L42
	mov	esi, DWORD PTR IORESOURCE_MEM[rip]
	lea	edx, 2[r13]
	mov	rdi, r12
	call	platform_get_resource@PLT
	mov	r15, QWORD PTR 96[rbp]
	mov	rdi, r12
	mov	rsi, rax
	call	devm_ioremap_resource@PLT
	add	r15, r14
	mov	QWORD PTR [r15], rax
	mov	rax, QWORD PTR 96[rbp]
	mov	rdi, QWORD PTR [rax+r14]
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L43
.L6:
	add	r13d, 3
	add	rbx, 1
	cmp	DWORD PTR FMC2_MAX_CE[rip], ebx
	jg	.L9
.L5:
	xor	esi, esi
	mov	rdi, r12
	call	platform_get_irq@PLT
	mov	r13d, eax
	test	eax, eax
	js	.L44
	mov	rdi, r12
	call	dev_name@PLT
	mov	edx, DWORD PTR stm32_fmc2_irq[rip]
	mov	esi, r13d
	xor	ecx, ecx
	mov	r8d, eax
	mov	r9, rbp
	mov	rdi, r12
	call	devm_request_irq@PLT
	mov	r13d, eax
	test	eax, eax
	jne	.L45
	lea	rdi, 88[rbp]
	call	init_completion@PLT
	xor	esi, esi
	mov	rdi, r12
	call	devm_clk_get@PLT
	mov	QWORD PTR 8[rbp], rax
	mov	rdi, rax
	call	IS_ERR@PLT
	mov	rdi, QWORD PTR 8[rbp]
	test	rax, rax
	jne	.L37
	call	clk_prepare_enable@PLT
	mov	r13d, eax
	test	eax, eax
	jne	.L46
	xor	esi, esi
	mov	rdi, r12
	call	devm_reset_control_get@PLT
	mov	rdi, rax
	mov	r13, rax
	call	IS_ERR@PLT
	test	rax, rax
	je	.L47
.L14:
	mov	rdi, rbp
	call	stm32_fmc2_dma_setup@PLT
	mov	r13d, eax
	test	eax, eax
	jne	.L1
	mov	rdi, rbp
	lea	rbx, 64[rbp]
	call	stm32_fmc2_init@PLT
	mov	rdi, rbx
	call	nand_to_mtd@PLT
	mov	esi, DWORD PTR 56[rbp]
	mov	rdi, rbx
	mov	QWORD PTR [rax], r12
	mov	r14, rax
	mov	rax, QWORD PTR 8[rsp]
	mov	QWORD PTR 80[rbp], rax
	mov	eax, DWORD PTR NAND_BUSWIDTH_AUTO[rip]
	or	eax, DWORD PTR NAND_NO_SUBPAGE_WRITE[rip]
	or	eax, DWORD PTR NAND_USE_BOUNCE_BUFFER[rip]
	or	DWORD PTR 64[rbp], eax
	mov	eax, DWORD PTR NAND_ECC_HW[rip]
	mov	DWORD PTR 76[rbp], eax
	mov	eax, DWORD PTR FMC2_ECC_STEP_SIZE[rip]
	mov	DWORD PTR 72[rbp], eax
	mov	eax, DWORD PTR FMC2_ECC_BCH8[rip]
	mov	DWORD PTR 68[rbp], eax
	call	nand_scan@PLT
	mov	r13d, eax
	test	eax, eax
	jne	.L15
	xor	edx, edx
	xor	esi, esi
	mov	rdi, r14
	call	mtd_device_register@PLT
	mov	r13d, eax
	test	eax, eax
	jne	.L48
	mov	rsi, rbp
	mov	rdi, r12
	call	platform_set_drvdata@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L40:
	mov	rdi, QWORD PTR 136[rbp]
.L37:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	PTR_ERR@PLT
	.p2align 4,,10
	.p2align 3
.L41:
	.cfi_restore_state
	mov	rax, QWORD PTR 120[rbp]
	mov	rdi, QWORD PTR [rax+r14]
	jmp	.L37
	.p2align 4,,10
	.p2align 3
.L42:
	mov	rax, QWORD PTR 104[rbp]
	mov	rdi, QWORD PTR [rax+r14]
	jmp	.L37
	.p2align 4,,10
	.p2align 3
.L43:
	mov	rax, QWORD PTR 96[rbp]
	mov	rdi, QWORD PTR [rax+r14]
	jmp	.L37
.L45:
	lea	rsi, .LC1[rip]
	mov	rdi, r12
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L44:
	add	eax, DWORD PTR EPROBE_DEFER[rip]
	je	.L1
	lea	rsi, .LC0[rip]
	mov	rdi, r12
	call	dev_err@PLT
	jmp	.L1
.L46:
	lea	rsi, .LC2[rip]
	mov	rdi, r12
	call	dev_err@PLT
	jmp	.L1
.L47:
	mov	rdi, r13
	call	reset_control_assert@PLT
	mov	rdi, r13
	call	reset_control_deassert@PLT
	jmp	.L14
.L48:
	mov	rdi, rbx
	call	nand_cleanup@PLT
.L15:
	mov	rdi, QWORD PTR 40[rbp]
	test	rdi, rdi
	jne	.L49
.L17:
	mov	rdi, QWORD PTR 32[rbp]
	test	rdi, rdi
	jne	.L50
.L18:
	mov	rdi, QWORD PTR 24[rbp]
	test	rdi, rdi
	jne	.L51
.L19:
	lea	rdi, 20[rbp]
	call	sg_free_table@PLT
	lea	rdi, 16[rbp]
	call	sg_free_table@PLT
	mov	rdi, QWORD PTR 8[rbp]
	call	clk_disable_unprepare@PLT
	jmp	.L1
.L49:
	call	dma_release_channel@PLT
	jmp	.L17
.L51:
	call	dma_release_channel@PLT
	jmp	.L19
.L50:
	call	dma_release_channel@PLT
	jmp	.L18
	.cfi_endproc
.LFE0:
	.size	stm32_fmc2_probe, .-stm32_fmc2_probe
	.comm	stm32_fmc2_nand_controller_ops,4,4
	.comm	stm32_fmc2_irq,4,4
	.comm	NAND_USE_BOUNCE_BUFFER,4,4
	.comm	NAND_NO_SUBPAGE_WRITE,4,4
	.comm	NAND_ECC_HW,4,4
	.comm	NAND_BUSWIDTH_AUTO,4,4
	.comm	IORESOURCE_MEM,4,4
	.comm	GFP_KERNEL,4,4
	.comm	FMC2_MAX_CE,4,4
	.comm	FMC2_ECC_STEP_SIZE,4,4
	.comm	FMC2_ECC_BCH8,4,4
	.comm	EPROBE_DEFER,4,4
	.comm	ENOMEM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_stm32_fmc2_nand.c_stm32_fmc2_probe.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"IRQ error missing or invalid\012\000"
	.align	2
.LC1:
	.ascii	"failed to request irq\012\000"
	.align	2
.LC2:
	.ascii	"can not enable the clock\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	stm32_fmc2_probe, %function
stm32_fmc2_probe:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L52
	mov	r1, #88
	ldr	r2, [r3]
	sub	sp, sp, #20
	mov	r6, r0
	bl	devm_kzalloc
	subs	r5, r0, #0
	beq	.L39
	add	r3, r5, #28
	mov	r0, r3
	str	r6, [r5, #84]
	str	r3, [sp, #12]
	bl	nand_controller_init
	ldr	r3, .L52+4
	mov	r0, r5
	str	r3, [r5, #28]
	bl	stm32_fmc2_parse_dt
	subs	r4, r0, #0
	beq	.L40
.L1:
	mov	r0, r4
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L40:
	ldr	r8, .L52+8
	mov	r2, r4
	ldr	r1, [r8]
	mov	r0, r6
	bl	platform_get_resource
	mov	r7, r0
	mov	r0, r6
	mov	r1, r7
	bl	devm_ioremap_resource
	str	r0, [r5, #80]
	bl	IS_ERR
	subs	r4, r0, #0
	ldrne	r0, [r5, #80]
	bne	.L37
	ldr	r10, .L52+12
	ldr	r2, [r7]
	ldr	r3, [r10]
	str	r2, [r5, #76]
	cmp	r3, #0
	ble	.L5
.L9:
	mov	r0, r4
	ldr	r9, [r5]
	bl	BIT
	add	r7, r4, r4, lsl #1
	tst	r9, r0
	add	r2, r7, #1
	beq	.L6
	ldr	r1, [r8]
	mov	r0, r6
	bl	platform_get_resource
	mov	fp, r0
	mov	r0, r6
	mov	r1, fp
	ldr	r9, [r5, #72]
	bl	devm_ioremap_resource
	ldr	r3, [r5, #72]
	str	r0, [r9, r4, lsl #2]
	ldr	r0, [r3, r4, lsl #2]
	bl	IS_ERR
	cmp	r0, #0
	add	r2, r7, #2
	lsl	r9, r4, #2
	bne	.L41
	ldr	r1, [fp]
	ldr	r3, [r5, #68]
	mov	r0, r6
	str	r1, [r3, r4, lsl #2]
	ldr	r1, [r8]
	bl	platform_get_resource
	mov	r1, r0
	mov	r0, r6
	ldr	fp, [r5, #64]
	bl	devm_ioremap_resource
	ldr	r3, [r5, #64]
	str	r0, [fp, r4, lsl #2]
	ldr	r0, [r3, r4, lsl #2]
	bl	IS_ERR
	cmp	r0, #0
	add	r2, r7, #3
	bne	.L42
	ldr	r1, [r8]
	mov	r0, r6
	bl	platform_get_resource
	mov	r1, r0
	mov	r0, r6
	ldr	r7, [r5, #60]
	bl	devm_ioremap_resource
	ldr	r3, [r5, #60]
	str	r0, [r7, r9]
	ldr	r0, [r3, r9]
	bl	IS_ERR
	cmp	r0, #0
	bne	.L43
.L6:
	ldr	r3, [r10]
	add	r4, r4, #1
	cmp	r3, r4
	bgt	.L9
.L5:
	mov	r1, #0
	mov	r0, r6
	bl	platform_get_irq
	subs	r4, r0, #0
	blt	.L44
	ldr	r3, .L52+16
	mov	r0, r6
	ldr	r7, [r3]
	bl	dev_name
	mov	r1, r4
	stm	sp, {r0, r5}
	mov	r2, r7
	mov	r3, #0
	mov	r0, r6
	bl	devm_request_irq
	subs	r4, r0, #0
	bne	.L45
	add	r0, r5, #56
	bl	init_completion
	mov	r1, r4
	mov	r0, r6
	bl	devm_clk_get
	str	r0, [r5, #4]
	bl	IS_ERR
	cmp	r0, #0
	ldr	r0, [r5, #4]
	bne	.L37
	bl	clk_prepare_enable
	subs	r4, r0, #0
	bne	.L46
	mov	r1, r4
	mov	r0, r6
	bl	devm_reset_control_get
	mov	r4, r0
	bl	IS_ERR
	cmp	r0, #0
	beq	.L47
.L14:
	mov	r0, r5
	bl	stm32_fmc2_dma_setup
	subs	r4, r0, #0
	bne	.L1
	add	r7, r5, #36
	mov	r0, r5
	bl	stm32_fmc2_init
	mov	r0, r7
	bl	nand_to_mtd
	mov	r8, r0
	ldr	r2, .L52+20
	ldr	r3, .L52+24
	ldr	r1, [r2]
	ldr	r2, .L52+28
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
	ldr	r2, .L52+32
	ldr	r1, .L52+36
	ldr	r0, [r2]
	ldr	r2, .L52+40
	ldr	ip, [r1]
	ldr	r1, [r2]
	ldr	r2, [sp, #12]
	str	r6, [r8]
	str	r2, [r5, #52]
	ldr	r2, [r5, #36]
	str	r0, [r5, #44]
	orr	r3, r2, r3
	str	r1, [r5, #40]
	mov	r0, r7
	ldr	r1, [r5, #32]
	str	ip, [r5, #48]
	str	r3, [r5, #36]
	bl	nand_scan
	subs	r4, r0, #0
	bne	.L15
	mov	r2, r4
	mov	r1, r4
	mov	r0, r8
	bl	mtd_device_register
	subs	r4, r0, #0
	bne	.L48
	mov	r1, r5
	mov	r0, r6
	bl	platform_set_drvdata
	b	.L1
.L39:
	ldr	r3, .L52+44
	ldr	r4, [r3]
	rsb	r4, r4, #0
	mov	r0, r4
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L41:
	ldr	r3, [r5, #72]
	ldr	r0, [r3, r9]
.L37:
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	PTR_ERR
.L42:
	ldr	r3, [r5, #64]
	ldr	r0, [r3, r9]
	b	.L37
.L43:
	ldr	r3, [r5, #60]
	ldr	r0, [r3, r9]
	b	.L37
.L45:
	mov	r0, r6
	ldr	r1, .L52+48
	bl	dev_err
	b	.L1
.L44:
	ldr	r3, .L52+52
	ldr	r3, [r3]
	cmn	r4, r3
	beq	.L1
	mov	r0, r6
	ldr	r1, .L52+56
	bl	dev_err
	b	.L1
.L46:
	mov	r0, r6
	ldr	r1, .L52+60
	bl	dev_err
	b	.L1
.L47:
	mov	r0, r4
	bl	reset_control_assert
	mov	r0, r4
	bl	reset_control_deassert
	b	.L14
.L48:
	mov	r0, r7
	bl	nand_cleanup
.L15:
	ldr	r0, [r5, #24]
	cmp	r0, #0
	bne	.L49
.L17:
	ldr	r0, [r5, #20]
	cmp	r0, #0
	bne	.L50
.L18:
	ldr	r0, [r5, #16]
	cmp	r0, #0
	bne	.L51
.L19:
	add	r0, r5, #12
	bl	sg_free_table
	add	r0, r5, #8
	bl	sg_free_table
	ldr	r0, [r5, #4]
	bl	clk_disable_unprepare
	b	.L1
.L49:
	bl	dma_release_channel
	b	.L17
.L51:
	bl	dma_release_channel
	b	.L19
.L50:
	bl	dma_release_channel
	b	.L18
.L53:
	.align	2
.L52:
	.word	GFP_KERNEL
	.word	stm32_fmc2_nand_controller_ops
	.word	IORESOURCE_MEM
	.word	FMC2_MAX_CE
	.word	stm32_fmc2_irq
	.word	NAND_NO_SUBPAGE_WRITE
	.word	NAND_BUSWIDTH_AUTO
	.word	NAND_USE_BOUNCE_BUFFER
	.word	FMC2_ECC_STEP_SIZE
	.word	NAND_ECC_HW
	.word	FMC2_ECC_BCH8
	.word	ENOMEM
	.word	.LC1
	.word	EPROBE_DEFER
	.word	.LC0
	.word	.LC2
	.size	stm32_fmc2_probe, .-stm32_fmc2_probe
	.comm	stm32_fmc2_nand_controller_ops,4,4
	.comm	stm32_fmc2_irq,4,4
	.comm	NAND_USE_BOUNCE_BUFFER,4,4
	.comm	NAND_NO_SUBPAGE_WRITE,4,4
	.comm	NAND_ECC_HW,4,4
	.comm	NAND_BUSWIDTH_AUTO,4,4
	.comm	IORESOURCE_MEM,4,4
	.comm	GFP_KERNEL,4,4
	.comm	FMC2_MAX_CE,4,4
	.comm	FMC2_ECC_STEP_SIZE,4,4
	.comm	FMC2_ECC_BCH8,4,4
	.comm	EPROBE_DEFER,4,4
	.comm	ENOMEM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
