	.file	"extr_clk-tegra210.c_tegra210_pllcx_set_defaults.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"%s already enabled. Postponing set full defaults\n"
	.text
	.p2align 4
	.type	tegra210_pllcx_set_defaults, @function
tegra210_pllcx_set_defaults:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rsi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	rax, QWORD PTR [rsi]
	mov	rdi, QWORD PTR clk_base[rip]
	mov	DWORD PTR [rax], 1
	add	rdi, QWORD PTR 16[rax]
	call	readl_relaxed@PLT
	test	DWORD PTR PLL_ENABLE[rip], eax
	jne	.L6
	mov	rax, QWORD PTR [rbx]
	mov	edi, DWORD PTR PLLCX_MISC0_DEFAULT_VALUE[rip]
	mov	rsi, QWORD PTR clk_base[rip]
	mov	rax, QWORD PTR 8[rax]
	add	rsi, QWORD PTR [rax]
	call	writel_relaxed@PLT
	mov	rax, QWORD PTR [rbx]
	mov	edi, DWORD PTR PLLCX_MISC1_DEFAULT_VALUE[rip]
	mov	rsi, QWORD PTR clk_base[rip]
	mov	rax, QWORD PTR 8[rax]
	add	rsi, QWORD PTR 8[rax]
	call	writel_relaxed@PLT
	mov	rax, QWORD PTR [rbx]
	mov	edi, DWORD PTR PLLCX_MISC2_DEFAULT_VALUE[rip]
	mov	rsi, QWORD PTR clk_base[rip]
	mov	rax, QWORD PTR 8[rax]
	add	rsi, QWORD PTR 16[rax]
	call	writel_relaxed@PLT
	mov	rax, QWORD PTR [rbx]
	mov	edi, DWORD PTR PLLCX_MISC3_DEFAULT_VALUE[rip]
	mov	rsi, QWORD PTR clk_base[rip]
	mov	rax, QWORD PTR 8[rax]
	add	rsi, QWORD PTR 24[rax]
	call	writel_relaxed@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	edi, 1
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	udelay@PLT
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	rdi, QWORD PTR [rbx]
	call	pllcx_check_defaults@PLT
	mov	rax, QWORD PTR [rbx]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L7
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	rsi, rbp
	lea	rdi, .LC0[rip]
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	pr_warn@PLT
	.cfi_endproc
.LFE0:
	.size	tegra210_pllcx_set_defaults, .-tegra210_pllcx_set_defaults
	.comm	clk_base,8,8
	.comm	PLL_ENABLE,4,4
	.comm	PLLCX_MISC3_DEFAULT_VALUE,4,4
	.comm	PLLCX_MISC2_DEFAULT_VALUE,4,4
	.comm	PLLCX_MISC1_DEFAULT_VALUE,4,4
	.comm	PLLCX_MISC0_DEFAULT_VALUE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_clk-tegra210.c_tegra210_pllcx_set_defaults.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"%s already enabled. Postponing set full defaults\012"
	.ascii	"\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tegra210_pllcx_set_defaults, %function
tegra210_pllcx_set_defaults:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r6, #1
	ldr	r3, [r1]
	ldr	r5, .L7
	mov	r7, r0
	ldr	r2, [r5]
	ldr	r0, [r3, #8]
	str	r6, [r3]
	add	r0, r0, r2
	mov	r4, r1
	bl	readl_relaxed
	ldr	r3, .L7+4
	ldr	r3, [r3]
	tst	r0, r3
	bne	.L6
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2, #4]
	ldr	r2, .L7+8
	ldr	r1, [r1]
	ldr	r0, [r2]
	add	r1, r1, r3
	bl	writel_relaxed
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2, #4]
	ldr	r2, .L7+12
	ldr	r1, [r1, #4]
	ldr	r0, [r2]
	add	r1, r1, r3
	bl	writel_relaxed
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2, #4]
	ldr	r2, .L7+16
	ldr	r1, [r1, #8]
	ldr	r0, [r2]
	add	r1, r1, r3
	bl	writel_relaxed
	ldr	r2, [r4]
	ldr	r3, [r5]
	ldr	r1, [r2, #4]
	ldr	r2, .L7+20
	ldr	r1, [r1, #12]
	ldr	r0, [r2]
	add	r1, r1, r3
	bl	writel_relaxed
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	udelay
.L6:
	ldr	r0, [r4]
	bl	pllcx_check_defaults
	ldr	r3, [r4]
	ldr	r3, [r3]
	cmp	r3, #0
	popne	{r4, r5, r6, r7, r8, pc}
	mov	r1, r7
	pop	{r4, r5, r6, r7, r8, lr}
	ldr	r0, .L7+24
	b	pr_warn
.L8:
	.align	2
.L7:
	.word	clk_base
	.word	PLL_ENABLE
	.word	PLLCX_MISC0_DEFAULT_VALUE
	.word	PLLCX_MISC1_DEFAULT_VALUE
	.word	PLLCX_MISC2_DEFAULT_VALUE
	.word	PLLCX_MISC3_DEFAULT_VALUE
	.word	.LC0
	.size	tegra210_pllcx_set_defaults, .-tegra210_pllcx_set_defaults
	.comm	clk_base,4,4
	.comm	PLL_ENABLE,4,4
	.comm	PLLCX_MISC3_DEFAULT_VALUE,4,4
	.comm	PLLCX_MISC2_DEFAULT_VALUE,4,4
	.comm	PLLCX_MISC1_DEFAULT_VALUE,4,4
	.comm	PLLCX_MISC0_DEFAULT_VALUE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
