	.file	"extr_ufshcd.c_ufshcd_resume.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	ufshcd_resume, @function
ufshcd_resume:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	rbx, rdi
	mov	r13d, DWORD PTR 4[rdi]
	mov	DWORD PTR [rdi], 1
	call	ufshcd_hba_vreg_set_hpm@PLT
	mov	esi, 1
	mov	rdi, rbx
	call	ufshcd_setup_clocks@PLT
	test	eax, eax
	je	.L39
	mov	DWORD PTR [rbx], 0
	mov	r12d, eax
.L16:
	lea	rdi, 8[rbx]
	mov	esi, r12d
	call	ufshcd_update_reg_hist@PLT
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L39:
	.cfi_restore_state
	mov	rdi, rbx
	call	ufshcd_enable_irq@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L36
	mov	rdi, rbx
	call	ufshcd_vreg_set_hpm@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L40
.L36:
	mov	rdi, rbx
	call	ufshcd_disable_irq@PLT
	cmp	QWORD PTR 16[rbx], 0
	je	.L32
.L17:
	mov	rdi, rbx
	call	ufshcd_suspend_clkscaling@PLT
	xor	esi, esi
	mov	rdi, rbx
	call	ufshcd_setup_clocks@PLT
	mov	DWORD PTR [rbx], 0
	test	r12d, r12d
	jne	.L16
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L40:
	.cfi_restore_state
	mov	rdi, rbx
	mov	esi, ebp
	call	ufshcd_vops_resume@PLT
	mov	rdi, rbx
	mov	r12d, eax
	test	eax, eax
	jne	.L4
	call	ufshcd_is_link_hibern8@PLT
	mov	rdi, rbx
	test	rax, rax
	jne	.L41
	call	ufshcd_is_link_off@PLT
	test	rax, rax
	jne	.L42
.L7:
	mov	rdi, rbx
	call	ufshcd_is_ufs_dev_active@PLT
	test	eax, eax
	jne	.L11
	mov	esi, DWORD PTR UFS_ACTIVE_PWR_MODE[rip]
	mov	rdi, rbx
	call	ufshcd_set_dev_pwr_mode@PLT
	mov	r14d, eax
	test	eax, eax
	jne	.L43
.L11:
	mov	rdi, rbx
	call	ufshcd_keep_autobkops_enabled_except_suspend@PLT
	mov	rdi, rbx
	test	rax, rax
	je	.L12
	call	ufshcd_enable_auto_bkops@PLT
.L13:
	cmp	QWORD PTR 16[rbx], 0
	mov	DWORD PTR 24[rbx], 0
	jne	.L44
.L14:
	mov	rdi, rbx
	call	ufshcd_release@PLT
	mov	rdi, rbx
	call	ufshcd_auto_hibern8_enable@PLT
	mov	DWORD PTR [rbx], 0
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L4:
	call	ufshcd_vreg_set_lpm@PLT
	jmp	.L36
	.p2align 4,,10
	.p2align 3
.L41:
	call	ufshcd_uic_hibern8_exit@PLT
	mov	r14d, eax
	test	eax, eax
	jne	.L6
	mov	rdi, rbx
	call	ufshcd_set_link_active@PLT
	jmp	.L7
.L43:
	xor	edx, edx
	mov	esi, r13d
	mov	rdi, rbx
	call	ufshcd_link_state_transition@PLT
.L6:
	mov	esi, ebp
	mov	rdi, rbx
	call	ufshcd_vops_suspend@PLT
	mov	rdi, rbx
	call	ufshcd_vreg_set_lpm@PLT
	mov	rdi, rbx
	call	ufshcd_disable_irq@PLT
	cmp	QWORD PTR 16[rbx], 0
	je	.L33
	mov	r12d, r14d
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L12:
	call	ufshcd_urgent_bkops@PLT
	jmp	.L13
.L42:
	mov	rdi, rbx
	call	ufshcd_host_reset_and_restore@PLT
	mov	r14d, eax
	test	eax, eax
	jne	.L6
	mov	rdi, rbx
	call	ufshcd_is_link_active@PLT
	test	eax, eax
	jne	.L7
	mov	esi, ebp
	mov	rdi, rbx
	call	ufshcd_vops_suspend@PLT
	mov	rdi, rbx
	call	ufshcd_vreg_set_lpm@PLT
	mov	rdi, rbx
	call	ufshcd_disable_irq@PLT
	cmp	QWORD PTR 16[rbx], 0
	jne	.L17
	xor	esi, esi
	mov	rdi, rbx
	call	ufshcd_setup_clocks@PLT
	mov	DWORD PTR [rbx], 0
	jmp	.L1
.L44:
	mov	rdi, rbx
	call	ufshcd_resume_clkscaling@PLT
	jmp	.L14
.L32:
	xor	esi, esi
	mov	rdi, rbx
	call	ufshcd_setup_clocks@PLT
	mov	DWORD PTR [rbx], 0
	jmp	.L16
.L33:
	xor	esi, esi
	mov	rdi, rbx
	mov	r12d, r14d
	call	ufshcd_setup_clocks@PLT
	mov	DWORD PTR [rbx], 0
	jmp	.L16
	.cfi_endproc
.LFE0:
	.size	ufshcd_resume, .-ufshcd_resume
	.comm	UFS_ACTIVE_PWR_MODE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ufshcd.c_ufshcd_resume.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ufshcd_resume, %function
ufshcd_resume:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r5, #1
	mov	r4, r0
	str	r5, [r0]
	mov	r6, r1
	ldr	r7, [r0, #4]
	bl	ufshcd_hba_vreg_set_hpm
	mov	r1, r5
	mov	r0, r4
	bl	ufshcd_setup_clocks
	subs	r5, r0, #0
	movne	r3, #0
	strne	r3, [r4]
	beq	.L41
.L16:
	mov	r1, r5
	add	r0, r4, #8
	bl	ufshcd_update_reg_hist
.L1:
	mov	r0, r5
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L41:
	mov	r0, r4
	bl	ufshcd_enable_irq
	subs	r5, r0, #0
	bne	.L3
	mov	r0, r4
	bl	ufshcd_vreg_set_hpm
	subs	r5, r0, #0
	beq	.L42
.L3:
	mov	r0, r4
	bl	ufshcd_disable_irq
	ldr	r6, [r4, #12]
	cmp	r6, #0
	beq	.L43
.L17:
	mov	r0, r4
	bl	ufshcd_suspend_clkscaling
	mov	r1, #0
	mov	r0, r4
	bl	ufshcd_setup_clocks
	mov	r3, #0
	cmp	r5, r3
	str	r3, [r4]
	bne	.L16
	mov	r0, r5
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L42:
	mov	r1, r6
	mov	r0, r4
	bl	ufshcd_vops_resume
	subs	r5, r0, #0
	mov	r0, r4
	bne	.L4
	bl	ufshcd_is_link_hibern8
	cmp	r0, #0
	mov	r0, r4
	bne	.L44
	bl	ufshcd_is_link_off
	cmp	r0, #0
	bne	.L45
.L7:
	mov	r0, r4
	bl	ufshcd_is_ufs_dev_active
	subs	r9, r0, #0
	bne	.L11
	ldr	r3, .L48
	mov	r0, r4
	ldr	r1, [r3]
	bl	ufshcd_set_dev_pwr_mode
	subs	r8, r0, #0
	bne	.L46
.L11:
	mov	r0, r4
	bl	ufshcd_keep_autobkops_enabled_except_suspend
	cmp	r0, #0
	mov	r0, r4
	beq	.L12
	bl	ufshcd_enable_auto_bkops
.L13:
	mov	r2, #0
	ldr	r3, [r4, #12]
	str	r2, [r4, #16]
	cmp	r3, r2
	bne	.L47
.L14:
	mov	r0, r4
	bl	ufshcd_release
	mov	r0, r4
	bl	ufshcd_auto_hibern8_enable
	mov	r3, #0
	str	r3, [r4]
	b	.L1
.L4:
	bl	ufshcd_vreg_set_lpm
	b	.L3
.L44:
	bl	ufshcd_uic_hibern8_exit
	subs	r8, r0, #0
	bne	.L6
	mov	r0, r4
	bl	ufshcd_set_link_active
	b	.L7
.L46:
	mov	r2, r9
	mov	r1, r7
	mov	r0, r4
	bl	ufshcd_link_state_transition
.L6:
	mov	r1, r6
	mov	r0, r4
	bl	ufshcd_vops_suspend
	mov	r0, r4
	bl	ufshcd_vreg_set_lpm
	mov	r0, r4
	bl	ufshcd_disable_irq
	ldr	r6, [r4, #12]
	cmp	r6, #0
	beq	.L36
.L24:
	mov	r5, r8
	b	.L17
.L12:
	bl	ufshcd_urgent_bkops
	b	.L13
.L45:
	mov	r0, r4
	bl	ufshcd_host_reset_and_restore
	subs	r8, r0, #0
	bne	.L6
	mov	r0, r4
	bl	ufshcd_is_link_active
	subs	r8, r0, #0
	bne	.L7
	mov	r1, r6
	mov	r0, r4
	bl	ufshcd_vops_suspend
	mov	r0, r4
	bl	ufshcd_vreg_set_lpm
	mov	r0, r4
	bl	ufshcd_disable_irq
	ldr	r5, [r4, #12]
	cmp	r5, #0
	bne	.L24
	mov	r1, r5
	mov	r0, r4
	bl	ufshcd_setup_clocks
	str	r5, [r4]
	b	.L1
.L47:
	mov	r0, r4
	bl	ufshcd_resume_clkscaling
	b	.L14
.L43:
	mov	r1, r6
	mov	r0, r4
	bl	ufshcd_setup_clocks
	str	r6, [r4]
	b	.L16
.L36:
	mov	r1, r6
	mov	r0, r4
	bl	ufshcd_setup_clocks
	mov	r5, r8
	str	r6, [r4]
	b	.L16
.L49:
	.align	2
.L48:
	.word	UFS_ACTIVE_PWR_MODE
	.size	ufshcd_resume, .-ufshcd_resume
	.comm	UFS_ACTIVE_PWR_MODE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
