	.file	"extr_pinctrl-imx.c_imx_pinconf_set_mmio.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Pin(%s) does not support config function\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"pinconf set pin %s\n"
.LC2:
	.string	"write: offset 0x%x val 0x%x\n"
.LC3:
	.string	"write: offset 0x%x val 0x%lx\n"
	.text
	.p2align 4
	.type	imx_pinconf_set_mmio, @function
imx_pinconf_set_mmio:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, ecx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	pinctrl_dev_get_drvdata@PLT
	mov	esi, r12d
	mov	r13, QWORD PTR 16[rax]
	mov	rbp, rax
	mov	rax, QWORD PTR 8[rax]
	mov	edi, DWORD PTR 4[rbp]
	lea	r12, [rax+rsi*4]
	mov	rax, QWORD PTR 16[r13]
	cmp	DWORD PTR [r12], -1
	mov	edx, DWORD PTR [rax+rsi*4]
	je	.L12
	xor	eax, eax
	lea	rsi, .LC1[rip]
	call	dev_dbg@PLT
	test	r14d, r14d
	je	.L8
	lea	eax, -1[r14]
	lea	r15, .LC3[rip]
	lea	r14, 8[rbx+rax*8]
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L13:
	mov	edi, esi
	add	rbx, 8
	call	readl@PLT
	mov	rcx, QWORD PTR -8[rbx]
	and	rax, QWORD PTR 8[r13]
	mov	esi, DWORD PTR [r12]
	add	esi, DWORD PTR 0[rbp]
	or	rcx, rax
	mov	rdi, rcx
	mov	QWORD PTR 8[rsp], rcx
	call	writel@PLT
	mov	edi, DWORD PTR 4[rbp]
	mov	rcx, QWORD PTR 8[rsp]
	xor	eax, eax
	mov	edx, DWORD PTR [r12]
	lea	rsi, .LC2[rip]
	call	dev_dbg@PLT
	cmp	r14, rbx
	je	.L8
.L7:
	mov	esi, DWORD PTR [r12]
	mov	eax, DWORD PTR 0[r13]
	add	esi, DWORD PTR 0[rbp]
	test	DWORD PTR SHARE_MUX_CONF_REG[rip], eax
	jne	.L13
	mov	rdi, QWORD PTR [rbx]
	add	rbx, 8
	call	writel@PLT
	mov	rcx, QWORD PTR -8[rbx]
	mov	edi, DWORD PTR 4[rbp]
	mov	rsi, r15
	mov	edx, DWORD PTR [r12]
	xor	eax, eax
	call	dev_dbg@PLT
	cmp	r14, rbx
	jne	.L7
.L8:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	lea	rsi, .LC0[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 24
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	imx_pinconf_set_mmio, .-imx_pinconf_set_mmio
	.comm	SHARE_MUX_CONF_REG,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pinctrl-imx.c_imx_pinconf_set_mmio.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Pin(%s) does not support config function\012\000"
	.align	2
.LC1:
	.ascii	"pinconf set pin %s\012\000"
	.align	2
.LC2:
	.ascii	"write: offset 0x%x val 0x%x\012\000"
	.align	2
.LC3:
	.ascii	"write: offset 0x%x val 0x%lx\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	imx_pinconf_set_mmio, %function
imx_pinconf_set_mmio:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #12
	mov	r9, r1
	mov	r8, r3
	mov	r4, r2
	bl	pinctrl_dev_get_drvdata
	ldr	r6, [r0, #8]
	ldr	r7, [r0, #12]
	ldr	r3, [r6, r9, lsl #2]
	mov	r5, r0
	cmn	r3, #1
	add	r6, r6, r9, lsl #2
	ldr	r3, [r7, #8]
	beq	.L12
	ldr	r1, .L14
	ldr	r2, [r3, r9, lsl #2]
	ldr	r0, [r0, #4]
	bl	dev_dbg
	cmp	r8, #0
	beq	.L8
	ldr	r9, .L14+4
	ldr	fp, .L14+8
	ldr	r10, .L14+12
	add	r8, r4, r8, lsl #2
	b	.L7
.L13:
	mov	r0, r1
	bl	readl
	ldr	r3, [r7, #4]
	ldr	ip, [r4]
	ldr	r2, [r6]
	ldr	r1, [r5]
	and	r3, r3, r0
	orr	r3, r3, ip
	add	r1, r1, r2
	mov	r0, r3
	str	r3, [sp, #4]
	add	r4, r4, #4
	bl	writel
	mov	r1, r10
	ldr	r3, [sp, #4]
	ldr	r2, [r6]
	ldr	r0, [r5, #4]
	bl	dev_dbg
	cmp	r8, r4
	beq	.L8
.L7:
	ldr	r2, [r7]
	ldr	r3, [r9]
	ldr	r1, [r5]
	ldr	r0, [r6]
	tst	r2, r3
	add	r1, r1, r0
	bne	.L13
	ldr	r0, [r4]
	bl	writel
	add	r4, r4, #4
	ldr	r3, [r4, #-4]
	mov	r1, fp
	ldr	r2, [r6]
	ldr	r0, [r5, #4]
	bl	dev_dbg
	cmp	r8, r4
	bne	.L7
.L8:
	mov	r0, #0
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L12:
	ldr	r2, [r3, r9, lsl #2]
	ldr	r1, .L14+16
	ldr	r0, [r0, #4]
	bl	dev_err
	ldr	r3, .L14+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L15:
	.align	2
.L14:
	.word	.LC1
	.word	SHARE_MUX_CONF_REG
	.word	.LC3
	.word	.LC2
	.word	.LC0
	.word	EINVAL
	.size	imx_pinconf_set_mmio, .-imx_pinconf_set_mmio
	.comm	SHARE_MUX_CONF_REG,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
