	.file	"extr_cs42l51.c_cs42l51_probe.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"MCLK"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"Failed to request supplies: %d\n"
	.align 8
.LC2:
	.string	"Failed to enable supplies: %d\n"
	.section	.rodata.str1.1
.LC3:
	.string	"reset"
.LC4:
	.string	"Release reset gpio\n"
.LC5:
	.string	"failed to read I2C\n"
.LC6:
	.string	"Invalid chip id: %x\n"
	.section	.rodata.str1.8
	.align 8
.LC7:
	.string	"Cirrus Logic CS42L51, Revision: %02X\n"
	.text
	.p2align 4
	.globl	cs42l51_probe
	.type	cs42l51_probe, @function
cs42l51_probe:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12, rdi
	mov	rdi, rsi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L22
	mov	edx, DWORD PTR GFP_KERNEL[rip]
	mov	esi, 32
	mov	rdi, r12
	call	devm_kzalloc@PLT
	mov	r14d, DWORD PTR ENOMEM[rip]
	mov	rbp, rax
	neg	r14d
	test	rax, rax
	je	.L1
	mov	rsi, rax
	mov	rdi, r12
	call	dev_set_drvdata@PLT
	mov	QWORD PTR 24[rbp], r13
	mov	rdi, r12
	lea	rsi, .LC0[rip]
	call	devm_clk_get@PLT
	mov	QWORD PTR 16[rbp], rax
	mov	rdi, rax
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L23
.L5:
	mov	rdi, QWORD PTR 0[rbp]
	xor	ebx, ebx
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rax, QWORD PTR cs42l51_supply_names[rip]
	mov	rdi, QWORD PTR 0[rbp]
	mov	eax, DWORD PTR [rax+rbx*4]
	mov	DWORD PTR [rdi+rbx*4], eax
	add	rbx, 1
.L7:
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L8
	mov	r14, QWORD PTR 0[rbp]
	mov	rdi, r14
	call	ARRAY_SIZE@PLT
	mov	rdx, r14
	mov	rdi, r12
	mov	esi, eax
	call	devm_regulator_bulk_get@PLT
	mov	r14d, eax
	test	eax, eax
	jne	.L24
	mov	r14, QWORD PTR 0[rbp]
	mov	rdi, r14
	call	ARRAY_SIZE@PLT
	mov	rsi, r14
	mov	edi, eax
	call	regulator_bulk_enable@PLT
	mov	r14d, eax
	test	eax, eax
	jne	.L25
	mov	edx, DWORD PTR GPIOD_OUT_LOW[rip]
	mov	rdi, r12
	lea	rsi, .LC3[rip]
	call	devm_gpiod_get_optional@PLT
	mov	QWORD PTR 8[rbp], rax
	mov	rdi, rax
	call	IS_ERR@PLT
	test	rax, rax
	jne	.L26
	cmp	QWORD PTR 8[rbp], 0
	je	.L12
	lea	rsi, .LC4[rip]
	mov	rdi, r12
	call	dev_dbg@PLT
	mov	rdi, QWORD PTR 8[rbp]
	xor	esi, esi
	call	gpiod_set_value_cansleep@PLT
	mov	edi, 2
	call	mdelay@PLT
.L12:
	mov	esi, DWORD PTR CS42L51_CHIP_REV_ID[rip]
	lea	rdx, 4[rsp]
	mov	rdi, r13
	call	regmap_read@PLT
	mov	ebx, eax
	test	eax, eax
	js	.L27
	mov	esi, DWORD PTR CS42L51_CHIP_REV_A[rip]
	mov	edi, DWORD PTR CS42L51_CHIP_ID[rip]
	call	CS42L51_MK_CHIP_REV@PLT
	mov	edx, DWORD PTR 4[rsp]
	cmp	eax, edx
	je	.L15
	mov	esi, DWORD PTR CS42L51_CHIP_REV_B[rip]
	mov	edi, DWORD PTR CS42L51_CHIP_ID[rip]
	call	CS42L51_MK_CHIP_REV@PLT
	mov	edx, DWORD PTR 4[rsp]
	cmp	eax, edx
	jne	.L28
.L15:
	and	edx, DWORD PTR CS42L51_CHIP_REV_MASK[rip]
	lea	rsi, .LC7[rip]
	mov	rdi, r12
	call	dev_info@PLT
	mov	ecx, 1
	lea	rdx, cs42l51_dai[rip]
	mov	rdi, r12
	lea	rsi, soc_component_device_cs42l51[rip]
	call	devm_snd_soc_register_component@PLT
	test	eax, eax
	js	.L29
	.p2align 4,,10
	.p2align 3
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L30
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r14d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L22:
	.cfi_restore_state
	mov	rdi, r13
	call	PTR_ERR@PLT
	mov	r14d, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L25:
	mov	edx, eax
	lea	rsi, .LC2[rip]
	mov	rdi, r12
	xor	eax, eax
	call	dev_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L23:
	mov	rdi, QWORD PTR 16[rbp]
	call	PTR_ERR@PLT
	add	eax, DWORD PTR ENOENT[rip]
	jne	.L31
	mov	QWORD PTR 16[rbp], 0
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L24:
	mov	edx, eax
	lea	rsi, .LC1[rip]
	mov	rdi, r12
	xor	eax, eax
	call	dev_err@PLT
	jmp	.L1
.L28:
	lea	rsi, .LC6[rip]
	mov	rdi, r12
	xor	eax, eax
	call	dev_err@PLT
	mov	r14d, DWORD PTR ENODEV[rip]
	neg	r14d
.L14:
	mov	rbp, QWORD PTR 0[rbp]
	mov	rdi, rbp
	call	ARRAY_SIZE@PLT
	mov	rsi, rbp
	mov	edi, eax
	call	regulator_bulk_disable@PLT
	jmp	.L1
.L29:
	mov	r14d, eax
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L31:
	mov	rdi, QWORD PTR 16[rbp]
	call	PTR_ERR@PLT
	mov	r14d, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L27:
	lea	rsi, .LC5[rip]
	mov	rdi, r12
	xor	eax, eax
	mov	r14d, ebx
	call	dev_err@PLT
	jmp	.L14
.L26:
	mov	rdi, QWORD PTR 8[rbp]
	call	PTR_ERR@PLT
	mov	r14d, eax
	jmp	.L1
.L30:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	cs42l51_probe, .-cs42l51_probe
	.comm	soc_component_device_cs42l51,4,4
	.comm	cs42l51_supply_names,8,8
	.comm	cs42l51_dai,4,4
	.comm	GPIOD_OUT_LOW,4,4
	.comm	GFP_KERNEL,4,4
	.comm	ENOMEM,4,4
	.comm	ENOENT,4,4
	.comm	ENODEV,4,4
	.comm	CS42L51_CHIP_REV_MASK,4,4
	.comm	CS42L51_CHIP_REV_ID,4,4
	.comm	CS42L51_CHIP_REV_B,4,4
	.comm	CS42L51_CHIP_REV_A,4,4
	.comm	CS42L51_CHIP_ID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cs42l51.c_cs42l51_probe.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"MCLK\000"
	.align	2
.LC1:
	.ascii	"Failed to request supplies: %d\012\000"
	.align	2
.LC2:
	.ascii	"Failed to enable supplies: %d\012\000"
	.align	2
.LC3:
	.ascii	"reset\000"
	.align	2
.LC4:
	.ascii	"Release reset gpio\012\000"
	.align	2
.LC5:
	.ascii	"failed to read I2C\012\000"
	.align	2
.LC6:
	.ascii	"Invalid chip id: %x\012\000"
	.align	2
.LC7:
	.ascii	"Cirrus Logic CS42L51, Revision: %02X\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	cs42l51_probe
	.syntax unified
	.arm
	.fpu softvfp
	.type	cs42l51_probe, %function
cs42l51_probe:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r3, .L34
	sub	sp, sp, #8
	mov	r6, r0
	mov	r0, r1
	mov	r7, r1
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	IS_ERR
	subs	r4, r0, #0
	bne	.L25
	ldr	r3, .L34+4
	mov	r1, #16
	mov	r0, r6
	ldr	r2, [r3]
	bl	devm_kzalloc
	subs	r5, r0, #0
	beq	.L26
	mov	r1, r5
	mov	r0, r6
	bl	dev_set_drvdata
	ldr	r1, .L34+8
	mov	r0, r6
	str	r7, [r5, #12]
	bl	devm_clk_get
	str	r0, [r5, #8]
	bl	IS_ERR
	cmp	r0, #0
	bne	.L27
.L5:
	ldr	r0, [r5]
	ldr	r8, .L34+12
	b	.L7
.L8:
	ldr	r3, [r8]
	ldr	r0, [r5]
	ldr	r3, [r3, r4, lsl #2]
	str	r3, [r0, r4, lsl #2]
	add	r4, r4, #1
.L7:
	bl	ARRAY_SIZE
	cmp	r0, r4
	bgt	.L8
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	ldr	r2, [r5]
	mov	r1, r0
	mov	r0, r6
	bl	devm_regulator_bulk_get
	subs	r4, r0, #0
	bne	.L28
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	ldr	r1, [r5]
	bl	regulator_bulk_enable
	subs	r4, r0, #0
	bne	.L29
	ldr	r3, .L34+16
	ldr	r1, .L34+20
	ldr	r2, [r3]
	mov	r0, r6
	bl	devm_gpiod_get_optional
	str	r0, [r5, #4]
	bl	IS_ERR
	subs	r4, r0, #0
	bne	.L30
	ldr	r3, [r5, #4]
	cmp	r3, #0
	beq	.L12
	ldr	r1, .L34+24
	mov	r0, r6
	bl	dev_dbg
	mov	r1, r4
	ldr	r0, [r5, #4]
	bl	gpiod_set_value_cansleep
	mov	r0, #2
	bl	mdelay
.L12:
	ldr	r3, .L34+28
	mov	r0, r7
	ldr	r1, [r3]
	mov	r2, sp
	bl	regmap_read
	subs	r3, r0, #0
	blt	.L31
	ldr	r3, .L34+32
	ldr	r7, .L34+36
	ldr	r1, [r3]
	ldr	r0, [r7]
	bl	CS42L51_MK_CHIP_REV
	ldr	r2, [sp]
	cmp	r0, r2
	beq	.L15
	ldr	r3, .L34+40
	ldr	r0, [r7]
	ldr	r1, [r3]
	bl	CS42L51_MK_CHIP_REV
	ldr	r2, [sp]
	cmp	r0, r2
	bne	.L32
.L15:
	ldr	r3, .L34+44
	ldr	r1, .L34+48
	ldr	r3, [r3]
	mov	r0, r6
	and	r2, r2, r3
	bl	dev_info
	mov	r0, r6
	mov	r3, #1
	ldr	r2, .L34+52
	ldr	r1, .L34+56
	bl	devm_snd_soc_register_component
	cmp	r0, #0
	bge	.L1
	mov	r4, r0
	b	.L14
.L26:
	ldr	r3, .L34+60
	ldr	r0, [r3]
	rsb	r4, r0, #0
.L1:
	ldr	r3, .L34
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L33
	mov	r0, r4
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L25:
	mov	r0, r7
	bl	PTR_ERR
	mov	r4, r0
	b	.L1
.L29:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L34+64
	bl	dev_err
	b	.L1
.L27:
	ldr	r0, [r5, #8]
	bl	PTR_ERR
	ldr	r3, .L34+68
	ldr	r3, [r3]
	cmn	r0, r3
	streq	r4, [r5, #8]
	beq	.L5
	ldr	r0, [r5, #8]
	bl	PTR_ERR
	mov	r4, r0
	b	.L1
.L28:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L34+72
	bl	dev_err
	b	.L1
.L32:
	mov	r0, r6
	ldr	r1, .L34+76
	bl	dev_err
	ldr	r3, .L34+80
	ldr	r4, [r3]
	rsb	r4, r4, #0
.L14:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	ldr	r1, [r5]
	bl	regulator_bulk_disable
	b	.L1
.L31:
	mov	r0, r6
	ldr	r1, .L34+84
	mov	r4, r3
	bl	dev_err
	b	.L14
.L30:
	ldr	r0, [r5, #4]
	bl	PTR_ERR
	mov	r4, r0
	b	.L1
.L33:
	bl	__stack_chk_fail
.L35:
	.align	2
.L34:
	.word	.LC8
	.word	GFP_KERNEL
	.word	.LC0
	.word	cs42l51_supply_names
	.word	GPIOD_OUT_LOW
	.word	.LC3
	.word	.LC4
	.word	CS42L51_CHIP_REV_ID
	.word	CS42L51_CHIP_REV_A
	.word	CS42L51_CHIP_ID
	.word	CS42L51_CHIP_REV_B
	.word	CS42L51_CHIP_REV_MASK
	.word	.LC7
	.word	cs42l51_dai
	.word	soc_component_device_cs42l51
	.word	ENOMEM
	.word	.LC2
	.word	ENOENT
	.word	.LC1
	.word	.LC6
	.word	ENODEV
	.word	.LC5
	.size	cs42l51_probe, .-cs42l51_probe
	.comm	soc_component_device_cs42l51,4,4
	.comm	cs42l51_supply_names,4,4
	.comm	cs42l51_dai,4,4
	.comm	GPIOD_OUT_LOW,4,4
	.comm	GFP_KERNEL,4,4
	.comm	ENOMEM,4,4
	.comm	ENOENT,4,4
	.comm	ENODEV,4,4
	.comm	CS42L51_CHIP_REV_MASK,4,4
	.comm	CS42L51_CHIP_REV_ID,4,4
	.comm	CS42L51_CHIP_REV_B,4,4
	.comm	CS42L51_CHIP_REV_A,4,4
	.comm	CS42L51_CHIP_ID,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
