	.file	"extr_t4_hw.c_t4_prep_adapter.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"T4 rev 1 chip is not supported.\n"
	.text
	.p2align 4
	.globl	t4_prep_adapter
	.type	t4_prep_adapter, @function
t4_prep_adapter:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rsi
	lea	rsi, 32[rdi]
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	sub	rsp, 16
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	get_pci_mode@PLT
	mov	esi, DWORD PTR A_PL_REV[rip]
	mov	rdi, rbp
	call	t4_read_reg@PLT
	mov	edi, eax
	mov	r12d, eax
	call	G_CHIPID@PLT
	mov	edi, r12d
	mov	DWORD PTR 36[rbp], eax
	call	G_REV@PLT
	mov	edx, DWORD PTR 36[rbp]
	mov	DWORD PTR 0[rbp], eax
	test	edx, edx
	jne	.L2
	mov	edx, DWORD PTR CHELSIO_T4[rip]
	mov	DWORD PTR 36[rbp], edx
	cmp	eax, 1
	je	.L10
.L2:
	mov	rdi, rbp
	call	chip_id@PLT
	mov	edi, eax
	call	t4_get_chip_params@PLT
	mov	QWORD PTR 40[rbp], rax
	test	rax, rax
	je	.L11
	mov	esi, DWORD PTR PCI_CAP_ID_VPD[rip]
	mov	rdi, rbp
	call	t4_os_find_pci_capability@PLT
	mov	rdi, rbp
	mov	DWORD PTR 32[rbp], eax
	call	t4_get_flash_params@PLT
	test	eax, eax
	js	.L1
	mov	esi, DWORD PTR PCI_DEVICE_ID[rip]
	mov	rdi, rbp
	lea	rdx, 4[rsp]
	call	t4_os_pci_read_cfg2@PLT
	mov	r12d, DWORD PTR 4[rsp]
	mov	rdi, rbp
	sar	r12d, 12
	call	chip_id@PLT
	cmp	r12d, eax
	je	.L12
	mov	eax, DWORD PTR CIMLA_SIZE[rip]
	mov	DWORD PTR 8[rbp], 1
	add	eax, eax
	mov	DWORD PTR 4[rbp], eax
.L6:
	mov	edx, DWORD PTR 4[rsp]
	lea	rsi, 20[rbp]
	mov	rcx, r13
	mov	rdi, rbp
	call	get_vpd_params@PLT
	test	eax, eax
	js	.L1
	mov	esi, DWORD PTR 24[rbp]
	mov	edi, DWORD PTR 28[rbp]
	call	init_cong_ctrl@PLT
	mov	DWORD PTR 12[rbp], 1
	mov	esi, 13
	mov	rdi, rbp
	movabs	rax, 214748364800001
	mov	QWORD PTR 16[rbp], rax
	call	set_pcie_completion_timeout@PLT
	xor	eax, eax
.L1:
	mov	rcx, QWORD PTR 8[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L13
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L12:
	mov	eax, DWORD PTR CIMLA_SIZE[rip]
	mov	DWORD PTR 4[rbp], eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L10:
	lea	rsi, .LC0[rip]
	mov	rdi, rbp
	call	CH_ALERT@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
.L13:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	t4_prep_adapter, .-t4_prep_adapter
	.comm	PCI_DEVICE_ID,4,4
	.comm	PCI_CAP_ID_VPD,4,4
	.comm	EINVAL,4,4
	.comm	CIMLA_SIZE,4,4
	.comm	CHELSIO_T4,4,4
	.comm	A_PL_REV,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_t4_hw.c_t4_prep_adapter.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"T4 rev 1 chip is not supported.\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	t4_prep_adapter
	.syntax unified
	.arm
	.fpu softvfp
	.type	t4_prep_adapter, %function
t4_prep_adapter:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r4, r0
	ldr	r3, .L13
	sub	sp, sp, #8
	mov	r5, r1
	add	r1, r0, #32
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	get_pci_mode
	ldr	r3, .L13+4
	mov	r0, r4
	ldr	r1, [r3]
	bl	t4_read_reg
	mov	r6, r0
	bl	G_CHIPID
	mov	r3, r0
	mov	r0, r6
	str	r3, [r4, #36]
	bl	G_REV
	ldr	r3, [r4, #36]
	str	r0, [r4]
	cmp	r3, #0
	bne	.L2
	ldr	r3, .L13+8
	cmp	r0, #1
	ldr	r3, [r3]
	str	r3, [r4, #36]
	beq	.L10
.L2:
	mov	r0, r4
	bl	chip_id
	bl	t4_get_chip_params
	cmp	r0, #0
	str	r0, [r4, #40]
	beq	.L11
	ldr	r3, .L13+12
	mov	r0, r4
	ldr	r1, [r3]
	bl	t4_os_find_pci_capability
	mov	r3, r0
	mov	r0, r4
	str	r3, [r4, #32]
	bl	t4_get_flash_params
	cmp	r0, #0
	blt	.L1
	ldr	r3, .L13+16
	mov	r2, sp
	ldr	r1, [r3]
	mov	r0, r4
	bl	t4_os_pci_read_cfg2
	mov	r0, r4
	ldr	r6, [sp]
	bl	chip_id
	asr	r6, r6, #12
	cmp	r6, r0
	movne	r2, #1
	ldrne	r3, .L13+20
	ldreq	r3, .L13+20
	ldrne	r3, [r3]
	ldreq	r3, [r3]
	lslne	r3, r3, r2
	strne	r2, [r4, #8]
	str	r3, [r4, #4]
	mov	r0, r4
	mov	r3, r5
	ldr	r2, [sp]
	add	r1, r4, #20
	bl	get_vpd_params
	cmp	r0, #0
	blt	.L1
	ldr	r1, [r4, #24]
	ldr	r0, [r4, #28]
	bl	init_cong_ctrl
	mov	r3, #1
	ldr	r2, .L13+24
	mov	r0, r4
	mov	r1, #13
	str	r3, [r4, #12]
	str	r3, [r4, #16]
	str	r2, [r4, #20]
	bl	set_pcie_completion_timeout
	mov	r0, #0
.L1:
	ldr	r3, .L13
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L12
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, pc}
.L11:
	ldr	r3, .L13+28
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L10:
	mov	r0, r4
	ldr	r1, .L13+32
	bl	CH_ALERT
	ldr	r3, .L13+28
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L12:
	bl	__stack_chk_fail
.L14:
	.align	2
.L13:
	.word	.LC1
	.word	A_PL_REV
	.word	CHELSIO_T4
	.word	PCI_CAP_ID_VPD
	.word	PCI_DEVICE_ID
	.word	CIMLA_SIZE
	.word	50000
	.word	EINVAL
	.word	.LC0
	.size	t4_prep_adapter, .-t4_prep_adapter
	.comm	PCI_DEVICE_ID,4,4
	.comm	PCI_CAP_ID_VPD,4,4
	.comm	EINVAL,4,4
	.comm	CIMLA_SIZE,4,4
	.comm	CHELSIO_T4,4,4
	.comm	A_PL_REV,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
