	.file	"extr_e1000_ich8lan.c_e1000_write_flash_data_ich8lan.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"e1000_write_ich8_data"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"Timeout error - flash cycle did not complete.\n"
	.text
	.p2align 4
	.type	e1000_write_flash_data_ich8lan, @function
e1000_write_flash_data_ich8lan:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rcx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, edx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	lea	rdi, .LC0[rip]
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	DEBUGFUNC@PLT
	mov	rax, QWORD PTR e1000_pch_spt[rip]
	cmp	QWORD PTR [rbx], rax
	jl	.L2
	cmp	ebp, 4
	je	.L16
.L3:
	mov	r15, QWORD PTR E1000_ERR_NVM[rip]
	neg	r15
.L5:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r15
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L16:
	.cfi_restore_state
	mov	esi, DWORD PTR ICH_FLASH_LINEAR_ADDR_MASK[rip]
	mov	r14d, 3
	cmp	esi, r12d
	jl	.L3
.L4:
	mov	eax, r14d
	and	r12d, esi
	movzx	ecx, r13b
	add	r12d, DWORD PTR 8[rbx]
	sal	eax, 16
	cmp	ebp, 1
	cmove	r13d, ecx
	mov	DWORD PTR 12[rsp], eax
	xor	ebp, ebp
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L18:
	mov	esi, DWORD PTR ICH_FLASH_HSFSTS[rip]
	mov	rdi, rbx
	call	E1000_READ_FLASH_REG@PLT
	mov	rax, QWORD PTR e1000_pch_spt[rip]
	cmp	QWORD PTR [rbx], rax
	jl	.L8
.L19:
	mov	edx, DWORD PTR 12[rsp]
	mov	esi, DWORD PTR ICH_FLASH_HSFSTS[rip]
	mov	rdi, rbx
	call	E1000_WRITE_FLASH_REG@PLT
.L9:
	mov	esi, DWORD PTR ICH_FLASH_FADDR[rip]
	mov	edx, r12d
	mov	rdi, rbx
	call	E1000_WRITE_FLASH_REG@PLT
	mov	esi, DWORD PTR ICH_FLASH_FDATA0[rip]
	mov	edx, r13d
	mov	rdi, rbx
	call	E1000_WRITE_FLASH_REG@PLT
	mov	esi, DWORD PTR ICH_FLASH_WRITE_COMMAND_TIMEOUT[rip]
	mov	rdi, rbx
	call	e1000_flash_cycle_ich8lan@PLT
	cmp	QWORD PTR E1000_SUCCESS[rip], rax
	mov	r15, rax
	je	.L5
	mov	esi, DWORD PTR ICH_FLASH_HSFSTS[rip]
	mov	rdi, rbx
	call	E1000_READ_FLASH_REG16@PLT
	test	eax, eax
	je	.L17
	cmp	QWORD PTR ICH_FLASH_CYCLE_REPEAT_COUNT[rip], rbp
	lea	rax, 1[rbp]
	jle	.L5
	mov	rbp, rax
.L11:
	mov	edi, 1
	call	usec_delay@PLT
	mov	rdi, rbx
	call	e1000_flash_cycle_init_ich8lan@PLT
	cmp	QWORD PTR E1000_SUCCESS[rip], rax
	mov	r15, rax
	jne	.L5
	mov	rax, QWORD PTR e1000_pch_spt[rip]
	cmp	QWORD PTR [rbx], rax
	jge	.L18
	mov	esi, DWORD PTR ICH_FLASH_HSFCTL[rip]
	mov	rdi, rbx
	call	E1000_READ_FLASH_REG16@PLT
	mov	rax, QWORD PTR e1000_pch_spt[rip]
	cmp	QWORD PTR [rbx], rax
	jge	.L19
.L8:
	mov	esi, DWORD PTR ICH_FLASH_HSFCTL[rip]
	mov	edx, r14d
	mov	rdi, rbx
	call	E1000_WRITE_FLASH_REG16@PLT
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L2:
	lea	r14d, -1[rbp]
	cmp	r14d, 1
	ja	.L3
	mov	esi, DWORD PTR ICH_FLASH_LINEAR_ADDR_MASK[rip]
	cmp	esi, r12d
	jge	.L4
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L17:
	lea	rdi, .LC1[rip]
	call	DEBUGOUT@PLT
	jmp	.L5
	.cfi_endproc
.LFE0:
	.size	e1000_write_flash_data_ich8lan, .-e1000_write_flash_data_ich8lan
	.comm	e1000_pch_spt,8,8
	.comm	ICH_FLASH_WRITE_COMMAND_TIMEOUT,4,4
	.comm	ICH_FLASH_LINEAR_ADDR_MASK,4,4
	.comm	ICH_FLASH_HSFSTS,4,4
	.comm	ICH_FLASH_HSFCTL,4,4
	.comm	ICH_FLASH_FDATA0,4,4
	.comm	ICH_FLASH_FADDR,4,4
	.comm	ICH_FLASH_CYCLE_REPEAT_COUNT,8,8
	.comm	ICH_CYCLE_WRITE,4,4
	.comm	E1000_SUCCESS,8,8
	.comm	E1000_ERR_NVM,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_e1000_ich8lan.c_e1000_write_flash_data_ich8lan.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"e1000_write_ich8_data\000"
	.align	2
.LC1:
	.ascii	"Timeout error - flash cycle did not complete.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	e1000_write_flash_data_ich8lan, %function
e1000_write_flash_data_ich8lan:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	ldr	r6, .L22
	ldr	r0, .L22+4
	sub	sp, sp, #20
	mov	r5, r2
	mov	r8, r3
	mov	r7, r1
	bl	DEBUGFUNC
	ldr	r2, [r4]
	ldr	r3, [r6]
	cmp	r2, r3
	blt	.L2
	cmp	r5, #4
	beq	.L18
.L3:
	ldr	r3, .L22+8
	ldr	r3, [r3]
	rsb	r7, r3, #0
.L1:
	mov	r0, r7
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L18:
	ldr	r3, .L22+12
	ldr	r1, [r3]
	cmp	r1, r7
	movge	r3, #3
	strge	r3, [sp, #8]
	blt	.L3
.L4:
	ldr	r3, [r4, #4]
	and	r7, r7, r1
	add	r3, r7, r3
	str	r3, [sp, #4]
	ldr	r3, [sp, #8]
	cmp	r5, #1
	lsl	r3, r3, #16
	mov	r5, #0
	mov	r7, r4
	ldr	r9, .L22+16
	ldr	r10, .L22+20
	ldr	fp, .L22+24
	andeq	r8, r8, #255
	str	r3, [sp, #12]
	b	.L11
.L20:
	ldr	r1, [r10]
	mov	r0, r7
	bl	E1000_READ_FLASH_REG
	ldr	r1, [r7]
	ldr	r2, [r6]
	cmp	r1, r2
	blt	.L8
.L21:
	mov	r0, r7
	ldr	r2, [sp, #12]
	ldr	r1, [r10]
	bl	E1000_WRITE_FLASH_REG
.L9:
	ldr	r3, .L22+28
	ldr	r2, [sp, #4]
	ldr	r1, [r3]
	mov	r0, r7
	bl	E1000_WRITE_FLASH_REG
	ldr	r3, .L22+32
	mov	r2, r8
	ldr	r1, [r3]
	mov	r0, r7
	bl	E1000_WRITE_FLASH_REG
	ldr	r3, .L22+36
	mov	r0, r7
	ldr	r1, [r3]
	bl	e1000_flash_cycle_ich8lan
	ldr	r1, [r9]
	mov	r4, r0
	cmp	r1, r0
	beq	.L15
	mov	r0, r7
	ldr	r1, [r10]
	bl	E1000_READ_FLASH_REG16
	cmp	r0, #0
	beq	.L19
	ldr	r1, [fp]
	add	r0, r5, #1
	cmp	r1, r5
	ble	.L15
	mov	r5, r0
.L11:
	mov	r0, #1
	bl	usec_delay
	mov	r0, r7
	bl	e1000_flash_cycle_init_ich8lan
	ldr	r1, [r9]
	mov	r4, r0
	cmp	r1, r0
	bne	.L15
	ldr	r1, [r7]
	ldr	r2, [r6]
	cmp	r1, r2
	bge	.L20
	ldr	r3, .L22+40
	mov	r0, r7
	ldr	r1, [r3]
	bl	E1000_READ_FLASH_REG16
	ldr	r1, [r7]
	ldr	r2, [r6]
	cmp	r1, r2
	bge	.L21
.L8:
	ldr	r3, .L22+40
	mov	r0, r7
	ldr	r2, [sp, #8]
	ldr	r1, [r3]
	bl	E1000_WRITE_FLASH_REG16
	b	.L9
.L2:
	sub	r3, r5, #1
	cmp	r3, #1
	str	r3, [sp, #8]
	bhi	.L3
	ldr	r3, .L22+12
	ldr	r1, [r3]
	cmp	r1, r7
	bge	.L4
	b	.L3
.L15:
	mov	r7, r4
	mov	r0, r7
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L19:
	ldr	r0, .L22+44
	mov	r7, r4
	bl	DEBUGOUT
	b	.L1
.L23:
	.align	2
.L22:
	.word	e1000_pch_spt
	.word	.LC0
	.word	E1000_ERR_NVM
	.word	ICH_FLASH_LINEAR_ADDR_MASK
	.word	E1000_SUCCESS
	.word	ICH_FLASH_HSFSTS
	.word	ICH_FLASH_CYCLE_REPEAT_COUNT
	.word	ICH_FLASH_FADDR
	.word	ICH_FLASH_FDATA0
	.word	ICH_FLASH_WRITE_COMMAND_TIMEOUT
	.word	ICH_FLASH_HSFCTL
	.word	.LC1
	.size	e1000_write_flash_data_ich8lan, .-e1000_write_flash_data_ich8lan
	.comm	e1000_pch_spt,4,4
	.comm	ICH_FLASH_WRITE_COMMAND_TIMEOUT,4,4
	.comm	ICH_FLASH_LINEAR_ADDR_MASK,4,4
	.comm	ICH_FLASH_HSFSTS,4,4
	.comm	ICH_FLASH_HSFCTL,4,4
	.comm	ICH_FLASH_FDATA0,4,4
	.comm	ICH_FLASH_FADDR,4,4
	.comm	ICH_FLASH_CYCLE_REPEAT_COUNT,4,4
	.comm	ICH_CYCLE_WRITE,4,4
	.comm	E1000_SUCCESS,4,4
	.comm	E1000_ERR_NVM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
