	.file	"extr_amdgpu_amdkfd_gfx_v8.c_kgd_hqd_destroy.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"HW is processing IQ\n"
.LC1:
	.string	"IQ timer is active\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC2:
	.string	"CP HQD IQ timer status time out\n"
	.section	.rodata.str1.1
.LC3:
	.string	"Dequeue request is pending\n"
	.section	.rodata.str1.8
	.align 8
.LC4:
	.string	"CP HQD dequeue request time out\n"
	.align 8
.LC5:
	.string	"cp queue preemption time out.\n"
	.text
	.p2align 4
	.type	kgd_hqd_destroy, @function
kgd_hqd_destroy:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15d, r9d
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, r8d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, ecx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rsi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	DWORD PTR 4[rsp], edx
	call	get_amdgpu_device@PLT
	mov	rdi, rbp
	mov	rbx, rax
	call	get_mqd@PLT
	cmp	QWORD PTR [rbx], 0
	je	.L2
	mov	r12d, DWORD PTR EIO[rip]
	neg	r12d
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edx, r15d
	mov	esi, r13d
	mov	rdi, r14
	mov	QWORD PTR 8[rsp], rax
	call	acquire_queue@PLT
	mov	rcx, QWORD PTR 8[rsp]
	cmp	QWORD PTR [rcx], 0
	je	.L28
.L4:
	cmp	DWORD PTR 4[rsp], 128
	mov	r15d, DWORD PTR DRAIN_PIPE[rip]
	mov	ebx, 5001
	lea	r13, .LC1[rip]
	cmove	r15d, DWORD PTR RESET_WAVES[rip]
	xor	edi, edi
	call	local_irq_save@PLT
	xor	eax, eax
	call	preempt_disable@PLT
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L7:
	mov	edx, DWORD PTR ACTIVE[rip]
	mov	esi, DWORD PTR CP_HQD_IQ_TIMER[rip]
	mov	edi, ebp
	call	REG_GET_FIELD@PLT
	test	eax, eax
	je	.L10
	mov	edx, DWORD PTR RETRY_TYPE[rip]
	mov	esi, DWORD PTR CP_HQD_IQ_TIMER[rip]
	mov	edi, ebp
	call	REG_GET_FIELD@PLT
	cmp	eax, 3
	je	.L10
	mov	edx, DWORD PTR WAIT_TIME[rip]
	mov	esi, DWORD PTR CP_HQD_IQ_TIMER[rip]
	mov	edi, ebp
	call	REG_GET_FIELD@PLT
	cmp	eax, 9
	jg	.L10
	mov	rdi, r13
	call	pr_debug@PLT
.L8:
	sub	ebx, 1
	je	.L29
	mov	edi, 100
	call	ndelay@PLT
.L14:
	mov	edi, DWORD PTR mmCP_HQD_IQ_TIMER[rip]
	call	RREG32@PLT
	mov	edx, DWORD PTR PROCESSING_IQ[rip]
	mov	esi, DWORD PTR CP_HQD_IQ_TIMER[rip]
	mov	edi, eax
	mov	ebp, eax
	call	REG_GET_FIELD@PLT
	test	eax, eax
	je	.L7
	lea	rdi, .LC0[rip]
	call	pr_debug@PLT
	jmp	.L8
.L29:
	lea	rdi, .LC2[rip]
	call	pr_err@PLT
	.p2align 4,,10
	.p2align 3
.L10:
	mov	ebx, 1001
	lea	rbp, .LC3[rip]
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L31:
	mov	rdi, rbp
	call	pr_debug@PLT
	sub	ebx, 1
	je	.L30
	mov	edi, 100
	call	ndelay@PLT
.L13:
	mov	edi, DWORD PTR mmCP_HQD_DEQUEUE_REQUEST[rip]
	call	RREG32@PLT
	test	DWORD PTR CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK[rip], eax
	jne	.L31
.L15:
	xor	edi, edi
	call	local_irq_restore@PLT
	xor	eax, eax
	call	preempt_enable@PLT
	mov	edi, DWORD PTR mmCP_HQD_DEQUEUE_REQUEST[rip]
	mov	esi, r15d
	call	WREG32@PLT
	imul	r12d, DWORD PTR HZ[rip]
	imul	rbx, r12, 274877907
	shr	rbx, 38
	add	ebx, DWORD PTR jiffies[rip]
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L33:
	mov	edi, DWORD PTR jiffies[rip]
	mov	rsi, rbx
	call	time_after@PLT
	test	rax, rax
	jne	.L32
	mov	esi, 1000
	mov	edi, 500
	call	usleep_range@PLT
.L19:
	mov	edi, DWORD PTR mmCP_HQD_ACTIVE[rip]
	call	RREG32@PLT
	and	eax, DWORD PTR CP_HQD_ACTIVE__ACTIVE_MASK[rip]
	mov	r12d, eax
	jne	.L33
	mov	rdi, r14
	call	release_queue@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L32:
	lea	rdi, .LC5[rip]
	call	pr_err@PLT
	mov	rdi, r14
	call	release_queue@PLT
	mov	r12d, DWORD PTR ETIME[rip]
	neg	r12d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L28:
	mov	esi, DWORD PTR scheduler1[rip]
	mov	edi, DWORD PTR RLC_CP_SCHEDULERS[rip]
	xor	edx, edx
	call	WREG32_FIELD@PLT
	jmp	.L4
.L30:
	lea	rdi, .LC4[rip]
	call	pr_err@PLT
	jmp	.L15
	.cfi_endproc
.LFE0:
	.size	kgd_hqd_destroy, .-kgd_hqd_destroy
	.comm	scheduler1,4,4
	.comm	mmCP_HQD_IQ_TIMER,4,4
	.comm	mmCP_HQD_DEQUEUE_REQUEST,4,4
	.comm	mmCP_HQD_ACTIVE,4,4
	.comm	jiffies,4,4
	.comm	WAIT_TIME,4,4
	.comm	RLC_CP_SCHEDULERS,4,4
	.comm	RETRY_TYPE,4,4
	.comm	RESET_WAVES,4,4
	.comm	PROCESSING_IQ,4,4
	.comm	HZ,4,4
	.comm	ETIME,4,4
	.comm	EIO,4,4
	.comm	DRAIN_PIPE,4,4
	.comm	CP_HQD_IQ_TIMER,4,4
	.comm	CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK,4,4
	.comm	CP_HQD_ACTIVE__ACTIVE_MASK,4,4
	.comm	ACTIVE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amdgpu_amdkfd_gfx_v8.c_kgd_hqd_destroy.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"HW is processing IQ\012\000"
	.align	2
.LC1:
	.ascii	"IQ timer is active\012\000"
	.align	2
.LC2:
	.ascii	"CP HQD IQ timer status time out\012\000"
	.align	2
.LC3:
	.ascii	"Dequeue request is pending\012\000"
	.align	2
.LC4:
	.ascii	"CP HQD dequeue request time out\012\000"
	.align	2
.LC5:
	.ascii	"cp queue preemption time out.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	kgd_hqd_destroy, %function
kgd_hqd_destroy:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #20
	mov	r5, r1
	stmib	sp, {r0, r3}
	mov	r6, r2
	bl	get_amdgpu_device
	mov	r4, r0
	mov	r0, r5
	bl	get_mqd
	ldr	r3, [r4]
	cmp	r3, #0
	beq	.L2
	ldr	r3, .L34
	ldr	r0, [r3]
	rsb	r4, r0, #0
	mov	r0, r4
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	mov	r4, r0
	ldr	r2, [sp, #60]
	ldr	r1, [sp, #56]
	ldr	r0, [sp, #4]
	bl	acquire_queue
	ldr	r2, [r4]
	cmp	r2, #0
	beq	.L28
.L4:
	cmp	r6, #128
	ldrne	r3, .L34+4
	ldreq	r3, .L34+8
	mov	r0, #0
	ldr	r3, [r3]
	ldr	r6, .L34+12
	str	r3, [sp, #12]
	ldr	r8, .L34+16
	bl	local_irq_save
	ldr	r7, .L34+20
	bl	preempt_disable
	ldr	r5, .L34+24
	ldr	r9, .L34+28
	ldr	r10, .L34+32
	ldr	fp, .L34+36
	b	.L14
.L7:
	mov	r0, r4
	ldr	r2, [r9]
	ldr	r1, [r5]
	bl	REG_GET_FIELD
	cmp	r0, #0
	beq	.L10
	mov	r0, r4
	ldr	r2, [r10]
	ldr	r1, [r5]
	bl	REG_GET_FIELD
	cmp	r0, #3
	beq	.L10
	ldr	r3, .L34+40
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, [r5]
	bl	REG_GET_FIELD
	cmp	r0, #9
	bgt	.L10
	mov	r0, fp
	bl	pr_debug
.L8:
	subs	r6, r6, #1
	beq	.L29
	mov	r0, #100
	bl	ndelay
.L14:
	ldr	r0, [r8]
	bl	RREG32
	ldr	r2, [r7]
	ldr	r1, [r5]
	mov	r4, r0
	bl	REG_GET_FIELD
	cmp	r0, #0
	beq	.L7
	ldr	r0, .L34+44
	bl	pr_debug
	b	.L8
.L29:
	ldr	r0, .L34+48
	bl	pr_err
.L10:
	ldr	r4, .L34+52
	ldr	r5, .L34+56
	ldr	r6, .L34+60
	ldr	r7, .L34+64
	b	.L13
.L31:
	mov	r0, r7
	bl	pr_debug
	subs	r4, r4, #1
	beq	.L30
	mov	r0, #100
	bl	ndelay
.L13:
	ldr	r0, [r5]
	bl	RREG32
	ldr	r3, [r6]
	tst	r0, r3
	bne	.L31
.L15:
	mov	r0, #0
	bl	local_irq_restore
	bl	preempt_enable
	ldr	r0, [r5]
	ldr	r1, [sp, #12]
	bl	WREG32
	ldr	r3, .L34+68
	ldr	r2, [sp, #8]
	ldr	r3, [r3]
	ldr	r5, .L34+72
	mul	r2, r3, r2
	mov	r3, r2
	ldr	r6, .L34+76
	umull	r2, r3, r5, r3
	ldr	r5, [r6]
	ldr	r8, .L34+80
	ldr	r7, .L34+84
	add	r5, r5, r3, lsr #6
	b	.L19
.L33:
	mov	r1, r5
	ldr	r0, [r6]
	bl	time_after
	cmp	r0, #0
	bne	.L32
	mov	r1, #1000
	mov	r0, #500
	bl	usleep_range
.L19:
	ldr	r0, [r8]
	bl	RREG32
	ldr	r3, [r7]
	ands	r0, r0, r3
	bne	.L33
	mov	r4, r0
	ldr	r0, [sp, #4]
	bl	release_queue
	mov	r0, r4
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L32:
	ldr	r0, .L34+88
	bl	pr_err
	ldr	r0, [sp, #4]
	bl	release_queue
	ldr	r3, .L34+92
	ldr	r0, [r3]
	rsb	r4, r0, #0
	mov	r0, r4
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L28:
	ldr	r3, .L34+96
	ldr	r1, .L34+100
	ldr	r0, [r3]
	ldr	r1, [r1]
	bl	WREG32_FIELD
	b	.L4
.L30:
	ldr	r0, .L34+104
	bl	pr_err
	b	.L15
.L35:
	.align	2
.L34:
	.word	EIO
	.word	DRAIN_PIPE
	.word	RESET_WAVES
	.word	5001
	.word	mmCP_HQD_IQ_TIMER
	.word	PROCESSING_IQ
	.word	CP_HQD_IQ_TIMER
	.word	ACTIVE
	.word	RETRY_TYPE
	.word	.LC1
	.word	WAIT_TIME
	.word	.LC0
	.word	.LC2
	.word	1001
	.word	mmCP_HQD_DEQUEUE_REQUEST
	.word	CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK
	.word	.LC3
	.word	HZ
	.word	274877907
	.word	jiffies
	.word	mmCP_HQD_ACTIVE
	.word	CP_HQD_ACTIVE__ACTIVE_MASK
	.word	.LC5
	.word	ETIME
	.word	RLC_CP_SCHEDULERS
	.word	scheduler1
	.word	.LC4
	.size	kgd_hqd_destroy, .-kgd_hqd_destroy
	.comm	scheduler1,4,4
	.comm	mmCP_HQD_IQ_TIMER,4,4
	.comm	mmCP_HQD_DEQUEUE_REQUEST,4,4
	.comm	mmCP_HQD_ACTIVE,4,4
	.comm	jiffies,4,4
	.comm	WAIT_TIME,4,4
	.comm	RLC_CP_SCHEDULERS,4,4
	.comm	RETRY_TYPE,4,4
	.comm	RESET_WAVES,4,4
	.comm	PROCESSING_IQ,4,4
	.comm	HZ,4,4
	.comm	ETIME,4,4
	.comm	EIO,4,4
	.comm	DRAIN_PIPE,4,4
	.comm	CP_HQD_IQ_TIMER,4,4
	.comm	CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK,4,4
	.comm	CP_HQD_ACTIVE__ACTIVE_MASK,4,4
	.comm	ACTIVE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
