	.file	"extr_ia64.c_ia64_expand_tls_address.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	ia64_expand_tls_address, @function
ia64_expand_tls_address:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, edx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, r8d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	cmp	edi, 130
	je	.L2
	ja	.L3
	cmp	edi, 128
	je	.L4
	cmp	edi, 129
	jne	.L6
	xor	eax, eax
	call	start_sequence@PLT
	mov	rdi, QWORD PTR Pmode[rip]
	call	gen_reg_rtx@PLT
	mov	esi, r14d
	mov	edi, eax
	mov	r12d, eax
	call	gen_load_dtpmod@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	ecx, DWORD PTR const0_rtx[rip]
	mov	edx, DWORD PTR LCT_CONST[rip]
	xor	eax, eax
	mov	r15, QWORD PTR Pmode[rip]
	mov	ebx, DWORD PTR NULL_RTX[rip]
	mov	DWORD PTR 12[rsp], ecx
	mov	DWORD PTR 8[rsp], edx
	call	gen_tls_get_addr@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 88
	mov	r9d, r12d
	mov	esi, ebx
	push	r15
	.cfi_def_cfa_offset 96
	mov	ecx, DWORD PTR 28[rsp]
	mov	r8d, 2
	mov	edi, eax
	push	rcx
	.cfi_def_cfa_offset 104
	mov	rcx, r15
	push	r15
	.cfi_def_cfa_offset 112
	mov	edx, DWORD PTR 40[rsp]
	call	emit_library_call_value@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 80
	mov	ebx, eax
	xor	eax, eax
	call	get_insns@PLT
	mov	r12d, eax
	xor	eax, eax
	call	end_sequence@PLT
	mov	esi, DWORD PTR const0_rtx[rip]
	mov	edi, 1
	mov	r15d, DWORD PTR UNSPEC_LD_BASE[rip]
	call	gen_rtvec@PLT
	mov	rdi, QWORD PTR Pmode[rip]
	mov	edx, r15d
	mov	esi, eax
	call	gen_rtx_UNSPEC@PLT
	mov	rdi, QWORD PTR Pmode[rip]
	mov	DWORD PTR 8[rsp], eax
	call	gen_reg_rtx@PLT
	mov	ecx, DWORD PTR 8[rsp]
	mov	edi, r12d
	mov	edx, ebx
	mov	esi, eax
	mov	r15d, eax
	mov	r12d, ebp
	call	emit_libcall_block@PLT
	mov	rsi, QWORD PTR Pmode[rip]
	mov	edi, ebp
	call	register_operand@PLT
	test	eax, eax
	je	.L28
.L9:
	mov	esi, DWORD PTR TARGET_TLS64[rip]
	test	esi, esi
	je	.L10
	mov	esi, r14d
	mov	edi, r12d
	call	gen_load_dtprel@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	edi, r12d
	mov	edx, r12d
	mov	esi, r15d
	call	gen_adddi3@PLT
	mov	edi, eax
	call	emit_insn@PLT
	test	r13d, r13d
	jne	.L15
	.p2align 4,,10
	.p2align 3
.L14:
	cmp	r12d, ebp
	je	.L17
.L29:
	mov	edi, ebp
	call	GET_MODE@PLT
	cmp	rax, QWORD PTR Pmode[rip]
	je	.L1
	mov	edi, ebp
	call	GET_MODE@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	esi, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	rdi, rax
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	gen_lowpart@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	cmp	edi, 131
	jne	.L6
	xor	eax, eax
	call	start_sequence@PLT
	mov	rdi, QWORD PTR Pmode[rip]
	call	gen_reg_rtx@PLT
	mov	esi, r14d
	mov	edi, eax
	mov	r12d, eax
	call	gen_load_dtpmod@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	rdi, QWORD PTR Pmode[rip]
	call	gen_reg_rtx@PLT
	mov	esi, r14d
	mov	edi, eax
	mov	r15d, eax
	call	gen_load_dtprel@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	edx, DWORD PTR LCT_CONST[rip]
	mov	esi, DWORD PTR NULL_RTX[rip]
	xor	eax, eax
	mov	rbx, QWORD PTR Pmode[rip]
	mov	DWORD PTR 12[rsp], edx
	mov	DWORD PTR 8[rsp], esi
	call	gen_tls_get_addr@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 88
	mov	rcx, rbx
	mov	r9d, r12d
	push	rbx
	.cfi_def_cfa_offset 96
	mov	edi, eax
	mov	r8d, 2
	push	r15
	.cfi_def_cfa_offset 104
	push	rbx
	.cfi_def_cfa_offset 112
	mov	edx, DWORD PTR 44[rsp]
	mov	esi, DWORD PTR 40[rsp]
	call	emit_library_call_value@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 80
	mov	r15d, eax
	xor	eax, eax
	call	get_insns@PLT
	mov	r12d, r15d
	mov	ebx, eax
	xor	eax, eax
	call	end_sequence@PLT
	mov	edi, ebp
	call	GET_MODE@PLT
	mov	ecx, r14d
	mov	edx, r15d
	mov	edi, ebx
	cmp	rax, QWORD PTR Pmode[rip]
	cmove	r12d, ebp
	mov	esi, r12d
	call	emit_libcall_block@PLT
.L8:
	test	r13d, r13d
	je	.L14
.L15:
	mov	ebx, DWORD PTR OPTAB_DIRECT[rip]
	mov	edi, r13d
	call	GEN_INT@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 88
	mov	edx, r12d
	mov	r8d, ebp
	push	rbx
	.cfi_def_cfa_offset 96
	mov	esi, DWORD PTR PLUS[rip]
	mov	ecx, eax
	mov	r9d, 1
	mov	rdi, QWORD PTR Pmode[rip]
	call	expand_simple_binop@PLT
	mov	r12d, eax
	pop	rax
	.cfi_def_cfa_offset 88
	pop	rdx
	.cfi_def_cfa_offset 80
	cmp	r12d, ebp
	jne	.L29
	.p2align 4,,10
	.p2align 3
.L17:
	mov	r12d, DWORD PTR NULL_RTX[rip]
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	xor	eax, eax
	call	gcc_unreachable@PLT
	test	r13d, r13d
	je	.L17
	mov	r12d, ebp
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L4:
	mov	rsi, QWORD PTR Pmode[rip]
	mov	edi, ebp
	mov	r15d, ecx
	mov	r12d, ebp
	call	register_operand@PLT
	test	eax, eax
	je	.L30
.L12:
	mov	ecx, DWORD PTR TARGET_TLS64[rip]
	test	ecx, ecx
	je	.L13
	mov	esi, r15d
	mov	edi, r12d
	call	gen_load_tprel@PLT
	mov	edi, eax
	call	emit_insn@PLT
	xor	eax, eax
	call	gen_thread_pointer@PLT
	mov	edi, r12d
	mov	esi, r12d
	mov	edx, eax
	call	gen_adddi3@PLT
	mov	edi, eax
	call	emit_insn@PLT
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L2:
	mov	r15d, r8d
	mov	esi, r8d
	mov	edi, edx
	sal	r15d, 18
	sar	r15d, 18
	sub	esi, r15d
	call	plus_constant@PLT
	mov	rdi, QWORD PTR Pmode[rip]
	mov	r12d, eax
	call	gen_reg_rtx@PLT
	mov	esi, r12d
	mov	r12d, ebp
	mov	edi, eax
	mov	r13d, eax
	call	gen_load_tprel@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	rsi, QWORD PTR Pmode[rip]
	mov	edi, ebp
	call	register_operand@PLT
	test	eax, eax
	je	.L31
.L11:
	xor	eax, eax
	call	gen_thread_pointer@PLT
	mov	esi, r13d
	mov	edi, r12d
	mov	r13d, r15d
	mov	edx, eax
	call	gen_adddi3@PLT
	mov	edi, eax
	call	emit_insn@PLT
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L13:
	xor	eax, eax
	call	gen_thread_pointer@PLT
	mov	edi, r12d
	mov	esi, r15d
	mov	edx, eax
	call	gen_add_tprel@PLT
	mov	edi, eax
	call	emit_insn@PLT
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L10:
	mov	edi, r12d
	mov	edx, r15d
	mov	esi, r14d
	call	gen_add_dtprel@PLT
	mov	edi, eax
	call	emit_insn@PLT
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L28:
	mov	rdi, QWORD PTR Pmode[rip]
	call	gen_reg_rtx@PLT
	mov	r12d, eax
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L31:
	mov	rdi, QWORD PTR Pmode[rip]
	call	gen_reg_rtx@PLT
	mov	r12d, eax
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L30:
	mov	rdi, QWORD PTR Pmode[rip]
	call	gen_reg_rtx@PLT
	mov	r12d, eax
	jmp	.L12
	.cfi_endproc
.LFE0:
	.size	ia64_expand_tls_address, .-ia64_expand_tls_address
	.comm	const0_rtx,4,4
	.comm	UNSPEC_LD_BASE,4,4
	.comm	TARGET_TLS64,4,4
	.comm	Pmode,8,8
	.comm	PLUS,4,4
	.comm	OPTAB_DIRECT,4,4
	.comm	NULL_RTX,4,4
	.comm	LCT_CONST,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ia64.c_ia64_expand_tls_address.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ia64_expand_tls_address, %function
ia64_expand_tls_address:
	@ args = 4, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	r0, r0, #128
	sub	sp, sp, #28
	mov	r4, r1
	mov	r7, r2
	ldr	r9, [sp, #64]
	cmp	r0, #3
	ldrls	pc, [pc, r0, asl #2]
	b	.L2
.L4:
	.word	.L7
	.word	.L6
	.word	.L5
	.word	.L3
.L3:
	ldr	r6, .L33
	bl	start_sequence
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r1, r7
	mov	r8, r0
	bl	gen_load_dtpmod
	bl	emit_insn
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r1, r7
	mov	r5, r0
	bl	gen_load_dtprel
	bl	emit_insn
	bl	gen_tls_get_addr
	mov	ip, #2
	ldr	r3, [r6]
	ldr	r2, .L33+4
	ldr	r1, .L33+8
	str	r3, [sp, #16]
	str	r3, [sp, #8]
	str	ip, [sp]
	str	r8, [sp, #4]
	str	r5, [sp, #12]
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	emit_library_call_value
	mov	r8, r0
	bl	get_insns
	mov	r10, r0
	bl	end_sequence
	mov	r0, r4
	bl	GET_MODE
	mov	r5, r0
	ldr	r3, [r6]
	mov	r0, r10
	cmp	r5, r3
	moveq	r5, r4
	movne	r5, r8
	mov	r3, r7
	mov	r2, r8
	mov	r1, r5
	bl	emit_libcall_block
.L9:
	cmp	r9, #0
	bne	.L16
.L15:
	cmp	r5, r4
	beq	.L18
.L30:
	mov	r0, r4
	bl	GET_MODE
	ldr	r3, [r6]
	cmp	r0, r3
	beq	.L1
	mov	r0, r4
	bl	GET_MODE
	mov	r1, r5
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	gen_lowpart
.L5:
	lsl	r3, r9, #18
	sub	r1, r9, r3, asr #18
	mov	r0, r2
	asr	r9, r3, #18
	bl	plus_constant
	ldr	r6, .L33
	mov	r5, r0
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r1, r5
	mov	r7, r0
	bl	gen_load_tprel
	bl	emit_insn
	mov	r0, r4
	ldr	r1, [r6]
	bl	register_operand
	cmp	r0, #0
	movne	r5, r4
	beq	.L29
.L12:
	bl	gen_thread_pointer
	mov	r1, r7
	mov	r2, r0
	mov	r0, r5
	bl	gen_adddi3
	bl	emit_insn
	cmp	r9, #0
	beq	.L15
.L16:
	ldr	r3, .L33+12
	mov	r0, r9
	ldr	r8, [r3]
	ldr	r7, [r6]
	bl	GEN_INT
	mov	ip, #1
	ldr	r2, .L33+16
	mov	r3, r0
	ldr	lr, [r2]
	mov	r1, r8
	mov	r2, r5
	mov	r0, r7
	stmib	sp, {ip, lr}
	str	r4, [sp]
	bl	expand_simple_binop
	mov	r5, r0
	cmp	r5, r4
	bne	.L30
.L18:
	ldr	r3, .L33+8
	ldr	r5, [r3]
.L1:
	mov	r0, r5
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	ldr	r6, .L33
	mov	r0, r1
	ldr	r1, [r6]
	mov	r8, r3
	bl	register_operand
	cmp	r0, #0
	movne	r5, r4
	beq	.L31
.L13:
	ldr	r3, .L33+20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L14
	mov	r1, r8
	mov	r0, r5
	bl	gen_load_tprel
	bl	emit_insn
	bl	gen_thread_pointer
	mov	r1, r5
	mov	r2, r0
	mov	r0, r5
	bl	gen_adddi3
	bl	emit_insn
	b	.L15
.L6:
	ldr	r6, .L33
	bl	start_sequence
	ldr	r0, [r6]
	bl	gen_reg_rtx
	ldr	r8, .L33+24
	mov	r1, r7
	mov	r5, r0
	bl	gen_load_dtpmod
	bl	emit_insn
	ldr	r10, [r8]
	bl	gen_tls_get_addr
	mov	ip, #2
	ldr	r3, [r6]
	ldr	r2, .L33+4
	ldr	r1, .L33+8
	str	ip, [sp]
	str	r3, [sp, #16]
	str	r3, [sp, #8]
	str	r5, [sp, #4]
	str	r10, [sp, #12]
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	emit_library_call_value
	mov	r10, r0
	bl	get_insns
	mov	r5, r0
	bl	end_sequence
	ldr	r1, [r8]
	mov	r0, #1
	ldr	r8, [r6]
	bl	gen_rtvec
	ldr	r3, .L33+28
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r8
	bl	gen_rtx_UNSPEC
	mov	fp, r0
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r8, r0
	mov	r3, fp
	mov	r2, r10
	mov	r0, r5
	mov	r1, r8
	bl	emit_libcall_block
	mov	r0, r4
	ldr	r1, [r6]
	bl	register_operand
	cmp	r0, #0
	movne	r5, r4
	beq	.L32
.L10:
	ldr	r3, .L33+20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L11
	mov	r1, r7
	mov	r0, r5
	bl	gen_load_dtprel
	bl	emit_insn
	mov	r2, r5
	mov	r1, r8
	mov	r0, r5
	bl	gen_adddi3
	bl	emit_insn
	b	.L9
.L14:
	bl	gen_thread_pointer
	mov	r1, r8
	mov	r2, r0
	mov	r0, r5
	bl	gen_add_tprel
	bl	emit_insn
	b	.L15
.L11:
	mov	r2, r8
	mov	r1, r7
	mov	r0, r5
	bl	gen_add_dtprel
	bl	emit_insn
	b	.L9
.L32:
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r5, r0
	b	.L10
.L31:
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r5, r0
	b	.L13
.L29:
	ldr	r0, [r6]
	bl	gen_reg_rtx
	mov	r5, r0
	b	.L12
.L2:
	bl	gcc_unreachable
	cmp	r9, #0
	beq	.L18
	mov	r5, r4
	ldr	r6, .L33
	b	.L16
.L34:
	.align	2
.L33:
	.word	Pmode
	.word	LCT_CONST
	.word	NULL_RTX
	.word	PLUS
	.word	OPTAB_DIRECT
	.word	TARGET_TLS64
	.word	const0_rtx
	.word	UNSPEC_LD_BASE
	.size	ia64_expand_tls_address, .-ia64_expand_tls_address
	.comm	const0_rtx,4,4
	.comm	UNSPEC_LD_BASE,4,4
	.comm	TARGET_TLS64,4,4
	.comm	Pmode,4,4
	.comm	PLUS,4,4
	.comm	OPTAB_DIRECT,4,4
	.comm	NULL_RTX,4,4
	.comm	LCT_CONST,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
