	.file	"extr_aptina-pll.c_aptina_pll_calculate.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"PLL: ext clock %u pix clock %u\n"
	.align 8
.LC1:
	.string	"pll: invalid external clock frequency.\n"
	.align 8
.LC2:
	.string	"pll: invalid pixel clock frequency.\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"pll: mf min %u max %u\n"
	.section	.rodata.str1.8
	.align 8
.LC4:
	.string	"pll: no valid combined N*P1 divisor.\n"
	.align 8
.LC5:
	.string	"pll: P1 minimum value must be >0.\n"
	.section	.rodata.str1.1
.LC6:
	.string	"PLL: N %u M %u P1 %u\n"
	.section	.rodata.str1.8
	.align 8
.LC7:
	.string	"pll: no valid N and P1 divisors found.\n"
	.text
	.p2align 4
	.globl	aptina_pll_calculate
	.type	aptina_pll_calculate, @function
aptina_pll_calculate:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xor	eax, eax
	mov	r15, rdi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rsi
	lea	rsi, .LC0[rip]
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	ecx, DWORD PTR 4[rdx]
	mov	edx, DWORD PTR [rdx]
	call	dev_dbg@PLT
	mov	esi, DWORD PTR [rbx]
	cmp	esi, DWORD PTR 0[rbp]
	jb	.L2
	cmp	esi, DWORD PTR 4[rbp]
	ja	.L2
	mov	edi, DWORD PTR 4[rbx]
	test	edi, edi
	je	.L5
	cmp	edi, DWORD PTR 8[rbp]
	ja	.L5
	call	gcd@PLT
	xor	edx, edx
	mov	edi, DWORD PTR 12[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR 4[rbx]
	div	ecx
	xor	edx, edx
	mov	esi, eax
	mov	DWORD PTR 8[rbx], eax
	mov	eax, DWORD PTR [rbx]
	div	ecx
	mov	r12d, eax
	call	DIV_ROUND_UP@PLT
	xor	edx, edx
	mov	edi, eax
	mov	eax, DWORD PTR [rbx]
	div	DWORD PTR 20[rbp]
	xor	edx, edx
	imul	eax, DWORD PTR 8[rbx]
	mov	ecx, eax
	mov	eax, DWORD PTR 16[rbp]
	div	ecx
	mov	esi, eax
	call	max@PLT
	xor	edx, edx
	mov	edi, eax
	mov	eax, DWORD PTR 20[rbp]
	imul	eax, DWORD PTR 24[rbp]
	div	r12d
	mov	esi, eax
	call	max@PLT
	mov	ecx, DWORD PTR 8[rbx]
	xor	edx, edx
	mov	r13d, eax
	mov	DWORD PTR 4[rsp], eax
	mov	eax, DWORD PTR 28[rbp]
	div	ecx
	xor	edx, edx
	mov	edi, eax
	mov	eax, DWORD PTR [rbx]
	div	DWORD PTR 36[rbp]
	xor	edx, edx
	imul	ecx, eax
	mov	eax, DWORD PTR 32[rbp]
	div	ecx
	mov	esi, eax
	call	min@PLT
	mov	edi, DWORD PTR 36[rbp]
	imul	edi, DWORD PTR 40[rbp]
	mov	esi, r12d
	mov	r14d, eax
	call	DIV_ROUND_UP@PLT
	mov	edi, r14d
	mov	esi, eax
	call	min@PLT
	mov	edx, r13d
	lea	rsi, .LC3[rip]
	mov	rdi, r15
	mov	r14d, eax
	mov	ecx, eax
	xor	eax, eax
	call	dev_dbg@PLT
	cmp	r13d, r14d
	ja	.L18
	mov	eax, DWORD PTR 24[rbp]
	test	eax, eax
	je	.L19
	mov	edi, DWORD PTR 16[rbp]
	mov	esi, DWORD PTR [rbx]
	imul	esi, DWORD PTR 8[rbx]
	imul	edi, r12d
	call	DIV_ROUND_UP@PLT
	mov	edi, DWORD PTR 24[rbp]
	mov	esi, eax
	call	max@PLT
	mov	ecx, DWORD PTR [rbx]
	imul	ecx, DWORD PTR 8[rbx]
	xor	edx, edx
	mov	DWORD PTR 12[rsp], eax
	mov	eax, DWORD PTR 32[rbp]
	mov	edi, DWORD PTR 40[rbp]
	imul	eax, r12d
	div	ecx
	mov	esi, eax
	call	min@PLT
	mov	r13d, eax
	and	r13d, -2
	cmp	DWORD PTR 12[rsp], r13d
	ja	.L9
.L11:
	mov	esi, r13d
	mov	edi, r12d
	call	gcd@PLT
	xor	edx, edx
	mov	esi, DWORD PTR 44[rbp]
	mov	edi, DWORD PTR [rbx]
	mov	r10d, eax
	mov	eax, r13d
	div	r10d
	imul	esi, r12d
	imul	edi, r13d
	mov	DWORD PTR 8[rsp], eax
	call	DIV_ROUND_UP@PLT
	mov	edi, DWORD PTR 4[rsp]
	mov	esi, eax
	call	max@PLT
	mov	r10d, DWORD PTR 8[rsp]
	mov	edi, eax
	mov	esi, r10d
	call	roundup@PLT
	mov	edi, DWORD PTR 48[rbp]
	xor	edx, edx
	mov	DWORD PTR 8[rsp], eax
	mov	eax, DWORD PTR [rbx]
	imul	edi, r12d
	imul	eax, r13d
	div	edi
	mov	edi, r14d
	mov	esi, eax
	call	min@PLT
	mov	ecx, DWORD PTR 8[rsp]
	cmp	ecx, eax
	jbe	.L10
	sub	r13d, 2
	cmp	DWORD PTR 12[rsp], r13d
	jbe	.L11
.L9:
	lea	rsi, .LC7[rip]
	mov	rdi, r15
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L5:
	lea	rsi, .LC2[rip]
	mov	rdi, r15
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	rdi, r15
	lea	rsi, .LC1[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	mov	eax, r12d
	xor	edx, edx
	mov	DWORD PTR 16[rbx], r13d
	mov	r8d, r13d
	imul	eax, ecx
	lea	rsi, .LC6[rip]
	mov	rdi, r15
	imul	ecx, DWORD PTR 8[rbx]
	div	r13d
	mov	DWORD PTR 8[rbx], ecx
	mov	DWORD PTR 12[rbx], eax
	mov	edx, eax
	xor	eax, eax
	call	dev_dbg@PLT
	xor	eax, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L19:
	lea	rsi, .LC5[rip]
	mov	rdi, r15
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L18:
	lea	rsi, .LC4[rip]
	mov	rdi, r15
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	aptina_pll_calculate, .-aptina_pll_calculate
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_aptina-pll.c_aptina_pll_calculate.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"PLL: ext clock %u pix clock %u\012\000"
	.align	2
.LC1:
	.ascii	"pll: invalid external clock frequency.\012\000"
	.align	2
.LC2:
	.ascii	"pll: invalid pixel clock frequency.\012\000"
	.global	__aeabi_uidiv
	.align	2
.LC3:
	.ascii	"pll: mf min %u max %u\012\000"
	.align	2
.LC4:
	.ascii	"pll: no valid combined N*P1 divisor.\012\000"
	.align	2
.LC5:
	.ascii	"pll: P1 minimum value must be >0.\012\000"
	.align	2
.LC6:
	.ascii	"PLL: N %u M %u P1 %u\012\000"
	.align	2
.LC7:
	.ascii	"pll: no valid N and P1 divisors found.\012\000"
	.text
	.align	2
	.global	aptina_pll_calculate
	.syntax unified
	.arm
	.fpu softvfp
	.type	aptina_pll_calculate, %function
aptina_pll_calculate:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r2
	ldm	r2, {r2, r3}
	mov	r5, r1
	sub	sp, sp, #20
	ldr	r1, .L20
	mov	r6, r0
	bl	dev_dbg
	ldr	r1, [r4]
	ldr	r3, [r5]
	cmp	r1, r3
	bcc	.L2
	ldr	r3, [r5, #4]
	cmp	r1, r3
	bhi	.L2
	ldr	r0, [r4, #4]
	cmp	r0, #0
	beq	.L5
	ldr	r3, [r5, #8]
	cmp	r0, r3
	bhi	.L5
	bl	gcd
	mov	r7, r0
	ldr	r0, [r4, #4]
	mov	r1, r7
	bl	__aeabi_uidiv
	mov	r1, r7
	mov	r8, r0
	str	r0, [r4, #8]
	ldr	r0, [r4]
	bl	__aeabi_uidiv
	mov	r1, r8
	mov	r7, r0
	ldr	r0, [r5, #12]
	bl	DIV_ROUND_UP
	ldr	r1, [r5, #20]
	mov	r8, r0
	ldr	r0, [r4]
	bl	__aeabi_uidiv
	mov	r3, r0
	ldr	r1, [r4, #8]
	ldr	r0, [r5, #16]
	mul	r1, r3, r1
	bl	__aeabi_uidiv
	mov	r1, r0
	mov	r0, r8
	bl	max
	ldr	r3, [r5, #20]
	ldr	r2, [r5, #24]
	mov	r8, r0
	mov	r1, r7
	mul	r0, r2, r3
	bl	__aeabi_uidiv
	mov	r1, r0
	mov	r0, r8
	bl	max
	ldr	r10, [r4, #8]
	mov	r9, r0
	mov	r1, r10
	ldr	r0, [r5, #28]
	bl	__aeabi_uidiv
	ldr	r1, [r5, #36]
	mov	r8, r0
	ldr	r0, [r4]
	bl	__aeabi_uidiv
	mov	r1, r0
	ldr	r0, [r5, #32]
	mul	r1, r10, r1
	bl	__aeabi_uidiv
	mov	r1, r0
	mov	r0, r8
	bl	min
	ldr	r3, [r5, #36]
	ldr	r2, [r5, #40]
	mov	r8, r0
	mov	r1, r7
	mul	r0, r2, r3
	bl	DIV_ROUND_UP
	mov	r1, r0
	mov	r0, r8
	bl	min
	mov	r10, r0
	mov	r3, r0
	mov	r2, r9
	mov	r0, r6
	ldr	r1, .L20+4
	bl	dev_dbg
	cmp	r9, r10
	bhi	.L18
	ldr	r8, [r5, #24]
	cmp	r8, #0
	beq	.L19
	ldr	r3, [r4]
	ldr	r1, [r4, #8]
	ldr	r0, [r5, #16]
	mul	r1, r3, r1
	mul	r0, r7, r0
	bl	DIV_ROUND_UP
	mov	r1, r0
	mov	r0, r8
	bl	max
	mov	fp, r0
	ldr	r3, [r4]
	ldr	r0, [r5, #32]
	ldr	r1, [r4, #8]
	mul	r0, r7, r0
	mul	r1, r3, r1
	str	fp, [sp, #12]
	bl	__aeabi_uidiv
	mov	r1, r0
	ldr	r0, [r5, #40]
	bl	min
	bic	r8, r0, #1
	cmp	fp, r8
	bhi	.L9
.L11:
	mov	r1, r8
	mov	r0, r7
	bl	gcd
	mov	r1, r0
	mov	r0, r8
	bl	__aeabi_uidiv
	ldr	r1, [r5, #44]
	mov	fp, r0
	ldr	r0, [r4]
	mul	r1, r7, r1
	mul	r0, r8, r0
	bl	DIV_ROUND_UP
	mov	r1, r0
	mov	r0, r9
	bl	max
	mov	r1, fp
	bl	roundup
	ldr	r1, [r5, #48]
	mov	fp, r0
	ldr	r0, [r4]
	mul	r1, r7, r1
	mul	r0, r8, r0
	bl	__aeabi_uidiv
	mov	r1, r0
	mov	r0, r10
	bl	min
	cmp	fp, r0
	bls	.L10
	ldr	r3, [sp, #12]
	sub	r8, r8, #2
	cmp	r3, r8
	bls	.L11
.L9:
	mov	r0, r6
	ldr	r1, .L20+8
	bl	dev_err
	ldr	r3, .L20+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L5:
	mov	r0, r6
	ldr	r1, .L20+16
	bl	dev_err
	ldr	r3, .L20+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
.L1:
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	mov	r0, r6
	ldr	r1, .L20+20
	bl	dev_err
	ldr	r3, .L20+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L10:
	mov	r1, r8
	mul	r0, fp, r7
	bl	__aeabi_uidiv
	ldr	r1, [r4, #8]
	str	r0, [r4, #12]
	mul	r3, r1, fp
	mov	r2, r0
	str	r8, [r4, #16]
	mov	r0, r6
	str	r8, [sp]
	ldr	r1, .L20+24
	str	r3, [r4, #8]
	bl	dev_dbg
	mov	r0, #0
	b	.L1
.L19:
	mov	r0, r6
	ldr	r1, .L20+28
	bl	dev_err
	ldr	r3, .L20+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L18:
	mov	r0, r6
	ldr	r1, .L20+32
	bl	dev_err
	ldr	r3, .L20+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L21:
	.align	2
.L20:
	.word	.LC0
	.word	.LC3
	.word	.LC7
	.word	EINVAL
	.word	.LC2
	.word	.LC1
	.word	.LC6
	.word	.LC5
	.word	.LC4
	.size	aptina_pll_calculate, .-aptina_pll_calculate
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
