	.file	"extr_r8152.c_r8153_first_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	r8153_first_init, @function
r8153_first_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xor	esi, esi
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	ebx, 1000
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	r8153_mac_clk_spd@PLT
	mov	esi, 1
	mov	rdi, rbp
	call	rxdy_gated_en@PLT
	mov	rdi, rbp
	call	r8153_teredo_off@PLT
	mov	edx, DWORD PTR PLA_RCR[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	call	ocp_read_dword@PLT
	mov	ecx, DWORD PTR RCR_ACPT_ALL[rip]
	mov	edx, DWORD PTR PLA_RCR[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	not	ecx
	and	ecx, eax
	call	ocp_write_dword@PLT
	mov	rdi, rbp
	call	rtl8152_nic_reset@PLT
	mov	rdi, rbp
	call	rtl_reset_bmu@PLT
	mov	edx, DWORD PTR PLA_OOB_CTRL[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	call	ocp_read_byte@PLT
	mov	ecx, DWORD PTR NOW_IS_OOB[rip]
	mov	edx, DWORD PTR PLA_OOB_CTRL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	not	ecx
	and	ecx, eax
	call	ocp_write_byte@PLT
	mov	edx, DWORD PTR PLA_SFF_STS_7[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	call	ocp_read_word@PLT
	mov	ecx, DWORD PTR MCU_BORW_EN[rip]
	mov	edx, DWORD PTR PLA_SFF_STS_7[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	not	ecx
	and	ecx, eax
	call	ocp_write_word@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L10:
	mov	esi, 2000
	mov	edi, 1000
	call	usleep_range@PLT
	sub	ebx, 1
	je	.L2
.L3:
	mov	edx, DWORD PTR PLA_OOB_CTRL[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	call	ocp_read_byte@PLT
	test	DWORD PTR LINK_LIST_READY[rip], eax
	je	.L10
.L2:
	mov	edx, DWORD PTR PLA_SFF_STS_7[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	mov	ebx, 1000
	call	ocp_read_word@PLT
	mov	edx, DWORD PTR PLA_SFF_STS_7[rip]
	or	eax, DWORD PTR RE_INIT_LL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	ecx, eax
	call	ocp_write_word@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L11:
	mov	esi, 2000
	mov	edi, 1000
	call	usleep_range@PLT
	sub	ebx, 1
	je	.L4
.L5:
	mov	edx, DWORD PTR PLA_OOB_CTRL[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	call	ocp_read_byte@PLT
	test	DWORD PTR LINK_LIST_READY[rip], eax
	je	.L11
.L4:
	mov	rax, QWORD PTR 0[rbp]
	mov	rdi, rbp
	mov	esi, DWORD PTR [rax]
	and	esi, DWORD PTR NETIF_F_HW_VLAN_CTAG_RX[rip]
	call	rtl_rx_vlan_en@PLT
	mov	rax, QWORD PTR 0[rbp]
	mov	edx, DWORD PTR PLA_RMS[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	ecx, DWORD PTR VLAN_ETH_HLEN[rip]
	add	ecx, DWORD PTR 4[rax]
	add	ecx, DWORD PTR ETH_FCS_LEN[rip]
	call	ocp_write_word@PLT
	mov	ecx, DWORD PTR MTPS_JUMBO[rip]
	mov	edx, DWORD PTR PLA_MTPS[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	call	ocp_write_byte@PLT
	mov	edx, DWORD PTR PLA_TCR0[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	call	ocp_read_word@PLT
	mov	edx, DWORD PTR PLA_TCR0[rip]
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	mov	rdi, rbp
	or	eax, DWORD PTR TCR0_AUTO_FIFO[rip]
	mov	ecx, eax
	call	ocp_write_word@PLT
	mov	rdi, rbp
	call	rtl8152_nic_reset@PLT
	mov	ecx, DWORD PTR RXFIFO_THR1_NORMAL[rip]
	mov	edx, DWORD PTR PLA_RXFIFO_CTRL0[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	call	ocp_write_dword@PLT
	mov	ecx, DWORD PTR RXFIFO_THR2_NORMAL[rip]
	mov	edx, DWORD PTR PLA_RXFIFO_CTRL1[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	call	ocp_write_word@PLT
	mov	ecx, DWORD PTR RXFIFO_THR3_NORMAL[rip]
	mov	edx, DWORD PTR PLA_RXFIFO_CTRL2[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	call	ocp_write_word@PLT
	mov	ecx, DWORD PTR TXFIFO_THR_NORMAL2[rip]
	mov	edx, DWORD PTR PLA_TXFIFO_CTRL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR MCU_TYPE_PLA[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	ocp_write_dword@PLT
	.cfi_endproc
.LFE0:
	.size	r8153_first_init, .-r8153_first_init
	.comm	VLAN_ETH_HLEN,4,4
	.comm	TXFIFO_THR_NORMAL2,4,4
	.comm	TCR0_AUTO_FIFO,4,4
	.comm	RXFIFO_THR3_NORMAL,4,4
	.comm	RXFIFO_THR2_NORMAL,4,4
	.comm	RXFIFO_THR1_NORMAL,4,4
	.comm	RE_INIT_LL,4,4
	.comm	RCR_ACPT_ALL,4,4
	.comm	PLA_TXFIFO_CTRL,4,4
	.comm	PLA_TCR0,4,4
	.comm	PLA_SFF_STS_7,4,4
	.comm	PLA_RXFIFO_CTRL2,4,4
	.comm	PLA_RXFIFO_CTRL1,4,4
	.comm	PLA_RXFIFO_CTRL0,4,4
	.comm	PLA_RMS,4,4
	.comm	PLA_RCR,4,4
	.comm	PLA_OOB_CTRL,4,4
	.comm	PLA_MTPS,4,4
	.comm	NOW_IS_OOB,4,4
	.comm	NETIF_F_HW_VLAN_CTAG_RX,4,4
	.comm	MTPS_JUMBO,4,4
	.comm	MCU_TYPE_PLA,4,4
	.comm	MCU_BORW_EN,4,4
	.comm	LINK_LIST_READY,4,4
	.comm	ETH_FCS_LEN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_r8152.c_r8153_first_init.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	r8153_first_init, %function
r8153_first_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r0
	mov	r1, #0
	ldr	r5, .L12
	bl	r8153_mac_clk_spd
	ldr	r6, .L12+4
	mov	r1, #1
	mov	r0, r4
	bl	rxdy_gated_en
	mov	r0, r4
	bl	r8153_teredo_off
	ldr	r2, [r6]
	ldr	r1, [r5]
	mov	r0, r4
	bl	ocp_read_dword
	mov	r3, r0
	ldr	r1, .L12+8
	ldr	r2, [r6]
	ldr	r1, [r1]
	mov	r0, r4
	bic	r3, r3, r1
	ldr	r1, [r5]
	bl	ocp_write_dword
	ldr	r7, .L12+12
	mov	r0, r4
	bl	rtl8152_nic_reset
	mov	r0, r4
	bl	rtl_reset_bmu
	ldr	r1, [r5]
	ldr	r2, [r7]
	mov	r0, r4
	bl	ocp_read_byte
	mov	r3, r0
	ldr	r2, .L12+16
	ldr	r9, .L12+20
	ldr	r2, [r2]
	ldr	r1, [r5]
	bic	r3, r3, r2
	mov	r0, r4
	ldr	r2, [r7]
	bl	ocp_write_byte
	ldr	r1, [r5]
	ldr	r2, [r9]
	mov	r0, r4
	bl	ocp_read_word
	mov	r3, r0
	ldr	r2, .L12+24
	mov	r0, r4
	ldr	r1, [r2]
	ldr	r2, [r9]
	bic	r3, r3, r1
	ldr	r1, [r5]
	bl	ocp_write_word
	mov	r6, #1000
	ldr	r8, .L12+28
	b	.L3
.L10:
	mov	r1, #2000
	mov	r0, #1000
	bl	usleep_range
	subs	r6, r6, #1
	beq	.L2
.L3:
	mov	r0, r4
	ldr	r2, [r7]
	ldr	r1, [r5]
	bl	ocp_read_byte
	ldr	r3, [r8]
	tst	r0, r3
	beq	.L10
.L2:
	ldr	r2, [r9]
	ldr	r1, [r5]
	mov	r0, r4
	bl	ocp_read_word
	ldr	r3, .L12+32
	ldr	r2, [r9]
	ldr	r3, [r3]
	ldr	r1, [r5]
	orr	r3, r0, r3
	mov	r0, r4
	bl	ocp_write_word
	mov	r6, #1000
	b	.L5
.L11:
	mov	r1, #2000
	mov	r0, #1000
	bl	usleep_range
	subs	r6, r6, #1
	beq	.L4
.L5:
	mov	r0, r4
	ldr	r2, [r7]
	ldr	r1, [r5]
	bl	ocp_read_byte
	ldr	r3, [r8]
	tst	r0, r3
	beq	.L11
.L4:
	ldr	r2, [r4]
	ldr	r3, .L12+36
	ldr	r1, [r2]
	ldr	r3, [r3]
	mov	r0, r4
	and	r1, r1, r3
	bl	rtl_rx_vlan_en
	ldr	r2, [r4]
	ldr	r3, .L12+40
	ldr	r1, .L12+44
	ldr	r2, [r2, #4]
	ldr	r3, [r3]
	ldr	r0, [r1]
	ldr	r1, .L12+48
	add	r3, r2, r3
	add	r3, r3, r0
	ldr	r2, [r1]
	mov	r0, r4
	ldr	r1, [r5]
	bl	ocp_write_word
	ldr	r3, .L12+52
	ldr	r2, .L12+56
	ldr	r6, .L12+60
	ldr	r3, [r3]
	ldr	r1, [r5]
	mov	r0, r4
	ldr	r2, [r2]
	bl	ocp_write_byte
	ldr	r2, [r6]
	ldr	r1, [r5]
	mov	r0, r4
	bl	ocp_read_word
	ldr	r3, .L12+64
	ldr	r2, [r6]
	ldr	r3, [r3]
	ldr	r1, [r5]
	orr	r3, r0, r3
	mov	r0, r4
	bl	ocp_write_word
	mov	r0, r4
	bl	rtl8152_nic_reset
	ldr	r3, .L12+68
	ldr	r2, .L12+72
	ldr	r1, [r5]
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r2, [r2]
	bl	ocp_write_dword
	ldr	r3, .L12+76
	ldr	r2, .L12+80
	ldr	r1, [r5]
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r2, [r2]
	bl	ocp_write_word
	ldr	r3, .L12+84
	ldr	r2, .L12+88
	ldr	r1, [r5]
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r2, [r2]
	bl	ocp_write_word
	ldr	r3, .L12+92
	ldr	r2, .L12+96
	mov	r0, r4
	ldr	r1, [r5]
	ldr	r3, [r3]
	ldr	r2, [r2]
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	ocp_write_dword
.L13:
	.align	2
.L12:
	.word	MCU_TYPE_PLA
	.word	PLA_RCR
	.word	RCR_ACPT_ALL
	.word	PLA_OOB_CTRL
	.word	NOW_IS_OOB
	.word	PLA_SFF_STS_7
	.word	MCU_BORW_EN
	.word	LINK_LIST_READY
	.word	RE_INIT_LL
	.word	NETIF_F_HW_VLAN_CTAG_RX
	.word	VLAN_ETH_HLEN
	.word	ETH_FCS_LEN
	.word	PLA_RMS
	.word	MTPS_JUMBO
	.word	PLA_MTPS
	.word	PLA_TCR0
	.word	TCR0_AUTO_FIFO
	.word	RXFIFO_THR1_NORMAL
	.word	PLA_RXFIFO_CTRL0
	.word	RXFIFO_THR2_NORMAL
	.word	PLA_RXFIFO_CTRL1
	.word	RXFIFO_THR3_NORMAL
	.word	PLA_RXFIFO_CTRL2
	.word	TXFIFO_THR_NORMAL2
	.word	PLA_TXFIFO_CTRL
	.size	r8153_first_init, .-r8153_first_init
	.comm	VLAN_ETH_HLEN,4,4
	.comm	TXFIFO_THR_NORMAL2,4,4
	.comm	TCR0_AUTO_FIFO,4,4
	.comm	RXFIFO_THR3_NORMAL,4,4
	.comm	RXFIFO_THR2_NORMAL,4,4
	.comm	RXFIFO_THR1_NORMAL,4,4
	.comm	RE_INIT_LL,4,4
	.comm	RCR_ACPT_ALL,4,4
	.comm	PLA_TXFIFO_CTRL,4,4
	.comm	PLA_TCR0,4,4
	.comm	PLA_SFF_STS_7,4,4
	.comm	PLA_RXFIFO_CTRL2,4,4
	.comm	PLA_RXFIFO_CTRL1,4,4
	.comm	PLA_RXFIFO_CTRL0,4,4
	.comm	PLA_RMS,4,4
	.comm	PLA_RCR,4,4
	.comm	PLA_OOB_CTRL,4,4
	.comm	PLA_MTPS,4,4
	.comm	NOW_IS_OOB,4,4
	.comm	NETIF_F_HW_VLAN_CTAG_RX,4,4
	.comm	MTPS_JUMBO,4,4
	.comm	MCU_TYPE_PLA,4,4
	.comm	MCU_BORW_EN,4,4
	.comm	LINK_LIST_READY,4,4
	.comm	ETH_FCS_LEN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
