	.file	"extr_ni_tio.c_ni_tio_set_gate_mode.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	ni_tio_set_gate_mode, @function
ni_tio_set_gate_mode:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	mov	edi, esi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	ebx, esi
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	CR_CHAN@PLT
	test	DWORD PTR NI_GPCT_DISABLED_GATE_SELECT[rip], eax
	je	.L2
	mov	r13d, DWORD PTR GI_GATING_DISABLED[rip]
	mov	edx, DWORD PTR GI_GATE_POL_INVERT[rip]
.L3:
	mov	edi, DWORD PTR 0[rbp]
	or	edx, DWORD PTR GI_GATING_MODE_MASK[rip]
	mov	r12d, edx
	call	NITIO_MODE_REG@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	ecx, r13d
	mov	edx, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	mov	rdi, rbp
	mov	esi, eax
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	ni_tio_set_bits@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edx, DWORD PTR GI_GATE_POL_INVERT[rip]
	mov	r13d, ebx
	and	r13d, DWORD PTR CR_INVERT[rip]
	cmovne	r13d, edx
	test	DWORD PTR CR_EDGE[rip], ebx
	je	.L5
	or	r13d, DWORD PTR GI_RISING_EDGE_GATING[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L5:
	or	r13d, DWORD PTR GI_LEVEL_GATING[rip]
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	ni_tio_set_gate_mode, .-ni_tio_set_gate_mode
	.comm	NI_GPCT_DISABLED_GATE_SELECT,4,4
	.comm	GI_RISING_EDGE_GATING,4,4
	.comm	GI_LEVEL_GATING,4,4
	.comm	GI_GATING_MODE_MASK,4,4
	.comm	GI_GATING_DISABLED,4,4
	.comm	GI_GATE_POL_INVERT,4,4
	.comm	CR_INVERT,4,4
	.comm	CR_EDGE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ni_tio.c_ni_tio_set_gate_mode.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ni_tio_set_gate_mode, %function
ni_tio_set_gate_mode:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r5, r0
	mov	r0, r1
	mov	r4, r1
	bl	CR_CHAN
	ldr	r3, .L11
	ldr	r3, [r3]
	tst	r0, r3
	beq	.L2
	ldr	r3, .L11+4
	ldr	r6, .L11+8
	ldr	r4, [r3]
.L3:
	ldr	r0, [r5]
	bl	NITIO_MODE_REG
	ldr	r3, .L11+12
	ldr	ip, [r6]
	ldr	r2, [r3]
	mov	r1, r0
	mov	r3, r4
	mov	r0, r5
	pop	{r4, r5, r6, lr}
	orr	r2, ip, r2
	b	ni_tio_set_bits
.L2:
	ldr	r3, .L11+16
	ldr	r2, .L11+20
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r6, .L11+8
	ands	r3, r4, r3
	ldrne	r3, [r6]
	tst	r4, r2
	ldrne	r2, .L11+24
	ldreq	r2, .L11+28
	ldr	r4, [r2]
	orr	r4, r3, r4
	b	.L3
.L12:
	.align	2
.L11:
	.word	NI_GPCT_DISABLED_GATE_SELECT
	.word	GI_GATING_DISABLED
	.word	GI_GATE_POL_INVERT
	.word	GI_GATING_MODE_MASK
	.word	CR_INVERT
	.word	CR_EDGE
	.word	GI_RISING_EDGE_GATING
	.word	GI_LEVEL_GATING
	.size	ni_tio_set_gate_mode, .-ni_tio_set_gate_mode
	.comm	NI_GPCT_DISABLED_GATE_SELECT,4,4
	.comm	GI_RISING_EDGE_GATING,4,4
	.comm	GI_LEVEL_GATING,4,4
	.comm	GI_GATING_MODE_MASK,4,4
	.comm	GI_GATING_DISABLED,4,4
	.comm	GI_GATE_POL_INVERT,4,4
	.comm	CR_INVERT,4,4
	.comm	CR_EDGE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
