	.file	"extr_cam_sim.c_cam_sim_alloc.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	cam_sim_alloc
	.type	cam_sim_alloc, @function
cam_sim_alloc:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15d, edi
	mov	edi, 96
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, esi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rdx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rcx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, r8d
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	esi, DWORD PTR M_CAMSIM[rip]
	mov	edx, DWORD PTR M_ZERO[rip]
	or	edx, DWORD PTR M_NOWAIT[rip]
	mov	QWORD PTR 8[rsp], r9
	call	malloc@PLT
	mov	r12, rax
	test	rax, rax
	je	.L1
	mov	DWORD PTR 92[rax], r15d
	mov	r9, QWORD PTR 8[rsp]
	lea	rdi, 20[r12]
	mov	DWORD PTR 88[rax], r14d
	mov	QWORD PTR [rax], r13
	mov	QWORD PTR 80[rax], rbp
	mov	eax, DWORD PTR CAM_PATH_ANY[rip]
	mov	QWORD PTR 64[r12], 0
	mov	DWORD PTR 72[r12], eax
	mov	eax, DWORD PTR 88[rsp]
	mov	DWORD PTR 56[r12], ebx
	mov	DWORD PTR 8[r12], eax
	mov	eax, DWORD PTR 80[rsp]
	mov	QWORD PTR 48[r12], 0
	mov	DWORD PTR 12[r12], eax
	mov	rax, QWORD PTR 96[rsp]
	mov	DWORD PTR 24[r12], 0
	mov	QWORD PTR 40[r12], rax
	lea	rax, Giant[rip]
	mov	DWORD PTR 16[r12], 1
	mov	QWORD PTR 32[r12], r9
	cmp	r9, rax
	je	.L8
	mov	eax, DWORD PTR CAM_SIM_MPSAFE[rip]
	mov	esi, 1
	mov	DWORD PTR 24[r12], eax
	call	callout_init@PLT
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r12
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	xor	esi, esi
	call	callout_init@PLT
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	cam_sim_alloc, .-cam_sim_alloc
	.comm	M_ZERO,4,4
	.comm	M_NOWAIT,4,4
	.comm	M_CAMSIM,4,4
	.comm	Giant,4,4
	.comm	CAM_SIM_MPSAFE,4,4
	.comm	CAM_PATH_ANY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cam_sim.c_cam_sim_alloc.c"
	.text
	.align	2
	.global	cam_sim_alloc
	.syntax unified
	.arm
	.fpu softvfp
	.type	cam_sim_alloc, %function
cam_sim_alloc:
	@ args = 20, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r7, r1
	mov	r6, r2
	ldr	r1, .L9
	ldr	r2, .L9+4
	mov	r8, r0
	ldr	r2, [r2]
	ldr	r0, [r1]
	ldr	r1, .L9+8
	orr	r2, r0, r2
	ldr	r1, [r1]
	mov	r0, #60
	mov	r5, r3
	ldr	r9, [sp, #36]
	bl	malloc
	subs	r4, r0, #0
	beq	.L1
	mov	ip, #0
	mov	r1, #1
	ldr	r2, .L9+12
	ldr	r3, .L9+16
	cmp	r9, r2
	ldr	r2, [sp, #32]
	ldr	r3, [r3]
	str	r2, [r4, #36]
	ldr	r2, [sp, #44]
	str	r3, [r4, #44]
	str	r2, [r4, #4]
	ldrne	r3, .L9+20
	ldr	r2, [sp, #40]
	ldrne	r3, [r3]
	str	r2, [r4, #8]
	ldr	r2, [sp, #48]
	str	ip, [r4, #20]
	str	r1, [r4, #12]
	str	r8, [r4, #56]
	moveq	r1, ip
	str	r7, [r4, #52]
	str	r6, [r4]
	str	r5, [r4, #48]
	str	r2, [r4, #28]
	str	r9, [r4, #24]
	str	ip, [r4, #40]
	str	ip, [r4, #32]
	add	r0, r4, #16
	strne	r3, [r4, #20]
	bl	callout_init
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L10:
	.align	2
.L9:
	.word	M_ZERO
	.word	M_NOWAIT
	.word	M_CAMSIM
	.word	Giant
	.word	CAM_PATH_ANY
	.word	CAM_SIM_MPSAFE
	.size	cam_sim_alloc, .-cam_sim_alloc
	.comm	M_ZERO,4,4
	.comm	M_NOWAIT,4,4
	.comm	M_CAMSIM,4,4
	.comm	Giant,4,4
	.comm	CAM_SIM_MPSAFE,4,4
	.comm	CAM_PATH_ANY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
