	.file	"extr_gcc.c_handle_braces.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"braced spec '%s' is invalid at '%c'"
	.text
	.p2align 4
	.type	handle_braces, @function
handle_braces:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xor	r15d, r15d
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, 2359311
	sub	rsp, 72
	.cfi_def_cfa_offset 128
	mov	QWORD PTR 48[rsp], rdi
	mov	DWORD PTR 40[rsp], 0
	mov	DWORD PTR 20[rsp], 0
	mov	DWORD PTR 16[rsp], 1
	mov	DWORD PTR 8[rsp], 0
	mov	DWORD PTR 44[rsp], 0
	mov	QWORD PTR 32[rsp], 0
	mov	QWORD PTR 24[rsp], 0
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L5:
	add	r14, 1
.L2:
	movzx	eax, BYTE PTR [r14]
	cmp	al, 32
	je	.L5
	cmp	al, 9
	je	.L5
	mov	r12, r14
	xor	r13d, r13d
	cmp	al, 33
	je	.L72
.L6:
	xor	r14d, r14d
	cmp	al, 46
	jne	.L9
	add	r12, 1
	mov	r14d, 1
.L9:
	mov	rbp, r12
	.p2align 4,,10
	.p2align 3
.L10:
	movsx	edi, BYTE PTR 0[rbp]
	call	ISIDNUM@PLT
	test	rax, rax
	jne	.L11
	movzx	eax, BYTE PTR 0[rbp]
	lea	edx, -43[rax]
	cmp	dl, 21
	jbe	.L12
	cmp	al, 42
	je	.L13
	mov	rcx, rbp
	xor	edx, edx
.L14:
	cmp	al, 32
	jne	.L70
	.p2align 4,,10
	.p2align 3
.L51:
	movzx	eax, BYTE PTR 1[rcx]
	add	rcx, 1
	cmp	al, 32
	je	.L51
.L70:
	cmp	al, 9
	je	.L51
.L17:
	cmp	al, 124
	je	.L18
	jg	.L19
	cmp	al, 38
	je	.L20
	cmp	al, 58
	jne	.L67
.L18:
	test	r15d, r15d
	jne	.L67
	cmp	r12, rbp
	je	.L73
	mov	r15d, r14d
	and	r15d, edx
	jne	.L67
	mov	eax, DWORD PTR 8[rsp]
	or	eax, DWORD PTR 40[rsp]
	test	edx, edx
	jne	.L24
	test	eax, eax
	jne	.L36
	test	r14d, r14d
	je	.L37
	mov	rsi, rbp
	mov	rdi, r12
	mov	QWORD PTR 8[rsp], rcx
	call	input_suffix_matches@PLT
	mov	DWORD PTR 16[rsp], 0
	mov	rcx, QWORD PTR 8[rsp]
.L26:
	cmp	eax, r13d
	cmove	rbp, QWORD PTR 32[rsp]
	cmove	r12, QWORD PTR 24[rsp]
	setne	al
	movzx	eax, al
	mov	QWORD PTR 32[rsp], rbp
	mov	QWORD PTR 24[rsp], r12
	mov	DWORD PTR 8[rsp], eax
.L23:
	movzx	eax, BYTE PTR [rcx]
	lea	r14, 1[rcx]
	cmp	al, 58
	je	.L74
.L27:
	cmp	al, 125
	je	.L1
.L28:
	test	r15d, r15d
	jne	.L29
	mov	DWORD PTR 44[rsp], 1
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L12:
	bt	rbx, rdx
	jnc	.L75
.L11:
	add	rbp, 1
	jmp	.L10
.L19:
	cmp	al, 125
	jne	.L67
.L20:
	mov	eax, DWORD PTR 44[rsp]
	or	eax, DWORD PTR 20[rsp]
	or	r13d, eax
	mov	eax, r13d
	or	al, r14b
	jne	.L67
	cmp	r12, rbp
	je	.L67
	mov	rsi, rbp
	mov	rdi, r12
	mov	QWORD PTR 56[rsp], rcx
	mov	r15d, 1
	call	mark_matching_switches@PLT
	mov	rcx, QWORD PTR 56[rsp]
	cmp	BYTE PTR [rcx], 125
	lea	r14, 1[rcx]
	jne	.L2
	xor	eax, eax
	call	process_marked_switches@PLT
	mov	rcx, QWORD PTR 56[rsp]
	cmp	BYTE PTR [rcx], 125
	jne	.L2
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L72:
	movzx	eax, BYTE PTR 1[r14]
	add	r12, 1
	cmp	al, 9
	je	.L50
	cmp	al, 32
	jne	.L31
	.p2align 4,,10
	.p2align 3
.L50:
	movzx	eax, BYTE PTR 1[r12]
	add	r12, 1
	cmp	al, 32
	je	.L50
	cmp	al, 9
	je	.L50
.L31:
	mov	r13d, 1
	jmp	.L6
.L67:
	mov	r13, rcx
.L3:
	movsx	edx, BYTE PTR 0[r13]
	mov	rsi, QWORD PTR 48[rsp]
	lea	rdi, .LC0[rip]
	call	fatal@PLT
.L1:
	add	rsp, 72
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r14
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	movzx	eax, BYTE PTR 1[rbp]
	lea	rcx, 1[rbp]
	mov	edx, 1
	jmp	.L14
.L75:
	mov	rcx, rbp
	xor	edx, edx
	jmp	.L17
.L24:
	test	eax, eax
	jne	.L23
.L25:
	mov	rsi, rbp
	mov	rdi, r12
	mov	QWORD PTR 8[rsp], rcx
	call	switch_matches@PLT
	mov	rcx, QWORD PTR 8[rsp]
	jmp	.L26
.L73:
	mov	esi, DWORD PTR 20[rsp]
	xor	esi, 1
	or	esi, DWORD PTR 8[rsp]
	and	esi, 1
	jne	.L67
	cmp	al, 124
	je	.L67
	or	r13d, r14d
	or	r13d, edx
	mov	DWORD PTR 16[rsp], r13d
	jne	.L67
	mov	eax, DWORD PTR 40[rsp]
	mov	r15d, 1
	lea	r14, 1[rcx]
	xor	eax, 1
	mov	DWORD PTR 8[rsp], eax
	movzx	eax, BYTE PTR [rcx]
	cmp	al, 58
	jne	.L27
.L74:
	mov	r8d, DWORD PTR 40[rsp]
	mov	ecx, DWORD PTR 16[rsp]
	mov	rdi, r14
	mov	rdx, QWORD PTR 32[rsp]
	mov	rsi, QWORD PTR 24[rsp]
	xor	r8d, 1
	and	r8d, DWORD PTR 8[rsp]
	call	process_brace_body@PLT
	mov	r14, rax
	test	rax, rax
	je	.L1
	movzx	eax, BYTE PTR [rax]
	add	r14, 1
	cmp	al, 59
	jne	.L27
	mov	esi, DWORD PTR 8[rsp]
	or	DWORD PTR 40[rsp], esi
	mov	DWORD PTR 8[rsp], 0
	mov	DWORD PTR 20[rsp], 1
	mov	DWORD PTR 16[rsp], 1
	mov	QWORD PTR 32[rsp], 0
	mov	QWORD PTR 24[rsp], 0
	jmp	.L28
.L36:
	xor	r15d, r15d
	mov	DWORD PTR 16[rsp], r15d
	jmp	.L23
.L29:
	mov	r13, r14
	jmp	.L3
.L37:
	mov	DWORD PTR 16[rsp], 0
	jmp	.L25
	.cfi_endproc
.LFE0:
	.size	handle_braces, .-handle_braces
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gcc.c_handle_braces.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"braced spec '%s' is invalid at '%c'\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	handle_braces, %function
handle_braces:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r7, #0
	mov	r3, #1
	mov	r9, r0
	mov	r8, r7
	mov	fp, r7
	sub	sp, sp, #36
	str	r0, [sp, #28]
	str	r7, [sp, #16]
	str	r7, [sp, #8]
	str	r7, [sp, #24]
	str	r7, [sp, #20]
	str	r3, [sp, #12]
.L2:
	ldrb	r3, [r9]	@ zero_extendqisi2
	cmp	r3, #9
	cmpne	r3, #32
	moveq	r6, #1
	movne	r6, #0
	addeq	r9, r9, #1
	beq	.L2
	cmp	r3, #33
	movne	r5, r9
	movne	r9, r6
	beq	.L63
.L6:
	cmp	r3, #46
	moveq	r3, #1
	movne	r3, #0
	addeq	r5, r5, #1
	mov	r4, r3
	mov	r10, r5
.L9:
	mov	r6, r10
	ldrb	r0, [r10], #1	@ zero_extendqisi2
	bl	ISIDNUM
	cmp	r0, #0
	bne	.L9
	ldrb	r3, [r10, #-1]	@ zero_extendqisi2
	cmp	r3, #64
	cmpne	r3, #61
	moveq	r2, #1
	movne	r2, #0
	sub	r1, r3, #43
	cmp	r1, #3
	orrls	r2, r2, #1
	cmp	r2, #0
	bne	.L9
	cmp	r3, #42
	movne	r10, r6
	moveq	r0, #1
	ldrbeq	r3, [r6, #1]	@ zero_extendqisi2
.L11:
	cmp	r3, #9
	cmpne	r3, #32
	bne	.L13
.L12:
	ldrb	r3, [r10, #1]!	@ zero_extendqisi2
	cmp	r3, #9
	cmpne	r3, #32
	beq	.L12
.L13:
	cmp	r3, #124
	beq	.L14
	bhi	.L15
	cmp	r3, #38
	beq	.L16
	cmp	r3, #58
	bne	.L3
.L14:
	ldr	r2, [sp, #8]
	cmp	r2, #0
	bne	.L3
	cmp	r5, r6
	beq	.L64
	mov	r2, r4
	ands	r4, r4, r0
	bne	.L3
	cmp	r0, #0
	orr	r3, r8, r7
	bne	.L20
	cmp	r3, #0
	bne	.L32
	cmp	r2, #0
	beq	.L33
	mov	r1, r6
	mov	r0, r5
	bl	input_suffix_matches
	mov	r3, r0
	str	r4, [sp, #12]
.L22:
	cmp	r3, r9
	ldr	r3, [sp, #24]
	movne	r3, r6
	str	r3, [sp, #24]
	ldr	r3, [sp, #20]
	movne	r3, r5
	movne	r8, #1
	moveq	r8, #0
	str	r3, [sp, #20]
.L19:
	mov	r9, r10
	ldrb	r3, [r9], #1	@ zero_extendqisi2
	cmp	r3, #58
	beq	.L65
.L23:
	cmp	r3, #125
	beq	.L1
.L24:
	cmp	r4, #0
	bne	.L25
	mov	fp, #1
	str	r4, [sp, #8]
	b	.L2
.L15:
	cmp	r3, #125
	bne	.L3
.L16:
	ldr	r3, [sp, #16]
	orr	r3, fp, r3
	orr	r3, r3, r9
	orr	r3, r3, r4
	cmp	r5, r6
	orreq	r3, r3, #1
	cmp	r3, #0
	bne	.L3
	mov	r9, r10
	mov	r2, r0
	mov	r1, r6
	mov	r0, r5
	bl	mark_matching_switches
	ldrb	r3, [r9], #1	@ zero_extendqisi2
	cmp	r3, #125
	beq	.L66
.L31:
	mov	r3, #1
	str	r3, [sp, #8]
	b	.L2
.L63:
	ldrb	r3, [r9, #1]	@ zero_extendqisi2
	add	r5, r9, #1
	cmp	r3, #32
	cmpne	r3, #9
	bne	.L27
.L7:
	ldrb	r3, [r5, #1]!	@ zero_extendqisi2
	cmp	r3, #9
	cmpne	r3, #32
	beq	.L7
.L27:
	mov	r9, #1
	b	.L6
.L25:
	mov	r10, r9
.L3:
	ldrb	r2, [r10]	@ zero_extendqisi2
	ldr	r1, [sp, #28]
	ldr	r0, .L67
	add	sp, sp, #36
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	fatal
.L20:
	cmp	r3, #0
	bne	.L19
.L21:
	mov	r2, r0
	mov	r1, r6
	mov	r0, r5
	bl	switch_matches
	mov	r3, r0
	b	.L22
.L64:
	ldr	r2, [sp, #16]
	eor	r2, r2, #1
	orr	r8, r2, r8
	cmp	r3, #124
	movne	r3, r8
	orreq	r3, r8, #1
	tst	r3, #1
	bne	.L3
	orr	r6, r4, r9
	orrs	r3, r6, r0
	str	r3, [sp, #12]
	bne	.L3
	mov	r9, r10
	ldrb	r3, [r9], #1	@ zero_extendqisi2
	mov	r4, #1
	cmp	r3, #58
	eor	r8, r7, #1
	bne	.L23
.L65:
	eor	r3, r7, #1
	and	r3, r3, r8
	mov	r0, r9
	str	r3, [sp]
	ldr	r2, [sp, #24]
	ldr	r3, [sp, #12]
	ldr	r1, [sp, #20]
	bl	process_brace_body
	subs	r9, r0, #0
	beq	.L1
	ldrb	r3, [r9], #1	@ zero_extendqisi2
	cmp	r3, #59
	bne	.L23
	mov	r3, #1
	orr	r7, r7, r8
	mov	r8, #0
	str	r3, [sp, #16]
	str	r3, [sp, #12]
	str	r8, [sp, #24]
	str	r8, [sp, #20]
	b	.L24
.L32:
	ldr	r3, [sp, #8]
	mov	r4, r3
	str	r3, [sp, #12]
	b	.L19
.L66:
	bl	process_marked_switches
	ldrb	r3, [r10]	@ zero_extendqisi2
	cmp	r3, #125
	bne	.L31
.L1:
	mov	r0, r9
	add	sp, sp, #36
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L33:
	str	r0, [sp, #12]
	b	.L21
.L68:
	.align	2
.L67:
	.word	.LC0
	.size	handle_braces, .-handle_braces
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
