	.file	"extr_si.c_si_mc_program.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Wait for MC idle timedout !\n"
	.text
	.p2align 4
	.type	si_mc_program, @function
si_mc_program:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	ebx, 11284
	sub	rsp, 16
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	.p2align 4,,10
	.p2align 3
.L2:
	mov	edi, ebx
	xor	esi, esi
	call	WREG32@PLT
	lea	edi, 4[rbx]
	xor	esi, esi
	call	WREG32@PLT
	lea	edi, 8[rbx]
	xor	esi, esi
	call	WREG32@PLT
	lea	edi, 12[rbx]
	xor	esi, esi
	call	WREG32@PLT
	lea	edi, 16[rbx]
	xor	esi, esi
	add	ebx, 24
	call	WREG32@PLT
	cmp	ebx, 12052
	jne	.L2
	mov	edi, DWORD PTR HDP_REG_COHERENCY_FLUSH_CNTL[rip]
	xor	esi, esi
	lea	r12, 4[rsp]
	call	WREG32@PLT
	mov	rdi, rbp
	mov	rsi, r12
	call	evergreen_mc_stop@PLT
	mov	rdi, rbp
	call	radeon_mc_wait_for_idle@PLT
	test	rax, rax
	jne	.L17
	mov	rdi, rbp
	call	ASIC_IS_NODCE@PLT
	test	eax, eax
	je	.L18
.L4:
	mov	esi, DWORD PTR 4[rbp]
	mov	edi, DWORD PTR MC_VM_SYSTEM_APERTURE_LOW_ADDR[rip]
	sar	esi, 12
	call	WREG32@PLT
	mov	esi, DWORD PTR 8[rbp]
	mov	edi, DWORD PTR MC_VM_SYSTEM_APERTURE_HIGH_ADDR[rip]
	sar	esi, 12
	call	WREG32@PLT
	mov	esi, DWORD PTR 12[rbp]
	mov	edi, DWORD PTR MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR[rip]
	sar	esi, 12
	call	WREG32@PLT
	movsx	esi, BYTE PTR 11[rbp]
	movsx	eax, BYTE PTR 7[rbp]
	mov	edi, DWORD PTR MC_VM_FB_LOCATION[rip]
	mov	edx, esi
	movzx	esi, ax
	sal	edx, 16
	or	esi, edx
	call	WREG32@PLT
	mov	esi, DWORD PTR 4[rbp]
	mov	edi, DWORD PTR HDP_NONSURFACE_BASE[rip]
	sar	esi, 8
	call	WREG32@PLT
	mov	edi, DWORD PTR HDP_NONSURFACE_INFO[rip]
	mov	esi, 1073742080
	call	WREG32@PLT
	mov	edi, DWORD PTR HDP_NONSURFACE_SIZE[rip]
	mov	esi, 1073741823
	call	WREG32@PLT
	mov	edi, DWORD PTR MC_VM_AGP_BASE[rip]
	xor	esi, esi
	call	WREG32@PLT
	mov	edi, DWORD PTR MC_VM_AGP_TOP[rip]
	mov	esi, 268435455
	call	WREG32@PLT
	mov	edi, DWORD PTR MC_VM_AGP_BOT[rip]
	mov	esi, 268435455
	call	WREG32@PLT
	mov	rdi, rbp
	call	radeon_mc_wait_for_idle@PLT
	test	rax, rax
	jne	.L19
.L5:
	mov	rdi, rbp
	mov	rsi, r12
	call	evergreen_mc_resume@PLT
	mov	rdi, rbp
	call	ASIC_IS_NODCE@PLT
	test	eax, eax
	je	.L20
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L21
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
.L17:
	.cfi_restore_state
	mov	edi, DWORD PTR 0[rbp]
	lea	rsi, .LC0[rip]
	call	dev_warn@PLT
	mov	rdi, rbp
	call	ASIC_IS_NODCE@PLT
	test	eax, eax
	jne	.L4
.L18:
	mov	esi, DWORD PTR VGA_MEMORY_DISABLE[rip]
	mov	edi, DWORD PTR VGA_HDP_CONTROL[rip]
	call	WREG32@PLT
	jmp	.L4
.L20:
	mov	rdi, rbp
	call	rv515_vga_render_disable@PLT
	jmp	.L1
.L19:
	mov	edi, DWORD PTR 0[rbp]
	lea	rsi, .LC0[rip]
	call	dev_warn@PLT
	jmp	.L5
.L21:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	si_mc_program, .-si_mc_program
	.comm	VGA_MEMORY_DISABLE,4,4
	.comm	VGA_HDP_CONTROL,4,4
	.comm	MC_VM_SYSTEM_APERTURE_LOW_ADDR,4,4
	.comm	MC_VM_SYSTEM_APERTURE_HIGH_ADDR,4,4
	.comm	MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,4,4
	.comm	MC_VM_FB_LOCATION,4,4
	.comm	MC_VM_AGP_TOP,4,4
	.comm	MC_VM_AGP_BOT,4,4
	.comm	MC_VM_AGP_BASE,4,4
	.comm	HDP_REG_COHERENCY_FLUSH_CNTL,4,4
	.comm	HDP_NONSURFACE_SIZE,4,4
	.comm	HDP_NONSURFACE_INFO,4,4
	.comm	HDP_NONSURFACE_BASE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_si.c_si_mc_program.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Wait for MC idle timedout !\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	si_mc_program, %function
si_mc_program:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r3, .L22
	sub	sp, sp, #8
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	mov	r6, r0
	ldr	r4, .L22+4
	ldr	r5, .L22+8
.L2:
	mov	r1, #0
	mov	r0, r4
	bl	WREG32
	mov	r1, #0
	add	r0, r4, #4
	bl	WREG32
	mov	r1, #0
	add	r0, r4, #8
	bl	WREG32
	mov	r1, #0
	add	r0, r4, #12
	bl	WREG32
	add	r0, r4, #16
	mov	r1, #0
	add	r4, r4, #24
	bl	WREG32
	cmp	r4, r5
	bne	.L2
	ldr	r3, .L22+12
	mov	r1, #0
	ldr	r0, [r3]
	bl	WREG32
	mov	r1, sp
	mov	r0, r6
	bl	evergreen_mc_stop
	mov	r0, r6
	bl	radeon_mc_wait_for_idle
	cmp	r0, #0
	bne	.L17
	mov	r0, r6
	bl	ASIC_IS_NODCE
	cmp	r0, #0
	beq	.L18
.L4:
	ldr	r3, .L22+16
	ldr	r1, [r6, #4]
	ldr	r0, [r3]
	asr	r1, r1, #12
	bl	WREG32
	ldr	r3, .L22+20
	ldr	r1, [r6, #8]
	ldr	r0, [r3]
	asr	r1, r1, #12
	bl	WREG32
	ldr	r3, .L22+24
	ldr	r1, [r6, #12]
	ldr	r0, [r3]
	asr	r1, r1, #12
	bl	WREG32
	ldrsb	r3, [r6, #7]
	ldr	r2, .L22+28
	ldrsb	r1, [r6, #11]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r0, [r2]
	orr	r1, r3, r1, lsl #16
	bl	WREG32
	ldr	r3, .L22+32
	ldr	r1, [r6, #4]
	ldr	r0, [r3]
	asr	r1, r1, #8
	bl	WREG32
	ldr	r3, .L22+36
	ldr	r1, .L22+40
	ldr	r0, [r3]
	bl	WREG32
	ldr	r3, .L22+44
	mvn	r1, #-1073741824
	ldr	r0, [r3]
	bl	WREG32
	ldr	r3, .L22+48
	mov	r1, #0
	ldr	r0, [r3]
	bl	WREG32
	ldr	r3, .L22+52
	mvn	r1, #-268435456
	ldr	r0, [r3]
	bl	WREG32
	ldr	r3, .L22+56
	mvn	r1, #-268435456
	ldr	r0, [r3]
	bl	WREG32
	mov	r0, r6
	bl	radeon_mc_wait_for_idle
	cmp	r0, #0
	bne	.L19
.L5:
	mov	r1, sp
	mov	r0, r6
	bl	evergreen_mc_resume
	mov	r0, r6
	bl	ASIC_IS_NODCE
	cmp	r0, #0
	beq	.L20
.L1:
	ldr	r3, .L22
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L21
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, pc}
.L17:
	ldr	r1, .L22+60
	ldr	r0, [r6]
	bl	dev_warn
	mov	r0, r6
	bl	ASIC_IS_NODCE
	cmp	r0, #0
	bne	.L4
.L18:
	ldr	r2, .L22+64
	ldr	r3, .L22+68
	ldr	r1, [r2]
	ldr	r0, [r3]
	bl	WREG32
	b	.L4
.L20:
	mov	r0, r6
	bl	rv515_vga_render_disable
	b	.L1
.L19:
	ldr	r1, .L22+60
	ldr	r0, [r6]
	bl	dev_warn
	b	.L5
.L21:
	bl	__stack_chk_fail
.L23:
	.align	2
.L22:
	.word	.LC1
	.word	11284
	.word	12052
	.word	HDP_REG_COHERENCY_FLUSH_CNTL
	.word	MC_VM_SYSTEM_APERTURE_LOW_ADDR
	.word	MC_VM_SYSTEM_APERTURE_HIGH_ADDR
	.word	MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR
	.word	MC_VM_FB_LOCATION
	.word	HDP_NONSURFACE_BASE
	.word	HDP_NONSURFACE_INFO
	.word	1073742080
	.word	HDP_NONSURFACE_SIZE
	.word	MC_VM_AGP_BASE
	.word	MC_VM_AGP_TOP
	.word	MC_VM_AGP_BOT
	.word	.LC0
	.word	VGA_MEMORY_DISABLE
	.word	VGA_HDP_CONTROL
	.size	si_mc_program, .-si_mc_program
	.comm	VGA_MEMORY_DISABLE,4,4
	.comm	VGA_HDP_CONTROL,4,4
	.comm	MC_VM_SYSTEM_APERTURE_LOW_ADDR,4,4
	.comm	MC_VM_SYSTEM_APERTURE_HIGH_ADDR,4,4
	.comm	MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,4,4
	.comm	MC_VM_FB_LOCATION,4,4
	.comm	MC_VM_AGP_TOP,4,4
	.comm	MC_VM_AGP_BOT,4,4
	.comm	MC_VM_AGP_BASE,4,4
	.comm	HDP_REG_COHERENCY_FLUSH_CNTL,4,4
	.comm	HDP_NONSURFACE_SIZE,4,4
	.comm	HDP_NONSURFACE_INFO,4,4
	.comm	HDP_NONSURFACE_BASE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
