	.file	"extr_atmel-isc-base.c_isc_start_dma.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	isc_start_dma, @function
isc_start_dma:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR 16[rdi]
	mov	r12, QWORD PTR 48[rdi]
	mov	ebx, DWORD PTR 32[rdi]
	mov	r14d, DWORD PTR 36[rdi]
	mov	r15d, DWORD PTR 40[rdi]
	mov	edi, DWORD PTR [rax]
	call	ISC_IS_FORMAT_RAW@PLT
	test	eax, eax
	jne	.L2
	add	r14d, r14d
	add	r15d, r15d
.L2:
	xor	edi, edi
	call	ISC_PFE_CFG1_COLMIN@PLT
	lea	edi, -1[r15]
	and	eax, DWORD PTR ISC_PFE_CFG1_COLMIN_MASK[rip]
	mov	r13d, eax
	call	ISC_PFE_CFG1_COLMAX@PLT
	and	eax, DWORD PTR ISC_PFE_CFG1_COLMAX_MASK[rip]
	mov	esi, DWORD PTR ISC_PFE_CFG1[rip]
	mov	rdi, r12
	mov	edx, eax
	or	edx, r13d
	call	regmap_write@PLT
	xor	edi, edi
	call	ISC_PFE_CFG2_ROWMIN@PLT
	lea	edi, -1[r14]
	and	eax, DWORD PTR ISC_PFE_CFG2_ROWMIN_MASK[rip]
	mov	r13d, eax
	call	ISC_PFE_CFG2_ROWMAX@PLT
	and	eax, DWORD PTR ISC_PFE_CFG2_ROWMAX_MASK[rip]
	mov	esi, DWORD PTR ISC_PFE_CFG2[rip]
	mov	rdi, r12
	mov	edx, eax
	or	edx, r13d
	call	regmap_write@PLT
	mov	edx, DWORD PTR ISC_PFE_CFG0_COLEN[rip]
	mov	esi, DWORD PTR ISC_PFE_CFG0[rip]
	mov	rdi, r12
	or	edx, DWORD PTR ISC_PFE_CFG0_ROWEN[rip]
	mov	ecx, edx
	call	regmap_update_bits@PLT
	mov	rdi, QWORD PTR 24[rbp]
	xor	esi, esi
	call	vb2_dma_contig_plane_dma_addr@PLT
	mov	esi, DWORD PTR ISC_DAD0[rip]
	mov	rdi, r12
	mov	edx, eax
	mov	r13d, eax
	call	regmap_write@PLT
	mov	eax, DWORD PTR 8[rbp]
	cmp	eax, 128
	je	.L3
	cmp	eax, 129
	jne	.L4
	lea	eax, [rbx+rbx]
	mov	esi, DWORD PTR ISC_DAD1[rip]
	mov	rdi, r12
	movsx	rdx, eax
	sar	eax, 31
	imul	rdx, rdx, 1431655766
	shr	rdx, 32
	sub	edx, eax
	add	edx, r13d
	call	regmap_write@PLT
	lea	eax, [rbx+rbx*4]
	mov	esi, DWORD PTR ISC_DAD2[rip]
	mov	rdi, r12
	movsx	rdx, eax
	sar	eax, 31
	imul	rdx, rdx, 715827883
	shr	rdx, 32
	sub	edx, eax
	add	edx, r13d
	call	regmap_write@PLT
.L4:
	mov	esi, DWORD PTR ISC_DCTRL[rip]
	mov	rdi, r12
	mov	edx, DWORD PTR ISC_DCTRL_IE_IS[rip]
	or	edx, DWORD PTR 12[rbp]
	call	regmap_write@PLT
	mov	rdi, rbp
	call	spin_lock@PLT
	mov	edx, DWORD PTR ISC_CTRL_CAPTURE[rip]
	mov	esi, DWORD PTR ISC_CTRLEN[rip]
	mov	rdi, r12
	call	regmap_write@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rdi, rbp
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	spin_unlock@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	edx, ebx
	mov	esi, DWORD PTR ISC_DAD1[rip]
	mov	rdi, r12
	shr	edx, 31
	add	edx, ebx
	sar	edx
	add	edx, r13d
	call	regmap_write@PLT
	lea	eax, [rbx+rbx*2]
	mov	esi, DWORD PTR ISC_DAD2[rip]
	mov	rdi, r12
	test	eax, eax
	lea	edx, 3[rax]
	cmovns	edx, eax
	sar	edx, 2
	add	edx, r13d
	call	regmap_write@PLT
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	isc_start_dma, .-isc_start_dma
	.comm	ISC_PFE_CFG2_ROWMIN_MASK,4,4
	.comm	ISC_PFE_CFG2_ROWMAX_MASK,4,4
	.comm	ISC_PFE_CFG2,4,4
	.comm	ISC_PFE_CFG1_COLMIN_MASK,4,4
	.comm	ISC_PFE_CFG1_COLMAX_MASK,4,4
	.comm	ISC_PFE_CFG1,4,4
	.comm	ISC_PFE_CFG0_ROWEN,4,4
	.comm	ISC_PFE_CFG0_COLEN,4,4
	.comm	ISC_PFE_CFG0,4,4
	.comm	ISC_DCTRL_IE_IS,4,4
	.comm	ISC_DCTRL,4,4
	.comm	ISC_DAD2,4,4
	.comm	ISC_DAD1,4,4
	.comm	ISC_DAD0,4,4
	.comm	ISC_CTRL_CAPTURE,4,4
	.comm	ISC_CTRLEN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_atmel-isc-base.c_isc_start_dma.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	isc_start_dma, %function
isc_start_dma:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r0
	ldr	r3, [r0, #12]
	ldr	r5, [r0, #32]
	add	r6, r4, #20
	ldr	r0, [r3]
	ldm	r6, {r6, r8, r9}
	bl	ISC_IS_FORMAT_RAW
	ldr	r3, .L7
	cmp	r0, #0
	mov	r0, #0
	lsleq	r9, r9, #1
	lsleq	r8, r8, #1
	ldr	r10, [r3]
	bl	ISC_PFE_CFG1_COLMIN
	mov	r7, r0
	ldr	r3, .L7+4
	sub	r0, r9, #1
	ldr	r2, [r3]
	and	r7, r7, r2
	bl	ISC_PFE_CFG1_COLMAX
	mov	r2, r0
	ldr	r3, .L7+8
	mov	r1, r10
	ldr	r3, [r3]
	mov	r0, r5
	and	r2, r2, r3
	orr	r2, r2, r7
	bl	regmap_write
	ldr	r3, .L7+12
	mov	r0, #0
	ldr	r9, [r3]
	bl	ISC_PFE_CFG2_ROWMIN
	mov	r7, r0
	ldr	r3, .L7+16
	sub	r0, r8, #1
	ldr	r2, [r3]
	and	r7, r7, r2
	bl	ISC_PFE_CFG2_ROWMAX
	mov	r2, r0
	ldr	r3, .L7+20
	mov	r1, r9
	ldr	r3, [r3]
	mov	r0, r5
	and	r2, r2, r3
	orr	r2, r2, r7
	bl	regmap_write
	ldr	r3, .L7+24
	ldr	r2, .L7+28
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L7+32
	orr	r3, r3, r2
	mov	r2, r3
	ldr	r1, [r1]
	mov	r0, r5
	bl	regmap_update_bits
	mov	r1, #0
	ldr	r0, [r4, #16]
	bl	vb2_dma_contig_plane_dma_addr
	ldr	r3, .L7+36
	mov	r2, r0
	ldr	r1, [r3]
	mov	r7, r0
	mov	r0, r5
	bl	regmap_write
	ldr	r3, [r4, #4]
	cmp	r3, #128
	beq	.L3
	cmp	r3, #129
	bne	.L4
	ldr	r2, .L7+40
	lsl	r3, r6, #1
	smull	r1, r2, r3, r2
	ldr	r1, .L7+44
	sub	r2, r2, r3, asr #31
	ldr	r1, [r1]
	add	r2, r2, r7
	mov	r0, r5
	bl	regmap_write
	ldr	r2, .L7+48
	add	r6, r6, r6, lsl #2
	smull	r3, r2, r6, r2
	ldr	r3, .L7+52
	sub	r2, r2, r6, asr #31
	mov	r0, r5
	ldr	r1, [r3]
	add	r2, r2, r7
	bl	regmap_write
.L4:
	ldr	r3, .L7+56
	ldr	r2, [r4, #8]
	ldr	r1, [r3]
	ldr	r3, .L7+60
	orr	r2, r1, r2
	mov	r0, r5
	ldr	r1, [r3]
	bl	regmap_write
	mov	r0, r4
	bl	spin_lock
	ldr	r3, .L7+64
	ldr	r2, .L7+68
	mov	r0, r5
	ldr	r2, [r2]
	ldr	r1, [r3]
	bl	regmap_write
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	spin_unlock
.L3:
	ldr	r3, .L7+44
	add	r2, r6, r6, lsr #31
	ldr	r1, [r3]
	add	r6, r6, r6, lsl #1
	add	r2, r7, r2, asr #1
	mov	r0, r5
	bl	regmap_write
	add	r2, r6, #3
	cmp	r6, #0
	movlt	r6, r2
	ldr	r3, .L7+52
	mov	r0, r5
	ldr	r1, [r3]
	add	r2, r7, r6, asr #2
	bl	regmap_write
	b	.L4
.L8:
	.align	2
.L7:
	.word	ISC_PFE_CFG1
	.word	ISC_PFE_CFG1_COLMIN_MASK
	.word	ISC_PFE_CFG1_COLMAX_MASK
	.word	ISC_PFE_CFG2
	.word	ISC_PFE_CFG2_ROWMIN_MASK
	.word	ISC_PFE_CFG2_ROWMAX_MASK
	.word	ISC_PFE_CFG0_COLEN
	.word	ISC_PFE_CFG0_ROWEN
	.word	ISC_PFE_CFG0
	.word	ISC_DAD0
	.word	1431655766
	.word	ISC_DAD1
	.word	715827883
	.word	ISC_DAD2
	.word	ISC_DCTRL_IE_IS
	.word	ISC_DCTRL
	.word	ISC_CTRLEN
	.word	ISC_CTRL_CAPTURE
	.size	isc_start_dma, .-isc_start_dma
	.comm	ISC_PFE_CFG2_ROWMIN_MASK,4,4
	.comm	ISC_PFE_CFG2_ROWMAX_MASK,4,4
	.comm	ISC_PFE_CFG2,4,4
	.comm	ISC_PFE_CFG1_COLMIN_MASK,4,4
	.comm	ISC_PFE_CFG1_COLMAX_MASK,4,4
	.comm	ISC_PFE_CFG1,4,4
	.comm	ISC_PFE_CFG0_ROWEN,4,4
	.comm	ISC_PFE_CFG0_COLEN,4,4
	.comm	ISC_PFE_CFG0,4,4
	.comm	ISC_DCTRL_IE_IS,4,4
	.comm	ISC_DCTRL,4,4
	.comm	ISC_DAD2,4,4
	.comm	ISC_DAD1,4,4
	.comm	ISC_DAD0,4,4
	.comm	ISC_CTRL_CAPTURE,4,4
	.comm	ISC_CTRLEN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
