	.file	"extr_syscons.c_sc_switch_scr.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"switch delayed\n"
.LC1:
	.string	"reset WAIT_REL, "
.LC2:
	.string	"finishing previous switch\n"
.LC3:
	.string	"reset WAIT_ACQ, "
.LC4:
	.string	"waiting nothing, "
.LC5:
	.string	"sending relsig again, "
.LC6:
	.string	"force reset WAIT_REL, "
.LC7:
	.string	"act as if VT_FALSE was seen\n"
.LC8:
	.string	"sending acqsig again, "
.LC9:
	.string	"force reset WAIT_ACQ, "
.LC10:
	.string	"error 1\n"
.LC11:
	.string	"error, graphics mode\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC12:
	.string	"error 2, requested vty isn't open!\n"
	.align 8
.LC13:
	.string	"error 3, requested vty is in the VT_PROCESS mode\n"
	.section	.rodata.str1.1
.LC14:
	.string	"switch done (new == old)\n"
.LC15:
	.string	"switch done\n"
	.text
	.p2align 4
	.globl	sc_switch_scr
	.type	sc_switch_scr, @function
sc_switch_scr:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	mov	edi, 5
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	lea	rbx, 1[rsi]
	mov	rsi, rbx
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	DPRINTF@PLT
	mov	rdi, QWORD PTR 40[rbp]
	test	rdi, rdi
	je	.L33
	mov	eax, DWORD PTR 0[rbp]
	mov	r12d, eax
	and	r12d, DWORD PTR SC_SCRN_VTYLOCK[rip]
	jne	.L59
	test	DWORD PTR SC_SCRN_BLANKED[rip], eax
	jne	.L4
	cmp	QWORD PTR 80[rbp], 0
	jne	.L4
	cmp	QWORD PTR 72[rbp], 0
	je	.L5
.L4:
	mov	QWORD PTR 64[rbp], rbx
	xor	eax, eax
	call	sc_touch_scrn_saver@PLT
	lea	rsi, .LC0[rip]
	mov	edi, 5
	call	DPRINTF@PLT
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L60
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	QWORD PTR 64[rbp], 0
	xor	eax, eax
	call	spltty@PLT
	cmp	QWORD PTR 32[rbp], 0
	mov	r12, QWORD PTR 40[rbp]
	mov	DWORD PTR 4[rsp], eax
	je	.L7
	mov	rax, QWORD PTR VT_PROCESS[rip]
	cmp	QWORD PTR 16[r12], rax
	je	.L61
.L7:
	mov	rax, QWORD PTR 8[rbp]
	cmp	rax, r13
	jg	.L20
	add	rax, QWORD PTR 16[rbp]
	cmp	rax, r13
	jle	.L20
	cmp	QWORD PTR 32[rbp], 0
	je	.L21
.L20:
	mov	edi, DWORD PTR 4[rsp]
	call	splx@PLT
	mov	edx, DWORD PTR BELL_DURATION[rip]
	mov	esi, DWORD PTR bios_value[rip]
	mov	rdi, r12
	call	sc_bell@PLT
	lea	rsi, .LC10[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	r12d, DWORD PTR EINVAL[rip]
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L33:
	xor	r12d, r12d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L59:
	mov	edx, DWORD PTR 40[rdi]
	mov	esi, DWORD PTR 44[rdi]
	call	sc_bell@PLT
	mov	r12d, DWORD PTR EPERM[rip]
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L21:
	mov	rsi, QWORD PTR 8[r12]
	mov	rdi, rbp
	call	SC_DEV@PLT
	mov	rdi, rax
	cmp	QWORD PTR 8[r12], r13
	je	.L22
	call	tty_opened_ns@PLT
	test	rax, rax
	je	.L22
	mov	rax, QWORD PTR VT_AUTO[rip]
	cmp	QWORD PTR 16[r12], rax
	je	.L62
	.p2align 4,,10
	.p2align 3
.L22:
	mov	rax, QWORD PTR sc_console[rip]
	test	rax, rax
	je	.L23
	cmp	QWORD PTR [rax], r13
	je	.L24
.L23:
	mov	rdi, rbp
	mov	rsi, r13
	call	SC_DEV@PLT
	mov	rdi, rax
	mov	r14, rax
	call	tty_opened_ns@PLT
	test	rax, rax
	je	.L63
	cmp	QWORD PTR kdb_active[rip], 0
	jne	.L64
.L24:
	add	QWORD PTR 32[rbp], 1
	mov	rsi, r13
	mov	rdi, rbp
	mov	QWORD PTR 48[rbp], r12
	call	SC_DEV@PLT
	mov	rdi, rax
	call	sc_get_stat@PLT
	mov	rdi, QWORD PTR 48[rbp]
	mov	QWORD PTR 56[rbp], rax
	cmp	rax, rdi
	je	.L65
	call	vt_proc_alive@PLT
	mov	rdi, QWORD PTR 56[rbp]
	call	vt_proc_alive@PLT
	mov	rdi, QWORD PTR 48[rbp]
	call	signal_vt_rel@PLT
	mov	edi, DWORD PTR 4[rsp]
	test	rax, rax
	jne	.L57
	call	splx@PLT
	mov	rdi, rbp
	call	exchange_scr@PLT
	xor	eax, eax
	call	spltty@PLT
	cmp	QWORD PTR kdb_active[rip], 0
	mov	DWORD PTR 4[rsp], eax
	je	.L66
.L29:
	mov	rdi, QWORD PTR 40[rbp]
	call	signal_vt_acq@PLT
	test	rax, rax
	jne	.L67
	mov	QWORD PTR 32[rbp], 0
	mov	rax, QWORD PTR sc_console_unit[rip]
	cmp	QWORD PTR 24[rbp], rax
	je	.L68
.L31:
	mov	edi, DWORD PTR 4[rsp]
	xor	r12d, r12d
	call	splx@PLT
	lea	rsi, .LC15[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L61:
	cmp	QWORD PTR 32[r12], 0
	je	.L7
	mov	edi, DWORD PTR 24[r12]
	call	pfind@PLT
	mov	rdi, rax
	cmp	QWORD PTR 32[r12], rax
	je	.L9
	test	rax, rax
	je	.L10
	call	PROC_UNLOCK@PLT
.L10:
	movsx	rsi, DWORD PTR 24[r12]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	eax, DWORD PTR [r12]
	test	DWORD PTR SWITCH_WAIT_REL[rip], eax
	jne	.L69
	test	DWORD PTR SWITCH_WAIT_ACQ[rip], eax
	je	.L12
	lea	rsi, .LC3[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	rdi, r12
	call	finish_vt_acq@PLT
	jmp	.L7
.L67:
	mov	edi, DWORD PTR 4[rsp]
.L57:
	call	splx@PLT
	xor	r12d, r12d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L65:
	cmp	QWORD PTR kdb_active[rip], 0
	mov	QWORD PTR 32[rbp], 0
	je	.L70
.L27:
	mov	edi, DWORD PTR 4[rsp]
	xor	r12d, r12d
	call	splx@PLT
	lea	rsi, .LC14[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	jmp	.L1
.L64:
	mov	rdi, r14
	call	SC_STAT@PLT
	mov	rcx, QWORD PTR VT_PROCESS[rip]
	cmp	QWORD PTR [rax], rcx
	jne	.L24
	mov	edi, DWORD PTR 4[rsp]
	call	splx@PLT
	lea	rsi, .LC13[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	r12d, DWORD PTR EINVAL[rip]
	jmp	.L1
.L63:
	mov	edi, DWORD PTR 4[rsp]
	call	splx@PLT
	mov	edx, DWORD PTR BELL_DURATION[rip]
	mov	esi, DWORD PTR bios_value[rip]
	mov	rdi, r12
	call	sc_bell@PLT
	lea	rsi, .LC12[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	r12d, DWORD PTR EINVAL[rip]
	jmp	.L1
.L66:
	mov	rdi, rbp
	mov	rsi, r13
	call	VTY_WCHAN@PLT
	mov	edi, eax
	call	wakeup@PLT
	jmp	.L29
.L9:
	test	rax, rax
	je	.L13
	call	PROC_UNLOCK@PLT
.L13:
	mov	eax, DWORD PTR [r12]
	test	DWORD PTR SWITCH_WAIT_REL[rip], eax
	je	.L14
	mov	rax, QWORD PTR 32[rbp]
	lea	rdx, 1[rax]
	mov	QWORD PTR 32[rbp], rdx
	cmp	rax, 2
	je	.L15
	and	rax, -3
	cmp	rax, 1
	je	.L7
	lea	rsi, .LC6[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	esi, DWORD PTR FALSE[rip]
	lea	rdx, 4[rsp]
	mov	rdi, r12
	call	finish_vt_rel@PLT
	mov	edi, DWORD PTR 4[rsp]
	call	splx@PLT
	lea	rsi, .LC7[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	r12d, DWORD PTR EINVAL[rip]
	jmp	.L1
.L12:
	lea	rsi, .LC4[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	jmp	.L7
.L70:
	mov	rdi, rbp
	mov	rsi, r13
	call	VTY_WCHAN@PLT
	mov	edi, eax
	call	wakeup@PLT
	jmp	.L27
.L68:
	mov	esi, DWORD PTR TRUE[rip]
	mov	edi, DWORD PTR sc_consptr[rip]
	call	cnavailable@PLT
	jmp	.L31
.L14:
	test	DWORD PTR SWITCH_WAIT_ACQ[rip], eax
	je	.L7
	mov	rax, QWORD PTR 32[rbp]
	lea	rdx, 1[rax]
	mov	QWORD PTR 32[rbp], rdx
	cmp	rax, 2
	je	.L17
	and	rax, -3
	cmp	rax, 1
	je	.L7
	lea	rsi, .LC9[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	rdi, r12
	call	finish_vt_acq@PLT
	jmp	.L7
.L69:
	lea	rsi, .LC1[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	esi, DWORD PTR TRUE[rip]
	lea	rdx, 4[rsp]
	mov	rdi, r12
	call	finish_vt_rel@PLT
	mov	edi, DWORD PTR 4[rsp]
	call	splx@PLT
	lea	rsi, .LC2[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	r12d, DWORD PTR EINVAL[rip]
	jmp	.L1
.L62:
	mov	rdi, r12
	call	ISGRAPHSC@PLT
	test	rax, rax
	je	.L22
	mov	edi, DWORD PTR 4[rsp]
	call	splx@PLT
	mov	edx, DWORD PTR BELL_DURATION[rip]
	mov	esi, DWORD PTR bios_value[rip]
	mov	rdi, r12
	call	sc_bell@PLT
	lea	rsi, .LC11[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	r12d, DWORD PTR EINVAL[rip]
	jmp	.L1
.L15:
	lea	rsi, .LC5[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	rdi, r12
	call	signal_vt_rel@PLT
	jmp	.L7
.L17:
	lea	rsi, .LC8[rip]
	mov	edi, 5
	call	DPRINTF@PLT
	mov	rdi, r12
	call	signal_vt_acq@PLT
	jmp	.L7
.L60:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	sc_switch_scr, .-sc_switch_scr
	.comm	sc_consptr,4,4
	.comm	sc_console_unit,8,8
	.comm	sc_console,8,8
	.comm	kdb_active,8,8
	.comm	bios_value,4,4
	.comm	VT_PROCESS,8,8
	.comm	VT_AUTO,8,8
	.comm	TRUE,4,4
	.comm	SWITCH_WAIT_REL,4,4
	.comm	SWITCH_WAIT_ACQ,4,4
	.comm	SC_SCRN_VTYLOCK,4,4
	.comm	SC_SCRN_BLANKED,4,4
	.comm	FALSE,4,4
	.comm	EPERM,4,4
	.comm	EINVAL,4,4
	.comm	BELL_DURATION,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_syscons.c_sc_switch_scr.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"switch delayed\012\000"
	.align	2
.LC1:
	.ascii	"reset WAIT_REL, \000"
	.align	2
.LC2:
	.ascii	"finishing previous switch\012\000"
	.align	2
.LC3:
	.ascii	"reset WAIT_ACQ, \000"
	.align	2
.LC4:
	.ascii	"waiting nothing, \000"
	.align	2
.LC5:
	.ascii	"sending relsig again, \000"
	.align	2
.LC6:
	.ascii	"force reset WAIT_REL, \000"
	.align	2
.LC7:
	.ascii	"act as if VT_FALSE was seen\012\000"
	.align	2
.LC8:
	.ascii	"sending acqsig again, \000"
	.align	2
.LC9:
	.ascii	"force reset WAIT_ACQ, \000"
	.align	2
.LC10:
	.ascii	"error 1\012\000"
	.align	2
.LC11:
	.ascii	"error, graphics mode\012\000"
	.align	2
.LC12:
	.ascii	"error 2, requested vty isn't open!\012\000"
	.align	2
.LC13:
	.ascii	"error 3, requested vty is in the VT_PROCESS mode\012"
	.ascii	"\000"
	.align	2
.LC14:
	.ascii	"switch done (new == old)\012\000"
	.align	2
.LC15:
	.ascii	"switch done\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC16:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	sc_switch_scr
	.syntax unified
	.arm
	.fpu softvfp
	.type	sc_switch_scr, %function
sc_switch_scr:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r0
	ldr	r3, .L77
	add	r6, r1, #1
	sub	sp, sp, #8
	mov	r7, r1
	mov	r0, #5
	mov	r1, r6
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	DPRINTF
	ldr	r0, [r4, #20]
	cmp	r0, #0
	moveq	r5, r0
	beq	.L1
	ldr	r2, .L77+4
	ldr	r3, [r4]
	ldr	r5, [r2]
	ands	r5, r3, r5
	bne	.L64
	ldr	r2, .L77+8
	ldr	r2, [r2]
	tst	r3, r2
	bne	.L4
	ldr	r3, [r4, #40]
	cmp	r3, #0
	bne	.L4
	ldr	r3, [r4, #36]
	cmp	r3, #0
	beq	.L5
.L4:
	str	r6, [r4, #32]
	bl	sc_touch_scrn_saver
	mov	r0, #5
	ldr	r1, .L77+12
	bl	DPRINTF
.L1:
	ldr	r3, .L77
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L65
	mov	r0, r5
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L5:
	str	r3, [r4, #32]
	bl	spltty
	ldr	r3, [r4, #16]
	ldr	r6, [r4, #20]
	cmp	r3, #0
	str	r0, [sp]
	beq	.L7
	ldr	r3, .L77+16
	ldr	r2, [r6, #8]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L66
.L7:
	ldr	r3, [r4, #4]
	cmp	r3, r7
	bgt	.L20
	ldr	r2, [r4, #8]
	add	r3, r3, r2
	cmp	r3, r7
	ble	.L20
	ldr	r5, [r4, #16]
	cmp	r5, #0
	beq	.L21
.L20:
	ldr	r0, [sp]
	bl	splx
	ldr	r3, .L77+20
	ldr	r2, .L77+24
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r6
	bl	sc_bell
	mov	r0, #5
	ldr	r1, .L77+28
	bl	DPRINTF
	ldr	r3, .L77+32
	ldr	r5, [r3]
	b	.L1
.L64:
	ldr	r2, [r0, #20]
	ldr	r1, [r0, #24]
	bl	sc_bell
	ldr	r3, .L77+36
	ldr	r5, [r3]
	b	.L1
.L21:
	mov	r0, r4
	ldr	r1, [r6, #4]
	bl	SC_DEV
	ldr	r3, [r6, #4]
	cmp	r3, r7
	beq	.L22
	bl	tty_opened_ns
	cmp	r0, #0
	beq	.L22
	ldr	r3, .L77+40
	ldr	r2, [r6, #8]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L67
.L22:
	ldr	r3, .L77+44
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L23
	ldr	r3, [r3]
	cmp	r3, r7
	beq	.L24
.L23:
	mov	r1, r7
	mov	r0, r4
	bl	SC_DEV
	mov	r8, r0
	bl	tty_opened_ns
	cmp	r0, #0
	beq	.L68
	ldr	r3, .L77+48
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L69
.L24:
	ldr	r3, [r4, #16]
	mov	r1, r7
	add	r3, r3, #1
	str	r3, [r4, #16]
	mov	r0, r4
	str	r6, [r4, #24]
	bl	SC_DEV
	bl	sc_get_stat
	mov	r3, r0
	ldr	r0, [r4, #24]
	str	r3, [r4, #28]
	cmp	r3, r0
	beq	.L70
	bl	vt_proc_alive
	ldr	r0, [r4, #28]
	bl	vt_proc_alive
	ldr	r0, [r4, #24]
	bl	signal_vt_rel
	cmp	r0, #0
	ldr	r0, [sp]
	bne	.L71
	bl	splx
	mov	r0, r4
	bl	exchange_scr
	bl	spltty
	ldr	r3, .L77+48
	str	r0, [sp]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L72
.L29:
	ldr	r0, [r4, #20]
	bl	signal_vt_acq
	subs	r5, r0, #0
	bne	.L73
	ldr	r3, .L77+52
	ldr	r2, [r4, #12]
	ldr	r3, [r3]
	str	r5, [r4, #16]
	cmp	r2, r3
	beq	.L74
.L31:
	ldr	r0, [sp]
	bl	splx
	ldr	r1, .L77+56
	mov	r0, #5
	bl	DPRINTF
	b	.L1
.L66:
	ldr	r3, [r6, #16]
	cmp	r3, #0
	beq	.L7
	ldr	r0, [r6, #12]
	bl	pfind
	ldr	r3, [r6, #16]
	cmp	r3, r0
	beq	.L9
	cmp	r0, #0
	beq	.L10
	bl	PROC_UNLOCK
.L10:
	mov	r0, #5
	ldr	r1, [r6, #12]
	bl	DPRINTF
	ldr	r2, .L77+60
	ldr	r3, [r6]
	ldr	r2, [r2]
	tst	r3, r2
	bne	.L75
	ldr	r2, .L77+64
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L12
	ldr	r1, .L77+68
	mov	r0, #5
	bl	DPRINTF
	mov	r0, r6
	bl	finish_vt_acq
	b	.L7
.L70:
	mov	r2, #0
	ldr	r3, .L77+48
	str	r2, [r4, #16]
	ldr	r3, [r3]
	cmp	r3, r2
	beq	.L76
.L27:
	ldr	r0, [sp]
	bl	splx
	ldr	r1, .L77+72
	mov	r0, #5
	bl	DPRINTF
	b	.L1
.L71:
	bl	splx
	b	.L1
.L69:
	mov	r0, r8
	bl	SC_STAT
	ldr	r3, .L77+16
	ldr	r2, [r0]
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L24
	ldr	r0, [sp]
	bl	splx
	mov	r0, #5
	ldr	r1, .L77+76
	bl	DPRINTF
	ldr	r3, .L77+32
	ldr	r5, [r3]
	b	.L1
.L68:
	ldr	r0, [sp]
	bl	splx
	ldr	r3, .L77+20
	ldr	r2, .L77+24
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r6
	bl	sc_bell
	mov	r0, #5
	ldr	r1, .L77+80
	bl	DPRINTF
	ldr	r3, .L77+32
	ldr	r5, [r3]
	b	.L1
.L72:
	mov	r1, r7
	mov	r0, r4
	bl	VTY_WCHAN
	bl	wakeup
	b	.L29
.L9:
	cmp	r0, #0
	beq	.L13
	bl	PROC_UNLOCK
.L13:
	ldr	r2, .L77+60
	ldr	r3, [r6]
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L14
	ldr	r3, [r4, #16]
	add	r2, r3, #1
	cmp	r3, #2
	str	r2, [r4, #16]
	beq	.L15
	bic	r3, r3, #2
	cmp	r3, #1
	beq	.L7
	ldr	r1, .L77+84
	mov	r0, #5
	bl	DPRINTF
	ldr	r3, .L77+88
	mov	r2, sp
	ldr	r1, [r3]
	mov	r0, r6
	bl	finish_vt_rel
	ldr	r0, [sp]
	bl	splx
	mov	r0, #5
	ldr	r1, .L77+92
	bl	DPRINTF
	ldr	r3, .L77+32
	ldr	r5, [r3]
	b	.L1
.L12:
	ldr	r1, .L77+96
	mov	r0, #5
	bl	DPRINTF
	b	.L7
.L76:
	mov	r1, r7
	mov	r0, r4
	bl	VTY_WCHAN
	bl	wakeup
	b	.L27
.L73:
	ldr	r0, [sp]
	bl	splx
	mov	r5, #0
	b	.L1
.L74:
	ldr	r2, .L77+100
	ldr	r3, .L77+104
	ldr	r1, [r2]
	ldr	r0, [r3]
	bl	cnavailable
	b	.L31
.L14:
	ldr	r2, .L77+64
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L7
	ldr	r3, [r4, #16]
	add	r2, r3, #1
	cmp	r3, #2
	str	r2, [r4, #16]
	beq	.L17
	bic	r3, r3, #2
	cmp	r3, #1
	beq	.L7
	ldr	r1, .L77+108
	mov	r0, #5
	bl	DPRINTF
	mov	r0, r6
	bl	finish_vt_acq
	b	.L7
.L75:
	ldr	r1, .L77+112
	mov	r0, #5
	bl	DPRINTF
	ldr	r3, .L77+100
	mov	r2, sp
	ldr	r1, [r3]
	mov	r0, r6
	bl	finish_vt_rel
	ldr	r0, [sp]
	bl	splx
	mov	r0, #5
	ldr	r1, .L77+116
	bl	DPRINTF
	ldr	r3, .L77+32
	ldr	r5, [r3]
	b	.L1
.L67:
	mov	r0, r6
	bl	ISGRAPHSC
	cmp	r0, #0
	beq	.L22
	ldr	r0, [sp]
	bl	splx
	ldr	r3, .L77+20
	ldr	r2, .L77+24
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r6
	bl	sc_bell
	mov	r0, #5
	ldr	r1, .L77+120
	bl	DPRINTF
	ldr	r3, .L77+32
	ldr	r5, [r3]
	b	.L1
.L15:
	ldr	r1, .L77+124
	mov	r0, #5
	bl	DPRINTF
	mov	r0, r6
	bl	signal_vt_rel
	b	.L7
.L17:
	ldr	r1, .L77+128
	mov	r0, #5
	bl	DPRINTF
	mov	r0, r6
	bl	signal_vt_acq
	b	.L7
.L65:
	bl	__stack_chk_fail
.L78:
	.align	2
.L77:
	.word	.LC16
	.word	SC_SCRN_VTYLOCK
	.word	SC_SCRN_BLANKED
	.word	.LC0
	.word	VT_PROCESS
	.word	bios_value
	.word	BELL_DURATION
	.word	.LC10
	.word	EINVAL
	.word	EPERM
	.word	VT_AUTO
	.word	sc_console
	.word	kdb_active
	.word	sc_console_unit
	.word	.LC15
	.word	SWITCH_WAIT_REL
	.word	SWITCH_WAIT_ACQ
	.word	.LC3
	.word	.LC14
	.word	.LC13
	.word	.LC12
	.word	.LC6
	.word	FALSE
	.word	.LC7
	.word	.LC4
	.word	TRUE
	.word	sc_consptr
	.word	.LC9
	.word	.LC1
	.word	.LC2
	.word	.LC11
	.word	.LC5
	.word	.LC8
	.size	sc_switch_scr, .-sc_switch_scr
	.comm	sc_consptr,4,4
	.comm	sc_console_unit,4,4
	.comm	sc_console,4,4
	.comm	kdb_active,4,4
	.comm	bios_value,4,4
	.comm	VT_PROCESS,4,4
	.comm	VT_AUTO,4,4
	.comm	TRUE,4,4
	.comm	SWITCH_WAIT_REL,4,4
	.comm	SWITCH_WAIT_ACQ,4,4
	.comm	SC_SCRN_VTYLOCK,4,4
	.comm	SC_SCRN_BLANKED,4,4
	.comm	FALSE,4,4
	.comm	EPERM,4,4
	.comm	EINVAL,4,4
	.comm	BELL_DURATION,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
