	.file	"extr_ssp-cpld.c_disable_cs.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	disable_cs, @function
disable_cs:
.LFB0:
	.cfi_startproc
	endbr64
	cmp	DWORD PTR ssp_configuration[rip], 128
	jne	.L2
	mov	eax, DWORD PTR CPLD_SPI_CS_EEPROM[rip]
	not	eax
	and	DWORD PTR CPLD_SPI[rip], eax
.L2:
	mov	edi, DWORD PTR T_CS[rip]
	jmp	udelay@PLT
	.cfi_endproc
.LFE0:
	.size	disable_cs, .-disable_cs
	.comm	ssp_configuration,4,4
	.comm	T_CS,4,4
	.comm	CPLD_SPI_CS_EEPROM,4,4
	.comm	CPLD_SPI,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ssp-cpld.c_disable_cs.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	disable_cs, %function
disable_cs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r3, .L4
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L2
	ldr	r2, .L4+4
	ldr	r1, .L4+8
	ldr	r3, [r2]
	ldr	r1, [r1]
	bic	r3, r3, r1
	str	r3, [r2]
.L2:
	ldr	r3, .L4+12
	ldr	r0, [r3]
	b	udelay
.L5:
	.align	2
.L4:
	.word	ssp_configuration
	.word	CPLD_SPI
	.word	CPLD_SPI_CS_EEPROM
	.word	T_CS
	.size	disable_cs, .-disable_cs
	.comm	ssp_configuration,4,4
	.comm	T_CS,4,4
	.comm	CPLD_SPI_CS_EEPROM,4,4
	.comm	CPLD_SPI,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
