	.file	"extr_etnaviv_iommu_v2.c_etnaviv_iommuv2_map.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	etnaviv_iommuv2_map, @function
etnaviv_iommuv2_map:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15d, r8d
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rcx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, edx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rsi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	call	to_v2_context@PLT
	mov	edi, r13d
	mov	r12, rax
	call	lower_32_bits@PLT
	cmp	QWORD PTR SZ_4K[rip], r14
	je	.L2
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edi, DWORD PTR CONFIG_PHYS_ADDR_T_64BIT[rip]
	or	eax, DWORD PTR MMUv2_PTE_PRESENT[rip]
	mov	ebx, eax
	call	IS_ENABLED@PLT
	test	rax, rax
	jne	.L14
.L4:
	test	DWORD PTR ETNAVIV_PROT_WRITE[rip], r15d
	jne	.L15
.L5:
	mov	r15, QWORD PTR MMUv2_MTLB_MASK[rip]
	mov	rcx, QWORD PTR MMUv2_MTLB_SHIFT[rip]
	mov	rdi, r12
	mov	r13, QWORD PTR MMUv2_STLB_MASK[rip]
	mov	r14, QWORD PTR MMUv2_STLB_SHIFT[rip]
	and	r15, rbp
	shr	r15, cl
	mov	esi, r15d
	call	etnaviv_iommuv2_ensure_stlb@PLT
	test	eax, eax
	jne	.L1
	mov	rdx, QWORD PTR [r12]
	movsx	r15, r15d
	and	rbp, r13
	mov	ecx, r14d
	shr	rbp, cl
	mov	rdx, QWORD PTR [rdx+r15*8]
	movsx	rbp, ebp
	mov	DWORD PTR [rdx+rbp*4], ebx
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	or	ebx, DWORD PTR MMUv2_PTE_WRITEABLE[rip]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edi, r13d
	call	upper_32_bits@PLT
	sal	eax, 4
	and	eax, 4080
	or	ebx, eax
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	etnaviv_iommuv2_map, .-etnaviv_iommuv2_map
	.comm	SZ_4K,8,8
	.comm	MMUv2_STLB_SHIFT,8,8
	.comm	MMUv2_STLB_MASK,8,8
	.comm	MMUv2_PTE_WRITEABLE,4,4
	.comm	MMUv2_PTE_PRESENT,4,4
	.comm	MMUv2_MTLB_SHIFT,8,8
	.comm	MMUv2_MTLB_MASK,8,8
	.comm	ETNAVIV_PROT_WRITE,4,4
	.comm	EINVAL,4,4
	.comm	CONFIG_PHYS_ADDR_T_64BIT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_etnaviv_iommu_v2.c_etnaviv_iommuv2_map.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	etnaviv_iommuv2_map, %function
etnaviv_iommuv2_map:
	@ args = 4, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r7, r2
	mov	r4, r3
	mov	r5, r1
	bl	to_v2_context
	mov	r6, r0
	mov	r0, r7
	bl	lower_32_bits
	ldr	r2, .L15
	ldr	r2, [r2]
	cmp	r2, r4
	beq	.L2
	ldr	r3, .L15+4
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L2:
	mov	r3, r0
	ldr	r1, .L15+8
	ldr	r2, .L15+12
	ldr	r4, [r1]
	ldr	r0, [r2]
	orr	r4, r3, r4
	bl	IS_ENABLED
	cmp	r0, #0
	bne	.L14
.L4:
	ldr	r3, .L15+16
	ldr	r2, [sp, #32]
	ldr	r3, [r3]
	mov	r0, r6
	tst	r2, r3
	ldrne	r3, .L15+20
	ldr	r2, .L15+24
	ldrne	r3, [r3]
	ldr	r7, [r2]
	orrne	r4, r4, r3
	ldr	r3, .L15+28
	and	r7, r7, r5
	ldr	r1, [r3]
	ldr	r2, .L15+32
	ldr	r3, .L15+36
	lsr	r7, r7, r1
	mov	r1, r7
	ldr	r8, [r3]
	ldr	r9, [r2]
	bl	etnaviv_iommuv2_ensure_stlb
	cmp	r0, #0
	ldreq	r3, [r6]
	andeq	r5, r5, r9
	ldreq	r3, [r3, r7, lsl #2]
	lsreq	r5, r5, r8
	streq	r4, [r3, r5, lsl #2]
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L14:
	mov	r0, r7
	bl	upper_32_bits
	lsl	r0, r0, #4
	and	r0, r0, #4080
	orr	r4, r4, r0
	b	.L4
.L16:
	.align	2
.L15:
	.word	SZ_4K
	.word	EINVAL
	.word	MMUv2_PTE_PRESENT
	.word	CONFIG_PHYS_ADDR_T_64BIT
	.word	ETNAVIV_PROT_WRITE
	.word	MMUv2_PTE_WRITEABLE
	.word	MMUv2_MTLB_MASK
	.word	MMUv2_MTLB_SHIFT
	.word	MMUv2_STLB_MASK
	.word	MMUv2_STLB_SHIFT
	.size	etnaviv_iommuv2_map, .-etnaviv_iommuv2_map
	.comm	SZ_4K,4,4
	.comm	MMUv2_STLB_SHIFT,4,4
	.comm	MMUv2_STLB_MASK,4,4
	.comm	MMUv2_PTE_WRITEABLE,4,4
	.comm	MMUv2_PTE_PRESENT,4,4
	.comm	MMUv2_MTLB_SHIFT,4,4
	.comm	MMUv2_MTLB_MASK,4,4
	.comm	ETNAVIV_PROT_WRITE,4,4
	.comm	EINVAL,4,4
	.comm	CONFIG_PHYS_ADDR_T_64BIT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
