	.file	"extr_4965-mac.c_il4965_tx_status_reply_tx.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"got tx response w/o block-ack\n"
	.align 8
.LC1:
	.string	"FrameCnt = %d, StartIdx=%d idx=%d\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"1 Frame 0x%x failure :%d\n"
.LC3:
	.string	"Rate Info rate_n_flags=%x\n"
	.section	.rodata.str1.8
	.align 8
.LC4:
	.string	"FrameCnt = %d, txq_id=%d idx=%d\n"
	.align 8
.LC5:
	.string	"BUG_ON idx doesn't match seq control idx=%d, seq_idx=%d, seq=%d\n"
	.section	.rodata.str1.1
.LC6:
	.string	"AGG Frame i=%d idx %d seq=%d\n"
.LC7:
	.string	"start=%d bitmap=0x%llx\n"
	.section	.rodata.str1.8
	.align 8
.LC8:
	.string	"Frames %d start_idx=%d bitmap=0x%llx\n"
	.text
	.p2align 4
	.type	il4965_tx_status_reply_tx, @function
il4965_tx_status_reply_tx:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movsx	r12, r8d
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movsx	rbp, ecx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	r15, QWORD PTR 16[rdx]
	mov	QWORD PTR 24[rsp], rdi
	mov	edi, DWORD PTR 8[rdx]
	call	le32_to_cpu@PLT
	mov	r14d, eax
	mov	eax, DWORD PTR 0[r13]
	test	eax, eax
	jne	.L23
.L2:
	mov	esi, DWORD PTR [rbx]
	mov	DWORD PTR 8[r13], r12d
	mov	DWORD PTR 16[r13], r14d
	mov	DWORD PTR 4[r13], esi
	mov	DWORD PTR 12[r13], 0
	cmp	esi, 1
	je	.L3
	xor	ebx, ebx
	xor	r14d, r14d
	test	esi, esi
	jg	.L4
	jmp	.L24
	.p2align 4,,10
	.p2align 3
.L27:
	sub	r12d, ebp
	mov	eax, 1
	lea	ecx, 255[r12]
	mov	r12d, ebp
	sal	r14d, cl
.L10:
	or	r14d, eax
	mov	esi, r12d
	lea	rdi, .LC7[rip]
	xor	eax, eax
	movsx	rdx, r14d
	call	D_TX_REPLY@PLT
.L7:
	mov	esi, DWORD PTR 4[r13]
	add	rbx, 1
	cmp	esi, ebx
	jle	.L25
.L4:
	mov	edi, DWORD PTR 4[r15+rbx*8]
	call	le16_to_cpu@PLT
	mov	edi, DWORD PTR [r15+rbx*8]
	mov	DWORD PTR [rsp], eax
	call	le16_to_cpu@PLT
	mov	edi, eax
	mov	DWORD PTR 8[rsp], eax
	call	SEQ_TO_IDX@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	ebp, eax
	call	SEQ_TO_QUEUE@PLT
	mov	edx, eax
	mov	eax, DWORD PTR AGG_TX_STATE_FEW_BYTES_MSK[rip]
	or	eax, DWORD PTR AGG_TX_STATE_ABORT_MSK[rip]
	test	DWORD PTR [rsp], eax
	jne	.L7
	mov	esi, DWORD PTR 4[r13]
	mov	ecx, ebp
	lea	rdi, .LC4[rip]
	xor	eax, eax
	mov	DWORD PTR [rsp], edx
	call	D_TX_REPLY@PLT
	mov	rcx, QWORD PTR 24[rsp]
	movsx	rax, DWORD PTR [rsp]
	movsx	rsi, ebp
	mov	QWORD PTR [rsp], rsi
	mov	rdx, QWORD PTR [rcx]
	mov	rax, QWORD PTR [rdx+rax*8]
	mov	rdx, QWORD PTR [rax+rsi*8]
	test	rdx, rdx
	mov	QWORD PTR 8[rsp], rdx
	sete	dil
	movzx	edi, dil
	call	WARN_ON_ONCE@PLT
	test	rax, rax
	jne	.L14
	mov	rdx, QWORD PTR 8[rsp]
	mov	rdx, QWORD PTR [rdx]
	mov	edi, DWORD PTR [rdx]
	mov	QWORD PTR 16[rsp], rdx
	call	le16_to_cpu@PLT
	mov	edi, eax
	mov	DWORD PTR 8[rsp], eax
	call	IEEE80211_SEQ_TO_SN@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	rdx, QWORD PTR 16[rsp]
	movzx	eax, al
	cmp	QWORD PTR [rsp], rax
	jne	.L26
	call	IEEE80211_SEQ_TO_SN@PLT
	mov	edx, ebp
	mov	esi, ebx
	lea	rdi, .LC6[rip]
	mov	rcx, rax
	xor	eax, eax
	call	D_TX_REPLY@PLT
	mov	ecx, ebp
	sub	ecx, r12d
	cmp	ecx, 64
	jg	.L27
	cmp	ecx, -64
	jge	.L11
	sub	ebp, r12d
	mov	eax, 1
	lea	ecx, 255[rbp]
	sal	rax, cl
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L11:
	test	ecx, ecx
	js	.L12
	mov	eax, 1
	sal	rax, cl
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L12:
	mov	ecx, r12d
	mov	eax, 1
	mov	r12d, ebp
	sub	ecx, ebp
	sal	r14d, cl
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L25:
	mov	DWORD PTR 12[r13], r14d
	xor	eax, eax
	movsx	rcx, r14d
	mov	edx, r12d
	mov	DWORD PTR 8[r13], r12d
	lea	rdi, .LC8[rip]
	call	D_TX_REPLY@PLT
	test	r14d, r14d
	je	.L1
	mov	DWORD PTR 0[r13], 1
	xor	r14d, r14d
.L1:
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r14d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L23:
	.cfi_restore_state
	lea	rdi, .LC0[rip]
	xor	eax, eax
	call	D_TX_REPLY@PLT
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L3:
	mov	edi, DWORD PTR 4[r15]
	call	le16_to_cpu@PLT
	mov	esi, DWORD PTR 4[r13]
	mov	edx, DWORD PTR 8[r13]
	mov	ecx, r12d
	mov	r15d, eax
	lea	rdi, .LC1[rip]
	xor	eax, eax
	call	D_TX_REPLY@PLT
	mov	rax, QWORD PTR 24[rsp]
	mov	rax, QWORD PTR [rax]
	mov	rax, QWORD PTR [rax+rbp*8]
	mov	rdi, QWORD PTR [rax+r12*8]
	call	IEEE80211_SKB_CB@PLT
	mov	ecx, DWORD PTR 4[rbx]
	mov	edi, r15d
	mov	rdx, QWORD PTR 8[rax]
	mov	r12, rax
	lea	eax, 1[rcx]
	cdqe
	mov	QWORD PTR [rdx], rax
	mov	eax, DWORD PTR IEEE80211_TX_CTL_AMPDU[rip]
	not	eax
	and	DWORD PTR [r12], eax
	call	il4965_tx_status_to_mac80211@PLT
	or	DWORD PTR [r12], eax
	mov	esi, r14d
	mov	rdx, r12
	mov	rdi, QWORD PTR 24[rsp]
	call	il4965_hwrate_to_tx_control@PLT
	mov	edx, DWORD PTR 4[rbx]
	movzx	esi, r15b
	xor	eax, eax
	lea	rdi, .LC2[rip]
	call	D_TX_REPLY@PLT
	mov	esi, r14d
	lea	rdi, .LC3[rip]
	xor	eax, eax
	call	D_TX_REPLY@PLT
	xor	r14d, r14d
	mov	DWORD PTR 0[r13], 0
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L14:
	mov	r14d, -1
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L26:
	mov	r12d, DWORD PTR [rdx]
	mov	r14d, -1
	call	IEEE80211_SEQ_TO_SN@PLT
	mov	esi, ebp
	lea	rdi, .LC5[rip]
	mov	rdx, rax
	mov	ecx, r12d
	call	IL_ERR@PLT
	jmp	.L1
.L24:
	xor	ecx, ecx
	mov	edx, r12d
	lea	rdi, .LC8[rip]
	xor	eax, eax
	call	D_TX_REPLY@PLT
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	il4965_tx_status_reply_tx, .-il4965_tx_status_reply_tx
	.comm	IEEE80211_TX_CTL_AMPDU,4,4
	.comm	AGG_TX_STATE_FEW_BYTES_MSK,4,4
	.comm	AGG_TX_STATE_ABORT_MSK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_4965-mac.c_il4965_tx_status_reply_tx.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"got tx response w/o block-ack\012\000"
	.align	2
.LC1:
	.ascii	"FrameCnt = %d, StartIdx=%d idx=%d\012\000"
	.align	2
.LC2:
	.ascii	"1 Frame 0x%x failure :%d\012\000"
	.align	2
.LC3:
	.ascii	"Rate Info rate_n_flags=%x\012\000"
	.align	2
.LC4:
	.ascii	"FrameCnt = %d, txq_id=%d idx=%d\012\000"
	.align	2
.LC5:
	.ascii	"BUG_ON idx doesn't match seq control idx=%d, seq_id"
	.ascii	"x=%d, seq=%d\012\000"
	.align	2
.LC6:
	.ascii	"AGG Frame i=%d idx %d seq=%d\012\000"
	.align	2
.LC7:
	.ascii	"start=%d bitmap=0x%llx\012\000"
	.align	2
.LC8:
	.ascii	"Frames %d start_idx=%d bitmap=0x%llx\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	il4965_tx_status_reply_tx, %function
il4965_tx_status_reply_tx:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r2
	mov	r2, r0
	mov	r9, r1
	mov	r7, r3
	ldr	r3, [r4, #12]
	sub	sp, sp, #44
	ldr	r0, [r4, #8]
	str	r3, [sp, #20]
	ldr	r6, [sp, #80]
	str	r2, [sp, #36]
	bl	le32_to_cpu
	ldr	r3, [r9]
	mov	r5, r0
	cmp	r3, #0
	bne	.L25
.L2:
	mov	r10, #0
	ldr	r1, [r4]
	str	r10, [r9, #12]
	cmp	r1, #1
	stmib	r9, {r1, r6}
	str	r5, [r9, #16]
	beq	.L3
	cmp	r1, r10
	ble	.L26
	ldr	r3, [sp, #20]
	mov	r8, r10
	add	r3, r3, #4
	mov	r5, r10
	ldr	fp, .L30
	ldr	r10, .L30+4
	str	r3, [sp, #24]
	str	r9, [sp, #16]
	b	.L4
.L29:
	sub	r6, r6, r4
	add	r6, r6, #255
	lsl	r8, r8, r6
	mov	r3, #1
	mov	r6, r4
.L10:
	orr	r8, r8, r3
	mov	r2, r8
	mov	r1, r6
	ldr	r0, .L30+8
	asr	r3, r8, #31
	bl	D_TX_REPLY
.L7:
	ldr	r3, [sp, #16]
	add	r5, r5, #1
	ldr	r1, [r3, #4]
	cmp	r1, r5
	ble	.L27
.L4:
	ldr	r3, [sp, #24]
	ldr	r0, [r3, r5, lsl #3]
	bl	le16_to_cpu
	ldr	r3, [sp, #20]
	mov	r9, r0
	ldr	r0, [r3, r5, lsl #3]
	bl	le16_to_cpu
	mov	r7, r0
	bl	SEQ_TO_IDX
	mov	r4, r0
	mov	r0, r7
	bl	SEQ_TO_QUEUE
	ldr	r1, [fp]
	ldr	ip, [r10]
	mov	r7, r0
	orr	r1, r1, ip
	tst	r1, r9
	bne	.L7
	ldr	r1, [sp, #16]
	mov	r2, r0
	mov	r3, r4
	ldr	r1, [r1, #4]
	ldr	r0, .L30+12
	bl	D_TX_REPLY
	ldr	r3, [sp, #36]
	ldr	r3, [r3]
	ldr	r3, [r3, r7, lsl #2]
	ldr	r7, [r3, r4, lsl #2]
	clz	r0, r7
	lsr	r0, r0, #5
	bl	WARN_ON_ONCE
	subs	r9, r0, #0
	bne	.L14
	ldr	r2, [r7]
	ldr	r0, [r2]
	str	r2, [sp, #32]
	bl	le16_to_cpu
	str	r0, [sp, #28]
	bl	IEEE80211_SEQ_TO_SN
	and	r3, r0, #255
	str	r3, [sp, #8]
	str	r9, [sp, #12]
	asr	r1, r4, #31
	add	r3, sp, #8
	ldmia	r3, {r2-r3}
	cmp	r1, r3
	cmpeq	r4, r2
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #32]
	bne	.L28
	mov	r0, r3
	bl	IEEE80211_SEQ_TO_SN
	mov	r2, r4
	stm	sp, {r0-r1}
	mov	r1, r5
	ldr	r0, .L30+16
	bl	D_TX_REPLY
	sub	r3, r4, r6
	cmp	r3, #64
	bgt	.L29
	cmn	r3, #64
	bge	.L11
	mov	r3, #1
	sub	r4, r6, r4
	rsb	r4, r4, #255
	lsl	r3, r3, r4
	b	.L10
.L11:
	cmp	r3, #0
	movge	r4, #1
	sublt	r2, r6, r4
	movlt	r3, #1
	movlt	r6, r4
	lslge	r3, r4, r3
	lsllt	r8, r8, r2
	b	.L10
.L27:
	mov	r4, r8
	asr	r5, r8, #31
	str	r8, [r3, #12]
	str	r6, [r3, #8]
	mov	r2, r6
	stm	sp, {r4-r5}
	ldr	r0, .L30+20
	mov	r9, r3
	bl	D_TX_REPLY
	cmp	r8, #0
	movne	r3, #1
	movne	r8, #0
	strne	r3, [r9]
.L1:
	mov	r0, r8
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L25:
	ldr	r0, .L30+24
	bl	D_TX_REPLY
	b	.L2
.L3:
	ldr	r3, [sp, #20]
	mov	r8, r10
	ldr	r0, [r3, #4]
	bl	le16_to_cpu
	ldmib	r9, {r1, r2}
	mov	fp, r0
	mov	r3, r6
	ldr	r0, .L30+28
	bl	D_TX_REPLY
	ldr	r3, [sp, #36]
	ldr	r3, [r3]
	ldr	r3, [r3, r7, lsl #2]
	ldr	r0, [r3, r6, lsl #2]
	bl	IEEE80211_SKB_CB
	mov	r6, r0
	ldr	r2, .L30+32
	ldr	r3, [r0]
	ldr	r0, [r2]
	ldr	r2, [r4, #4]
	ldr	r1, [r6, #4]
	bic	r3, r3, r0
	add	r2, r2, #1
	str	r2, [r1]
	mov	r0, fp
	str	r3, [r6]
	bl	il4965_tx_status_to_mac80211
	mov	r2, r0
	ldr	r3, [r6]
	mov	r1, r5
	orr	r3, r3, r2
	str	r3, [r6]
	mov	r2, r6
	ldr	r0, [sp, #36]
	bl	il4965_hwrate_to_tx_control
	ldr	r2, [r4, #4]
	and	r1, fp, #255
	ldr	r0, .L30+36
	bl	D_TX_REPLY
	mov	r1, r5
	ldr	r0, .L30+40
	bl	D_TX_REPLY
	mov	r0, r8
	str	r10, [r9]
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L14:
	mvn	r8, #0
	mov	r0, r8
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L28:
	mov	r0, r3
	mov	r7, r2
	bl	IEEE80211_SEQ_TO_SN
	mvn	r8, #0
	mov	r3, r1
	ldr	r1, [r7]
	mov	r2, r0
	str	r1, [sp]
	ldr	r0, .L30+44
	mov	r1, r4
	bl	IL_ERR
	mov	r0, r8
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L26:
	mov	r4, #0
	mov	r5, #0
	mov	r2, r6
	stm	sp, {r4-r5}
	ldr	r0, .L30+20
	mov	r8, r10
	bl	D_TX_REPLY
	b	.L1
.L31:
	.align	2
.L30:
	.word	AGG_TX_STATE_FEW_BYTES_MSK
	.word	AGG_TX_STATE_ABORT_MSK
	.word	.LC7
	.word	.LC4
	.word	.LC6
	.word	.LC8
	.word	.LC0
	.word	.LC1
	.word	IEEE80211_TX_CTL_AMPDU
	.word	.LC2
	.word	.LC3
	.word	.LC5
	.size	il4965_tx_status_reply_tx, .-il4965_tx_status_reply_tx
	.comm	IEEE80211_TX_CTL_AMPDU,4,4
	.comm	AGG_TX_STATE_FEW_BYTES_MSK,4,4
	.comm	AGG_TX_STATE_ABORT_MSK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
