	.file	"extr_sun4i-i2s.c_sun8i_i2s_set_chan_cfg.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	sun8i_i2s_set_chan_cfg, @function
sun8i_i2s_set_chan_cfg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rdi
	mov	rdi, rsi
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	params_channels@PLT
	mov	r12d, DWORD PTR [rbx]
	mov	edi, DWORD PTR 8[rbx]
	mov	edx, 1985229328
	mov	esi, DWORD PTR SUN8I_I2S_TX_CHAN_MAP_REG[rip]
	mov	ebp, eax
	test	r12d, r12d
	cmove	r12d, eax
	call	regmap_write@PLT
	mov	esi, DWORD PTR SUN8I_I2S_RX_CHAN_MAP_REG[rip]
	mov	edi, DWORD PTR 8[rbx]
	mov	edx, 1985229328
	call	regmap_write@PLT
	mov	edi, ebp
	call	SUN4I_I2S_CHAN_SEL@PLT
	mov	edx, DWORD PTR SUN4I_I2S_CHAN_SEL_MASK[rip]
	mov	esi, DWORD PTR SUN8I_I2S_TX_CHAN_SEL_REG[rip]
	mov	edi, DWORD PTR 8[rbx]
	mov	ecx, eax
	call	regmap_update_bits@PLT
	mov	edi, ebp
	call	SUN4I_I2S_CHAN_SEL@PLT
	mov	edx, DWORD PTR SUN4I_I2S_CHAN_SEL_MASK[rip]
	mov	esi, DWORD PTR SUN8I_I2S_RX_CHAN_SEL_REG[rip]
	mov	edi, DWORD PTR 8[rbx]
	mov	ecx, eax
	call	regmap_update_bits@PLT
	mov	edi, ebp
	call	SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM@PLT
	mov	edx, DWORD PTR SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK[rip]
	mov	esi, DWORD PTR SUN8I_I2S_CHAN_CFG_REG[rip]
	mov	edi, DWORD PTR 8[rbx]
	mov	ecx, eax
	call	regmap_update_bits@PLT
	mov	edi, ebp
	call	SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM@PLT
	mov	edx, DWORD PTR SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK[rip]
	mov	edi, DWORD PTR 8[rbx]
	mov	esi, DWORD PTR SUN8I_I2S_CHAN_CFG_REG[rip]
	mov	ecx, eax
	call	regmap_update_bits@PLT
	mov	edx, DWORD PTR 4[rbx]
	and	edx, DWORD PTR SND_SOC_DAIFMT_FORMAT_MASK[rip]
	cmp	edx, 130
	je	.L3
	jle	.L12
	sub	edx, 131
	cmp	edx, 1
	ja	.L5
.L6:
	mov	rdi, r13
	call	params_physical_width@PLT
	imul	eax, r12d
	mov	edi, eax
.L7:
	call	SUN8I_I2S_FMT0_LRCK_PERIOD@PLT
	mov	edi, DWORD PTR 8[rbx]
	mov	edx, DWORD PTR SUN8I_I2S_FMT0_LRCK_PERIOD_MASK[rip]
	mov	esi, DWORD PTR SUN4I_I2S_FMT0_REG[rip]
	mov	ecx, eax
	call	regmap_update_bits@PLT
	mov	edi, ebp
	call	SUN8I_I2S_TX_CHAN_EN@PLT
	mov	edi, DWORD PTR 8[rbx]
	mov	edx, DWORD PTR SUN8I_I2S_TX_CHAN_EN_MASK[rip]
	mov	esi, DWORD PTR SUN8I_I2S_TX_CHAN_SEL_REG[rip]
	mov	ecx, eax
	call	regmap_update_bits@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	add	edx, -128
	cmp	edx, 1
	jbe	.L6
.L5:
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	rdi, r13
	call	params_physical_width@PLT
	mov	edi, eax
	jmp	.L7
	.cfi_endproc
.LFE0:
	.size	sun8i_i2s_set_chan_cfg, .-sun8i_i2s_set_chan_cfg
	.comm	SUN8I_I2S_TX_CHAN_SEL_REG,4,4
	.comm	SUN8I_I2S_TX_CHAN_MAP_REG,4,4
	.comm	SUN8I_I2S_TX_CHAN_EN_MASK,4,4
	.comm	SUN8I_I2S_RX_CHAN_SEL_REG,4,4
	.comm	SUN8I_I2S_RX_CHAN_MAP_REG,4,4
	.comm	SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,4,4
	.comm	SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK,4,4
	.comm	SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK,4,4
	.comm	SUN8I_I2S_CHAN_CFG_REG,4,4
	.comm	SUN4I_I2S_FMT0_REG,4,4
	.comm	SUN4I_I2S_CHAN_SEL_MASK,4,4
	.comm	SND_SOC_DAIFMT_FORMAT_MASK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sun4i-i2s.c_sun8i_i2s_set_chan_cfg.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sun8i_i2s_set_chan_cfg, %function
sun8i_i2s_set_chan_cfg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	sub	sp, sp, #12
	mov	r0, r1
	mov	r6, r1
	bl	params_channels
	mov	r5, r0
	ldr	r7, [r4]
	ldr	r3, .L13
	cmp	r7, #0
	moveq	r7, r5
	ldr	r1, [r3]
	ldr	r2, .L13+4
	ldr	r0, [r4, #8]
	str	r7, [sp, #4]
	bl	regmap_write
	ldr	r3, .L13+8
	ldr	r9, .L13+12
	ldr	r1, [r3]
	ldr	r2, .L13+4
	ldr	r8, .L13+16
	ldr	r0, [r4, #8]
	bl	regmap_write
	mov	r0, r5
	ldr	r7, [r9]
	ldr	r10, [r4, #8]
	ldr	fp, [r8]
	bl	SUN4I_I2S_CHAN_SEL
	mov	r2, r7
	mov	r1, fp
	mov	r3, r0
	mov	r0, r10
	bl	regmap_update_bits
	ldr	r3, .L13+20
	mov	r0, r5
	ldr	fp, [r9]
	ldr	r10, [r3]
	ldr	r9, [r4, #8]
	bl	SUN4I_I2S_CHAN_SEL
	mov	r2, fp
	mov	r1, r10
	mov	r3, r0
	mov	r0, r9
	bl	regmap_update_bits
	ldr	r9, .L13+24
	ldr	r3, .L13+28
	mov	r0, r5
	ldr	fp, [r9]
	ldr	r10, [r4, #8]
	ldr	r7, [r3]
	bl	SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM
	mov	r1, fp
	mov	r3, r0
	mov	r2, r7
	mov	r0, r10
	bl	regmap_update_bits
	ldr	r3, .L13+32
	mov	r0, r5
	ldr	r10, [r9]
	ldr	fp, [r3]
	ldr	r9, [r4, #8]
	bl	SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM
	mov	r2, fp
	mov	r3, r0
	mov	r1, r10
	mov	r0, r9
	bl	regmap_update_bits
	ldr	r2, .L13+36
	ldr	r3, [r4, #4]
	ldr	r2, [r2]
	and	r3, r3, r2
	cmp	r3, #130
	beq	.L3
	ble	.L12
	sub	r3, r3, #131
	cmp	r3, #1
	bhi	.L5
.L6:
	mov	r0, r6
	bl	params_physical_width
	ldr	r3, [sp, #4]
	mul	r3, r0, r3
	mov	r0, r3
.L7:
	ldr	r2, .L13+40
	ldr	r3, .L13+44
	ldr	r7, [r2]
	ldr	r9, [r3]
	ldr	r6, [r4, #8]
	bl	SUN8I_I2S_FMT0_LRCK_PERIOD
	mov	r2, r9
	mov	r1, r7
	mov	r3, r0
	mov	r0, r6
	bl	regmap_update_bits
	ldr	r3, .L13+48
	mov	r0, r5
	ldr	r4, [r4, #8]
	ldr	r5, [r3]
	ldr	r6, [r8]
	bl	SUN8I_I2S_TX_CHAN_EN
	mov	r2, r5
	mov	r3, r0
	mov	r1, r6
	mov	r0, r4
	bl	regmap_update_bits
	mov	r0, #0
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L12:
	sub	r3, r3, #128
	cmp	r3, #1
	bls	.L6
.L5:
	ldr	r3, .L13+52
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	mov	r0, r6
	bl	params_physical_width
	b	.L7
.L14:
	.align	2
.L13:
	.word	SUN8I_I2S_TX_CHAN_MAP_REG
	.word	1985229328
	.word	SUN8I_I2S_RX_CHAN_MAP_REG
	.word	SUN4I_I2S_CHAN_SEL_MASK
	.word	SUN8I_I2S_TX_CHAN_SEL_REG
	.word	SUN8I_I2S_RX_CHAN_SEL_REG
	.word	SUN8I_I2S_CHAN_CFG_REG
	.word	SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK
	.word	SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK
	.word	SND_SOC_DAIFMT_FORMAT_MASK
	.word	SUN4I_I2S_FMT0_REG
	.word	SUN8I_I2S_FMT0_LRCK_PERIOD_MASK
	.word	SUN8I_I2S_TX_CHAN_EN_MASK
	.word	EINVAL
	.size	sun8i_i2s_set_chan_cfg, .-sun8i_i2s_set_chan_cfg
	.comm	SUN8I_I2S_TX_CHAN_SEL_REG,4,4
	.comm	SUN8I_I2S_TX_CHAN_MAP_REG,4,4
	.comm	SUN8I_I2S_TX_CHAN_EN_MASK,4,4
	.comm	SUN8I_I2S_RX_CHAN_SEL_REG,4,4
	.comm	SUN8I_I2S_RX_CHAN_MAP_REG,4,4
	.comm	SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,4,4
	.comm	SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK,4,4
	.comm	SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK,4,4
	.comm	SUN8I_I2S_CHAN_CFG_REG,4,4
	.comm	SUN4I_I2S_FMT0_REG,4,4
	.comm	SUN4I_I2S_CHAN_SEL_MASK,4,4
	.comm	SND_SOC_DAIFMT_FORMAT_MASK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
