	.file	"extr_qib_sd7220.c_qib_sd7220_ram_xfer.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	qib_sd7220_ram_xfer, @function
qib_sd7220_ram_xfer:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	mov	DWORD PTR 16[rsp], esi
	mov	DWORD PTR 20[rsp], edx
	mov	QWORD PTR 24[rsp], rcx
	mov	DWORD PTR 12[rsp], r8d
	mov	DWORD PTR 8[rsp], r9d
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 40[rsp], rax
	xor	eax, eax
	cmp	esi, 129
	jle	.L40
	cmp	DWORD PTR 16[rsp], 130
	mov	r15d, -1
	jne	.L1
	mov	rcx, QWORD PTR EPB_IB_UC_CS_SHF[rip]
	mov	r13d, 1
	mov	r12d, DWORD PTR kr_ibsd_epb_transaction_reg[rip]
	sal	r13, cl
.L5:
	mov	rdi, QWORD PTR [rbx]
	xor	esi, esi
	call	spin_lock_irqsave@PLT
	mov	esi, DWORD PTR 16[rsp]
	mov	edx, 1
	mov	rdi, rbx
	call	epb_access@PLT
	test	eax, eax
	js	.L37
	mov	ebp, DWORD PTR EPB_TRANS_TRIES[rip]
	test	ebp, ebp
	jne	.L9
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L41:
	mov	edi, 5
	call	udelay@PLT
	sub	ebp, 1
	je	.L7
.L9:
	mov	esi, r12d
	mov	rdi, rbx
	call	qib_read_kreg32@PLT
	mov	DWORD PTR 36[rsp], eax
	test	DWORD PTR EPB_TRANS_RDY[rip], eax
	je	.L41
	test	ebp, ebp
	jle	.L7
	mov	ecx, DWORD PTR 8[rsp]
	mov	edx, DWORD PTR EPB_UC_CTL[rip]
	mov	esi, r12d
	mov	rdi, rbx
	mov	eax, DWORD PTR EPB_ROM_R[rip]
	lea	r14, 36[rsp]
	or	edx, r13d
	test	ecx, ecx
	cmove	eax, DWORD PTR EPB_ROM_W[rip]
	mov	rcx, r14
	or	edx, eax
	mov	DWORD PTR 36[rsp], edx
	call	epb_trans@PLT
	mov	esi, DWORD PTR 12[rsp]
	test	esi, esi
	jle	.L18
	test	eax, eax
	jle	.L18
	mov	ecx, DWORD PTR 20[rsp]
	mov	rbp, QWORD PTR 24[rsp]
	xor	r15d, r15d
	mov	eax, ecx
	sar	eax, 8
	and	eax, 31
	mov	DWORD PTR 20[rsp], eax
	movzx	eax, cl
	mov	DWORD PTR 24[rsp], eax
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L16:
	or	edx, DWORD PTR EPB_RD[rip]
	mov	rcx, r14
	mov	esi, r12d
	mov	rdi, rbx
	or	edx, r13d
	mov	DWORD PTR 36[rsp], edx
	call	epb_trans@PLT
	test	eax, eax
	jle	.L14
	mov	eax, DWORD PTR 36[rsp]
	and	eax, DWORD PTR EPB_DATA_MASK[rip]
	mov	DWORD PTR 0[rbp], eax
.L21:
	add	r15d, 1
	add	rbp, 4
	cmp	DWORD PTR 12[rsp], r15d
	jle	.L14
.L22:
	test	r15d, r15d
	je	.L15
.L19:
	mov	eax, DWORD PTR 8[rsp]
	mov	edx, DWORD PTR EPB_ROMDATA[rip]
	test	eax, eax
	jne	.L16
	or	edx, r13d
	mov	rcx, r14
	or	edx, DWORD PTR 0[rbp]
	mov	esi, r12d
	mov	rdi, rbx
	mov	DWORD PTR 36[rsp], edx
	call	epb_trans@PLT
	test	eax, eax
	jg	.L21
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edx, DWORD PTR EPB_UC_CTL[rip]
	mov	rcx, r14
	mov	esi, r12d
	mov	rdi, rbx
	mov	r12d, -1
	or	edx, r13d
	mov	DWORD PTR 36[rsp], edx
	call	epb_trans@PLT
	mov	esi, DWORD PTR 16[rsp]
	mov	edx, -1
	mov	rdi, rbx
	mov	ebp, eax
	call	epb_access@PLT
	mov	rdi, QWORD PTR [rbx]
	test	eax, eax
	cmovs	r15d, r12d
	xor	esi, esi
	call	spin_unlock_irqrestore@PLT
	test	ebp, ebp
	cmovle	r15d, r12d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L40:
	cmp	esi, 127
	jg	.L3
.L38:
	mov	r15d, -1
.L1:
	mov	rax, QWORD PTR 40[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L42
	add	rsp, 56
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	mov	edx, DWORD PTR 20[rsp]
	or	edx, DWORD PTR EPB_MADDRH[rip]
	mov	rcx, r14
	mov	esi, r12d
	or	edx, r13d
	mov	rdi, rbx
	mov	DWORD PTR 36[rsp], edx
	call	epb_trans@PLT
	test	eax, eax
	jle	.L18
	mov	edx, DWORD PTR 24[rsp]
	or	edx, DWORD PTR EPB_MADDRL[rip]
	mov	rcx, r14
	mov	esi, r12d
	or	edx, r13d
	mov	rdi, rbx
	mov	DWORD PTR 36[rsp], edx
	call	epb_trans@PLT
	test	eax, eax
	jg	.L19
.L18:
	xor	r15d, r15d
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L7:
	mov	esi, DWORD PTR 16[rsp]
	mov	edx, -1
	mov	rdi, rbx
	call	epb_access@PLT
.L37:
	mov	rdi, QWORD PTR [rbx]
	xor	esi, esi
	call	spin_unlock_irqrestore@PLT
	jmp	.L38
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rcx, QWORD PTR EPB_PCIE_UC_CS_SHF[rip]
	mov	r13d, 1
	mov	r12d, DWORD PTR kr_pciesd_epb_transaction_reg[rip]
	sal	r13, cl
	jmp	.L5
.L42:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	qib_sd7220_ram_xfer, .-qib_sd7220_ram_xfer
	.comm	kr_pciesd_epb_transaction_reg,4,4
	.comm	kr_ibsd_epb_transaction_reg,4,4
	.comm	EPB_UC_CTL,4,4
	.comm	EPB_TRANS_TRIES,4,4
	.comm	EPB_TRANS_RDY,4,4
	.comm	EPB_ROM_W,4,4
	.comm	EPB_ROM_R,4,4
	.comm	EPB_ROMDATA,4,4
	.comm	EPB_RD,4,4
	.comm	EPB_PCIE_UC_CS_SHF,8,8
	.comm	EPB_MADDRL,4,4
	.comm	EPB_MADDRH,4,4
	.comm	EPB_IB_UC_CS_SHF,8,8
	.comm	EPB_DATA_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_qib_sd7220.c_qib_sd7220_ram_xfer.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	qib_sd7220_ram_xfer, %function
qib_sd7220_ram_xfer:
	@ args = 8, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r8, r3
	ldr	r3, .L41
	sub	sp, sp, #28
	cmp	r1, #129
	mov	r9, r1
	mov	r5, r0
	mov	fp, r2
	ldr	r3, [r3]
	str	r3, [sp, #20]
	mov	r3,#0
	ble	.L38
	cmp	r1, #130
	bne	.L36
	mov	r7, #1
	ldr	r3, .L41+4
	ldr	r2, .L41+8
	ldr	r3, [r3]
	ldr	r6, [r2]
	lsl	r7, r7, r3
.L5:
	mov	r1, #0
	ldr	r0, [r5]
	bl	spin_lock_irqsave
	mov	r2, #1
	mov	r1, r9
	mov	r0, r5
	bl	epb_access
	cmp	r0, #0
	blt	.L35
	ldr	r3, .L41+12
	ldr	r4, [r3]
	cmp	r4, #0
	beq	.L7
	ldr	r10, .L41+16
	b	.L9
.L39:
	mov	r0, #5
	bl	udelay
	subs	r4, r4, #1
	beq	.L7
.L9:
	mov	r1, r6
	mov	r0, r5
	bl	qib_read_kreg32
	ldr	r3, [r10]
	str	r0, [sp, #16]
	tst	r0, r3
	beq	.L39
	cmp	r4, #0
	ble	.L7
	ldr	r3, [sp, #68]
	mov	r1, r6
	cmp	r3, #0
	ldr	r3, .L41+20
	mov	r0, r5
	ldr	r2, [r3]
	ldrne	r3, .L41+24
	ldreq	r3, .L41+28
	orr	r2, r7, r2
	ldr	r3, [r3]
	orr	r2, r2, r3
	add	r3, sp, #16
	str	r2, [sp, #16]
	bl	epb_trans
	ldr	r3, [sp, #64]
	cmp	r3, #0
	cmpgt	r0, #0
	ble	.L17
	mov	r2, fp
	asr	r3, fp, #8
	and	r3, r3, #31
	str	r3, [sp, #4]
	and	r3, r2, #255
	str	r9, [sp, #12]
	mov	r4, #0
	ldr	r10, .L41+32
	ldr	fp, .L41+36
	ldr	r9, [sp, #68]
	str	r3, [sp, #8]
	b	.L21
.L15:
	ldr	r2, [fp]
	mov	r1, r6
	orr	r2, r0, r2
	orr	r2, r2, r7
	mov	r0, r5
	add	r3, sp, #16
	str	r2, [sp, #16]
	bl	epb_trans
	cmp	r0, #0
	ble	.L34
	ldr	r2, .L41+40
	ldr	r3, [sp, #16]
	ldr	r2, [r2]
	and	r3, r3, r2
	str	r3, [r8, r4, lsl #2]
.L20:
	ldr	r3, [sp, #64]
	add	r4, r4, #1
	cmp	r3, r4
	ble	.L34
.L21:
	cmp	r4, #0
	beq	.L14
.L18:
	cmp	r9, #0
	ldr	r0, [r10]
	bne	.L15
	ldr	r2, [r8, r4, lsl #2]
	orr	r0, r7, r0
	orr	r2, r0, r2
	mov	r1, r6
	mov	r0, r5
	add	r3, sp, #16
	str	r2, [sp, #16]
	bl	epb_trans
	cmp	r0, #0
	bgt	.L20
.L34:
	ldr	r9, [sp, #12]
.L13:
	ldr	r3, .L41+20
	mov	r1, r6
	ldr	r2, [r3]
	mov	r0, r5
	add	r3, sp, #16
	orr	r2, r7, r2
	str	r2, [sp, #16]
	bl	epb_trans
	mov	r1, r9
	mov	r6, r0
	mvn	r2, #0
	mov	r0, r5
	bl	epb_access
	mov	r1, #0
	cmp	r0, #0
	ldr	r0, [r5]
	mvnlt	r4, #0
	bl	spin_unlock_irqrestore
	cmp	r6, #0
	mvnle	r4, #0
	b	.L1
.L7:
	mov	r1, r9
	mvn	r2, #0
	mov	r0, r5
	bl	epb_access
.L35:
	mov	r1, #0
	ldr	r0, [r5]
	bl	spin_unlock_irqrestore
.L36:
	mvn	r4, #0
.L1:
	ldr	r3, .L41
	ldr	r2, [r3]
	ldr	r3, [sp, #20]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L40
	mov	r0, r4
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L38:
	cmp	r1, #127
	ble	.L36
	mov	r7, #1
	ldr	r3, .L41+44
	ldr	r2, .L41+48
	ldr	r3, [r3]
	ldr	r6, [r2]
	lsl	r7, r7, r3
	b	.L5
.L14:
	ldr	r3, .L41+52
	ldr	r1, [sp, #4]
	ldr	r2, [r3]
	mov	r0, r5
	orr	r2, r1, r2
	orr	r2, r2, r7
	mov	r1, r6
	add	r3, sp, #16
	str	r2, [sp, #16]
	bl	epb_trans
	cmp	r0, #0
	ble	.L32
	ldr	r3, .L41+56
	ldr	r1, [sp, #8]
	ldr	r2, [r3]
	mov	r0, r5
	orr	r2, r1, r2
	orr	r2, r2, r7
	mov	r1, r6
	add	r3, sp, #16
	str	r2, [sp, #16]
	bl	epb_trans
	cmp	r0, #0
	bgt	.L18
.L32:
	ldr	r9, [sp, #12]
.L17:
	mov	r4, #0
	b	.L13
.L40:
	bl	__stack_chk_fail
.L42:
	.align	2
.L41:
	.word	.LC0
	.word	EPB_IB_UC_CS_SHF
	.word	kr_ibsd_epb_transaction_reg
	.word	EPB_TRANS_TRIES
	.word	EPB_TRANS_RDY
	.word	EPB_UC_CTL
	.word	EPB_ROM_R
	.word	EPB_ROM_W
	.word	EPB_ROMDATA
	.word	EPB_RD
	.word	EPB_DATA_MASK
	.word	EPB_PCIE_UC_CS_SHF
	.word	kr_pciesd_epb_transaction_reg
	.word	EPB_MADDRH
	.word	EPB_MADDRL
	.size	qib_sd7220_ram_xfer, .-qib_sd7220_ram_xfer
	.comm	kr_pciesd_epb_transaction_reg,4,4
	.comm	kr_ibsd_epb_transaction_reg,4,4
	.comm	EPB_UC_CTL,4,4
	.comm	EPB_TRANS_TRIES,4,4
	.comm	EPB_TRANS_RDY,4,4
	.comm	EPB_ROM_W,4,4
	.comm	EPB_ROM_R,4,4
	.comm	EPB_ROMDATA,4,4
	.comm	EPB_RD,4,4
	.comm	EPB_PCIE_UC_CS_SHF,8,8
	.comm	EPB_MADDRL,4,4
	.comm	EPB_MADDRH,4,4
	.comm	EPB_IB_UC_CS_SHF,8,8
	.comm	EPB_DATA_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
