	.file	"extr_ig4_iic.c_set_slave_addr.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	set_slave_addr, @function
set_slave_addr:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rsi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	ecx, DWORD PTR [rdi]
	mov	rbx, rdi
	test	ecx, ecx
	je	.L2
	cmp	QWORD PTR 8[rdi], rsi
	je	.L8
.L2:
	mov	DWORD PTR 16[rbx], 0
	mov	esi, DWORD PTR IG4_INTR_TX_EMPTY[rip]
	mov	rdi, rbx
	mov	r12, rbp
	call	wait_intr@PLT
	xor	esi, esi
	mov	rdi, rbx
	call	set_controller@PLT
	mov	esi, DWORD PTR IG4_REG_CTL[rip]
	mov	rdi, rbx
	call	reg_read@PLT
	mov	rcx, QWORD PTR IG4_CTL_10BIT[rip]
	mov	rdx, rcx
	not	rdx
	and	rdx, rax
	mov	eax, DWORD PTR 16[rbx]
	or	rdx, QWORD PTR IG4_CTL_RESTARTEN[rip]
	test	eax, eax
	jne	.L9
.L4:
	mov	esi, DWORD PTR IG4_REG_CTL[rip]
	mov	rdi, rbx
	call	reg_write@PLT
	mov	esi, DWORD PTR IG4_REG_TAR_ADD[rip]
	mov	rdx, r12
	mov	rdi, rbx
	call	reg_write@PLT
	mov	esi, DWORD PTR IG4_I2C_ENABLE[rip]
	mov	rdi, rbx
	call	set_controller@PLT
	mov	DWORD PTR [rbx], 1
	mov	QWORD PTR 8[rbx], rbp
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	or	r12, QWORD PTR IG4_TAR_10BIT[rip]
	or	rdx, rcx
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L8:
	mov	edx, DWORD PTR 16[rdi]
	test	edx, edx
	jne	.L2
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	set_slave_addr, .-set_slave_addr
	.comm	IG4_TAR_10BIT,8,8
	.comm	IG4_REG_TAR_ADD,4,4
	.comm	IG4_REG_CTL,4,4
	.comm	IG4_INTR_TX_EMPTY,4,4
	.comm	IG4_I2C_ENABLE,4,4
	.comm	IG4_CTL_RESTARTEN,8,8
	.comm	IG4_CTL_10BIT,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ig4_iic.c_set_slave_addr.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	set_slave_addr, %function
set_slave_addr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r0]
	push	{r4, r5, r6, r7, r8, lr}
	cmp	r3, #0
	mov	r4, r0
	mov	r5, r1
	beq	.L2
	ldr	r3, [r0, #4]
	cmp	r3, r1
	beq	.L14
.L2:
	mov	r6, #0
	ldr	r3, .L15
	str	r6, [r4, #8]
	ldr	r1, [r3]
	ldr	r7, .L15+4
	mov	r0, r4
	bl	wait_intr
	mov	r1, r6
	mov	r0, r4
	bl	set_controller
	ldr	r1, [r7]
	mov	r0, r4
	bl	reg_read
	ldr	ip, [r4, #8]
	ldr	r3, .L15+8
	cmp	ip, r6
	moveq	r6, r5
	ldr	r2, .L15+12
	ldr	r3, [r3]
	ldr	r1, [r2]
	bic	r2, r0, r3
	orr	r2, r2, r1
	ldrne	r1, .L15+16
	orrne	r2, r2, r3
	ldrne	r6, [r1]
	mov	r0, r4
	ldr	r1, [r7]
	orrne	r6, r5, r6
	bl	reg_write
	ldr	r3, .L15+20
	mov	r2, r6
	ldr	r1, [r3]
	mov	r0, r4
	bl	reg_write
	ldr	r3, .L15+24
	mov	r0, r4
	ldr	r1, [r3]
	bl	set_controller
	mov	r3, #1
	stm	r4, {r3, r5}
	pop	{r4, r5, r6, r7, r8, pc}
.L14:
	ldr	r3, [r0, #8]
	cmp	r3, #0
	bne	.L2
	pop	{r4, r5, r6, r7, r8, pc}
.L16:
	.align	2
.L15:
	.word	IG4_INTR_TX_EMPTY
	.word	IG4_REG_CTL
	.word	IG4_CTL_10BIT
	.word	IG4_CTL_RESTARTEN
	.word	IG4_TAR_10BIT
	.word	IG4_REG_TAR_ADD
	.word	IG4_I2C_ENABLE
	.size	set_slave_addr, .-set_slave_addr
	.comm	IG4_TAR_10BIT,4,4
	.comm	IG4_REG_TAR_ADD,4,4
	.comm	IG4_REG_CTL,4,4
	.comm	IG4_INTR_TX_EMPTY,4,4
	.comm	IG4_I2C_ENABLE,4,4
	.comm	IG4_CTL_RESTARTEN,4,4
	.comm	IG4_CTL_10BIT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
