	.file	"extr_max98088.c_max98088_dai_set_sysclk.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Invalid master clock frequency\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Clock source is %d at %uHz\n"
	.text
	.p2align 4
	.type	max98088_dai_set_sysclk, @function
max98088_dai_set_sysclk:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13d, esi
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	ebp, edx
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	r14, QWORD PTR 8[rdi]
	mov	rdi, r14
	call	snd_soc_component_get_drvdata@PLT
	mov	rbx, rax
	xor	eax, eax
	cmp	DWORD PTR [rbx], ebp
	je	.L1
	mov	edi, DWORD PTR 4[rbx]
	call	IS_ERR@PLT
	test	eax, eax
	je	.L14
	lea	eax, -10000000[rbp]
	cmp	eax, 9999999
	jbe	.L15
.L4:
	lea	eax, -20000000[rbp]
	cmp	eax, 9999999
	ja	.L6
	mov	esi, DWORD PTR M98088_REG_10_SYS_CLK[rip]
	mov	edx, 32
	mov	rdi, r14
	call	snd_soc_component_write@PLT
.L5:
	mov	esi, DWORD PTR M98088_REG_51_PWR_SYS[rip]
	mov	rdi, r14
	call	snd_soc_component_read32@PLT
	mov	edx, DWORD PTR M98088_SHDNRUN[rip]
	test	eax, edx
	jne	.L16
.L7:
	mov	edi, DWORD PTR [r12]
	mov	ecx, ebp
	mov	edx, r13d
	lea	rsi, .LC1[rip]
	call	dev_dbg@PLT
	mov	DWORD PTR [rbx], ebp
	xor	eax, eax
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	mov	esi, DWORD PTR M98088_REG_10_SYS_CLK[rip]
	mov	edx, 16
	mov	rdi, r14
	call	snd_soc_component_write@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edi, DWORD PTR 4[rbx]
	mov	esi, ebp
	call	clk_round_rate@PLT
	mov	edi, DWORD PTR 4[rbx]
	mov	ebp, eax
	mov	esi, eax
	call	clk_set_rate@PLT
	lea	eax, -10000000[rbp]
	cmp	eax, 9999999
	ja	.L4
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L16:
	mov	esi, DWORD PTR M98088_REG_51_PWR_SYS[rip]
	xor	ecx, ecx
	mov	rdi, r14
	call	snd_soc_component_update_bits@PLT
	mov	edx, DWORD PTR M98088_SHDNRUN[rip]
	mov	esi, DWORD PTR M98088_REG_51_PWR_SYS[rip]
	mov	rdi, r14
	mov	ecx, edx
	call	snd_soc_component_update_bits@PLT
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edi, DWORD PTR [r14]
	lea	rsi, .LC0[rip]
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	max98088_dai_set_sysclk, .-max98088_dai_set_sysclk
	.comm	M98088_SHDNRUN,4,4
	.comm	M98088_REG_51_PWR_SYS,4,4
	.comm	M98088_REG_10_SYS_CLK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_max98088.c_max98088_dai_set_sysclk.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Invalid master clock frequency\012\000"
	.align	2
.LC1:
	.ascii	"Clock source is %d at %uHz\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	max98088_dai_set_sysclk, %function
max98088_dai_set_sysclk:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r8, [r0, #4]
	mov	r6, r0
	mov	r0, r8
	mov	r4, r2
	mov	r7, r1
	bl	snd_soc_component_get_drvdata
	ldr	r3, [r0]
	cmp	r3, r4
	beq	.L8
	mov	r5, r0
	ldr	r0, [r0, #4]
	bl	IS_ERR
	cmp	r0, #0
	beq	.L14
.L3:
	ldr	r3, .L17
	ldr	r2, .L17+4
	add	r3, r4, r3
	cmp	r3, r2
	bls	.L15
	ldr	r3, .L17+8
	add	r3, r4, r3
	cmp	r3, r2
	bhi	.L6
	ldr	r3, .L17+12
	mov	r2, #32
	mov	r0, r8
	ldr	r1, [r3]
	bl	snd_soc_component_write
.L5:
	ldr	r9, .L17+16
	mov	r0, r8
	ldr	r1, [r9]
	bl	snd_soc_component_read32
	ldr	r10, .L17+20
	ldr	r2, [r10]
	tst	r0, r2
	bne	.L16
.L7:
	mov	r2, r7
	mov	r3, r4
	ldr	r0, [r6]
	ldr	r1, .L17+24
	bl	dev_dbg
	mov	r0, #0
	str	r4, [r5]
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L15:
	ldr	r3, .L17+12
	mov	r2, #16
	mov	r0, r8
	ldr	r1, [r3]
	bl	snd_soc_component_write
	b	.L5
.L14:
	mov	r1, r4
	ldr	r0, [r5, #4]
	bl	clk_round_rate
	mov	r4, r0
	ldr	r0, [r5, #4]
	mov	r1, r4
	bl	clk_set_rate
	b	.L3
.L8:
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L16:
	ldr	r1, [r9]
	mov	r3, #0
	mov	r0, r8
	bl	snd_soc_component_update_bits
	ldr	r3, [r10]
	mov	r0, r8
	mov	r2, r3
	ldr	r1, [r9]
	bl	snd_soc_component_update_bits
	b	.L7
.L6:
	ldr	r0, [r8]
	ldr	r1, .L17+28
	bl	dev_err
	ldr	r3, .L17+32
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L18:
	.align	2
.L17:
	.word	-10000000
	.word	9999999
	.word	-20000000
	.word	M98088_REG_10_SYS_CLK
	.word	M98088_REG_51_PWR_SYS
	.word	M98088_SHDNRUN
	.word	.LC1
	.word	.LC0
	.word	EINVAL
	.size	max98088_dai_set_sysclk, .-max98088_dai_set_sysclk
	.comm	M98088_SHDNRUN,4,4
	.comm	M98088_REG_51_PWR_SYS,4,4
	.comm	M98088_REG_10_SYS_CLK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
