	.file	"extr_smsc911x.c_smsc911x_phy_adjust_link.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"duplex state has changed"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"configuring for full duplex mode"
	.align 8
.LC2:
	.string	"configuring for half duplex mode"
	.section	.rodata.str1.1
.LC3:
	.string	"carrier state has changed"
.LC4:
	.string	"configuring for carrier OK"
.LC5:
	.string	"configuring for no carrier"
	.text
	.p2align 4
	.type	smsc911x_phy_adjust_link, @function
smsc911x_phy_adjust_link:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	netdev_priv@PLT
	mov	r12, QWORD PTR 0[rbp]
	mov	rbx, rax
	mov	rax, QWORD PTR [rax]
	cmp	QWORD PTR [r12], rax
	jne	.L16
	mov	rdi, rbp
	call	netif_carrier_ok@PLT
	mov	ebp, eax
	cmp	DWORD PTR 8[rbx], eax
	jne	.L17
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L16:
	.cfi_restore_state
	mov	esi, DWORD PTR hw[rip]
	lea	rdx, .LC0[rip]
	mov	rdi, rbx
	lea	r14, 24[rbx]
	call	SMSC_TRACE@PLT
	xor	esi, esi
	mov	rdi, r14
	call	spin_lock_irqsave@PLT
	mov	esi, DWORD PTR MAC_CR[rip]
	mov	rdi, rbx
	call	smsc911x_mac_read@PLT
	cmp	QWORD PTR [r12], 0
	mov	r13d, eax
	je	.L3
	mov	esi, DWORD PTR hw[rip]
	lea	rdx, .LC1[rip]
	mov	rdi, rbx
	call	SMSC_TRACE@PLT
	mov	edx, DWORD PTR MAC_CR_FDPX_[rip]
	or	edx, r13d
.L4:
	mov	esi, DWORD PTR MAC_CR[rip]
	mov	rdi, rbx
	call	smsc911x_mac_write@PLT
	xor	esi, esi
	mov	rdi, r14
	call	spin_unlock_irqrestore@PLT
	mov	rdi, rbx
	call	smsc911x_phy_update_flowcontrol@PLT
	mov	rax, QWORD PTR [r12]
	mov	rdi, rbp
	mov	QWORD PTR [rbx], rax
	call	netif_carrier_ok@PLT
	mov	ebp, eax
	cmp	DWORD PTR 8[rbx], eax
	je	.L1
.L17:
	mov	esi, DWORD PTR hw[rip]
	lea	rdx, .LC3[rip]
	mov	rdi, rbx
	call	SMSC_TRACE@PLT
	test	ebp, ebp
	je	.L6
	mov	esi, DWORD PTR hw[rip]
	lea	rdx, .LC4[rip]
	mov	rdi, rbx
	call	SMSC_TRACE@PLT
	mov	edx, DWORD PTR 12[rbx]
	test	DWORD PTR GPIO_CFG_LED1_EN_[rip], edx
	je	.L8
	mov	ecx, DWORD PTR 20[rbx]
	test	ecx, ecx
	je	.L14
.L8:
	mov	DWORD PTR 8[rbx], ebp
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	esi, DWORD PTR hw[rip]
	lea	rdx, .LC5[rip]
	mov	rdi, rbx
	call	SMSC_TRACE@PLT
	mov	esi, DWORD PTR GPIO_CFG[rip]
	mov	rdi, rbx
	call	smsc911x_reg_read@PLT
	mov	ecx, DWORD PTR GPIO_CFG_LED1_EN_[rip]
	mov	DWORD PTR 16[rbx], eax
	test	eax, ecx
	je	.L8
	mov	edx, DWORD PTR 20[rbx]
	test	edx, edx
	jne	.L8
	not	ecx
	mov	DWORD PTR 12[rbx], eax
	mov	edx, DWORD PTR GPIO_CFG_GPIOBUF0_[rip]
	and	eax, ecx
	or	edx, DWORD PTR GPIO_CFG_GPIODIR0_[rip]
	or	edx, DWORD PTR GPIO_CFG_GPIOD0_[rip]
	or	edx, eax
.L14:
	mov	DWORD PTR 16[rbx], edx
	mov	esi, DWORD PTR GPIO_CFG[rip]
	mov	rdi, rbx
	call	smsc911x_reg_write@PLT
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L3:
	mov	esi, DWORD PTR hw[rip]
	lea	rdx, .LC2[rip]
	mov	rdi, rbx
	call	SMSC_TRACE@PLT
	mov	edx, DWORD PTR MAC_CR_FDPX_[rip]
	not	edx
	and	edx, r13d
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	smsc911x_phy_adjust_link, .-smsc911x_phy_adjust_link
	.comm	hw,4,4
	.comm	MAC_CR_FDPX_,4,4
	.comm	MAC_CR,4,4
	.comm	GPIO_CFG_LED1_EN_,4,4
	.comm	GPIO_CFG_GPIODIR0_,4,4
	.comm	GPIO_CFG_GPIOD0_,4,4
	.comm	GPIO_CFG_GPIOBUF0_,4,4
	.comm	GPIO_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_smsc911x.c_smsc911x_phy_adjust_link.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"duplex state has changed\000"
	.align	2
.LC1:
	.ascii	"configuring for full duplex mode\000"
	.align	2
.LC2:
	.ascii	"configuring for half duplex mode\000"
	.align	2
.LC3:
	.ascii	"carrier state has changed\000"
	.align	2
.LC4:
	.ascii	"configuring for carrier OK\000"
	.align	2
.LC5:
	.ascii	"configuring for no carrier\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	smsc911x_phy_adjust_link, %function
smsc911x_phy_adjust_link:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r5, r0
	bl	netdev_priv
	ldr	r7, [r5]
	ldr	r3, [r0]
	ldr	r2, [r7]
	mov	r4, r0
	cmp	r2, r3
	bne	.L15
.L2:
	mov	r0, r5
	bl	netif_carrier_ok
	ldr	r3, [r4, #4]
	mov	r5, r0
	cmp	r3, r0
	popeq	{r4, r5, r6, r7, r8, r9, r10, pc}
	ldr	r6, .L17
	mov	r0, r4
	ldr	r2, .L17+4
	ldr	r1, [r6]
	bl	SMSC_TRACE
	cmp	r5, #0
	beq	.L6
	ldr	r2, .L17+8
	mov	r0, r4
	ldr	r1, [r6]
	bl	SMSC_TRACE
	ldr	r3, .L17+12
	ldr	r2, [r4, #8]
	ldr	r3, [r3]
	tst	r2, r3
	beq	.L8
	ldr	r3, [r4, #16]
	cmp	r3, #0
	beq	.L16
.L8:
	str	r5, [r4, #4]
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L15:
	ldr	r10, .L17
	ldr	r2, .L17+16
	ldr	r1, [r10]
	add	r8, r0, #20
	ldr	r9, .L17+20
	bl	SMSC_TRACE
	mov	r1, #0
	mov	r0, r8
	bl	spin_lock_irqsave
	ldr	r1, [r9]
	mov	r0, r4
	bl	smsc911x_mac_read
	ldr	r3, [r7]
	mov	r6, r0
	cmp	r3, #0
	ldr	r1, [r10]
	beq	.L3
	ldr	r2, .L17+24
	mov	r0, r4
	bl	SMSC_TRACE
	ldr	r3, .L17+28
	ldr	r2, [r3]
	orr	r2, r6, r2
.L4:
	ldr	r1, [r9]
	mov	r0, r4
	bl	smsc911x_mac_write
	mov	r1, #0
	mov	r0, r8
	bl	spin_unlock_irqrestore
	mov	r0, r4
	bl	smsc911x_phy_update_flowcontrol
	ldr	r3, [r7]
	str	r3, [r4]
	b	.L2
.L6:
	ldr	r7, .L17+32
	ldr	r1, [r6]
	ldr	r2, .L17+36
	mov	r0, r4
	bl	SMSC_TRACE
	mov	r0, r4
	ldr	r1, [r7]
	bl	smsc911x_reg_read
	ldr	r3, .L17+12
	str	r0, [r4, #12]
	ldr	r3, [r3]
	tst	r0, r3
	beq	.L8
	ldr	r2, [r4, #16]
	cmp	r2, #0
	bne	.L8
	ldr	r1, .L17+40
	ldr	r2, .L17+44
	ldr	ip, [r1]
	ldr	r1, .L17+48
	ldr	r2, [r2]
	ldr	r1, [r1]
	orr	r2, r2, ip
	bic	r3, r0, r3
	orr	r2, r2, r1
	orr	r2, r2, r3
	str	r0, [r4, #8]
	ldr	r1, [r7]
	mov	r0, r4
	str	r2, [r4, #12]
	bl	smsc911x_reg_write
	b	.L8
.L3:
	ldr	r2, .L17+52
	mov	r0, r4
	bl	SMSC_TRACE
	ldr	r3, .L17+28
	ldr	r2, [r3]
	bic	r2, r6, r2
	b	.L4
.L16:
	ldr	r3, .L17+32
	mov	r0, r4
	ldr	r1, [r3]
	str	r2, [r4, #12]
	bl	smsc911x_reg_write
	b	.L8
.L18:
	.align	2
.L17:
	.word	hw
	.word	.LC3
	.word	.LC4
	.word	GPIO_CFG_LED1_EN_
	.word	.LC0
	.word	MAC_CR
	.word	.LC1
	.word	MAC_CR_FDPX_
	.word	GPIO_CFG
	.word	.LC5
	.word	GPIO_CFG_GPIODIR0_
	.word	GPIO_CFG_GPIOBUF0_
	.word	GPIO_CFG_GPIOD0_
	.word	.LC2
	.size	smsc911x_phy_adjust_link, .-smsc911x_phy_adjust_link
	.comm	hw,4,4
	.comm	MAC_CR_FDPX_,4,4
	.comm	MAC_CR,4,4
	.comm	GPIO_CFG_LED1_EN_,4,4
	.comm	GPIO_CFG_GPIODIR0_,4,4
	.comm	GPIO_CFG_GPIOD0_,4,4
	.comm	GPIO_CFG_GPIOBUF0_,4,4
	.comm	GPIO_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
