	.file	"extr_pinctrl-moore.c_mtk_pinconf_set.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mtk_pinconf_set, @function
mtk_pinconf_set:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, ecx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	pinctrl_dev_get_drvdata@PLT
	mov	r12, rax
	mov	rax, QWORD PTR [rax]
	mov	rax, QWORD PTR 40[rax]
	lea	r13, [rax+rbp*4]
	test	r14d, r14d
	je	.L25
	lea	eax, -1[r14]
	lea	rbp, .L5[rip]
	lea	rax, 8[rbx+rax*8]
	mov	QWORD PTR 8[rsp], rax
	.p2align 4,,10
	.p2align 3
.L24:
	mov	rdi, QWORD PTR [rbx]
	call	pinconf_to_config_param@PLT
	mov	rdi, QWORD PTR [rbx]
	mov	r14d, eax
	call	pinconf_to_config_argument@PLT
	mov	r15d, eax
	lea	eax, -128[r14]
	cmp	eax, 12
	ja	.L3
	movsx	rax, DWORD PTR 0[rbp+rax*4]
	add	rax, rbp
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L5:
	.long	.L15-.L5
	.long	.L14-.L5
	.long	.L13-.L5
	.long	.L12-.L5
	.long	.L11-.L5
	.long	.L10-.L5
	.long	.L9-.L5
	.long	.L8-.L5
	.long	.L7-.L5
	.long	.L6-.L5
	.long	.L6-.L5
	.long	.L4-.L5
	.long	.L4-.L5
	.text
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edx, DWORD PTR PINCTRL_PIN_REG_TDSEL[rip]
	cmp	r14d, 137
	mov	ecx, r15d
	cmovne	edx, DWORD PTR PINCTRL_PIN_REG_RDSEL[rip]
	.p2align 4,,10
	.p2align 3
.L54:
	mov	rsi, r13
	mov	rdi, r12
	call	mtk_hw_set_value@PLT
	test	eax, eax
	jne	.L1
.L18:
	xor	eax, eax
.L17:
	add	rbx, 8
	cmp	rbx, QWORD PTR 8[rsp]
	jne	.L24
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	mov	rax, QWORD PTR [r12]
	mov	rax, QWORD PTR 24[rax]
	test	rax, rax
	je	.L16
	xor	edx, edx
	cmp	r14d, 139
	mov	ecx, r15d
	mov	rsi, r13
	sete	dl
	mov	rdi, r12
	call	rax
	test	eax, eax
	je	.L18
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L14:
	mov	ecx, DWORD PTR MTK_DISABLE[rip]
	mov	edx, DWORD PTR PINCTRL_PIN_REG_SMT[rip]
	mov	rsi, r13
	mov	rdi, r12
	call	mtk_hw_set_value@PLT
	test	eax, eax
	jne	.L1
	mov	ecx, DWORD PTR MTK_OUTPUT[rip]
.L46:
	mov	edx, DWORD PTR PINCTRL_PIN_REG_DIR[rip]
	jmp	.L54
	.p2align 4,,10
	.p2align 3
.L15:
	mov	edx, DWORD PTR PINCTRL_PIN_REG_SR[rip]
	mov	ecx, r15d
	jmp	.L54
	.p2align 4,,10
	.p2align 3
.L7:
	mov	rax, QWORD PTR [r12]
	mov	rax, QWORD PTR [rax]
	test	rax, rax
	je	.L16
	mov	rsi, r13
	mov	rdi, r12
	call	rax
	test	eax, eax
	je	.L18
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rax, QWORD PTR [r12]
	mov	rax, QWORD PTR 8[rax]
	test	rax, rax
	je	.L16
	xor	edx, edx
.L44:
	mov	rsi, r13
	mov	rdi, r12
	call	rax
	test	eax, eax
	je	.L18
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L9:
	mov	rax, QWORD PTR [r12]
	mov	rax, QWORD PTR 8[rax]
	test	rax, rax
	je	.L16
	mov	edx, 1
	jmp	.L44
	.p2align 4,,10
	.p2align 3
.L10:
	mov	rax, QWORD PTR [r12]
	mov	rax, QWORD PTR 16[rax]
	test	rax, rax
	je	.L3
	mov	edx, r15d
	jmp	.L44
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rax, QWORD PTR [r12]
	mov	eax, DWORD PTR 32[rax]
	test	eax, eax
	jne	.L56
.L19:
	mov	ecx, DWORD PTR MTK_INPUT[rip]
	jmp	.L46
	.p2align 4,,10
	.p2align 3
.L12:
	xor	ecx, ecx
	mov	edx, DWORD PTR PINCTRL_PIN_REG_DIR[rip]
	cmp	r15d, 1
	mov	rsi, r13
	setb	cl
	mov	rdi, r12
	sbb	r15d, r15d
	add	r15d, 2
	call	mtk_hw_set_value@PLT
	test	eax, eax
	jne	.L1
	mov	ecx, r15d
	mov	edx, DWORD PTR PINCTRL_PIN_REG_SMT[rip]
	shr	ecx
	and	ecx, 1
	jmp	.L54
	.p2align 4,,10
	.p2align 3
.L13:
	mov	ecx, DWORD PTR MTK_OUTPUT[rip]
	mov	edx, DWORD PTR PINCTRL_PIN_REG_DIR[rip]
	mov	rsi, r13
	mov	rdi, r12
	call	mtk_hw_set_value@PLT
	test	eax, eax
	jne	.L1
	mov	edx, DWORD PTR PINCTRL_PIN_REG_DO[rip]
	mov	ecx, r15d
	jmp	.L54
	.p2align 4,,10
	.p2align 3
.L3:
	mov	eax, DWORD PTR ENOTSUPP[rip]
	neg	eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L56:
	mov	ecx, DWORD PTR MTK_ENABLE[rip]
	mov	edx, DWORD PTR PINCTRL_PIN_REG_IES[rip]
	mov	rsi, r13
	mov	rdi, r12
	call	mtk_hw_set_value@PLT
	jmp	.L19
.L16:
	mov	eax, DWORD PTR ENOTSUPP[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
.L25:
	.cfi_restore_state
	xor	eax, eax
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	mtk_pinconf_set, .-mtk_pinconf_set
	.comm	PINCTRL_PIN_REG_TDSEL,4,4
	.comm	PINCTRL_PIN_REG_SR,4,4
	.comm	PINCTRL_PIN_REG_SMT,4,4
	.comm	PINCTRL_PIN_REG_RDSEL,4,4
	.comm	PINCTRL_PIN_REG_IES,4,4
	.comm	PINCTRL_PIN_REG_DO,4,4
	.comm	PINCTRL_PIN_REG_DIR,4,4
	.comm	MTK_OUTPUT,4,4
	.comm	MTK_INPUT,4,4
	.comm	MTK_ENABLE,4,4
	.comm	MTK_DISABLE,4,4
	.comm	ENOTSUPP,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pinctrl-moore.c_mtk_pinconf_set.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mtk_pinconf_set, %function
mtk_pinconf_set:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r9, r3
	mov	r8, r1
	mov	r5, r2
	bl	pinctrl_dev_get_drvdata
	ldr	r3, [r0]
	cmp	r9, #0
	ldr	r3, [r3, #20]
	add	r8, r3, r8, lsl #2
	beq	.L25
	mov	r7, r0
	mov	r6, #0
	ldr	r10, .L60
	sub	r5, r5, #4
.L24:
	ldr	r0, [r5, #4]!
	bl	pinconf_to_config_param
	mov	fp, r0
	ldr	r0, [r5]
	bl	pinconf_to_config_argument
	sub	r3, fp, #128
	mov	r4, r0
	cmp	r3, #12
	ldrls	pc, [pc, r3, asl #2]
	b	.L3
.L5:
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L6
	.word	.L4
	.word	.L4
.L4:
	ldr	r3, [r7]
	ldr	r3, [r3, #12]
	subs	ip, r3, #0
	beq	.L16
	sub	r2, fp, #139
	clz	r2, r2
	mov	r3, r0
	mov	r1, r8
	mov	r0, r7
	lsr	r2, r2, #5
	blx	ip
	subs	r3, r0, #0
	bne	.L46
.L18:
	mov	r3, #0
.L17:
	add	r6, r6, #1
	cmp	r6, r9
	bne	.L24
.L46:
	mov	r0, r3
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L6:
	cmp	fp, #137
	ldreq	r3, .L60+4
	ldrne	r3, .L60+8
	ldr	r2, [r3]
	mov	r3, r0
.L53:
	mov	r1, r8
	mov	r0, r7
	bl	mtk_hw_set_value
	subs	r3, r0, #0
	beq	.L18
	mov	r0, r3
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	ldr	r3, [r7]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L16
	mov	r1, r8
	mov	r0, r7
	blx	r3
	subs	r3, r0, #0
	beq	.L18
	b	.L46
.L8:
	ldr	r3, [r7]
	ldr	r3, [r3, #4]
	cmp	r3, #0
	beq	.L16
	mov	r2, #0
.L51:
	mov	r1, r8
	mov	r0, r7
	blx	r3
	subs	r3, r0, #0
	beq	.L18
	b	.L46
.L9:
	ldr	r3, [r7]
	ldr	r3, [r3, #4]
	cmp	r3, #0
	beq	.L16
	mov	r2, #1
	b	.L51
.L10:
	ldr	r3, [r7]
	ldr	r3, [r3, #8]
	cmp	r3, #0
	beq	.L21
	mov	r2, r0
	b	.L51
.L11:
	ldr	r3, [r7]
	ldr	r3, [r3, #16]
	cmp	r3, #0
	bne	.L59
.L19:
	ldr	r3, .L60+12
	ldr	r2, [r10]
	ldr	r3, [r3]
	b	.L53
.L12:
	cmp	r0, #0
	moveq	r3, #1
	movne	r3, #0
	mov	r1, r8
	mov	r0, r7
	ldr	r2, [r10]
	moveq	r4, r3
	movne	r4, #2
	bl	mtk_hw_set_value
	subs	r3, r0, #0
	bne	.L46
	ldr	r2, .L60+16
	lsr	r3, r4, #1
	ldr	r2, [r2]
	b	.L53
.L14:
	ldr	r3, .L60+20
	ldr	r2, .L60+16
	ldr	r3, [r3]
	mov	r1, r8
	mov	r0, r7
	ldr	r2, [r2]
	bl	mtk_hw_set_value
	subs	r3, r0, #0
	bne	.L46
	ldr	r3, .L60+24
	ldr	r2, [r10]
	ldr	r3, [r3]
	b	.L53
.L15:
	ldr	r2, .L60+28
	mov	r3, r0
	ldr	r2, [r2]
	b	.L53
.L13:
	ldr	r3, .L60+24
	mov	r1, r8
	ldr	r3, [r3]
	mov	r0, r7
	ldr	r2, [r10]
	bl	mtk_hw_set_value
	subs	r3, r0, #0
	bne	.L46
	ldr	r2, .L60+32
	mov	r3, r4
	ldr	r2, [r2]
	b	.L53
.L59:
	ldr	r3, .L60+36
	ldr	r2, .L60+40
	mov	r1, r8
	mov	r0, r7
	ldr	r3, [r3]
	ldr	r2, [r2]
	bl	mtk_hw_set_value
	b	.L19
.L21:
	ldr	r3, .L60+44
	ldr	r0, [r3]
	rsb	r3, r0, #0
	b	.L17
.L16:
	ldr	r3, .L60+44
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L25:
	mov	r0, r9
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	ldr	r3, .L60+44
	ldr	r3, [r3]
	rsb	r3, r3, #0
	b	.L17
.L61:
	.align	2
.L60:
	.word	PINCTRL_PIN_REG_DIR
	.word	PINCTRL_PIN_REG_TDSEL
	.word	PINCTRL_PIN_REG_RDSEL
	.word	MTK_INPUT
	.word	PINCTRL_PIN_REG_SMT
	.word	MTK_DISABLE
	.word	MTK_OUTPUT
	.word	PINCTRL_PIN_REG_SR
	.word	PINCTRL_PIN_REG_DO
	.word	MTK_ENABLE
	.word	PINCTRL_PIN_REG_IES
	.word	ENOTSUPP
	.size	mtk_pinconf_set, .-mtk_pinconf_set
	.comm	PINCTRL_PIN_REG_TDSEL,4,4
	.comm	PINCTRL_PIN_REG_SR,4,4
	.comm	PINCTRL_PIN_REG_SMT,4,4
	.comm	PINCTRL_PIN_REG_RDSEL,4,4
	.comm	PINCTRL_PIN_REG_IES,4,4
	.comm	PINCTRL_PIN_REG_DO,4,4
	.comm	PINCTRL_PIN_REG_DIR,4,4
	.comm	MTK_OUTPUT,4,4
	.comm	MTK_INPUT,4,4
	.comm	MTK_ENABLE,4,4
	.comm	MTK_DISABLE,4,4
	.comm	ENOTSUPP,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
