	.file	"extr_hevc_mc_uni_msa.c_common_hz_8t_12w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	common_hz_8t_12w_msa, @function
common_hz_8t_12w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, ecx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, r8
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 120
	.cfi_def_cfa_offset 176
	mov	rdi, QWORD PTR ff_hevc_mask_arr[rip]
	mov	DWORD PTR 36[rsp], esi
	mov	QWORD PTR 40[rsp], rdx
	mov	DWORD PTR 108[rsp], ecx
	call	LD_UB@PLT
	mov	QWORD PTR 64[rsp], rax
	mov	r14, rax
	mov	rax, QWORD PTR ff_hevc_mask_arr[rip]
	lea	rdi, 64[rax]
	call	LD_UB@PLT
	mov	rdi, rbp
	mov	QWORD PTR 72[rsp], rax
	mov	r15, rax
	lea	rax, -12[rbx]
	mov	QWORD PTR 24[rsp], rax
	call	LD_SH@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 184
	xor	r9d, r9d
	xor	esi, esi
	push	0
	.cfi_def_cfa_offset 192
	mov	edi, eax
	mov	r8d, 3
	mov	ecx, 2
	push	0
	.cfi_def_cfa_offset 200
	mov	edx, 1
	push	0
	.cfi_def_cfa_offset 208
	call	SPLATI_H4_SB@PLT
	lea	rax, 2[r14]
	mov	QWORD PTR 32[rsp], rax
	lea	rax, 4[r14]
	mov	QWORD PTR 40[rsp], rax
	lea	rax, 6[r14]
	mov	QWORD PTR 48[rsp], rax
	lea	rax, 2[r15]
	mov	QWORD PTR 112[rsp], rax
	lea	rax, 4[r15]
	mov	QWORD PTR 120[rsp], rax
	lea	rax, 6[r15]
	mov	QWORD PTR 128[rsp], rax
	lea	eax, 0[0+r12*4]
	cdqe
	sal	rax, 2
	mov	QWORD PTR 80[rsp], rax
	lea	eax, 0[0+r13*4]
	cdqe
	sal	rax, 2
	mov	QWORD PTR 88[rsp], rax
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	DWORD PTR 104[rsp], 4
.L2:
	mov	rbx, QWORD PTR 24[rsp]
	xor	ebp, ebp
	xor	r12d, r12d
	xor	r13d, r13d
	xor	r14d, r14d
	mov	esi, DWORD PTR 36[rsp]
	mov	r8d, ebp
	mov	edx, r13d
	mov	ecx, r14d
	mov	rdi, rbx
	mov	r9d, r12d
	xor	r15d, r15d
	call	LD_SB4@PLT
	mov	esi, DWORD PTR 36[rsp]
	xor	r9d, r9d
	xor	r8d, r8d
	lea	rdi, 32[rbx]
	xor	ecx, ecx
	mov	edx, r15d
	call	LD_SB4@PLT
	mov	edx, ebp
	mov	esi, r14d
	mov	edi, r13d
	mov	ecx, r12d
	call	XORI_B4_128_SB@PLT
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	mov	edi, r15d
	call	XORI_B4_128_SB@PLT
	mov	rax, QWORD PTR 48[rsp]
	mov	ecx, r14d
	mov	edx, r14d
	mov	esi, r13d
	mov	edi, r13d
	add	rbx, rax
	mov	QWORD PTR 24[rsp], rbx
	push	0
	.cfi_def_cfa_offset 184
	push	0
	.cfi_def_cfa_offset 192
	mov	rbx, QWORD PTR 80[rsp]
	mov	r9, rbx
	mov	r8, rbx
	call	VSHF_B2_SB@PLT
	push	0
	.cfi_def_cfa_offset 200
	mov	r9, rbx
	mov	r8, rbx
	push	0
	.cfi_def_cfa_offset 208
	mov	esi, ebp
	mov	edi, ebp
	mov	ecx, r12d
	mov	edx, r12d
	xor	ebx, ebx
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	xor	r9d, r9d
	xor	r8d, r8d
	push	0
	.cfi_def_cfa_offset 184
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	push	rbx
	.cfi_def_cfa_offset 192
	xor	edi, edi
	push	0
	.cfi_def_cfa_offset 200
	push	0
	.cfi_def_cfa_offset 208
	push	0
	.cfi_def_cfa_offset 216
	push	0
	.cfi_def_cfa_offset 224
	call	DOTP_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 176
	mov	ecx, r14d
	mov	edx, r14d
	push	0
	.cfi_def_cfa_offset 184
	mov	esi, r13d
	mov	edi, r13d
	push	0
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 24[rsp]
	mov	r8, r9
	call	VSHF_B2_SB@PLT
	push	0
	.cfi_def_cfa_offset 200
	mov	esi, ebp
	mov	edi, ebp
	push	0
	.cfi_def_cfa_offset 208
	mov	r8, QWORD PTR 40[rsp]
	mov	ecx, r12d
	mov	edx, r12d
	mov	r9, r8
	call	VSHF_B2_SB@PLT
	xor	r10d, r10d
	add	rsp, 32
	.cfi_def_cfa_offset 176
	xor	ecx, ecx
	push	0
	.cfi_def_cfa_offset 184
	mov	r9d, r10d
	mov	r8d, r10d
	xor	edx, edx
	push	rbx
	.cfi_def_cfa_offset 192
	xor	esi, esi
	xor	edi, edi
	push	0
	.cfi_def_cfa_offset 200
	push	0
	.cfi_def_cfa_offset 208
	push	r10
	.cfi_def_cfa_offset 216
	push	r10
	.cfi_def_cfa_offset 224
	call	DPADD_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 176
	mov	ecx, r14d
	mov	edx, r14d
	push	0
	.cfi_def_cfa_offset 184
	mov	esi, r13d
	mov	edi, r13d
	push	0
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 16[rsp]
	mov	r8, r9
	call	VSHF_B2_SB@PLT
	push	0
	.cfi_def_cfa_offset 200
	mov	esi, ebp
	mov	edi, ebp
	push	0
	.cfi_def_cfa_offset 208
	mov	r8, QWORD PTR 32[rsp]
	mov	ecx, r12d
	mov	edx, r12d
	mov	r9, r8
	call	VSHF_B2_SB@PLT
	xor	r11d, r11d
	add	rsp, 32
	.cfi_def_cfa_offset 176
	xor	ecx, ecx
	push	0
	.cfi_def_cfa_offset 184
	mov	r9d, r11d
	mov	r8d, r11d
	xor	edx, edx
	push	rbx
	.cfi_def_cfa_offset 192
	xor	esi, esi
	xor	edi, edi
	push	0
	.cfi_def_cfa_offset 200
	push	0
	.cfi_def_cfa_offset 208
	push	r11
	.cfi_def_cfa_offset 216
	push	r11
	.cfi_def_cfa_offset 224
	call	DPADD_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 176
	mov	ecx, r14d
	mov	edx, r14d
	push	0
	.cfi_def_cfa_offset 184
	mov	esi, r13d
	mov	edi, r13d
	push	0
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 32[rsp]
	mov	r8, r9
	call	VSHF_B2_SB@PLT
	push	0
	.cfi_def_cfa_offset 200
	mov	esi, ebp
	mov	edi, ebp
	push	0
	.cfi_def_cfa_offset 208
	mov	r9, QWORD PTR 48[rsp]
	mov	ecx, r12d
	mov	edx, r12d
	mov	r8, r9
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, r13d
	mov	r8d, r13d
	push	0
	.cfi_def_cfa_offset 184
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	push	rbx
	.cfi_def_cfa_offset 192
	xor	edi, edi
	push	0
	.cfi_def_cfa_offset 200
	push	0
	.cfi_def_cfa_offset 208
	push	r13
	.cfi_def_cfa_offset 216
	push	r13
	.cfi_def_cfa_offset 224
	call	DPADD_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 176
	xor	ecx, ecx
	xor	edx, edx
	push	0
	.cfi_def_cfa_offset 184
	xor	esi, esi
	mov	edi, r15d
	push	0
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 88[rsp]
	mov	r8, r9
	call	VSHF_B2_SB@PLT
	mov	r8d, ebp
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	mov	r9d, r12d
	xor	edi, edi
	call	DOTP_SB2_SH@PLT
	push	0
	.cfi_def_cfa_offset 200
	xor	ecx, ecx
	xor	edx, edx
	push	0
	.cfi_def_cfa_offset 208
	mov	r8, QWORD PTR 112[rsp]
	xor	esi, esi
	mov	edi, r15d
	mov	r9, r8
	call	VSHF_B2_SB@PLT
	xor	r11d, r11d
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r8d, ebp
	mov	ecx, r11d
	mov	edx, r11d
	xor	esi, esi
	xor	edi, edi
	mov	r9d, r12d
	call	DPADD_SB2_SH@PLT
	push	0
	.cfi_def_cfa_offset 184
	xor	ecx, ecx
	xor	edx, edx
	push	0
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 104[rsp]
	xor	esi, esi
	mov	edi, r15d
	mov	r8, r9
	call	VSHF_B2_SB@PLT
	xor	r10d, r10d
	mov	r8d, ebp
	xor	esi, esi
	mov	ecx, r10d
	mov	edx, r10d
	xor	edi, edi
	mov	r9d, r12d
	call	DPADD_SB2_SH@PLT
	push	0
	.cfi_def_cfa_offset 200
	xor	ecx, ecx
	xor	edx, edx
	push	0
	.cfi_def_cfa_offset 208
	mov	r8, QWORD PTR 128[rsp]
	xor	esi, esi
	mov	edi, r15d
	mov	r9, r8
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, r12d
	mov	r8d, ebp
	mov	ecx, r13d
	mov	edx, r13d
	xor	esi, esi
	xor	edi, edi
	call	DPADD_SB2_SH@PLT
	mov	r8d, 6
	xor	ecx, ecx
	mov	edx, ebx
	xor	esi, esi
	xor	edi, edi
	call	SRARI_H4_SH@PLT
	mov	edi, ebp
	mov	edx, 6
	mov	esi, r12d
	call	SRARI_H2_SH@PLT
	xor	ecx, ecx
	mov	r8d, 7
	mov	edx, ebx
	xor	esi, esi
	xor	edi, edi
	call	SAT_SH4_SH@PLT
	mov	edx, 7
	mov	edi, ebp
	mov	esi, r12d
	call	SAT_SH2_SH@PLT
	xor	esi, esi
	xor	edi, edi
	call	PCKEV_XORI128_UB@PLT
	xor	esi, esi
	mov	edi, ebx
	mov	r13, rax
	call	PCKEV_XORI128_UB@PLT
	mov	edi, ebp
	mov	esi, r12d
	mov	r14, rax
	call	PCKEV_XORI128_UB@PLT
	mov	r15d, DWORD PTR 108[rsp]
	xor	r8d, r8d
	xor	edx, edx
	mov	rbp, rax
	mov	r9d, 1
	mov	rsi, r14
	mov	rdi, r13
	push	r15
	.cfi_def_cfa_offset 184
	mov	rbx, QWORD PTR 48[rsp]
	mov	ecx, 1
	push	rbx
	.cfi_def_cfa_offset 192
	call	ST_D4@PLT
	lea	r9, 32[rbx]
	mov	edx, 1
	xor	esi, esi
	mov	r8d, 3
	mov	ecx, 2
	mov	rdi, rbp
	mov	DWORD PTR [rsp], r15d
	call	ST_W4@PLT
	mov	rax, QWORD PTR 72[rsp]
	add	rbx, rax
	mov	QWORD PTR 56[rsp], rbx
	pop	rax
	.cfi_def_cfa_offset 184
	pop	rdx
	.cfi_def_cfa_offset 176
	sub	DWORD PTR 104[rsp], 1
	jne	.L2
	add	rsp, 120
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	common_hz_8t_12w_msa, .-common_hz_8t_12w_msa
	.comm	ff_hevc_mask_arr,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevc_mc_uni_msa.c_common_hz_8t_12w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	common_hz_8t_12w_msa, %function
common_hz_8t_12w_msa:
	@ args = 8, pretend = 0, frame = 72
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r5, .L6
	sub	sp, sp, #108
	mov	r4, r0
	ldr	r0, [r5]
	mov	r8, r1
	str	r1, [sp, #56]
	str	r2, [sp, #60]
	mov	r9, r3
	str	r3, [sp, #100]
	bl	LD_UB
	ldr	r3, [r5]
	mov	r6, r0
	str	r0, [sp, #36]
	add	r0, r3, #64
	bl	LD_UB
	mov	r3, r0
	ldr	r0, [sp, #144]
	mov	r7, r3
	mov	r5, #0
	str	r3, [sp, #84]
	bl	LD_SH
	mov	r3, #3
	mov	r1, r5
	str	r3, [sp]
	mov	r2, #1
	mov	r3, #2
	str	r5, [sp, #16]
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	bl	SPLATI_H4_SB
	mov	r3, #4
	str	r3, [sp, #52]
	sub	r3, r4, #12
	str	r3, [sp, #32]
	add	r3, r6, #2
	str	r3, [sp, #40]
	add	r3, r6, #4
	str	r3, [sp, #44]
	add	r3, r6, #6
	str	r3, [sp, #48]
	add	r3, r7, #2
	str	r3, [sp, #88]
	add	r3, r7, #4
	str	r3, [sp, #92]
	add	r3, r7, #6
	str	r3, [sp, #96]
	lsl	r3, r8, #4
	str	r3, [sp, #76]
	lsl	r3, r9, #4
	str	r3, [sp, #80]
.L2:
	mov	r5, #0
	mov	r4, r5
	mov	fp, r5
	mov	r10, r5
	mov	r3, r5
	mov	r2, r5
	stm	sp, {r4, r5}
	ldr	r1, [sp, #56]
	ldr	r0, [sp, #32]
	bl	LD_SB4
	ldr	r0, [sp, #32]
	mov	r3, r5
	mov	r2, r5
	ldr	r1, [sp, #56]
	stm	sp, {r10, fp}
	add	r0, r0, #32
	bl	LD_SB4
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	bl	XORI_B4_128_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	bl	XORI_B4_128_SB
	ldr	r3, [sp, #36]
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r3, [sp, #4]
	str	r3, [sp]
	str	r5, [sp, #12]
	mov	r3, r5
	str	r5, [sp, #8]
	bl	VSHF_B2_SB
	ldr	r3, [sp, #36]
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r3, [sp, #4]
	str	r3, [sp]
	str	r5, [sp, #12]
	mov	r3, r5
	str	r5, [sp, #8]
	bl	VSHF_B2_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #28]
	str	r5, [sp, #24]
	str	r5, [sp, #20]
	str	r5, [sp, #16]
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	str	r5, [sp, #72]
	bl	DOTP_SB4_SH
	ldr	r2, [sp, #44]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	ldr	r2, [sp, #44]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #28]
	str	r5, [sp, #24]
	str	r5, [sp, #20]
	str	r5, [sp, #16]
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	str	r5, [sp, #64]
	bl	DPADD_SB4_SH
	ldr	r2, [sp, #40]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r2, [sp, #4]
	str	r2, [sp]
	str	r5, [sp, #12]
	mov	r2, r5
	str	r5, [sp, #8]
	bl	VSHF_B2_SB
	ldr	r2, [sp, #40]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r2, [sp, #4]
	str	r2, [sp]
	str	r5, [sp, #12]
	mov	r2, r5
	str	r5, [sp, #8]
	bl	VSHF_B2_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #28]
	str	r5, [sp, #24]
	str	r5, [sp, #20]
	str	r5, [sp, #16]
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	str	r5, [sp, #68]
	bl	DPADD_SB4_SH
	ldr	r2, [sp, #48]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	ldr	r2, [sp, #48]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	mov	r3, r5
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #28]
	str	r5, [sp, #24]
	str	r5, [sp, #20]
	str	r5, [sp, #16]
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	DPADD_SB4_SH
	ldr	r2, [sp, #84]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	ldr	r3, [sp, #72]
	mov	r1, r5
	mov	r2, r3
	mov	r0, r5
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	DOTP_SB2_SH
	ldr	r2, [sp, #88]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	ldr	r3, [sp, #68]
	mov	r1, r5
	mov	r2, r3
	mov	r0, r5
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	DPADD_SB2_SH
	ldr	r2, [sp, #92]
	mov	r3, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	str	r2, [sp, #4]
	str	r2, [sp]
	mov	r2, r5
	bl	VSHF_B2_SB
	ldr	r3, [sp, #64]
	mov	r1, r5
	mov	r2, r3
	mov	r0, r5
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	DPADD_SB2_SH
	ldr	ip, [sp, #96]
	mov	r3, r5
	str	ip, [sp, #4]
	str	ip, [sp]
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r5, [sp, #12]
	str	r5, [sp, #8]
	bl	VSHF_B2_SB
	mov	r1, r5
	mov	r3, r5
	mov	r2, r5
	mov	r0, r5
	str	r5, [sp, #4]
	str	r5, [sp]
	bl	DPADD_SB2_SH
	mov	r3, #6
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r3, [sp]
	mov	r3, r5
	bl	SRARI_H4_SH
	mov	r1, r5
	mov	r0, r5
	mov	r2, #6
	bl	SRARI_H2_SH
	mov	r3, #7
	mov	r2, r5
	mov	r1, r5
	mov	r0, r5
	str	r3, [sp]
	mov	r3, r5
	bl	SAT_SH4_SH
	mov	r2, #7
	mov	r1, r5
	mov	r0, r5
	bl	SAT_SH2_SH
	mov	r1, r5
	mov	r0, r5
	bl	PCKEV_XORI128_UB
	mov	r1, r5
	mov	r6, r0
	mov	r0, r5
	bl	PCKEV_XORI128_UB
	mov	r1, r5
	mov	r7, r0
	mov	r0, r5
	bl	PCKEV_XORI128_UB
	mov	r3, #1
	mov	r1, r7
	mov	r5, r0
	ldr	r7, [sp, #100]
	mov	r0, r6
	ldr	r6, [sp, #60]
	mov	r2, r4
	str	r3, [sp, #4]
	str	r7, [sp, #12]
	str	r6, [sp, #8]
	str	r4, [sp]
	bl	ST_D4
	mov	r2, #3
	add	r3, r6, #32
	stm	sp, {r2, r3, r7}
	mov	r0, r5
	mov	r3, #2
	mov	r1, r4
	mov	r2, #1
	bl	ST_W4
	ldr	r3, [sp, #52]
	ldr	r0, [sp, #32]
	subs	r3, r3, #1
	str	r3, [sp, #52]
	ldr	r3, [sp, #76]
	add	r3, r0, r3
	str	r3, [sp, #32]
	ldr	r3, [sp, #80]
	add	r3, r6, r3
	str	r3, [sp, #60]
	bne	.L2
	add	sp, sp, #108
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	.align	2
.L6:
	.word	ff_hevc_mask_arr
	.size	common_hz_8t_12w_msa, .-common_hz_8t_12w_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
