	.file	"extr_speedhq.c_decode_speedhq_field.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	decode_speedhq_field, @function
decode_speedhq_field:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movsx	r13, r9d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 328
	.cfi_def_cfa_offset 384
	mov	rdi, QWORD PTR SHQ_NO_ALPHA[rip]
	mov	QWORD PTR 40[rsp], rsi
	mov	ebx, DWORD PTR 384[rsp]
	mov	QWORD PTR 16[rsp], rcx
	mov	DWORD PTR 112[rsp], r8d
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 312[rsp], rax
	xor	eax, eax
	mov	rax, QWORD PTR [rcx]
	cmp	QWORD PTR [r12], rdi
	je	.L2
	mov	esi, DWORD PTR 392[rsp]
	imul	esi, DWORD PTR 12[rax]
	mov	DWORD PTR 36[rsp], esi
.L2:
	cmp	ebx, r13d
	jl	.L7
	mov	ecx, ebx
	sub	ecx, r13d
	cmp	ecx, 2
	jle	.L7
	cmp	ebx, edx
	jg	.L7
	mov	edi, DWORD PTR [rax]
	mov	esi, DWORD PTR 4[rax]
	mov	DWORD PTR 224[rsp], ebx
	sub	ebx, 2
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR 208[rsp], r13d
	lea	rbp, 220[rsp]
	mov	r14d, r13d
	mov	DWORD PTR 24[rsp], edi
	mov	DWORD PTR 32[rsp], eax
	lea	rax, 208[rsp]
	mov	DWORD PTR 8[rsp], esi
	mov	r15, rax
	mov	QWORD PTR 72[rsp], rax
	mov	eax, ebx
	mov	rbx, r15
	mov	r15, rbp
	mov	ebp, eax
.L10:
	mov	rdx, QWORD PTR 40[rsp]
	movsx	rax, r14d
	lea	rdi, [rdx+rax*4]
	call	AV_RL24@PLT
	add	r14d, eax
	mov	DWORD PTR 4[rbx], r14d
	cmp	eax, 2
	jle	.L7
	cmp	r14d, ebp
	jge	.L7
	add	rbx, 4
	cmp	r15, rbx
	je	.L9
	mov	r14d, DWORD PTR [rbx]
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L7:
	mov	eax, DWORD PTR AVERROR_INVALIDDATA[rip]
.L1:
	mov	rbx, QWORD PTR 312[rsp]
	xor	rbx, QWORD PTR fs:40
	jne	.L52
	add	rsp, 328
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	ebx, DWORD PTR 8[rsp]
	mov	r14d, DWORD PTR 24[rsp]
	lea	r15, 188[rsp]
	mov	DWORD PTR 152[rsp], 0
	imul	r14d, DWORD PTR 392[rsp]
	mov	edi, DWORD PTR 32[rsp]
	imul	ebx, DWORD PTR 392[rsp]
	imul	edi, DWORD PTR 392[rsp]
	lea	eax, 0[0+r14*8]
	cdqe
	mov	DWORD PTR 28[rsp], ebx
	sal	rax, 2
	mov	DWORD PTR 32[rsp], edi
	mov	QWORD PTR 56[rsp], rax
	add	rax, 32
	mov	QWORD PTR 64[rsp], rax
	lea	eax, 0[0+rbx*8]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	eax, 0[0+rdi*8]
	cdqe
	lea	rbx, 32[rdx]
	mov	QWORD PTR 88[rsp], rdx
	sal	rax, 2
	mov	QWORD PTR 128[rsp], rbx
	mov	QWORD PTR 96[rsp], rax
	add	rax, 32
	mov	QWORD PTR 136[rsp], rax
	mov	eax, DWORD PTR 36[rsp]
	sal	eax, 3
	cdqe
	sal	rax, 2
	mov	QWORD PTR 104[rsp], rax
	add	rax, 32
	mov	QWORD PTR 120[rsp], rax
	mov	eax, DWORD PTR 392[rsp]
	sal	eax, 6
	mov	DWORD PTR 160[rsp], eax
	mov	eax, DWORD PTR 392[rsp]
	sal	eax, 4
	mov	DWORD PTR 156[rsp], eax
	mov	rax, QWORD PTR 72[rsp]
	add	rax, 16
	mov	QWORD PTR 144[rsp], rax
	mov	rax, r15
	mov	r15d, r14d
	mov	r14, r12
	mov	r12, rax
.L24:
	mov	rax, QWORD PTR 72[rsp]
	mov	rdi, r12
	mov	eax, DWORD PTR 4[rax]
	mov	edx, eax
	mov	DWORD PTR 164[rsp], eax
	mov	rax, QWORD PTR 40[rsp]
	sub	edx, r13d
	sub	edx, 3
	lea	rsi, 12[rax+r13*4]
	call	init_get_bits8@PLT
	test	eax, eax
	js	.L1
	mov	eax, DWORD PTR 152[rsp]
	mov	rbx, QWORD PTR 16[rsp]
	mov	DWORD PTR 116[rsp], eax
	cmp	DWORD PTR 8[rbx], eax
	jle	.L12
	lea	rax, 240[rsp]
	mov	QWORD PTR 80[rsp], rax
.L23:
	mov	rdi, QWORD PTR 80[rsp]
	mov	edx, 64
	mov	esi, 255
	movabs	rax, 4398046512128
	mov	QWORD PTR 192[rsp], rax
	mov	QWORD PTR 200[rsp], rax
	call	memset@PLT
	mov	rax, QWORD PTR 16[rsp]
	mov	rbx, QWORD PTR SHQ_SUBSAMPLING_420[rip]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR 16[rax]
	mov	eax, DWORD PTR 116[rsp]
	add	eax, DWORD PTR 112[rsp]
	mov	esi, DWORD PTR [rcx]
	mov	rdi, QWORD PTR [rdx]
	imul	esi, eax
	movsx	rsi, esi
	lea	rbp, [rdi+rsi*4]
	cmp	QWORD PTR 8[r14], rbx
	je	.L53
	mov	esi, DWORD PTR 4[rcx]
	mov	rdi, QWORD PTR 8[rdx]
	imul	esi, eax
	movsx	rsi, esi
	lea	r13, [rdi+rsi*4]
	mov	esi, DWORD PTR 8[rcx]
	mov	rdi, QWORD PTR 16[rdx]
	imul	esi, eax
	movsx	rsi, esi
	lea	rdi, [rdi+rsi*4]
	mov	QWORD PTR 8[rsp], rdi
.L14:
	mov	rdi, QWORD PTR SHQ_NO_ALPHA[rip]
	cmp	QWORD PTR [r14], rdi
	je	.L15
	imul	eax, DWORD PTR 12[rcx]
	mov	rdx, QWORD PTR 24[rdx]
	cdqe
	lea	rax, [rdx+rax*4]
	mov	QWORD PTR 48[rsp], rax
.L15:
	mov	rax, QWORD PTR 16[rsp]
	mov	eax, DWORD PTR 12[rax]
	test	eax, eax
	jle	.L16
	mov	DWORD PTR 24[rsp], 0
	lea	rbx, 192[rsp]
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L56:
	add	r13, 32
.L19:
	add	QWORD PTR 8[rsp], 32
	mov	rax, QWORD PTR [r14]
	add	rbp, 64
	cmp	rax, QWORD PTR SHQ_RLE_ALPHA[rip]
	je	.L54
	cmp	rax, QWORD PTR SHQ_DCT_ALPHA[rip]
	je	.L55
.L21:
	mov	rsi, QWORD PTR 16[rsp]
	add	DWORD PTR 24[rsp], 16
	mov	eax, DWORD PTR 24[rsp]
	cmp	DWORD PTR 12[rsi], eax
	jle	.L16
.L22:
	xor	ecx, ecx
	mov	r9d, r15d
	mov	r8, rbp
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	xor	ecx, ecx
	mov	r9d, r15d
	lea	r8, 32[rbp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 56[rsp]
	xor	ecx, ecx
	mov	r9d, r15d
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, r14
	lea	r8, 0[rbp+rax]
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 64[rsp]
	xor	ecx, ecx
	mov	r9d, r15d
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, r14
	lea	r8, 0[rbp+rax]
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	r9d, DWORD PTR 28[rsp]
	mov	r8, r13
	mov	ecx, 1
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	r9d, DWORD PTR 32[rsp]
	mov	r8, QWORD PTR 8[rsp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	ecx, 2
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR SHQ_SUBSAMPLING_420[rip]
	cmp	QWORD PTR 8[r14], rax
	je	.L56
	mov	rax, QWORD PTR 88[rsp]
	mov	r9d, DWORD PTR 28[rsp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	ecx, 1
	mov	rdi, r14
	lea	r8, 0[r13+rax]
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rdx, QWORD PTR 96[rsp]
	mov	rax, QWORD PTR 8[rsp]
	mov	rsi, r12
	mov	rdi, r14
	mov	r9d, DWORD PTR 32[rsp]
	mov	ecx, 2
	lea	r8, [rax+rdx]
	mov	rdx, rbx
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR SHQ_SUBSAMPLING_444[rip]
	lea	r8, 32[r13]
	cmp	QWORD PTR 8[r14], rax
	je	.L57
	mov	r13, r8
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L54:
	mov	r8d, DWORD PTR 36[rsp]
	mov	rcx, QWORD PTR 48[rsp]
	mov	rsi, r12
	mov	rdi, r14
	mov	rdx, QWORD PTR 80[rsp]
	call	decode_alpha_block@PLT
	test	eax, eax
	js	.L1
	mov	r8d, DWORD PTR 36[rsp]
	mov	rdx, QWORD PTR 80[rsp]
	mov	rsi, r12
	mov	rdi, r14
	mov	rcx, QWORD PTR 48[rsp]
	add	rcx, QWORD PTR 104[rsp]
	call	decode_alpha_block@PLT
	test	eax, eax
	js	.L1
.L50:
	add	QWORD PTR 48[rsp], 64
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L55:
	mov	r9d, DWORD PTR 36[rsp]
	mov	r8, QWORD PTR 48[rsp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	ecx, 3
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 48[rsp]
	mov	r9d, DWORD PTR 36[rsp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	ecx, 3
	mov	rdi, r14
	lea	r8, 32[rax]
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rdx, QWORD PTR 104[rsp]
	mov	rax, QWORD PTR 48[rsp]
	mov	rsi, r12
	mov	rdi, r14
	mov	r9d, DWORD PTR 36[rsp]
	mov	ecx, 3
	lea	r8, [rax+rdx]
	mov	rdx, rbx
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rdi, QWORD PTR 120[rsp]
	mov	rax, QWORD PTR 48[rsp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	r9d, DWORD PTR 36[rsp]
	mov	ecx, 3
	lea	r8, [rax+rdi]
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	jns	.L50
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L57:
	mov	r9d, DWORD PTR 28[rsp]
	mov	ecx, 1
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 8[rsp]
	mov	r9d, DWORD PTR 32[rsp]
	mov	rsi, r12
	mov	rdi, r14
	mov	ecx, 2
	lea	rdx, 32[rax]
	mov	QWORD PTR 168[rsp], rdx
	mov	r8, rdx
	mov	rdx, rbx
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	r9d, DWORD PTR 28[rsp]
	mov	ecx, 1
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, QWORD PTR 128[rsp]
	lea	r8, 0[r13+rdi]
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 8[rsp]
	mov	r9d, DWORD PTR 32[rsp]
	mov	rdx, rbx
	mov	rsi, r12
	mov	rdi, QWORD PTR 136[rsp]
	mov	ecx, 2
	lea	r8, [rax+rdi]
	mov	rdi, r14
	call	decode_dct_block@PLT
	test	eax, eax
	js	.L1
	mov	rdx, QWORD PTR 168[rsp]
	add	r13, 64
	mov	QWORD PTR 8[rsp], rdx
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L53:
	mov	ebx, DWORD PTR 116[rsp]
	mov	edi, DWORD PTR 4[rcx]
	mov	r8, QWORD PTR 8[rdx]
	mov	esi, ebx
	shr	esi, 31
	add	esi, ebx
	sar	esi
	add	esi, DWORD PTR 112[rsp]
	imul	edi, esi
	imul	esi, DWORD PTR 8[rcx]
	movsx	rdi, edi
	lea	r13, [r8+rdi*4]
	mov	rdi, QWORD PTR 16[rdx]
	movsx	rsi, esi
	lea	rbx, [rdi+rsi*4]
	mov	QWORD PTR 8[rsp], rbx
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L16:
	mov	ebx, DWORD PTR 160[rsp]
	add	DWORD PTR 116[rsp], ebx
	mov	rbx, QWORD PTR 16[rsp]
	mov	eax, DWORD PTR 116[rsp]
	cmp	DWORD PTR 8[rbx], eax
	jg	.L23
.L12:
	add	QWORD PTR 72[rsp], 4
	mov	edx, DWORD PTR 156[rsp]
	mov	rax, QWORD PTR 72[rsp]
	add	DWORD PTR 152[rsp], edx
	cmp	QWORD PTR 144[rsp], rax
	jne	.L27
	xor	eax, eax
	jmp	.L1
.L52:
	call	__stack_chk_fail@PLT
.L27:
	movsx	r13, DWORD PTR 164[rsp]
	jmp	.L24
	.cfi_endproc
.LFE0:
	.size	decode_speedhq_field, .-decode_speedhq_field
	.comm	SHQ_SUBSAMPLING_444,8,8
	.comm	SHQ_SUBSAMPLING_420,8,8
	.comm	SHQ_RLE_ALPHA,8,8
	.comm	SHQ_NO_ALPHA,8,8
	.comm	SHQ_DCT_ALPHA,8,8
	.comm	AVERROR_INVALIDDATA,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_speedhq.c_decode_speedhq_field.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	decode_speedhq_field, %function
decode_speedhq_field:
	@ args = 16, pretend = 0, frame = 200
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r8, r3
	ldr	r3, .L55
	mov	r9, r0
	ldr	r3, [r3]
	ldr	r0, [r0]
	sub	sp, sp, #212
	cmp	r0, r3
	ldr	r3, .L55+4
	str	r1, [sp, #24]
	ldr	r3, [r3]
	str	r3, [sp, #204]
	mov	r3,#0
	ldr	r0, [r8]
	ldr	r4, [sp, #260]
	ldrne	r3, [r0, #12]
	ldr	r7, [sp, #252]
	mulne	ip, r3, r4
	ldr	r1, [sp, #256]
	strne	ip, [sp, #20]
	cmp	r1, r7
	blt	.L6
	cmp	r1, r2
	movle	r2, #0
	movgt	r2, #1
	sub	r3, r1, r7
	cmp	r3, #2
	orrle	r2, r2, #1
	cmp	r2, #0
	beq	.L4
.L6:
	ldr	r3, .L55+8
	ldr	r0, [r3]
.L1:
	ldr	r3, .L55+4
	ldr	r2, [r3]
	ldr	r3, [sp, #204]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L51
	add	sp, sp, #212
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L4:
	add	r3, sp, #124
	mov	fp, r3
	str	r3, [sp, #48]
	ldr	r3, [r0]
	sub	r5, r1, #2
	str	r3, [sp, #12]
	ldr	r3, [r0, #4]
	mov	r10, r7
	str	r3, [sp, #16]
	ldr	r3, [r0, #8]
	add	r6, sp, #136
	str	r3, [sp, #32]
	mov	r3, r5
	mov	r5, fp
	mov	fp, r3
	str	r7, [sp, #120]
	str	r1, [sp, #136]
.L9:
	ldr	r3, [sp, #24]
	add	r0, r3, r10, lsl #2
	bl	AV_RL24
	add	r10, r10, r0
	cmp	r0, #2
	str	r10, [r5], #4
	ble	.L6
	cmp	r10, fp
	bge	.L6
	cmp	r6, r5
	ldrne	r10, [r5, #-4]
	bne	.L9
.L8:
	ldr	r3, [sp, #16]
	ldr	r2, [sp, #32]
	mul	r3, r4, r3
	mul	r2, r4, r2
	ldr	fp, [sp, #12]
	ldr	r0, [sp, #20]
	str	r3, [sp, #12]
	lsl	r3, r3, #5
	str	r2, [sp, #16]
	str	r3, [sp, #40]
	lsl	r2, r2, #5
	add	r3, r3, #32
	lsl	r0, r0, #5
	str	r3, [sp, #68]
	add	r3, r2, #32
	str	r3, [sp, #72]
	add	r3, r0, #32
	str	r3, [sp, #64]
	lsl	r3, r4, #6
	str	r3, [sp, #84]
	lsl	r3, r4, #4
	str	r3, [sp, #76]
	mov	r3, #0
	mov	r10, r8
	mul	fp, r4, fp
	lsl	r1, fp, #5
	str	r1, [sp, #32]
	add	ip, sp, #140
	add	r1, r1, #32
	str	r2, [sp, #44]
	str	r0, [sp, #52]
	str	ip, [sp, #80]
	str	r1, [sp, #36]
	str	r3, [sp, #56]
.L23:
	ldr	r3, [sp, #48]
	add	r1, r7, #3
	ldr	r2, [r3], #4
	add	r0, sp, #100
	str	r3, [sp, #48]
	ldr	r3, [sp, #24]
	str	r2, [sp, #88]
	sub	r2, r2, r7
	sub	r2, r2, #3
	add	r1, r3, r1, lsl #2
	bl	init_get_bits8
	cmp	r0, #0
	blt	.L1
	ldr	r2, [sp, #56]
	ldr	r3, [r10, #4]
	str	r2, [sp, #60]
	cmp	r3, r2
	ble	.L11
	add	r4, sp, #104
.L22:
	ldr	r3, .L55+12
	ldm	r3, {r0, r1, r2, r3}
	stm	r4, {r0, r1, r2, r3}
	mov	r2, #64
	mov	r1, #255
	add	r0, sp, #140
	bl	memset
	ldr	r1, [r10]
	ldr	r2, [sp, #248]
	ldr	r3, [sp, #60]
	ldr	r5, [r1]
	add	r3, r3, r2
	ldr	ip, .L55+16
	mul	r0, r5, r3
	ldr	r2, [r10, #12]
	ldr	lr, [r9, #4]
	ldr	ip, [ip]
	ldr	r5, [r2]
	cmp	lr, ip
	add	r5, r5, r0, lsl #2
	beq	.L52
	ldr	r7, [r1, #4]
	ldr	r6, [r1, #8]
	mul	r0, r7, r3
	ldmib	r2, {r7, ip}
	mul	r6, r3, r6
	add	r7, r7, r0, lsl #2
	add	r6, ip, r6, lsl #2
.L13:
	ldr	r0, .L55
	ldr	ip, [r9]
	ldr	r0, [r0]
	cmp	ip, r0
	ldrne	r1, [r1, #12]
	ldrne	r2, [r2, #12]
	mulne	r3, r1, r3
	addne	r3, r2, r3, lsl #2
	strne	r3, [sp, #28]
	ldr	r3, [r10, #8]
	cmp	r3, #0
	ble	.L15
	mov	r8, #0
	b	.L21
.L19:
	ldr	r2, .L55+20
	ldr	r2, [r2]
	cmp	r3, r2
	beq	.L53
.L20:
	ldr	r3, [r10, #8]
	add	r8, r8, #16
	cmp	r3, r8
	ble	.L15
.L21:
	mov	r3, #0
	mov	r2, r4
	mov	r0, r9
	stm	sp, {r5, fp}
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	add	r3, r5, #32
	stm	sp, {r3, fp}
	mov	r2, r4
	mov	r3, #0
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, [sp, #32]
	mov	r2, r4
	add	r3, r3, r5
	stm	sp, {r3, fp}
	mov	r0, r9
	mov	r3, #0
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, [sp, #36]
	mov	r2, r4
	add	r3, r3, r5
	stm	sp, {r3, fp}
	mov	r0, r9
	mov	r3, #0
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, [sp, #12]
	mov	r2, r4
	str	r3, [sp, #4]
	mov	r0, r9
	mov	r3, #1
	str	r7, [sp]
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, [sp, #16]
	mov	r2, r4
	str	r3, [sp, #4]
	mov	r0, r9
	mov	r3, #2
	str	r6, [sp]
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, .L55+16
	ldr	r2, [r9, #4]
	ldr	r3, [r3]
	cmp	r2, r3
	addeq	r7, r7, #32
	beq	.L18
	ldr	r3, [sp, #40]
	ldr	r2, [sp, #12]
	add	r3, r7, r3
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, #1
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, [sp, #44]
	ldr	r2, [sp, #16]
	add	r3, r6, r3
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, #2
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, .L55+24
	ldr	r1, [r9, #4]
	ldr	r2, [r3]
	add	r3, r7, #32
	cmp	r1, r2
	movne	r7, r3
	beq	.L54
.L18:
	ldr	r2, .L55+28
	ldr	r3, [r9]
	ldr	r2, [r2]
	add	r5, r5, #64
	cmp	r3, r2
	add	r6, r6, #32
	bne	.L19
	ldr	r3, [sp, #20]
	mov	r0, r9
	str	r3, [sp]
	add	r2, sp, #140
	ldr	r3, [sp, #28]
	add	r1, sp, #100
	bl	decode_alpha_block
	cmp	r0, #0
	blt	.L1
	ldr	r2, [sp, #20]
	ldr	r3, [sp, #28]
	str	r2, [sp]
	ldr	r2, [sp, #52]
	mov	r0, r9
	add	r3, r3, r2
	add	r1, sp, #100
	add	r2, sp, #140
	bl	decode_alpha_block
	cmp	r0, #0
	blt	.L1
.L49:
	ldr	r3, [sp, #28]
	add	r3, r3, #64
	str	r3, [sp, #28]
	b	.L20
.L53:
	ldr	r3, [sp, #20]
	mov	r2, r4
	str	r3, [sp, #4]
	ldr	r3, [sp, #28]
	mov	r0, r9
	str	r3, [sp]
	add	r1, sp, #100
	mov	r3, #3
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #20]
	add	r3, r3, #32
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, #3
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r1, [sp, #52]
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #20]
	add	r3, r3, r1
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, #3
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r1, [sp, #64]
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #20]
	add	r3, r3, r1
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, #3
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	bge	.L49
	b	.L1
.L54:
	ldr	r2, [sp, #12]
	str	r3, [sp]
	str	r2, [sp, #4]
	mov	r3, #1
	mov	r2, r4
	mov	r0, r9
	add	r1, sp, #100
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	add	r3, r6, #32
	mov	r1, r3
	ldr	r3, [sp, #16]
	add	r0, sp, #100
	str	r3, [sp, #4]
	str	r1, [sp, #92]
	str	r1, [sp]
	mov	r3, #2
	mov	r1, r0
	mov	r2, r4
	mov	r0, r9
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r0, [sp, #68]
	ldr	r2, [sp, #12]
	add	r3, r7, r0
	add	r0, sp, #100
	mov	r1, r0
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, #1
	mov	r0, r9
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r2, [sp, #72]
	ldr	r3, [sp, #16]
	add	r6, r6, r2
	add	r0, sp, #100
	mov	r1, r0
	str	r3, [sp, #4]
	mov	r2, r4
	mov	r3, #2
	mov	r0, r9
	str	r6, [sp]
	bl	decode_dct_block
	cmp	r0, #0
	blt	.L1
	ldr	r6, [sp, #92]
	add	r7, r7, #64
	b	.L18
.L52:
	ldr	r0, [sp, #60]
	ldmib	r1, {r7, ip}
	add	r6, r0, r0, lsr #31
	ldr	r0, [sp, #248]
	add	r6, r0, r6, asr #1
	mul	r0, r7, r6
	mul	r6, ip, r6
	ldmib	r2, {r7, ip}
	add	r7, r7, r0, lsl #2
	add	r6, ip, r6, lsl #2
	b	.L13
.L15:
	ldr	r2, [sp, #60]
	ldr	r1, [sp, #84]
	ldr	r3, [r10, #4]
	add	r2, r2, r1
	cmp	r3, r2
	str	r2, [sp, #60]
	bgt	.L22
.L11:
	ldr	r3, [sp, #48]
	ldr	r2, [sp, #80]
	cmp	r3, r2
	ldr	r3, [sp, #56]
	ldr	r2, [sp, #76]
	add	r3, r3, r2
	str	r3, [sp, #56]
	bne	.L26
	mov	r0, #0
	b	.L1
.L51:
	bl	__stack_chk_fail
.L26:
	ldr	r7, [sp, #88]
	b	.L23
.L56:
	.align	2
.L55:
	.word	SHQ_NO_ALPHA
	.word	.LC1
	.word	AVERROR_INVALIDDATA
	.word	.LANCHOR0
	.word	SHQ_SUBSAMPLING_420
	.word	SHQ_DCT_ALPHA
	.word	SHQ_SUBSAMPLING_444
	.word	SHQ_RLE_ALPHA
	.size	decode_speedhq_field, .-decode_speedhq_field
	.comm	SHQ_SUBSAMPLING_444,4,4
	.comm	SHQ_SUBSAMPLING_420,4,4
	.comm	SHQ_RLE_ALPHA,4,4
	.comm	SHQ_NO_ALPHA,4,4
	.comm	SHQ_DCT_ALPHA,4,4
	.comm	AVERROR_INVALIDDATA,4,4
	.section	.rodata
	.align	2
	.set	.LANCHOR0,. + 0
.LC0:
	.word	1024
	.word	1024
	.word	1024
	.word	1024
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
