	.file	"extr_crypto4xx_core.c_crypto4xx_hw_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	crypto4xx_hw_init, @function
crypto4xx_hw_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 24
	.cfi_def_cfa_offset 48
	mov	rsi, QWORD PTR CRYPTO4XX_BYTE_ORDER_CFG[rip]
	add	rsi, QWORD PTR 16[rdi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	mov	edi, DWORD PTR PPC4XX_BYTE_ORDER[rip]
	lea	rbp, 4[rsp]
	call	writel@PLT
	mov	rsi, QWORD PTR CRYPTO4XX_PE_DMA_CFG[rip]
	mov	edi, 1
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	rsi, QWORD PTR CRYPTO4XX_PE_DMA_CFG[rip]
	mov	edi, 1
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR [rbx]
	mov	rsi, QWORD PTR CRYPTO4XX_PDR_BASE[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR [rbx]
	mov	rsi, QWORD PTR CRYPTO4XX_RDR_BASE[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_PRNG_CTRL_AUTO_EN[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_PRNG_CTRL[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	esi, 4
	mov	rdi, rbp
	call	get_random_bytes@PLT
	mov	edi, DWORD PTR 4[rsp]
	mov	rsi, QWORD PTR CRYPTO4XX_PRNG_SEED_L[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	esi, 4
	mov	rdi, rbp
	call	get_random_bytes@PLT
	mov	edi, DWORD PTR 4[rsp]
	mov	rsi, QWORD PTR CRYPTO4XX_PRNG_SEED_H[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_NUM_PD[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_RING_SIZE[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_RING_CTRL[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	rdi, QWORD PTR CRYPTO4XX_DEVICE_CTRL[rip]
	add	rdi, QWORD PTR 16[rbx]
	call	readl@PLT
	or	eax, DWORD PTR PPC4XX_DC_3DES_EN[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_DEVICE_CTRL[rip]
	mov	edi, eax
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR 4[rbx]
	mov	rsi, QWORD PTR CRYPTO4XX_GATH_RING_BASE[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR 8[rbx]
	mov	rsi, QWORD PTR CRYPTO4XX_SCAT_RING_BASE[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_GDR_SIZE[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_PART_RING_SIZE[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_SD_BUFFER_SIZE[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_PART_RING_CFG[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_INPUT_THRESHOLD[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_IO_THRESHOLD[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_PDR_BASE_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_RDR_BASE_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_PKT_SRC_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_PKT_DEST_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_SA_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_GATH_RING_BASE_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	xor	edi, edi
	mov	rsi, QWORD PTR CRYPTO4XX_SCAT_RING_BASE_UADDR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	rsi, QWORD PTR CRYPTO4XX_PE_DMA_CFG[rip]
	mov	edi, 1
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_INTERRUPT_CLR[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_INT_CLR[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_INT_DESCR_CNT[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_INT_DESCR_CNT[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_INT_DESCR_CNT[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_INT_DESCR_CNT[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	mov	edi, DWORD PTR PPC4XX_INT_CFG[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_INT_CFG[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	cmp	QWORD PTR 24[rbx], 0
	je	.L2
	mov	edi, DWORD PTR PPC4XX_INT_TIMEOUT_CNT_REVB[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_INT_TIMEOUT_CNT[rip]
	add	rsi, QWORD PTR 16[rbx]
	sal	edi, 10
	call	writel@PLT
	mov	rsi, QWORD PTR CRYPTO4XX_INT_EN[rip]
	add	rsi, QWORD PTR 16[rbx]
	mov	edi, DWORD PTR PPC4XX_PD_DONE_INT[rip]
	or	edi, DWORD PTR PPC4XX_TMO_ERR_INT[rip]
	call	writel@PLT
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L7
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edi, DWORD PTR PPC4XX_PD_DONE_INT[rip]
	mov	rsi, QWORD PTR CRYPTO4XX_INT_EN[rip]
	add	rsi, QWORD PTR 16[rbx]
	call	writel@PLT
	jmp	.L1
.L7:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	crypto4xx_hw_init, .-crypto4xx_hw_init
	.comm	PPC4XX_TMO_ERR_INT,4,4
	.comm	PPC4XX_SD_BUFFER_SIZE,4,4
	.comm	PPC4XX_SDR_SIZE,4,4
	.comm	PPC4XX_PRNG_CTRL_AUTO_EN,4,4
	.comm	PPC4XX_PD_SIZE,4,4
	.comm	PPC4XX_PD_DONE_INT,4,4
	.comm	PPC4XX_OUTPUT_THRESHOLD,4,4
	.comm	PPC4XX_NUM_PD,4,4
	.comm	PPC4XX_INT_TIMEOUT_CNT_REVB,4,4
	.comm	PPC4XX_INT_DESCR_CNT,4,4
	.comm	PPC4XX_INT_CFG,4,4
	.comm	PPC4XX_INTERRUPT_CLR,4,4
	.comm	PPC4XX_INPUT_THRESHOLD,4,4
	.comm	PPC4XX_GDR_SIZE,4,4
	.comm	PPC4XX_DC_3DES_EN,4,4
	.comm	PPC4XX_BYTE_ORDER,4,4
	.comm	CRYPTO4XX_SCAT_RING_BASE_UADDR,8,8
	.comm	CRYPTO4XX_SCAT_RING_BASE,8,8
	.comm	CRYPTO4XX_SA_UADDR,8,8
	.comm	CRYPTO4XX_RING_SIZE,8,8
	.comm	CRYPTO4XX_RING_CTRL,8,8
	.comm	CRYPTO4XX_RDR_BASE_UADDR,8,8
	.comm	CRYPTO4XX_RDR_BASE,8,8
	.comm	CRYPTO4XX_PRNG_SEED_L,8,8
	.comm	CRYPTO4XX_PRNG_SEED_H,8,8
	.comm	CRYPTO4XX_PRNG_CTRL,8,8
	.comm	CRYPTO4XX_PKT_SRC_UADDR,8,8
	.comm	CRYPTO4XX_PKT_DEST_UADDR,8,8
	.comm	CRYPTO4XX_PE_DMA_CFG,8,8
	.comm	CRYPTO4XX_PDR_BASE_UADDR,8,8
	.comm	CRYPTO4XX_PDR_BASE,8,8
	.comm	CRYPTO4XX_PART_RING_SIZE,8,8
	.comm	CRYPTO4XX_PART_RING_CFG,8,8
	.comm	CRYPTO4XX_IO_THRESHOLD,8,8
	.comm	CRYPTO4XX_INT_TIMEOUT_CNT,8,8
	.comm	CRYPTO4XX_INT_EN,8,8
	.comm	CRYPTO4XX_INT_DESCR_CNT,8,8
	.comm	CRYPTO4XX_INT_CLR,8,8
	.comm	CRYPTO4XX_INT_CFG,8,8
	.comm	CRYPTO4XX_GATH_RING_BASE_UADDR,8,8
	.comm	CRYPTO4XX_GATH_RING_BASE,8,8
	.comm	CRYPTO4XX_DEVICE_CTRL,8,8
	.comm	CRYPTO4XX_BYTE_ORDER_CFG,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_crypto4xx_core.c_crypto4xx_hw_init.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	crypto4xx_hw_init, %function
crypto4xx_hw_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	mov	r4, r0
	ldr	r3, .L8
	ldr	r1, [r0, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+4
	ldr	r5, .L8+8
	ldr	r0, [r3]
	ldr	r3, .L8+12
	sub	sp, sp, #12
	add	r1, r1, r2
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	writel
	ldr	r3, [r5]
	ldr	r1, [r4, #12]
	mov	r0, #1
	add	r1, r1, r3
	bl	writel
	ldr	r3, [r5]
	ldr	r1, [r4, #12]
	mov	r0, #1
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+16
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [r4]
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+20
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [r4]
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+24
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+28
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	mov	r1, #4
	mov	r0, sp
	bl	get_random_bytes
	ldr	r3, .L8+32
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [sp]
	add	r1, r1, r3
	bl	writel
	mov	r1, #4
	mov	r0, sp
	bl	get_random_bytes
	ldr	r3, .L8+36
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [sp]
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+40
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+44
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	ldr	r3, .L8+48
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r7, .L8+52
	add	r1, r1, r3
	mov	r0, #0
	bl	writel
	ldr	r3, [r7]
	ldr	r0, [r4, #12]
	ldr	r6, .L8+56
	add	r0, r0, r3
	bl	readl
	ldr	r3, .L8+60
	ldr	r2, [r7]
	ldr	r3, [r3]
	ldr	r1, [r4, #12]
	orr	r0, r0, r3
	add	r1, r1, r2
	bl	writel
	ldr	r3, .L8+64
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [r4, #4]
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+68
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [r4, #8]
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+72
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+76
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	ldr	r3, .L8+80
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+84
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	ldr	r3, .L8+88
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+92
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	ldr	r3, .L8+96
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+100
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+104
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+108
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+112
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+116
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+120
	ldr	r1, [r4, #12]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	bl	writel
	ldr	r3, [r5]
	ldr	r1, [r4, #12]
	mov	r0, #1
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+124
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+128
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	ldr	r5, .L8+132
	ldr	r3, [r6]
	ldr	r1, [r4, #12]
	ldr	r0, [r5]
	add	r1, r1, r3
	bl	writel
	ldr	r3, [r6]
	ldr	r1, [r4, #12]
	ldr	r0, [r5]
	add	r1, r1, r3
	bl	writel
	ldr	r3, .L8+136
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+140
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	ldr	r3, [r4, #16]
	cmp	r3, #0
	beq	.L2
	ldr	r2, .L8+144
	ldr	r3, .L8+148
	ldr	r0, [r2]
	ldr	r3, [r3]
	ldr	r1, [r4, #12]
	lsl	r0, r0, #10
	add	r1, r1, r3
	bl	writel
	ldr	r2, .L8+152
	ldr	r0, .L8+156
	ldr	r3, .L8+160
	ldr	r1, [r4, #12]
	ldr	r2, [r2]
	ldr	r0, [r0]
	ldr	r3, [r3]
	add	r1, r1, r2
	orr	r0, r0, r3
	bl	writel
.L1:
	ldr	r3, .L8+12
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L7
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L2:
	ldr	r3, .L8+152
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	ldr	r3, .L8+156
	add	r1, r1, r2
	ldr	r0, [r3]
	bl	writel
	b	.L1
.L7:
	bl	__stack_chk_fail
.L9:
	.align	2
.L8:
	.word	CRYPTO4XX_BYTE_ORDER_CFG
	.word	PPC4XX_BYTE_ORDER
	.word	CRYPTO4XX_PE_DMA_CFG
	.word	.LC0
	.word	CRYPTO4XX_PDR_BASE
	.word	CRYPTO4XX_RDR_BASE
	.word	CRYPTO4XX_PRNG_CTRL
	.word	PPC4XX_PRNG_CTRL_AUTO_EN
	.word	CRYPTO4XX_PRNG_SEED_L
	.word	CRYPTO4XX_PRNG_SEED_H
	.word	CRYPTO4XX_RING_SIZE
	.word	PPC4XX_NUM_PD
	.word	CRYPTO4XX_RING_CTRL
	.word	CRYPTO4XX_DEVICE_CTRL
	.word	CRYPTO4XX_INT_DESCR_CNT
	.word	PPC4XX_DC_3DES_EN
	.word	CRYPTO4XX_GATH_RING_BASE
	.word	CRYPTO4XX_SCAT_RING_BASE
	.word	CRYPTO4XX_PART_RING_SIZE
	.word	PPC4XX_GDR_SIZE
	.word	CRYPTO4XX_PART_RING_CFG
	.word	PPC4XX_SD_BUFFER_SIZE
	.word	CRYPTO4XX_IO_THRESHOLD
	.word	PPC4XX_INPUT_THRESHOLD
	.word	CRYPTO4XX_PDR_BASE_UADDR
	.word	CRYPTO4XX_RDR_BASE_UADDR
	.word	CRYPTO4XX_PKT_SRC_UADDR
	.word	CRYPTO4XX_PKT_DEST_UADDR
	.word	CRYPTO4XX_SA_UADDR
	.word	CRYPTO4XX_GATH_RING_BASE_UADDR
	.word	CRYPTO4XX_SCAT_RING_BASE_UADDR
	.word	CRYPTO4XX_INT_CLR
	.word	PPC4XX_INTERRUPT_CLR
	.word	PPC4XX_INT_DESCR_CNT
	.word	CRYPTO4XX_INT_CFG
	.word	PPC4XX_INT_CFG
	.word	PPC4XX_INT_TIMEOUT_CNT_REVB
	.word	CRYPTO4XX_INT_TIMEOUT_CNT
	.word	CRYPTO4XX_INT_EN
	.word	PPC4XX_PD_DONE_INT
	.word	PPC4XX_TMO_ERR_INT
	.size	crypto4xx_hw_init, .-crypto4xx_hw_init
	.comm	PPC4XX_TMO_ERR_INT,4,4
	.comm	PPC4XX_SD_BUFFER_SIZE,4,4
	.comm	PPC4XX_SDR_SIZE,4,4
	.comm	PPC4XX_PRNG_CTRL_AUTO_EN,4,4
	.comm	PPC4XX_PD_SIZE,4,4
	.comm	PPC4XX_PD_DONE_INT,4,4
	.comm	PPC4XX_OUTPUT_THRESHOLD,4,4
	.comm	PPC4XX_NUM_PD,4,4
	.comm	PPC4XX_INT_TIMEOUT_CNT_REVB,4,4
	.comm	PPC4XX_INT_DESCR_CNT,4,4
	.comm	PPC4XX_INT_CFG,4,4
	.comm	PPC4XX_INTERRUPT_CLR,4,4
	.comm	PPC4XX_INPUT_THRESHOLD,4,4
	.comm	PPC4XX_GDR_SIZE,4,4
	.comm	PPC4XX_DC_3DES_EN,4,4
	.comm	PPC4XX_BYTE_ORDER,4,4
	.comm	CRYPTO4XX_SCAT_RING_BASE_UADDR,4,4
	.comm	CRYPTO4XX_SCAT_RING_BASE,4,4
	.comm	CRYPTO4XX_SA_UADDR,4,4
	.comm	CRYPTO4XX_RING_SIZE,4,4
	.comm	CRYPTO4XX_RING_CTRL,4,4
	.comm	CRYPTO4XX_RDR_BASE_UADDR,4,4
	.comm	CRYPTO4XX_RDR_BASE,4,4
	.comm	CRYPTO4XX_PRNG_SEED_L,4,4
	.comm	CRYPTO4XX_PRNG_SEED_H,4,4
	.comm	CRYPTO4XX_PRNG_CTRL,4,4
	.comm	CRYPTO4XX_PKT_SRC_UADDR,4,4
	.comm	CRYPTO4XX_PKT_DEST_UADDR,4,4
	.comm	CRYPTO4XX_PE_DMA_CFG,4,4
	.comm	CRYPTO4XX_PDR_BASE_UADDR,4,4
	.comm	CRYPTO4XX_PDR_BASE,4,4
	.comm	CRYPTO4XX_PART_RING_SIZE,4,4
	.comm	CRYPTO4XX_PART_RING_CFG,4,4
	.comm	CRYPTO4XX_IO_THRESHOLD,4,4
	.comm	CRYPTO4XX_INT_TIMEOUT_CNT,4,4
	.comm	CRYPTO4XX_INT_EN,4,4
	.comm	CRYPTO4XX_INT_DESCR_CNT,4,4
	.comm	CRYPTO4XX_INT_CLR,4,4
	.comm	CRYPTO4XX_INT_CFG,4,4
	.comm	CRYPTO4XX_GATH_RING_BASE_UADDR,4,4
	.comm	CRYPTO4XX_GATH_RING_BASE,4,4
	.comm	CRYPTO4XX_DEVICE_CTRL,4,4
	.comm	CRYPTO4XX_BYTE_ORDER_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
