	.file	"extr_bpf_jit_comp32.c_emit_ia32_alu_r.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	emit_ia32_alu_r, @function
emit_ia32_alu_r:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r10d, edx
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, r8d
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, ecx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, r9d
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR 88[rsp]
	mov	r11d, DWORD PTR 80[rsp]
	mov	DWORD PTR 4[rsp], edi
	mov	DWORD PTR [rsp], esi
	mov	r14, QWORD PTR [rax]
	test	r11d, r11d
	je	.L2
	test	r9d, r9d
	je	.L44
	mov	edi, r8d
	mov	r15d, DWORD PTR IA32_EBP[rip]
	mov	DWORD PTR 8[rsp], edx
	mov	r13d, DWORD PTR IA32_EDX[rip]
	call	STACK_VAR@PLT
	mov	edx, DWORD PTR IA32_EAX[rip]
	mov	esi, r15d
	mov	edi, 64
	mov	r12d, eax
	call	add_2reg@PLT
	mov	edx, r12d
	mov	edi, 139
	mov	esi, eax
	call	EMIT3@PLT
	mov	r12d, DWORD PTR IA32_EAX[rip]
	mov	r10d, DWORD PTR 8[rsp]
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L2:
	test	r9d, r9d
	je	.L17
	mov	r13d, DWORD PTR IA32_EDX[rip]
	mov	r15d, DWORD PTR IA32_EBP[rip]
.L19:
	mov	edi, ebp
	mov	DWORD PTR 12[rsp], r10d
	call	STACK_VAR@PLT
	mov	edx, r13d
	mov	esi, r15d
	mov	edi, 64
	mov	DWORD PTR 8[rsp], eax
	call	add_2reg@PLT
	mov	r9d, DWORD PTR 8[rsp]
	mov	edi, 139
	mov	esi, eax
	mov	edx, r9d
	call	EMIT3@PLT
	mov	r10d, DWORD PTR 12[rsp]
	mov	edi, r10d
	call	BPF_OP@PLT
	add	eax, -128
	cmp	eax, 4
	ja	.L12
	lea	rdx, .L13[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L13:
	.long	.L11-.L13
	.long	.L10-.L13
	.long	.L9-.L13
	.long	.L8-.L13
	.long	.L6-.L13
	.text
	.p2align 4,,10
	.p2align 3
.L44:
	mov	edi, r8d
	mov	DWORD PTR 8[rsp], edx
	call	STACK_VAR@PLT
	mov	edx, DWORD PTR IA32_EAX[rip]
	mov	esi, DWORD PTR IA32_EBP[rip]
	mov	edi, 64
	mov	r13d, eax
	call	add_2reg@PLT
	mov	edx, r13d
	mov	edi, 139
	mov	esi, eax
	call	EMIT3@PLT
	mov	r12d, DWORD PTR IA32_EAX[rip]
	mov	r10d, DWORD PTR 8[rsp]
.L17:
	mov	edi, r10d
	call	BPF_OP@PLT
	add	eax, -128
	cmp	eax, 4
	ja	.L5
	lea	rdx, .L7[rip]
	mov	r13d, ebp
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L7:
	.long	.L11-.L7
	.long	.L10-.L7
	.long	.L9-.L7
	.long	.L8-.L7
	.long	.L6-.L7
	.text
	.p2align 4,,10
	.p2align 3
.L8:
	mov	esi, r13d
	mov	edi, 192
	mov	edx, r12d
	call	add_2reg@PLT
	mov	edi, 33
	mov	esi, eax
	call	EMIT2@PLT
.L15:
	test	ebx, ebx
	je	.L5
	mov	r15d, DWORD PTR IA32_EBP[rip]
.L12:
	mov	edi, ebp
	call	STACK_VAR@PLT
	mov	edx, r13d
	mov	esi, r15d
	mov	edi, 64
	mov	r12d, eax
	call	add_2reg@PLT
	mov	edx, r12d
	mov	edi, 137
	mov	esi, eax
	call	EMIT3@PLT
.L5:
	mov	rax, QWORD PTR 88[rsp]
	mov	QWORD PTR [rax], r14
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	r9d, DWORD PTR [rsp]
	mov	edx, r12d
	mov	esi, r13d
	mov	edi, 192
	test	r9d, r9d
	je	.L14
	mov	r8d, DWORD PTR 4[rsp]
	test	r8d, r8d
	je	.L14
	call	add_2reg@PLT
	mov	edi, 17
	mov	esi, eax
	call	EMIT2@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L11:
	mov	esi, r13d
	mov	edx, r12d
	mov	edi, 192
	call	add_2reg@PLT
	mov	edi, 49
	mov	esi, eax
	call	EMIT2@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L10:
	mov	ecx, DWORD PTR [rsp]
	mov	edx, r12d
	mov	esi, r13d
	mov	edi, 192
	test	ecx, ecx
	je	.L16
	mov	eax, DWORD PTR 4[rsp]
	test	eax, eax
	je	.L16
	call	add_2reg@PLT
	mov	edi, 25
	mov	esi, eax
	call	EMIT2@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L9:
	mov	esi, r13d
	mov	edx, r12d
	mov	edi, 192
	call	add_2reg@PLT
	mov	edi, 9
	mov	esi, eax
	call	EMIT2@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L14:
	call	add_2reg@PLT
	mov	edi, 1
	mov	esi, eax
	call	EMIT2@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L16:
	call	add_2reg@PLT
	mov	edi, 41
	mov	esi, eax
	call	EMIT2@PLT
	jmp	.L15
	.cfi_endproc
.LFE0:
	.size	emit_ia32_alu_r, .-emit_ia32_alu_r
	.comm	IA32_EDX,4,4
	.comm	IA32_EBP,4,4
	.comm	IA32_EAX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_bpf_jit_comp32.c_emit_ia32_alu_r.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	emit_ia32_alu_r, %function
emit_ia32_alu_r:
	@ args = 16, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #12
	ldr	ip, [sp, #56]
	ldr	r8, [sp, #60]
	cmp	ip, #0
	mov	r6, r0
	mov	r7, r1
	mov	r5, r2
	mov	r4, r3
	ldr	fp, [r8]
	beq	.L2
	ldr	r3, .L33
	ldr	r2, [sp, #52]
	ldr	r3, [r3]
	cmp	r2, #0
	str	r3, [sp]
	beq	.L32
	ldr	r3, .L33+4
	ldr	ip, .L33+8
	ldr	r9, [r3]
	ldr	r2, [sp]
	mov	r1, r9
	mov	r0, #64
	ldr	r10, [ip]
	bl	add_2reg
	mov	r1, r0
	ldr	r0, [sp, #48]
	str	r1, [sp, #4]
	bl	STACK_VAR
	ldr	r3, [sp]
	mov	r2, r0
	ldr	r1, [sp, #4]
	mov	r0, #139
	str	r3, [sp, #48]
	bl	EMIT3
	b	.L19
.L2:
	ldr	r3, [sp, #52]
	cmp	r3, #0
	beq	.L17
	ldr	r2, .L33+8
	ldr	r3, .L33+4
	ldr	r10, [r2]
	ldr	r9, [r3]
.L19:
	mov	r2, r10
	mov	r1, r9
	mov	r0, #64
	bl	add_2reg
	mov	r1, r0
	mov	r0, r4
	str	r1, [sp]
	bl	STACK_VAR
	ldr	r1, [sp]
	mov	r2, r0
	mov	r0, #139
	bl	EMIT3
	mov	r0, r5
	bl	BPF_OP
	sub	r0, r0, #128
	cmp	r0, #4
	ldrls	pc, [pc, r0, asl #2]
	b	.L12
.L13:
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L6
.L32:
	ldr	r3, .L33+4
	ldr	r9, [sp]
	ldr	r1, [r3]
	mov	r2, r9
	mov	r0, #64
	bl	add_2reg
	mov	r10, r0
	ldr	r0, [sp, #48]
	bl	STACK_VAR
	mov	r1, r10
	mov	r2, r0
	mov	r0, #139
	str	r9, [sp, #48]
	bl	EMIT3
.L17:
	mov	r0, r5
	bl	BPF_OP
	sub	r0, r0, #128
	cmp	r0, #4
	ldrls	pc, [pc, r0, asl #2]
	b	.L5
.L7:
	.word	.L20
	.word	.L21
	.word	.L22
	.word	.L23
	.word	.L24
.L24:
	mov	r10, r4
.L6:
	cmp	r7, #0
	cmpne	r6, #0
	mov	r1, r10
	mov	r0, #192
	ldr	r2, [sp, #48]
	beq	.L14
	bl	add_2reg
	mov	r1, r0
	mov	r0, #17
	bl	EMIT2
.L15:
	ldr	r3, [sp, #52]
	cmp	r3, #0
	beq	.L5
	ldr	r3, .L33+4
	ldr	r9, [r3]
.L12:
	mov	r2, r10
	mov	r1, r9
	mov	r0, #64
	bl	add_2reg
	mov	r1, r0
	mov	r0, r4
	mov	r4, r1
	bl	STACK_VAR
	mov	r1, r4
	mov	r2, r0
	mov	r0, #137
	bl	EMIT3
.L5:
	str	fp, [r8]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L22:
	mov	r10, r4
.L9:
	mov	r1, r10
	ldr	r2, [sp, #48]
	mov	r0, #192
	bl	add_2reg
	mov	r1, r0
	mov	r0, #9
	bl	EMIT2
	b	.L15
.L20:
	mov	r10, r4
.L11:
	mov	r1, r10
	ldr	r2, [sp, #48]
	mov	r0, #192
	bl	add_2reg
	mov	r1, r0
	mov	r0, #49
	bl	EMIT2
	b	.L15
.L21:
	mov	r10, r4
.L10:
	cmp	r7, #0
	cmpne	r6, #0
	mov	r1, r10
	mov	r0, #192
	ldr	r2, [sp, #48]
	beq	.L16
	bl	add_2reg
	mov	r1, r0
	mov	r0, #25
	bl	EMIT2
	b	.L15
.L23:
	mov	r10, r4
.L8:
	mov	r1, r10
	ldr	r2, [sp, #48]
	mov	r0, #192
	bl	add_2reg
	mov	r1, r0
	mov	r0, #33
	bl	EMIT2
	b	.L15
.L14:
	bl	add_2reg
	mov	r1, r0
	mov	r0, #1
	bl	EMIT2
	b	.L15
.L16:
	bl	add_2reg
	mov	r1, r0
	mov	r0, #41
	bl	EMIT2
	b	.L15
.L34:
	.align	2
.L33:
	.word	IA32_EAX
	.word	IA32_EBP
	.word	IA32_EDX
	.size	emit_ia32_alu_r, .-emit_ia32_alu_r
	.comm	IA32_EDX,4,4
	.comm	IA32_EBP,4,4
	.comm	IA32_EAX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
