	.file	"extr_rtc_time.c_rtc_clk_wait_for_slow_cycle.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	rtc_clk_wait_for_slow_cycle
	.type	rtc_clk_wait_for_slow_cycle, @function
rtc_clk_wait_for_slow_cycle:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xor	edi, edi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	ebp, DWORD PTR TIMG_RTC_CALI_START_CYCLING[rip]
	or	ebp, DWORD PTR TIMG_RTC_CALI_START[rip]
	call	TIMG_RTCCALICFG_REG@PLT
	mov	esi, ebp
	mov	edi, eax
	call	REG_CLR_BIT@PLT
	mov	ebp, DWORD PTR TIMG_RTC_CALI_RDY[rip]
	xor	edi, edi
	call	TIMG_RTCCALICFG_REG@PLT
	mov	edi, eax
	mov	esi, ebp
	call	REG_CLR_BIT@PLT
	mov	r12d, DWORD PTR RTC_CAL_RTC_MUX[rip]
	mov	ebp, DWORD PTR TIMG_RTC_CALI_CLK_SEL[rip]
	xor	edi, edi
	call	TIMG_RTCCALICFG_REG@PLT
	mov	edi, eax
	mov	edx, r12d
	mov	esi, ebp
	call	REG_SET_FIELD@PLT
	mov	ebp, DWORD PTR TIMG_RTC_CALI_MAX[rip]
	xor	edi, edi
	call	TIMG_RTCCALICFG_REG@PLT
	xor	edx, edx
	mov	esi, ebp
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	ebp, DWORD PTR TIMG_RTC_CALI_START[rip]
	xor	edi, edi
	call	TIMG_RTCCALICFG_REG@PLT
	mov	edi, eax
	mov	esi, ebp
	call	REG_SET_BIT@PLT
	mov	edi, 1
	call	ets_delay_us@PLT
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L3:
	mov	edi, 1
	call	ets_delay_us@PLT
.L2:
	xor	edi, edi
	mov	ebp, DWORD PTR TIMG_RTC_CALI_RDY[rip]
	call	TIMG_RTCCALICFG_REG@PLT
	mov	edi, eax
	mov	esi, ebp
	call	GET_PERI_REG_MASK@PLT
	test	eax, eax
	je	.L3
	add	rsp, 8
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	rtc_clk_wait_for_slow_cycle, .-rtc_clk_wait_for_slow_cycle
	.comm	TIMG_RTC_CALI_START_CYCLING,4,4
	.comm	TIMG_RTC_CALI_START,4,4
	.comm	TIMG_RTC_CALI_RDY,4,4
	.comm	TIMG_RTC_CALI_MAX,4,4
	.comm	TIMG_RTC_CALI_CLK_SEL,4,4
	.comm	RTC_CAL_RTC_MUX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rtc_time.c_rtc_clk_wait_for_slow_cycle.c"
	.text
	.align	2
	.global	rtc_clk_wait_for_slow_cycle
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtc_clk_wait_for_slow_cycle, %function
rtc_clk_wait_for_slow_cycle:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r0, #0
	bl	TIMG_RTCCALICFG_REG
	ldr	r5, .L7
	ldr	r2, .L7+4
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r4, .L7+8
	orr	r1, r1, r3
	bl	REG_CLR_BIT
	mov	r0, #0
	bl	TIMG_RTCCALICFG_REG
	ldr	r1, [r4]
	bl	REG_CLR_BIT
	mov	r0, #0
	bl	TIMG_RTCCALICFG_REG
	ldr	r3, .L7+12
	ldr	r2, .L7+16
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	REG_SET_FIELD
	mov	r0, #0
	bl	TIMG_RTCCALICFG_REG
	ldr	r3, .L7+20
	mov	r2, #0
	ldr	r1, [r3]
	bl	REG_SET_FIELD
	mov	r0, #0
	bl	TIMG_RTCCALICFG_REG
	ldr	r1, [r5]
	bl	REG_SET_BIT
	mov	r0, #1
	bl	ets_delay_us
.L2:
	mov	r0, #0
	bl	TIMG_RTCCALICFG_REG
	ldr	r1, [r4]
	bl	GET_PERI_REG_MASK
	cmp	r0, #0
	popne	{r4, r5, r6, pc}
	mov	r0, #1
	bl	ets_delay_us
	b	.L2
.L8:
	.align	2
.L7:
	.word	TIMG_RTC_CALI_START
	.word	TIMG_RTC_CALI_START_CYCLING
	.word	TIMG_RTC_CALI_RDY
	.word	TIMG_RTC_CALI_CLK_SEL
	.word	RTC_CAL_RTC_MUX
	.word	TIMG_RTC_CALI_MAX
	.size	rtc_clk_wait_for_slow_cycle, .-rtc_clk_wait_for_slow_cycle
	.comm	TIMG_RTC_CALI_START_CYCLING,4,4
	.comm	TIMG_RTC_CALI_START,4,4
	.comm	TIMG_RTC_CALI_RDY,4,4
	.comm	TIMG_RTC_CALI_MAX,4,4
	.comm	TIMG_RTC_CALI_CLK_SEL,4,4
	.comm	RTC_CAL_RTC_MUX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
