	.file	"extr_tcache.c_tcache_event_hard.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	tcache_event_hard
	.type	tcache_event_hard, @function
tcache_event_hard:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rsi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	rbx, QWORD PTR [rsi]
	mov	rax, QWORD PTR 16[rsi]
	lea	rdx, [rbx+rbx*2]
	lea	r12, [rax+rdx*4]
	mov	ecx, DWORD PTR [r12]
	mov	eax, DWORD PTR 4[r12]
	test	ecx, ecx
	jle	.L2
	sub	eax, ecx
	sar	ecx, 2
	mov	r13, QWORD PTR tcache_bin_info[rip]
	add	ecx, eax
	cmp	QWORD PTR NBINS[rip], rbx
	ja	.L12
	mov	r8, rsi
	mov	rdx, rbx
	mov	rsi, r12
	call	tcache_bin_flush_large@PLT
.L4:
	mov	eax, DWORD PTR 8[r12]
	lea	ecx, 1[rax]
	mov	eax, DWORD PTR 0[r13+rbx*4]
	mov	rbx, QWORD PTR 0[rbp]
	sar	eax, cl
	mov	edx, eax
	mov	eax, DWORD PTR 4[r12]
	test	edx, edx
	jle	.L5
	mov	DWORD PTR 8[r12], ecx
.L5:
	add	rbx, 1
	cmp	rbx, QWORD PTR nhbins[rip]
	mov	DWORD PTR [r12], eax
	mov	QWORD PTR 0[rbp], rbx
	jne	.L6
	mov	QWORD PTR 0[rbp], 0
.L6:
	mov	QWORD PTR 8[rbp], 0
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	r8d, ecx
	mov	rdx, r12
	mov	rcx, rbx
	call	tcache_bin_flush_small@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L2:
	je	.L5
	mov	edx, DWORD PTR 8[r12]
	cmp	edx, 1
	jle	.L5
	sub	edx, 1
	mov	DWORD PTR 8[r12], edx
	jmp	.L5
	.cfi_endproc
.LFE0:
	.size	tcache_event_hard, .-tcache_event_hard
	.comm	tcache_bin_info,8,8
	.comm	nhbins,8,8
	.comm	NBINS,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tcache.c_tcache_event_hard.c"
	.text
	.align	2
	.global	tcache_event_hard
	.syntax unified
	.arm
	.fpu softvfp
	.type	tcache_event_hard, %function
tcache_event_hard:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, lr}
	ldr	r4, [r1]
	ldr	r7, [r1, #8]
	add	r6, r4, r4, lsl #1
	lsl	r8, r6, #2
	ldr	r3, [r7, r8]
	add	r6, r7, r6, lsl #2
	cmp	r3, #0
	mov	r5, r1
	ldr	r2, [r6, #4]
	sub	sp, sp, #12
	ble	.L2
	ldr	ip, .L11
	sub	r2, r2, r3
	ldr	ip, [ip]
	add	r3, r2, r3, asr #2
	ldr	r2, .L11+4
	cmp	ip, r4
	ldr	r9, [r2]
	bhi	.L10
	str	r1, [sp]
	mov	r2, r4
	mov	r1, r6
	bl	tcache_bin_flush_large
.L4:
	ldr	r3, [r6, #8]
	ldr	r2, [r9, r4, lsl #2]
	add	r3, r3, #1
	asr	r2, r2, r3
	cmp	r2, #0
	ldr	r4, [r5]
	ldr	r2, [r6, #4]
	ble	.L5
.L8:
	str	r3, [r6, #8]
.L5:
	ldr	r3, .L11+8
	add	r4, r4, #1
	ldr	r3, [r3]
	str	r2, [r7, r8]
	cmp	r4, r3
	moveq	r3, #0
	str	r4, [r5]
	streq	r3, [r5]
	mov	r3, #0
	str	r3, [r5, #4]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, pc}
.L10:
	str	r3, [sp]
	mov	r2, r6
	mov	r3, r4
	bl	tcache_bin_flush_small
	b	.L4
.L2:
	beq	.L5
	ldr	r3, [r6, #8]
	cmp	r3, #1
	ble	.L5
	sub	r3, r3, #1
	b	.L8
.L12:
	.align	2
.L11:
	.word	NBINS
	.word	tcache_bin_info
	.word	nhbins
	.size	tcache_event_hard, .-tcache_event_hard
	.comm	tcache_bin_info,4,4
	.comm	nhbins,4,4
	.comm	NBINS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
