	.file	"extr_hda_generic.c_check_dyn_adc_switch.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"enabling ADC switching\n"
.LC1:
	.string	"reducing to a single ADC\n"
	.text
	.p2align 4
	.type	check_dyn_adc_switch, @function
check_dyn_adc_switch:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rbx, QWORD PTR [rdi]
	mov	r10d, DWORD PTR [rbx]
	mov	r11d, DWORD PTR 56[rbx]
	test	r10d, r10d
	jle	.L2
	lea	edi, -1[r11]
	xor	r9d, r9d
	lea	r14d, -1[r10]
	xor	r13d, r13d
	sal	rdi, 3
	xor	ebp, ebp
	mov	r15d, 1
	mov	ecx, r9d
	test	r11d, r11d
	jle	.L6
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rax, QWORD PTR 40[rbx]
	lea	rsi, 0[0+r9*8]
	lea	r8, 8[rdi+rax]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L40:
	add	rax, 8
	cmp	r8, rax
	je	.L6
.L5:
	mov	rdx, QWORD PTR [rax]
	cmp	QWORD PTR [rdx+rsi], 0
	jne	.L40
	lea	rax, 1[r9]
	cmp	r9, r14
	je	.L7
.L41:
	mov	r9, rax
	mov	ecx, r9d
	test	r11d, r11d
	jg	.L8
	.p2align 4,,10
	.p2align 3
.L6:
	mov	eax, r15d
	add	r13d, 1
	sal	eax, cl
	or	ebp, eax
	lea	rax, 1[r9]
	cmp	r9, r14
	jne	.L41
.L7:
	test	ebp, ebp
	je	.L2
	cmp	r13d, r10d
	je	.L16
	mov	DWORD PTR 12[rsp], 0
	xor	r15d, r15d
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L19:
	add	DWORD PTR 12[rsp], 1
.L17:
	add	r15, 1
	cmp	DWORD PTR [rbx], r15d
	jle	.L42
.L21:
	mov	eax, 1
	mov	ecx, r15d
	sal	eax, cl
	test	eax, ebp
	je	.L17
	cmp	DWORD PTR 12[rsp], r15d
	je	.L19
	mov	rax, QWORD PTR 48[rbx]
	movsx	r8, DWORD PTR 12[rsp]
	mov	edx, DWORD PTR [rax+r15*4]
	mov	DWORD PTR [rax+r8*4], edx
	mov	edx, DWORD PTR 56[rbx]
	test	edx, edx
	jle	.L19
	lea	rax, 0[0+r15*8]
	lea	r13, 0[0+r8*8]
	xor	r14d, r14d
	mov	QWORD PTR [rsp], rax
	mov	rax, QWORD PTR 40[rbx]
	.p2align 4,,10
	.p2align 3
.L20:
	mov	rax, QWORD PTR [rax+r14*8]
	mov	rdi, r12
	mov	rsi, QWORD PTR [rax+r13]
	call	invalidate_nid_path@PLT
	mov	rax, QWORD PTR 40[rbx]
	mov	rcx, QWORD PTR [rsp]
	mov	rdi, QWORD PTR [rax+r14*8]
	add	r14, 1
	lea	rsi, [rdi+rcx]
	mov	r9, QWORD PTR [rsi]
	mov	QWORD PTR [rdi+r13], r9
	mov	QWORD PTR [rsi], 0
	cmp	DWORD PTR 56[rbx], r14d
	jg	.L20
	jmp	.L19
.L42:
	mov	eax, DWORD PTR 12[rsp]
	mov	r11d, DWORD PTR 56[rbx]
	mov	DWORD PTR [rbx], eax
.L16:
	cmp	r11d, 1
	je	.L22
.L44:
	cmp	r11d, 2
	je	.L43
.L23:
	mov	eax, DWORD PTR 16[rbx]
	test	eax, eax
	jne	.L29
	cmp	QWORD PTR 24[rbx], 0
	je	.L29
	mov	DWORD PTR [rbx], 1
.L29:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
.L2:
	.cfi_restore_state
	xor	edi, edi
	test	r11d, r11d
	jle	.L11
	.p2align 4,,10
	.p2align 3
.L10:
	test	r10d, r10d
	jle	.L13
	mov	rax, QWORD PTR 40[rbx]
	lea	esi, -1[r10]
	mov	rcx, QWORD PTR [rax+rdi*8]
	xor	eax, eax
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L12:
	lea	rdx, 1[rax]
	cmp	rsi, rax
	je	.L13
	mov	rax, rdx
.L14:
	cmp	QWORD PTR [rcx+rax*8], 0
	je	.L12
	mov	rdx, QWORD PTR 8[rbx]
	mov	DWORD PTR [rdx+rdi*4], eax
.L13:
	add	rdi, 1
	cmp	DWORD PTR 56[rbx], edi
	jle	.L11
	mov	r10d, DWORD PTR [rbx]
	jmp	.L10
.L11:
	lea	rsi, .LC0[rip]
	mov	rdi, r12
	call	codec_dbg@PLT
	mov	r11d, DWORD PTR 56[rbx]
	mov	DWORD PTR 16[rbx], 1
	cmp	r11d, 1
	jne	.L44
.L22:
	lea	rsi, .LC1[rip]
	mov	rdi, r12
	call	codec_dbg@PLT
	mov	DWORD PTR [rbx], 1
	jmp	.L23
.L43:
	cmp	QWORD PTR 32[rbx], 0
	je	.L23
	jmp	.L22
	.cfi_endproc
.LFE0:
	.size	check_dyn_adc_switch, .-check_dyn_adc_switch
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hda_generic.c_check_dyn_adc_switch.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"enabling ADC switching\012\000"
	.align	2
.LC1:
	.ascii	"reducing to a single ADC\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_dyn_adc_switch, %function
check_dyn_adc_switch:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r4, [r0]
	mov	r8, r0
	ldr	r5, [r4]
	ldr	r0, [r4, #28]
	cmp	r5, #0
	mov	lr, r5
	ble	.L3
	mov	r9, #0
	mov	r10, r0
	mov	fp, #1
	mov	r6, r9
	mov	r7, r9
.L2:
	cmp	r0, #0
	ble	.L6
	ldr	r2, [r4, #20]
	mov	r3, #0
	lsl	ip, r6, #2
	sub	r2, r2, #4
	b	.L5
.L52:
	cmp	r0, r3
	beq	.L6
.L5:
	ldr	r1, [r2, #4]!
	add	r3, r3, #1
	ldr	r1, [r1, ip]
	cmp	r1, #0
	bne	.L52
	add	r6, r6, #1
	cmp	r6, r5
	bne	.L2
.L55:
	cmp	r7, #0
	beq	.L3
	cmp	r9, r5
	beq	.L16
	mov	r9, #0
	mov	r6, r9
	b	.L21
.L19:
	add	r9, r9, #1
.L17:
	add	r6, r6, #1
	cmp	r5, r6
	ble	.L53
.L21:
	mov	r3, #1
	ands	r3, r7, r3, lsl r6
	beq	.L17
	cmp	r9, r6
	beq	.L19
	ldr	r1, [r4, #24]
	lsl	r10, r6, #2
	ldr	r0, [r1, r6, lsl #2]
	lsl	fp, r9, #2
	str	r0, [r1, r9, lsl #2]
	ldr	r0, [r4, #28]
	cmp	r0, #0
	movgt	r5, #0
	ldrgt	ip, [r4, #20]
	ble	.L50
.L20:
	ldr	r1, [ip, r5, lsl #2]
	mov	r0, r8
	ldr	r1, [r1, fp]
	bl	invalidate_nid_path
	mov	r3, #0
	ldr	ip, [r4, #20]
	ldr	r0, [r4, #28]
	ldr	r1, [ip, r5, lsl #2]
	add	r5, r5, #1
	ldr	lr, [r1, r10]
	cmp	r0, r5
	str	lr, [r1, fp]
	str	r3, [r1, r10]
	bgt	.L20
.L50:
	ldr	r5, [r4]
	b	.L19
.L53:
	mov	r10, r0
	str	r9, [r4]
.L16:
	cmp	r10, #1
	beq	.L22
.L56:
	cmp	r10, #2
	beq	.L54
.L23:
	ldr	r3, [r4, #8]
	cmp	r3, #0
	bne	.L38
	ldr	r3, [r4, #12]
	cmp	r3, #0
	movne	r3, #1
	strne	r3, [r4]
.L38:
	mov	r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L6:
	orr	r7, r7, fp, lsl r6
	add	r6, r6, #1
	cmp	r6, r5
	add	r9, r9, #1
	bne	.L2
	b	.L55
.L3:
	cmp	r0, #0
	movgt	ip, #0
	ble	.L11
.L10:
	cmp	lr, #0
	ble	.L13
	ldr	r2, [r4, #20]
	mov	r3, #0
	ldr	r2, [r2, ip, lsl #2]
	lsl	r5, ip, #2
	sub	r2, r2, #4
	b	.L14
.L12:
	add	r3, r3, #1
	cmp	r3, lr
	beq	.L13
.L14:
	ldr	r1, [r2, #4]!
	cmp	r1, #0
	beq	.L12
	ldr	r2, [r4, #4]
	str	r3, [r2, r5]
	ldr	r0, [r4, #28]
.L13:
	add	ip, ip, #1
	cmp	r0, ip
	ldrgt	lr, [r4]
	bgt	.L10
.L11:
	mov	r0, r8
	ldr	r1, .L57
	bl	codec_dbg
	mov	r3, #1
	ldr	r10, [r4, #28]
	str	r3, [r4, #8]
	cmp	r10, #1
	bne	.L56
.L22:
	mov	r0, r8
	ldr	r1, .L57+4
	bl	codec_dbg
	mov	r3, #1
	str	r3, [r4]
	b	.L23
.L54:
	ldr	r3, [r4, #16]
	cmp	r3, #0
	beq	.L23
	b	.L22
.L58:
	.align	2
.L57:
	.word	.LC0
	.word	.LC1
	.size	check_dyn_adc_switch, .-check_dyn_adc_switch
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
