	.file	"extr_tc-mips.c_mips_parse_cpu.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"from-abi"
.LC1:
	.string	"default"
.LC2:
	.string	"Bad value (%s) for %s"
	.text
	.p2align 4
	.type	mips_parse_cpu, @function
mips_parse_cpu:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rdi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rsi
	lea	rsi, .LC0[rip]
	mov	rdi, rbp
	call	strcasecmp@PLT
	test	rax, rax
	jne	.L2
	mov	edi, DWORD PTR mips_abi[rip]
	call	ABI_NEEDS_32BIT_REGS@PLT
	test	rax, rax
	jne	.L21
	mov	edi, DWORD PTR mips_abi[rip]
	call	ABI_NEEDS_64BIT_REGS@PLT
	test	rax, rax
	jne	.L19
	cmp	QWORD PTR file_mips_gp32[rip], 0
	mov	edi, DWORD PTR ISA_MIPS1[rip]
	js	.L5
	cmove	edi, DWORD PTR ISA_MIPS3[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	mips_cpu_info_from_isa@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	lea	rsi, .LC1[rip]
	mov	rdi, rbp
	call	strcasecmp@PLT
	test	rax, rax
	je	.L13
	mov	r12, QWORD PTR mips_cpu_info_table[rip]
	mov	rdi, QWORD PTR [r12]
	test	rdi, rdi
	jne	.L12
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L22:
	mov	rdi, QWORD PTR 8[r12]
	add	r12, 8
	test	rdi, rdi
	je	.L11
.L12:
	mov	rsi, rbp
	call	mips_matching_cpu_name_p@PLT
	test	rax, rax
	je	.L22
.L1:
	mov	rax, r12
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	mov	rdx, r13
	mov	rsi, rbp
	lea	rdi, .LC2[rip]
	xor	r12d, r12d
	call	as_bad@PLT
	mov	rax, r12
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L21:
	.cfi_restore_state
	mov	edi, DWORD PTR ISA_MIPS1[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	mips_cpu_info_from_isa@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	cmp	QWORD PTR MIPS_DEFAULT_64BIT[rip], 0
	je	.L9
.L19:
	mov	edi, DWORD PTR ISA_MIPS3[rip]
.L9:
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	mips_cpu_info_from_isa@PLT
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	xor	r12d, r12d
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	mips_parse_cpu, .-mips_parse_cpu
	.comm	mips_cpu_info_table,8,8
	.comm	mips_abi,4,4
	.comm	file_mips_gp32,8,8
	.comm	MIPS_DEFAULT_64BIT,8,8
	.comm	ISA_MIPS3,4,4
	.comm	ISA_MIPS1,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tc-mips.c_mips_parse_cpu.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"from-abi\000"
	.align	2
.LC1:
	.ascii	"default\000"
	.align	2
.LC2:
	.ascii	"Bad value (%s) for %s\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mips_parse_cpu, %function
mips_parse_cpu:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r5, r1
	mov	r6, r0
	ldr	r1, .L23
	mov	r0, r5
	bl	strcasecmp
	cmp	r0, #0
	beq	.L21
	mov	r0, r5
	ldr	r1, .L23+4
	bl	strcasecmp
	subs	r4, r0, #0
	beq	.L1
	ldr	r3, .L23+8
	ldr	r4, [r3]
	ldr	r0, [r4]
	cmp	r0, #0
	bne	.L12
	b	.L11
.L22:
	ldr	r0, [r4, #4]!
	cmp	r0, #0
	beq	.L11
.L12:
	mov	r1, r5
	bl	mips_matching_cpu_name_p
	cmp	r0, #0
	beq	.L22
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, pc}
.L21:
	ldr	r4, .L23+12
	ldr	r0, [r4]
	bl	ABI_NEEDS_32BIT_REGS
	cmp	r0, #0
	bne	.L8
	ldr	r0, [r4]
	bl	ABI_NEEDS_64BIT_REGS
	cmp	r0, #0
	bne	.L19
	ldr	r3, .L23+16
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L5
	bne	.L8
.L19:
	pop	{r4, r5, r6, lr}
	ldr	r3, .L23+20
	ldr	r0, [r3]
	b	mips_cpu_info_from_isa
.L11:
	mov	r4, #0
	mov	r2, r6
	mov	r1, r5
	ldr	r0, .L23+24
	bl	as_bad
	mov	r0, r4
	pop	{r4, r5, r6, pc}
.L5:
	ldr	r3, .L23+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L19
.L8:
	pop	{r4, r5, r6, lr}
	ldr	r3, .L23+32
	ldr	r0, [r3]
	b	mips_cpu_info_from_isa
.L24:
	.align	2
.L23:
	.word	.LC0
	.word	.LC1
	.word	mips_cpu_info_table
	.word	mips_abi
	.word	file_mips_gp32
	.word	ISA_MIPS3
	.word	.LC2
	.word	MIPS_DEFAULT_64BIT
	.word	ISA_MIPS1
	.size	mips_parse_cpu, .-mips_parse_cpu
	.comm	mips_cpu_info_table,4,4
	.comm	mips_abi,4,4
	.comm	file_mips_gp32,4,4
	.comm	MIPS_DEFAULT_64BIT,4,4
	.comm	ISA_MIPS3,4,4
	.comm	ISA_MIPS1,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
