	.file	"extr_hevc_mc_uni_msa.c_common_vt_8t_8w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	common_vt_8t_8w_msa, @function
common_vt_8t_8w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	lea	eax, [rsi+rsi*2]
	mov	r10, rdi
	mov	rdi, r8
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	cdqe
	xor	r15d, r15d
	xor	r14d, r14d
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	sal	rax, 2
	xor	r13d, r13d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	sub	r10, rax
	xor	r12d, r12d
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xor	ebp, ebp
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xor	ebx, ebx
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	mov	QWORD PTR [rsp], r10
	mov	QWORD PTR 16[rsp], rdx
	mov	DWORD PTR 28[rsp], ecx
	mov	DWORD PTR 32[rsp], r9d
	mov	DWORD PTR 24[rsp], esi
	call	LD_SH@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 120
	xor	r9d, r9d
	xor	esi, esi
	push	0
	.cfi_def_cfa_offset 128
	mov	edi, eax
	mov	r8d, 3
	mov	ecx, 2
	push	0
	.cfi_def_cfa_offset 136
	mov	edx, 1
	push	0
	.cfi_def_cfa_offset 144
	call	SPLATI_H4_SB@PLT
	add	rsp, 24
	.cfi_def_cfa_offset 120
	xor	r11d, r11d
	mov	r9d, r12d
	push	rbx
	.cfi_def_cfa_offset 128
	mov	edx, r11d
	mov	r8d, r15d
	mov	ecx, r14d
	push	r13
	.cfi_def_cfa_offset 136
	push	rbp
	.cfi_def_cfa_offset 144
	mov	esi, DWORD PTR 56[rsp]
	mov	rdi, QWORD PTR 32[rsp]
	call	LD_SB7@PLT
	add	rsp, 24
	.cfi_def_cfa_offset 120
	xor	r11d, r11d
	mov	r9d, r13d
	push	rbx
	.cfi_def_cfa_offset 128
	mov	edi, r11d
	mov	r8d, ebp
	mov	ecx, r12d
	mov	edx, r15d
	mov	esi, r14d
	call	XORI_B7_128_SB@PLT
	mov	esi, DWORD PTR 40[rsp]
	xor	r11d, r11d
	mov	r9d, ebp
	mov	r10, QWORD PTR 16[rsp]
	mov	r8d, r13d
	mov	ecx, r15d
	mov	edi, r14d
	lea	eax, 0[0+rsi*8]
	sub	eax, esi
	mov	esi, r11d
	cdqe
	lea	rdx, [r10+rax*4]
	mov	QWORD PTR 24[rsp], rdx
	mov	edx, r12d
	push	0
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	push	0
	.cfi_def_cfa_offset 152
	push	0
	.cfi_def_cfa_offset 160
	push	r14
	.cfi_def_cfa_offset 168
	push	r15
	.cfi_def_cfa_offset 176
	call	ILVR_B4_SB@PLT
	add	rsp, 64
	.cfi_def_cfa_offset 112
	xor	r9d, r9d
	xor	r8d, r8d
	mov	edx, ebx
	mov	ecx, r13d
	mov	esi, r12d
	mov	edi, ebp
	call	ILVR_B2_SB@PLT
	mov	r9d, DWORD PTR 32[rsp]
	sar	r9d, 2
	lea	ebx, -1[r9]
	mov	DWORD PTR [rsp], ebx
	je	.L1
	mov	esi, DWORD PTR 24[rsp]
	lea	eax, 0[0+rsi*4]
	cdqe
	lea	rbx, 0[0+rax*4]
	mov	eax, DWORD PTR 28[rsp]
	mov	QWORD PTR 32[rsp], rbx
	sal	eax, 2
	cdqe
	sal	rax, 2
	mov	QWORD PTR 40[rsp], rax
	.p2align 4,,10
	.p2align 3
.L3:
	mov	r15, QWORD PTR 8[rsp]
	xor	r13d, r13d
	xor	r12d, r12d
	xor	ebp, ebp
	mov	esi, DWORD PTR 24[rsp]
	xor	ebx, ebx
	mov	r9d, r13d
	mov	ecx, r12d
	mov	r8d, ebx
	mov	rdi, r15
	mov	edx, ebp
	xor	r14d, r14d
	call	LD_SB4@PLT
	mov	ecx, r13d
	mov	edx, ebx
	mov	esi, r12d
	mov	edi, ebp
	call	XORI_B4_128_SB@PLT
	mov	rdx, QWORD PTR 32[rsp]
	mov	rax, r15
	xor	r15d, r15d
	mov	r8d, ebx
	xor	esi, esi
	mov	r9d, r12d
	mov	ecx, ebp
	add	rax, rdx
	mov	edi, ebp
	mov	edx, r12d
	mov	QWORD PTR 8[rsp], rax
	push	0
	.cfi_def_cfa_offset 120
	push	0
	.cfi_def_cfa_offset 128
	push	0
	.cfi_def_cfa_offset 136
	push	r15
	.cfi_def_cfa_offset 144
	push	rbx
	.cfi_def_cfa_offset 152
	push	r13
	.cfi_def_cfa_offset 160
	call	ILVR_B4_SB@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 112
	xor	r8d, r8d
	xor	r11d, r11d
	push	r12
	.cfi_def_cfa_offset 120
	xor	r10d, r10d
	mov	r9d, r8d
	mov	ecx, r11d
	push	rbp
	.cfi_def_cfa_offset 128
	mov	edx, r10d
	xor	esi, esi
	xor	edi, edi
	push	r14
	.cfi_def_cfa_offset 136
	push	r13
	.cfi_def_cfa_offset 144
	push	r8
	.cfi_def_cfa_offset 152
	push	r8
	.cfi_def_cfa_offset 160
	call	DOTP_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 112
	xor	r8d, r8d
	xor	r11d, r11d
	push	r12
	.cfi_def_cfa_offset 120
	xor	r10d, r10d
	mov	esi, r11d
	mov	r9d, r8d
	push	rbp
	.cfi_def_cfa_offset 128
	mov	edi, r10d
	mov	ecx, ebx
	xor	edx, edx
	push	r14
	.cfi_def_cfa_offset 136
	push	r13
	.cfi_def_cfa_offset 144
	push	r8
	.cfi_def_cfa_offset 152
	push	r8
	.cfi_def_cfa_offset 160
	call	DPADD_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 112
	xor	r8d, r8d
	xor	ecx, ecx
	push	r12
	.cfi_def_cfa_offset 120
	mov	r9d, r8d
	mov	esi, ebx
	xor	edi, edi
	push	rbp
	.cfi_def_cfa_offset 128
	mov	edx, r15d
	push	r14
	.cfi_def_cfa_offset 136
	push	r13
	.cfi_def_cfa_offset 144
	push	r8
	.cfi_def_cfa_offset 152
	push	r8
	.cfi_def_cfa_offset 160
	call	DPADD_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 112
	xor	r8d, r8d
	xor	ecx, ecx
	push	r12
	.cfi_def_cfa_offset 120
	xor	edx, edx
	mov	r9d, r8d
	xor	esi, esi
	push	rbp
	.cfi_def_cfa_offset 128
	mov	edi, r15d
	push	r14
	.cfi_def_cfa_offset 136
	push	r13
	.cfi_def_cfa_offset 144
	push	r8
	.cfi_def_cfa_offset 152
	push	r8
	.cfi_def_cfa_offset 160
	call	DPADD_SB4_SH@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 112
	mov	edi, r13d
	mov	ecx, r12d
	mov	r8d, 6
	mov	edx, ebp
	mov	esi, r14d
	call	SRARI_H4_SH@PLT
	mov	r8d, 7
	mov	ecx, r12d
	mov	edx, ebp
	mov	edi, r13d
	mov	esi, r14d
	call	SAT_SH4_SH@PLT
	mov	edi, r13d
	mov	esi, r14d
	call	PCKEV_XORI128_UB@PLT
	mov	esi, r12d
	mov	edi, ebp
	mov	r13d, eax
	call	PCKEV_XORI128_UB@PLT
	mov	ecx, 1
	xor	edx, edx
	xor	r8d, r8d
	mov	esi, eax
	mov	eax, DWORD PTR 28[rsp]
	mov	r9d, 1
	mov	edi, r13d
	push	rax
	.cfi_def_cfa_offset 120
	mov	rbx, QWORD PTR 24[rsp]
	push	rbx
	.cfi_def_cfa_offset 128
	call	ST_D4@PLT
	mov	rcx, QWORD PTR 56[rsp]
	mov	rax, rbx
	sub	DWORD PTR 16[rsp], 1
	add	rax, rcx
	mov	QWORD PTR 32[rsp], rax
	mov	eax, DWORD PTR 16[rsp]
	pop	rdx
	.cfi_def_cfa_offset 120
	pop	rcx
	.cfi_def_cfa_offset 112
	cmp	eax, -1
	jne	.L3
.L1:
	add	rsp, 56
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	common_vt_8t_8w_msa, .-common_vt_8t_8w_msa
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevc_mc_uni_msa.c_common_vt_8t_8w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	common_vt_8t_8w_msa, %function
common_vt_8t_8w_msa:
	@ args = 8, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	fp, r0
	sub	sp, sp, #68
	str	r1, [sp, #48]
	ldr	r0, [sp, #104]
	add	r1, r1, r1, lsl #1
	sub	fp, fp, r1, lsl #2
	str	r2, [sp, #40]
	str	r3, [sp, #52]
	bl	LD_SH
	mov	lr, #0
	mov	r3, #3
	mov	r10, lr
	mov	r1, lr
	stm	sp, {r3, lr}
	str	lr, [sp, #16]
	str	lr, [sp, #12]
	str	lr, [sp, #8]
	mov	r3, #2
	mov	r2, #1
	bl	SPLATI_H4_SB
	mov	r3, r10
	mov	r2, r10
	ldr	r1, [sp, #48]
	mov	r0, fp
	str	r10, [sp, #16]
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r10, [sp, #4]
	str	r10, [sp]
	bl	LD_SB7
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r10, [sp, #8]
	str	r10, [sp, #4]
	str	r10, [sp]
	bl	XORI_B7_128_SB
	ldr	r8, [sp, #48]
	mov	r2, r10
	rsb	r7, r8, r8, lsl #3
	add	lr, fp, r7, lsl #2
	mov	r3, r10
	mov	r1, r10
	mov	r0, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r10, [sp, #4]
	str	r10, [sp]
	str	r10, [sp, #28]
	str	r10, [sp, #24]
	str	r10, [sp, #20]
	str	r10, [sp, #16]
	str	lr, [sp, #32]
	bl	ILVR_B4_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r10, [sp, #4]
	str	r10, [sp]
	bl	ILVR_B2_SB
	ldr	r2, [sp, #108]
	asr	r3, r2, #2
	sub	r2, r3, #1
	cmp	r3, r10
	str	r2, [sp, #36]
	beq	.L1
	ldr	r3, [sp, #52]
	lsl	r2, r8, #4
	lsl	r3, r3, #4
	str	r2, [sp, #56]
	str	r3, [sp, #60]
.L3:
	mov	r7, #0
	mov	r5, r7
	mov	r4, r7
	mov	r3, r7
	mov	r2, r7
	stm	sp, {r5, r7}
	ldr	r1, [sp, #48]
	ldr	r0, [sp, #32]
	bl	LD_SB4
	mov	r3, r7
	mov	r2, r7
	mov	r1, r7
	mov	r0, r7
	bl	XORI_B4_128_SB
	mov	r2, r7
	mov	r3, r7
	mov	r1, r7
	stmib	sp, {r4, r7}
	mov	r0, r7
	str	r7, [sp, #12]
	str	r7, [sp]
	str	r7, [sp, #28]
	str	r7, [sp, #24]
	str	r7, [sp, #20]
	str	r7, [sp, #16]
	bl	ILVR_B4_SB
	mov	r2, r7
	mov	r3, r7
	mov	r1, r7
	mov	r0, r7
	str	r7, [sp, #28]
	str	r7, [sp, #24]
	str	r7, [sp, #20]
	str	r7, [sp, #16]
	str	r7, [sp, #12]
	str	r7, [sp, #8]
	str	r7, [sp, #4]
	str	r7, [sp]
	str	r7, [sp, #44]
	bl	DOTP_SB4_SH
	ldr	r3, [sp, #44]
	mov	r2, r7
	mov	r1, r3
	mov	r0, r7
	mov	r3, r7
	str	r7, [sp, #28]
	str	r7, [sp, #24]
	str	r7, [sp, #20]
	str	r7, [sp, #16]
	str	r7, [sp, #12]
	str	r7, [sp, #8]
	str	r7, [sp, #4]
	str	r7, [sp]
	bl	DPADD_SB4_SH
	mov	r1, r7
	mov	r3, r7
	mov	r2, r7
	mov	r0, r7
	str	r7, [sp, #28]
	str	r7, [sp, #24]
	str	r7, [sp, #20]
	str	r7, [sp, #16]
	str	r7, [sp, #12]
	str	r7, [sp, #8]
	str	r7, [sp, #4]
	str	r7, [sp]
	bl	DPADD_SB4_SH
	mov	r3, r7
	mov	r2, r7
	mov	r1, r7
	mov	r0, r7
	str	r7, [sp, #28]
	str	r7, [sp, #24]
	str	r7, [sp, #20]
	str	r7, [sp, #16]
	str	r7, [sp, #12]
	str	r7, [sp, #8]
	str	r7, [sp, #4]
	str	r7, [sp]
	bl	DPADD_SB4_SH
	mov	r2, #6
	mov	r3, r7
	mov	r1, r7
	str	r2, [sp]
	mov	r0, r7
	mov	r2, r7
	bl	SRARI_H4_SH
	mov	r2, #7
	mov	r3, r7
	mov	r1, r7
	str	r2, [sp]
	mov	r0, r7
	mov	r2, r7
	bl	SAT_SH4_SH
	mov	r1, r7
	mov	r0, r7
	bl	PCKEV_XORI128_UB
	mov	r3, r0
	mov	r1, r7
	mov	r0, r7
	mov	r4, r3
	bl	PCKEV_XORI128_UB
	ldr	ip, [sp, #36]
	mov	r2, r7
	sub	r5, ip, #1
	ldr	ip, [sp, #52]
	mov	r1, r0
	str	ip, [sp, #12]
	mov	ip, #1
	mov	r0, r4
	ldr	r4, [sp, #40]
	mov	r3, ip
	stm	sp, {r2, ip}
	str	r4, [sp, #8]
	str	r5, [sp, #36]
	bl	ST_D4
	ldr	r3, [sp, #32]
	ldr	r2, [sp, #56]
	cmn	r5, #1
	add	r3, r3, r2
	str	r3, [sp, #32]
	ldr	r3, [sp, #60]
	add	r3, r4, r3
	str	r3, [sp, #40]
	bne	.L3
.L1:
	add	sp, sp, #68
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	common_vt_8t_8w_msa, .-common_vt_8t_8w_msa
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
