	.file	"extr_pcie-oxnas.c_set_out_lanes.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	set_out_lanes, @function
set_out_lanes:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	rbx, rdi
	mov	edi, esi
	call	PCIE_SLAVE_BE@PLT
	mov	edi, DWORD PTR 8[rbx]
	mov	edx, DWORD PTR PCIE_SLAVE_BE_MASK[rip]
	mov	rsi, QWORD PTR PCIE_AHB_SLAVE_CTRL[rip]
	mov	ecx, eax
	add	rsi, QWORD PTR [rbx]
	call	regmap_update_bits@PLT
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 8
	jmp	wmb@PLT
	.cfi_endproc
.LFE0:
	.size	set_out_lanes, .-set_out_lanes
	.comm	PCIE_SLAVE_BE_MASK,4,4
	.comm	PCIE_AHB_SLAVE_CTRL,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pcie-oxnas.c_set_out_lanes.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	set_out_lanes, %function
set_out_lanes:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	r3, r0
	ldr	r2, .L4
	push	{r4, r5, r6, lr}
	ldr	ip, [r2]
	ldr	r4, [r0]
	ldr	r2, .L4+4
	mov	r0, r1
	ldr	r5, [r3, #4]
	add	r4, r4, ip
	ldr	r6, [r2]
	bl	PCIE_SLAVE_BE
	mov	r2, r6
	mov	r3, r0
	mov	r1, r4
	mov	r0, r5
	bl	regmap_update_bits
	pop	{r4, r5, r6, lr}
	b	wmb
.L5:
	.align	2
.L4:
	.word	PCIE_AHB_SLAVE_CTRL
	.word	PCIE_SLAVE_BE_MASK
	.size	set_out_lanes, .-set_out_lanes
	.comm	PCIE_SLAVE_BE_MASK,4,4
	.comm	PCIE_AHB_SLAVE_CTRL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
