	.file	"extr_clk-of-pxa168.c_pxa168_pll_init.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"pll1_4"
.LC1:
	.string	"uart_pll"
	.text
	.p2align 4
	.type	pxa168_pll_init, @function
pxa168_pll_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	lea	rbp, 8[rdi]
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	edi, DWORD PTR fixed_rate_clks[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR fixed_rate_clks[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	mmp_register_fixed_rate_clks@PLT
	mov	edi, DWORD PTR fixed_factor_clks[rip]
	call	ARRAY_SIZE@PLT
	mov	esi, DWORD PTR fixed_factor_clks[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	mmp_register_fixed_factor_clks@PLT
	mov	edi, DWORD PTR uart_factor_tbl[rip]
	call	ARRAY_SIZE@PLT
	push	0
	.cfi_def_cfa_offset 40
	mov	edx, DWORD PTR CLK_SET_RATE_PARENT[rip]
	lea	rsi, .LC0[rip]
	push	rax
	.cfi_def_cfa_offset 48
	mov	r9d, DWORD PTR uart_factor_tbl[rip]
	lea	rdi, .LC1[rip]
	lea	r8, uart_factor_masks[rip]
	mov	rcx, QWORD PTR MPMU_UART_PLL[rip]
	add	rcx, QWORD PTR [rbx]
	call	mmp_clk_register_factor@PLT
	mov	esi, DWORD PTR PXA168_CLK_UART_PLL[rip]
	add	rsp, 24
	.cfi_def_cfa_offset 24
	mov	rdi, rbp
	pop	rbx
	.cfi_def_cfa_offset 16
	mov	rdx, rax
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	mmp_clk_add@PLT
	.cfi_endproc
.LFE0:
	.size	pxa168_pll_init, .-pxa168_pll_init
	.comm	uart_factor_tbl,4,4
	.comm	uart_factor_masks,4,4
	.comm	fixed_rate_clks,4,4
	.comm	fixed_factor_clks,4,4
	.comm	PXA168_CLK_UART_PLL,4,4
	.comm	MPMU_UART_PLL,8,8
	.comm	CLK_SET_RATE_PARENT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_clk-of-pxa168.c_pxa168_pll_init.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"pll1_4\000"
	.align	2
.LC1:
	.ascii	"uart_pll\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pxa168_pll_init, %function
pxa168_pll_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	ldr	r3, .L4
	sub	sp, sp, #20
	ldr	r6, [r3]
	add	r5, r0, #4
	mov	r4, r0
	mov	r0, r6
	bl	ARRAY_SIZE
	mov	r1, r6
	mov	r2, r0
	mov	r0, r5
	bl	mmp_register_fixed_rate_clks
	ldr	r3, .L4+4
	ldr	r6, [r3]
	mov	r0, r6
	bl	ARRAY_SIZE
	mov	r1, r6
	mov	r2, r0
	mov	r0, r5
	bl	mmp_register_fixed_factor_clks
	ldr	r2, .L4+8
	ldr	r3, .L4+12
	ldr	r6, [r2]
	ldr	r3, [r3]
	ldr	r2, .L4+16
	ldr	r4, [r4]
	mov	r0, r6
	ldr	r7, [r2]
	add	r4, r4, r3
	bl	ARRAY_SIZE
	mov	ip, #0
	ldr	r1, .L4+20
	mov	r3, r4
	mov	r2, r7
	str	r0, [sp, #8]
	str	r1, [sp]
	str	r6, [sp, #4]
	ldr	r1, .L4+24
	str	ip, [sp, #12]
	ldr	r0, .L4+28
	bl	mmp_clk_register_factor
	mov	r2, r0
	mov	r0, r5
	ldr	r3, .L4+32
	ldr	r1, [r3]
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, lr}
	b	mmp_clk_add
.L5:
	.align	2
.L4:
	.word	fixed_rate_clks
	.word	fixed_factor_clks
	.word	uart_factor_tbl
	.word	MPMU_UART_PLL
	.word	CLK_SET_RATE_PARENT
	.word	uart_factor_masks
	.word	.LC0
	.word	.LC1
	.word	PXA168_CLK_UART_PLL
	.size	pxa168_pll_init, .-pxa168_pll_init
	.comm	uart_factor_tbl,4,4
	.comm	uart_factor_masks,4,4
	.comm	fixed_rate_clks,4,4
	.comm	fixed_factor_clks,4,4
	.comm	PXA168_CLK_UART_PLL,4,4
	.comm	MPMU_UART_PLL,4,4
	.comm	CLK_SET_RATE_PARENT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
