	.file	"extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_8t_4w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	hevc_hz_biwgt_8t_4w_msa, @function
hevc_hz_biwgt_8t_4w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, esi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, ecx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 136
	.cfi_def_cfa_offset 192
	mov	rdi, QWORD PTR ff_hevc_mask_arr[rip]
	mov	DWORD PTR 96[rsp], esi
	mov	ebx, DWORD PTR 216[rsp]
	add	rdi, 64
	mov	DWORD PTR 100[rsp], ecx
	mov	ebp, DWORD PTR 240[rsp]
	mov	QWORD PTR 48[rsp], rdx
	mov	QWORD PTR 56[rsp], r8
	mov	DWORD PTR 80[rsp], r9d
	call	LD_SB@PLT
	lea	rdi, -12[r12]
	mov	r12d, ebx
	sal	ebx, 13
	mov	QWORD PTR 40[rsp], rdi
	mov	rdi, QWORD PTR 192[rsp]
	mov	r15, rax
	sal	r12d, 16
	mov	QWORD PTR 8[rsp], rax
	call	LD_SH@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 200
	xor	r9d, r9d
	xor	esi, esi
	push	0
	.cfi_def_cfa_offset 208
	mov	r8d, 3
	mov	rdi, rax
	mov	ecx, 2
	push	0
	.cfi_def_cfa_offset 216
	mov	edx, 1
	push	0
	.cfi_def_cfa_offset 224
	call	SPLATI_H4_SH@PLT
	lea	rdi, 2[r15]
	mov	ecx, ebp
	lea	rdx, 4[r15]
	mov	QWORD PTR 48[rsp], rdi
	lea	rdi, 6[r15]
	movzx	eax, WORD PTR 240[rsp]
	mov	QWORD PTR 64[rsp], rdi
	mov	edi, DWORD PTR 264[rsp]
	add	edi, DWORD PTR 256[rsp]
	mov	QWORD PTR 56[rsp], rdx
	or	r12d, eax
	add	rsp, 32
	.cfi_def_cfa_offset 192
	sal	edi, cl
	add	edi, ebx
	call	__msa_fill_w@PLT
	mov	edi, r12d
	mov	DWORD PTR 84[rsp], eax
	call	__msa_fill_w@PLT
	lea	edi, 1[rbp]
	mov	DWORD PTR 88[rsp], eax
	call	__msa_fill_w@PLT
	mov	DWORD PTR 92[rsp], eax
	mov	eax, DWORD PTR 200[rsp]
	sar	eax, 2
	lea	ebx, -1[rax]
	mov	DWORD PTR 4[rsp], ebx
	je	.L1
	lea	eax, 0[0+r14*4]
	cdqe
	lea	rbx, 0[0+rax*4]
	lea	eax, 0[0+r13*4]
	cdqe
	mov	QWORD PTR 104[rsp], rbx
	lea	rbx, 0[0+rax*4]
	mov	eax, DWORD PTR 80[rsp]
	mov	QWORD PTR 112[rsp], rbx
	sal	eax, 2
	cdqe
	sal	rax, 2
	mov	QWORD PTR 120[rsp], rax
	.p2align 4,,10
	.p2align 3
.L3:
	mov	r14, QWORD PTR 40[rsp]
	mov	esi, DWORD PTR 96[rsp]
	xor	ebx, ebx
	xor	r15d, r15d
	xor	r9d, r9d
	xor	r8d, r8d
	mov	rcx, rbx
	mov	rdx, r15
	mov	rdi, r14
	xor	r12d, r12d
	xor	r13d, r13d
	xor	ebp, ebp
	call	LD_SB4@PLT
	mov	rdx, QWORD PTR 104[rsp]
	mov	rax, r14
	xor	r11d, r11d
	mov	r14, QWORD PTR 48[rsp]
	mov	esi, DWORD PTR 100[rsp]
	xor	r10d, r10d
	mov	rcx, r11
	add	rax, rdx
	mov	r9, r12
	mov	rdx, r10
	mov	r8, r13
	mov	rdi, r14
	mov	QWORD PTR 40[rsp], rax
	call	LD_SH4@PLT
	mov	rcx, QWORD PTR 112[rsp]
	xor	r11d, r11d
	xor	r10d, r10d
	mov	rax, r14
	mov	r9, r11
	mov	r8, r10
	mov	rsi, r10
	mov	rdi, r11
	add	rax, rcx
	mov	rdx, r12
	mov	rcx, r13
	mov	QWORD PTR 48[rsp], rax
	xor	r14d, r14d
	call	ILVR_D2_SH@PLT
	xor	ecx, ecx
	xor	edx, edx
	mov	rsi, rbx
	mov	rdi, r15
	call	XORI_B4_128_SB@PLT
	push	r14
	.cfi_def_cfa_offset 200
	mov	rsi, rbx
	mov	rdi, r15
	push	r13
	.cfi_def_cfa_offset 208
	push	r12
	.cfi_def_cfa_offset 216
	push	rbp
	.cfi_def_cfa_offset 224
	mov	r9, QWORD PTR 64[rsp]
	mov	r8, QWORD PTR 56[rsp]
	mov	rcx, QWORD PTR 48[rsp]
	mov	rdx, QWORD PTR 40[rsp]
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 192
	mov	r8, rbx
	mov	r9, r15
	push	0
	.cfi_def_cfa_offset 200
	mov	rcx, r14
	mov	rdx, r13
	mov	rsi, r12
	push	0
	.cfi_def_cfa_offset 208
	mov	rdi, rbp
	call	HEVC_FILT_8TAP_SH@PLT
	xor	esi, esi
	xor	edi, edi
	mov	QWORD PTR 80[rsp], rax
	push	r14
	.cfi_def_cfa_offset 216
	push	r13
	.cfi_def_cfa_offset 224
	push	r12
	.cfi_def_cfa_offset 232
	push	rbp
	.cfi_def_cfa_offset 240
	mov	r9, QWORD PTR 80[rsp]
	mov	r8, QWORD PTR 72[rsp]
	mov	rcx, QWORD PTR 64[rsp]
	mov	rdx, QWORD PTR 56[rsp]
	call	VSHF_B4_SB@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 192
	mov	r8, rbx
	mov	r9, r15
	push	0
	.cfi_def_cfa_offset 200
	mov	rcx, r14
	mov	rdx, r13
	mov	rsi, r12
	push	0
	.cfi_def_cfa_offset 208
	mov	rdi, rbp
	call	HEVC_FILT_8TAP_SH@PLT
	mov	rbx, QWORD PTR 88[rsp]
	xor	r11d, r11d
	xor	r10d, r10d
	mov	QWORD PTR [rsp], rbp
	mov	rcx, r11
	mov	rsi, rax
	push	rbx
	.cfi_def_cfa_offset 216
	mov	edx, DWORD PTR 108[rsp]
	push	rdx
	.cfi_def_cfa_offset 224
	mov	r9d, DWORD PTR 124[rsp]
	mov	rdx, r10
	mov	r8d, DWORD PTR 120[rsp]
	mov	rdi, QWORD PTR 96[rsp]
	call	HEVC_BIW_RND_CLIP2@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 192
	mov	rsi, rbx
	mov	rdi, rbp
	call	__msa_pckev_b@PLT
	mov	edx, 1
	xor	esi, esi
	mov	r8d, 3
	mov	QWORD PTR 72[rsp], rax
	sub	rsp, 8
	.cfi_def_cfa_offset 200
	mov	rdi, rax
	mov	ecx, DWORD PTR 88[rsp]
	push	rcx
	.cfi_def_cfa_offset 208
	mov	rbx, QWORD PTR 72[rsp]
	mov	ecx, 2
	mov	r9, rbx
	call	ST_W4@PLT
	mov	rsi, QWORD PTR 136[rsp]
	mov	rax, rbx
	sub	DWORD PTR 20[rsp], 1
	add	rax, rsi
	mov	QWORD PTR 72[rsp], rax
	mov	eax, DWORD PTR 20[rsp]
	pop	rdx
	.cfi_def_cfa_offset 200
	pop	rcx
	.cfi_def_cfa_offset 192
	cmp	eax, -1
	jne	.L3
.L1:
	add	rsp, 136
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	hevc_hz_biwgt_8t_4w_msa, .-hevc_hz_biwgt_8t_4w_msa
	.comm	ff_hevc_mask_arr,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_8t_4w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	hevc_hz_biwgt_8t_4w_msa, %function
hevc_hz_biwgt_8t_4w_msa:
	@ args = 36, pretend = 0, frame = 72
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	ip, .L10
	mov	r9, r0
	ldr	r0, [ip]
	sub	sp, sp, #100
	add	r0, r0, #64
	ldr	r10, [sp, #156]
	ldr	fp, [sp, #168]
	str	r1, [sp, #60]
	str	r2, [sp, #32]
	str	r3, [sp, #64]
	bl	LD_SB
	mov	r8, #0
	mov	r3, r0
	mov	r4, #3
	ldr	r0, [sp, #144]
	str	r3, [sp, #36]
	bl	LD_SH
	mov	r1, r8
	mov	r3, #2
	mov	r2, #1
	stm	sp, {r4, r8}
	str	r8, [sp, #16]
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	SPLATI_H4_SH
	ldr	ip, [sp, #164]
	ldr	r0, [sp, #160]
	lsl	r2, r10, #13
	add	r0, r0, ip
	ldr	ip, [sp, #152]
	add	r0, r2, r0, lsl fp
	lsl	r3, ip, #16
	lsr	r3, r3, #16
	orr	r10, r3, r10, lsl #16
	bl	__msa_fill_w
	mov	r3, r0
	mov	r0, r10
	str	r3, [sp, #68]
	bl	__msa_fill_w
	mov	r3, r0
	add	r0, fp, #1
	str	r3, [sp, #72]
	bl	__msa_fill_w
	ldr	r2, [sp, #36]
	ldr	ip, [sp, #148]
	str	r0, [sp, #76]
	add	r0, r2, #2
	asr	r3, ip, #2
	str	r0, [sp, #40]
	sub	ip, r9, #12
	add	r0, r2, #4
	str	ip, [sp, #28]
	str	r0, [sp, #44]
	sub	ip, r3, #1
	add	r0, r2, #6
	cmp	r3, r8
	str	ip, [sp, #52]
	str	r0, [sp, #48]
	beq	.L1
	ldr	r3, [sp, #64]
	ldr	r2, [sp, #60]
	lsl	r3, r3, #4
	str	r3, [sp, #84]
	ldr	r3, [sp, #140]
	lsl	r2, r2, #4
	lsl	r3, r3, #4
	str	r4, [sp, #92]
	str	r2, [sp, #80]
	str	r3, [sp, #88]
.L3:
	mov	r9, #0
	mov	fp, r9
	mov	r10, r9
	mov	r3, r9
	mov	r2, r9
	ldr	r1, [sp, #60]
	ldr	r0, [sp, #28]
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	LD_SB4
	mov	r3, r9
	mov	r2, r9
	ldr	r1, [sp, #64]
	ldr	r0, [sp, #32]
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	LD_SH4
	mov	r3, r9
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	stm	sp, {r10, fp}
	bl	ILVR_D2_SH
	mov	r3, r9
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	bl	XORI_B4_128_SB
	ldr	r8, [sp, #48]
	ldr	r3, [sp, #44]
	mov	r1, r9
	ldr	r2, [sp, #36]
	str	r8, [sp, #4]
	str	r3, [sp]
	mov	r0, r9
	ldr	r3, [sp, #40]
	str	r9, [sp, #20]
	str	r9, [sp, #16]
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	bl	VSHF_B4_SB
	mov	r3, r9
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	HEVC_FILT_8TAP_SH
	ldr	ip, [sp, #48]
	mov	r8, r0
	str	ip, [sp, #4]
	ldr	ip, [sp, #44]
	mov	r1, r9
	str	ip, [sp]
	ldr	r3, [sp, #40]
	ldr	r2, [sp, #36]
	mov	r0, r9
	str	r9, [sp, #20]
	str	r9, [sp, #16]
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	bl	VSHF_B4_SB
	mov	r3, r9
	mov	r2, r9
	mov	r1, r9
	mov	r0, r9
	str	r9, [sp, #12]
	str	r9, [sp, #8]
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	HEVC_FILT_8TAP_SH
	ldr	ip, [sp, #68]
	ldr	r5, [sp, #56]
	str	ip, [sp, #8]
	ldr	ip, [sp, #76]
	mov	r1, r0
	str	ip, [sp, #4]
	ldr	ip, [sp, #72]
	mov	r3, r9
	mov	r2, r9
	str	ip, [sp]
	mov	r0, r8
	str	r5, [sp, #12]
	str	r9, [sp, #16]
	bl	HEVC_BIW_RND_CLIP2
	mov	r1, r5
	mov	r0, r9
	bl	__msa_pckev_b
	ldr	r2, [sp, #52]
	mov	r3, #2
	sub	r4, r2, #1
	ldr	r2, [sp, #140]
	mov	r1, r9
	str	r2, [sp, #8]
	ldr	r2, [sp, #136]
	str	r4, [sp, #52]
	str	r2, [sp, #4]
	ldr	r2, [sp, #92]
	str	r0, [sp, #56]
	str	r2, [sp]
	mov	r2, #1
	bl	ST_W4
	ldr	r3, [sp, #28]
	ldr	r2, [sp, #80]
	cmn	r4, #1
	add	r2, r3, r2
	str	r2, [sp, #28]
	ldr	r3, [sp, #32]
	ldr	r2, [sp, #84]
	add	r3, r3, r2
	str	r3, [sp, #32]
	ldr	r2, [sp, #88]
	ldr	r3, [sp, #136]
	add	r3, r3, r2
	str	r3, [sp, #136]
	bne	.L3
.L1:
	add	sp, sp, #100
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	.align	2
.L10:
	.word	ff_hevc_mask_arr
	.size	hevc_hz_biwgt_8t_4w_msa, .-hevc_hz_biwgt_8t_4w_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
