	.file	"extr_intel_pipe_crc.c_vlv_pipe_crc_ctl_reg.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	vlv_pipe_crc_ctl_reg, @function
vlv_pipe_crc_ctl_reg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	r12, rcx
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	ebx, esi
	sub	rsp, 16
	.cfi_def_cfa_offset 48
	mov	eax, DWORD PTR [rdx]
	cmp	eax, DWORD PTR INTEL_PIPE_CRC_SOURCE_AUTO[rip]
	je	.L21
.L2:
	sub	eax, 131
	cmp	eax, 4
	ja	.L18
	lea	rdx, .L6[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L6:
	.long	.L10-.L6
	.long	.L9-.L6
	.long	.L8-.L6
	.long	.L7-.L6
	.long	.L5-.L6
	.text
	.p2align 4,,10
	.p2align 3
.L18:
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L21:
	.cfi_restore_state
	mov	QWORD PTR 8[rsp], rdi
	mov	rbp, rdx
	call	i9xx_pipe_crc_auto_source@PLT
	test	eax, eax
	jne	.L1
	mov	eax, DWORD PTR 0[rbp]
	mov	rdi, QWORD PTR 8[rsp]
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L7:
	mov	eax, DWORD PTR PIPE_CRC_ENABLE[rip]
	or	eax, DWORD PTR PIPE_CRC_SOURCE_DP_C_VLV[rip]
	mov	DWORD PTR [r12], eax
.L11:
	mov	edi, DWORD PTR PORT_DFT2_G4X[rip]
	call	I915_READ@PLT
	or	eax, DWORD PTR DC_BALANCE_RESET_VLV[rip]
	cmp	ebx, 129
	je	.L13
	cmp	ebx, 130
	je	.L14
	cmp	ebx, 128
	jne	.L18
	or	eax, DWORD PTR PIPE_C_SCRAMBLE_RESET[rip]
	mov	esi, eax
.L17:
	mov	edi, DWORD PTR PORT_DFT2_G4X[rip]
	call	I915_WRITE@PLT
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	eax, DWORD PTR PIPE_CRC_ENABLE[rip]
	or	eax, DWORD PTR PIPE_CRC_SOURCE_DP_B_VLV[rip]
	mov	DWORD PTR [r12], eax
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L10:
	mov	eax, DWORD PTR PIPE_CRC_ENABLE[rip]
	or	eax, DWORD PTR PIPE_CRC_SOURCE_PIPE_VLV[rip]
	mov	DWORD PTR [r12], eax
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	DWORD PTR [r12], 0
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	call	IS_CHERRYVIEW@PLT
	test	eax, eax
	je	.L18
	mov	eax, DWORD PTR PIPE_CRC_ENABLE[rip]
	or	eax, DWORD PTR PIPE_CRC_SOURCE_DP_D_VLV[rip]
	mov	DWORD PTR [r12], eax
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L14:
	or	eax, DWORD PTR PIPE_A_SCRAMBLE_RESET[rip]
	mov	esi, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L13:
	or	eax, DWORD PTR PIPE_B_SCRAMBLE_RESET[rip]
	mov	esi, eax
	jmp	.L17
	.cfi_endproc
.LFE0:
	.size	vlv_pipe_crc_ctl_reg, .-vlv_pipe_crc_ctl_reg
	.comm	PORT_DFT2_G4X,4,4
	.comm	PIPE_C_SCRAMBLE_RESET,4,4
	.comm	PIPE_CRC_SOURCE_PIPE_VLV,4,4
	.comm	PIPE_CRC_SOURCE_DP_D_VLV,4,4
	.comm	PIPE_CRC_SOURCE_DP_C_VLV,4,4
	.comm	PIPE_CRC_SOURCE_DP_B_VLV,4,4
	.comm	PIPE_CRC_ENABLE,4,4
	.comm	PIPE_B_SCRAMBLE_RESET,4,4
	.comm	PIPE_A_SCRAMBLE_RESET,4,4
	.comm	INTEL_PIPE_CRC_SOURCE_AUTO,4,4
	.comm	EINVAL,4,4
	.comm	DC_BALANCE_RESET_VLV,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_intel_pipe_crc.c_vlv_pipe_crc_ctl_reg.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vlv_pipe_crc_ctl_reg, %function
vlv_pipe_crc_ctl_reg:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	lr, .L23
	ldr	ip, [r2]
	ldr	lr, [lr]
	mov	r6, r3
	cmp	ip, lr
	mov	r7, r0
	mov	r4, r1
	beq	.L21
.L2:
	sub	ip, ip, #131
	cmp	ip, #4
	ldrls	pc, [pc, ip, asl #2]
	b	.L18
.L6:
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L7
	.word	.L5
.L21:
	mov	r5, r2
	bl	i9xx_pipe_crc_auto_source
	cmp	r0, #0
	popne	{r4, r5, r6, r7, r8, pc}
	ldr	ip, [r5]
	b	.L2
.L5:
	ldr	r3, .L23+4
	ldr	r2, .L23+8
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [r6]
.L11:
	ldr	r5, .L23+12
	ldr	r0, [r5]
	bl	I915_READ
	ldr	r3, .L23+16
	cmp	r4, #129
	ldr	r1, [r3]
	orr	r0, r0, r1
	beq	.L13
	cmp	r4, #130
	beq	.L14
	cmp	r4, #128
	beq	.L22
.L18:
	ldr	r3, .L23+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L10:
	ldr	r3, .L23+4
	ldr	r2, .L23+24
	ldr	r3, [r3]
	ldr	r2, [r2]
	mov	r0, #0
	orr	r3, r3, r2
	str	r3, [r6]
	pop	{r4, r5, r6, r7, r8, pc}
.L9:
	mov	r0, #0
	str	r0, [r6]
	pop	{r4, r5, r6, r7, r8, pc}
.L8:
	mov	r0, r7
	bl	IS_CHERRYVIEW
	cmp	r0, #0
	beq	.L18
	ldr	r3, .L23+4
	ldr	r2, .L23+28
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [r6]
	b	.L11
.L7:
	ldr	r3, .L23+4
	ldr	r2, .L23+32
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [r6]
	b	.L11
.L13:
	ldr	r3, .L23+36
	ldr	r1, [r3]
	orr	r1, r0, r1
.L17:
	ldr	r0, [r5]
	bl	I915_WRITE
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L22:
	ldr	r3, .L23+40
	ldr	r1, [r3]
	orr	r1, r0, r1
	b	.L17
.L14:
	ldr	r3, .L23+44
	ldr	r1, [r3]
	orr	r1, r0, r1
	b	.L17
.L24:
	.align	2
.L23:
	.word	INTEL_PIPE_CRC_SOURCE_AUTO
	.word	PIPE_CRC_ENABLE
	.word	PIPE_CRC_SOURCE_DP_B_VLV
	.word	PORT_DFT2_G4X
	.word	DC_BALANCE_RESET_VLV
	.word	EINVAL
	.word	PIPE_CRC_SOURCE_PIPE_VLV
	.word	PIPE_CRC_SOURCE_DP_D_VLV
	.word	PIPE_CRC_SOURCE_DP_C_VLV
	.word	PIPE_B_SCRAMBLE_RESET
	.word	PIPE_C_SCRAMBLE_RESET
	.word	PIPE_A_SCRAMBLE_RESET
	.size	vlv_pipe_crc_ctl_reg, .-vlv_pipe_crc_ctl_reg
	.comm	PORT_DFT2_G4X,4,4
	.comm	PIPE_C_SCRAMBLE_RESET,4,4
	.comm	PIPE_CRC_SOURCE_PIPE_VLV,4,4
	.comm	PIPE_CRC_SOURCE_DP_D_VLV,4,4
	.comm	PIPE_CRC_SOURCE_DP_C_VLV,4,4
	.comm	PIPE_CRC_SOURCE_DP_B_VLV,4,4
	.comm	PIPE_CRC_ENABLE,4,4
	.comm	PIPE_B_SCRAMBLE_RESET,4,4
	.comm	PIPE_A_SCRAMBLE_RESET,4,4
	.comm	INTEL_PIPE_CRC_SOURCE_AUTO,4,4
	.comm	EINVAL,4,4
	.comm	DC_BALANCE_RESET_VLV,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
