	.file	"extr_pinctrl-npcm7xx.c_npcm7xx_set_drive_strength.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"setting pin %d to low strength [%d]\n"
	.align 8
.LC1:
	.string	"setting pin %d to high strength [%d]\n"
	.text
	.p2align 4
	.type	npcm7xx_set_drive_strength, @function
npcm7xx_set_drive_strength:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	eax, esi
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13d, edx
	xor	edx, edx
	div	DWORD PTR NPCM7XX_GPIO_PER_BANK[rip]
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xor	edx, edx
	mov	r12d, esi
	sal	rax, 4
	add	rax, QWORD PTR [rdi]
	mov	rbx, rax
	mov	eax, esi
	div	DWORD PTR 8[rbx]
	mov	edi, edx
	call	BIT@PLT
	mov	edx, r12d
	mov	r14d, eax
	mov	rax, QWORD PTR pincfg[rip]
	mov	ebp, DWORD PTR [rax+rdx*4]
	and	ebp, DWORD PTR DRIVE_STRENGTH_MASK[rip]
	test	r13d, r13d
	je	.L7
	test	ebp, ebp
	je	.L7
	mov	edi, ebp
	call	DSLO@PLT
	cmp	eax, r13d
	je	.L10
	mov	edi, ebp
	call	DSHI@PLT
	mov	ecx, eax
	mov	eax, DWORD PTR ENOTSUPP[rip]
	neg	eax
	cmp	ecx, r13d
	jne	.L1
	mov	edi, DWORD PTR 12[rbx]
	mov	edx, r12d
	lea	rsi, .LC1[rip]
	call	dev_dbg@PLT
	mov	rsi, QWORD PTR NPCM7XX_GP_N_ODSC[rip]
	lea	rdi, 8[rbx]
	add	rsi, QWORD PTR [rbx]
	mov	edx, r14d
	call	npcm_gpio_set@PLT
	xor	eax, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L7:
	mov	eax, DWORD PTR ENOTSUPP[rip]
	neg	eax
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	mov	edi, DWORD PTR 12[rbx]
	mov	edx, r12d
	mov	ecx, eax
	lea	rsi, .LC0[rip]
	call	dev_dbg@PLT
	mov	rsi, QWORD PTR NPCM7XX_GP_N_ODSC[rip]
	lea	rdi, 8[rbx]
	add	rsi, QWORD PTR [rbx]
	mov	edx, r14d
	call	npcm_gpio_clr@PLT
	pop	rbx
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	npcm7xx_set_drive_strength, .-npcm7xx_set_drive_strength
	.comm	pincfg,8,8
	.comm	NPCM7XX_GP_N_ODSC,8,8
	.comm	NPCM7XX_GPIO_PER_BANK,4,4
	.comm	ENOTSUPP,4,4
	.comm	DRIVE_STRENGTH_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pinctrl-npcm7xx.c_npcm7xx_set_drive_strength.c"
	.text
	.global	__aeabi_uidiv
	.global	__aeabi_uidivmod
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"setting pin %d to low strength [%d]\012\000"
	.align	2
.LC1:
	.ascii	"setting pin %d to high strength [%d]\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	npcm7xx_set_drive_strength, %function
npcm7xx_set_drive_strength:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L9
	mov	r4, r0
	mov	r6, r1
	mov	r0, r1
	ldr	r1, [r3]
	mov	r7, r2
	bl	__aeabi_uidiv
	ldr	r8, [r4]
	add	r3, r0, r0, lsl #1
	add	r9, r8, r3, lsl #2
	ldr	r1, [r9, #4]
	mov	r0, r6
	lsl	r5, r3, #2
	bl	__aeabi_uidivmod
	mov	r0, r1
	bl	BIT
	ldr	r3, .L9+4
	ldr	r2, .L9+8
	ldr	r3, [r3]
	ldr	fp, [r2]
	ldr	r3, [r3, r6, lsl #2]
	ands	fp, r3, fp
	moveq	r4, #1
	movne	r4, #0
	cmp	r7, #0
	moveq	r4, #1
	cmp	r4, #0
	beq	.L2
.L5:
	ldr	r3, .L9+12
	ldr	r4, [r3]
	rsb	r0, r4, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	mov	r10, r0
	mov	r0, fp
	bl	DSLO
	cmp	r0, r7
	beq	.L8
	mov	r0, fp
	bl	DSHI
	cmp	r0, r7
	bne	.L5
	mov	r3, r0
	mov	r2, r6
	ldr	r1, .L9+16
	ldr	r0, [r9, #8]
	bl	dev_dbg
	ldr	r3, .L9+20
	ldr	r1, [r8, r5]
	ldr	r3, [r3]
	mov	r2, r10
	add	r0, r9, #4
	add	r1, r1, r3
	bl	npcm_gpio_set
	mov	r0, r4
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
	mov	r3, r0
	mov	r2, r6
	ldr	r1, .L9+24
	ldr	r0, [r9, #8]
	bl	dev_dbg
	ldr	r3, .L9+20
	ldr	r1, [r8, r5]
	ldr	r3, [r3]
	mov	r2, r10
	add	r0, r9, #4
	add	r1, r1, r3
	bl	npcm_gpio_clr
	mov	r0, r4
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L10:
	.align	2
.L9:
	.word	NPCM7XX_GPIO_PER_BANK
	.word	pincfg
	.word	DRIVE_STRENGTH_MASK
	.word	ENOTSUPP
	.word	.LC1
	.word	NPCM7XX_GP_N_ODSC
	.word	.LC0
	.size	npcm7xx_set_drive_strength, .-npcm7xx_set_drive_strength
	.comm	pincfg,4,4
	.comm	NPCM7XX_GP_N_ODSC,4,4
	.comm	NPCM7XX_GPIO_PER_BANK,4,4
	.comm	ENOTSUPP,4,4
	.comm	DRIVE_STRENGTH_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
