	.file	"extr_if_vr.c_vr_setwol.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	vr_setwol, @function
vr_setwol:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 24
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	VR_LOCK_ASSERT@PLT
	mov	rax, QWORD PTR REV_ID_VT6102_A[rip]
	cmp	QWORD PTR [rbx], rax
	jge	.L23
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L24
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L23:
	.cfi_restore_state
	mov	edi, DWORD PTR 8[rbx]
	mov	esi, DWORD PTR PCIY_PMG[rip]
	lea	rdx, 4[rsp]
	call	pci_find_cap@PLT
	test	rax, rax
	jne	.L1
	mov	esi, DWORD PTR VR_WOLCR_CLR[rip]
	mov	edx, 255
	mov	rdi, rbx
	mov	rbp, QWORD PTR 16[rbx]
	call	CSR_WRITE_1@PLT
	mov	esi, DWORD PTR VR_WOLCFG_CLR[rip]
	mov	edx, DWORD PTR VR_WOLCFG_SAB[rip]
	mov	rdi, rbx
	or	edx, DWORD PTR VR_WOLCFG_SAM[rip]
	call	CSR_WRITE_1@PLT
	mov	esi, DWORD PTR VR_PWRCSR_CLR[rip]
	mov	edx, 255
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	mov	edx, DWORD PTR VR_PWRCFG_WOLEN[rip]
	mov	esi, DWORD PTR VR_PWRCFG_CLR[rip]
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	mov	rax, QWORD PTR REV_ID_VT6105_B0[rip]
	cmp	QWORD PTR [rbx], rax
	jg	.L25
.L5:
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR IFCAP_WOL_UCAST[rip], eax
	jne	.L26
.L6:
	test	DWORD PTR IFCAP_WOL_MAGIC[rip], eax
	jne	.L27
.L7:
	test	DWORD PTR IFCAP_WOL[rip], eax
	jne	.L28
.L8:
	mov	esi, DWORD PTR VR_STICKHW[rip]
	mov	rdi, rbx
	call	CSR_READ_1@PLT
	mov	edx, DWORD PTR VR_STICKHW_DS0[rip]
	mov	esi, DWORD PTR VR_STICKHW[rip]
	mov	rdi, rbx
	or	edx, DWORD PTR VR_STICKHW_DS1[rip]
	or	edx, eax
	call	CSR_WRITE_1@PLT
	mov	edi, DWORD PTR 8[rbx]
	movsx	rsi, DWORD PTR 4[rsp]
	mov	edx, 2
	add	rsi, QWORD PTR PCIR_POWER_STATUS[rip]
	call	pci_read_config@PLT
	mov	edx, DWORD PTR PCIM_PSTAT_PME[rip]
	or	edx, DWORD PTR PCIM_PSTAT_PMEENABLE[rip]
	mov	ecx, edx
	mov	esi, DWORD PTR 0[rbp]
	or	edx, eax
	mov	edi, DWORD PTR 8[rbx]
	not	ecx
	and	ecx, eax
	test	DWORD PTR IFCAP_WOL[rip], esi
	movsx	rsi, DWORD PTR 4[rsp]
	cmove	edx, ecx
	add	rsi, QWORD PTR PCIR_POWER_STATUS[rip]
	mov	ecx, 2
	call	pci_write_config@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L28:
	mov	esi, DWORD PTR VR_WOLCFG_SET[rip]
	mov	rdi, rbx
	mov	edx, DWORD PTR VR_WOLCFG_SAB[rip]
	or	edx, DWORD PTR VR_WOLCFG_SAM[rip]
	call	CSR_WRITE_1@PLT
	mov	esi, DWORD PTR VR_STICKHW[rip]
	mov	rdi, rbx
	call	CSR_READ_1@PLT
	mov	esi, DWORD PTR VR_STICKHW[rip]
	or	eax, DWORD PTR VR_STICKHW_WOL_ENB[rip]
	mov	rdi, rbx
	mov	edx, eax
	call	CSR_WRITE_1@PLT
	mov	edx, DWORD PTR VR_PWRCFG_WOLEN[rip]
	mov	esi, DWORD PTR VR_PWRCFG_SET[rip]
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L27:
	mov	edx, DWORD PTR VR_WOLCR_MAGIC[rip]
	mov	esi, DWORD PTR VR_WOLCR_SET[rip]
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L26:
	mov	edx, DWORD PTR VR_WOLCR_UCAST[rip]
	mov	esi, DWORD PTR VR_WOLCR_SET[rip]
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	mov	eax, DWORD PTR 0[rbp]
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L25:
	mov	edx, DWORD PTR VR_WOLCFG_PATTERN_PAGE[rip]
	mov	esi, DWORD PTR VR_WOLCFG_CLR[rip]
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	mov	esi, DWORD PTR VR_TESTREG_CLR[rip]
	mov	rdi, rbx
	mov	edx, 3
	call	CSR_WRITE_1@PLT
	mov	esi, DWORD PTR VR_PWRCSR1_CLR[rip]
	mov	edx, 3
	mov	rdi, rbx
	call	CSR_WRITE_1@PLT
	jmp	.L5
.L24:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	vr_setwol, .-vr_setwol
	.comm	VR_WOLCR_UCAST,4,4
	.comm	VR_WOLCR_SET,4,4
	.comm	VR_WOLCR_MAGIC,4,4
	.comm	VR_WOLCR_CLR,4,4
	.comm	VR_WOLCFG_SET,4,4
	.comm	VR_WOLCFG_SAM,4,4
	.comm	VR_WOLCFG_SAB,4,4
	.comm	VR_WOLCFG_PATTERN_PAGE,4,4
	.comm	VR_WOLCFG_CLR,4,4
	.comm	VR_TESTREG_CLR,4,4
	.comm	VR_STICKHW_WOL_ENB,4,4
	.comm	VR_STICKHW_DS1,4,4
	.comm	VR_STICKHW_DS0,4,4
	.comm	VR_STICKHW,4,4
	.comm	VR_PWRCSR_CLR,4,4
	.comm	VR_PWRCSR1_CLR,4,4
	.comm	VR_PWRCFG_WOLEN,4,4
	.comm	VR_PWRCFG_SET,4,4
	.comm	VR_PWRCFG_CLR,4,4
	.comm	REV_ID_VT6105_B0,8,8
	.comm	REV_ID_VT6102_A,8,8
	.comm	PCIY_PMG,4,4
	.comm	PCIR_POWER_STATUS,8,8
	.comm	PCIM_PSTAT_PMEENABLE,4,4
	.comm	PCIM_PSTAT_PME,4,4
	.comm	IFCAP_WOL_UCAST,4,4
	.comm	IFCAP_WOL_MAGIC,4,4
	.comm	IFCAP_WOL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_if_vr.c_vr_setwol.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vr_setwol, %function
vr_setwol:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, lr}
	mov	r4, r0
	ldr	r3, .L28
	sub	sp, sp, #12
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	VR_LOCK_ASSERT
	ldr	r3, .L28+4
	ldr	r2, [r4]
	ldr	r3, [r3]
	cmp	r2, r3
	bge	.L23
.L1:
	ldr	r3, .L28
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L24
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, pc}
.L23:
	ldr	r3, .L28+8
	mov	r2, sp
	ldr	r1, [r3]
	ldr	r0, [r4, #4]
	bl	pci_find_cap
	cmp	r0, #0
	bne	.L1
	ldr	r3, .L28+12
	ldr	r9, .L28+16
	ldr	r7, .L28+20
	ldr	r1, [r3]
	mov	r2, #255
	mov	r0, r4
	ldr	r6, [r4, #8]
	ldr	r8, .L28+24
	bl	CSR_WRITE_1
	ldr	r3, [r7]
	ldr	r2, [r9]
	ldr	r1, [r8]
	orr	r2, r2, r3
	mov	r0, r4
	bl	CSR_WRITE_1
	ldr	r3, .L28+28
	mov	r2, #255
	ldr	r1, [r3]
	mov	r0, r4
	bl	CSR_WRITE_1
	ldr	r5, .L28+32
	ldr	r3, .L28+36
	ldr	r2, [r5]
	ldr	r1, [r3]
	mov	r0, r4
	bl	CSR_WRITE_1
	ldr	r3, .L28+40
	ldr	r2, [r4]
	ldr	r3, [r3]
	cmp	r2, r3
	bgt	.L25
.L5:
	ldr	r2, .L28+44
	ldr	r3, [r6]
	ldr	r2, [r2]
	tst	r3, r2
	bne	.L26
.L6:
	ldr	r2, .L28+48
	ldr	r2, [r2]
	tst	r3, r2
	bne	.L27
.L7:
	ldr	r8, .L28+52
	ldr	r2, [r8]
	tst	r3, r2
	bne	.L20
	ldr	r7, .L28+56
.L8:
	ldr	r1, [r7]
	mov	r0, r4
	bl	CSR_READ_1
	ldr	r3, .L28+60
	ldr	r2, .L28+64
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r5, .L28+68
	orr	r2, r3, r2
	ldr	r1, [r7]
	orr	r2, r2, r0
	mov	r0, r4
	bl	CSR_WRITE_1
	ldr	r3, [r5]
	ldr	r1, [sp]
	mov	r2, #2
	add	r1, r1, r3
	ldr	r0, [r4, #4]
	bl	pci_read_config
	ldr	r3, .L28+72
	ldr	r2, .L28+76
	ldr	r1, [r8]
	ldr	r2, [r2]
	ldr	ip, [r6]
	ldr	r3, [r3]
	tst	ip, r1
	orr	r3, r3, r2
	biceq	r2, r0, r3
	orrne	r2, r3, r0
	ldr	r1, [sp]
	ldr	r3, [r5]
	ldr	r0, [r4, #4]
	add	r1, r1, r3
	mov	r3, #2
	bl	pci_write_config
	b	.L1
.L20:
	ldr	r1, [r9]
	ldr	r3, .L28+80
	ldr	r2, [r7]
	ldr	r7, .L28+56
	orr	r2, r1, r2
	mov	r0, r4
	ldr	r1, [r3]
	bl	CSR_WRITE_1
	ldr	r1, [r7]
	mov	r0, r4
	bl	CSR_READ_1
	mov	r2, r0
	ldr	r3, .L28+84
	ldr	r1, [r7]
	ldr	r3, [r3]
	mov	r0, r4
	orr	r2, r2, r3
	bl	CSR_WRITE_1
	ldr	r3, .L28+88
	mov	r0, r4
	ldr	r2, [r5]
	ldr	r1, [r3]
	bl	CSR_WRITE_1
	b	.L8
.L27:
	ldr	r3, .L28+92
	ldr	r2, .L28+96
	ldr	r1, [r3]
	mov	r0, r4
	ldr	r2, [r2]
	bl	CSR_WRITE_1
	ldr	r3, [r6]
	b	.L7
.L26:
	ldr	r3, .L28+92
	ldr	r2, .L28+100
	ldr	r1, [r3]
	mov	r0, r4
	ldr	r2, [r2]
	bl	CSR_WRITE_1
	ldr	r3, [r6]
	b	.L6
.L25:
	ldr	r3, .L28+104
	ldr	r1, [r8]
	ldr	r2, [r3]
	mov	r0, r4
	bl	CSR_WRITE_1
	ldr	r3, .L28+108
	mov	r2, #3
	ldr	r1, [r3]
	mov	r0, r4
	bl	CSR_WRITE_1
	ldr	r3, .L28+112
	mov	r2, #3
	mov	r0, r4
	ldr	r1, [r3]
	bl	CSR_WRITE_1
	b	.L5
.L24:
	bl	__stack_chk_fail
.L29:
	.align	2
.L28:
	.word	.LC0
	.word	REV_ID_VT6102_A
	.word	PCIY_PMG
	.word	VR_WOLCR_CLR
	.word	VR_WOLCFG_SAB
	.word	VR_WOLCFG_SAM
	.word	VR_WOLCFG_CLR
	.word	VR_PWRCSR_CLR
	.word	VR_PWRCFG_WOLEN
	.word	VR_PWRCFG_CLR
	.word	REV_ID_VT6105_B0
	.word	IFCAP_WOL_UCAST
	.word	IFCAP_WOL_MAGIC
	.word	IFCAP_WOL
	.word	VR_STICKHW
	.word	VR_STICKHW_DS0
	.word	VR_STICKHW_DS1
	.word	PCIR_POWER_STATUS
	.word	PCIM_PSTAT_PME
	.word	PCIM_PSTAT_PMEENABLE
	.word	VR_WOLCFG_SET
	.word	VR_STICKHW_WOL_ENB
	.word	VR_PWRCFG_SET
	.word	VR_WOLCR_SET
	.word	VR_WOLCR_MAGIC
	.word	VR_WOLCR_UCAST
	.word	VR_WOLCFG_PATTERN_PAGE
	.word	VR_TESTREG_CLR
	.word	VR_PWRCSR1_CLR
	.size	vr_setwol, .-vr_setwol
	.comm	VR_WOLCR_UCAST,4,4
	.comm	VR_WOLCR_SET,4,4
	.comm	VR_WOLCR_MAGIC,4,4
	.comm	VR_WOLCR_CLR,4,4
	.comm	VR_WOLCFG_SET,4,4
	.comm	VR_WOLCFG_SAM,4,4
	.comm	VR_WOLCFG_SAB,4,4
	.comm	VR_WOLCFG_PATTERN_PAGE,4,4
	.comm	VR_WOLCFG_CLR,4,4
	.comm	VR_TESTREG_CLR,4,4
	.comm	VR_STICKHW_WOL_ENB,4,4
	.comm	VR_STICKHW_DS1,4,4
	.comm	VR_STICKHW_DS0,4,4
	.comm	VR_STICKHW,4,4
	.comm	VR_PWRCSR_CLR,4,4
	.comm	VR_PWRCSR1_CLR,4,4
	.comm	VR_PWRCFG_WOLEN,4,4
	.comm	VR_PWRCFG_SET,4,4
	.comm	VR_PWRCFG_CLR,4,4
	.comm	REV_ID_VT6105_B0,4,4
	.comm	REV_ID_VT6102_A,4,4
	.comm	PCIY_PMG,4,4
	.comm	PCIR_POWER_STATUS,4,4
	.comm	PCIM_PSTAT_PMEENABLE,4,4
	.comm	PCIM_PSTAT_PME,4,4
	.comm	IFCAP_WOL_UCAST,4,4
	.comm	IFCAP_WOL_MAGIC,4,4
	.comm	IFCAP_WOL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
