	.file	"extr_mthca_srq.c_mthca_srq_event.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Async event for bogus SRQ %08x\n"
	.text
	.p2align 4
	.globl	mthca_srq_event
	.type	mthca_srq_event, @function
mthca_srq_event:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13d, esi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	ebx, edx
	sub	rsp, 40
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	call	spin_lock@PLT
	mov	eax, DWORD PTR 12[r12]
	lea	rdi, 4[r12]
	lea	esi, -1[rax]
	and	esi, r13d
	call	mthca_array_get@PLT
	test	rax, rax
	je	.L2
	add	DWORD PTR 4[rax], 1
	mov	rbp, rax
	mov	rdi, r12
	call	spin_unlock@PLT
	mov	rax, QWORD PTR 16[rbp]
	test	rax, rax
	je	.L3
	lea	rdx, 8[r12]
	mov	DWORD PTR [rsp], ebx
	mov	esi, DWORD PTR 8[rbp]
	mov	rdi, rsp
	mov	QWORD PTR 16[rsp], rdx
	lea	rdx, 8[rbp]
	mov	QWORD PTR 8[rsp], rdx
	call	rax
.L3:
	mov	rdi, r12
	call	spin_lock@PLT
	sub	DWORD PTR 4[rbp], 1
	je	.L12
.L4:
	mov	rdi, r12
	call	spin_unlock@PLT
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L13
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	mov	rdi, rbp
	call	wake_up@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rdi, r12
	call	spin_unlock@PLT
	mov	edx, r13d
	lea	rsi, .LC0[rip]
	mov	rdi, r12
	call	mthca_warn@PLT
	jmp	.L1
.L13:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	mthca_srq_event, .-mthca_srq_event
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mthca_srq.c_mthca_srq_event.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Async event for bogus SRQ %08x\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	mthca_srq_event
	.syntax unified
	.arm
	.fpu softvfp
	.type	mthca_srq_event, %function
mthca_srq_event:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	mov	r5, r0
	mov	r6, r1
	ldr	r3, .L14
	sub	sp, sp, #20
	mov	r7, r2
	ldr	r3, [r3]
	str	r3, [sp, #12]
	mov	r3,#0
	bl	spin_lock
	ldr	r1, [r5, #12]
	add	r0, r5, #4
	sub	r1, r1, #1
	and	r1, r1, r6
	bl	mthca_array_get
	subs	r4, r0, #0
	beq	.L2
	ldr	r3, [r4, #4]
	mov	r0, r5
	add	r3, r3, #1
	str	r3, [r4, #4]
	bl	spin_unlock
	ldr	r3, [r4, #12]
	cmp	r3, #0
	beq	.L3
	add	r1, r5, #8
	add	r2, r4, #8
	str	r1, [sp, #8]
	mov	r0, sp
	ldr	r1, [r4, #8]
	str	r7, [sp]
	str	r2, [sp, #4]
	blx	r3
.L3:
	mov	r0, r5
	bl	spin_lock
	ldr	r3, [r4, #4]
	sub	r3, r3, #1
	cmp	r3, #0
	str	r3, [r4, #4]
	beq	.L12
.L4:
	mov	r0, r5
	bl	spin_unlock
.L1:
	ldr	r3, .L14
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L13
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L12:
	mov	r0, r4
	bl	wake_up
	b	.L4
.L2:
	mov	r0, r5
	bl	spin_unlock
	mov	r2, r6
	mov	r0, r5
	ldr	r1, .L14+4
	bl	mthca_warn
	b	.L1
.L13:
	bl	__stack_chk_fail
.L15:
	.align	2
.L14:
	.word	.LC1
	.word	.LC0
	.size	mthca_srq_event, .-mthca_srq_event
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
