	.file	"extr_cpuid.c_cpuid_set_info.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Unsupported CPU"
.LC1:
	.string	"-enable_x86_64h"
.LC2:
	.string	"-disable_x86_64h"
.LC3:
	.string	"cpuid_set_info():\n"
.LC4:
	.string	"  core_count   : %d\n"
.LC5:
	.string	"  thread_count : %d\n"
.LC6:
	.string	"       cpu_type: 0x%08x\n"
.LC7:
	.string	"    cpu_subtype: 0x%08x\n"
.LC8:
	.string	""
	.text
	.p2align 4
	.globl	cpuid_set_info
	.type	cpuid_set_info, @function
cpuid_set_info:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	lea	rdi, cpuid_cpu_info[rip]
	sub	rsp, 32
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	mov	rax, QWORD PTR TRUE[rip]
	mov	QWORD PTR 8[rsp], rax
	call	cpuid_set_generic_info@PLT
	mov	edi, DWORD PTR CPUID_STRING_UNKNOWN[rip]
	call	strlen@PLT
	mov	esi, 4
	lea	rdi, 1[rax]
	call	min@PLT
	mov	esi, DWORD PTR cpuid_cpu_info[rip+80]
	mov	edi, DWORD PTR CPUID_VID_INTEL[rip]
	mov	edx, eax
	call	strncmp@PLT
	test	rax, rax
	jne	.L4
	lea	rdi, cpuid_cpu_info[rip]
	call	cpuid_set_cpufamily@PLT
	cmp	rax, QWORD PTR CPUFAMILY_UNKNOWN[rip]
	je	.L4
.L3:
	mov	rax, QWORD PTR CPU_TYPE_X86[rip]
	lea	rsi, 8[rsp]
	mov	edx, 8
	lea	rdi, .LC1[rip]
	mov	QWORD PTR cpuid_cpu_info[rip], rax
	call	PE_parse_boot_argn@PLT
	test	rax, rax
	je	.L5
.L34:
	mov	rax, QWORD PTR 8[rsp]
.L6:
	test	rax, rax
	je	.L9
	mov	eax, DWORD PTR CPUID_X86_64_H_FEATURE_SUBSET[rip]
	mov	edx, DWORD PTR cpuid_cpu_info[rip+8]
	and	edx, eax
	cmp	eax, edx
	je	.L37
.L9:
	mov	rax, QWORD PTR CPU_SUBTYPE_X86_ARCH1[rip]
.L10:
	mov	QWORD PTR cpuid_cpu_info[rip+24], rax
	mov	rax, QWORD PTR cpuid_cpu_info[rip+32]
	cmp	rax, 129
	je	.L38
	cmp	rax, 128
	je	.L12
.L13:
	mov	edi, DWORD PTR MSR_CORE_THREAD_COUNT[rip]
	call	rdmsr64@PLT
	mov	edx, 16
	mov	esi, 31
	mov	ebp, eax
	test	eax, eax
	mov	eax, 65537
	cmove	ebp, eax
.L35:
	mov	edi, ebp
	call	bitfield32@PLT
	xor	edx, edx
	mov	esi, 15
	mov	edi, ebp
	mov	QWORD PTR cpuid_cpu_info[rip+40], rax
	call	bitfield32@PLT
	cmp	QWORD PTR cpuid_cpu_info[rip+40], 0
	mov	QWORD PTR cpuid_cpu_info[rip+56], rax
	mov	rax, QWORD PTR cpuid_cpu_info[rip+32]
	jne	.L18
	mov	rdx, QWORD PTR cpuid_cpu_info[rip+48]
	mov	QWORD PTR cpuid_cpu_info[rip+40], rdx
	mov	rdx, QWORD PTR cpuid_cpu_info[rip+64]
	mov	QWORD PTR cpuid_cpu_info[rip+56], rdx
.L18:
	cmp	rax, 129
	je	.L15
	lea	rdi, cpuid_cpu_info[rip]
	call	cpuid_set_cache_info@PLT
.L15:
	lea	rdi, .LC3[rip]
	xor	eax, eax
	call	DBG@PLT
	mov	rsi, QWORD PTR cpuid_cpu_info[rip+40]
	lea	rdi, .LC4[rip]
	xor	eax, eax
	call	DBG@PLT
	mov	rsi, QWORD PTR cpuid_cpu_info[rip+56]
	lea	rdi, .LC5[rip]
	xor	eax, eax
	call	DBG@PLT
	mov	rsi, QWORD PTR cpuid_cpu_info[rip]
	lea	rdi, .LC6[rip]
	xor	eax, eax
	call	DBG@PLT
	mov	rsi, QWORD PTR cpuid_cpu_info[rip+24]
	xor	eax, eax
	lea	rdi, .LC7[rip]
	call	DBG@PLT
	lea	rax, .LC8[rip]
	mov	QWORD PTR cpuid_cpu_info[rip+72], rax
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L39
	add	rsp, 32
	.cfi_remember_state
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	lea	rdi, .LC0[rip]
	call	panic@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L38:
	lea	rdi, cpuid_cpu_info[rip]
	call	cpuid_set_cache_info@PLT
	mov	rax, QWORD PTR cpuid_cpu_info[rip+32]
	cmp	rax, 128
	jne	.L40
	.p2align 4,,10
	.p2align 3
.L12:
	mov	edi, DWORD PTR MSR_CORE_THREAD_COUNT[rip]
	call	rdmsr64@PLT
	mov	edx, 16
	mov	esi, 19
	mov	ebp, eax
	jmp	.L35
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rax, QWORD PTR FALSE[rip]
	lea	rsi, 16[rsp]
	mov	edx, 8
	lea	rdi, .LC2[rip]
	mov	QWORD PTR 16[rsp], rax
	call	PE_parse_boot_argn@PLT
	test	rax, rax
	je	.L34
	mov	rax, QWORD PTR FALSE[rip]
	mov	QWORD PTR 8[rsp], rax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L40:
	cmp	rax, 129
	jne	.L13
	mov	rax, QWORD PTR cpuid_cpu_info[rip+48]
	mov	QWORD PTR cpuid_cpu_info[rip+40], rax
	mov	rax, QWORD PTR cpuid_cpu_info[rip+64]
	mov	QWORD PTR cpuid_cpu_info[rip+56], rax
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L37:
	mov	eax, DWORD PTR CPUID_X86_64_H_EXTFEATURE_SUBSET[rip]
	mov	edx, DWORD PTR cpuid_cpu_info[rip+12]
	and	edx, eax
	cmp	eax, edx
	jne	.L9
	mov	eax, DWORD PTR CPUID_X86_64_H_LEAF7_FEATURE_SUBSET[rip]
	mov	edx, DWORD PTR cpuid_cpu_info[rip+16]
	and	edx, eax
	cmp	eax, edx
	jne	.L9
	mov	rax, QWORD PTR CPU_SUBTYPE_X86_64_H[rip]
	jmp	.L10
.L39:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	cpuid_set_info, .-cpuid_set_info
	.comm	cpuid_cpu_info,88,32
	.comm	TRUE,8,8
	.comm	MSR_CORE_THREAD_COUNT,4,4
	.comm	FALSE,8,8
	.comm	CPU_TYPE_X86,8,8
	.comm	CPU_SUBTYPE_X86_ARCH1,8,8
	.comm	CPU_SUBTYPE_X86_64_H,8,8
	.comm	CPUID_X86_64_H_LEAF7_FEATURE_SUBSET,4,4
	.comm	CPUID_X86_64_H_FEATURE_SUBSET,4,4
	.comm	CPUID_X86_64_H_EXTFEATURE_SUBSET,4,4
	.comm	CPUID_VID_INTEL,4,4
	.comm	CPUID_STRING_UNKNOWN,4,4
	.comm	CPUFAMILY_UNKNOWN,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cpuid.c_cpuid_set_info.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Unsupported CPU\000"
	.align	2
.LC1:
	.ascii	"-enable_x86_64h\000"
	.align	2
.LC2:
	.ascii	"-disable_x86_64h\000"
	.align	2
.LC3:
	.ascii	"cpuid_set_info():\012\000"
	.align	2
.LC4:
	.ascii	"  core_count   : %d\012\000"
	.align	2
.LC5:
	.ascii	"  thread_count : %d\012\000"
	.align	2
.LC6:
	.ascii	"       cpu_type: 0x%08x\012\000"
	.align	2
.LC7:
	.ascii	"    cpu_subtype: 0x%08x\012\000"
	.align	2
.LC8:
	.ascii	"\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	cpuid_set_info
	.syntax unified
	.arm
	.fpu softvfp
	.type	cpuid_set_info, %function
cpuid_set_info:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r3, .L41
	ldr	r4, .L41+4
	ldr	r3, [r3]
	ldr	r2, .L41+8
	sub	sp, sp, #16
	mov	r0, r4
	ldr	r2, [r2]
	str	r2, [sp, #12]
	mov	r2,#0
	str	r3, [sp, #4]
	bl	cpuid_set_generic_info
	ldr	r2, .L41+12
	ldr	r3, .L41+16
	ldr	r0, [r2]
	ldr	r5, [r3]
	ldr	r6, [r4, #44]
	bl	strlen
	mov	r1, #4
	add	r0, r0, #1
	bl	min
	mov	r1, r6
	mov	r2, r0
	mov	r0, r5
	bl	strncmp
	cmp	r0, #0
	bne	.L4
	mov	r0, r4
	bl	cpuid_set_cpufamily
	ldr	r3, .L41+20
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L4
.L3:
	mov	r2, #4
	ldr	r3, .L41+24
	ldr	r0, .L41+28
	ldr	r3, [r3]
	add	r1, sp, r2
	str	r3, [r4]
	bl	PE_parse_boot_argn
	cmp	r0, #0
	beq	.L5
.L34:
	ldr	r3, [sp, #4]
.L6:
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L41+32
	ldr	r2, [r4, #4]
	ldr	r3, [r3]
	bics	r3, r3, r2
	beq	.L37
.L9:
	ldr	r3, .L41+36
	ldr	r2, [r3]
.L10:
	ldr	r3, [r4, #20]
	str	r2, [r4, #16]
	cmp	r3, #129
	beq	.L38
	cmp	r3, #128
	beq	.L12
.L13:
	ldr	r3, .L41+40
	ldr	r5, .L41+44
	ldr	r0, [r3]
	bl	rdmsr64
	cmp	r0, #0
	movne	r5, r0
	mov	r2, #16
	mov	r1, #31
	mov	r0, r5
.L35:
	bl	bitfield32
	mov	r3, r0
	mov	r1, #15
	mov	r2, #0
	mov	r0, r5
	str	r3, [r4, #24]
	bl	bitfield32
	ldr	r2, [r4, #24]
	ldr	r3, [r4, #20]
	cmp	r2, #0
	ldreq	r1, [r4, #36]
	ldreq	r2, [r4, #28]
	str	r0, [r4, #32]
	streq	r2, [r4, #24]
	streq	r1, [r4, #32]
	cmp	r3, #129
	beq	.L15
	ldr	r0, .L41+4
	bl	cpuid_set_cache_info
.L15:
	ldr	r0, .L41+48
	bl	DBG
	ldr	r1, [r4, #24]
	ldr	r0, .L41+52
	bl	DBG
	ldr	r1, [r4, #32]
	ldr	r0, .L41+56
	bl	DBG
	ldr	r1, [r4]
	ldr	r0, .L41+60
	bl	DBG
	ldr	r1, [r4, #16]
	ldr	r0, .L41+64
	bl	DBG
	ldr	r3, .L41+68
	str	r3, [r4, #40]
	ldr	r3, .L41+8
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L39
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, pc}
.L4:
	ldr	r0, .L41+72
	bl	panic
	b	.L3
.L38:
	ldr	r0, .L41+4
	bl	cpuid_set_cache_info
	ldr	r3, [r4, #20]
	cmp	r3, #128
	bne	.L40
.L12:
	ldr	r3, .L41+40
	ldr	r0, [r3]
	bl	rdmsr64
	mov	r2, #16
	mov	r5, r0
	mov	r1, #19
	b	.L35
.L5:
	ldr	r5, .L41+76
	mov	r2, #4
	ldr	r3, [r5]
	ldr	r0, .L41+80
	add	r1, sp, #8
	str	r3, [sp, #8]
	bl	PE_parse_boot_argn
	cmp	r0, #0
	beq	.L34
	ldr	r3, [r5]
	str	r3, [sp, #4]
	b	.L6
.L40:
	cmp	r3, #129
	bne	.L13
	ldr	r2, [r4, #28]
	ldr	r3, [r4, #36]
	str	r2, [r4, #24]
	str	r3, [r4, #32]
	b	.L15
.L37:
	ldr	r3, .L41+84
	ldr	r2, [r4, #8]
	ldr	r3, [r3]
	bics	r3, r3, r2
	bne	.L9
	ldr	r3, .L41+88
	ldr	r2, [r4, #12]
	ldr	r3, [r3]
	bics	r3, r3, r2
	bne	.L9
	ldr	r3, .L41+92
	ldr	r2, [r3]
	b	.L10
.L39:
	bl	__stack_chk_fail
.L42:
	.align	2
.L41:
	.word	TRUE
	.word	cpuid_cpu_info
	.word	.LC9
	.word	CPUID_STRING_UNKNOWN
	.word	CPUID_VID_INTEL
	.word	CPUFAMILY_UNKNOWN
	.word	CPU_TYPE_X86
	.word	.LC1
	.word	CPUID_X86_64_H_FEATURE_SUBSET
	.word	CPU_SUBTYPE_X86_ARCH1
	.word	MSR_CORE_THREAD_COUNT
	.word	65537
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC0
	.word	FALSE
	.word	.LC2
	.word	CPUID_X86_64_H_EXTFEATURE_SUBSET
	.word	CPUID_X86_64_H_LEAF7_FEATURE_SUBSET
	.word	CPU_SUBTYPE_X86_64_H
	.size	cpuid_set_info, .-cpuid_set_info
	.comm	cpuid_cpu_info,48,4
	.comm	TRUE,4,4
	.comm	MSR_CORE_THREAD_COUNT,4,4
	.comm	FALSE,4,4
	.comm	CPU_TYPE_X86,4,4
	.comm	CPU_SUBTYPE_X86_ARCH1,4,4
	.comm	CPU_SUBTYPE_X86_64_H,4,4
	.comm	CPUID_X86_64_H_LEAF7_FEATURE_SUBSET,4,4
	.comm	CPUID_X86_64_H_FEATURE_SUBSET,4,4
	.comm	CPUID_X86_64_H_EXTFEATURE_SUBSET,4,4
	.comm	CPUID_VID_INTEL,4,4
	.comm	CPUID_STRING_UNKNOWN,4,4
	.comm	CPUFAMILY_UNKNOWN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
