	.file	"extr_a2xx_gpu.c_a2xx_gpu_init.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"no a2xx device\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"No memory protection without MMU\n"
	.text
	.p2align 4
	.globl	a2xx_gpu_init
	.type	a2xx_gpu_init, @function
a2xx_gpu_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	rax, QWORD PTR 8[rdi]
	mov	rbx, rdi
	mov	rbp, QWORD PTR [rax]
	test	rbp, rbp
	je	.L12
	mov	esi, DWORD PTR GFP_KERNEL[rip]
	mov	edi, 20
	call	kzalloc@PLT
	mov	r12, rax
	test	rax, rax
	je	.L13
	mov	edi, DWORD PTR perfcntrs[rip]
	mov	DWORD PTR 8[rax], edi
	call	ARRAY_SIZE@PLT
	mov	rdi, r12
	mov	DWORD PTR 4[r12], eax
	call	adreno_is_a20x@PLT
	test	rax, rax
	je	.L5
	mov	eax, DWORD PTR a200_registers[rip]
	mov	DWORD PTR 16[r12], eax
.L6:
	mov	eax, DWORD PTR a2xx_register_offsets[rip]
	mov	rsi, rbp
	mov	rdx, r12
	mov	rdi, rbx
	mov	r8d, 1
	lea	rcx, funcs[rip]
	mov	DWORD PTR 12[r12], eax
	call	adreno_gpu_init@PLT
	mov	ebp, eax
	test	eax, eax
	jne	.L8
	mov	eax, DWORD PTR [r12]
	test	eax, eax
	je	.L14
	mov	rax, r12
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L14:
	.cfi_restore_state
	mov	edi, DWORD PTR [rbx]
	lea	rsi, .LC1[rip]
	call	dev_err@PLT
	mov	ebp, DWORD PTR ENXIO[rip]
	neg	ebp
.L8:
	mov	rdi, r12
	call	a2xx_destroy@PLT
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	edi, ebp
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	ERR_PTR@PLT
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	ebp, DWORD PTR ENOMEM[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	neg	ebp
	mov	edi, ebp
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	ERR_PTR@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	rdi, r12
	call	adreno_is_a225@PLT
	test	rax, rax
	je	.L7
	mov	eax, DWORD PTR a225_registers[rip]
	mov	DWORD PTR 16[r12], eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L12:
	mov	edi, DWORD PTR [rdi]
	lea	rsi, .LC0[rip]
	call	dev_err@PLT
	mov	ebp, DWORD PTR ENXIO[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	neg	ebp
	mov	edi, ebp
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	ERR_PTR@PLT
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	mov	eax, DWORD PTR a220_registers[rip]
	mov	DWORD PTR 16[r12], eax
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	a2xx_gpu_init, .-a2xx_gpu_init
	.comm	perfcntrs,4,4
	.comm	funcs,4,4
	.comm	a2xx_register_offsets,4,4
	.comm	a225_registers,4,4
	.comm	a220_registers,4,4
	.comm	a200_registers,4,4
	.comm	GFP_KERNEL,4,4
	.comm	ENXIO,4,4
	.comm	ENOMEM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_a2xx_gpu.c_a2xx_gpu_init.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"no a2xx device\012\000"
	.align	2
.LC1:
	.ascii	"No memory protection without MMU\012\000"
	.text
	.align	2
	.global	a2xx_gpu_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	a2xx_gpu_init, %function
a2xx_gpu_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r3, [r0, #4]
	mov	r6, r0
	ldr	r5, [r3]
	sub	sp, sp, #8
	cmp	r5, #0
	beq	.L12
	ldr	r3, .L15
	mov	r0, #20
	ldr	r1, [r3]
	bl	kzalloc
	subs	r4, r0, #0
	beq	.L13
	ldr	r3, .L15+4
	ldr	r0, [r3]
	str	r0, [r4, #8]
	bl	ARRAY_SIZE
	mov	r3, r0
	mov	r0, r4
	str	r3, [r4, #4]
	bl	adreno_is_a20x
	cmp	r0, #0
	beq	.L5
	ldr	r3, .L15+8
	ldr	r3, [r3]
	str	r3, [r4, #16]
.L6:
	mov	r0, #1
	ldr	r3, .L15+12
	mov	r1, r5
	ldr	r2, [r3]
	ldr	r3, .L15+16
	str	r2, [r4, #12]
	str	r0, [sp]
	mov	r2, r4
	mov	r0, r6
	bl	adreno_gpu_init
	subs	r5, r0, #0
	bne	.L8
	ldr	r3, [r4]
	cmp	r3, #0
	beq	.L14
	mov	r0, r4
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, pc}
.L14:
	ldr	r0, [r6]
	ldr	r1, .L15+20
	bl	dev_err
	ldr	r3, .L15+24
	ldr	r5, [r3]
	rsb	r5, r5, #0
.L8:
	mov	r0, r4
	bl	a2xx_destroy
	mov	r0, r5
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, lr}
	b	ERR_PTR
.L13:
	ldr	r3, .L15+28
	ldr	r5, [r3]
	rsb	r5, r5, #0
	mov	r0, r5
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, lr}
	b	ERR_PTR
.L5:
	mov	r0, r4
	bl	adreno_is_a225
	cmp	r0, #0
	ldrne	r3, .L15+32
	ldreq	r3, .L15+36
	ldr	r3, [r3]
	str	r3, [r4, #16]
	b	.L6
.L12:
	ldr	r1, .L15+40
	ldr	r0, [r0]
	bl	dev_err
	ldr	r3, .L15+24
	ldr	r5, [r3]
	rsb	r5, r5, #0
	mov	r0, r5
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, lr}
	b	ERR_PTR
.L16:
	.align	2
.L15:
	.word	GFP_KERNEL
	.word	perfcntrs
	.word	a200_registers
	.word	a2xx_register_offsets
	.word	funcs
	.word	.LC1
	.word	ENXIO
	.word	ENOMEM
	.word	a225_registers
	.word	a220_registers
	.word	.LC0
	.size	a2xx_gpu_init, .-a2xx_gpu_init
	.comm	perfcntrs,4,4
	.comm	funcs,4,4
	.comm	a2xx_register_offsets,4,4
	.comm	a225_registers,4,4
	.comm	a220_registers,4,4
	.comm	a200_registers,4,4
	.comm	GFP_KERNEL,4,4
	.comm	ENXIO,4,4
	.comm	ENOMEM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
