	.file	"extr_sc16is7xx.c_sc16is7xx_reg_proc.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	sc16is7xx_reg_proc, @function
sc16is7xx_reg_proc:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	esi, DWORD PTR reg_work[rip]
	xor	r14d, r14d
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	to_sc16is7xx_one@PLT
	mov	rsi, r14
	lea	r13, 4[rax]
	mov	rbp, rax
	mov	rdi, r13
	call	spin_lock_irqsave@PLT
	xor	esi, esi
	lea	rdi, 8[rbp]
	mov	edx, 8
	mov	ebx, DWORD PTR 8[rbp]
	mov	r12d, DWORD PTR 12[rbp]
	call	memset@PLT
	mov	rsi, r14
	mov	rdi, r13
	call	spin_unlock_irqrestore@PLT
	test	DWORD PTR SC16IS7XX_RECONF_MD[rip], ebx
	je	.L2
	mov	edx, DWORD PTR SC16IS7XX_MCR_LOOP_BIT[rip]
	mov	ecx, DWORD PTR 0[rbp]
	mov	rdi, rbp
	and	ecx, DWORD PTR TIOCM_LOOP[rip]
	mov	esi, DWORD PTR SC16IS7XX_MCR_REG[rip]
	cmovne	ecx, edx
	call	sc16is7xx_port_update@PLT
	mov	ecx, DWORD PTR 0[rbp]
	and	ecx, DWORD PTR TIOCM_RTS[rip]
	mov	edx, DWORD PTR SC16IS7XX_MCR_RTS_BIT[rip]
	jne	.L20
.L5:
	mov	esi, DWORD PTR SC16IS7XX_MCR_REG[rip]
	mov	rdi, rbp
	call	sc16is7xx_port_update@PLT
	mov	ecx, DWORD PTR 0[rbp]
	and	ecx, DWORD PTR TIOCM_DTR[rip]
	mov	edx, DWORD PTR SC16IS7XX_MCR_DTR_BIT[rip]
	jne	.L21
.L7:
	mov	esi, DWORD PTR SC16IS7XX_MCR_REG[rip]
	mov	rdi, rbp
	call	sc16is7xx_port_update@PLT
.L2:
	test	DWORD PTR SC16IS7XX_RECONF_IER[rip], ebx
	jne	.L22
.L8:
	test	DWORD PTR SC16IS7XX_RECONF_RS485[rip], ebx
	jne	.L23
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L21:
	.cfi_restore_state
	mov	ecx, DWORD PTR SC16IS7XX_MCR_DTR_BIT[rip]
	mov	edx, ecx
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L20:
	mov	ecx, DWORD PTR SC16IS7XX_MCR_RTS_BIT[rip]
	mov	edx, ecx
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L23:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, rbp
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	sc16is7xx_reconf_rs485@PLT
	.p2align 4,,10
	.p2align 3
.L22:
	.cfi_restore_state
	mov	esi, DWORD PTR SC16IS7XX_IER_REG[rip]
	xor	ecx, ecx
	mov	edx, r12d
	mov	rdi, rbp
	call	sc16is7xx_port_update@PLT
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	sc16is7xx_reg_proc, .-sc16is7xx_reg_proc
	.comm	reg_work,4,4
	.comm	TIOCM_RTS,4,4
	.comm	TIOCM_LOOP,4,4
	.comm	TIOCM_DTR,4,4
	.comm	SC16IS7XX_RECONF_RS485,4,4
	.comm	SC16IS7XX_RECONF_MD,4,4
	.comm	SC16IS7XX_RECONF_IER,4,4
	.comm	SC16IS7XX_MCR_RTS_BIT,4,4
	.comm	SC16IS7XX_MCR_REG,4,4
	.comm	SC16IS7XX_MCR_LOOP_BIT,4,4
	.comm	SC16IS7XX_MCR_DTR_BIT,4,4
	.comm	SC16IS7XX_IER_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sc16is7xx.c_sc16is7xx_reg_proc.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sc16is7xx_reg_proc, %function
sc16is7xx_reg_proc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, .L23
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r1, [r3]
	bl	to_sc16is7xx_one
	mov	r7, #0
	mov	r4, r0
	add	r6, r0, #4
	mov	r1, r7
	mov	r0, r6
	bl	spin_lock_irqsave
	mov	r2, #8
	mov	r1, r7
	add	r0, r4, #8
	ldr	r5, [r4, #8]
	ldr	r8, [r4, #12]
	bl	memset
	mov	r1, r7
	mov	r0, r6
	bl	spin_unlock_irqrestore
	ldr	r3, .L23+4
	ldr	r3, [r3]
	tst	r5, r3
	beq	.L2
	ldr	r3, .L23+8
	ldr	r2, .L23+12
	ldr	r1, [r3]
	ldr	r3, [r4]
	ldr	r2, [r2]
	ldr	r6, .L23+16
	ands	r3, r3, r1
	movne	r3, r2
	ldr	r1, [r6]
	mov	r0, r4
	bl	sc16is7xx_port_update
	ldr	r3, .L23+20
	ldr	r2, .L23+24
	ldr	r1, [r3]
	ldr	r3, [r4]
	ldr	r2, [r2]
	ands	r3, r3, r1
	movne	r3, r2
	ldr	r1, [r6]
	mov	r0, r4
	bl	sc16is7xx_port_update
	ldr	r3, .L23+28
	ldr	r2, .L23+32
	ldr	r1, [r3]
	ldr	r3, [r4]
	ldr	r2, [r2]
	ands	r3, r3, r1
	movne	r3, r2
	mov	r0, r4
	ldr	r1, [r6]
	bl	sc16is7xx_port_update
.L2:
	ldr	r3, .L23+36
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L22
.L6:
	ldr	r3, .L23+40
	ldr	r3, [r3]
	tst	r5, r3
	popeq	{r4, r5, r6, r7, r8, pc}
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, lr}
	b	sc16is7xx_reconf_rs485
.L22:
	ldr	r3, .L23+44
	mov	r2, r8
	ldr	r1, [r3]
	mov	r0, r4
	mov	r3, #0
	bl	sc16is7xx_port_update
	b	.L6
.L24:
	.align	2
.L23:
	.word	reg_work
	.word	SC16IS7XX_RECONF_MD
	.word	TIOCM_LOOP
	.word	SC16IS7XX_MCR_LOOP_BIT
	.word	SC16IS7XX_MCR_REG
	.word	TIOCM_RTS
	.word	SC16IS7XX_MCR_RTS_BIT
	.word	TIOCM_DTR
	.word	SC16IS7XX_MCR_DTR_BIT
	.word	SC16IS7XX_RECONF_IER
	.word	SC16IS7XX_RECONF_RS485
	.word	SC16IS7XX_IER_REG
	.size	sc16is7xx_reg_proc, .-sc16is7xx_reg_proc
	.comm	reg_work,4,4
	.comm	TIOCM_RTS,4,4
	.comm	TIOCM_LOOP,4,4
	.comm	TIOCM_DTR,4,4
	.comm	SC16IS7XX_RECONF_RS485,4,4
	.comm	SC16IS7XX_RECONF_MD,4,4
	.comm	SC16IS7XX_RECONF_IER,4,4
	.comm	SC16IS7XX_MCR_RTS_BIT,4,4
	.comm	SC16IS7XX_MCR_REG,4,4
	.comm	SC16IS7XX_MCR_LOOP_BIT,4,4
	.comm	SC16IS7XX_MCR_DTR_BIT,4,4
	.comm	SC16IS7XX_IER_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
