	.file	"extr_mb862xxfbdrv.c_mb862xxfb_setcolreg.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mb862xxfb_setcolreg, @function
mb862xxfb_setcolreg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebx, edi
	mov	edi, esi
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	eax, DWORD PTR 12[r9]
	cmp	eax, 128
	je	.L2
	mov	r12d, 1
	cmp	eax, 129
	jne	.L1
	xor	r12d, r12d
	cmp	ebx, 255
	jbe	.L9
.L1:
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	xor	r12d, r12d
	cmp	ebx, 15
	ja	.L1
	lea	rsi, 8[r9]
	mov	rbp, r9
	mov	r14, QWORD PTR 16[r9]
	mov	DWORD PTR 12[rsp], ecx
	mov	DWORD PTR 8[rsp], edx
	call	chan_to_field@PLT
	mov	edx, DWORD PTR 8[rsp]
	lea	rsi, 4[rbp]
	mov	r13d, eax
	mov	edi, edx
	call	chan_to_field@PLT
	mov	ecx, DWORD PTR 12[rsp]
	mov	rsi, rbp
	or	r13d, eax
	mov	edi, ecx
	call	chan_to_field@PLT
	mov	rdx, QWORD PTR [r14]
	mov	edi, ebx
	or	r13d, eax
	mov	eax, r12d
	mov	DWORD PTR [rdx+rdi*4], r13d
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	shr	ecx, 8
	shr	edi, 8
	xor	dl, dl
	mov	eax, DWORD PTR GC_L0PAL0[rip]
	sal	edi, 16
	or	edx, ecx
	or	edx, edi
	mov	edi, DWORD PTR disp[rip]
	lea	esi, [rax+rbx*4]
	call	outreg@PLT
	add	rsp, 16
	.cfi_def_cfa_offset 48
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	mb862xxfb_setcolreg, .-mb862xxfb_setcolreg
	.comm	disp,4,4
	.comm	GC_L0PAL0,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mb862xxfbdrv.c_mb862xxfb_setcolreg.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mb862xxfb_setcolreg, %function
mb862xxfb_setcolreg:
	@ args = 8, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r5, [sp, #36]
	mov	r4, r0
	ldr	ip, [r5, #12]
	mov	r9, r2
	cmp	ip, #128
	mov	r8, r3
	beq	.L2
	cmp	ip, #129
	bne	.L9
	cmp	r0, #255
	bls	.L10
.L6:
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L9:
	mov	r0, #1
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L2:
	cmp	r0, #15
	bhi	.L6
	mov	r0, r1
	add	r1, r5, #8
	ldr	r7, [r5, #16]
	bl	chan_to_field
	add	r1, r5, #4
	mov	r6, r0
	mov	r0, r9
	bl	chan_to_field
	mov	r2, r0
	mov	r1, r5
	mov	r0, r8
	orr	r5, r6, r2
	bl	chan_to_field
	ldr	r3, [r7]
	orr	r5, r5, r0
	str	r5, [r3, r4, lsl #2]
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L10:
	ldr	r0, .L11
	bic	r2, r2, #255
	ldr	ip, [r0]
	ldr	r0, .L11+4
	orr	r2, r2, r3, lsr #8
	lsr	r1, r1, #8
	orr	r2, r2, r1, lsl #16
	ldr	r0, [r0]
	add	r1, ip, r4, lsl #2
	bl	outreg
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L12:
	.align	2
.L11:
	.word	GC_L0PAL0
	.word	disp
	.size	mb862xxfb_setcolreg, .-mb862xxfb_setcolreg
	.comm	disp,4,4
	.comm	GC_L0PAL0,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
