	.file	"extr_hevcdsp_msa.c_hevc_hz_4t_24w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	hevc_hz_4t_24w_msa, @function
hevc_hz_4t_24w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15d, ecx
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, r9d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, r8
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 120
	.cfi_def_cfa_offset 176
	mov	edi, DWORD PTR ff_hevc_mask_arr[rip]
	mov	DWORD PTR 100[rsp], ecx
	lea	rcx, 64[rdx]
	mov	DWORD PTR 96[rsp], esi
	mov	QWORD PTR 48[rsp], rdx
	mov	QWORD PTR 72[rsp], rcx
	call	LD_SB@PLT
	lea	rcx, -4[rbp]
	mov	rdi, r12
	mov	rbx, rax
	mov	QWORD PTR 64[rsp], rcx
	mov	QWORD PTR 16[rsp], rax
	call	LD_SH@PLT
	xor	r8d, r8d
	xor	ecx, ecx
	xor	esi, esi
	mov	edi, eax
	mov	edx, 1
	call	SPLATI_H2_SH@PLT
	lea	rcx, 2[rbx]
	mov	edi, 128
	mov	QWORD PTR 8[rsp], rcx
	lea	rcx, 8[rbx]
	mov	QWORD PTR 24[rsp], rcx
	lea	rcx, 10[rbx]
	mov	QWORD PTR 32[rsp], rcx
	call	__msa_ldi_h@PLT
	sal	eax, 6
	mov	ebx, eax
	mov	eax, r13d
	sar	eax, 2
	lea	ecx, -1[rax]
	mov	DWORD PTR 44[rsp], ecx
	je	.L1
	mov	eax, DWORD PTR 96[rsp]
	movsx	rdx, r15d
	sal	eax, 2
	cdqe
	sal	rax, 2
	mov	QWORD PTR 104[rsp], rax
	lea	rax, 0[0+rdx*4]
	mov	QWORD PTR 80[rsp], rax
	lea	eax, 0[0+r15*4]
	cdqe
	sal	rax, 2
	mov	QWORD PTR 88[rsp], rax
	lea	rax, [r14+rdx*8]
	mov	QWORD PTR 56[rsp], rax
	.p2align 4,,10
	.p2align 3
.L3:
	mov	ebp, DWORD PTR 96[rsp]
	mov	r14, QWORD PTR 64[rsp]
	xor	r15d, r15d
	xor	r10d, r10d
	xor	r11d, r11d
	xor	r9d, r9d
	mov	rcx, r10
	mov	r8, r15
	mov	rdx, r11
	mov	esi, ebp
	mov	rdi, r14
	xor	r12d, r12d
	call	LD_SB4@PLT
	xor	r9d, r9d
	xor	r8d, r8d
	xor	ecx, ecx
	xor	edx, edx
	lea	rdi, 64[r14]
	mov	esi, ebp
	xor	ebp, ebp
	call	LD_SB4@PLT
	mov	rax, QWORD PTR 104[rsp]
	xor	r10d, r10d
	xor	r11d, r11d
	xor	r9d, r9d
	xor	ecx, ecx
	xor	esi, esi
	mov	rdx, r10
	add	r14, rax
	mov	r8, r15
	mov	rdi, r11
	xor	r13d, r13d
	mov	QWORD PTR 64[rsp], r14
	xor	r14d, r14d
	push	0
	.cfi_def_cfa_offset 184
	push	0
	.cfi_def_cfa_offset 192
	call	XORI_B8_128_SB@PLT
	push	r12
	.cfi_def_cfa_offset 200
	xor	r11d, r11d
	push	rbp
	.cfi_def_cfa_offset 208
	mov	r9, QWORD PTR 40[rsp]
	mov	rcx, r11
	mov	rdx, r11
	mov	r8, QWORD PTR 48[rsp]
	mov	rsi, r11
	mov	rdi, r11
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 184
	xor	r11d, r11d
	xor	ecx, ecx
	push	rbp
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 48[rsp]
	mov	rdx, r11
	mov	rdi, r11
	mov	r8, QWORD PTR 40[rsp]
	xor	esi, esi
	call	VSHF_B2_SB@PLT
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 200
	xor	r10d, r10d
	push	rbp
	.cfi_def_cfa_offset 208
	mov	r9, QWORD PTR 40[rsp]
	mov	rcx, r10
	mov	rdx, r10
	mov	r8, QWORD PTR 48[rsp]
	mov	rsi, r10
	mov	rdi, r10
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 184
	xor	r10d, r10d
	xor	ecx, ecx
	push	rbp
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 48[rsp]
	mov	rdx, r10
	mov	rdi, r10
	mov	r8, QWORD PTR 40[rsp]
	xor	esi, esi
	call	VSHF_B2_SB@PLT
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	mov	rdx, QWORD PTR 64[rsp]
	mov	esi, ebx
	mov	edi, ebx
	mov	ecx, 8
	call	ST_SH2@PLT
	mov	rax, QWORD PTR 96[rsp]
	mov	esi, ebx
	mov	edi, ebx
	add	rax, QWORD PTR 64[rsp]
	mov	ecx, 8
	mov	rdx, rax
	call	ST_SH2@PLT
	push	r12
	.cfi_def_cfa_offset 200
	mov	rcx, r15
	mov	rdx, r15
	push	rbp
	.cfi_def_cfa_offset 208
	mov	r9, QWORD PTR 40[rsp]
	mov	rsi, r15
	mov	rdi, r15
	mov	r8, QWORD PTR 48[rsp]
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 184
	xor	ecx, ecx
	mov	rdx, r15
	push	rbp
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 48[rsp]
	xor	esi, esi
	mov	rdi, r15
	mov	r8, QWORD PTR 40[rsp]
	call	VSHF_B2_SB@PLT
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 200
	xor	ecx, ecx
	xor	edx, edx
	push	rbp
	.cfi_def_cfa_offset 208
	mov	r15, QWORD PTR 48[rsp]
	xor	esi, esi
	xor	edi, edi
	mov	r9, QWORD PTR 40[rsp]
	mov	r8, r15
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 184
	xor	ecx, ecx
	xor	edx, edx
	push	rbp
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 48[rsp]
	xor	esi, esi
	xor	edi, edi
	mov	r8, QWORD PTR 40[rsp]
	call	VSHF_B2_SB@PLT
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	mov	rdx, QWORD PTR 72[rsp]
	mov	esi, ebx
	mov	edi, ebx
	mov	ecx, 8
	call	ST_SH2@PLT
	mov	rax, QWORD PTR 96[rsp]
	mov	esi, ebx
	mov	edi, ebx
	add	rax, QWORD PTR 72[rsp]
	mov	ecx, 8
	mov	rdx, rax
	call	ST_SH2@PLT
	mov	rdi, QWORD PTR 104[rsp]
	mov	r8, r15
	xor	ecx, ecx
	add	QWORD PTR 64[rsp], rdi
	xor	edx, edx
	xor	esi, esi
	xor	edi, edi
	push	r12
	.cfi_def_cfa_offset 200
	push	rbp
	.cfi_def_cfa_offset 208
	mov	r9, QWORD PTR 40[rsp]
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 184
	mov	r8, r15
	xor	ecx, ecx
	push	rbp
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 24[rsp]
	xor	edx, edx
	xor	esi, esi
	xor	edi, edi
	call	VSHF_B2_SB@PLT
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 200
	mov	r8, r15
	xor	ecx, ecx
	push	rbp
	.cfi_def_cfa_offset 208
	mov	r9, QWORD PTR 40[rsp]
	xor	edx, edx
	xor	esi, esi
	xor	edi, edi
	call	VSHF_B2_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 176
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	push	r12
	.cfi_def_cfa_offset 184
	mov	r8, r15
	xor	ecx, ecx
	push	rbp
	.cfi_def_cfa_offset 192
	mov	r9, QWORD PTR 24[rsp]
	xor	edx, edx
	xor	esi, esi
	xor	edi, edi
	call	VSHF_B2_SB@PLT
	mov	r9d, ebx
	mov	r8d, ebx
	mov	ecx, r14d
	mov	edx, r13d
	mov	rsi, r12
	mov	rdi, rbp
	call	DPADD_SB2_SH@PLT
	mov	r15, QWORD PTR 88[rsp]
	mov	edx, ebx
	mov	esi, ebx
	mov	r9d, DWORD PTR 116[rsp]
	mov	edi, ebx
	mov	ecx, ebx
	mov	r8, r15
	call	ST_SH4@PLT
	mov	rdi, QWORD PTR 104[rsp]
	sub	DWORD PTR 60[rsp], 1
	mov	rdx, r15
	mov	esi, DWORD PTR 60[rsp]
	add	QWORD PTR 72[rsp], rdi
	add	rdx, rdi
	mov	QWORD PTR 88[rsp], rdx
	pop	rax
	.cfi_def_cfa_offset 184
	pop	rdx
	.cfi_def_cfa_offset 176
	cmp	esi, -1
	jne	.L3
.L1:
	add	rsp, 120
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	hevc_hz_4t_24w_msa, .-hevc_hz_4t_24w_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevcdsp_msa.c_hevc_hz_4t_24w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	hevc_hz_4t_24w_msa, %function
hevc_hz_4t_24w_msa:
	@ args = 8, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	ip, .L10
	sub	sp, sp, #76
	mov	r7, r0
	ldr	r0, [ip]
	mov	r8, r2
	mov	fp, r1
	mov	r5, r3
	str	r1, [sp, #48]
	str	r2, [sp, #28]
	str	r3, [sp, #60]
	ldr	r4, [sp, #116]
	bl	LD_SB
	mov	r6, #0
	mov	r9, r0
	ldr	r0, [sp, #112]
	str	r9, [sp, #32]
	bl	LD_SH
	mov	r3, r6
	mov	r2, #1
	mov	r1, r6
	str	r6, [sp]
	bl	SPLATI_H2_SH
	mov	r0, #128
	bl	__msa_ldi_h
	sub	r2, r7, #4
	str	r2, [sp, #24]
	add	r2, r8, #64
	str	r2, [sp, #44]
	add	r2, r9, #2
	asr	r3, r4, #2
	str	r2, [sp, #36]
	add	r2, r9, #8
	cmp	r3, r6
	str	r2, [sp, #16]
	sub	r3, r3, #1
	add	r2, r9, #10
	str	r3, [sp, #40]
	str	r2, [sp, #20]
	beq	.L1
	lsl	r10, r0, #6
	mov	r9, r10
	lsl	r2, fp, #4
	str	r2, [sp, #64]
	lsl	r2, r5, #2
	str	r2, [sp, #52]
	add	r3, r8, r5, lsl #3
	lsl	r2, r5, #4
	str	r2, [sp, #68]
	str	r3, [sp, #56]
.L3:
	mov	r10, #0
	ldr	r1, [sp, #48]
	mov	r3, r10
	mov	r2, r10
	str	r10, [sp, #4]
	str	r10, [sp]
	ldr	r0, [sp, #24]
	bl	LD_SB4
	ldr	r0, [sp, #24]
	mov	r3, r10
	mov	r2, r10
	ldr	r1, [sp, #48]
	str	r10, [sp, #4]
	str	r10, [sp]
	add	r0, r0, #64
	bl	LD_SB4
	mov	r3, r10
	mov	r8, r10
	mov	r7, r10
	mov	r2, r10
	mov	r1, r10
	stmib	sp, {r3, r10}
	mov	r0, r10
	str	r10, [sp, #12]
	str	r10, [sp]
	bl	XORI_B8_128_SB
	ldr	r3, [sp, #36]
	ldr	r2, [sp, #32]
	mov	r1, r10
	mov	r0, r10
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r3, r10
	mov	r2, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	bl	VSHF_B2_SB
	mov	r1, r10
	mov	r3, r10
	mov	r2, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	r1, [sp, #20]
	ldr	r0, [sp, #16]
	mov	r3, r10
	mov	r2, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r1, [sp, #4]
	str	r0, [sp]
	mov	r1, r10
	mov	r0, r10
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	r6, [sp, #36]
	ldr	r2, [sp, #32]
	mov	r3, r10
	mov	r1, r10
	mov	r0, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r2, [sp]
	str	r6, [sp, #4]
	mov	r2, r10
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	r1, [sp, #20]
	ldr	r0, [sp, #16]
	mov	r3, r10
	mov	r2, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r1, [sp, #4]
	str	r0, [sp]
	mov	r1, r10
	mov	r0, r10
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	fp, [sp, #28]
	mov	r3, #8
	mov	r2, fp
	mov	r1, r9
	mov	r0, r9
	bl	ST_SH2
	ldr	lr, [sp, #52]
	mov	r3, #8
	add	r2, fp, lr
	mov	r1, r9
	mov	r0, r9
	str	fp, [sp, #28]
	bl	ST_SH2
	ldr	fp, [sp, #32]
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	stmib	sp, {r6, r7, r8}
	str	fp, [sp]
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	r1, [sp, #20]
	ldr	r0, [sp, #16]
	mov	r3, r10
	mov	r2, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r1, [sp, #4]
	str	r0, [sp]
	mov	r1, r10
	mov	r0, r10
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	stmib	sp, {r6, r7, r8}
	str	fp, [sp]
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	r1, [sp, #20]
	ldr	r0, [sp, #16]
	mov	r3, r10
	mov	r2, r10
	str	r10, [sp, #12]
	str	r10, [sp, #8]
	str	r1, [sp, #4]
	str	r0, [sp]
	mov	r1, r10
	mov	r0, r10
	bl	VSHF_B2_SB
	mov	r3, r10
	mov	r2, r10
	mov	r1, r10
	mov	r0, r10
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	ldr	r10, [sp, #56]
	mov	r3, #8
	mov	r2, r10
	mov	r1, r9
	mov	r0, r9
	bl	ST_SH2
	ldr	r2, [sp, #52]
	mov	r3, #8
	mov	r1, r9
	add	r2, r2, r10
	mov	r0, r9
	bl	ST_SH2
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stmib	sp, {r6, r7, r8}
	str	fp, [sp]
	bl	VSHF_B2_SB
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stmib	sp, {r6, r7, r8}
	str	fp, [sp]
	bl	VSHF_B2_SB
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stmib	sp, {r6, r7, r8}
	str	fp, [sp]
	bl	VSHF_B2_SB
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	str	r9, [sp, #4]
	str	r9, [sp]
	bl	DPADD_SB2_SH
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stmib	sp, {r6, r7, r8}
	str	fp, [sp]
	bl	VSHF_B2_SB
	ldr	lr, [sp, #40]
	mov	r3, r8
	sub	r4, lr, #1
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	str	r9, [sp, #4]
	str	r9, [sp]
	str	r4, [sp, #40]
	bl	DPADD_SB2_SH
	ldr	r3, [sp, #60]
	ldr	r5, [sp, #44]
	mov	r2, r9
	str	r3, [sp, #4]
	mov	r1, r9
	mov	r3, r9
	mov	r0, r9
	str	r5, [sp]
	bl	ST_SH4
	ldr	r0, [sp, #24]
	ldr	r3, [sp, #64]
	ldr	ip, [sp, #28]
	add	r3, r0, r3
	str	r3, [sp, #24]
	ldr	r3, [sp, #68]
	cmn	r4, #1
	add	r2, r3, ip
	str	r2, [sp, #28]
	add	r2, r10, r3
	add	r3, r5, r3
	str	r2, [sp, #56]
	str	r3, [sp, #44]
	bne	.L3
.L1:
	add	sp, sp, #76
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	.align	2
.L10:
	.word	ff_hevc_mask_arr
	.size	hevc_hz_4t_24w_msa, .-hevc_hz_4t_24w_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
