	.file	"extr_radeon_device.c_radeon_program_register_sequence.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	radeon_program_register_sequence
	.type	radeon_program_register_sequence, @function
radeon_program_register_sequence:
.LFB0:
	.cfi_startproc
	endbr64
	imul	eax, edx, -1431655765
	add	eax, 715827882
	cmp	eax, 1431655764
	ja	.L10
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, edx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	test	edx, edx
	jle	.L1
	mov	r12, rsi
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L4:
	mov	ebp, DWORD PTR 4[r12+rbx*4]
	mov	r15d, DWORD PTR [r12+rbx*4]
	mov	r14d, DWORD PTR 8[r12+rbx*4]
	cmp	ebp, -1
	je	.L3
	mov	edi, r15d
	not	ebp
	call	RREG32@PLT
	and	ebp, eax
	or	r14d, ebp
.L3:
	mov	esi, r14d
	mov	edi, r15d
	add	rbx, 3
	call	WREG32@PLT
	cmp	r13d, ebx
	jg	.L4
.L1:
	add	rsp, 8
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	.cfi_restore 15
	ret
	.cfi_endproc
.LFE0:
	.size	radeon_program_register_sequence, .-radeon_program_register_sequence
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_radeon_device.c_radeon_program_register_sequence.c"
	.text
	.align	2
	.global	radeon_program_register_sequence
	.syntax unified
	.arm
	.fpu softvfp
	.type	radeon_program_register_sequence, %function
radeon_program_register_sequence:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r5, .L11
	smull	r3, r5, r2, r5
	sub	r5, r5, r2, asr #31
	add	r5, r5, r5, lsl #1
	subs	r5, r2, r5
	popne	{r4, r5, r6, r7, r8, r9, r10, pc}
	cmp	r2, #0
	mov	r6, r2
	pople	{r4, r5, r6, r7, r8, r9, r10, pc}
	mov	r4, r1
.L4:
	ldr	r9, [r4, #4]
	ldr	r8, [r4]
	cmn	r9, #1
	ldr	r7, [r4, #8]
	add	r5, r5, #3
	beq	.L3
	mov	r0, r8
	bl	RREG32
	bic	r9, r0, r9
	orr	r7, r7, r9
.L3:
	mov	r1, r7
	mov	r0, r8
	bl	WREG32
	cmp	r6, r5
	add	r4, r4, #12
	bgt	.L4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L12:
	.align	2
.L11:
	.word	1431655766
	.size	radeon_program_register_sequence, .-radeon_program_register_sequence
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
