	.file	"extr_amdgpu_uvd.c_amdgpu_uvd_get_create_msg.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	amdgpu_uvd_get_create_msg
	.type	amdgpu_uvd_get_create_msg, @function
amdgpu_uvd_get_create_msg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rdx
	xor	r9d, r9d
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	ebp, esi
	mov	esi, 1024
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 48
	.cfi_def_cfa_offset 88
	mov	rdi, QWORD PTR [rdi]
	mov	ecx, DWORD PTR AMDGPU_GEM_DOMAIN_VRAM[rip]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 32[rsp], rax
	xor	eax, eax
	lea	rax, 24[rsp]
	mov	edx, DWORD PTR PAGE_SIZE[rip]
	mov	QWORD PTR 16[rsp], 0
	push	rax
	.cfi_def_cfa_offset 96
	lea	r8, 24[rsp]
	call	amdgpu_bo_create_reserved@PLT
	pop	rdx
	.cfi_def_cfa_offset 88
	pop	rcx
	.cfi_def_cfa_offset 80
	test	eax, eax
	je	.L8
.L1:
	mov	rcx, QWORD PTR 24[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L9
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore_state
	mov	rbx, QWORD PTR 16[rsp]
	mov	edi, 3556
	call	cpu_to_le32@PLT
	xor	edi, edi
	mov	DWORD PTR [rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	mov	edi, ebp
	mov	DWORD PTR 4[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	xor	edi, edi
	mov	DWORD PTR 8[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	xor	edi, edi
	mov	DWORD PTR 12[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	xor	edi, edi
	mov	DWORD PTR 16[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	xor	edi, edi
	mov	DWORD PTR 20[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	mov	edi, 1920
	mov	DWORD PTR 24[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	mov	edi, 1088
	mov	DWORD PTR 28[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	xor	edi, edi
	mov	DWORD PTR 32[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	mov	edi, 28536832
	mov	DWORD PTR 36[rbx], eax
	mov	rbx, QWORD PTR 16[rsp]
	call	cpu_to_le32@PLT
	mov	DWORD PTR 40[rbx], eax
	mov	ebx, 44
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rbp, QWORD PTR 16[rsp]
	xor	edi, edi
	call	cpu_to_le32@PLT
	add	rbp, rbx
	add	rbx, 4
	mov	DWORD PTR 0[rbp], eax
	cmp	rbx, 4096
	jne	.L3
	mov	rsi, QWORD PTR 8[rsp]
	mov	rcx, r13
	mov	edx, 1
	mov	rdi, r12
	call	amdgpu_uvd_send_msg@PLT
	jmp	.L1
.L9:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	amdgpu_uvd_get_create_msg, .-amdgpu_uvd_get_create_msg
	.comm	PAGE_SIZE,4,4
	.comm	AMDGPU_GEM_DOMAIN_VRAM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amdgpu_uvd.c_amdgpu_uvd_get_create_msg.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	amdgpu_uvd_get_create_msg
	.syntax unified
	.arm
	.fpu softvfp
	.type	amdgpu_uvd_get_create_msg, %function
amdgpu_uvd_get_create_msg:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, #0
	sub	sp, sp, #32
	mov	r7, r2
	ldr	r3, .L10
	ldr	r2, .L10+4
	mov	r6, r0
	mov	r5, r1
	ldr	r0, [r0]
	add	r1, sp, #24
	str	r4, [sp, #4]
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	ip, .L10+8
	str	r1, [sp, #8]
	add	r1, sp, #20
	str	r1, [sp]
	mov	r1, #1024
	ldr	ip, [ip]
	str	ip, [sp, #28]
	mov	ip,#0
	str	r4, [sp, #20]
	bl	amdgpu_bo_create_reserved
	subs	r4, r0, #0
	beq	.L8
.L1:
	ldr	r3, .L10+8
	ldr	r2, [r3]
	ldr	r3, [sp, #28]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L9
	mov	r0, r4
	add	sp, sp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L8:
	ldr	r0, .L10+12
	ldr	r8, [sp, #24]
	bl	cpu_to_le32
	str	r0, [r8]
	mov	r0, r4
	ldr	r8, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r5
	str	r3, [r8, #4]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r4
	str	r3, [r5, #8]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r4
	str	r3, [r5, #12]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r4
	str	r3, [r5, #16]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r4
	str	r3, [r5, #20]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, #1920
	str	r3, [r5, #24]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, #1088
	str	r3, [r5, #28]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r4
	str	r3, [r5, #32]
	ldr	r4, [sp, #24]
	bl	cpu_to_le32
	mov	r3, r0
	ldr	r0, .L10+16
	str	r3, [r4, #36]
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	mov	r4, #44
	str	r0, [r5, #40]
.L3:
	mov	r0, #0
	ldr	r5, [sp, #24]
	bl	cpu_to_le32
	str	r0, [r5, r4]
	add	r4, r4, #4
	cmp	r4, #4096
	bne	.L3
	mov	r3, r7
	mov	r0, r6
	mov	r2, #1
	ldr	r1, [sp, #20]
	bl	amdgpu_uvd_send_msg
	mov	r4, r0
	b	.L1
.L9:
	bl	__stack_chk_fail
.L11:
	.align	2
.L10:
	.word	AMDGPU_GEM_DOMAIN_VRAM
	.word	PAGE_SIZE
	.word	.LC0
	.word	3556
	.word	28536832
	.size	amdgpu_uvd_get_create_msg, .-amdgpu_uvd_get_create_msg
	.comm	PAGE_SIZE,4,4
	.comm	AMDGPU_GEM_DOMAIN_VRAM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
