	.file	"extr_if_bce.c_bce_chipinit.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	bce_chipinit, @function
bce_chipinit:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	mov	edi, DWORD PTR BCE_VERBOSE_RESET[rip]
	call	DBENTER@PLT
	mov	rdi, rbp
	call	bce_disable_intr@PLT
	mov	edx, DWORD PTR DMA_WRITE_CHANS[rip]
	mov	r12d, DWORD PTR BCE_DMA_CONFIG_DATA_BYTE_SWAP[rip]
	or	r12d, DWORD PTR BCE_DMA_CONFIG_DATA_WORD_SWAP[rip]
	mov	eax, DWORD PTR 0[rbp]
	sal	edx, 16
	or	r12d, edx
	mov	edx, DWORD PTR DMA_READ_CHANS[rip]
	or	r12d, DWORD PTR BCE_DMA_CONFIG_CNTL_BYTE_SWAP[rip]
	or	r12d, DWORD PTR BCE_DMA_CONFIG_CNTL_WORD_SWAP[rip]
	or	r12d, DWORD PTR BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY[rip]
	sal	edx, 12
	or	r12d, edx
	or	r12d, 2097152
	test	DWORD PTR BCE_PCIX_FLAG[rip], eax
	je	.L2
	cmp	DWORD PTR 4[rbp], 133
	je	.L15
.L2:
	mov	rdi, rbp
	call	BCE_CHIP_NUM@PLT
	cmp	rax, QWORD PTR BCE_CHIP_NUM_5706[rip]
	je	.L16
.L3:
	mov	esi, DWORD PTR BCE_DMA_CONFIG[rip]
	mov	edx, r12d
	mov	rdi, rbp
	call	REG_WR@PLT
	mov	esi, DWORD PTR BCE_MISC_ENABLE_SET_BITS[rip]
	mov	edx, DWORD PTR BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE[rip]
	mov	rdi, rbp
	or	edx, DWORD PTR BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE[rip]
	or	edx, DWORD PTR BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE[rip]
	call	REG_WR@PLT
	mov	rdi, rbp
	call	bce_init_ctx@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L17
.L4:
	mov	edi, DWORD PTR BCE_VERBOSE_RESET[rip]
	call	DBEXIT@PLT
	mov	eax, r12d
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L17:
	.cfi_restore_state
	mov	rdi, rbp
	call	bce_init_cpus@PLT
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR BCE_MFW_ENABLE_FLAG[rip], eax
	jne	.L18
.L5:
	mov	rdi, rbp
	call	bce_init_nvram@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L4
	mov	esi, DWORD PTR BCE_MQ_CONFIG[rip]
	mov	rdi, rbp
	call	REG_RD@PLT
	mov	r13d, DWORD PTR BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE[rip]
	mov	rdi, rbp
	not	r13d
	and	r13d, eax
	or	r13d, DWORD PTR BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256[rip]
	call	BCE_CHIP_NUM@PLT
	cmp	rax, QWORD PTR BCE_CHIP_NUM_5709[rip]
	je	.L19
.L6:
	mov	esi, DWORD PTR BCE_MQ_CONFIG[rip]
	mov	edx, r13d
	mov	rdi, rbp
	call	REG_WR@PLT
	mov	r13d, DWORD PTR MAX_CID_CNT[rip]
	imul	r13d, DWORD PTR MB_KERNEL_CTX_SIZE[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR BCE_MQ_KNL_BYP_WIND_START[rip]
	add	r13d, 65536
	mov	edx, r13d
	call	REG_WR@PLT
	mov	esi, DWORD PTR BCE_MQ_KNL_WIND_END[rip]
	mov	edx, r13d
	mov	rdi, rbp
	call	REG_WR@PLT
	mov	eax, DWORD PTR BCM_PAGE_BITS[rip]
	mov	esi, DWORD PTR BCE_RV2P_CONFIG[rip]
	mov	rdi, rbp
	lea	edx, -8[rax]
	sal	edx, 24
	call	REG_WR@PLT
	mov	esi, DWORD PTR BCE_TBDR_CONFIG[rip]
	mov	rdi, rbp
	call	REG_RD@PLT
	mov	esi, DWORD PTR BCE_TBDR_CONFIG[rip]
	mov	rdi, rbp
	mov	r8d, eax
	mov	eax, DWORD PTR BCM_PAGE_BITS[rip]
	lea	edx, -8[rax]
	mov	eax, DWORD PTR BCE_TBDR_CONFIG_PAGE_SIZE[rip]
	sal	edx, 24
	not	eax
	and	eax, r8d
	or	edx, eax
	or	edx, 64
	call	REG_WR@PLT
	mov	esi, DWORD PTR BCE_RXP_PM_CTRL[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	REG_WR_IND@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L16:
	mov	rdi, rbp
	call	BCE_CHIP_ID@PLT
	cmp	rax, QWORD PTR BCE_CHIP_ID_5706_A0[rip]
	je	.L3
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR BCE_PCIX_FLAG[rip], eax
	jne	.L3
	or	r12d, DWORD PTR BCE_DMA_CONFIG_CNTL_PING_PONG_DMA[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L15:
	or	r12d, DWORD PTR BCE_DMA_CONFIG_PCI_FAST_CLK_CMP[rip]
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L18:
	mov	esi, DWORD PTR BCE_RPM_MGMT_PKT_CTRL[rip]
	mov	rdi, rbp
	call	REG_RD@PLT
	mov	esi, DWORD PTR BCE_RPM_MGMT_PKT_CTRL[rip]
	or	eax, DWORD PTR BCE_RPM_MGMT_PKT_CTRL_MGMT_EN[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	REG_WR@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L19:
	mov	rdi, rbp
	or	r13d, DWORD PTR BCE_MQ_CONFIG_BIN_MQ_MODE[rip]
	call	BCE_CHIP_ID@PLT
	cmp	rax, QWORD PTR BCE_CHIP_ID_5709_A1[rip]
	jne	.L6
	or	r13d, DWORD PTR BCE_MQ_CONFIG_HALT_DIS[rip]
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	bce_chipinit, .-bce_chipinit
	.comm	MB_KERNEL_CTX_SIZE,4,4
	.comm	MAX_CID_CNT,4,4
	.comm	DMA_WRITE_CHANS,4,4
	.comm	DMA_READ_CHANS,4,4
	.comm	BCM_PAGE_BITS,4,4
	.comm	BCE_VERBOSE_RESET,4,4
	.comm	BCE_TBDR_CONFIG_PAGE_SIZE,4,4
	.comm	BCE_TBDR_CONFIG,4,4
	.comm	BCE_RXP_PM_CTRL,4,4
	.comm	BCE_RV2P_CONFIG,4,4
	.comm	BCE_RPM_MGMT_PKT_CTRL_MGMT_EN,4,4
	.comm	BCE_RPM_MGMT_PKT_CTRL,4,4
	.comm	BCE_PCIX_FLAG,4,4
	.comm	BCE_MQ_KNL_WIND_END,4,4
	.comm	BCE_MQ_KNL_BYP_WIND_START,4,4
	.comm	BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256,4,4
	.comm	BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE,4,4
	.comm	BCE_MQ_CONFIG_HALT_DIS,4,4
	.comm	BCE_MQ_CONFIG_BIN_MQ_MODE,4,4
	.comm	BCE_MQ_CONFIG,4,4
	.comm	BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE,4,4
	.comm	BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE,4,4
	.comm	BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE,4,4
	.comm	BCE_MISC_ENABLE_SET_BITS,4,4
	.comm	BCE_MFW_ENABLE_FLAG,4,4
	.comm	BCE_DMA_CONFIG_PCI_FAST_CLK_CMP,4,4
	.comm	BCE_DMA_CONFIG_DATA_WORD_SWAP,4,4
	.comm	BCE_DMA_CONFIG_DATA_BYTE_SWAP,4,4
	.comm	BCE_DMA_CONFIG_CNTL_WORD_SWAP,4,4
	.comm	BCE_DMA_CONFIG_CNTL_PING_PONG_DMA,4,4
	.comm	BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY,4,4
	.comm	BCE_DMA_CONFIG_CNTL_BYTE_SWAP,4,4
	.comm	BCE_DMA_CONFIG,4,4
	.comm	BCE_CHIP_NUM_5709,8,8
	.comm	BCE_CHIP_NUM_5706,8,8
	.comm	BCE_CHIP_ID_5709_A1,8,8
	.comm	BCE_CHIP_ID_5706_A0,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_if_bce.c_bce_chipinit.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bce_chipinit, %function
bce_chipinit:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r7, r0
	ldr	r5, .L19
	ldr	r6, .L19+4
	ldr	r0, [r5]
	bl	DBENTER
	mov	r0, r7
	bl	bce_disable_intr
	ldr	r1, .L19+8
	ldr	r2, .L19+12
	ldr	r3, .L19+16
	ldr	r4, [r1]
	ldr	r1, [r2]
	ldr	r3, [r3]
	ldr	r2, .L19+20
	orr	r4, r4, r1
	ldr	r1, .L19+24
	ldr	r2, [r2]
	orr	r4, r4, r3, lsl #16
	ldr	r3, .L19+28
	ldr	r1, [r1]
	ldr	r3, [r3]
	orr	r4, r4, r2
	ldr	r2, .L19+32
	orr	r4, r4, r1
	orr	r4, r4, r3
	ldr	r2, [r2]
	ldr	r1, [r7]
	ldr	r3, [r6]
	orr	r4, r4, r2, lsl #12
	tst	r1, r3
	orr	r4, r4, #2097152
	beq	.L2
	ldr	r3, [r7, #4]
	cmp	r3, #133
	ldreq	r3, .L19+36
	ldreq	r3, [r3]
	orreq	r4, r4, r3
.L2:
	mov	r0, r7
	bl	BCE_CHIP_NUM
	ldr	r3, .L19+40
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L15
.L3:
	ldr	r3, .L19+44
	mov	r2, r4
	ldr	r1, [r3]
	mov	r0, r7
	bl	REG_WR
	ldr	r1, .L19+48
	ldr	r3, .L19+52
	ldr	r2, .L19+56
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L19+60
	orr	r3, r3, r0
	ldr	r1, [r1]
	orr	r2, r3, r2
	mov	r0, r7
	bl	REG_WR
	mov	r0, r7
	bl	bce_init_ctx
	subs	r4, r0, #0
	beq	.L16
.L4:
	ldr	r0, [r5]
	bl	DBEXIT
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, pc}
.L16:
	mov	r0, r7
	bl	bce_init_cpus
	ldr	r3, .L19+64
	ldr	r2, [r7]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L17
.L5:
	mov	r0, r7
	bl	bce_init_nvram
	subs	r4, r0, #0
	bne	.L4
	ldr	r8, .L19+68
	mov	r0, r7
	ldr	r1, [r8]
	bl	REG_RD
	ldr	r2, .L19+72
	ldr	r3, .L19+76
	ldr	r6, [r2]
	ldr	r2, [r3]
	bic	r6, r0, r6
	mov	r0, r7
	orr	r6, r6, r2
	bl	BCE_CHIP_NUM
	ldr	r3, .L19+80
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L18
.L6:
	mov	r2, r6
	ldr	r1, [r8]
	mov	r0, r7
	bl	REG_WR
	ldr	r2, .L19+84
	ldr	r3, .L19+88
	ldr	r6, [r2]
	ldr	r2, [r3]
	ldr	r3, .L19+92
	mul	r6, r2, r6
	add	r6, r6, #65536
	mov	r2, r6
	ldr	r1, [r3]
	mov	r0, r7
	bl	REG_WR
	ldr	r3, .L19+96
	ldr	r8, .L19+100
	mov	r2, r6
	ldr	r1, [r3]
	mov	r0, r7
	bl	REG_WR
	ldr	r2, [r8]
	ldr	r3, .L19+104
	ldr	r6, .L19+108
	sub	r2, r2, #8
	ldr	r1, [r3]
	lsl	r2, r2, #24
	mov	r0, r7
	bl	REG_WR
	ldr	r1, [r6]
	mov	r0, r7
	bl	REG_RD
	ldr	r2, .L19+112
	ldr	r3, [r8]
	ldr	r2, [r2]
	sub	r3, r3, #8
	bic	r2, r0, r2
	orr	r2, r2, r3, lsl #24
	ldr	r1, [r6]
	mov	r0, r7
	orr	r2, r2, #64
	bl	REG_WR
	ldr	r3, .L19+116
	mov	r0, r7
	mov	r2, #0
	ldr	r1, [r3]
	bl	REG_WR_IND
	b	.L4
.L15:
	mov	r0, r7
	bl	BCE_CHIP_ID
	ldr	r3, .L19+120
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L3
	ldr	r3, [r6]
	ldr	r2, [r7]
	tst	r2, r3
	ldreq	r3, .L19+124
	ldreq	r3, [r3]
	orreq	r4, r4, r3
	b	.L3
.L17:
	ldr	r4, .L19+128
	mov	r0, r7
	ldr	r1, [r4]
	bl	REG_RD
	mov	r2, r0
	ldr	r3, .L19+132
	mov	r0, r7
	ldr	r3, [r3]
	ldr	r1, [r4]
	orr	r2, r2, r3
	bl	REG_WR
	b	.L5
.L18:
	ldr	r3, .L19+136
	mov	r0, r7
	ldr	r3, [r3]
	orr	r6, r6, r3
	bl	BCE_CHIP_ID
	ldr	r3, .L19+140
	ldr	r3, [r3]
	cmp	r0, r3
	ldreq	r3, .L19+144
	ldreq	r3, [r3]
	orreq	r6, r6, r3
	b	.L6
.L20:
	.align	2
.L19:
	.word	BCE_VERBOSE_RESET
	.word	BCE_PCIX_FLAG
	.word	BCE_DMA_CONFIG_DATA_BYTE_SWAP
	.word	BCE_DMA_CONFIG_DATA_WORD_SWAP
	.word	DMA_WRITE_CHANS
	.word	BCE_DMA_CONFIG_CNTL_BYTE_SWAP
	.word	BCE_DMA_CONFIG_CNTL_WORD_SWAP
	.word	BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY
	.word	DMA_READ_CHANS
	.word	BCE_DMA_CONFIG_PCI_FAST_CLK_CMP
	.word	BCE_CHIP_NUM_5706
	.word	BCE_DMA_CONFIG
	.word	BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE
	.word	BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE
	.word	BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE
	.word	BCE_MISC_ENABLE_SET_BITS
	.word	BCE_MFW_ENABLE_FLAG
	.word	BCE_MQ_CONFIG
	.word	BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE
	.word	BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256
	.word	BCE_CHIP_NUM_5709
	.word	MAX_CID_CNT
	.word	MB_KERNEL_CTX_SIZE
	.word	BCE_MQ_KNL_BYP_WIND_START
	.word	BCE_MQ_KNL_WIND_END
	.word	BCM_PAGE_BITS
	.word	BCE_RV2P_CONFIG
	.word	BCE_TBDR_CONFIG
	.word	BCE_TBDR_CONFIG_PAGE_SIZE
	.word	BCE_RXP_PM_CTRL
	.word	BCE_CHIP_ID_5706_A0
	.word	BCE_DMA_CONFIG_CNTL_PING_PONG_DMA
	.word	BCE_RPM_MGMT_PKT_CTRL
	.word	BCE_RPM_MGMT_PKT_CTRL_MGMT_EN
	.word	BCE_MQ_CONFIG_BIN_MQ_MODE
	.word	BCE_CHIP_ID_5709_A1
	.word	BCE_MQ_CONFIG_HALT_DIS
	.size	bce_chipinit, .-bce_chipinit
	.comm	MB_KERNEL_CTX_SIZE,4,4
	.comm	MAX_CID_CNT,4,4
	.comm	DMA_WRITE_CHANS,4,4
	.comm	DMA_READ_CHANS,4,4
	.comm	BCM_PAGE_BITS,4,4
	.comm	BCE_VERBOSE_RESET,4,4
	.comm	BCE_TBDR_CONFIG_PAGE_SIZE,4,4
	.comm	BCE_TBDR_CONFIG,4,4
	.comm	BCE_RXP_PM_CTRL,4,4
	.comm	BCE_RV2P_CONFIG,4,4
	.comm	BCE_RPM_MGMT_PKT_CTRL_MGMT_EN,4,4
	.comm	BCE_RPM_MGMT_PKT_CTRL,4,4
	.comm	BCE_PCIX_FLAG,4,4
	.comm	BCE_MQ_KNL_WIND_END,4,4
	.comm	BCE_MQ_KNL_BYP_WIND_START,4,4
	.comm	BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256,4,4
	.comm	BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE,4,4
	.comm	BCE_MQ_CONFIG_HALT_DIS,4,4
	.comm	BCE_MQ_CONFIG_BIN_MQ_MODE,4,4
	.comm	BCE_MQ_CONFIG,4,4
	.comm	BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE,4,4
	.comm	BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE,4,4
	.comm	BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE,4,4
	.comm	BCE_MISC_ENABLE_SET_BITS,4,4
	.comm	BCE_MFW_ENABLE_FLAG,4,4
	.comm	BCE_DMA_CONFIG_PCI_FAST_CLK_CMP,4,4
	.comm	BCE_DMA_CONFIG_DATA_WORD_SWAP,4,4
	.comm	BCE_DMA_CONFIG_DATA_BYTE_SWAP,4,4
	.comm	BCE_DMA_CONFIG_CNTL_WORD_SWAP,4,4
	.comm	BCE_DMA_CONFIG_CNTL_PING_PONG_DMA,4,4
	.comm	BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY,4,4
	.comm	BCE_DMA_CONFIG_CNTL_BYTE_SWAP,4,4
	.comm	BCE_DMA_CONFIG,4,4
	.comm	BCE_CHIP_NUM_5709,4,4
	.comm	BCE_CHIP_NUM_5706,4,4
	.comm	BCE_CHIP_ID_5709_A1,4,4
	.comm	BCE_CHIP_ID_5706_A0,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
