	.file	"extr_dw_dmac.c_dwc_alloc_chan_resources.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"alloc_chan_resources\n"
.LC1:
	.string	"DMA channel not idle?\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC2:
	.string	"only allocated %d descriptors\n"
	.align 8
.LC3:
	.string	"alloc_chan_resources allocated %d descriptors\n"
	.text
	.p2align 4
	.type	dwc_alloc_chan_resources, @function
dwc_alloc_chan_resources:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rdi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	call	to_dw_dma_chan@PLT
	mov	edi, DWORD PTR 16[r13]
	mov	rbx, rax
	call	to_dw_dma@PLT
	mov	rdi, r13
	mov	r15, rax
	call	chan2dev@PLT
	lea	rsi, .LC0[rip]
	mov	edi, eax
	call	dev_vdbg@PLT
	mov	esi, DWORD PTR CH_EN[rip]
	mov	rdi, r15
	call	dma_readl@PLT
	test	DWORD PTR [rbx], eax
	jne	.L15
	mov	rbp, QWORD PTR 8[r13]
	mov	DWORD PTR 0[r13], 1
	xor	edx, edx
	mov	DWORD PTR 4[rbx], 1
	mov	r12, QWORD PTR DWC_CFGH_FIFO_MODE[rip]
	test	rbp, rbp
	je	.L5
	mov	rax, QWORD PTR 0[rbp]
	mov	edi, 1
	test	rax, rax
	jne	.L16
.L6:
	call	BUG_ON@PLT
	mov	r12, QWORD PTR 16[rbp]
	mov	rdx, QWORD PTR 8[rbp]
.L5:
	mov	esi, DWORD PTR CFG_LO[rip]
	mov	rdi, rbx
	lea	r14, 12[rbx]
	call	channel_writel@PLT
	mov	esi, DWORD PTR CFG_HI[rip]
	mov	rdx, r12
	mov	rdi, rbx
	call	channel_writel@PLT
	mov	rdi, r14
	call	spin_lock_bh@PLT
	mov	r12d, DWORD PTR 8[rbx]
	cmp	r12d, DWORD PTR NR_DESCS_PER_CHANNEL[rip]
	jl	.L9
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L8:
	lea	rdi, 16[rax]
	call	INIT_LIST_HEAD@PLT
	mov	rsi, r13
	lea	rdi, 4[rbp]
	call	dma_async_tx_descriptor_init@PLT
	mov	eax, DWORD PTR dwc_tx_submit[rip]
	mov	r12d, DWORD PTR DMA_TO_DEVICE[rip]
	mov	rdi, r13
	mov	DWORD PTR 12[rbp], eax
	mov	eax, DWORD PTR DMA_CTRL_ACK[rip]
	mov	DWORD PTR 8[rbp], eax
	call	chan2parent@PLT
	mov	ecx, r12d
	mov	edx, 4
	mov	rsi, rbp
	mov	edi, eax
	call	dma_map_single@PLT
	mov	rsi, rbp
	mov	rdi, rbx
	mov	DWORD PTR 4[rbp], eax
	call	dwc_desc_put@PLT
	mov	rdi, r14
	call	spin_lock_bh@PLT
	mov	eax, DWORD PTR 8[rbx]
	lea	r12d, 1[rax]
	cmp	r12d, DWORD PTR NR_DESCS_PER_CHANNEL[rip]
	mov	DWORD PTR 8[rbx], r12d
	jge	.L7
.L9:
	mov	rdi, r14
	call	spin_unlock_bh@PLT
	mov	esi, DWORD PTR GFP_KERNEL[rip]
	mov	edi, 20
	call	kzalloc@PLT
	mov	rbp, rax
	test	rax, rax
	jne	.L8
	mov	rdi, r13
	call	chan2dev@PLT
	mov	edx, r12d
	lea	rsi, .LC2[rip]
	mov	edi, eax
	call	dev_info@PLT
	mov	rdi, r14
	call	spin_lock_bh@PLT
.L7:
	mov	edx, DWORD PTR [rbx]
	mov	esi, DWORD PTR MASK[rip+8]
	mov	rdi, r15
	call	channel_set_bit@PLT
	mov	edx, DWORD PTR [rbx]
	mov	esi, DWORD PTR MASK[rip+4]
	mov	rdi, r15
	call	channel_set_bit@PLT
	mov	edx, DWORD PTR [rbx]
	mov	esi, DWORD PTR MASK[rip]
	mov	rdi, r15
	call	channel_set_bit@PLT
	mov	rdi, r14
	call	spin_unlock_bh@PLT
	mov	rdi, r13
	call	chan2dev@PLT
	mov	edx, r12d
	lea	rsi, .LC3[rip]
	mov	edi, eax
	xor	eax, eax
	call	dev_dbg@PLT
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L16:
	.cfi_restore_state
	xor	edi, edi
	cmp	QWORD PTR [r15], rax
	setne	dil
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L15:
	mov	rdi, r13
	call	chan2dev@PLT
	lea	rsi, .LC1[rip]
	mov	edi, eax
	xor	eax, eax
	call	dev_dbg@PLT
	mov	r12d, DWORD PTR EIO[rip]
	neg	r12d
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	dwc_alloc_chan_resources, .-dwc_alloc_chan_resources
	.comm	dwc_tx_submit,4,4
	.comm	NR_DESCS_PER_CHANNEL,4,4
	.comm	MASK,12,8
	.comm	GFP_KERNEL,4,4
	.comm	EIO,4,4
	.comm	DWC_CFGH_FIFO_MODE,8,8
	.comm	DMA_TO_DEVICE,4,4
	.comm	DMA_CTRL_ACK,4,4
	.comm	CH_EN,4,4
	.comm	CFG_LO,4,4
	.comm	CFG_HI,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_dw_dmac.c_dwc_alloc_chan_resources.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"alloc_chan_resources\012\000"
	.align	2
.LC1:
	.ascii	"DMA channel not idle?\012\000"
	.align	2
.LC2:
	.ascii	"only allocated %d descriptors\012\000"
	.align	2
.LC3:
	.ascii	"alloc_chan_resources allocated %d descriptors\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dwc_alloc_chan_resources, %function
dwc_alloc_chan_resources:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #12
	mov	r6, r0
	bl	to_dw_dma_chan
	mov	r5, r0
	ldr	r0, [r6, #8]
	bl	to_dw_dma
	mov	r4, r0
	str	r0, [sp, #4]
	mov	r0, r6
	bl	chan2dev
	ldr	r1, .L17
	bl	dev_vdbg
	ldr	r3, .L17+4
	mov	r0, r4
	ldr	r1, [r3]
	bl	dma_readl
	ldr	r2, [r5]
	ands	r2, r0, r2
	bne	.L14
	mov	r0, #1
	ldr	r4, [r6, #4]
	str	r0, [r6]
	cmp	r4, #0
	str	r0, [r5, #4]
	beq	.L15
	ldr	r3, [r4]
	cmp	r3, #0
	bne	.L16
.L6:
	bl	BUG_ON
	ldmib	r4, {r2, r7}
.L5:
	ldr	r3, .L17+8
	mov	r0, r5
	ldr	r1, [r3]
	bl	channel_writel
	ldr	r3, .L17+12
	mov	r2, r7
	ldr	r1, [r3]
	mov	r0, r5
	ldr	r8, .L17+16
	add	r7, r5, #12
	bl	channel_writel
	mov	r0, r7
	bl	spin_lock_bh
	ldr	r2, [r8]
	ldr	fp, [r5, #8]
	cmp	fp, r2
	bge	.L7
	ldr	r10, .L17+20
	ldr	r9, .L17+24
	b	.L9
.L8:
	bl	INIT_LIST_HEAD
	mov	r1, r6
	add	r0, r4, #4
	bl	dma_async_tx_descriptor_init
	ldr	r2, [r10]
	ldr	r3, [r9]
	str	r2, [r4, #12]
	str	r3, [r4, #8]
	mov	r0, r6
	bl	chan2parent
	ldr	r3, .L17+28
	mov	r2, #4
	ldr	r3, [r3]
	mov	r1, r4
	bl	dma_map_single
	mov	r1, r4
	str	r0, [r4, #4]
	mov	r0, r5
	bl	dwc_desc_put
	mov	r0, r7
	bl	spin_lock_bh
	ldr	fp, [r5, #8]
	ldr	r3, [r8]
	add	fp, fp, #1
	cmp	fp, r3
	str	fp, [r5, #8]
	bge	.L7
.L9:
	mov	r0, r7
	bl	spin_unlock_bh
	ldr	r3, .L17+32
	mov	r0, #20
	ldr	r1, [r3]
	bl	kzalloc
	subs	r4, r0, #0
	add	r0, r4, #16
	bne	.L8
	mov	r0, r6
	bl	chan2dev
	mov	r2, fp
	ldr	r1, .L17+36
	bl	dev_info
	mov	r0, r7
	bl	spin_lock_bh
.L7:
	ldr	r8, [sp, #4]
	ldr	r4, .L17+40
	ldr	r2, [r5]
	ldr	r1, [r4, #8]
	mov	r0, r8
	bl	channel_set_bit
	ldr	r1, [r4, #4]
	ldr	r2, [r5]
	mov	r0, r8
	bl	channel_set_bit
	ldr	r1, [r4]
	ldr	r2, [r5]
	mov	r0, r8
	bl	channel_set_bit
	mov	r0, r7
	bl	spin_unlock_bh
	mov	r0, r6
	bl	chan2dev
	mov	r2, fp
	ldr	r1, .L17+44
	bl	dev_dbg
	mov	r0, fp
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L16:
	ldr	r2, [sp, #4]
	ldr	r0, [r2]
	subs	r0, r0, r3
	movne	r0, #1
	b	.L6
.L15:
	ldr	r3, .L17+48
	ldr	r7, [r3]
	b	.L5
.L14:
	mov	r0, r6
	bl	chan2dev
	ldr	r1, .L17+52
	bl	dev_dbg
	ldr	r3, .L17+56
	ldr	r3, [r3]
	rsb	fp, r3, #0
	mov	r0, fp
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L18:
	.align	2
.L17:
	.word	.LC0
	.word	CH_EN
	.word	CFG_LO
	.word	CFG_HI
	.word	NR_DESCS_PER_CHANNEL
	.word	dwc_tx_submit
	.word	DMA_CTRL_ACK
	.word	DMA_TO_DEVICE
	.word	GFP_KERNEL
	.word	.LC2
	.word	MASK
	.word	.LC3
	.word	DWC_CFGH_FIFO_MODE
	.word	.LC1
	.word	EIO
	.size	dwc_alloc_chan_resources, .-dwc_alloc_chan_resources
	.comm	dwc_tx_submit,4,4
	.comm	NR_DESCS_PER_CHANNEL,4,4
	.comm	MASK,12,4
	.comm	GFP_KERNEL,4,4
	.comm	EIO,4,4
	.comm	DWC_CFGH_FIFO_MODE,4,4
	.comm	DMA_TO_DEVICE,4,4
	.comm	DMA_CTRL_ACK,4,4
	.comm	CH_EN,4,4
	.comm	CFG_LO,4,4
	.comm	CFG_HI,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
