	.file	"extr_4xx.c_ibm440gp_fixup_clocks.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"PPC440GP: SysClk = %dMHz (%x)\n\r"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/plb"
.LC2:
	.string	"/plb/opb"
.LC3:
	.string	"/plb/opb/ebc"
.LC4:
	.string	"/plb/opb/serial@40000200"
.LC5:
	.string	"/plb/opb/serial@40000300"
	.text
	.p2align 4
	.globl	ibm440gp_fixup_clocks
	.type	ibm440gp_fixup_clocks, @function
ibm440gp_fixup_clocks:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, edi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	edi, DWORD PTR DCRN_CPC0_SYS0[rip]
	mov	DWORD PTR 4[rsp], esi
	call	mfdcr@PLT
	mov	edi, DWORD PTR DCRN_CPC0_CR0[rip]
	mov	r14d, eax
	call	mfdcr@PLT
	mov	edi, r14d
	mov	ebp, eax
	call	CPC0_SYS0_OPDV@PLT
	mov	edi, r14d
	mov	ebx, eax
	call	CPC0_SYS0_EPDV@PLT
	mov	ecx, eax
	test	DWORD PTR CPC0_SYS0_BYPASS[rip], r14d
	je	.L2
	mov	r15d, r12d
	mov	r13d, r12d
.L3:
	mov	eax, r13d
	cdq
	idiv	ebx
	mov	ebx, r12d
	cdq
	mov	r14d, eax
	idiv	ecx
	mov	DWORD PTR 12[rsp], eax
	xor	eax, eax
	call	mfpvr@PLT
	and	eax, -268431361
	cmp	eax, 1073742912
	cmovne	ebx, r15d
	test	DWORD PTR CPC0_CR0_U0EC[rip], ebp
	je	.L7
	mov	eax, DWORD PTR 4[rsp]
	mov	DWORD PTR 8[rsp], eax
.L8:
	test	DWORD PTR CPC0_CR0_U1EC[rip], ebp
	je	.L9
	mov	ebp, DWORD PTR 4[rsp]
.L10:
	lea	esi, 500000[r12]
	mov	edx, r12d
	lea	rdi, .LC0[rip]
	imul	rsi, rsi, 1125899907
	shr	rsi, 50
	call	printf@PLT
	xor	edx, edx
	mov	esi, ebx
	mov	edi, r15d
	call	dt_fixup_cpu_clocks@PLT
	mov	esi, r13d
	lea	rdi, .LC1[rip]
	call	dt_fixup_clock@PLT
	mov	esi, r14d
	lea	rdi, .LC2[rip]
	call	dt_fixup_clock@PLT
	mov	esi, DWORD PTR 12[rsp]
	lea	rdi, .LC3[rip]
	call	dt_fixup_clock@PLT
	mov	esi, DWORD PTR 8[rsp]
	lea	rdi, .LC4[rip]
	call	dt_fixup_clock@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	esi, ebp
	lea	rdi, .LC5[rip]
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	dt_fixup_clock@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	test	DWORD PTR CPC0_SYS0_EXTSL[rip], r14d
	mov	DWORD PTR 8[rsp], eax
	mov	edi, r14d
	jne	.L14
	call	CPC0_SYS0_FBDV@PLT
	mov	edi, r14d
	mov	r13d, eax
	call	CPC0_SYS0_FWDVA@PLT
	mov	ecx, DWORD PTR 8[rsp]
	imul	r13d, eax
.L5:
	imul	r13d, r12d
	mov	edi, r14d
	mov	DWORD PTR 8[rsp], ecx
	call	CPC0_SYS0_FWDVA@PLT
	xor	edx, edx
	mov	edi, r14d
	mov	r8d, eax
	mov	eax, r13d
	div	r8d
	mov	r15d, eax
	call	CPC0_SYS0_FWDVB@PLT
	xor	edx, edx
	mov	ecx, DWORD PTR 8[rsp]
	mov	r8d, eax
	mov	eax, r13d
	div	r8d
	mov	r13d, eax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L14:
	call	CPC0_SYS0_FWDVB@PLT
	mov	ecx, DWORD PTR 8[rsp]
	mov	r13d, ebx
	imul	r13d, ecx
	imul	r13d, eax
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L9:
	mov	edi, ebp
	call	CPC0_CR0_UDIV@PLT
	mov	r8d, eax
	mov	eax, r13d
	cdq
	idiv	r8d
	mov	ebp, eax
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L7:
	mov	edi, ebp
	call	CPC0_CR0_UDIV@PLT
	mov	r8d, eax
	mov	eax, r13d
	cdq
	idiv	r8d
	mov	DWORD PTR 8[rsp], eax
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	ibm440gp_fixup_clocks, .-ibm440gp_fixup_clocks
	.comm	DCRN_CPC0_SYS0,4,4
	.comm	DCRN_CPC0_CR0,4,4
	.comm	CPC0_SYS0_EXTSL,4,4
	.comm	CPC0_SYS0_BYPASS,4,4
	.comm	CPC0_CR0_U1EC,4,4
	.comm	CPC0_CR0_U0EC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_4xx.c_ibm440gp_fixup_clocks.c"
	.text
	.global	__aeabi_uidiv
	.global	__aeabi_idiv
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"PPC440GP: SysClk = %dMHz (%x)\012\015\000"
	.align	2
.LC1:
	.ascii	"/plb\000"
	.align	2
.LC2:
	.ascii	"/plb/opb\000"
	.align	2
.LC3:
	.ascii	"/plb/opb/ebc\000"
	.align	2
.LC4:
	.ascii	"/plb/opb/serial@40000200\000"
	.align	2
.LC5:
	.ascii	"/plb/opb/serial@40000300\000"
	.text
	.align	2
	.global	ibm440gp_fixup_clocks
	.syntax unified
	.arm
	.fpu softvfp
	.type	ibm440gp_fixup_clocks, %function
ibm440gp_fixup_clocks:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L17
	sub	sp, sp, #12
	mov	r5, r0
	ldr	r0, [r3]
	mov	r6, r1
	bl	mfdcr
	ldr	r3, .L17+4
	mov	r4, r0
	ldr	r0, [r3]
	bl	mfdcr
	mov	r7, r0
	mov	r0, r4
	bl	CPC0_SYS0_OPDV
	mov	r10, r0
	mov	r0, r4
	bl	CPC0_SYS0_EPDV
	ldr	r3, .L17+8
	mov	r9, r0
	ldr	r3, [r3]
	tst	r4, r3
	movne	fp, r5
	movne	r8, r5
	bne	.L3
	ldr	r3, .L17+12
	mov	r0, r4
	ldr	r3, [r3]
	tst	r4, r3
	bne	.L14
	bl	CPC0_SYS0_FBDV
	mov	r8, r0
	mov	r0, r4
	bl	CPC0_SYS0_FWDVA
	mul	r8, r0, r8
.L5:
	mov	r0, r4
	bl	CPC0_SYS0_FWDVA
	mul	r8, r5, r8
	mov	r1, r0
	mov	r0, r8
	bl	__aeabi_uidiv
	mov	fp, r0
	mov	r0, r4
	bl	CPC0_SYS0_FWDVB
	mov	r1, r0
	mov	r0, r8
	bl	__aeabi_uidiv
	mov	r8, r0
.L3:
	mov	r1, r10
	mov	r0, r8
	bl	__aeabi_idiv
	mov	r1, r9
	mov	r10, r0
	bl	__aeabi_idiv
	mov	r9, r0
	bl	mfpvr
	ldr	r3, .L17+16
	bic	r4, r0, #267386880
	ldr	r0, .L17+20
	bic	r4, r4, #1044480
	ldr	r3, [r3]
	cmp	r4, r0
	movne	r4, fp
	moveq	r4, r5
	tst	r7, r3
	movne	r3, r6
	beq	.L15
.L8:
	ldr	r2, .L17+24
	ldr	r2, [r2]
	tst	r7, r2
	beq	.L16
.L10:
	ldr	r2, .L17+28
	add	r1, r5, #499712
	add	r1, r1, #288
	str	r3, [sp, #4]
	umull	r3, r1, r2, r1
	ldr	r0, .L17+32
	mov	r2, r5
	lsr	r1, r1, #18
	bl	printf
	mov	r2, #0
	mov	r1, r4
	mov	r0, fp
	bl	dt_fixup_cpu_clocks
	mov	r1, r8
	ldr	r0, .L17+36
	bl	dt_fixup_clock
	mov	r1, r10
	ldr	r0, .L17+40
	bl	dt_fixup_clock
	mov	r1, r9
	ldr	r0, .L17+44
	bl	dt_fixup_clock
	ldr	r3, [sp, #4]
	ldr	r0, .L17+48
	mov	r1, r3
	bl	dt_fixup_clock
	mov	r1, r6
	ldr	r0, .L17+52
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	dt_fixup_clock
.L14:
	bl	CPC0_SYS0_FWDVB
	mul	r8, r9, r10
	mul	r8, r0, r8
	b	.L5
.L16:
	mov	r0, r7
	str	r3, [sp, #4]
	bl	CPC0_CR0_UDIV
	mov	r1, r0
	mov	r0, r8
	bl	__aeabi_idiv
	ldr	r3, [sp, #4]
	mov	r6, r0
	b	.L10
.L15:
	mov	r0, r7
	bl	CPC0_CR0_UDIV
	mov	r1, r0
	mov	r0, r8
	bl	__aeabi_idiv
	mov	r3, r0
	b	.L8
.L18:
	.align	2
.L17:
	.word	DCRN_CPC0_SYS0
	.word	DCRN_CPC0_CR0
	.word	CPC0_SYS0_BYPASS
	.word	CPC0_SYS0_EXTSL
	.word	CPC0_CR0_U0EC
	.word	1073742912
	.word	CPC0_CR0_U1EC
	.word	1125899907
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.size	ibm440gp_fixup_clocks, .-ibm440gp_fixup_clocks
	.comm	DCRN_CPC0_SYS0,4,4
	.comm	DCRN_CPC0_CR0,4,4
	.comm	CPC0_SYS0_EXTSL,4,4
	.comm	CPC0_SYS0_BYPASS,4,4
	.comm	CPC0_CR0_U1EC,4,4
	.comm	CPC0_CR0_U0EC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
