	.file	"extr_camss-csid.c_csid_set_clock_rates.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"csi0"
.LC1:
	.string	"csi1"
.LC2:
	.string	"csi2"
.LC3:
	.string	"csi3"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC4:
	.string	"Pixel clock is too high for CSID\n"
	.section	.rodata.str1.1
.LC5:
	.string	"clk round rate failed: %ld\n"
.LC6:
	.string	"clk set rate failed: %d\n"
	.text
	.p2align 4
	.type	csid_set_clock_rates, @function
csid_set_clock_rates:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	rbx, rdi
	add	rdi, 32
	sub	rsp, 32
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	mov	rax, QWORD PTR 8[rdi]
	lea	rsi, 12[rsp]
	mov	r13, QWORD PTR [rax]
	call	camss_get_pixel_clock@PLT
	test	eax, eax
	je	.L2
	mov	DWORD PTR 12[rsp], 0
.L2:
	mov	eax, DWORD PTR [rbx]
	xor	ebp, ebp
	lea	r12, 16[rsp]
	test	eax, eax
	jg	.L3
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L37:
	mov	edi, DWORD PTR 20[r14]
	lea	rsi, .LC2[rip]
	call	strcmp@PLT
	test	eax, eax
	je	.L8
	mov	edi, DWORD PTR 20[r14]
	lea	rsi, .LC3[rip]
	call	strcmp@PLT
	test	eax, eax
	je	.L8
	.p2align 4,,10
	.p2align 3
.L9:
	add	rbp, 1
	cmp	DWORD PTR [rbx], ebp
	jle	.L17
.L3:
	mov	rdx, QWORD PTR 24[rbx]
	lea	rax, 0[rbp+rbp*2]
	lea	rsi, .LC0[rip]
	lea	r14, [rdx+rax*8]
	mov	edi, DWORD PTR 20[r14]
	call	strcmp@PLT
	test	eax, eax
	je	.L8
	mov	edi, DWORD PTR 20[r14]
	lea	rsi, .LC1[rip]
	call	strcmp@PLT
	test	eax, eax
	jne	.L37
.L8:
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR MSM_CSIPHY_PAD_SINK[rip]
	mov	esi, DWORD PTR 16[rbx]
	mov	edi, DWORD PTR 20[rbx]
	mov	edx, DWORD PTR [rax+rdx*4]
	call	csid_get_fmt_entry@PLT
	mov	ecx, DWORD PTR 4[rbx]
	mov	rdi, r12
	mov	eax, DWORD PTR [rax]
	imul	eax, DWORD PTR 12[rsp]
	sal	ecx, 3
	cdq
	idiv	ecx
	cdqe
	mov	QWORD PTR 16[rsp], rax
	call	camss_add_clock_margin@PLT
	mov	r9d, DWORD PTR [r14]
	xor	edx, edx
	test	r9d, r9d
	jle	.L7
	mov	rsi, QWORD PTR 8[r14]
	mov	rdi, QWORD PTR 16[rsp]
	lea	r8d, -1[r9]
	xor	eax, eax
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L38:
	lea	edx, 1[rax]
	lea	rcx, 1[rax]
	cmp	r8, rax
	je	.L7
	mov	rax, rcx
.L11:
	mov	edx, eax
	cmp	QWORD PTR [rsi+rax*8], rdi
	jle	.L38
.L10:
	sub	r9d, 1
	test	rdi, rdi
	mov	edi, DWORD PTR 16[r14]
	cmove	edx, r9d
	movsx	rdx, edx
	mov	rsi, QWORD PTR [rsi+rdx*8]
	call	clk_round_rate@PLT
	mov	rsi, rax
	test	rax, rax
	js	.L39
	mov	edi, DWORD PTR 16[r14]
	call	clk_set_rate@PLT
	mov	r14d, eax
	test	eax, eax
	jns	.L9
	mov	edx, eax
	lea	rsi, .LC6[rip]
	mov	rdi, r13
	xor	eax, eax
	call	dev_err@PLT
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L40
	add	rsp, 32
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r14d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	cmp	edx, r9d
	je	.L12
	mov	rsi, QWORD PTR 8[r14]
	mov	rdi, QWORD PTR 16[rsp]
	jmp	.L10
.L17:
	xor	r14d, r14d
	jmp	.L1
.L39:
	mov	rdx, rax
	lea	rsi, .LC5[rip]
	mov	rdi, r13
	xor	eax, eax
	call	dev_err@PLT
	mov	r14d, DWORD PTR EINVAL[rip]
	neg	r14d
	jmp	.L1
.L12:
	lea	rsi, .LC4[rip]
	mov	rdi, r13
	xor	eax, eax
	call	dev_err@PLT
	mov	r14d, DWORD PTR EINVAL[rip]
	neg	r14d
	jmp	.L1
.L40:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	csid_set_clock_rates, .-csid_set_clock_rates
	.comm	MSM_CSIPHY_PAD_SINK,8,8
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_camss-csid.c_csid_set_clock_rates.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"csi0\000"
	.global	__aeabi_idiv
	.align	2
.LC1:
	.ascii	"csi1\000"
	.align	2
.LC2:
	.ascii	"csi2\000"
	.align	2
.LC3:
	.ascii	"csi3\000"
	.align	2
.LC4:
	.ascii	"Pixel clock is too high for CSID\012\000"
	.align	2
.LC5:
	.ascii	"clk round rate failed: %ld\012\000"
	.align	2
.LC6:
	.ascii	"clk set rate failed: %d\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	csid_set_clock_rates, %function
csid_set_clock_rates:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, [r0, #28]
	sub	sp, sp, #28
	ldr	r3, [r3]
	ldr	r2, .L43
	mov	r5, r0
	add	r1, sp, #12
	add	r0, r0, #24
	ldr	r2, [r2]
	str	r2, [sp, #20]
	mov	r2,#0
	str	r3, [sp, #4]
	bl	camss_get_pixel_clock
	cmp	r0, #0
	movne	r3, #0
	strne	r3, [sp, #12]
	ldr	r3, [r5]
	cmp	r3, #0
	ble	.L17
	mov	r6, #0
	ldr	r9, .L43+4
	ldr	fp, .L43+8
	ldr	r10, .L43+12
	b	.L3
.L38:
	ldr	r1, .L43+16
	ldr	r0, [r4, #12]
	bl	strcmp
	cmp	r0, #0
	beq	.L8
	ldr	r1, .L43+20
	ldr	r0, [r4, #12]
	bl	strcmp
	cmp	r0, #0
	beq	.L8
.L9:
	ldr	r3, [r5]
	add	r6, r6, #1
	cmp	r3, r6
	ble	.L17
.L3:
	ldr	r7, [r5, #20]
	mov	r1, r9
	add	r4, r7, r6, lsl #4
	ldr	r0, [r4, #12]
	bl	strcmp
	cmp	r0, #0
	lsl	r8, r6, #4
	beq	.L8
	mov	r1, fp
	ldr	r0, [r4, #12]
	bl	strcmp
	cmp	r0, #0
	bne	.L38
.L8:
	ldr	r3, [r5, #8]
	ldr	r2, [r10]
	ldr	r1, [r5, #12]
	ldr	r2, [r3, r2, lsl #2]
	ldr	r0, [r5, #16]
	bl	csid_get_fmt_entry
	ldr	r2, [sp, #12]
	ldr	r0, [r0]
	ldr	r1, [r5, #4]
	mul	r0, r2, r0
	lsl	r1, r1, #3
	bl	__aeabi_idiv
	mov	r3, r0
	add	r0, sp, #16
	str	r3, [sp, #16]
	bl	camss_add_clock_margin
	ldr	ip, [r7, r8]
	cmp	ip, #0
	ble	.L39
	ldr	lr, [r4, #4]
	mov	r3, #0
	ldr	r0, [sp, #16]
	sub	r2, lr, #4
	b	.L11
.L40:
	add	r3, r3, #1
	cmp	r3, ip
	beq	.L12
.L11:
	ldr	r1, [r2, #4]!
	cmp	r1, r0
	ble	.L40
.L10:
	cmp	r0, #0
	subeq	r3, ip, #1
	ldr	r1, [lr, r3, lsl #2]
	ldr	r0, [r4, #8]
	bl	clk_round_rate
	subs	r1, r0, #0
	blt	.L41
	ldr	r0, [r4, #8]
	bl	clk_set_rate
	cmp	r0, #0
	bge	.L9
	mov	r4, r0
	ldr	r1, .L43+24
	mov	r2, r4
	ldr	r0, [sp, #4]
	bl	dev_err
.L1:
	ldr	r3, .L43
	ldr	r2, [r3]
	ldr	r3, [sp, #20]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L42
	mov	r0, r4
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L39:
	beq	.L12
	mov	r3, #0
	ldr	lr, [r4, #4]
	ldr	r0, [sp, #16]
	b	.L10
.L17:
	mov	r4, #0
	b	.L1
.L41:
	mov	r2, r1
	ldr	r0, [sp, #4]
	ldr	r1, .L43+28
	bl	dev_err
	ldr	r3, .L43+32
	ldr	r0, [r3]
	rsb	r4, r0, #0
	b	.L1
.L12:
	ldr	r0, [sp, #4]
	ldr	r1, .L43+36
	bl	dev_err
	ldr	r3, .L43+32
	ldr	r0, [r3]
	rsb	r4, r0, #0
	b	.L1
.L42:
	bl	__stack_chk_fail
.L44:
	.align	2
.L43:
	.word	.LC7
	.word	.LC0
	.word	.LC1
	.word	MSM_CSIPHY_PAD_SINK
	.word	.LC2
	.word	.LC3
	.word	.LC6
	.word	.LC5
	.word	EINVAL
	.word	.LC4
	.size	csid_set_clock_rates, .-csid_set_clock_rates
	.comm	MSM_CSIPHY_PAD_SINK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
