	.file	"extr_pci-tegra.c_tegra_pcie_setup_translations.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	tegra_pcie_setup_translations, @function
tegra_pcie_setup_translations:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdi
	add	rdi, 20
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	resource_size@PLT
	mov	esi, DWORD PTR 20[rbp]
	mov	edx, DWORD PTR AFI_AXI_BAR0_START[rip]
	mov	rdi, rbp
	mov	ebx, eax
	call	afi_writel@PLT
	sar	ebx, 12
	mov	edx, DWORD PTR AFI_AXI_BAR0_SZ[rip]
	mov	rdi, rbp
	mov	esi, ebx
	call	afi_writel@PLT
	lea	rdi, 16[rbp]
	call	resource_size@PLT
	mov	esi, DWORD PTR 16[rbp]
	mov	edx, DWORD PTR AFI_AXI_BAR1_START[rip]
	mov	rdi, rbp
	mov	ebx, eax
	call	afi_writel@PLT
	sar	ebx, 12
	mov	edx, DWORD PTR AFI_AXI_BAR1_SZ[rip]
	mov	rdi, rbp
	mov	esi, ebx
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_FPCI_BAR1[rip]
	mov	esi, -33816576
	mov	rdi, rbp
	call	afi_writel@PLT
	lea	rdi, 12[rbp]
	mov	r12d, DWORD PTR 12[rbp]
	call	resource_size@PLT
	mov	esi, DWORD PTR 12[rbp]
	mov	edx, DWORD PTR AFI_AXI_BAR2_START[rip]
	mov	rdi, rbp
	mov	ebx, eax
	sar	r12d, 12
	call	afi_writel@PLT
	sar	ebx, 12
	sal	r12d, 4
	mov	rdi, rbp
	mov	edx, DWORD PTR AFI_AXI_BAR2_SZ[rip]
	mov	esi, ebx
	or	r12d, 1
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_FPCI_BAR2[rip]
	mov	esi, r12d
	mov	rdi, rbp
	call	afi_writel@PLT
	lea	rdi, 8[rbp]
	mov	r12d, DWORD PTR 8[rbp]
	call	resource_size@PLT
	mov	esi, DWORD PTR 8[rbp]
	mov	edx, DWORD PTR AFI_AXI_BAR3_START[rip]
	mov	rdi, rbp
	mov	ebx, eax
	sar	r12d, 12
	call	afi_writel@PLT
	sar	ebx, 12
	sal	r12d, 4
	mov	rdi, rbp
	mov	edx, DWORD PTR AFI_AXI_BAR3_SZ[rip]
	mov	esi, ebx
	or	r12d, 1
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_FPCI_BAR3[rip]
	mov	esi, r12d
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_AXI_BAR4_START[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_AXI_BAR4_SZ[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_FPCI_BAR4[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_AXI_BAR5_START[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_AXI_BAR5_SZ[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_FPCI_BAR5[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	rax, QWORD PTR 0[rbp]
	cmp	QWORD PTR [rax], 0
	jne	.L5
.L2:
	mov	edx, DWORD PTR AFI_MSI_FPCI_BAR_ST[rip]
	mov	rdi, rbp
	xor	esi, esi
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_MSI_BAR_SZ[rip]
	mov	rdi, rbp
	xor	esi, esi
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_MSI_AXI_BAR_ST[rip]
	mov	rdi, rbp
	xor	esi, esi
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_MSI_BAR_SZ[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	rdi, rbp
	xor	esi, esi
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	afi_writel@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	edx, DWORD PTR AFI_CACHE_BAR0_ST[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_CACHE_BAR0_SZ[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_CACHE_BAR1_ST[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	mov	edx, DWORD PTR AFI_CACHE_BAR1_SZ[rip]
	xor	esi, esi
	mov	rdi, rbp
	call	afi_writel@PLT
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	tegra_pcie_setup_translations, .-tegra_pcie_setup_translations
	.comm	AFI_MSI_FPCI_BAR_ST,4,4
	.comm	AFI_MSI_BAR_SZ,4,4
	.comm	AFI_MSI_AXI_BAR_ST,4,4
	.comm	AFI_FPCI_BAR5,4,4
	.comm	AFI_FPCI_BAR4,4,4
	.comm	AFI_FPCI_BAR3,4,4
	.comm	AFI_FPCI_BAR2,4,4
	.comm	AFI_FPCI_BAR1,4,4
	.comm	AFI_CACHE_BAR1_SZ,4,4
	.comm	AFI_CACHE_BAR1_ST,4,4
	.comm	AFI_CACHE_BAR0_SZ,4,4
	.comm	AFI_CACHE_BAR0_ST,4,4
	.comm	AFI_AXI_BAR5_SZ,4,4
	.comm	AFI_AXI_BAR5_START,4,4
	.comm	AFI_AXI_BAR4_SZ,4,4
	.comm	AFI_AXI_BAR4_START,4,4
	.comm	AFI_AXI_BAR3_SZ,4,4
	.comm	AFI_AXI_BAR3_START,4,4
	.comm	AFI_AXI_BAR2_SZ,4,4
	.comm	AFI_AXI_BAR2_START,4,4
	.comm	AFI_AXI_BAR1_SZ,4,4
	.comm	AFI_AXI_BAR1_START,4,4
	.comm	AFI_AXI_BAR0_SZ,4,4
	.comm	AFI_AXI_BAR0_START,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pci-tegra.c_tegra_pcie_setup_translations.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tegra_pcie_setup_translations, %function
tegra_pcie_setup_translations:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r4, r0
	add	r0, r0, #16
	bl	resource_size
	mov	r5, r0
	ldr	r3, .L9
	ldr	r1, [r4, #16]
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+4
	asr	r1, r5, #12
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	add	r0, r4, #12
	bl	resource_size
	mov	r5, r0
	ldr	r3, .L9+8
	ldr	r1, [r4, #12]
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+12
	asr	r1, r5, #12
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+16
	ldr	r1, .L9+20
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	mov	r0, r4
	ldr	r5, [r0, #8]!
	bl	resource_size
	mov	r6, r0
	ldr	r3, .L9+24
	ldr	r1, [r4, #8]
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+28
	asr	r1, r6, #12
	ldr	r2, [r3]
	mov	r0, r4
	asr	r5, r5, #12
	bl	afi_writel
	lsl	r5, r5, #4
	ldr	r3, .L9+32
	orr	r5, r5, #1
	mov	r1, r5
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	mov	r0, r4
	ldr	r5, [r0, #4]!
	bl	resource_size
	mov	r6, r0
	ldr	r3, .L9+36
	ldr	r1, [r4, #4]
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+40
	asr	r1, r6, #12
	ldr	r2, [r3]
	mov	r0, r4
	asr	r5, r5, #12
	bl	afi_writel
	lsl	r5, r5, #4
	ldr	r3, .L9+44
	orr	r5, r5, #1
	ldr	r2, [r3]
	mov	r1, r5
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+48
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+52
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+56
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+60
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+64
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+68
	mov	r0, r4
	ldr	r2, [r3]
	mov	r1, #0
	bl	afi_writel
	ldr	r3, [r4]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
.L2:
	ldr	r3, .L9+72
	ldr	r5, .L9+76
	ldr	r2, [r3]
	mov	r1, #0
	mov	r0, r4
	bl	afi_writel
	ldr	r2, [r5]
	mov	r1, #0
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+80
	mov	r1, #0
	mov	r0, r4
	ldr	r2, [r3]
	bl	afi_writel
	mov	r0, r4
	ldr	r2, [r5]
	mov	r1, #0
	pop	{r4, r5, r6, lr}
	b	afi_writel
.L8:
	ldr	r3, .L9+84
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+88
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+92
	mov	r1, #0
	ldr	r2, [r3]
	mov	r0, r4
	bl	afi_writel
	ldr	r3, .L9+96
	mov	r1, #0
	mov	r0, r4
	ldr	r2, [r3]
	bl	afi_writel
	b	.L2
.L10:
	.align	2
.L9:
	.word	AFI_AXI_BAR0_START
	.word	AFI_AXI_BAR0_SZ
	.word	AFI_AXI_BAR1_START
	.word	AFI_AXI_BAR1_SZ
	.word	AFI_FPCI_BAR1
	.word	-33816576
	.word	AFI_AXI_BAR2_START
	.word	AFI_AXI_BAR2_SZ
	.word	AFI_FPCI_BAR2
	.word	AFI_AXI_BAR3_START
	.word	AFI_AXI_BAR3_SZ
	.word	AFI_FPCI_BAR3
	.word	AFI_AXI_BAR4_START
	.word	AFI_AXI_BAR4_SZ
	.word	AFI_FPCI_BAR4
	.word	AFI_AXI_BAR5_START
	.word	AFI_AXI_BAR5_SZ
	.word	AFI_FPCI_BAR5
	.word	AFI_MSI_FPCI_BAR_ST
	.word	AFI_MSI_BAR_SZ
	.word	AFI_MSI_AXI_BAR_ST
	.word	AFI_CACHE_BAR0_ST
	.word	AFI_CACHE_BAR0_SZ
	.word	AFI_CACHE_BAR1_ST
	.word	AFI_CACHE_BAR1_SZ
	.size	tegra_pcie_setup_translations, .-tegra_pcie_setup_translations
	.comm	AFI_MSI_FPCI_BAR_ST,4,4
	.comm	AFI_MSI_BAR_SZ,4,4
	.comm	AFI_MSI_AXI_BAR_ST,4,4
	.comm	AFI_FPCI_BAR5,4,4
	.comm	AFI_FPCI_BAR4,4,4
	.comm	AFI_FPCI_BAR3,4,4
	.comm	AFI_FPCI_BAR2,4,4
	.comm	AFI_FPCI_BAR1,4,4
	.comm	AFI_CACHE_BAR1_SZ,4,4
	.comm	AFI_CACHE_BAR1_ST,4,4
	.comm	AFI_CACHE_BAR0_SZ,4,4
	.comm	AFI_CACHE_BAR0_ST,4,4
	.comm	AFI_AXI_BAR5_SZ,4,4
	.comm	AFI_AXI_BAR5_START,4,4
	.comm	AFI_AXI_BAR4_SZ,4,4
	.comm	AFI_AXI_BAR4_START,4,4
	.comm	AFI_AXI_BAR3_SZ,4,4
	.comm	AFI_AXI_BAR3_START,4,4
	.comm	AFI_AXI_BAR2_SZ,4,4
	.comm	AFI_AXI_BAR2_START,4,4
	.comm	AFI_AXI_BAR1_SZ,4,4
	.comm	AFI_AXI_BAR1_START,4,4
	.comm	AFI_AXI_BAR0_SZ,4,4
	.comm	AFI_AXI_BAR0_START,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
