	.file	"extr_radeon_device.c_radeon_gpu_reset.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Saved %d dwords of commands on ring %d.\n"
	.align 8
.LC1:
	.string	"GPU reset succeeded, trying to resume\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"ib ring test failed (%d).\n"
.LC3:
	.string	"GPU reset failed\n"
	.text
	.p2align 4
	.globl	radeon_gpu_reset
	.type	radeon_gpu_reset, @function
radeon_gpu_reset:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	.cfi_offset 15, -24
	mov	r15, rdi
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 40
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movsx	rcx, DWORD PTR RADEON_NUM_RINGS[rip]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	mov	rbx, rsp
	lea	rax, 15[0+rcx*4]
	mov	rdx, rax
	and	rax, -4096
	sub	rbx, rax
	and	rdx, -16
	mov	rax, rbx
	cmp	rsp, rax
	je	.L3
.L45:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, rax
	jne	.L45
.L3:
	and	edx, 4095
	sub	rsp, rdx
	test	rdx, rdx
	jne	.L46
.L4:
	lea	rax, 15[0+rcx*8]
	mov	rcx, rsp
	mov	rbx, rsp
	mov	rdx, rax
	and	rax, -4096
	sub	rcx, rax
	and	rdx, -16
	mov	rax, rcx
	cmp	rsp, rax
	je	.L6
.L47:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, rax
	jne	.L47
.L6:
	and	edx, 4095
	sub	rsp, rdx
	test	rdx, rdx
	jne	.L48
.L7:
	mov	rdi, r15
	mov	r12, rsp
	call	down_write@PLT
	mov	rdi, r15
	call	radeon_save_bios_scratch_regs@PLT
	lea	rax, 8[r15]
	mov	rdi, rax
	mov	QWORD PTR -80[rbp], rax
	call	ttm_bo_lock_delayed_workqueue@PLT
	mov	rdi, r15
	mov	DWORD PTR -72[rbp], eax
	call	radeon_suspend@PLT
	mov	esi, DWORD PTR RADEON_NUM_RINGS[rip]
	test	esi, esi
	jle	.L21
	mov	DWORD PTR -68[rbp], 0
	mov	r13, r12
	xor	r14d, r14d
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L9:
	add	r14, 1
	add	r13, 8
	cmp	DWORD PTR RADEON_NUM_RINGS[rip], r14d
	jle	.L11
.L10:
	mov	rax, QWORD PTR 16[r15]
	mov	rdx, r13
	mov	rdi, r15
	lea	rsi, [rax+r14*4]
	call	radeon_ring_backup@PLT
	mov	DWORD PTR [rbx+r14*4], eax
	test	eax, eax
	je	.L9
	mov	edi, DWORD PTR 4[r15]
	mov	edx, eax
	mov	ecx, r14d
	lea	rsi, .LC0[rip]
	xor	eax, eax
	call	dev_info@PLT
	mov	DWORD PTR -68[rbp], 1
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L46:
	or	QWORD PTR -8[rsp+rdx], 0
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L51:
	mov	edi, DWORD PTR 4[r15]
	mov	edx, eax
	lea	rsi, .LC2[rip]
	call	dev_err@PLT
	mov	edx, DWORD PTR -68[rbp]
	test	edx, edx
	je	.L17
	mov	rdi, r15
	call	radeon_suspend@PLT
	mov	DWORD PTR -68[rbp], 0
.L11:
	mov	rdi, r15
	call	radeon_asic_reset@PLT
	mov	r14d, eax
	test	eax, eax
	je	.L49
	mov	rdi, r15
	xor	ebx, ebx
	call	radeon_restore_bios_scratch_regs@PLT
	mov	rdi, r15
	call	radeon_fence_driver_force_completion@PLT
	mov	eax, DWORD PTR RADEON_NUM_RINGS[rip]
	test	eax, eax
	jle	.L17
	.p2align 4,,10
	.p2align 3
.L18:
	mov	rdi, QWORD PTR [r12+rbx*8]
	add	rbx, 1
	call	kfree@PLT
	cmp	DWORD PTR RADEON_NUM_RINGS[rip], ebx
	jg	.L18
.L17:
	mov	edi, DWORD PTR 12[r15]
	call	drm_helper_resume_force_mode@PLT
	mov	esi, DWORD PTR -72[rbp]
	mov	rdi, QWORD PTR -80[rbp]
	call	ttm_bo_unlock_delayed_workqueue@PLT
	mov	edi, DWORD PTR 4[r15]
	lea	rsi, .LC3[rip]
	xor	eax, eax
	call	dev_info@PLT
.L19:
	mov	rdi, r15
	call	up_write@PLT
	mov	rax, QWORD PTR -56[rbp]
	xor	rax, QWORD PTR fs:40
	jne	.L50
	lea	rsp, -40[rbp]
	mov	eax, r14d
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa 7, 8
	ret
	.p2align 4,,10
	.p2align 3
.L49:
	.cfi_restore_state
	mov	edi, DWORD PTR 4[r15]
	lea	rsi, .LC1[rip]
	xor	eax, eax
	xor	r13d, r13d
	call	dev_info@PLT
	mov	rdi, r15
	call	radeon_resume@PLT
	mov	rdi, r15
	call	radeon_restore_bios_scratch_regs@PLT
	mov	ecx, DWORD PTR RADEON_NUM_RINGS[rip]
	test	ecx, ecx
	jle	.L16
	.p2align 4,,10
	.p2align 3
.L13:
	mov	rax, QWORD PTR 16[r15]
	mov	rcx, QWORD PTR [r12+r13*8]
	mov	rdi, r15
	mov	edx, DWORD PTR [rbx+r13*4]
	lea	rsi, [rax+r13*4]
	call	radeon_ring_restore@PLT
	mov	DWORD PTR [rbx+r13*4], 0
	mov	QWORD PTR [r12+r13*8], 0
	add	r13, 1
	cmp	DWORD PTR RADEON_NUM_RINGS[rip], r13d
	jg	.L13
.L16:
	mov	rdi, r15
	call	radeon_ib_ring_tests@PLT
	mov	r14d, eax
	test	eax, eax
	jne	.L51
	mov	edi, DWORD PTR 12[r15]
	call	drm_helper_resume_force_mode@PLT
	mov	esi, DWORD PTR -72[rbp]
	mov	rdi, QWORD PTR -80[rbp]
	call	ttm_bo_unlock_delayed_workqueue@PLT
	jmp	.L19
.L21:
	mov	DWORD PTR -68[rbp], 0
	jmp	.L11
.L48:
	or	QWORD PTR -8[rsp+rdx], 0
	jmp	.L7
.L50:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	radeon_gpu_reset, .-radeon_gpu_reset
	.comm	RADEON_NUM_RINGS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_radeon_device.c_radeon_gpu_reset.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Saved %d dwords of commands on ring %d.\012\000"
	.align	2
.LC1:
	.ascii	"GPU reset succeeded, trying to resume\012\000"
	.align	2
.LC2:
	.ascii	"ib ring test failed (%d).\012\000"
	.align	2
.LC3:
	.ascii	"GPU reset failed\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	radeon_gpu_reset
	.syntax unified
	.arm
	.fpu softvfp
	.type	radeon_gpu_reset, %function
radeon_gpu_reset:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #28
	ldr	r8, .L35
	ldr	r3, .L35+4
	mov	r5, r0
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	ldr	r3, [r8]
	add	r4, r0, #8
	lsl	r3, r3, #2
	add	r3, r3, #7
	bic	r3, r3, #7
	sub	sp, sp, r3
	mov	r6, sp
	sub	sp, sp, r3
	str	r4, [fp, #-56]
	str	r6, [fp, #-52]
	bl	down_write
	mov	r0, r5
	bl	radeon_save_bios_scratch_regs
	mov	r0, r4
	bl	ttm_bo_lock_delayed_workqueue
	mov	r3, r0
	mov	r4, sp
	mov	r0, r5
	str	r3, [fp, #-60]
	bl	radeon_suspend
	ldr	r3, [r8]
	mov	r10, #0
	cmp	r3, #0
	str	r4, [fp, #-48]
	ble	.L2
	mov	r9, r10
	ldr	r7, .L35+8
	sub	r6, r6, #4
	b	.L4
.L3:
	ldr	r3, [r8]
	add	r9, r9, #1
	cmp	r3, r9
	add	r4, r4, #4
	ble	.L2
.L4:
	ldr	r1, [r5, #16]
	mov	r2, r4
	mov	r0, r5
	add	r1, r1, r9, lsl #2
	bl	radeon_ring_backup
	cmp	r0, #0
	str	r0, [r6, #4]!
	beq	.L3
	mov	r2, r0
	mov	r3, r9
	mov	r1, r7
	ldr	r0, [r5, #4]
	bl	dev_info
	mov	r10, #1
	b	.L3
.L2:
	mov	r9, #0
.L5:
	mov	r0, r5
	bl	radeon_asic_reset
	subs	r4, r0, #0
	beq	.L32
	mov	r0, r5
	bl	radeon_restore_bios_scratch_regs
	mov	r0, r5
	bl	radeon_fence_driver_force_completion
	ldr	r3, [r8]
	cmp	r3, #0
	ble	.L12
	mov	r6, #0
	ldr	r3, [fp, #-48]
	sub	r7, r3, #4
.L13:
	ldr	r0, [r7, #4]!
	bl	kfree
	ldr	r3, [r8]
	add	r6, r6, #1
	cmp	r3, r6
	bgt	.L13
.L12:
	ldr	r0, [r5, #12]
	bl	drm_helper_resume_force_mode
	ldr	r1, [fp, #-60]
	ldr	r0, [fp, #-56]
	bl	ttm_bo_unlock_delayed_workqueue
	ldr	r1, .L35+12
	ldr	r0, [r5, #4]
	bl	dev_info
	b	.L14
.L32:
	ldr	r1, .L35+16
	ldr	r0, [r5, #4]
	bl	dev_info
	mov	r0, r5
	bl	radeon_resume
	mov	r0, r5
	bl	radeon_restore_bios_scratch_regs
	ldr	r3, [r8]
	cmp	r3, #0
	ble	.L11
	ldr	r3, [fp, #-52]
	sub	r7, r3, #4
	ldr	r3, [fp, #-48]
	sub	r6, r3, #4
.L10:
	ldr	r1, [r5, #16]
	ldr	r3, [r6, #4]!
	ldr	r2, [r7, #4]!
	add	r1, r1, r4, lsl #2
	mov	r0, r5
	bl	radeon_ring_restore
	ldr	r3, [r8]
	add	r4, r4, #1
	cmp	r3, r4
	str	r9, [r7]
	str	r9, [r6]
	bgt	.L10
.L11:
	mov	r0, r5
	bl	radeon_ib_ring_tests
	subs	r4, r0, #0
	bne	.L33
	ldr	r0, [r5, #12]
	bl	drm_helper_resume_force_mode
	ldr	r1, [fp, #-60]
	ldr	r0, [fp, #-56]
	bl	ttm_bo_unlock_delayed_workqueue
.L14:
	mov	r0, r5
	bl	up_write
	ldr	r3, .L35+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L34
	mov	r0, r4
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L33:
	mov	r2, r4
	ldr	r1, .L35+20
	ldr	r0, [r5, #4]
	bl	dev_err
	cmp	r10, #0
	beq	.L12
	mov	r0, r5
	bl	radeon_suspend
	mov	r10, #0
	b	.L5
.L34:
	bl	__stack_chk_fail
.L36:
	.align	2
.L35:
	.word	RADEON_NUM_RINGS
	.word	.LC4
	.word	.LC0
	.word	.LC3
	.word	.LC1
	.word	.LC2
	.size	radeon_gpu_reset, .-radeon_gpu_reset
	.comm	RADEON_NUM_RINGS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
