	.file	"extr_aarch64-dis.c_convert_bfm_to_sr.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	convert_bfm_to_sr, @function
convert_bfm_to_sr:
.LFB0:
	.cfi_startproc
	endbr64
	mov	rdx, QWORD PTR [rdi]
	mov	rax, QWORD PTR AARCH64_OPND_QLF_imm_0_31[rip]
	mov	ecx, 63
	cmp	QWORD PTR 32[rdx], rax
	mov	eax, 31
	cmovne	eax, ecx
	xor	r8d, r8d
	cmp	eax, DWORD PTR 60[rdx]
	je	.L7
	mov	eax, r8d
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	mov	eax, DWORD PTR AARCH64_OPND_NIL[rip]
	mov	r8d, 1
	mov	DWORD PTR 56[rdx], eax
	mov	eax, r8d
	ret
	.cfi_endproc
.LFE0:
	.size	convert_bfm_to_sr, .-convert_bfm_to_sr
	.comm	AARCH64_OPND_QLF_imm_0_31,8,8
	.comm	AARCH64_OPND_NIL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_aarch64-dis.c_convert_bfm_to_sr.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	convert_bfm_to_sr, %function
convert_bfm_to_sr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r2, [r0]
	ldr	r3, .L7
	ldr	r1, [r2, #44]
	ldr	r0, [r3]
	ldr	r3, [r2, #24]
	cmp	r3, r0
	moveq	r3, #31
	movne	r3, #63
	cmp	r3, r1
	ldreq	r3, .L7+4
	moveq	r0, #1
	ldreq	r3, [r3]
	movne	r0, #0
	streq	r3, [r2, #40]
	bx	lr
.L8:
	.align	2
.L7:
	.word	AARCH64_OPND_QLF_imm_0_31
	.word	AARCH64_OPND_NIL
	.size	convert_bfm_to_sr, .-convert_bfm_to_sr
	.comm	AARCH64_OPND_QLF_imm_0_31,4,4
	.comm	AARCH64_OPND_NIL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
