	.file	"extr_hns_roce_hw_v2.c_hns_roce_v2_aeq_int.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Unhandled event %d on EQ %d at idx %u.\n"
	.text
	.p2align 4
	.type	hns_roce_v2_aeq_int, @function
hns_roce_v2_aeq_int:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15, rsi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	rax, QWORD PTR [rdi]
	mov	rdi, rsi
	mov	QWORD PTR 24[rsp], rax
	call	next_aeqe_sw_v2@PLT
	test	rax, rax
	je	.L12
	mov	rbp, rax
	.p2align 4,,10
	.p2align 3
.L11:
	xor	eax, eax
	call	dma_rmb@PLT
	mov	edi, DWORD PTR 24[rbp]
	mov	edx, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_TYPE_S[rip]
	mov	esi, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_TYPE_M[rip]
	call	roce_get_field@PLT
	mov	edi, DWORD PTR 24[rbp]
	mov	edx, DWORD PTR HNS_ROCE_V2_AEQE_SUB_TYPE_S[rip]
	mov	esi, DWORD PTR HNS_ROCE_V2_AEQE_SUB_TYPE_M[rip]
	mov	rbx, rax
	call	roce_get_field@PLT
	mov	edi, DWORD PTR 20[rbp]
	mov	edx, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S[rip]
	mov	esi, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M[rip]
	mov	QWORD PTR 8[rsp], rax
	call	roce_get_field@PLT
	mov	edi, DWORD PTR 16[rbp]
	mov	edx, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S[rip]
	mov	esi, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M[rip]
	mov	r12, rax
	call	roce_get_field@PLT
	mov	edx, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S[rip]
	mov	edi, DWORD PTR 12[rbp]
	mov	esi, DWORD PTR HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M[rip]
	mov	r13, rax
	call	roce_get_field@PLT
	lea	edx, -128[rbx]
	cmp	edx, 15
	ja	.L3
	lea	rcx, .L5[rip]
	movsx	rdx, DWORD PTR [rcx+rdx*4]
	add	rdx, rcx
	notrack jmp	rdx
	.section	.rodata
	.align 4
	.align 4
.L5:
	.long	.L6-.L5
	.long	.L9-.L5
	.long	.L6-.L5
	.long	.L9-.L5
	.long	.L6-.L5
	.long	.L6-.L5
	.long	.L6-.L5
	.long	.L8-.L5
	.long	.L6-.L5
	.long	.L6-.L5
	.long	.L4-.L5
	.long	.L4-.L5
	.long	.L7-.L5
	.long	.L7-.L5
	.long	.L6-.L5
	.long	.L4-.L5
	.text
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edx, ebx
	mov	rsi, r12
	mov	rdi, r14
	call	hns_roce_qp_event@PLT
	.p2align 4,,10
	.p2align 3
.L4:
	mov	eax, DWORD PTR 8[rsp]
	mov	DWORD PTR 4[r15], ebx
	mov	rcx, r13
	mov	rsi, r15
	mov	ebx, DWORD PTR 12[r15]
	mov	rdi, r14
	mov	DWORD PTR 8[r15], eax
	mov	eax, DWORD PTR [r15]
	lea	edx, [rbx+rbx]
	add	eax, 1
	cmp	eax, edx
	mov	edx, 0
	cmovge	eax, edx
	mov	rdx, r12
	mov	DWORD PTR [r15], eax
	call	hns_roce_v2_init_irq_work@PLT
	mov	rdi, r15
	call	next_aeqe_sw_v2@PLT
	mov	rbp, rax
	test	rax, rax
	jne	.L11
	mov	r12d, 1
.L2:
	mov	rdi, r15
	call	set_eq_cons_index_v2@PLT
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	mov	edx, ebx
	mov	rsi, r13
	mov	rdi, r14
	call	hns_roce_cq_event@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L9:
	mov	edx, ebx
	mov	rsi, rax
	mov	rdi, r14
	call	hns_roce_srq_event@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L8:
	mov	edi, DWORD PTR 0[rbp]
	call	le64_to_cpu@PLT
	mov	edx, DWORD PTR 4[rbp]
	mov	edi, DWORD PTR 8[rbp]
	mov	DWORD PTR 20[rsp], eax
	mov	DWORD PTR 16[rsp], edx
	call	le16_to_cpu@PLT
	mov	ecx, DWORD PTR 20[rsp]
	mov	edx, DWORD PTR 16[rsp]
	mov	rdi, r14
	mov	esi, eax
	call	hns_roce_cmd_event@PLT
	jmp	.L4
.L3:
	mov	ecx, DWORD PTR 16[r15]
	mov	r8d, DWORD PTR [r15]
	mov	edx, ebx
	lea	rsi, .LC0[rip]
	mov	rdi, QWORD PTR 24[rsp]
	call	dev_err@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L12:
	xor	r12d, r12d
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	hns_roce_v2_aeq_int, .-hns_roce_v2_aeq_int
	.comm	HNS_ROCE_V2_AEQE_SUB_TYPE_S,4,4
	.comm	HNS_ROCE_V2_AEQE_SUB_TYPE_M,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_TYPE_S,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_TYPE_M,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hns_roce_hw_v2.c_hns_roce_v2_aeq_int.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Unhandled event %d on EQ %d at idx %u.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	hns_roce_v2_aeq_int, %function
hns_roce_v2_aeq_int:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	fp, r0
	ldr	r3, [fp]
	sub	sp, sp, #28
	mov	r0, r1
	mov	r5, r1
	str	r3, [sp, #20]
	bl	next_aeqe_sw_v2
	subs	r4, r0, #0
	beq	.L2
	ldr	r10, .L16
.L11:
	bl	dma_rmb
	ldr	r3, .L16+4
	ldr	r0, [r4, #24]
	ldr	r2, [r3]
	ldr	r3, .L16+8
	ldr	r9, .L16+12
	ldr	r1, [r3]
	bl	roce_get_field
	ldr	r3, .L16+16
	mov	r6, r0
	ldr	r2, [r3]
	ldr	r3, .L16+20
	ldr	r0, [r4, #24]
	ldr	r1, [r3]
	bl	roce_get_field
	ldr	r1, [r9]
	ldr	r2, [r10]
	mov	r7, r0
	ldr	r0, [r4, #20]
	bl	roce_get_field
	ldr	r1, [r9]
	ldr	r2, [r10]
	mov	r8, r0
	ldr	r0, [r4, #16]
	bl	roce_get_field
	ldr	r3, .L16+12
	mov	r9, r0
	ldr	r1, [r3]
	ldr	r2, [r10]
	ldr	r0, [r4, #12]
	bl	roce_get_field
	sub	r3, r6, #128
	cmp	r3, #15
	ldrls	pc, [pc, r3, asl #2]
	b	.L3
.L5:
	.word	.L6
	.word	.L9
	.word	.L6
	.word	.L9
	.word	.L6
	.word	.L6
	.word	.L6
	.word	.L8
	.word	.L6
	.word	.L6
	.word	.L4
	.word	.L4
	.word	.L7
	.word	.L7
	.word	.L6
	.word	.L4
.L6:
	mov	r2, r6
	mov	r1, r8
	mov	r0, fp
	bl	hns_roce_qp_event
.L4:
	ldr	ip, [r5]
	ldr	lr, [r5, #12]
	add	ip, ip, #1
	cmp	ip, lr, lsl #1
	str	ip, [r5]
	movge	ip, #0
	mov	r3, r9
	strge	ip, [r5]
	mov	r2, r8
	mov	r1, r5
	mov	r0, fp
	str	r6, [r5, #4]
	str	r7, [r5, #8]
	bl	hns_roce_v2_init_irq_work
	mov	r0, r5
	bl	next_aeqe_sw_v2
	subs	r4, r0, #0
	bne	.L11
	mov	r4, #1
.L2:
	mov	r0, r5
	bl	set_eq_cons_index_v2
	mov	r0, r4
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	mov	r2, r6
	mov	r1, r9
	mov	r0, fp
	bl	hns_roce_cq_event
	b	.L4
.L9:
	mov	r1, r0
	mov	r2, r6
	mov	r0, fp
	bl	hns_roce_srq_event
	b	.L4
.L8:
	ldr	r0, [r4, #8]
	bl	le16_to_cpu
	ldr	r2, [r4, #4]
	str	r0, [sp, #12]
	ldr	r0, [r4]
	str	r2, [sp, #16]
	bl	le64_to_cpu
	ldr	r2, [sp, #16]
	mov	r3, r0
	ldr	r1, [sp, #12]
	mov	r0, fp
	bl	hns_roce_cmd_event
	b	.L4
.L3:
	ldr	r2, [r5]
	ldr	r3, [r5, #16]
	ldr	r1, .L16+24
	str	r2, [sp]
	ldr	r0, [sp, #20]
	mov	r2, r6
	bl	dev_err
	b	.L4
.L17:
	.align	2
.L16:
	.word	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S
	.word	HNS_ROCE_V2_AEQE_EVENT_TYPE_S
	.word	HNS_ROCE_V2_AEQE_EVENT_TYPE_M
	.word	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M
	.word	HNS_ROCE_V2_AEQE_SUB_TYPE_S
	.word	HNS_ROCE_V2_AEQE_SUB_TYPE_M
	.word	.LC0
	.size	hns_roce_v2_aeq_int, .-hns_roce_v2_aeq_int
	.comm	HNS_ROCE_V2_AEQE_SUB_TYPE_S,4,4
	.comm	HNS_ROCE_V2_AEQE_SUB_TYPE_M,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_TYPE_S,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_TYPE_M,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S,4,4
	.comm	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
