	.file	"extr_es1968.c_snd_es1968_chip_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	snd_es1968_chip_init, @function
snd_es1968_chip_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebx, 480
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	r13, QWORD PTR 8[rdi]
	mov	esi, DWORD PTR ESM_CONFIG_A[rip]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	lea	r14, 4[rsp]
	mov	r12, QWORD PTR [rdi]
	mov	rdx, r14
	mov	rdi, r13
	call	pci_read_config_word@PLT
	mov	edx, DWORD PTR DMA_CLEAR[rip]
	mov	eax, DWORD PTR PIC_SNOOP1[rip]
	mov	rdi, r13
	or	eax, DWORD PTR PIC_SNOOP2[rip]
	or	edx, DWORD PTR SAFEGUARD[rip]
	or	edx, eax
	mov	eax, DWORD PTR POST_WRITE[rip]
	or	eax, DWORD PTR PCI_TIMING[rip]
	not	edx
	and	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR ESM_CONFIG_A[rip]
	or	edx, eax
	mov	eax, DWORD PTR SWAP_LR[rip]
	or	eax, DWORD PTR SUBTR_DECODE[rip]
	not	eax
	and	edx, eax
	mov	DWORD PTR 4[rsp], edx
	call	pci_write_config_word@PLT
	mov	esi, DWORD PTR ESM_CONFIG_B[rip]
	mov	rdx, r14
	mov	rdi, r13
	call	pci_read_config_word@PLT
	mov	edx, DWORD PTR SPDIF_CONFB[rip]
	mov	eax, DWORD PTR HWV_CONFB[rip]
	mov	rdi, r13
	or	eax, DWORD PTR DEBOUNCE[rip]
	mov	esi, DWORD PTR ESM_CONFIG_B[rip]
	not	edx
	and	edx, DWORD PTR 4[rsp]
	and	dh, 63
	or	edx, eax
	mov	eax, DWORD PTR GPIO_CONFB[rip]
	not	eax
	and	edx, eax
	mov	eax, DWORD PTR IRQ_TO_ISA[rip]
	or	edx, DWORD PTR CHI_CONFB[rip]
	not	eax
	and	edx, eax
	mov	eax, DWORD PTR IDMA_CONFB[rip]
	or	eax, DWORD PTR MIDI_FIX[rip]
	not	eax
	and	edx, eax
	and	edx, -3
	mov	DWORD PTR 4[rsp], edx
	call	pci_write_config_word@PLT
	mov	esi, DWORD PTR ESM_DDMA[rip]
	mov	rdx, r14
	mov	rdi, r13
	call	pci_read_config_word@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR ESM_DDMA[rip]
	mov	rdi, r13
	and	edx, -2
	mov	DWORD PTR 4[rsp], edx
	call	pci_write_config_word@PLT
	mov	esi, DWORD PTR ESM_LEGACY_AUDIO_CONTROL[rip]
	mov	rdx, r14
	mov	rdi, r13
	call	pci_read_config_word@PLT
	mov	eax, DWORD PTR ESS_ENABLE_SERIAL_IRQ[rip]
	mov	edx, DWORD PTR 4[rsp]
	mov	rdi, r13
	or	edx, DWORD PTR ESS_DISABLE_AUDIO[rip]
	mov	esi, DWORD PTR ESM_LEGACY_AUDIO_CONTROL[rip]
	not	eax
	and	edx, eax
	and	edx, -32
	mov	DWORD PTR 4[rsp], edx
	call	pci_write_config_word@PLT
	mov	rdx, r14
	mov	esi, 88
	mov	rdi, r13
	call	pci_read_config_word@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, 88
	mov	rdi, r13
	and	dh, -9
	or	edx, 12
	mov	DWORD PTR 4[rsp], edx
	call	pci_write_config_word@PLT
	mov	rdi, rbp
	call	snd_es1968_reset@PLT
	mov	rsi, QWORD PTR ESM_RING_BUS_DEST[rip]
	mov	edi, 49296
	add	rsi, r12
	call	outw@PLT
	mov	edi, 20
	call	udelay@PLT
	mov	rsi, QWORD PTR ESM_RING_BUS_CONTR_A[rip]
	mov	edi, 12288
	add	rsi, r12
	call	outw@PLT
	mov	edi, 20
	call	udelay@PLT
	mov	rdi, rbp
	call	snd_es1968_ac97_reset@PLT
	mov	rdi, QWORD PTR ESM_RING_BUS_CONTR_B[rip]
	add	rdi, r12
	call	inl@PLT
	mov	edi, DWORD PTR RINGB_EN_SPDIF[rip]
	mov	rsi, QWORD PTR ESM_RING_BUS_CONTR_B[rip]
	not	edi
	add	rsi, r12
	and	edi, eax
	call	outl@PLT
	lea	rsi, 28[r12]
	mov	edi, 136
	call	outb@PLT
	lea	rsi, 29[r12]
	mov	edi, 136
	call	outb@PLT
	lea	rsi, 30[r12]
	mov	edi, 136
	call	outb@PLT
	lea	rsi, 31[r12]
	mov	edi, 136
	call	outb@PLT
	mov	rsi, QWORD PTR ASSP_CONTROL_B[rip]
	xor	edi, edi
	add	rsi, r12
	call	outb@PLT
	mov	rsi, QWORD PTR ASSP_CONTROL_A[rip]
	mov	edi, 3
	add	rsi, r12
	call	outb@PLT
	mov	rsi, QWORD PTR ASSP_CONTROL_C[rip]
	xor	edi, edi
	add	rsi, r12
	call	outb@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rsi, QWORD PTR WC_INDEX[rip]
	mov	edi, ebx
	add	rsi, r12
	call	outw@PLT
	mov	rsi, QWORD PTR WC_DATA[rip]
	xor	edi, edi
	add	rsi, r12
	call	outw@PLT
	mov	rsi, QWORD PTR WC_INDEX[rip]
	lea	edi, -16[rbx]
	add	ebx, 1
	add	rsi, r12
	call	outw@PLT
	mov	rsi, QWORD PTR WC_DATA[rip]
	xor	edi, edi
	add	rsi, r12
	call	outw@PLT
	cmp	ebx, 496
	jne	.L2
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	call	wave_get_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	and	eax, 65280
	mov	edx, eax
	call	wave_set_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	call	wave_get_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	or	ah, 1
	mov	edx, eax
	call	wave_set_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	call	wave_get_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	and	ah, -3
	mov	edx, eax
	call	wave_set_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	call	wave_get_register@PLT
	mov	esi, DWORD PTR IDR7_WAVE_ROMRAM[rip]
	mov	rdi, rbp
	or	eax, -1025
	mov	edx, eax
	call	wave_set_register@PLT
	mov	esi, DWORD PTR IDR2_CRAM_DATA[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	edx, 45060
	mov	esi, 8
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	edx, 27
	mov	esi, 9
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	edx, 32768
	mov	esi, 10
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	edx, 16183
	mov	esi, 11
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	edx, 152
	mov	esi, 12
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	esi, 12
	mov	rdi, rbp
	call	maestro_read@PLT
	mov	esi, 12
	mov	rdi, rbp
	and	ah, 15
	mov	edx, eax
	or	dh, -128
	call	maestro_write@PLT
	mov	esi, 12
	mov	rdi, rbp
	call	maestro_read@PLT
	mov	esi, 12
	mov	rdi, rbp
	and	ah, -16
	mov	edx, eax
	or	dh, 5
	call	maestro_write@PLT
	mov	edx, 30258
	mov	esi, 13
	mov	rdi, rbp
	call	maestro_write@PLT
	mov	rdi, QWORD PTR WC_CONTROL[rip]
	add	rdi, r12
	call	inw@PLT
	mov	rsi, QWORD PTR WC_CONTROL[rip]
	and	eax, -64110
	mov	edi, eax
	or	edi, 41376
	add	rsi, r12
	mov	DWORD PTR 4[rsp], edi
	call	outw@PLT
	mov	edx, DWORD PTR NR_APUS[rip]
	test	edx, edx
	jle	.L1
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L6:
	mov	eax, DWORD PTR NR_APU_REGS[rip]
	mov	DWORD PTR 4[rsp], 0
	test	eax, eax
	jle	.L4
	xor	edx, edx
	.p2align 4,,10
	.p2align 3
.L5:
	xor	ecx, ecx
	mov	esi, ebx
	mov	rdi, rbp
	call	apu_set_register@PLT
	mov	eax, DWORD PTR 4[rsp]
	lea	edx, 1[rax]
	cmp	edx, DWORD PTR NR_APU_REGS[rip]
	mov	DWORD PTR 4[rsp], edx
	jl	.L5
.L4:
	add	ebx, 1
	cmp	DWORD PTR NR_APUS[rip], ebx
	jg	.L6
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L13
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
.L13:
	.cfi_restore_state
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	snd_es1968_chip_init, .-snd_es1968_chip_init
	.comm	WC_INDEX,8,8
	.comm	WC_DATA,8,8
	.comm	WC_CONTROL,8,8
	.comm	SWAP_LR,4,4
	.comm	SUBTR_DECODE,4,4
	.comm	SPDIF_CONFB,4,4
	.comm	SAFEGUARD,4,4
	.comm	RINGB_EN_SPDIF,4,4
	.comm	POST_WRITE,4,4
	.comm	PIC_SNOOP2,4,4
	.comm	PIC_SNOOP1,4,4
	.comm	PCI_TIMING,4,4
	.comm	NR_APU_REGS,4,4
	.comm	NR_APUS,4,4
	.comm	MIDI_FIX,4,4
	.comm	IRQ_TO_ISA,4,4
	.comm	IDR7_WAVE_ROMRAM,4,4
	.comm	IDR2_CRAM_DATA,4,4
	.comm	IDMA_CONFB,4,4
	.comm	HWV_CONFB,4,4
	.comm	GPIO_CONFB,4,4
	.comm	ESS_ENABLE_SERIAL_IRQ,4,4
	.comm	ESS_DISABLE_AUDIO,4,4
	.comm	ESM_RING_BUS_DEST,8,8
	.comm	ESM_RING_BUS_CONTR_B,8,8
	.comm	ESM_RING_BUS_CONTR_A,8,8
	.comm	ESM_LEGACY_AUDIO_CONTROL,4,4
	.comm	ESM_DDMA,4,4
	.comm	ESM_CONFIG_B,4,4
	.comm	ESM_CONFIG_A,4,4
	.comm	DMA_CLEAR,4,4
	.comm	DEBOUNCE,4,4
	.comm	CHI_CONFB,4,4
	.comm	ASSP_CONTROL_C,8,8
	.comm	ASSP_CONTROL_B,8,8
	.comm	ASSP_CONTROL_A,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_es1968.c_snd_es1968_chip_init.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	snd_es1968_chip_init, %function
snd_es1968_chip_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r5, r0
	ldr	r7, [r0, #4]
	ldr	r8, .L14
	sub	sp, sp, #8
	ldr	r3, .L14+4
	ldr	r1, [r8]
	mov	r0, r7
	mov	r2, sp
	ldr	r6, [r5]
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	bl	pci_read_config_word
	ldr	r2, .L14+8
	ldr	r0, .L14+12
	ldr	r3, .L14+16
	ldr	r1, .L14+20
	ldr	r0, [r0]
	ldr	r2, [r2]
	ldr	r1, [r1]
	ldr	r3, [r3]
	orr	r2, r2, r0
	ldr	r0, .L14+24
	orr	r3, r3, r1
	ldr	r1, .L14+28
	ldr	lr, .L14+32
	ldr	ip, [r0]
	orr	r3, r3, r2
	ldr	r0, .L14+36
	ldr	r2, [sp]
	ldr	r1, [r1]
	ldr	r0, [r0]
	bic	r2, r2, r3
	ldr	r3, [lr]
	orr	r1, r1, ip
	orr	r3, r3, r0
	ldr	r4, .L14+40
	orr	r2, r2, r1
	bic	r2, r2, r3
	ldr	r1, [r8]
	mov	r0, r7
	str	r2, [sp]
	bl	pci_write_config_word
	ldr	r1, [r4]
	mov	r0, r7
	mov	r2, sp
	bl	pci_read_config_word
	ldr	r2, .L14+44
	ldr	r3, .L14+48
	ldr	r1, [r2]
	ldr	r0, .L14+52
	ldr	r2, [sp]
	ldr	r0, [r0]
	ldr	r3, [r3]
	bic	r2, r2, r1
	ldr	r1, .L14+56
	orr	r3, r3, r0
	ldr	r1, [r1]
	bic	r2, r2, #49152
	orr	r2, r2, r3
	ldr	ip, .L14+60
	bic	r2, r2, r1
	ldr	r0, .L14+64
	ldr	r3, .L14+68
	ldr	r1, .L14+72
	ldr	ip, [ip]
	ldr	r0, [r0]
	ldr	r1, [r1]
	ldr	r3, [r3]
	orr	r2, r2, ip
	orr	r3, r3, r1
	bic	r2, r2, r0
	bic	r2, r2, r3
	ldr	r8, .L14+76
	ldr	r1, [r4]
	bic	r2, r2, #2
	mov	r0, r7
	str	r2, [sp]
	bl	pci_write_config_word
	ldr	r1, [r8]
	mov	r0, r7
	mov	r2, sp
	bl	pci_read_config_word
	ldr	r2, [sp]
	ldr	r4, .L14+80
	ldr	r1, [r8]
	bic	r2, r2, #1
	mov	r0, r7
	str	r2, [sp]
	bl	pci_write_config_word
	ldr	r1, [r4]
	mov	r0, r7
	mov	r2, sp
	bl	pci_read_config_word
	ldr	r2, .L14+84
	ldr	r3, .L14+88
	ldr	r1, [r2]
	ldr	r2, [sp]
	ldr	r3, [r3]
	orr	r2, r2, r1
	bic	r2, r2, r3
	ldr	r1, [r4]
	bic	r2, r2, #31
	mov	r0, r7
	str	r2, [sp]
	bl	pci_write_config_word
	mov	r2, sp
	mov	r0, r7
	mov	r1, #88
	bl	pci_read_config_word
	ldr	r2, [sp]
	mov	r1, #88
	bic	r2, r2, #2048
	orr	r2, r2, #12
	mov	r0, r7
	str	r2, [sp]
	bl	pci_write_config_word
	mov	r0, r5
	bl	snd_es1968_reset
	ldr	r3, .L14+92
	ldr	r0, .L14+96
	ldr	r1, [r3]
	ldr	r7, .L14+100
	add	r1, r6, r1
	bl	outw
	mov	r0, #20
	bl	udelay
	ldr	r3, .L14+104
	mov	r0, #12288
	ldr	r1, [r3]
	mov	r4, #480
	add	r1, r6, r1
	bl	outw
	mov	r0, #20
	bl	udelay
	mov	r0, r5
	bl	snd_es1968_ac97_reset
	ldr	r0, [r7]
	ldr	r8, .L14+108
	add	r0, r6, r0
	bl	inl
	ldr	r3, .L14+112
	ldr	r1, [r7]
	ldr	r3, [r3]
	add	r1, r6, r1
	bic	r0, r0, r3
	bl	outl
	add	r1, r6, #28
	mov	r0, #136
	bl	outb
	add	r1, r6, #29
	mov	r0, #136
	bl	outb
	add	r1, r6, #30
	mov	r0, #136
	bl	outb
	add	r1, r6, #31
	mov	r0, #136
	bl	outb
	ldr	r3, .L14+116
	mov	r0, #0
	ldr	r1, [r3]
	ldr	r7, .L14+120
	add	r1, r6, r1
	bl	outb
	ldr	r3, .L14+124
	mov	r0, #3
	ldr	r1, [r3]
	add	r1, r6, r1
	bl	outb
	ldr	r3, .L14+128
	mov	r0, #0
	ldr	r1, [r3]
	add	r1, r6, r1
	bl	outb
.L2:
	ldr	r1, [r8]
	mov	r0, r4
	add	r1, r6, r1
	bl	outw
	ldr	r1, [r7]
	mov	r0, #0
	add	r1, r6, r1
	bl	outw
	ldr	r1, [r8]
	sub	r0, r4, #16
	add	r1, r6, r1
	bl	outw
	ldr	r1, [r7]
	mov	r0, #0
	add	r4, r4, #1
	add	r1, r6, r1
	bl	outw
	cmp	r4, #496
	bne	.L2
	ldr	r4, .L14+132
	mov	r0, r5
	ldr	r7, [r4]
	ldr	r8, .L14+136
	mov	r1, r7
	bl	wave_get_register
	mov	r1, r7
	and	r2, r0, #65280
	mov	r0, r5
	bl	wave_set_register
	ldr	r7, [r4]
	mov	r0, r5
	mov	r1, r7
	bl	wave_get_register
	mov	r1, r7
	orr	r2, r0, #256
	mov	r0, r5
	bl	wave_set_register
	ldr	r7, [r4]
	mov	r0, r5
	mov	r1, r7
	bl	wave_get_register
	mov	r1, r7
	bic	r2, r0, #512
	mov	r0, r5
	bl	wave_set_register
	ldr	r4, [r4]
	mov	r0, r5
	mov	r1, r4
	bl	wave_get_register
	mvn	r2, r0
	and	r2, r2, #1024
	mvn	r2, r2
	mov	r1, r4
	mov	r0, r5
	bl	wave_set_register
	ldr	r3, .L14+140
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r5
	bl	maestro_write
	mov	r1, #8
	ldr	r2, .L14+144
	mov	r0, r5
	bl	maestro_write
	mov	r2, #27
	mov	r1, #9
	mov	r0, r5
	bl	maestro_write
	mov	r2, #32768
	mov	r1, #10
	mov	r0, r5
	bl	maestro_write
	mov	r1, #11
	ldr	r2, .L14+148
	mov	r0, r5
	bl	maestro_write
	mov	r2, #152
	mov	r1, #12
	mov	r0, r5
	bl	maestro_write
	mov	r1, #12
	mov	r0, r5
	bl	maestro_read
	bic	r2, r0, #61440
	orr	r2, r2, #32768
	mov	r1, #12
	mov	r0, r5
	bl	maestro_write
	mov	r1, #12
	mov	r0, r5
	bl	maestro_read
	bic	r2, r0, #3840
	mov	r1, #12
	orr	r2, r2, #1280
	mov	r0, r5
	bl	maestro_write
	mov	r1, #13
	ldr	r2, .L14+152
	mov	r0, r5
	bl	maestro_write
	ldr	r0, [r8]
	ldr	r7, .L14+156
	add	r0, r6, r0
	bl	inw
	bic	r0, r0, #64000
	ldr	r1, [r8]
	bic	r0, r0, #109
	orr	r0, r0, #41216
	orr	r0, r0, #160
	add	r1, r6, r1
	str	r0, [sp]
	bl	outw
	ldr	r3, [r7]
	cmp	r3, #0
	ble	.L1
	mov	r4, #0
	mov	r8, r4
	ldr	r6, .L14+160
.L6:
	ldr	r3, [r6]
	str	r8, [sp]
	cmp	r3, #0
	ble	.L4
	mov	r2, #0
.L5:
	mov	r3, #0
	mov	r1, r4
	mov	r0, r5
	bl	apu_set_register
	ldr	r2, [sp]
	ldr	r3, [r6]
	add	r2, r2, #1
	cmp	r2, r3
	str	r2, [sp]
	blt	.L5
.L4:
	ldr	r3, [r7]
	add	r4, r4, #1
	cmp	r3, r4
	bgt	.L6
.L1:
	ldr	r3, .L14+4
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L13
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L13:
	bl	__stack_chk_fail
.L15:
	.align	2
.L14:
	.word	ESM_CONFIG_A
	.word	.LC0
	.word	PIC_SNOOP1
	.word	PIC_SNOOP2
	.word	DMA_CLEAR
	.word	SAFEGUARD
	.word	PCI_TIMING
	.word	POST_WRITE
	.word	SWAP_LR
	.word	SUBTR_DECODE
	.word	ESM_CONFIG_B
	.word	SPDIF_CONFB
	.word	HWV_CONFB
	.word	DEBOUNCE
	.word	GPIO_CONFB
	.word	CHI_CONFB
	.word	IRQ_TO_ISA
	.word	IDMA_CONFB
	.word	MIDI_FIX
	.word	ESM_DDMA
	.word	ESM_LEGACY_AUDIO_CONTROL
	.word	ESS_DISABLE_AUDIO
	.word	ESS_ENABLE_SERIAL_IRQ
	.word	ESM_RING_BUS_DEST
	.word	49296
	.word	ESM_RING_BUS_CONTR_B
	.word	ESM_RING_BUS_CONTR_A
	.word	WC_INDEX
	.word	RINGB_EN_SPDIF
	.word	ASSP_CONTROL_B
	.word	WC_DATA
	.word	ASSP_CONTROL_A
	.word	ASSP_CONTROL_C
	.word	IDR7_WAVE_ROMRAM
	.word	WC_CONTROL
	.word	IDR2_CRAM_DATA
	.word	45060
	.word	16183
	.word	30258
	.word	NR_APUS
	.word	NR_APU_REGS
	.size	snd_es1968_chip_init, .-snd_es1968_chip_init
	.comm	WC_INDEX,4,4
	.comm	WC_DATA,4,4
	.comm	WC_CONTROL,4,4
	.comm	SWAP_LR,4,4
	.comm	SUBTR_DECODE,4,4
	.comm	SPDIF_CONFB,4,4
	.comm	SAFEGUARD,4,4
	.comm	RINGB_EN_SPDIF,4,4
	.comm	POST_WRITE,4,4
	.comm	PIC_SNOOP2,4,4
	.comm	PIC_SNOOP1,4,4
	.comm	PCI_TIMING,4,4
	.comm	NR_APU_REGS,4,4
	.comm	NR_APUS,4,4
	.comm	MIDI_FIX,4,4
	.comm	IRQ_TO_ISA,4,4
	.comm	IDR7_WAVE_ROMRAM,4,4
	.comm	IDR2_CRAM_DATA,4,4
	.comm	IDMA_CONFB,4,4
	.comm	HWV_CONFB,4,4
	.comm	GPIO_CONFB,4,4
	.comm	ESS_ENABLE_SERIAL_IRQ,4,4
	.comm	ESS_DISABLE_AUDIO,4,4
	.comm	ESM_RING_BUS_DEST,4,4
	.comm	ESM_RING_BUS_CONTR_B,4,4
	.comm	ESM_RING_BUS_CONTR_A,4,4
	.comm	ESM_LEGACY_AUDIO_CONTROL,4,4
	.comm	ESM_DDMA,4,4
	.comm	ESM_CONFIG_B,4,4
	.comm	ESM_CONFIG_A,4,4
	.comm	DMA_CLEAR,4,4
	.comm	DEBOUNCE,4,4
	.comm	CHI_CONFB,4,4
	.comm	ASSP_CONTROL_C,4,4
	.comm	ASSP_CONTROL_B,4,4
	.comm	ASSP_CONTROL_A,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
