	.file	"extr_r21a_chan.c_r21a_set_band_2ghz.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	r21a_set_band_2ghz
	.type	r21a_set_band_2ghz, @function
r21a_set_band_2ghz:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xor	edx, edx
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	esi, DWORD PTR R12A_OFDMCCK_EN[rip]
	mov	ecx, DWORD PTR R12A_OFDMCCK_EN_CCK[rip]
	or	ecx, DWORD PTR R12A_OFDMCCK_EN_OFDM[rip]
	mov	rbx, QWORD PTR [rdi]
	call	rtwn_bb_setbits@PLT
	mov	r13d, DWORD PTR R12A_RFE_PINMUX_LNA_MASK[rip]
	xor	edi, edi
	call	R12A_RFE_PINMUX@PLT
	mov	ecx, 28672
	mov	rdi, rbp
	mov	edx, r13d
	mov	esi, eax
	call	rtwn_bb_setbits@PLT
	xor	edi, edi
	mov	r13d, DWORD PTR R12A_RFE_PINMUX_PA_A_MASK[rip]
	call	R12A_RFE_PINMUX@PLT
	mov	ecx, 112
	mov	rdi, rbp
	mov	esi, eax
	mov	edx, r13d
	call	rtwn_bb_setbits@PLT
	cmp	QWORD PTR [rbx], 0
	je	.L2
	xor	edi, edi
	call	R12A_RFE_INV@PLT
	mov	ecx, 1048576
	xor	edx, edx
	mov	rdi, rbp
	mov	esi, eax
	call	rtwn_bb_setbits@PLT
	xor	edi, edi
	call	R12A_RFE_INV@PLT
	xor	ecx, ecx
	mov	edx, 4194304
	mov	rdi, rbp
	mov	esi, eax
	call	rtwn_bb_setbits@PLT
	xor	edi, edi
	call	R12A_RFE_PINMUX@PLT
	mov	ecx, 2
	mov	edx, 5
	mov	rdi, rbp
	mov	esi, eax
	call	rtwn_bb_setbits@PLT
	xor	edi, edi
	call	R12A_RFE_PINMUX@PLT
	mov	ecx, 512
	mov	edx, 1280
	mov	rdi, rbp
	mov	esi, eax
	call	rtwn_bb_setbits@PLT
.L3:
	xor	edi, edi
	call	R12A_TX_SCALE@PLT
	mov	rdi, rbp
	xor	ecx, ecx
	mov	edx, 3840
	mov	esi, eax
	call	rtwn_bb_setbits@PLT
	mov	esi, DWORD PTR R12A_TX_PATH[rip]
	mov	rdi, rbp
	mov	ecx, 16
	mov	edx, 240
	call	rtwn_bb_setbits@PLT
	mov	esi, DWORD PTR R12A_CCK_RX_PATH[rip]
	mov	edx, 251658240
	mov	rdi, rbp
	mov	ecx, 16777216
	call	rtwn_bb_setbits@PLT
	mov	esi, r12d
	mov	rdi, rbp
	call	rtwn_set_basicrates@PLT
	mov	esi, DWORD PTR R12A_CCK_CHECK[rip]
	mov	rdi, rbp
	xor	edx, edx
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	rtwn_write_1@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	rdi, rbp
	call	r21a_bypass_ext_lna_2ghz@PLT
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	r21a_set_band_2ghz, .-r21a_set_band_2ghz
	.comm	R12A_TX_PATH,4,4
	.comm	R12A_RFE_PINMUX_PA_A_MASK,4,4
	.comm	R12A_RFE_PINMUX_LNA_MASK,4,4
	.comm	R12A_OFDMCCK_EN_OFDM,4,4
	.comm	R12A_OFDMCCK_EN_CCK,4,4
	.comm	R12A_OFDMCCK_EN,4,4
	.comm	R12A_CCK_RX_PATH,4,4
	.comm	R12A_CCK_CHECK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_r21a_chan.c_r21a_set_band_2ghz.c"
	.text
	.align	2
	.global	r21a_set_band_2ghz
	.syntax unified
	.arm
	.fpu softvfp
	.type	r21a_set_band_2ghz, %function
r21a_set_band_2ghz:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r2, .L6
	ldr	r3, .L6+4
	push	{r4, r5, r6, lr}
	ldr	r3, [r3]
	mov	r5, r1
	ldr	r1, [r2]
	ldr	r2, .L6+8
	orr	r3, r1, r3
	ldr	r1, [r2]
	mov	r2, #0
	mov	r4, r0
	ldr	r6, [r0]
	bl	rtwn_bb_setbits
	mov	r0, #0
	bl	R12A_RFE_PINMUX
	ldr	r3, .L6+12
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r4
	mov	r3, #28672
	bl	rtwn_bb_setbits
	mov	r0, #0
	bl	R12A_RFE_PINMUX
	ldr	r3, .L6+16
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r4
	mov	r3, #112
	bl	rtwn_bb_setbits
	ldr	r3, [r6]
	cmp	r3, #0
	beq	.L2
	mov	r0, #0
	bl	R12A_RFE_INV
	mov	r3, #1048576
	mov	r1, r0
	mov	r2, #0
	mov	r0, r4
	bl	rtwn_bb_setbits
	mov	r0, #0
	bl	R12A_RFE_INV
	mov	r3, #0
	mov	r1, r0
	mov	r2, #4194304
	mov	r0, r4
	bl	rtwn_bb_setbits
	mov	r0, #0
	bl	R12A_RFE_PINMUX
	mov	r3, #2
	mov	r1, r0
	mov	r2, #5
	mov	r0, r4
	bl	rtwn_bb_setbits
	mov	r0, #0
	bl	R12A_RFE_PINMUX
	mov	r3, #512
	mov	r1, r0
	mov	r2, #1280
	mov	r0, r4
	bl	rtwn_bb_setbits
.L3:
	mov	r0, #0
	bl	R12A_TX_SCALE
	mov	r3, #0
	mov	r1, r0
	mov	r2, #3840
	mov	r0, r4
	bl	rtwn_bb_setbits
	ldr	r2, .L6+20
	mov	r3, #16
	ldr	r1, [r2]
	mov	r0, r4
	mov	r2, #240
	bl	rtwn_bb_setbits
	ldr	r2, .L6+24
	mov	r3, #16777216
	ldr	r1, [r2]
	mov	r0, r4
	mov	r2, #251658240
	bl	rtwn_bb_setbits
	mov	r1, r5
	mov	r0, r4
	bl	rtwn_set_basicrates
	ldr	r3, .L6+28
	mov	r0, r4
	pop	{r4, r5, r6, lr}
	mov	r2, #0
	ldr	r1, [r3]
	b	rtwn_write_1
.L2:
	mov	r0, r4
	bl	r21a_bypass_ext_lna_2ghz
	b	.L3
.L7:
	.align	2
.L6:
	.word	R12A_OFDMCCK_EN_CCK
	.word	R12A_OFDMCCK_EN_OFDM
	.word	R12A_OFDMCCK_EN
	.word	R12A_RFE_PINMUX_LNA_MASK
	.word	R12A_RFE_PINMUX_PA_A_MASK
	.word	R12A_TX_PATH
	.word	R12A_CCK_RX_PATH
	.word	R12A_CCK_CHECK
	.size	r21a_set_band_2ghz, .-r21a_set_band_2ghz
	.comm	R12A_TX_PATH,4,4
	.comm	R12A_RFE_PINMUX_PA_A_MASK,4,4
	.comm	R12A_RFE_PINMUX_LNA_MASK,4,4
	.comm	R12A_OFDMCCK_EN_OFDM,4,4
	.comm	R12A_OFDMCCK_EN_CCK,4,4
	.comm	R12A_OFDMCCK_EN,4,4
	.comm	R12A_CCK_RX_PATH,4,4
	.comm	R12A_CCK_CHECK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
