	.file	"extr_amdgpu_cs.c_amdgpu_cs_try_evict.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	amdgpu_cs_try_evict, @function
amdgpu_cs_try_evict:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pxor	xmm0, xmm0
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	mov	r14, QWORD PTR 8[rdi]
	mov	r13d, DWORD PTR [rsi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 40[rsp], rax
	xor	eax, eax
	movaps	XMMWORD PTR 16[rsp], xmm0
	mov	DWORD PTR 16[rsp], 1
	test	r14, r14
	je	.L4
	mov	r12, rdi
	cmp	r14, rdi
	je	.L4
	mov	eax, r13d
	mov	rbx, rsi
	not	eax
	mov	DWORD PTR 8[rsp], eax
.L8:
	mov	edi, DWORD PTR 4[r14]
	call	ttm_to_amdgpu_bo@PLT
	mov	edi, DWORD PTR 12[rax]
	mov	rbp, rax
	call	amdgpu_ttm_adev@PLT
	mov	r15, rax
	cmp	rbx, rbp
	je	.L4
	cmp	QWORD PTR 16[rbp], 0
	jne	.L5
	mov	edi, DWORD PTR 8[rbp]
	call	amdgpu_mem_type_to_domain@PLT
	test	r13d, eax
	je	.L5
	mov	esi, DWORD PTR 8[rsp]
	and	esi, DWORD PTR 0[rbp]
	mov	DWORD PTR 12[rsp], esi
	je	.L5
	mov	rdi, r15
	lea	r13, 8[rbp]
	lea	r15, 4[rbp]
	call	amdgpu_gmc_vram_full_visible@PLT
	mov	esi, DWORD PTR 12[rsp]
	test	eax, eax
	je	.L20
.L6:
	mov	rdi, rbp
	call	amdgpu_bo_placement_from_domain@PLT
	mov	rdi, r13
	lea	rdx, 16[rsp]
	mov	rsi, r15
	call	ttm_bo_validate@PLT
	mov	edi, eax
	mov	rax, QWORD PTR 24[rsp]
	add	DWORD PTR 20[r12], eax
.L9:
	call	unlikely@PLT
	test	rax, rax
	je	.L21
.L4:
	xor	eax, eax
.L1:
	mov	rcx, QWORD PTR 40[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L22
	add	rsp, 56
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	rdi, QWORD PTR 8[r12]
	mov	esi, DWORD PTR tv[rip]
	call	list_prev_entry@PLT
	mov	QWORD PTR 8[r12], rax
	mov	r14, rax
	cmp	rax, r12
	jne	.L8
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L21:
	mov	rdi, QWORD PTR 8[r12]
	mov	esi, DWORD PTR tv[rip]
	call	list_prev_entry@PLT
	mov	rsi, r12
	mov	rdi, r14
	mov	QWORD PTR 8[r12], rax
	call	list_move@PLT
	mov	eax, 1
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L20:
	mov	rdi, rbp
	mov	DWORD PTR 8[rsp], esi
	call	amdgpu_bo_in_cpu_visible_vram@PLT
	mov	esi, DWORD PTR 8[rsp]
	test	rax, rax
	je	.L6
	mov	rdi, rbp
	call	amdgpu_bo_placement_from_domain@PLT
	mov	rdi, r13
	lea	rdx, 16[rsp]
	mov	rsi, r15
	call	ttm_bo_validate@PLT
	mov	edi, eax
	mov	rax, QWORD PTR 24[rsp]
	add	DWORD PTR 20[r12], eax
	add	DWORD PTR 16[r12], eax
	jmp	.L9
.L22:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	amdgpu_cs_try_evict, .-amdgpu_cs_try_evict
	.comm	tv,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amdgpu_cs.c_amdgpu_cs_try_evict.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	amdgpu_cs_try_evict, %function
amdgpu_cs_try_evict:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	r3, #0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r2, #1
	mov	r7, r1
	ldr	r5, [r0, #4]
	ldr	r1, .L23
	sub	sp, sp, #28
	cmp	r5, r3
	ldr	r1, [r1]
	str	r1, [sp, #20]
	mov	r1,#0
	ldr	r9, [r7]
	str	r3, [sp, #12]
	str	r3, [sp, #16]
	str	r2, [sp, #8]
	beq	.L4
	cmp	r5, r0
	mov	r6, r0
	beq	.L4
	mvn	r10, r9
	ldr	r8, .L23+4
.L8:
	ldr	r0, [r5, #4]
	bl	ttm_to_amdgpu_bo
	mov	r4, r0
	ldr	r0, [r0, #12]
	bl	amdgpu_ttm_adev
	cmp	r7, r4
	mov	fp, r0
	beq	.L4
	ldr	r3, [r4, #16]
	cmp	r3, #0
	bne	.L5
	ldr	r0, [r4, #8]
	bl	amdgpu_mem_type_to_domain
	tst	r9, r0
	beq	.L5
	ldr	r1, [r4]
	ands	r1, r10, r1
	str	r1, [sp, #4]
	beq	.L5
	mov	r0, fp
	bl	amdgpu_gmc_vram_full_visible
	cmp	r0, #0
	ldr	r1, [sp, #4]
	add	r7, r4, #8
	add	r8, r4, #4
	beq	.L20
.L6:
	mov	r0, r4
	bl	amdgpu_bo_placement_from_domain
	add	r2, sp, #8
	mov	r1, r8
	mov	r0, r7
	bl	ttm_bo_validate
	ldr	r3, [r6, #12]
	ldr	r2, [sp, #16]
	add	r3, r3, r2
	str	r3, [r6, #12]
.L9:
	bl	unlikely
	cmp	r0, #0
	beq	.L21
.L4:
	mov	r0, #0
.L1:
	ldr	r3, .L23
	ldr	r2, [r3]
	ldr	r3, [sp, #20]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L22
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
	ldr	r1, [r8]
	ldr	r0, [r6, #4]
	bl	list_prev_entry
	cmp	r0, r6
	mov	r5, r0
	str	r0, [r6, #4]
	bne	.L8
	b	.L4
.L21:
	ldr	r3, .L23+4
	ldr	r0, [r6, #4]
	ldr	r1, [r3]
	bl	list_prev_entry
	mov	r1, r6
	str	r0, [r6, #4]
	mov	r0, r5
	bl	list_move
	mov	r0, #1
	b	.L1
.L20:
	mov	r0, r4
	bl	amdgpu_bo_in_cpu_visible_vram
	cmp	r0, #0
	ldr	r1, [sp, #4]
	beq	.L6
	mov	r0, r4
	bl	amdgpu_bo_placement_from_domain
	mov	r1, r8
	add	r2, sp, #8
	mov	r0, r7
	bl	ttm_bo_validate
	ldr	r1, [sp, #16]
	ldr	r2, [r6, #12]
	ldr	r3, [r6, #8]
	add	r2, r2, r1
	add	r3, r3, r1
	str	r2, [r6, #12]
	str	r3, [r6, #8]
	b	.L9
.L22:
	bl	__stack_chk_fail
.L24:
	.align	2
.L23:
	.word	.LC0
	.word	tv
	.size	amdgpu_cs_try_evict, .-amdgpu_cs_try_evict
	.comm	tv,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
