	.file	"extr_core.c___mlxsw_core_port_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	__mlxsw_core_port_init, @function
__mlxsw_core_port_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, edx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rsi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, r12
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sal	rbp, 4
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	r15d, DWORD PTR 88[rsp]
	mov	DWORD PTR 12[rsp], ecx
	mov	DWORD PTR 8[rsp], r8d
	mov	DWORD PTR 4[rsp], r9d
	movzx	r15d, r15b
	call	priv_to_devlink@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 88
	add	rbp, QWORD PTR [rbx]
	mov	esi, r14d
	mov	QWORD PTR 0[rbp], r12
	lea	rbx, 8[rbp]
	mov	r13, rax
	push	r15
	.cfi_def_cfa_offset 96
	mov	r9, QWORD PTR 96[rsp]
	mov	rdi, rbx
	mov	r8d, DWORD PTR 20[rsp]
	mov	ecx, DWORD PTR 24[rsp]
	mov	edx, DWORD PTR 28[rsp]
	call	devlink_port_attrs_set@PLT
	mov	rdx, r12
	mov	rsi, rbx
	mov	rdi, r13
	call	devlink_port_register@PLT
	pop	rdx
	.cfi_def_cfa_offset 88
	pop	rcx
	.cfi_def_cfa_offset 80
	mov	r12d, eax
	test	eax, eax
	jne	.L8
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	mov	edx, 16
	xor	esi, esi
	mov	rdi, rbp
	call	memset@PLT
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	__mlxsw_core_port_init, .-__mlxsw_core_port_init
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_core.c___mlxsw_core_port_init.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__mlxsw_core_port_init, %function
__mlxsw_core_port_init:
	@ args = 16, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	sub	sp, sp, #16
	mov	r4, r1
	mov	r5, r2
	mov	r6, r3
	mov	r7, r0
	ldr	r8, [sp, #52]
	ldr	r9, [sp, #56]
	ldrb	r10, [sp, #60]	@ zero_extendqisi2
	bl	priv_to_devlink
	mov	r1, r5
	mov	r5, r0
	ldr	r3, [r7]
	mov	r2, r6
	add	r7, r3, r4, lsl #3
	add	r6, r7, #4
	str	r4, [r3, r4, lsl #3]
	mov	r0, r6
	ldr	r3, [sp, #48]
	stm	sp, {r8, r9, r10}
	bl	devlink_port_attrs_set
	mov	r2, r4
	mov	r1, r6
	mov	r0, r5
	bl	devlink_port_register
	subs	r4, r0, #0
	bne	.L8
	mov	r0, r4
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L8:
	mov	r0, r7
	mov	r2, #8
	mov	r1, #0
	bl	memset
	mov	r0, r4
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
	.size	__mlxsw_core_port_init, .-__mlxsw_core_port_init
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
