	.file	"extr_nv_driver.c_riva_get_memlen.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	riva_get_memlen
	.type	riva_get_memlen, @function
riva_get_memlen:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 24
	.cfi_def_cfa_offset 48
	mov	edx, DWORD PTR 4[rdi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	cmp	edx, 131
	je	.L2
	jg	.L3
	add	edx, -128
	cmp	edx, 2
	ja	.L1
	mov	eax, DWORD PTR [rdi]
	cmp	DWORD PTR NV_CHIP_IGEFORCE2[rip], eax
	je	.L47
	cmp	DWORD PTR NV_CHIP_0x01F0[rip], eax
	je	.L48
	mov	edi, DWORD PTR 8[rdi]
	mov	esi, 524
	call	NV_RD32@PLT
	sar	eax, 20
	movzx	edx, al
	cmp	edx, 32
	je	.L20
	jg	.L15
	cmp	edx, 4
	je	.L10
	cmp	edx, 8
	je	.L11
	cmp	edx, 2
	mov	eax, 16384
	mov	edx, 2048
	cmove	rax, rdx
	.p2align 4,,10
	.p2align 3
.L1:
	mov	rcx, QWORD PTR 8[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L49
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	xor	eax, eax
	cmp	edx, 132
	jne	.L1
	mov	edi, DWORD PTR 8[rdi]
	xor	esi, esi
	call	NV_RD32@PLT
	test	al, 32
	jne	.L50
	mov	edi, DWORD PTR 8[rbx]
	xor	esi, esi
	call	NV_RD32@PLT
	and	eax, 3
	je	.L11
	cmp	eax, 2
	je	.L10
.L9:
	mov	eax, 2048
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L2:
	mov	edi, DWORD PTR 8[rdi]
	xor	esi, esi
	call	NV_RD32@PLT
	mov	edi, DWORD PTR 8[rbx]
	xor	esi, esi
	test	ah, 1
	jne	.L51
	call	NV_RD32@PLT
	and	eax, 3
	mov	edx, eax
	mov	eax, 16384
	cmp	edx, 3
	je	.L1
	lea	rax, CSWTCH.5[rip]
	mov	rax, QWORD PTR [rax+rdx*8]
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L51:
	call	NV_RD32@PLT
	sar	eax, 12
	and	eax, 15
	add	eax, 1
	sal	eax, 11
	cdqe
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L50:
	mov	edi, DWORD PTR 12[rbx]
	xor	esi, esi
	call	NV_RD32@PLT
	and	eax, 240
	cmp	eax, 32
	je	.L7
.L11:
	mov	eax, 8192
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L47:
	mov	esi, 1
	xor	edi, edi
	call	pci_get_bus_and_slot@PLT
	lea	rdx, 4[rsp]
	mov	esi, 124
	mov	rbp, rax
	mov	rdi, rax
	call	pci_read_config_dword@PLT
	mov	rdi, rbp
	call	pci_dev_put@PLT
	mov	eax, DWORD PTR 4[rsp]
	sar	eax, 6
	and	eax, 31
	add	eax, 1
	sal	eax, 10
	cdqe
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L15:
	mov	eax, 65536
	cmp	edx, 64
	je	.L1
	cmp	edx, 128
	mov	eax, 16384
	mov	edx, 131072
	cmove	rax, rdx
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L48:
	mov	esi, 1
	xor	edi, edi
	call	pci_get_bus_and_slot@PLT
	lea	rdx, 4[rsp]
	mov	esi, 132
	mov	rbp, rax
	mov	rdi, rax
	call	pci_read_config_dword@PLT
	mov	rdi, rbp
	call	pci_dev_put@PLT
	mov	eax, DWORD PTR 4[rsp]
	sar	eax, 4
	and	eax, 127
	add	eax, 1
	sal	eax, 10
	cdqe
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L7:
	mov	edi, DWORD PTR 12[rbx]
	xor	esi, esi
	call	NV_RD32@PLT
	test	al, 14
	je	.L11
	mov	edi, DWORD PTR 8[rbx]
	xor	esi, esi
	call	NV_RD32@PLT
	and	eax, 3
	cmp	eax, 1
	je	.L9
	cmp	eax, 2
	jne	.L11
	.p2align 4,,10
	.p2align 3
.L10:
	mov	eax, 4096
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L20:
	mov	eax, 32768
	jmp	.L1
.L49:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	riva_get_memlen, .-riva_get_memlen
	.section	.rodata
	.align 16
	.type	CSWTCH.5, @object
	.size	CSWTCH.5, 24
CSWTCH.5:
	.quad	32768
	.quad	4096
	.quad	8192
	.comm	NV_CHIP_IGEFORCE2,4,4
	.comm	NV_CHIP_0x01F0,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nv_driver.c_riva_get_memlen.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	riva_get_memlen
	.syntax unified
	.arm
	.fpu softvfp
	.type	riva_get_memlen, %function
riva_get_memlen:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, lr}
	ldr	r3, [r0, #4]
	ldr	r2, .L47
	sub	sp, sp, #8
	cmp	r3, #131
	mov	r4, r0
	ldr	r2, [r2]
	str	r2, [sp, #4]
	mov	r2,#0
	beq	.L2
	bgt	.L3
	sub	r3, r3, #128
	cmp	r3, #2
	bhi	.L21
	ldr	r2, .L47+4
	ldr	r3, [r0]
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L42
	ldr	r2, .L47+8
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L43
	mov	r1, #524
	ldr	r0, [r0, #8]
	bl	NV_RD32
	asr	r0, r0, #20
	and	r3, r0, #255
	cmp	r3, #32
	bgt	.L15
	tst	r0, #254
	beq	.L23
	sub	r3, r3, #2
	cmp	r3, #30
	ldrls	pc, [pc, r3, asl #2]
	b	.L23
.L18:
	.word	.L24
	.word	.L23
	.word	.L10
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L11
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L23
	.word	.L17
.L3:
	cmp	r3, #132
	bne	.L21
	mov	r1, #0
	ldr	r0, [r0, #8]
	bl	NV_RD32
	ands	r1, r0, #32
	bne	.L44
	ldr	r0, [r4, #8]
	bl	NV_RD32
	ands	r0, r0, #3
	beq	.L11
	cmp	r0, #2
	beq	.L10
.L24:
	mov	r0, #2048
	b	.L1
.L21:
	mov	r0, #0
.L1:
	ldr	r3, .L47
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L45
	add	sp, sp, #8
	@ sp needed
	pop	{r4, pc}
.L2:
	mov	r1, #0
	ldr	r0, [r0, #8]
	bl	NV_RD32
	ands	r1, r0, #256
	ldr	r0, [r4, #8]
	bne	.L46
	bl	NV_RD32
	and	r0, r0, #3
	cmp	r0, #3
	ldrne	r3, .L47+12
	ldrne	r0, [r3, r0, lsl #2]
	bne	.L1
.L23:
	mov	r0, #16384
	b	.L1
.L44:
	mov	r1, #0
	ldr	r0, [r4, #12]
	bl	NV_RD32
	and	r0, r0, #240
	cmp	r0, #32
	beq	.L7
.L11:
	mov	r0, #8192
	b	.L1
.L7:
	mov	r1, #0
	ldr	r0, [r4, #12]
	bl	NV_RD32
	tst	r0, #14
	beq	.L11
	mov	r1, #0
	ldr	r0, [r4, #8]
	bl	NV_RD32
	and	r0, r0, #3
	cmp	r0, #1
	beq	.L24
	cmp	r0, #2
	bne	.L11
.L10:
	mov	r0, #4096
	b	.L1
.L46:
	mov	r1, #0
	bl	NV_RD32
	asr	r0, r0, #12
	and	r0, r0, #15
	add	r0, r0, #1
	lsl	r0, r0, #11
	b	.L1
.L42:
	mov	r1, #1
	mov	r0, #0
	bl	pci_get_bus_and_slot
	mov	r4, r0
	mov	r2, sp
	mov	r1, #124
	bl	pci_read_config_dword
	mov	r0, r4
	bl	pci_dev_put
	ldr	r0, [sp]
	asr	r0, r0, #6
	and	r0, r0, #31
	add	r0, r0, #1
	lsl	r0, r0, #10
	b	.L1
.L15:
	cmp	r3, #64
	moveq	r0, #65536
	beq	.L1
	cmp	r3, #128
	movne	r0, #16384
	moveq	r0, #131072
	b	.L1
.L43:
	mov	r1, #1
	mov	r0, #0
	bl	pci_get_bus_and_slot
	mov	r4, r0
	mov	r2, sp
	mov	r1, #132
	bl	pci_read_config_dword
	mov	r0, r4
	bl	pci_dev_put
	ldr	r0, [sp]
	asr	r0, r0, #4
	and	r0, r0, #127
	add	r0, r0, #1
	lsl	r0, r0, #10
	b	.L1
.L17:
	mov	r0, #32768
	b	.L1
.L45:
	bl	__stack_chk_fail
.L48:
	.align	2
.L47:
	.word	.LC0
	.word	NV_CHIP_IGEFORCE2
	.word	NV_CHIP_0x01F0
	.word	.LANCHOR0
	.size	riva_get_memlen, .-riva_get_memlen
	.comm	NV_CHIP_IGEFORCE2,4,4
	.comm	NV_CHIP_0x01F0,4,4
	.section	.rodata
	.align	2
	.set	.LANCHOR0,. + 0
	.type	CSWTCH.5, %object
	.size	CSWTCH.5, 12
CSWTCH.5:
	.word	32768
	.word	4096
	.word	8192
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
