	.file	"extr_radeon_cs.c_radeon_cs_parser_relocs.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"gem object lookup failed 0x%x\n"
	.text
	.p2align 4
	.type	radeon_cs_parser_relocs, @function
radeon_cs_parser_relocs:
.LFB0:
	.cfi_startproc
	endbr64
	movsx	rax, DWORD PTR [rdi]
	cmp	eax, -1
	je	.L12
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	sal	rax, 4
	mov	esi, 8
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rdi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	rdx, QWORD PTR 56[rdi]
	add	rax, QWORD PTR 48[rdi]
	mov	rbx, QWORD PTR [rdx]
	mov	QWORD PTR 40[rdi], 0
	mov	edx, DWORD PTR GFP_KERNEL[rip]
	mov	QWORD PTR 16[rsp], rbx
	mov	rbx, rax
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	lea	edi, 3[rax]
	cmovns	edi, eax
	sar	edi, 2
	mov	DWORD PTR 4[r13], edi
	call	kcalloc@PLT
	mov	QWORD PTR 24[r13], rax
	test	rax, rax
	je	.L4
	mov	edi, DWORD PTR 4[r13]
	mov	edx, DWORD PTR GFP_KERNEL[rip]
	mov	esi, 4
	call	kcalloc@PLT
	mov	QWORD PTR 16[r13], rax
	mov	r14, rax
	test	rax, rax
	je	.L4
	mov	ecx, DWORD PTR 4[r13]
	lea	rax, 8[r13]
	xor	r15d, r15d
	mov	QWORD PTR 24[rsp], rax
	test	ecx, ecx
	je	.L6
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rax, QWORD PTR 8[rbx]
	lea	edx, 0[0+r15*4]
	lea	r12, [rax+rdx*4]
	mov	r8, QWORD PTR [r12]
	test	r15d, r15d
	je	.L7
	lea	ecx, -1[r15]
	mov	rdx, r14
	lea	rax, 0[0+rcx*8]
	sub	rax, rcx
	lea	rcx, 56[r14+rax*8]
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L8:
	add	rdx, 56
	cmp	rcx, rdx
	je	.L7
.L10:
	cmp	QWORD PTR [rdx], r8
	jne	.L8
	mov	rax, QWORD PTR 24[r13]
	mov	ecx, r15d
	add	r15d, 1
	mov	QWORD PTR [rax+rcx*8], rdx
	lea	rax, 0[0+rcx*8]
	mov	rdx, QWORD PTR 16[r13]
	sub	rax, rcx
	lea	rax, [rdx+rax*8]
	mov	QWORD PTR [rax], 0
	cmp	DWORD PTR 4[r13], r15d
	jbe	.L6
.L25:
	mov	r14, QWORD PTR 16[r13]
	jmp	.L5
.L4:
	mov	eax, DWORD PTR ENOMEM[rip]
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	mov	r10d, r15d
	mov	esi, DWORD PTR 32[r13]
	mov	rdx, r8
	lea	rdi, 0[0+r10*8]
	mov	QWORD PTR 8[rsp], r10
	sub	rdi, r10
	lea	rbp, 0[0+rdi*8]
	mov	rdi, QWORD PTR 16[rsp]
	add	r14, rbp
	call	drm_gem_object_lookup@PLT
	mov	r10, QWORD PTR 8[rsp]
	mov	QWORD PTR 48[r14], rax
	mov	rax, QWORD PTR 16[r13]
	add	rax, rbp
	cmp	QWORD PTR 48[rax], 0
	je	.L24
	mov	rdx, QWORD PTR 24[r13]
	add	r15d, 1
	mov	QWORD PTR [rdx+r10*8], rax
	mov	r14, QWORD PTR 16[r13]
	add	r14, rbp
	mov	rdi, QWORD PTR 48[r14]
	call	gem_to_radeon_bo@PLT
	mov	rdi, QWORD PTR 16[r13]
	mov	edx, DWORD PTR 16[r12]
	mov	QWORD PTR 40[r14], rax
	mov	rsi, QWORD PTR 24[rsp]
	add	rdi, rbp
	mov	rax, QWORD PTR 40[rdi]
	mov	DWORD PTR 20[rdi], edx
	add	rdi, 8
	mov	edx, DWORD PTR 12[r12]
	mov	QWORD PTR 16[rdi], rax
	mov	QWORD PTR [rdi], rax
	mov	rax, QWORD PTR [r12]
	mov	DWORD PTR 8[rdi], edx
	mov	QWORD PTR -8[rdi], rax
	mov	eax, DWORD PTR 8[r12]
	mov	DWORD PTR 24[rdi], eax
	call	radeon_bo_list_add_object@PLT
	cmp	DWORD PTR 4[r13], r15d
	ja	.L25
.L6:
	add	rsp, 40
	.cfi_def_cfa_offset 56
	lea	rdi, 8[r13]
	pop	rbx
	.cfi_restore 3
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_restore 6
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_restore 12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_restore 13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_restore 14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_restore 15
	.cfi_def_cfa_offset 8
	jmp	radeon_bo_list_validate@PLT
.L12:
	xor	eax, eax
	ret
.L24:
	.cfi_def_cfa_offset 96
	.cfi_offset 3, -56
	.cfi_offset 6, -48
	.cfi_offset 12, -40
	.cfi_offset 13, -32
	.cfi_offset 14, -24
	.cfi_offset 15, -16
	mov	rsi, QWORD PTR [r12]
	lea	rdi, .LC0[rip]
	call	DRM_ERROR@PLT
	mov	eax, DWORD PTR ENOENT[rip]
	add	rsp, 40
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	radeon_cs_parser_relocs, .-radeon_cs_parser_relocs
	.comm	GFP_KERNEL,4,4
	.comm	ENOMEM,4,4
	.comm	ENOENT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_radeon_cs.c_radeon_cs_parser_relocs.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"gem object lookup failed 0x%x\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	radeon_cs_parser_relocs, %function
radeon_cs_parser_relocs:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	ip, [r0]
	cmn	ip, #1
	beq	.L12
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, #0
	ldr	r7, [r0, #28]
	ldr	r2, [r0, #32]
	ldr	r3, [r7, ip, lsl #3]
	mov	r5, r0
	cmp	r3, r4
	add	r0, r3, #3
	movlt	r3, r0
	ldr	r6, .L26
	asr	r0, r3, #2
	ldr	r9, [r2]
	mov	r1, #4
	ldr	r2, [r6]
	sub	sp, sp, #20
	str	r0, [r5, #4]
	str	r4, [r5, #24]
	add	r7, r7, ip, lsl #3
	bl	kcalloc
	cmp	r0, r4
	str	r0, [r5, #16]
	beq	.L4
	mov	r1, #4
	ldr	r2, [r6]
	ldr	r0, [r5, #4]
	bl	kcalloc
	cmp	r0, #0
	mov	ip, r0
	str	r0, [r5, #12]
	beq	.L4
	ldr	lr, [r5, #4]
	cmp	lr, #0
	addne	r3, r5, #8
	strne	r3, [sp, #12]
	strne	r9, [sp, #8]
	beq	.L6
.L5:
	ldr	r6, [r7, #4]
	cmp	r4, #0
	ldr	r2, [r6, r4, lsl #4]
	add	fp, r6, r4, lsl #4
	lsl	r8, r4, #4
	beq	.L7
	mov	r1, ip
	mov	r3, #0
	b	.L10
.L8:
	cmp	r3, r4
	add	r1, r1, #32
	beq	.L7
.L10:
	ldr	r0, [ip, r3, lsl #5]
	add	r3, r3, #1
	cmp	r0, r2
	bne	.L8
	mov	r2, #0
	ldr	r3, [r5, #16]
	str	r1, [r3, r4, lsl #2]
	ldr	r3, [r5, #12]
	str	r2, [r3, r4, lsl #5]
	add	r4, r4, #1
	cmp	lr, r4
	bls	.L6
.L25:
	ldr	ip, [r5, #12]
	b	.L5
.L4:
	ldr	r3, .L26+4
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	ldr	r1, [r5, #20]
	ldr	r0, [sp, #8]
	add	r9, ip, r4, lsl #5
	bl	drm_gem_object_lookup
	ldr	r2, [r5, #12]
	lsl	r10, r4, #5
	str	r0, [r9, #28]
	add	r2, r2, r10
	ldr	r1, [r2, #28]
	cmp	r1, #0
	beq	.L24
	ldr	r1, [r5, #16]
	str	r2, [r1, r4, lsl #2]
	ldr	r2, [r5, #12]
	add	r2, r2, r10
	ldr	r0, [r2, #28]
	str	r2, [sp, #4]
	bl	gem_to_radeon_bo
	ldr	r1, [r5, #12]
	ldr	r2, [sp, #4]
	add	r3, r1, r10
	str	r0, [r2, #24]
	ldr	lr, [r6, r8]
	ldr	r0, [fp, #8]
	ldr	r6, [fp, #12]
	ldr	ip, [fp, #4]
	ldr	r2, [r3, #24]
	str	r0, [r3, #8]
	str	r2, [r3, #16]
	str	r6, [r3, #12]
	str	r2, [r3, #4]
	add	r0, r3, #4
	str	lr, [r1, r4, lsl #5]
	ldr	r1, [sp, #12]
	str	ip, [r3, #20]
	bl	radeon_bo_list_add_object
	ldr	lr, [r5, #4]
	add	r4, r4, #1
	cmp	lr, r4
	bhi	.L25
.L6:
	add	r0, r5, #8
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	radeon_bo_list_validate
.L12:
	mov	r0, #0
	bx	lr
.L24:
	ldr	r1, [fp]
	ldr	r0, .L26+8
	bl	DRM_ERROR
	ldr	r3, .L26+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L27:
	.align	2
.L26:
	.word	GFP_KERNEL
	.word	ENOMEM
	.word	.LC0
	.word	ENOENT
	.size	radeon_cs_parser_relocs, .-radeon_cs_parser_relocs
	.comm	GFP_KERNEL,4,4
	.comm	ENOMEM,4,4
	.comm	ENOENT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
