	.file	"extr_smsc9420.c_smsc9420_isr.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	smsc9420_isr, @function
smsc9420_isr:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xor	edi, edi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rsi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	test	rsi, rsi
	mov	r12d, DWORD PTR IRQ_NONE[rip]
	sete	dil
	call	BUG_ON@PLT
	mov	eax, DWORD PTR 16[rbp]
	xor	edi, edi
	test	eax, eax
	sete	dil
	call	BUG_ON@PLT
	mov	esi, DWORD PTR INT_CFG[rip]
	mov	rdi, rbp
	call	smsc9420_reg_read@PLT
	mov	edx, DWORD PTR INT_CFG_IRQ_EN_[rip]
	or	edx, DWORD PTR INT_CFG_IRQ_INT_[rip]
	and	eax, edx
	cmp	edx, eax
	je	.L2
	mov	r12d, DWORD PTR IRQ_NONE[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	mov	eax, r12d
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	esi, DWORD PTR INT_STAT[rip]
	mov	rdi, rbp
	call	smsc9420_reg_read@PLT
	mov	edi, DWORD PTR INT_STAT_DMAC_INT_[rip]
	mov	ebx, eax
	and	edi, eax
	call	likely@PLT
	test	rax, rax
	jne	.L25
.L4:
	and	ebx, DWORD PTR INT_STAT_SW_INT_[rip]
	mov	edi, ebx
	call	unlikely@PLT
	test	rax, rax
	jne	.L26
.L10:
	mov	rdi, rbp
	call	smsc9420_pci_flush_write@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L25:
	.cfi_restore_state
	mov	esi, DWORD PTR DMAC_STATUS[rip]
	mov	rdi, rbp
	call	smsc9420_reg_read@PLT
	mov	r12d, eax
	mov	eax, DWORD PTR DMAC_STS_TX_[rip]
	mov	r13d, eax
	and	r13d, r12d
	jne	.L5
	test	DWORD PTR DMAC_STS_RX_[rip], r12d
	jne	.L6
.L7:
	mov	r12d, DWORD PTR IRQ_HANDLED[rip]
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L26:
	lea	r12, 4[rbp]
	xor	r13d, r13d
	mov	rdi, r12
	mov	esi, r13d
	call	spin_lock_irqsave@PLT
	mov	esi, DWORD PTR INT_CTL[rip]
	mov	rdi, rbp
	call	smsc9420_reg_read@PLT
	mov	edx, DWORD PTR INT_CTL_SW_INT_EN_[rip]
	mov	esi, DWORD PTR INT_CTL[rip]
	mov	rdi, rbp
	not	edx
	and	edx, eax
	call	smsc9420_reg_write@PLT
	mov	rdi, r12
	mov	esi, r13d
	call	spin_unlock_irqrestore@PLT
	mov	edx, DWORD PTR INT_STAT_SW_INT_[rip]
	mov	esi, DWORD PTR INT_STAT[rip]
	mov	rdi, rbp
	call	smsc9420_reg_write@PLT
	mov	DWORD PTR 0[rbp], 1
	xor	eax, eax
	call	smp_wmb@PLT
	mov	r12d, DWORD PTR IRQ_HANDLED[rip]
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L5:
	mov	edi, DWORD PTR 12[rbp]
	or	eax, DWORD PTR DMAC_STS_NIS_[rip]
	mov	r13d, eax
	call	netif_wake_queue@PLT
	test	DWORD PTR DMAC_STS_RX_[rip], r12d
	je	.L8
.L6:
	mov	esi, DWORD PTR DMAC_INTR_ENA[rip]
	mov	rdi, rbp
	call	smsc9420_reg_read@PLT
	mov	edx, DWORD PTR DMAC_INTR_ENA_RX_[rip]
	mov	esi, DWORD PTR DMAC_INTR_ENA[rip]
	mov	rdi, rbp
	not	edx
	and	edx, eax
	call	smsc9420_reg_write@PLT
	mov	rdi, rbp
	call	smsc9420_pci_flush_write@PLT
	mov	eax, DWORD PTR DMAC_STS_RX_[rip]
	lea	rdi, 8[rbp]
	or	eax, DWORD PTR DMAC_STS_NIS_[rip]
	or	r13d, eax
	call	napi_schedule@PLT
	test	r13d, r13d
	je	.L7
.L8:
	mov	esi, DWORD PTR DMAC_STATUS[rip]
	mov	edx, r13d
	mov	rdi, rbp
	call	smsc9420_reg_write@PLT
	jmp	.L7
	.cfi_endproc
.LFE0:
	.size	smsc9420_isr, .-smsc9420_isr
	.comm	IRQ_NONE,4,4
	.comm	IRQ_HANDLED,4,4
	.comm	INT_STAT_SW_INT_,4,4
	.comm	INT_STAT_DMAC_INT_,4,4
	.comm	INT_STAT,4,4
	.comm	INT_CTL_SW_INT_EN_,4,4
	.comm	INT_CTL,4,4
	.comm	INT_CFG_IRQ_INT_,4,4
	.comm	INT_CFG_IRQ_EN_,4,4
	.comm	INT_CFG,4,4
	.comm	DMAC_STS_TX_,4,4
	.comm	DMAC_STS_RX_,4,4
	.comm	DMAC_STS_NIS_,4,4
	.comm	DMAC_STATUS,4,4
	.comm	DMAC_INTR_ENA_RX_,4,4
	.comm	DMAC_INTR_ENA,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_smsc9420.c_smsc9420_isr.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	smsc9420_isr, %function
smsc9420_isr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	clz	r0, r1
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r1
	ldr	r6, .L28
	lsr	r0, r0, #5
	ldr	r5, [r6]
	bl	BUG_ON
	ldr	r0, [r4, #16]
	clz	r0, r0
	lsr	r0, r0, #5
	bl	BUG_ON
	ldr	r3, .L28+4
	mov	r0, r4
	ldr	r1, [r3]
	bl	smsc9420_reg_read
	ldr	r3, .L28+8
	ldr	r2, .L28+12
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r2
	bics	r3, r3, r0
	beq	.L2
	ldr	r5, [r6]
	mov	r0, r5
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	ldr	r7, .L28+16
	mov	r0, r4
	ldr	r1, [r7]
	bl	smsc9420_reg_read
	mov	r6, r0
	ldr	r3, .L28+20
	ldr	r0, [r3]
	and	r0, r0, r6
	bl	likely
	cmp	r0, #0
	bne	.L26
.L4:
	ldr	r8, .L28+24
	ldr	r0, [r8]
	and	r0, r0, r6
	bl	unlikely
	cmp	r0, #0
	bne	.L27
.L10:
	mov	r0, r4
	bl	smsc9420_pci_flush_write
	mov	r0, r5
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L26:
	ldr	r8, .L28+28
	mov	r0, r4
	ldr	r1, [r8]
	bl	smsc9420_reg_read
	ldr	r3, .L28+32
	mov	r5, r0
	ldr	r3, [r3]
	ands	r9, r3, r0
	bne	.L5
	ldr	r10, .L28+36
	ldr	r3, [r10]
	tst	r0, r3
	ldrne	fp, .L28+40
	bne	.L6
.L7:
	ldr	r3, .L28+44
	ldr	r5, [r3]
	b	.L4
.L27:
	mov	r6, #0
	add	r5, r4, #4
	ldr	r9, .L28+48
	mov	r1, r6
	mov	r0, r5
	bl	spin_lock_irqsave
	ldr	r1, [r9]
	mov	r0, r4
	bl	smsc9420_reg_read
	mov	r3, r0
	ldr	r2, .L28+52
	ldr	r1, [r9]
	ldr	r2, [r2]
	mov	r0, r4
	bic	r2, r3, r2
	bl	smsc9420_reg_write
	mov	r1, r6
	mov	r0, r5
	bl	spin_unlock_irqrestore
	ldr	r2, [r8]
	ldr	r1, [r7]
	mov	r0, r4
	bl	smsc9420_reg_write
	mov	r3, #1
	str	r3, [r4]
	bl	smp_wmb
	ldr	r3, .L28+44
	ldr	r5, [r3]
	b	.L10
.L5:
	ldr	fp, .L28+40
	ldr	r10, .L28+36
	ldr	r9, [fp]
	ldr	r0, [r4, #12]
	orr	r9, r3, r9
	bl	netif_wake_queue
	ldr	r3, [r10]
	tst	r5, r3
	beq	.L8
.L6:
	ldr	r5, .L28+56
	mov	r0, r4
	ldr	r1, [r5]
	bl	smsc9420_reg_read
	mov	r3, r0
	ldr	r2, .L28+60
	ldr	r1, [r5]
	ldr	r2, [r2]
	mov	r0, r4
	bic	r2, r3, r2
	bl	smsc9420_reg_write
	mov	r0, r4
	bl	smsc9420_pci_flush_write
	ldr	r3, [r10]
	ldr	r2, [fp]
	add	r0, r4, #8
	orr	r3, r3, r2
	orr	r9, r9, r3
	bl	napi_schedule
	cmp	r9, #0
	beq	.L7
.L8:
	mov	r2, r9
	mov	r0, r4
	ldr	r1, [r8]
	bl	smsc9420_reg_write
	b	.L7
.L29:
	.align	2
.L28:
	.word	IRQ_NONE
	.word	INT_CFG
	.word	INT_CFG_IRQ_EN_
	.word	INT_CFG_IRQ_INT_
	.word	INT_STAT
	.word	INT_STAT_DMAC_INT_
	.word	INT_STAT_SW_INT_
	.word	DMAC_STATUS
	.word	DMAC_STS_TX_
	.word	DMAC_STS_RX_
	.word	DMAC_STS_NIS_
	.word	IRQ_HANDLED
	.word	INT_CTL
	.word	INT_CTL_SW_INT_EN_
	.word	DMAC_INTR_ENA
	.word	DMAC_INTR_ENA_RX_
	.size	smsc9420_isr, .-smsc9420_isr
	.comm	IRQ_NONE,4,4
	.comm	IRQ_HANDLED,4,4
	.comm	INT_STAT_SW_INT_,4,4
	.comm	INT_STAT_DMAC_INT_,4,4
	.comm	INT_STAT,4,4
	.comm	INT_CTL_SW_INT_EN_,4,4
	.comm	INT_CTL,4,4
	.comm	INT_CFG_IRQ_INT_,4,4
	.comm	INT_CFG_IRQ_EN_,4,4
	.comm	INT_CFG,4,4
	.comm	DMAC_STS_TX_,4,4
	.comm	DMAC_STS_RX_,4,4
	.comm	DMAC_STS_NIS_,4,4
	.comm	DMAC_STATUS,4,4
	.comm	DMAC_INTR_ENA_RX_,4,4
	.comm	DMAC_INTR_ENA,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
