	.file	"extr_nvc0.c_nvc0_graph_ctor.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"NvGrUseFW"
.LC1:
	.string	"using external firmware\n"
.LC2:
	.string	"fuc409c"
.LC3:
	.string	"fuc409d"
.LC4:
	.string	"fuc41ac"
.LC5:
	.string	"fuc41ad"
	.text
	.p2align 4
	.type	nvc0_graph_ctor, @function
nvc0_graph_ctor:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rdx
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12, rsi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	rbx, r9
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	nv_device@PLT
	mov	rsi, r12
	mov	r8, rsp
	mov	ecx, 1
	mov	rdx, r13
	mov	rdi, rbp
	mov	r14, rax
	call	nouveau_graph_create@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	r12d, eax
	call	nv_object@PLT
	mov	QWORD PTR [rbx], rax
	test	r12d, r12d
	je	.L33
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L34
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L33:
	.cfi_restore_state
	mov	rdi, QWORD PTR [rsp]
	call	nv_subdev@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR [rax], 402657280
	call	nv_subdev@PLT
	mov	edx, DWORD PTR nvc0_graph_intr[rip]
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR 4[rax], edx
	call	nv_engine@PLT
	lea	rcx, nvc0_graph_cclass[rip]
	mov	edi, DWORD PTR 4[r14]
	xor	edx, edx
	mov	QWORD PTR 8[rax], rcx
	lea	rsi, .LC0[rip]
	call	nouveau_boolopt@PLT
	mov	rdi, QWORD PTR [rsp]
	test	rax, rax
	je	.L4
	mov	rdi, QWORD PTR [rsp]
	lea	rsi, .LC1[rip]
	call	nv_info@PLT
	mov	rdi, QWORD PTR [rsp]
	lea	rsi, .LC2[rip]
	lea	rdx, 52[rdi]
	call	nvc0_graph_ctor_fw@PLT
	test	rax, rax
	je	.L5
.L6:
	mov	r12d, DWORD PTR EINVAL[rip]
	neg	r12d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rdi, QWORD PTR [rsp]
	lea	rsi, .LC3[rip]
	lea	rdx, 48[rdi]
	call	nvc0_graph_ctor_fw@PLT
	test	rax, rax
	jne	.L6
	mov	rdi, QWORD PTR [rsp]
	lea	rsi, .LC4[rip]
	lea	rdx, 44[rdi]
	call	nvc0_graph_ctor_fw@PLT
	test	rax, rax
	jne	.L6
	mov	rdi, QWORD PTR [rsp]
	lea	rsi, .LC5[rip]
	lea	rdx, 40[rdi]
	call	nvc0_graph_ctor_fw@PLT
	test	rax, rax
	jne	.L6
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR [rdi], 1
	.p2align 4,,10
	.p2align 3
.L4:
	call	nvc0_graph_class@PLT
	cmp	eax, 37271
	je	.L7
	cmp	eax, 37527
	je	.L8
	cmp	eax, 37015
	je	.L35
.L9:
	mov	r9, QWORD PTR [rsp]
	xor	r8d, r8d
	mov	ecx, 256
	xor	esi, esi
	mov	edx, 4096
	mov	rdi, rbp
	add	r9, 36
	call	nouveau_gpuobj_new@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L1
	mov	r9, QWORD PTR [rsp]
	xor	r8d, r8d
	mov	ecx, 256
	xor	esi, esi
	mov	edx, 4096
	mov	rdi, rbp
	add	r9, 32
	call	nouveau_gpuobj_new@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L1
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L10:
	mov	rax, QWORD PTR [rsp]
	mov	esi, ebx
	mov	edx, 16
	mov	edi, DWORD PTR 36[rax]
	call	nv_wo32@PLT
	mov	rax, QWORD PTR [rsp]
	mov	esi, ebx
	mov	edx, 16
	add	ebx, 4
	mov	edi, DWORD PTR 32[rax]
	call	nv_wo32@PLT
	cmp	ebx, 4096
	jne	.L10
	mov	rdi, QWORD PTR [rsp]
	mov	esi, 4232708
	call	nv_rd32@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	esi, 4232708
	sar	eax, 16
	and	eax, 31
	mov	DWORD PTR 4[rdi], eax
	call	nv_rd32@PLT
	mov	rdi, QWORD PTR [rsp]
	and	eax, 31
	mov	DWORD PTR 8[rdi], eax
	je	.L11
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L12:
	mov	edi, ebx
	mov	esi, 9736
	call	GPC_UNIT@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	esi, eax
	mov	rax, QWORD PTR 16[rdi]
	lea	rbp, [rax+rbx*4]
	call	nv_rd32@PLT
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR 0[rbp], eax
	mov	rax, QWORD PTR 16[rdi]
	mov	eax, DWORD PTR [rax+rbx*4]
	add	rbx, 1
	add	DWORD PTR 24[rdi], eax
	cmp	DWORD PTR 8[rdi], ebx
	jg	.L12
.L11:
	call	nv_device@PLT
	mov	eax, DWORD PTR [rax]
	sub	eax, 192
	cmp	eax, 25
	ja	.L1
	lea	rdx, .L14[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L14:
	.long	.L21-.L14
	.long	.L13-.L14
	.long	.L1-.L14
	.long	.L15-.L14
	.long	.L13-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L17-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L15-.L14
	.long	.L15-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L1-.L14
	.long	.L13-.L14
	.text
	.p2align 4,,10
	.p2align 3
.L35:
	mov	rdi, QWORD PTR [rsp]
	call	nv_engine@PLT
	mov	edx, DWORD PTR nvc0_graph_sclass[rip]
	mov	DWORD PTR [rax], edx
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rdi, QWORD PTR [rsp]
	call	nv_engine@PLT
	mov	edx, DWORD PTR nvc8_graph_sclass[rip]
	mov	DWORD PTR [rax], edx
	jmp	.L9
.L7:
	mov	rdi, QWORD PTR [rsp]
	call	nv_engine@PLT
	mov	edx, DWORD PTR nvc1_graph_sclass[rip]
	mov	DWORD PTR [rax], edx
	jmp	.L9
.L15:
	mov	rax, QWORD PTR [rsp]
	mov	DWORD PTR 28[rax], 3
	jmp	.L1
.L13:
	mov	rax, QWORD PTR [rsp]
	mov	DWORD PTR 28[rax], 1
	jmp	.L1
.L21:
	mov	rax, QWORD PTR [rsp]
	mov	edx, DWORD PTR 24[rax]
	cmp	edx, 11
	je	.L36
	cmp	edx, 14
	je	.L37
	cmp	edx, 15
	jne	.L1
.L31:
	mov	DWORD PTR 28[rax], 6
	jmp	.L1
.L17:
	mov	rax, QWORD PTR [rsp]
	jmp	.L31
.L36:
	mov	DWORD PTR 28[rax], 7
	jmp	.L1
.L37:
	mov	DWORD PTR 28[rax], 5
	jmp	.L1
.L34:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	nvc0_graph_ctor, .-nvc0_graph_ctor
	.comm	nvc8_graph_sclass,4,4
	.comm	nvc1_graph_sclass,4,4
	.comm	nvc0_graph_sclass,4,4
	.comm	nvc0_graph_intr,4,4
	.comm	nvc0_graph_cclass,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nvc0.c_nvc0_graph_ctor.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"NvGrUseFW\000"
	.align	2
.LC1:
	.ascii	"using external firmware\012\000"
	.align	2
.LC2:
	.ascii	"fuc409c\000"
	.align	2
.LC3:
	.ascii	"fuc409d\000"
	.align	2
.LC4:
	.ascii	"fuc41ac\000"
	.align	2
.LC5:
	.ascii	"fuc41ad\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvc0_graph_ctor, %function
nvc0_graph_ctor:
	@ args = 8, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r3, .L35
	sub	sp, sp, #16
	mov	r5, r1
	mov	r6, r2
	mov	r4, r0
	ldr	r3, [r3]
	str	r3, [sp, #12]
	mov	r3,#0
	ldr	r7, [sp, #44]
	bl	nv_device
	mov	ip, r0
	add	r3, sp, #8
	mov	r2, r6
	mov	r1, r5
	str	r3, [sp]
	mov	r0, r4
	mov	r3, #1
	mov	r6, ip
	bl	nouveau_graph_create
	mov	r5, r0
	ldr	r0, [sp, #8]
	bl	nv_object
	cmp	r5, #0
	str	r0, [r7]
	beq	.L32
.L1:
	ldr	r3, .L35
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L33
	mov	r0, r5
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L32:
	ldr	r0, [sp, #8]
	bl	nv_subdev
	mov	r3, r0
	ldr	r2, .L35+4
	ldr	r0, [sp, #8]
	str	r2, [r3]
	bl	nv_subdev
	mov	r3, r0
	ldr	r2, .L35+8
	ldr	r0, [sp, #8]
	ldr	r2, [r2]
	str	r2, [r3, #4]
	bl	nv_engine
	mov	r3, r0
	ldr	r1, .L35+12
	ldr	r0, [r6, #4]
	mov	r2, r5
	str	r1, [r3, #4]
	ldr	r1, .L35+16
	bl	nouveau_boolopt
	cmp	r0, #0
	bne	.L3
	ldr	r0, [sp, #8]
.L4:
	bl	nvc0_graph_class
	ldr	r3, .L35+20
	cmp	r0, r3
	beq	.L7
	add	r3, r3, #256
	cmp	r0, r3
	beq	.L8
	sub	r3, r3, #512
	cmp	r0, r3
	beq	.L34
.L9:
	mov	r1, #0
	ldr	r3, [sp, #8]
	mov	r2, #4096
	add	r3, r3, #28
	str	r3, [sp, #4]
	mov	r0, r4
	mov	r3, #256
	str	r1, [sp]
	bl	nouveau_gpuobj_new
	subs	r5, r0, #0
	bne	.L1
	ldr	r3, [sp, #8]
	mov	r1, r5
	add	r3, r3, #24
	str	r5, [sp]
	str	r3, [sp, #4]
	mov	r0, r4
	mov	r3, #256
	mov	r2, #4096
	bl	nouveau_gpuobj_new
	subs	r5, r0, #0
	bne	.L1
	mov	r4, r5
.L10:
	ldr	r3, [sp, #8]
	mov	r1, r4
	mov	r2, #16
	ldr	r0, [r3, #28]
	bl	nv_wo32
	ldr	r3, [sp, #8]
	mov	r1, r4
	mov	r2, #16
	ldr	r0, [r3, #24]
	add	r4, r4, #4
	bl	nv_wo32
	cmp	r4, #4096
	bne	.L10
	ldr	r1, .L35+24
	ldr	r0, [sp, #8]
	bl	nv_rd32
	mov	r3, r0
	ldr	r0, [sp, #8]
	asr	r3, r3, #16
	and	r3, r3, #31
	str	r3, [r0, #4]
	ldr	r1, .L35+24
	bl	nv_rd32
	ldr	r4, [sp, #8]
	and	r3, r0, #31
	cmp	r3, #0
	str	r3, [r4, #8]
	beq	.L11
	mov	r6, #0
	ldr	r7, .L35+28
.L12:
	mov	r1, r7
	mov	r0, r6
	bl	GPC_UNIT
	ldr	r3, [sp, #8]
	mov	r1, r0
	mov	r0, r4
	ldr	r8, [r3, #12]
	bl	nv_rd32
	ldr	r4, [sp, #8]
	str	r0, [r8, r6, lsl #2]
	ldr	r2, [r4, #12]
	ldr	r3, [r4, #16]
	ldr	r1, [r2, r6, lsl #2]
	ldr	r2, [r4, #8]
	add	r6, r6, #1
	add	r3, r3, r1
	cmp	r2, r6
	str	r3, [r4, #16]
	bgt	.L12
.L11:
	mov	r0, r4
	bl	nv_device
	ldr	r3, [r0]
	sub	r3, r3, #192
	cmp	r3, #25
	ldrls	pc, [pc, r3, asl #2]
	b	.L1
.L14:
	.word	.L21
	.word	.L13
	.word	.L1
	.word	.L15
	.word	.L13
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L17
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L15
	.word	.L15
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L1
	.word	.L13
.L3:
	ldr	r1, .L35+32
	ldr	r0, [sp, #8]
	bl	nv_info
	ldr	r0, [sp, #8]
	ldr	r1, .L35+36
	add	r2, r0, #44
	bl	nvc0_graph_ctor_fw
	cmp	r0, #0
	beq	.L5
.L6:
	ldr	r3, .L35+40
	ldr	r5, [r3]
	rsb	r5, r5, #0
	b	.L1
.L5:
	ldr	r0, [sp, #8]
	ldr	r1, .L35+44
	add	r2, r0, #40
	bl	nvc0_graph_ctor_fw
	cmp	r0, #0
	bne	.L6
	ldr	r0, [sp, #8]
	ldr	r1, .L35+48
	add	r2, r0, #36
	bl	nvc0_graph_ctor_fw
	cmp	r0, #0
	bne	.L6
	ldr	r0, [sp, #8]
	ldr	r1, .L35+52
	add	r2, r0, #32
	bl	nvc0_graph_ctor_fw
	cmp	r0, #0
	bne	.L6
	mov	r3, #1
	ldr	r0, [sp, #8]
	str	r3, [r0]
	b	.L4
.L34:
	ldr	r0, [sp, #8]
	bl	nv_engine
	ldr	r3, .L35+56
	ldr	r3, [r3]
	str	r3, [r0]
	b	.L9
.L8:
	ldr	r0, [sp, #8]
	bl	nv_engine
	ldr	r3, .L35+60
	ldr	r3, [r3]
	str	r3, [r0]
	b	.L9
.L7:
	ldr	r0, [sp, #8]
	bl	nv_engine
	ldr	r3, .L35+64
	ldr	r3, [r3]
	str	r3, [r0]
	b	.L9
.L15:
	mov	r2, #3
	ldr	r3, [sp, #8]
	str	r2, [r3, #20]
	b	.L1
.L13:
	mov	r2, #1
	ldr	r3, [sp, #8]
	str	r2, [r3, #20]
	b	.L1
.L21:
	ldr	r3, [sp, #8]
	ldr	r2, [r3, #16]
	cmp	r2, #11
	moveq	r2, #7
	streq	r2, [r3, #20]
	beq	.L1
	cmp	r2, #14
	moveq	r2, #5
	streq	r2, [r3, #20]
	beq	.L1
	cmp	r2, #15
	moveq	r2, #6
	streq	r2, [r3, #20]
	b	.L1
.L17:
	mov	r2, #6
	ldr	r3, [sp, #8]
	str	r2, [r3, #20]
	b	.L1
.L33:
	bl	__stack_chk_fail
.L36:
	.align	2
.L35:
	.word	.LC6
	.word	402657280
	.word	nvc0_graph_intr
	.word	nvc0_graph_cclass
	.word	.LC0
	.word	37271
	.word	4232708
	.word	9736
	.word	.LC1
	.word	.LC2
	.word	EINVAL
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	nvc0_graph_sclass
	.word	nvc8_graph_sclass
	.word	nvc1_graph_sclass
	.size	nvc0_graph_ctor, .-nvc0_graph_ctor
	.comm	nvc8_graph_sclass,4,4
	.comm	nvc1_graph_sclass,4,4
	.comm	nvc0_graph_sclass,4,4
	.comm	nvc0_graph_intr,4,4
	.comm	nvc0_graph_cclass,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
