	.file	"extr_rtc_sleep.c_rtc_sleep_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	rtc_sleep_init
	.type	rtc_sleep_init, @function
rtc_sleep_init:
.LFB0:
	.cfi_startproc
	endbr64
	sub	rsp, 8
	.cfi_def_cfa_offset 16
	cmp	QWORD PTR 96[rsp], 0
	jne	.L17
.L2:
	cmp	QWORD PTR 88[rsp], 0
	mov	esi, DWORD PTR RTC_CNTL_MEM_FOLW_CPU[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	je	.L3
	call	SET_PERI_REG_MASK@PLT
.L4:
	cmp	QWORD PTR 80[rsp], 0
	mov	esi, DWORD PTR RTC_CNTL_FASTMEM_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	je	.L5
	call	SET_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_FASTMEM_FORCE_PU[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	CLEAR_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_FASTMEM_FORCE_NOISO[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	CLEAR_PERI_REG_MASK@PLT
.L6:
	cmp	QWORD PTR 72[rsp], 0
	mov	esi, DWORD PTR RTC_CNTL_SLOWMEM_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	je	.L7
	call	SET_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_SLOWMEM_FORCE_PU[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	CLEAR_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_SLOWMEM_FORCE_NOISO[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	CLEAR_PERI_REG_MASK@PLT
.L8:
	cmp	QWORD PTR 64[rsp], 0
	mov	esi, DWORD PTR RTC_CNTL_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	je	.L9
	call	SET_PERI_REG_MASK@PLT
.L10:
	cmp	QWORD PTR 56[rsp], 0
	mov	esi, DWORD PTR RTC_CNTL_WIFI_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_DIG_PWC_REG[rip]
	je	.L11
	call	SET_PERI_REG_MASK@PLT
.L12:
	cmp	QWORD PTR 48[rsp], 0
	je	.L13
	mov	edx, DWORD PTR RTC_CNTL_DBG_ATTEN_DEFAULT[rip]
	mov	esi, DWORD PTR RTC_CNTL_DBG_ATTEN[rip]
	mov	edi, DWORD PTR RTC_CNTL_BIAS_CONF_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	esi, DWORD PTR RTC_CNTL_DG_WRAP_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_DIG_PWC_REG[rip]
	call	SET_PERI_REG_MASK@PLT
	mov	edi, DWORD PTR RTC_CNTL_ANA_CONF_REG[rip]
	mov	esi, DWORD PTR RTC_CNTL_CKGEN_I2C_PU[rip]
	or	esi, DWORD PTR RTC_CNTL_PLL_I2C_PU[rip]
	or	esi, DWORD PTR RTC_CNTL_RFRX_PBUS_PU[rip]
	or	esi, DWORD PTR RTC_CNTL_TXRF_I2C_PU[rip]
	call	CLEAR_PERI_REG_MASK@PLT
.L14:
	mov	esi, DWORD PTR RTC_CNTL_SDIO_FORCE[rip]
	mov	edi, DWORD PTR RTC_CNTL_SDIO_CONF_REG[rip]
	call	REG_CLR_BIT@PLT
	mov	edx, DWORD PTR 16[rsp]
	mov	esi, DWORD PTR RTC_CNTL_SDIO_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_SDIO_CONF_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR 20[rsp]
	mov	esi, DWORD PTR RTC_CNTL_DBIAS_SLP[rip]
	mov	edi, DWORD PTR RTC_CNTL_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR 24[rsp]
	mov	esi, DWORD PTR RTC_CNTL_DBIAS_WAK[rip]
	mov	edi, DWORD PTR RTC_CNTL_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR 28[rsp]
	mov	esi, DWORD PTR RTC_CNTL_DIG_DBIAS_WAK[rip]
	mov	edi, DWORD PTR RTC_CNTL_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR 32[rsp]
	mov	esi, DWORD PTR RTC_CNTL_DIG_DBIAS_SLP[rip]
	mov	edi, DWORD PTR RTC_CNTL_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR 36[rsp]
	mov	esi, DWORD PTR RTC_CNTL_DEEP_SLP_REJECT_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_SLP_REJECT_CONF_REG[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR 40[rsp]
	mov	esi, DWORD PTR RTC_CNTL_LIGHT_SLP_REJECT_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_SLP_REJECT_CONF_REG[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	REG_SET_FIELD@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	call	CLEAR_PERI_REG_MASK@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L13:
	mov	esi, DWORD PTR RTC_CNTL_DG_WRAP_PD_EN[rip]
	mov	edi, DWORD PTR RTC_CNTL_DIG_PWC_REG[rip]
	call	CLEAR_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_DBG_ATTEN[rip]
	mov	edi, DWORD PTR RTC_CNTL_BIAS_CONF_REG[rip]
	mov	edx, 6
	call	REG_SET_FIELD@PLT
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L11:
	call	CLEAR_PERI_REG_MASK@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L9:
	call	CLEAR_PERI_REG_MASK@PLT
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L7:
	call	CLEAR_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_SLOWMEM_FORCE_PU[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	SET_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_SLOWMEM_FORCE_NOISO[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	SET_PERI_REG_MASK@PLT
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L5:
	call	CLEAR_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_FASTMEM_FORCE_PU[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	SET_PERI_REG_MASK@PLT
	mov	esi, DWORD PTR RTC_CNTL_FASTMEM_FORCE_NOISO[rip]
	mov	edi, DWORD PTR RTC_CNTL_PWC_REG[rip]
	call	SET_PERI_REG_MASK@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L17:
	mov	edi, 1
	call	RTC_SLEEP_PD_CONFIG_ALL@PLT
	mov	edi, eax
	call	rtc_sleep_pd@PLT
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	rtc_sleep_init, .-rtc_sleep_init
	.comm	RTC_CNTL_WIFI_PD_EN,4,4
	.comm	RTC_CNTL_TXRF_I2C_PU,4,4
	.comm	RTC_CNTL_SLP_REJECT_CONF_REG,4,4
	.comm	RTC_CNTL_SLOWMEM_PD_EN,4,4
	.comm	RTC_CNTL_SLOWMEM_FORCE_PU,4,4
	.comm	RTC_CNTL_SLOWMEM_FORCE_NOISO,4,4
	.comm	RTC_CNTL_SDIO_PD_EN,4,4
	.comm	RTC_CNTL_SDIO_FORCE,4,4
	.comm	RTC_CNTL_SDIO_CONF_REG,4,4
	.comm	RTC_CNTL_RFRX_PBUS_PU,4,4
	.comm	RTC_CNTL_REG,4,4
	.comm	RTC_CNTL_PWC_REG,4,4
	.comm	RTC_CNTL_PLL_I2C_PU,4,4
	.comm	RTC_CNTL_PD_EN,4,4
	.comm	RTC_CNTL_MEM_FOLW_CPU,4,4
	.comm	RTC_CNTL_LIGHT_SLP_REJECT_EN,4,4
	.comm	RTC_CNTL_FASTMEM_PD_EN,4,4
	.comm	RTC_CNTL_FASTMEM_FORCE_PU,4,4
	.comm	RTC_CNTL_FASTMEM_FORCE_NOISO,4,4
	.comm	RTC_CNTL_DIG_PWC_REG,4,4
	.comm	RTC_CNTL_DIG_DBIAS_WAK,4,4
	.comm	RTC_CNTL_DIG_DBIAS_SLP,4,4
	.comm	RTC_CNTL_DG_WRAP_PD_EN,4,4
	.comm	RTC_CNTL_DEEP_SLP_REJECT_EN,4,4
	.comm	RTC_CNTL_DBIAS_WAK,4,4
	.comm	RTC_CNTL_DBIAS_SLP,4,4
	.comm	RTC_CNTL_DBG_ATTEN_DEFAULT,4,4
	.comm	RTC_CNTL_DBG_ATTEN,4,4
	.comm	RTC_CNTL_CKGEN_I2C_PU,4,4
	.comm	RTC_CNTL_BIAS_CONF_REG,4,4
	.comm	RTC_CNTL_ANA_CONF_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rtc_sleep.c_rtc_sleep_init.c"
	.text
	.align	2
	.global	rtc_sleep_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtc_sleep_init, %function
rtc_sleep_init:
	@ args = 56, pretend = 16, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	sub	sp, sp, #16
	push	{r4, lr}
	ldr	ip, [sp, #60]
	add	lr, sp, #4
	cmp	ip, #0
	stmib	lr, {r0, r1, r2, r3}
	bne	.L20
.L2:
	ldr	r2, [sp, #56]
	ldr	r4, .L21
	ldr	r3, .L21+4
	cmp	r2, #0
	ldr	r0, [r4]
	ldr	r1, [r3]
	beq	.L3
	bl	SET_PERI_REG_MASK
.L4:
	ldr	r2, [sp, #52]
	ldr	r3, .L21+8
	cmp	r2, #0
	ldr	r1, [r3]
	ldr	r0, [r4]
	beq	.L5
	bl	SET_PERI_REG_MASK
	ldr	r3, .L21+12
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	CLEAR_PERI_REG_MASK
	ldr	r3, .L21+16
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	CLEAR_PERI_REG_MASK
.L6:
	ldr	r2, [sp, #48]
	ldr	r3, .L21+20
	cmp	r2, #0
	ldr	r1, [r3]
	ldr	r0, [r4]
	beq	.L7
	bl	SET_PERI_REG_MASK
	ldr	r3, .L21+24
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	CLEAR_PERI_REG_MASK
	ldr	r3, .L21+28
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	CLEAR_PERI_REG_MASK
.L8:
	ldr	r2, [sp, #44]
	ldr	r3, .L21+32
	cmp	r2, #0
	ldr	r0, [r4]
	ldr	r1, [r3]
	beq	.L9
	bl	SET_PERI_REG_MASK
.L10:
	ldr	r2, [sp, #40]
	ldr	r4, .L21+36
	ldr	r3, .L21+40
	cmp	r2, #0
	ldr	r0, [r4]
	ldr	r1, [r3]
	beq	.L11
	bl	SET_PERI_REG_MASK
.L12:
	ldr	r3, [sp, #36]
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L21+44
	ldr	r2, .L21+48
	ldr	r1, .L21+52
	ldr	r2, [r2]
	ldr	r1, [r1]
	ldr	r0, [r3]
	bl	REG_SET_FIELD
	ldr	r3, .L21+56
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	SET_PERI_REG_MASK
	ldr	r2, .L21+60
	ldr	r3, .L21+64
	ldr	r0, .L21+68
	ldr	r1, [r2]
	ldr	r3, [r3]
	ldr	r2, .L21+72
	ldr	r0, [r0]
	orr	r3, r3, r1
	ldr	r1, [r2]
	ldr	r2, .L21+76
	orr	r3, r3, r0
	orr	r1, r3, r1
	ldr	r0, [r2]
	bl	CLEAR_PERI_REG_MASK
.L14:
	ldr	r3, .L21+80
	ldr	r4, .L21+84
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_CLR_BIT
	ldr	r3, .L21+88
	ldr	r2, [sp, #8]
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_SET_FIELD
	ldr	r4, .L21+92
	ldr	r3, .L21+96
	ldr	r2, [sp, #12]
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_SET_FIELD
	ldr	r3, .L21+100
	ldr	r2, [sp, #16]
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_SET_FIELD
	ldr	r3, .L21+104
	ldr	r2, [sp, #20]
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_SET_FIELD
	ldr	r3, .L21+108
	ldr	r2, [sp, #24]
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_SET_FIELD
	ldr	r4, .L21+112
	ldr	r3, .L21+116
	ldr	r2, [sp, #28]
	ldr	r1, [r3]
	ldr	r0, [r4]
	bl	REG_SET_FIELD
	ldr	r3, .L21+120
	ldr	r0, [r4]
	ldr	r2, [sp, #32]
	ldr	r1, [r3]
	pop	{r4, lr}
	add	sp, sp, #16
	b	REG_SET_FIELD
.L3:
	bl	CLEAR_PERI_REG_MASK
	b	.L4
.L13:
	ldr	r3, .L21+56
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	CLEAR_PERI_REG_MASK
	ldr	r2, .L21+52
	ldr	r3, .L21+44
	ldr	r1, [r2]
	ldr	r0, [r3]
	mov	r2, #6
	bl	REG_SET_FIELD
	b	.L14
.L11:
	bl	CLEAR_PERI_REG_MASK
	b	.L12
.L9:
	bl	CLEAR_PERI_REG_MASK
	b	.L10
.L7:
	bl	CLEAR_PERI_REG_MASK
	ldr	r3, .L21+24
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	SET_PERI_REG_MASK
	ldr	r3, .L21+28
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	SET_PERI_REG_MASK
	b	.L8
.L5:
	bl	CLEAR_PERI_REG_MASK
	ldr	r3, .L21+12
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	SET_PERI_REG_MASK
	ldr	r3, .L21+16
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	SET_PERI_REG_MASK
	b	.L6
.L20:
	mov	r0, #1
	bl	RTC_SLEEP_PD_CONFIG_ALL
	bl	rtc_sleep_pd
	b	.L2
.L22:
	.align	2
.L21:
	.word	RTC_CNTL_PWC_REG
	.word	RTC_CNTL_MEM_FOLW_CPU
	.word	RTC_CNTL_FASTMEM_PD_EN
	.word	RTC_CNTL_FASTMEM_FORCE_PU
	.word	RTC_CNTL_FASTMEM_FORCE_NOISO
	.word	RTC_CNTL_SLOWMEM_PD_EN
	.word	RTC_CNTL_SLOWMEM_FORCE_PU
	.word	RTC_CNTL_SLOWMEM_FORCE_NOISO
	.word	RTC_CNTL_PD_EN
	.word	RTC_CNTL_DIG_PWC_REG
	.word	RTC_CNTL_WIFI_PD_EN
	.word	RTC_CNTL_BIAS_CONF_REG
	.word	RTC_CNTL_DBG_ATTEN_DEFAULT
	.word	RTC_CNTL_DBG_ATTEN
	.word	RTC_CNTL_DG_WRAP_PD_EN
	.word	RTC_CNTL_PLL_I2C_PU
	.word	RTC_CNTL_CKGEN_I2C_PU
	.word	RTC_CNTL_RFRX_PBUS_PU
	.word	RTC_CNTL_TXRF_I2C_PU
	.word	RTC_CNTL_ANA_CONF_REG
	.word	RTC_CNTL_SDIO_FORCE
	.word	RTC_CNTL_SDIO_CONF_REG
	.word	RTC_CNTL_SDIO_PD_EN
	.word	RTC_CNTL_REG
	.word	RTC_CNTL_DBIAS_SLP
	.word	RTC_CNTL_DBIAS_WAK
	.word	RTC_CNTL_DIG_DBIAS_WAK
	.word	RTC_CNTL_DIG_DBIAS_SLP
	.word	RTC_CNTL_SLP_REJECT_CONF_REG
	.word	RTC_CNTL_DEEP_SLP_REJECT_EN
	.word	RTC_CNTL_LIGHT_SLP_REJECT_EN
	.size	rtc_sleep_init, .-rtc_sleep_init
	.comm	RTC_CNTL_WIFI_PD_EN,4,4
	.comm	RTC_CNTL_TXRF_I2C_PU,4,4
	.comm	RTC_CNTL_SLP_REJECT_CONF_REG,4,4
	.comm	RTC_CNTL_SLOWMEM_PD_EN,4,4
	.comm	RTC_CNTL_SLOWMEM_FORCE_PU,4,4
	.comm	RTC_CNTL_SLOWMEM_FORCE_NOISO,4,4
	.comm	RTC_CNTL_SDIO_PD_EN,4,4
	.comm	RTC_CNTL_SDIO_FORCE,4,4
	.comm	RTC_CNTL_SDIO_CONF_REG,4,4
	.comm	RTC_CNTL_RFRX_PBUS_PU,4,4
	.comm	RTC_CNTL_REG,4,4
	.comm	RTC_CNTL_PWC_REG,4,4
	.comm	RTC_CNTL_PLL_I2C_PU,4,4
	.comm	RTC_CNTL_PD_EN,4,4
	.comm	RTC_CNTL_MEM_FOLW_CPU,4,4
	.comm	RTC_CNTL_LIGHT_SLP_REJECT_EN,4,4
	.comm	RTC_CNTL_FASTMEM_PD_EN,4,4
	.comm	RTC_CNTL_FASTMEM_FORCE_PU,4,4
	.comm	RTC_CNTL_FASTMEM_FORCE_NOISO,4,4
	.comm	RTC_CNTL_DIG_PWC_REG,4,4
	.comm	RTC_CNTL_DIG_DBIAS_WAK,4,4
	.comm	RTC_CNTL_DIG_DBIAS_SLP,4,4
	.comm	RTC_CNTL_DG_WRAP_PD_EN,4,4
	.comm	RTC_CNTL_DEEP_SLP_REJECT_EN,4,4
	.comm	RTC_CNTL_DBIAS_WAK,4,4
	.comm	RTC_CNTL_DBIAS_SLP,4,4
	.comm	RTC_CNTL_DBG_ATTEN_DEFAULT,4,4
	.comm	RTC_CNTL_DBG_ATTEN,4,4
	.comm	RTC_CNTL_CKGEN_I2C_PU,4,4
	.comm	RTC_CNTL_BIAS_CONF_REG,4,4
	.comm	RTC_CNTL_ANA_CONF_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
