	.file	"extr_aml8726_clkmsr.c_aml8726_clkmsr_clock_frequency.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	aml8726_clkmsr_clock_frequency, @function
aml8726_clkmsr_clock_frequency:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xor	eax, eax
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	ebx, esi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	cmp	DWORD PTR AML_CLKMSR_NCLKS[rip], ebx
	ja	.L9
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	xor	edx, edx
	mov	rbp, rdi
	call	CSR_WRITE_4@PLT
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	mov	rdi, rbp
	call	CSR_BARRIER@PLT
	mov	eax, DWORD PTR AML_CLKMSR_DURATION[rip]
	mov	ecx, DWORD PTR AML_CLKMSR_0_DURATION_SHIFT[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR AML_CLKMSR_0_MUX_EN[rip]
	or	eax, DWORD PTR AML_CLKMSR_0_MEASURE[rip]
	sal	edx, cl
	mov	ecx, DWORD PTR AML_CLKMSR_0_MUX_SHIFT[rip]
	or	edx, eax
	mov	rax, QWORD PTR aml8726_clkmsr_clks[rip]
	mov	ebx, DWORD PTR [rax+rbx*4]
	sal	ebx, cl
	or	ebx, edx
	mov	edx, ebx
	call	CSR_WRITE_4@PLT
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	mov	rdi, rbp
	call	CSR_BARRIER@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L4:
	xor	eax, eax
	call	cpu_spinwait@PLT
.L3:
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	test	DWORD PTR AML_CLKMSR_0_BUSY[rip], eax
	jne	.L4
	mov	edx, DWORD PTR AML_CLKMSR_0_MEASURE[rip]
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	mov	rdi, rbp
	not	edx
	and	edx, ebx
	call	CSR_WRITE_4@PLT
	mov	esi, DWORD PTR AML_CLKMSR_0_REG[rip]
	mov	rdi, rbp
	call	CSR_BARRIER@PLT
	mov	esi, DWORD PTR AML_CLKMSR_2_REG[rip]
	mov	rdi, rbp
	call	CSR_READ_4@PLT
	mov	esi, DWORD PTR AML_CLKMSR_DURATION[rip]
	mov	ecx, DWORD PTR AML_CLKMSR_2_RESULT_SHIFT[rip]
	and	eax, DWORD PTR AML_CLKMSR_2_RESULT_MASK[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	edx, esi
	sar	eax, cl
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	shr	edx, 31
	add	edx, esi
	sar	edx
	add	eax, edx
	cdq
	idiv	esi
	ret
	.cfi_endproc
.LFE0:
	.size	aml8726_clkmsr_clock_frequency, .-aml8726_clkmsr_clock_frequency
	.comm	aml8726_clkmsr_clks,8,8
	.comm	AML_CLKMSR_NCLKS,4,4
	.comm	AML_CLKMSR_DURATION,4,4
	.comm	AML_CLKMSR_2_RESULT_SHIFT,4,4
	.comm	AML_CLKMSR_2_RESULT_MASK,4,4
	.comm	AML_CLKMSR_2_REG,4,4
	.comm	AML_CLKMSR_0_REG,4,4
	.comm	AML_CLKMSR_0_MUX_SHIFT,4,4
	.comm	AML_CLKMSR_0_MUX_EN,4,4
	.comm	AML_CLKMSR_0_MEASURE,4,4
	.comm	AML_CLKMSR_0_DURATION_SHIFT,4,4
	.comm	AML_CLKMSR_0_BUSY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_aml8726_clkmsr.c_aml8726_clkmsr_clock_frequency.c"
	.text
	.global	__aeabi_idiv
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	aml8726_clkmsr_clock_frequency, %function
aml8726_clkmsr_clock_frequency:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, .L12
	ldr	r3, [r3]
	cmp	r3, r1
	bhi	.L11
	mov	r0, #0
	bx	lr
.L11:
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r0
	mov	r6, r1
	ldr	r5, .L12+4
	mov	r2, #0
	ldr	r1, [r5]
	bl	CSR_WRITE_4
	ldr	r1, [r5]
	mov	r0, r4
	bl	CSR_BARRIER
	ldr	r8, .L12+8
	ldr	r1, .L12+12
	ldr	r7, .L12+16
	ldr	r9, [r1]
	ldr	r2, .L12+20
	ldr	r1, [r8]
	ldr	r0, .L12+24
	ldr	r3, [r7]
	ldr	r0, [r0]
	ldr	r2, [r2]
	orr	r9, r9, r1
	ldr	r1, .L12+28
	sub	r3, r3, #1
	ldr	r2, [r2, r6, lsl #2]
	orr	r9, r9, r3, lsl r0
	ldr	r3, [r1]
	mov	r0, r4
	orr	r9, r9, r2, lsl r3
	mov	r2, r9
	ldr	r1, [r5]
	bl	CSR_WRITE_4
	mov	r0, r4
	ldr	r1, [r5]
	bl	CSR_BARRIER
	ldr	r6, .L12+32
	b	.L3
.L4:
	bl	cpu_spinwait
.L3:
	mov	r0, r4
	ldr	r1, [r5]
	bl	CSR_READ_4
	ldr	r3, [r6]
	tst	r0, r3
	bne	.L4
	ldr	r2, [r8]
	ldr	r1, [r5]
	bic	r2, r9, r2
	mov	r0, r4
	bl	CSR_WRITE_4
	ldr	r1, [r5]
	mov	r0, r4
	bl	CSR_BARRIER
	ldr	r3, .L12+36
	mov	r0, r4
	ldr	r1, [r3]
	bl	CSR_READ_4
	ldr	r3, .L12+40
	ldr	r1, [r7]
	ldr	r2, .L12+44
	ldr	ip, [r3]
	ldr	r2, [r2]
	add	r3, r1, r1, lsr #31
	and	r0, r0, ip
	asr	r3, r3, #1
	add	r0, r3, r0, asr r2
	bl	__aeabi_idiv
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L13:
	.align	2
.L12:
	.word	AML_CLKMSR_NCLKS
	.word	AML_CLKMSR_0_REG
	.word	AML_CLKMSR_0_MEASURE
	.word	AML_CLKMSR_0_MUX_EN
	.word	AML_CLKMSR_DURATION
	.word	aml8726_clkmsr_clks
	.word	AML_CLKMSR_0_DURATION_SHIFT
	.word	AML_CLKMSR_0_MUX_SHIFT
	.word	AML_CLKMSR_0_BUSY
	.word	AML_CLKMSR_2_REG
	.word	AML_CLKMSR_2_RESULT_MASK
	.word	AML_CLKMSR_2_RESULT_SHIFT
	.size	aml8726_clkmsr_clock_frequency, .-aml8726_clkmsr_clock_frequency
	.comm	aml8726_clkmsr_clks,4,4
	.comm	AML_CLKMSR_NCLKS,4,4
	.comm	AML_CLKMSR_DURATION,4,4
	.comm	AML_CLKMSR_2_RESULT_SHIFT,4,4
	.comm	AML_CLKMSR_2_RESULT_MASK,4,4
	.comm	AML_CLKMSR_2_REG,4,4
	.comm	AML_CLKMSR_0_REG,4,4
	.comm	AML_CLKMSR_0_MUX_SHIFT,4,4
	.comm	AML_CLKMSR_0_MUX_EN,4,4
	.comm	AML_CLKMSR_0_MEASURE,4,4
	.comm	AML_CLKMSR_0_DURATION_SHIFT,4,4
	.comm	AML_CLKMSR_0_BUSY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
