	.file	"extr_perf_event_intel_uncore.c_nhmex_mbox_hw_config.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	nhmex_mbox_hw_config, @function
nhmex_mbox_hw_config:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15, rsi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR [rdi]
	xor	edi, edi
	cmp	DWORD PTR 32[rsi], -1
	setne	dil
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR 8[rsp], rax
	call	WARN_ON_ONCE@PLT
	test	rax, rax
	jne	.L22
	mov	r14, QWORD PTR nhmex_uncore_mbox_extra_regs[rip]
	xor	ebp, ebp
	mov	ecx, DWORD PTR [r14]
	test	ecx, ecx
	jne	.L4
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L24:
	lea	r13d, 0[0+rbp*8]
	mov	edx, ebp
	mov	eax, 255
	add	ebp, 1
	mov	ecx, r13d
	sal	edx, 4
	mov	esi, 65535
	sal	eax, cl
	mov	ecx, edx
	mov	DWORD PTR 4[rsp], edx
	sal	esi, cl
	not	eax
	mov	ecx, esi
	not	ecx
.L12:
	and	DWORD PTR 36[r15], ecx
	mov	rdi, r14
	and	DWORD PTR 32[r15], eax
	call	nhmex_mbox_extra_reg_idx@PLT
	mov	ecx, r13d
	sal	eax, cl
	movzx	ecx, BYTE PTR 4[rsp]
	or	DWORD PTR 32[r15], eax
	movsx	rax, DWORD PTR [r15]
	sal	ebx, cl
	or	DWORD PTR 36[r15], ebx
	mov	QWORD PTR 40[r15], rax
.L7:
	mov	eax, DWORD PTR 20[r14]
	add	r14, 20
	test	eax, eax
	je	.L13
.L4:
	mov	eax, DWORD PTR 8[r15]
	and	eax, DWORD PTR 8[r14]
	cmp	DWORD PTR 4[r14], eax
	jne	.L7
	mov	eax, DWORD PTR 12[r14]
	not	eax
	test	DWORD PTR [r15], eax
	jne	.L22
	mov	edi, DWORD PTR 32[r15]
	mov	ebx, DWORD PTR 16[r14]
	xor	esi, esi
	mov	edx, 8
	call	__BITS_VALUE@PLT
	cmp	ebx, eax
	je	.L7
	mov	edi, DWORD PTR 32[r15]
	mov	ebx, DWORD PTR 16[r14]
	mov	edx, 8
	mov	esi, 1
	call	__BITS_VALUE@PLT
	cmp	ebx, eax
	je	.L7
	xor	edi, edi
	cmp	ebp, 1
	setg	dil
	call	WARN_ON_ONCE@PLT
	test	rax, rax
	jne	.L22
	mov	rax, QWORD PTR [r12]
	mov	edi, 1
	mov	ebx, DWORD PTR [rax]
	mov	rax, QWORD PTR 8[rsp]
	imul	ebx, DWORD PTR [rax]
	add	ebx, DWORD PTR [r14]
	cmp	ebx, 65534
	ja	.L10
	xor	edi, edi
	cmp	DWORD PTR 16[r14], 254
	setg	dil
.L10:
	call	WARN_ON_ONCE@PLT
	test	rax, rax
	jne	.L22
	mov	eax, DWORD PTR EXTRA_REG_NHMEX_M_PLD[rip]
	cmp	DWORD PTR 16[r14], eax
	jne	.L24
	mov	ebp, 2
	mov	ecx, 65535
	mov	eax, -65281
	mov	DWORD PTR 4[rsp], 16
	mov	r13d, 8
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L22:
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	eax, DWORD PTR EXTRA_REG_NHMEX_M_FILTER[rip]
	mov	rdx, -1
	mov	DWORD PTR 16[r15], eax
	movsx	rax, DWORD PTR 4[r15]
	test	DWORD PTR NHMEX_M_PMON_MM_CFG_EN[rip], eax
	cmove	rax, rdx
	mov	QWORD PTR 24[r15], rax
	mov	rax, QWORD PTR [r12]
	mov	edx, DWORD PTR [rax]
	test	edx, edx
	jne	.L14
	mov	eax, DWORD PTR NHMEX_M0_MSR_PMU_MM_CFG[rip]
	mov	DWORD PTR 20[r15], eax
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L14:
	.cfi_restore_state
	mov	eax, DWORD PTR NHMEX_M1_MSR_PMU_MM_CFG[rip]
	mov	DWORD PTR 20[r15], eax
	add	rsp, 24
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	nhmex_mbox_hw_config, .-nhmex_mbox_hw_config
	.comm	nhmex_uncore_mbox_extra_regs,8,8
	.comm	NHMEX_M_PMON_MM_CFG_EN,4,4
	.comm	NHMEX_M1_MSR_PMU_MM_CFG,4,4
	.comm	NHMEX_M0_MSR_PMU_MM_CFG,4,4
	.comm	EXTRA_REG_NHMEX_M_PLD,4,4
	.comm	EXTRA_REG_NHMEX_M_FILTER,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_perf_event_intel_uncore.c_nhmex_mbox_hw_config.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nhmex_mbox_hw_config, %function
nhmex_mbox_hw_config:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r8, r0
	ldr	r0, [r1, #32]
	ldr	r2, [r8]
	adds	r0, r0, #1
	movne	r0, #1
	sub	sp, sp, #12
	mov	r10, r1
	ldr	r9, [r2, #4]
	bl	WARN_ON_ONCE
	subs	r3, r0, #0
	str	r3, [sp, #4]
	bne	.L20
	ldr	r2, .L24
	ldr	r4, [r2]
	ldr	r2, [r4]
	cmp	r2, #0
	beq	.L14
	ldr	r6, [sp, #4]
	ldr	fp, .L24+4
	b	.L13
.L22:
	mov	r1, #255
	ldr	r3, .L24+8
	lsl	r2, r6, #3
	lsl	r7, r6, #4
	mvn	r0, r1, lsl r2
	mvn	ip, r3, lsl r7
	add	r6, r6, #1
.L12:
	ldr	r1, [r10, #32]
	ldr	r3, [r10, #36]
	and	r1, r1, r0
	and	r3, r3, ip
	str	r1, [r10, #32]
	str	r3, [r10, #36]
	mov	r0, r4
	str	r2, [sp]
	bl	nhmex_mbox_extra_reg_idx
	mov	lr, r0
	ldr	r0, [r10]
	ldr	ip, [r10, #32]
	ldr	r3, [r10, #36]
	ldr	r2, [sp]
	asr	r1, r0, #31
	str	r0, [r10, #40]
	str	r1, [r10, #44]
	orr	r2, ip, lr, lsl r2
	orr	r5, r3, r5, lsl r7
	str	r2, [r10, #32]
	str	r5, [r10, #36]
.L7:
	ldr	r3, [r4, #20]!
	cmp	r3, #0
	beq	.L14
.L13:
	ldr	r3, [r10, #8]
	ldr	r1, [r4, #8]
	ldr	r2, [r4, #4]
	and	r3, r3, r1
	cmp	r2, r3
	bne	.L7
	ldr	r3, [r4, #12]
	ldr	r1, [r10]
	bics	r1, r1, r3
	bne	.L20
	mov	r2, #8
	ldr	r0, [r10, #32]
	ldr	r5, [r4, #16]
	bl	__BITS_VALUE
	cmp	r5, r0
	beq	.L7
	mov	r2, #8
	mov	r1, #1
	ldr	r0, [r10, #32]
	ldr	r5, [r4, #16]
	bl	__BITS_VALUE
	cmp	r5, r0
	beq	.L7
	cmp	r6, #1
	movle	r0, #0
	movgt	r0, #1
	bl	WARN_ON_ONCE
	cmp	r0, #0
	bne	.L20
	ldr	r3, [r8]
	ldr	r2, [r9]
	ldr	r5, [r3]
	ldr	r3, [r4]
	mla	r5, r2, r5, r3
	ldr	r3, .L24+12
	cmp	r5, r3
	movhi	r0, #1
	bhi	.L10
	ldr	r0, [r4, #16]
	cmp	r0, #254
	movle	r0, #0
	movgt	r0, #1
.L10:
	bl	WARN_ON_ONCE
	cmp	r0, #0
	bne	.L20
	ldr	r2, [r4, #16]
	ldr	r3, [fp]
	cmp	r2, r3
	bne	.L22
	mov	r6, #2
	mov	r7, #16
	mvn	r0, #65280
	mov	r2, #8
	ldr	ip, .L24+8
	b	.L12
.L20:
	ldr	r3, .L24+16
	ldr	r7, [r3]
	rsb	r3, r7, #0
	str	r3, [sp, #4]
	ldr	r0, [sp, #4]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L14:
	ldr	r1, .L24+20
	ldr	r2, .L24+24
	ldr	r1, [r1]
	ldr	r0, [r10, #4]
	ldr	r2, [r2]
	tst	r0, r1
	mvneq	r0, #0
	mvneq	r1, #0
	str	r2, [r10, #16]
	bne	.L23
.L6:
	ldr	r2, [r8]
	str	r0, [r10, #24]
	str	r1, [r10, #28]
	ldr	r2, [r2]
	ldr	r0, [sp, #4]
	cmp	r2, #0
	ldreq	r2, .L24+28
	ldrne	r2, .L24+32
	ldr	r2, [r2]
	str	r2, [r10, #20]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L23:
	asr	r1, r0, #31
	b	.L6
.L25:
	.align	2
.L24:
	.word	nhmex_uncore_mbox_extra_regs
	.word	EXTRA_REG_NHMEX_M_PLD
	.word	65535
	.word	65534
	.word	EINVAL
	.word	NHMEX_M_PMON_MM_CFG_EN
	.word	EXTRA_REG_NHMEX_M_FILTER
	.word	NHMEX_M0_MSR_PMU_MM_CFG
	.word	NHMEX_M1_MSR_PMU_MM_CFG
	.size	nhmex_mbox_hw_config, .-nhmex_mbox_hw_config
	.comm	nhmex_uncore_mbox_extra_regs,4,4
	.comm	NHMEX_M_PMON_MM_CFG_EN,4,4
	.comm	NHMEX_M1_MSR_PMU_MM_CFG,4,4
	.comm	NHMEX_M0_MSR_PMU_MM_CFG,4,4
	.comm	EXTRA_REG_NHMEX_M_PLD,4,4
	.comm	EXTRA_REG_NHMEX_M_FILTER,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
