	.file	"extr_jit.c_shl_reg64_lt32_high.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	shl_reg64_lt32_high, @function
shl_reg64_lt32_high:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	mov	rdi, rdx
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	reg_b@PLT
	mov	edi, 32
	mov	r14d, DWORD PTR ALU_OP_SUB[rip]
	mov	r13d, eax
	call	reg_imm@PLT
	mov	rdi, rbp
	mov	r12d, eax
	call	imm_both@PLT
	mov	r8d, r13d
	mov	ecx, r14d
	mov	edx, r12d
	mov	esi, eax
	mov	rdi, rbp
	call	emit_alu@PLT
	xor	edi, edi
	call	reg_imm@PLT
	mov	rdi, rbp
	mov	r14d, DWORD PTR ALU_OP_OR[rip]
	mov	r13d, eax
	call	imm_a@PLT
	mov	r12d, eax
	xor	eax, eax
	call	reg_none@PLT
	mov	r8d, r13d
	mov	ecx, r14d
	mov	edx, r12d
	mov	esi, eax
	mov	rdi, rbp
	lea	r12, 1[rbx]
	call	emit_alu@PLT
	mov	r9d, DWORD PTR SHF_SC_R_DSHF[rip]
	mov	rdi, rbx
	mov	DWORD PTR 12[rsp], r9d
	call	reg_b@PLT
	mov	rdi, r12
	mov	r15d, DWORD PTR SHF_OP_NONE[rip]
	mov	r14d, eax
	call	reg_a@PLT
	mov	rdi, r12
	mov	r13d, eax
	call	reg_both@PLT
	mov	r9d, DWORD PTR 12[rsp]
	mov	r8d, r14d
	mov	ecx, r15d
	add	rsp, 24
	.cfi_def_cfa_offset 56
	mov	edx, r13d
	mov	rdi, rbp
	mov	esi, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	emit_shf_indir@PLT
	.cfi_endproc
.LFE0:
	.size	shl_reg64_lt32_high, .-shl_reg64_lt32_high
	.comm	SHF_SC_R_DSHF,4,4
	.comm	SHF_OP_NONE,4,4
	.comm	ALU_OP_SUB,4,4
	.comm	ALU_OP_OR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_jit.c_shl_reg64_lt32_high.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	shl_reg64_lt32_high, %function
shl_reg64_lt32_high:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	sub	sp, sp, #8
	mov	r5, r1
	mov	r8, r2
	mov	r4, r0
	bl	imm_both
	mov	r6, r0
	mov	r0, #32
	bl	reg_imm
	ldr	r3, .L4
	mov	r7, r0
	mov	r0, r8
	ldr	r8, [r3]
	bl	reg_b
	mov	r2, r7
	mov	r1, r6
	mov	r3, r8
	str	r0, [sp]
	mov	r0, r4
	bl	emit_alu
	bl	reg_none
	mov	r6, r0
	mov	r0, r4
	bl	imm_a
	ldr	r3, .L4+4
	mov	r7, r0
	mov	r0, #0
	ldr	r8, [r3]
	bl	reg_imm
	mov	r1, r6
	mov	r3, r8
	mov	r2, r7
	str	r0, [sp]
	add	r7, r5, #1
	mov	r0, r4
	bl	emit_alu
	mov	r0, r7
	bl	reg_both
	mov	r6, r0
	mov	r0, r7
	bl	reg_a
	mov	r2, r0
	ldr	r3, .L4+8
	mov	r0, r5
	ldr	r7, [r3]
	mov	r5, r2
	bl	reg_b
	mov	lr, r0
	ldr	r2, .L4+12
	mov	r3, r7
	ldr	ip, [r2]
	mov	r1, r6
	mov	r2, r5
	mov	r0, r4
	str	lr, [sp]
	str	ip, [sp, #4]
	bl	emit_shf_indir
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L5:
	.align	2
.L4:
	.word	ALU_OP_SUB
	.word	ALU_OP_OR
	.word	SHF_OP_NONE
	.word	SHF_SC_R_DSHF
	.size	shl_reg64_lt32_high, .-shl_reg64_lt32_high
	.comm	SHF_SC_R_DSHF,4,4
	.comm	SHF_OP_NONE,4,4
	.comm	ALU_OP_SUB,4,4
	.comm	ALU_OP_OR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
