	.file	"extr_amdgpu_vm.c_amdgpu_vm_make_compute.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CPU"
.LC1:
	.string	"SDMA"
.LC2:
	.string	"VM update mode is %s\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC3:
	.string	"CPU update of VM recommended only for large BAR system\n"
	.text
	.p2align 4
	.globl	amdgpu_vm_make_compute
	.type	amdgpu_vm_make_compute, @function
amdgpu_vm_make_compute:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, edx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	r13, QWORD PTR [rdi]
	mov	rdi, QWORD PTR 16[rsi]
	mov	esi, 1
	mov	r14, QWORD PTR CHIP_RAVEN[rip]
	call	amdgpu_bo_reserve@PLT
	mov	r15d, eax
	test	eax, eax
	je	.L29
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L29:
	.cfi_restore_state
	mov	rsi, rbx
	mov	rdi, rbp
	call	amdgpu_vm_check_clean_reserved@PLT
	mov	r15d, eax
	test	eax, eax
	jne	.L3
	test	r12d, r12d
	jne	.L4
.L7:
	xor	eax, eax
	cmp	r13, r14
	sete	al
	cmp	DWORD PTR [rbx], eax
	je	.L6
	mov	DWORD PTR [rbx], eax
	mov	rdx, QWORD PTR 16[rbx]
	mov	rsi, rbx
	mov	rdi, rbp
	call	amdgpu_vm_clear_bo@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L6
	test	r12d, r12d
	jne	.L8
.L27:
	mov	r15d, r13d
.L3:
	mov	rdi, QWORD PTR 16[rbx]
	call	amdgpu_bo_unreserve@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L6:
	mov	eax, DWORD PTR 8[rbp]
	xor	edx, edx
	and	eax, DWORD PTR AMDGPU_VM_USE_CPU_FOR_COMPUTE[rip]
	lea	rsi, .LC0[rip]
	setne	dl
	lea	rax, .LC1[rip]
	lea	rdi, .LC2[rip]
	mov	DWORD PTR 4[rbx], edx
	cmove	rsi, rax
	call	DRM_DEBUG_DRIVER@PLT
	mov	edi, DWORD PTR 4[rbx]
	test	edi, edi
	jne	.L30
.L10:
	lea	rsi, .LC3[rip]
	call	WARN_ONCE@PLT
	mov	eax, DWORD PTR 4[rbx]
	lea	rdx, amdgpu_vm_sdma_funcs[rip]
	mov	rdi, QWORD PTR 24[rbx]
	test	eax, eax
	lea	rax, amdgpu_vm_cpu_funcs[rip]
	cmove	rax, rdx
	mov	QWORD PTR 32[rbx], rax
	call	dma_fence_put@PLT
	mov	edx, DWORD PTR 8[rbx]
	mov	QWORD PTR 24[rbx], 0
	test	edx, edx
	jne	.L31
.L12:
	mov	rdi, QWORD PTR 16[rbx]
	call	amdgpu_bo_unref@PLT
	test	r12d, r12d
	je	.L3
	mov	DWORD PTR 8[rbx], r12d
	mov	rdi, QWORD PTR 16[rbx]
	call	amdgpu_bo_unreserve@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L31:
	lea	r13, 12[rbp]
	xor	r14d, r14d
	mov	rsi, r14
	mov	rdi, r13
	call	spin_lock_irqsave@PLT
	mov	esi, DWORD PTR 8[rbx]
	lea	rdi, 16[rbp]
	call	idr_remove@PLT
	mov	rsi, r14
	mov	rdi, r13
	call	spin_unlock_irqrestore@PLT
	mov	edi, DWORD PTR 8[rbx]
	call	amdgpu_pasid_free@PLT
	mov	DWORD PTR 8[rbx], 0
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L30:
	lea	rdi, 20[rbp]
	call	amdgpu_gmc_vram_full_visible@PLT
	xor	edi, edi
	test	eax, eax
	sete	dil
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L4:
	lea	r10, 12[rbp]
	xor	r11d, r11d
	mov	rsi, r11
	mov	rdi, r10
	mov	QWORD PTR 8[rsp], r10
	call	spin_lock_irqsave@PLT
	lea	ecx, 1[r12]
	mov	edx, r12d
	mov	rsi, rbx
	mov	r8d, DWORD PTR GFP_ATOMIC[rip]
	lea	rdi, 16[rbp]
	call	idr_alloc@PLT
	mov	r10, QWORD PTR 8[rsp]
	xor	r11d, r11d
	mov	rsi, r11
	mov	DWORD PTR 4[rsp], eax
	mov	rdi, r10
	call	spin_unlock_irqrestore@PLT
	mov	eax, DWORD PTR ENOSPC[rip]
	neg	eax
	cmp	eax, DWORD PTR 4[rsp]
	jne	.L7
	mov	r15d, eax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L8:
	lea	r14, 12[rbp]
	xor	r15d, r15d
	mov	rsi, r15
	mov	rdi, r14
	call	spin_lock_irqsave@PLT
	lea	rdi, 16[rbp]
	mov	esi, r12d
	call	idr_remove@PLT
	mov	rsi, r15
	mov	rdi, r14
	call	spin_unlock_irqrestore@PLT
	jmp	.L27
	.cfi_endproc
.LFE0:
	.size	amdgpu_vm_make_compute, .-amdgpu_vm_make_compute
	.comm	amdgpu_vm_sdma_funcs,4,4
	.comm	amdgpu_vm_cpu_funcs,4,4
	.comm	GFP_ATOMIC,4,4
	.comm	ENOSPC,4,4
	.comm	CHIP_RAVEN,8,8
	.comm	AMDGPU_VM_USE_CPU_FOR_COMPUTE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amdgpu_vm.c_amdgpu_vm_make_compute.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"CPU\000"
	.align	2
.LC1:
	.ascii	"SDMA\000"
	.align	2
.LC2:
	.ascii	"VM update mode is %s\012\000"
	.align	2
.LC3:
	.ascii	"CPU update of VM recommended only for large BAR sys"
	.ascii	"tem\012\000"
	.text
	.align	2
	.global	amdgpu_vm_make_compute
	.syntax unified
	.arm
	.fpu softvfp
	.type	amdgpu_vm_make_compute, %function
amdgpu_vm_make_compute:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r6, r0
	ldr	r3, .L33
	ldr	r0, [r1, #12]
	mov	r4, r1
	sub	sp, sp, #20
	mov	r1, #1
	mov	r7, r2
	ldr	r8, [r6]
	ldr	r9, [r3]
	bl	amdgpu_bo_reserve
	subs	r5, r0, #0
	beq	.L30
	mov	r0, r5
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L30:
	mov	r1, r4
	mov	r0, r6
	bl	amdgpu_vm_check_clean_reserved
	subs	r5, r0, #0
	bne	.L3
	cmp	r7, #0
	bne	.L4
.L7:
	sub	r3, r8, r9
	clz	r3, r3
	ldr	r2, [r4]
	lsr	r3, r3, #5
	cmp	r2, r3
	beq	.L6
	mov	r1, r4
	mov	r0, r6
	ldr	r2, [r4, #12]
	str	r3, [r4]
	bl	amdgpu_vm_clear_bo
	subs	r8, r0, #0
	beq	.L6
	cmp	r7, #0
	moveq	r5, r8
	beq	.L3
	mov	r9, #0
	add	r5, r6, #8
	mov	r1, r9
	mov	r0, r5
	bl	spin_lock_irqsave
	mov	r1, r7
	add	r0, r6, #12
	bl	idr_remove
	mov	r1, r9
	mov	r0, r5
	mov	r5, r8
	bl	spin_unlock_irqrestore
	b	.L3
.L6:
	ldr	r2, .L33+4
	ldr	r3, [r6, #4]
	ldr	r2, [r2]
	ldr	r1, .L33+8
	and	r3, r3, r2
	cmp	r3, #0
	movne	r2, #1
	moveq	r2, #0
	ldr	r3, .L33+12
	ldr	r0, .L33+16
	moveq	r1, r3
	str	r2, [r4, #4]
	bl	DRM_DEBUG_DRIVER
	ldr	r0, [r4, #4]
	cmp	r0, #0
	bne	.L31
.L10:
	mov	r8, #0
	ldr	r1, .L33+20
	bl	WARN_ONCE
	ldr	r1, [r4, #4]
	ldr	r2, .L33+24
	cmp	r1, r8
	ldr	r3, .L33+28
	moveq	r3, r2
	ldr	r0, [r4, #16]
	str	r3, [r4, #20]
	bl	dma_fence_put
	ldr	r3, [r4, #8]
	str	r8, [r4, #16]
	cmp	r3, r8
	bne	.L32
.L12:
	ldr	r0, [r4, #12]
	bl	amdgpu_bo_unref
	cmp	r7, #0
	strne	r7, [r4, #8]
.L3:
	ldr	r0, [r4, #12]
	bl	amdgpu_bo_unreserve
	mov	r0, r5
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L32:
	add	r9, r6, #8
	mov	r1, r8
	mov	r0, r9
	bl	spin_lock_irqsave
	ldr	r1, [r4, #8]
	add	r0, r6, #12
	bl	idr_remove
	mov	r1, r8
	mov	r0, r9
	bl	spin_unlock_irqrestore
	ldr	r0, [r4, #8]
	bl	amdgpu_pasid_free
	str	r8, [r4, #8]
	b	.L12
.L31:
	add	r0, r6, #16
	bl	amdgpu_gmc_vram_full_visible
	clz	r0, r0
	lsr	r0, r0, #5
	b	.L10
.L4:
	mov	fp, #0
	add	r10, r6, #8
	mov	r1, fp
	mov	r0, r10
	bl	spin_lock_irqsave
	ldr	r2, .L33+32
	add	r3, r7, #1
	ldr	r1, [r2]
	add	r0, r6, #12
	mov	r2, r7
	str	r1, [sp]
	mov	r1, r4
	bl	idr_alloc
	mov	r1, fp
	str	r0, [sp, #12]
	mov	r0, r10
	bl	spin_unlock_irqrestore
	ldr	r3, .L33+36
	ldr	r2, [sp, #12]
	ldr	r3, [r3]
	cmn	r2, r3
	rsb	r3, r3, #0
	bne	.L7
	mov	r5, r3
	b	.L3
.L34:
	.align	2
.L33:
	.word	CHIP_RAVEN
	.word	AMDGPU_VM_USE_CPU_FOR_COMPUTE
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	amdgpu_vm_sdma_funcs
	.word	amdgpu_vm_cpu_funcs
	.word	GFP_ATOMIC
	.word	ENOSPC
	.size	amdgpu_vm_make_compute, .-amdgpu_vm_make_compute
	.comm	amdgpu_vm_sdma_funcs,4,4
	.comm	amdgpu_vm_cpu_funcs,4,4
	.comm	GFP_ATOMIC,4,4
	.comm	ENOSPC,4,4
	.comm	CHIP_RAVEN,4,4
	.comm	AMDGPU_VM_USE_CPU_FOR_COMPUTE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
