	.file	"extr_mt76x02_util.c_mt76x02_conf_tx.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	mt76x02_conf_tx
	.type	mt76x02_conf_tx, @function
mt76x02_conf_tx:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, 5
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rcx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	r12, QWORD PTR [rdi]
	mov	rdi, QWORD PTR 16[rcx]
	mov	rax, QWORD PTR [r12]
	mov	rax, QWORD PTR [rax+rdx*8]
	mov	ebp, DWORD PTR [rax]
	test	rdi, rdi
	jne	.L11
.L2:
	mov	rdi, QWORD PTR 8[r13]
	mov	DWORD PTR 12[rsp], 10
	test	rdi, rdi
	jne	.L12
.L3:
	mov	esi, DWORD PTR 0[r13]
	mov	edi, DWORD PTR MT_EDCA_CFG_TXOP[rip]
	call	FIELD_PREP@PLT
	mov	esi, DWORD PTR 4[r13]
	mov	edi, DWORD PTR MT_EDCA_CFG_AIFSN[rip]
	mov	ebx, eax
	call	FIELD_PREP@PLT
	mov	edi, DWORD PTR MT_EDCA_CFG_CWMIN[rip]
	mov	esi, r14d
	or	ebx, eax
	call	FIELD_PREP@PLT
	mov	esi, DWORD PTR 12[rsp]
	mov	edi, DWORD PTR MT_EDCA_CFG_CWMAX[rip]
	or	ebx, eax
	call	FIELD_PREP@PLT
	mov	edi, ebp
	or	ebx, eax
	call	MT_EDCA_CFG_AC@PLT
	mov	edx, ebx
	mov	rdi, r12
	mov	esi, eax
	call	mt76_wr@PLT
	mov	edi, ebp
	call	MT_WMM_TXOP@PLT
	mov	rdi, r12
	mov	esi, eax
	call	mt76_rr@PLT
	mov	edi, ebp
	mov	r15d, DWORD PTR MT_WMM_TXOP_MASK[rip]
	mov	ebx, eax
	call	MT_WMM_TXOP_SHIFT@PLT
	mov	edi, ebp
	mov	ecx, eax
	sal	r15d, cl
	not	r15d
	and	ebx, r15d
	mov	r15d, DWORD PTR 0[r13]
	call	MT_WMM_TXOP_SHIFT@PLT
	mov	edi, ebp
	mov	ecx, eax
	sal	r15d, cl
	call	MT_WMM_TXOP@PLT
	or	r15d, ebx
	mov	rdi, r12
	mov	edx, r15d
	mov	esi, eax
	call	mt76_wr@PLT
	mov	esi, DWORD PTR MT_WMM_AIFSN[rip]
	mov	rdi, r12
	call	mt76_rr@PLT
	mov	edi, ebp
	mov	ebx, DWORD PTR MT_WMM_AIFSN_MASK[rip]
	mov	r15d, eax
	call	MT_WMM_AIFSN_SHIFT@PLT
	mov	edi, ebp
	mov	ecx, eax
	sal	ebx, cl
	not	ebx
	and	r15d, ebx
	mov	ebx, DWORD PTR 4[r13]
	call	MT_WMM_AIFSN_SHIFT@PLT
	mov	esi, DWORD PTR MT_WMM_AIFSN[rip]
	mov	rdi, r12
	mov	ecx, eax
	sal	ebx, cl
	mov	edx, ebx
	or	edx, r15d
	call	mt76_wr@PLT
	mov	esi, DWORD PTR MT_WMM_CWMIN[rip]
	mov	rdi, r12
	call	mt76_rr@PLT
	mov	edi, ebp
	mov	r15d, DWORD PTR MT_WMM_CWMIN_MASK[rip]
	mov	ebx, eax
	call	MT_WMM_CWMIN_SHIFT@PLT
	mov	edi, ebp
	mov	ecx, eax
	sal	r15d, cl
	mov	edx, r15d
	not	edx
	and	ebx, edx
	call	MT_WMM_CWMIN_SHIFT@PLT
	mov	esi, DWORD PTR MT_WMM_CWMIN[rip]
	mov	rdi, r12
	mov	ecx, eax
	sal	r14d, cl
	mov	edx, r14d
	or	edx, ebx
	call	mt76_wr@PLT
	mov	esi, DWORD PTR MT_WMM_CWMAX[rip]
	mov	rdi, r12
	call	mt76_rr@PLT
	mov	edi, ebp
	mov	ebx, DWORD PTR MT_WMM_CWMAX_MASK[rip]
	mov	r15d, eax
	call	MT_WMM_CWMAX_SHIFT@PLT
	mov	edi, ebp
	mov	ecx, eax
	sal	ebx, cl
	call	MT_WMM_CWMAX_SHIFT@PLT
	mov	edx, DWORD PTR 12[rsp]
	not	ebx
	mov	rdi, r12
	mov	ecx, eax
	and	ebx, r15d
	mov	esi, DWORD PTR MT_WMM_CWMAX[rip]
	sal	edx, cl
	or	edx, ebx
	call	mt76_wr@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	call	fls@PLT
	mov	r14d, eax
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L12:
	call	fls@PLT
	mov	DWORD PTR 12[rsp], eax
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	mt76x02_conf_tx, .-mt76x02_conf_tx
	.comm	MT_WMM_TXOP_MASK,4,4
	.comm	MT_WMM_CWMIN_MASK,4,4
	.comm	MT_WMM_CWMIN,4,4
	.comm	MT_WMM_CWMAX_MASK,4,4
	.comm	MT_WMM_CWMAX,4,4
	.comm	MT_WMM_AIFSN_MASK,4,4
	.comm	MT_WMM_AIFSN,4,4
	.comm	MT_EDCA_CFG_TXOP,4,4
	.comm	MT_EDCA_CFG_CWMIN,4,4
	.comm	MT_EDCA_CFG_CWMAX,4,4
	.comm	MT_EDCA_CFG_AIFSN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mt76x02_util.c_mt76x02_conf_tx.c"
	.text
	.align	2
	.global	mt76x02_conf_tx
	.syntax unified
	.arm
	.fpu softvfp
	.type	mt76x02_conf_tx, %function
mt76x02_conf_tx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r5, [r0]
	mov	r7, r3
	ldr	r0, [r3, #12]
	ldr	r3, [r5]
	cmp	r0, #0
	ldr	r3, [r3, r2, lsl #2]
	moveq	r9, #5
	ldr	r4, [r3]
	bne	.L8
	ldr	r0, [r7, #8]
	cmp	r0, #0
	moveq	r8, #10
	bne	.L9
.L3:
	ldr	r3, .L10
	ldr	r1, [r7]
	ldr	r0, [r3]
	bl	FIELD_PREP
	ldr	r3, .L10+4
	ldr	r1, [r7, #4]
	mov	r6, r0
	ldr	r0, [r3]
	bl	FIELD_PREP
	mov	r2, r0
	ldr	r3, .L10+8
	mov	r1, r9
	ldr	r0, [r3]
	orr	r6, r6, r2
	bl	FIELD_PREP
	mov	r2, r0
	ldr	r3, .L10+12
	mov	r1, r8
	ldr	r0, [r3]
	orr	r6, r6, r2
	bl	FIELD_PREP
	mov	r2, r0
	mov	r0, r4
	orr	r6, r6, r2
	bl	MT_EDCA_CFG_AC
	mov	r2, r6
	mov	r1, r0
	mov	r0, r5
	bl	mt76_wr
	mov	r0, r4
	bl	MT_WMM_TXOP
	mov	r1, r0
	mov	r0, r5
	bl	mt76_rr
	ldr	r3, .L10+16
	mov	r6, r0
	mov	r0, r4
	ldr	r10, [r3]
	bl	MT_WMM_TXOP_SHIFT
	mov	r2, r0
	mov	r0, r4
	bic	r6, r6, r10, lsl r2
	ldr	fp, [r7]
	bl	MT_WMM_TXOP_SHIFT
	orr	r6, r6, fp, lsl r0
	mov	r0, r4
	bl	MT_WMM_TXOP
	ldr	r10, .L10+20
	mov	r2, r6
	mov	r1, r0
	mov	r0, r5
	bl	mt76_wr
	ldr	r1, [r10]
	mov	r0, r5
	bl	mt76_rr
	ldr	r3, .L10+24
	mov	r6, r0
	mov	r0, r4
	ldr	fp, [r3]
	bl	MT_WMM_AIFSN_SHIFT
	mov	r2, r0
	mov	r0, r4
	bic	r6, r6, fp, lsl r2
	ldr	r7, [r7, #4]
	bl	MT_WMM_AIFSN_SHIFT
	ldr	fp, .L10+28
	orr	r2, r6, r7, lsl r0
	ldr	r1, [r10]
	mov	r0, r5
	bl	mt76_wr
	ldr	r1, [fp]
	mov	r0, r5
	bl	mt76_rr
	ldr	r3, .L10+32
	mov	r6, r0
	mov	r0, r4
	ldr	r7, [r3]
	bl	MT_WMM_CWMIN_SHIFT
	mov	r2, r0
	mov	r0, r4
	bic	r6, r6, r7, lsl r2
	bl	MT_WMM_CWMIN_SHIFT
	ldr	r7, .L10+36
	orr	r2, r6, r9, lsl r0
	ldr	r1, [fp]
	mov	r0, r5
	bl	mt76_wr
	ldr	r1, [r7]
	mov	r0, r5
	bl	mt76_rr
	ldr	r3, .L10+40
	mov	r6, r0
	mov	r0, r4
	ldr	r9, [r3]
	bl	MT_WMM_CWMAX_SHIFT
	mov	r2, r0
	mov	r0, r4
	bic	r6, r6, r9, lsl r2
	bl	MT_WMM_CWMAX_SHIFT
	ldr	r1, [r7]
	orr	r2, r6, r8, lsl r0
	mov	r0, r5
	bl	mt76_wr
	mov	r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
	bl	fls
	mov	r9, r0
	ldr	r0, [r7, #8]
	cmp	r0, #0
	moveq	r8, #10
	beq	.L3
.L9:
	bl	fls
	mov	r8, r0
	b	.L3
.L11:
	.align	2
.L10:
	.word	MT_EDCA_CFG_TXOP
	.word	MT_EDCA_CFG_AIFSN
	.word	MT_EDCA_CFG_CWMIN
	.word	MT_EDCA_CFG_CWMAX
	.word	MT_WMM_TXOP_MASK
	.word	MT_WMM_AIFSN
	.word	MT_WMM_AIFSN_MASK
	.word	MT_WMM_CWMIN
	.word	MT_WMM_CWMIN_MASK
	.word	MT_WMM_CWMAX
	.word	MT_WMM_CWMAX_MASK
	.size	mt76x02_conf_tx, .-mt76x02_conf_tx
	.comm	MT_WMM_TXOP_MASK,4,4
	.comm	MT_WMM_CWMIN_MASK,4,4
	.comm	MT_WMM_CWMIN,4,4
	.comm	MT_WMM_CWMAX_MASK,4,4
	.comm	MT_WMM_CWMAX,4,4
	.comm	MT_WMM_AIFSN_MASK,4,4
	.comm	MT_WMM_AIFSN,4,4
	.comm	MT_EDCA_CFG_TXOP,4,4
	.comm	MT_EDCA_CFG_CWMIN,4,4
	.comm	MT_EDCA_CFG_CWMAX,4,4
	.comm	MT_EDCA_CFG_AIFSN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
