	.file	"extr_radeon_legacy_tv.c_radeon_legacy_tv_adjust_pll2.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	radeon_legacy_tv_adjust_pll2
	.type	radeon_legacy_tv_adjust_pll2, @function
radeon_legacy_tv_adjust_pll2:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12, rdx
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rcx
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, r8
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	to_radeon_encoder@PLT
	xor	esi, esi
	mov	rdi, rax
	call	radeon_legacy_tv_get_std_mode@PLT
	test	rax, rax
	je	.L1
	mov	edx, DWORD PTR [rax]
	and	edx, 7
	mov	DWORD PTR 0[r13], edx
	mov	edx, DWORD PTR 4[rax]
	mov	DWORD PTR [r12], edx
	mov	edi, DWORD PTR 12[rax]
	mov	r12d, DWORD PTR 8[rax]
	call	get_post_div@PLT
	and	r12d, 2047
	sal	eax, 16
	or	eax, r12d
	mov	DWORD PTR 0[rbp], eax
	mov	eax, DWORD PTR RADEON_PIX2CLK_SRC_SEL_MASK[rip]
	not	eax
	and	eax, DWORD PTR [rbx]
	mov	DWORD PTR [rbx], eax
	mov	edx, DWORD PTR RADEON_PIX2CLK_SRC_SEL_P2PLLCLK[rip]
	or	edx, DWORD PTR RADEON_PIXCLK_TV_SRC_SEL[rip]
	or	eax, edx
	mov	DWORD PTR [rbx], eax
.L1:
	add	rsp, 8
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	radeon_legacy_tv_adjust_pll2, .-radeon_legacy_tv_adjust_pll2
	.comm	RADEON_PIXCLK_TV_SRC_SEL,4,4
	.comm	RADEON_PIX2CLK_SRC_SEL_P2PLLCLK,4,4
	.comm	RADEON_PIX2CLK_SRC_SEL_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_radeon_legacy_tv.c_radeon_legacy_tv_adjust_pll2.c"
	.text
	.align	2
	.global	radeon_legacy_tv_adjust_pll2
	.syntax unified
	.arm
	.fpu softvfp
	.type	radeon_legacy_tv_adjust_pll2, %function
radeon_legacy_tv_adjust_pll2:
	@ args = 4, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r5, [sp, #24]
	mov	r7, r1
	mov	r4, r2
	mov	r6, r3
	bl	to_radeon_encoder
	mov	r1, #0
	bl	radeon_legacy_tv_get_std_mode
	cmp	r0, #0
	popeq	{r4, r5, r6, r7, r8, pc}
	ldr	r3, [r0]
	and	r3, r3, #7
	str	r3, [r7]
	ldr	r3, [r0, #4]
	str	r3, [r4]
	ldr	r4, [r0, #8]
	ldr	r0, [r0, #12]
	bl	get_post_div
	lsl	r4, r4, #21
	lsr	r4, r4, #21
	ldr	r3, .L8
	orr	r4, r4, r0, lsl #16
	str	r4, [r6]
	ldr	r2, [r3]
	ldr	r3, [r5]
	ldr	r0, .L8+4
	bic	r2, r3, r2
	ldr	r1, .L8+8
	str	r2, [r5]
	ldr	r3, [r0]
	ldr	r1, [r1]
	orr	r3, r3, r1
	orr	r3, r3, r2
	str	r3, [r5]
	pop	{r4, r5, r6, r7, r8, pc}
.L9:
	.align	2
.L8:
	.word	RADEON_PIX2CLK_SRC_SEL_MASK
	.word	RADEON_PIX2CLK_SRC_SEL_P2PLLCLK
	.word	RADEON_PIXCLK_TV_SRC_SEL
	.size	radeon_legacy_tv_adjust_pll2, .-radeon_legacy_tv_adjust_pll2
	.comm	RADEON_PIXCLK_TV_SRC_SEL,4,4
	.comm	RADEON_PIX2CLK_SRC_SEL_P2PLLCLK,4,4
	.comm	RADEON_PIX2CLK_SRC_SEL_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
