	.file	"extr_smc91c92_cs.c_smc_reset.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"smc91c92 reset called.\n"
	.text
	.p2align 4
	.type	smc_reset, @function
smc_reset:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebp, DWORD PTR [rdi]
	call	netdev_priv@PLT
	lea	rsi, .LC0[rip]
	mov	rdi, r12
	mov	r13, rax
	call	netdev_dbg@PLT
	xor	edi, edi
	call	SMC_SELECT_BANK@PLT
	mov	rsi, QWORD PTR RCR[rip]
	mov	edi, DWORD PTR RCR_SOFTRESET[rip]
	add	rsi, rbp
	call	outw@PLT
	mov	edi, 10
	call	udelay@PLT
	mov	rsi, QWORD PTR RCR[rip]
	mov	edi, DWORD PTR RCR_CLEAR[rip]
	add	rsi, rbp
	call	outw@PLT
	mov	rsi, QWORD PTR TCR[rip]
	mov	edi, DWORD PTR TCR_CLEAR[rip]
	add	rsi, rbp
	call	outw@PLT
	mov	edi, 1
	call	SMC_SELECT_BANK@PLT
	mov	rsi, QWORD PTR CONTROL[rip]
	mov	edi, DWORD PTR CTL_AUTO_RELEASE[rip]
	or	edi, DWORD PTR CTL_TE_ENABLE[rip]
	or	edi, DWORD PTR CTL_CR_ENABLE[rip]
	add	rsi, rbp
	call	outw@PLT
	mov	esi, DWORD PTR 4[r12]
	mov	rdi, r12
	call	smc_set_xcvr@PLT
	mov	rax, QWORD PTR MANFID_OSITECH[rip]
	cmp	QWORD PTR 0[r13], rax
	je	.L15
.L2:
	xor	ebx, ebx
.L4:
	mov	rax, QWORD PTR 8[r12]
	lea	rdx, 1[rbx]
	mov	rsi, QWORD PTR ADDR0[rip]
	mov	edi, DWORD PTR [rax+rdx*4]
	add	rsi, rbp
	add	rsi, rbx
	add	rbx, 2
	sal	edi, 8
	add	edi, DWORD PTR -4[rax+rdx*4]
	call	outw@PLT
	cmp	rbx, 6
	jne	.L4
	mov	edi, 2
	call	SMC_SELECT_BANK@PLT
	mov	rsi, QWORD PTR MMU_CMD[rip]
	mov	edi, DWORD PTR MC_RESET[rip]
	add	rsi, rbp
	call	outw@PLT
	mov	rsi, QWORD PTR INTERRUPT[rip]
	xor	edi, edi
	add	rsi, rbp
	call	outw@PLT
	xor	edi, edi
	call	SMC_SELECT_BANK@PLT
	mov	rsi, QWORD PTR TCR[rip]
	mov	edi, 0
	mov	eax, DWORD PTR 16[r13]
	add	rsi, rbp
	test	DWORD PTR CFG_MII_SELECT[rip], eax
	mov	eax, edi
	cmove	eax, DWORD PTR TCR_MONCSN[rip]
	mov	edi, DWORD PTR TCR_ENABLE[rip]
	or	edi, DWORD PTR TCR_PAD_EN[rip]
	or	edi, DWORD PTR 20[r13]
	or	edi, eax
	call	outw@PLT
	mov	rdi, r12
	call	set_rx_mode@PLT
	mov	eax, DWORD PTR 16[r13]
	test	DWORD PTR CFG_MII_SELECT[rip], eax
	jne	.L16
.L6:
	mov	edi, 2
	call	SMC_SELECT_BANK@PLT
	mov	rsi, QWORD PTR INTERRUPT[rip]
	mov	edi, DWORD PTR IM_EPH_INT[rip]
	or	edi, DWORD PTR IM_RX_OVRN_INT[rip]
	or	edi, DWORD PTR IM_RCV_INT[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	add	rsi, rbp
	sal	edi, 8
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	outw@PLT
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	mov	rax, QWORD PTR PRODID_OSITECH_SEVEN[rip]
	cmp	QWORD PTR 8[r13], rax
	je	.L2
	lea	r14d, -16[rbp]
	xor	ebx, ebx
	add	r14, QWORD PTR OSITECH_AUI_PWR[rip]
	cmp	DWORD PTR 4[r12], 2
	je	.L17
.L3:
	mov	rdi, r14
	call	inw@PLT
	mov	rsi, r14
	and	eax, 65280
	mov	edi, eax
	or	edi, ebx
	call	outw@PLT
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L16:
	mov	edi, 3
	call	SMC_SELECT_BANK@PLT
	mov	esi, DWORD PTR 24[r13]
	xor	edx, edx
	mov	rdi, r12
	mov	ecx, 32768
	call	mdio_write@PLT
	mov	esi, DWORD PTR 24[r13]
	mov	rdi, r12
	mov	ecx, 481
	mov	edx, 4
	call	mdio_write@PLT
	mov	esi, DWORD PTR 24[r13]
	xor	ecx, ecx
	xor	edx, edx
	mov	rdi, r12
	call	mdio_write@PLT
	mov	esi, DWORD PTR 24[r13]
	mov	ecx, 4608
	xor	edx, edx
	mov	rdi, r12
	call	mdio_write@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L17:
	mov	ebx, DWORD PTR OSI_AUI_PWR[rip]
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	smc_reset, .-smc_reset
	.comm	TCR_PAD_EN,4,4
	.comm	TCR_MONCSN,4,4
	.comm	TCR_ENABLE,4,4
	.comm	TCR_CLEAR,4,4
	.comm	TCR,8,8
	.comm	RCR_SOFTRESET,4,4
	.comm	RCR_CLEAR,4,4
	.comm	RCR,8,8
	.comm	PRODID_OSITECH_SEVEN,8,8
	.comm	OSI_AUI_PWR,4,4
	.comm	OSITECH_AUI_PWR,8,8
	.comm	MMU_CMD,8,8
	.comm	MC_RESET,4,4
	.comm	MANFID_OSITECH,8,8
	.comm	INTERRUPT,8,8
	.comm	IM_RX_OVRN_INT,4,4
	.comm	IM_RCV_INT,4,4
	.comm	IM_EPH_INT,4,4
	.comm	CTL_TE_ENABLE,4,4
	.comm	CTL_CR_ENABLE,4,4
	.comm	CTL_AUTO_RELEASE,4,4
	.comm	CONTROL,8,8
	.comm	CFG_MII_SELECT,4,4
	.comm	ADDR0,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_smc91c92_cs.c_smc_reset.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"smc91c92 reset called.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	smc_reset, %function
smc_reset:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r6, [r0]
	mov	r5, r0
	bl	netdev_priv
	mov	r7, r0
	ldr	r1, .L17
	ldr	r4, .L17+4
	mov	r0, r5
	bl	netdev_dbg
	mov	r0, #0
	bl	SMC_SELECT_BANK
	ldr	r3, .L17+8
	ldr	r1, [r4]
	ldr	r0, [r3]
	add	r1, r6, r1
	bl	outw
	mov	r0, #10
	bl	udelay
	ldr	r3, .L17+12
	ldr	r1, [r4]
	ldr	r8, .L17+16
	ldr	r0, [r3]
	add	r1, r6, r1
	bl	outw
	ldr	r3, .L17+20
	ldr	r1, [r8]
	ldr	r0, [r3]
	add	r1, r6, r1
	bl	outw
	mov	r0, #1
	bl	SMC_SELECT_BANK
	ldr	r3, .L17+24
	ldr	r2, .L17+28
	ldr	r1, .L17+32
	ldr	r0, .L17+36
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	r0, [r0]
	orr	r3, r3, r2
	orr	r0, r3, r0
	add	r1, r6, r1
	bl	outw
	mov	r0, r5
	ldr	r1, [r5, #4]
	bl	smc_set_xcvr
	ldr	r3, .L17+40
	ldr	r2, [r7]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L15
.L2:
	mov	r4, #0
	ldr	r9, .L17+44
.L4:
	ldr	r3, [r5, #8]
	add	r2, r4, #1
	add	r0, r3, r2, lsl #2
	ldr	r1, [r9]
	ldr	r0, [r0, #-4]
	ldr	r3, [r3, r2, lsl #2]
	add	r1, r6, r1
	add	r1, r1, r4
	add	r0, r0, r3, lsl #8
	add	r4, r4, #2
	bl	outw
	cmp	r4, #6
	bne	.L4
	mov	r0, #2
	bl	SMC_SELECT_BANK
	ldr	r2, .L17+48
	ldr	r3, .L17+52
	ldr	r1, [r2]
	ldr	r4, .L17+56
	ldr	r0, [r3]
	add	r1, r6, r1
	bl	outw
	ldr	r1, [r4]
	ldr	r9, .L17+60
	add	r1, r6, r1
	mov	r0, #0
	bl	outw
	mov	r0, #0
	bl	SMC_SELECT_BANK
	ldr	r3, [r9]
	ldr	r2, [r7, #8]
	ldr	r1, [r8]
	tst	r2, r3
	movne	r0, #0
	ldreq	r3, .L17+64
	ldr	r2, .L17+68
	ldreq	r0, [r3]
	ldr	r3, .L17+72
	ldr	ip, [r2]
	ldr	r3, [r3]
	ldr	r2, [r7, #12]
	orr	r3, r3, ip
	orr	r3, r3, r2
	orr	r0, r3, r0
	add	r1, r6, r1
	bl	outw
	mov	r0, r5
	bl	set_rx_mode
	ldr	r3, [r9]
	ldr	r2, [r7, #8]
	tst	r2, r3
	bne	.L16
.L6:
	mov	r0, #2
	bl	SMC_SELECT_BANK
	ldr	r1, .L17+76
	ldr	r2, .L17+80
	ldr	r3, .L17+84
	ldr	r0, [r1]
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r4]
	orr	r0, r0, r2
	orr	r0, r0, r3
	add	r1, r6, r1
	lsl	r0, r0, #8
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	outw
.L15:
	ldr	r3, .L17+88
	ldr	r2, [r7, #4]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L2
	ldr	r9, .L17+92
	ldr	r3, [r5, #4]
	ldr	r0, [r9]
	cmp	r3, #2
	ldreq	r3, .L17+96
	sub	r0, r0, #16
	add	r0, r0, r6
	movne	r4, #0
	ldreq	r4, [r3]
	bl	inw
	ldr	r1, [r9]
	and	r0, r0, #65280
	sub	r1, r1, #16
	add	r1, r1, r6
	orr	r0, r0, r4
	bl	outw
	b	.L2
.L16:
	mov	r0, #3
	bl	SMC_SELECT_BANK
	ldr	r1, [r7, #16]
	mov	r3, #32768
	mov	r2, #0
	mov	r0, r5
	bl	mdio_write
	ldr	r1, [r7, #16]
	mov	r2, #4
	mov	r0, r5
	ldr	r3, .L17+100
	bl	mdio_write
	mov	r3, #0
	ldr	r1, [r7, #16]
	mov	r2, r3
	mov	r0, r5
	bl	mdio_write
	mov	r0, r5
	mov	r3, #4608
	mov	r2, #0
	ldr	r1, [r7, #16]
	bl	mdio_write
	b	.L6
.L18:
	.align	2
.L17:
	.word	.LC0
	.word	RCR
	.word	RCR_SOFTRESET
	.word	RCR_CLEAR
	.word	TCR
	.word	TCR_CLEAR
	.word	CTL_AUTO_RELEASE
	.word	CTL_TE_ENABLE
	.word	CONTROL
	.word	CTL_CR_ENABLE
	.word	MANFID_OSITECH
	.word	ADDR0
	.word	MMU_CMD
	.word	MC_RESET
	.word	INTERRUPT
	.word	CFG_MII_SELECT
	.word	TCR_MONCSN
	.word	TCR_PAD_EN
	.word	TCR_ENABLE
	.word	IM_EPH_INT
	.word	IM_RX_OVRN_INT
	.word	IM_RCV_INT
	.word	PRODID_OSITECH_SEVEN
	.word	OSITECH_AUI_PWR
	.word	OSI_AUI_PWR
	.word	481
	.size	smc_reset, .-smc_reset
	.comm	TCR_PAD_EN,4,4
	.comm	TCR_MONCSN,4,4
	.comm	TCR_ENABLE,4,4
	.comm	TCR_CLEAR,4,4
	.comm	TCR,4,4
	.comm	RCR_SOFTRESET,4,4
	.comm	RCR_CLEAR,4,4
	.comm	RCR,4,4
	.comm	PRODID_OSITECH_SEVEN,4,4
	.comm	OSI_AUI_PWR,4,4
	.comm	OSITECH_AUI_PWR,4,4
	.comm	MMU_CMD,4,4
	.comm	MC_RESET,4,4
	.comm	MANFID_OSITECH,4,4
	.comm	INTERRUPT,4,4
	.comm	IM_RX_OVRN_INT,4,4
	.comm	IM_RCV_INT,4,4
	.comm	IM_EPH_INT,4,4
	.comm	CTL_TE_ENABLE,4,4
	.comm	CTL_CR_ENABLE,4,4
	.comm	CTL_AUTO_RELEASE,4,4
	.comm	CONTROL,4,4
	.comm	CFG_MII_SELECT,4,4
	.comm	ADDR0,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
