	.file	"extr_irq-xtensa-mx.c_xtensa_mx_irq_unmask.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	xtensa_mx_irq_unmask, @function
xtensa_mx_irq_unmask:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	ebp, 1
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	ebx, ebp
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	ecx, DWORD PTR [rdi]
	mov	eax, DWORD PTR XCHAL_INTTYPE_MASK_EXTERN_EDGE[rip]
	or	eax, DWORD PTR XCHAL_INTTYPE_MASK_EXTERN_LEVEL[rip]
	sal	ebx, cl
	test	eax, ebx
	je	.L2
	mov	edi, ecx
	call	xtensa_get_ext_irq_no@PLT
	mov	edx, DWORD PTR HW_IRQ_MX_BASE[rip]
	cmp	edx, eax
	jbe	.L8
.L2:
	mov	edi, DWORD PTR cached_irq_mask[rip]
	call	__this_cpu_read@PLT
	mov	edi, DWORD PTR cached_irq_mask[rip]
	or	ebx, eax
	mov	esi, ebx
	call	__this_cpu_write@PLT
	mov	esi, DWORD PTR intenable[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	edi, ebx
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	xtensa_set_sr@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	sub	eax, edx
	mov	edi, ebp
	mov	esi, DWORD PTR MIENGSET[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	ecx, eax
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	sal	edi, cl
	jmp	set_er@PLT
	.cfi_endproc
.LFE0:
	.size	xtensa_mx_irq_unmask, .-xtensa_mx_irq_unmask
	.comm	intenable,4,4
	.comm	cached_irq_mask,4,4
	.comm	XCHAL_INTTYPE_MASK_EXTERN_LEVEL,4,4
	.comm	XCHAL_INTTYPE_MASK_EXTERN_EDGE,4,4
	.comm	MIENGSET,4,4
	.comm	HW_IRQ_MX_BASE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_irq-xtensa-mx.c_xtensa_mx_irq_unmask.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	xtensa_mx_irq_unmask, %function
xtensa_mx_irq_unmask:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r5, #1
	ldr	r3, .L9
	ldr	r2, .L9+4
	ldr	r0, [r0]
	ldr	r3, [r3]
	ldr	r2, [r2]
	lsl	r4, r5, r0
	orr	r3, r3, r2
	tst	r3, r4
	beq	.L2
	bl	xtensa_get_ext_irq_no
	ldr	r3, .L9+8
	ldr	r3, [r3]
	cmp	r3, r0
	bls	.L8
.L2:
	ldr	r5, .L9+12
	ldr	r0, [r5]
	bl	__this_cpu_read
	orr	r4, r4, r0
	mov	r1, r4
	ldr	r0, [r5]
	bl	__this_cpu_write
	ldr	r3, .L9+16
	mov	r0, r4
	pop	{r4, r5, r6, lr}
	ldr	r1, [r3]
	b	xtensa_set_sr
.L8:
	ldr	r2, .L9+20
	sub	r0, r0, r3
	lsl	r0, r5, r0
	ldr	r1, [r2]
	pop	{r4, r5, r6, lr}
	b	set_er
.L10:
	.align	2
.L9:
	.word	XCHAL_INTTYPE_MASK_EXTERN_EDGE
	.word	XCHAL_INTTYPE_MASK_EXTERN_LEVEL
	.word	HW_IRQ_MX_BASE
	.word	cached_irq_mask
	.word	intenable
	.word	MIENGSET
	.size	xtensa_mx_irq_unmask, .-xtensa_mx_irq_unmask
	.comm	intenable,4,4
	.comm	cached_irq_mask,4,4
	.comm	XCHAL_INTTYPE_MASK_EXTERN_LEVEL,4,4
	.comm	XCHAL_INTTYPE_MASK_EXTERN_EDGE,4,4
	.comm	MIENGSET,4,4
	.comm	HW_IRQ_MX_BASE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
