	.file	"extr_pwm-rockchip.c_rockchip_pwm_get_state.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	rockchip_pwm_get_state, @function
rockchip_pwm_get_state:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdx
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	to_rockchip_pwm_chip@PLT
	mov	rbx, rax
	mov	rax, QWORD PTR 8[rax]
	mov	edi, DWORD PTR [rbx]
	mov	r12d, DWORD PTR [rax]
	call	clk_enable@PLT
	test	eax, eax
	je	.L10
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	mov	edi, DWORD PTR 24[rbx]
	call	clk_get_rate@PLT
	mov	rdi, QWORD PTR 16[rbx]
	mov	r13, rax
	mov	rax, QWORD PTR 8[rbx]
	add	rdi, QWORD PTR 32[rax]
	call	readl_relaxed@PLT
	mov	rdx, QWORD PTR 8[rbx]
	mov	rsi, r13
	mov	edi, DWORD PTR 4[rdx]
	imul	edi, DWORD PTR NSEC_PER_SEC[rip]
	imul	edi, eax
	call	DIV_ROUND_CLOSEST_ULL@PLT
	mov	rdi, QWORD PTR 16[rbx]
	mov	QWORD PTR 16[rbp], rax
	mov	rax, QWORD PTR 8[rbx]
	add	rdi, QWORD PTR 24[rax]
	call	readl_relaxed@PLT
	mov	rdx, QWORD PTR 8[rbx]
	mov	rsi, r13
	mov	edi, DWORD PTR 4[rdx]
	imul	edi, DWORD PTR NSEC_PER_SEC[rip]
	imul	edi, eax
	call	DIV_ROUND_CLOSEST_ULL@PLT
	mov	rdi, QWORD PTR 16[rbx]
	mov	QWORD PTR 8[rbp], rax
	mov	rax, QWORD PTR 8[rbx]
	add	rdi, QWORD PTR 16[rax]
	call	readl_relaxed@PLT
	mov	edx, r12d
	mov	rcx, QWORD PTR 8[rbx]
	and	edx, eax
	cmp	edx, r12d
	sete	dl
	cmp	QWORD PTR 8[rcx], 0
	movzx	edx, dl
	mov	DWORD PTR 0[rbp], edx
	je	.L5
	mov	edx, DWORD PTR PWM_POLARITY_INVERSED[rip]
	test	DWORD PTR PWM_DUTY_POSITIVE[rip], eax
	jne	.L5
.L6:
	mov	DWORD PTR 4[rbp], edx
	mov	edi, DWORD PTR [rbx]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	clk_disable@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	edx, DWORD PTR PWM_POLARITY_NORMAL[rip]
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	rockchip_pwm_get_state, .-rockchip_pwm_get_state
	.comm	PWM_POLARITY_NORMAL,4,4
	.comm	PWM_POLARITY_INVERSED,4,4
	.comm	PWM_DUTY_POSITIVE,4,4
	.comm	NSEC_PER_SEC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pwm-rockchip.c_rockchip_pwm_get_state.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rockchip_pwm_get_state, %function
rockchip_pwm_get_state:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r6, r2
	bl	to_rockchip_pwm_chip
	mov	r4, r0
	ldm	r0, {r0, r3}
	ldr	r7, [r3]
	bl	clk_enable
	cmp	r0, #0
	popne	{r4, r5, r6, r7, r8, pc}
	ldr	r0, [r4, #12]
	bl	clk_get_rate
	ldmib	r4, {r2, r3}
	ldr	r2, [r2, #20]
	mov	r5, r0
	add	r0, r2, r3
	bl	readl_relaxed
	ldr	r8, .L9
	ldr	r3, [r4, #4]
	ldr	r2, [r8]
	ldr	r3, [r3, #4]
	mov	r1, r5
	mul	r3, r2, r3
	mul	r0, r3, r0
	bl	DIV_ROUND_CLOSEST_ULL
	ldmib	r4, {r2, r3}
	ldr	r2, [r2, #16]
	str	r0, [r6, #12]
	add	r0, r2, r3
	bl	readl_relaxed
	ldr	r3, [r4, #4]
	ldr	r2, [r8]
	ldr	r3, [r3, #4]
	mov	r1, r5
	mul	r3, r2, r3
	mul	r0, r3, r0
	bl	DIV_ROUND_CLOSEST_ULL
	ldmib	r4, {r2, r3}
	ldr	r2, [r2, #12]
	str	r0, [r6, #8]
	add	r0, r2, r3
	bl	readl_relaxed
	ldr	r3, [r4, #4]
	bics	r2, r7, r0
	ldr	r2, [r3, #8]
	moveq	r3, #1
	movne	r3, #0
	cmp	r2, #0
	beq	.L3
	ldr	r2, .L9+4
	str	r3, [r6]
	ldr	r3, [r2]
	tst	r0, r3
	beq	.L4
.L5:
	ldr	r3, .L9+8
	ldr	r0, [r4]
	ldr	r3, [r3]
	str	r3, [r6, #4]
	pop	{r4, r5, r6, r7, r8, lr}
	b	clk_disable
.L3:
	str	r3, [r6]
	b	.L5
.L4:
	ldr	r3, .L9+12
	ldr	r0, [r4]
	ldr	r3, [r3]
	str	r3, [r6, #4]
	pop	{r4, r5, r6, r7, r8, lr}
	b	clk_disable
.L10:
	.align	2
.L9:
	.word	NSEC_PER_SEC
	.word	PWM_DUTY_POSITIVE
	.word	PWM_POLARITY_NORMAL
	.word	PWM_POLARITY_INVERSED
	.size	rockchip_pwm_get_state, .-rockchip_pwm_get_state
	.comm	PWM_POLARITY_NORMAL,4,4
	.comm	PWM_POLARITY_INVERSED,4,4
	.comm	PWM_DUTY_POSITIVE,4,4
	.comm	NSEC_PER_SEC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
