	.file	"extr_clk-programmable.c_clk_programmable_determine_rate.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	clk_programmable_determine_rate, @function
clk_programmable_determine_rate:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xor	r15d, r15d
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xor	ebx, ebx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	to_clk_programmable@PLT
	mov	r12, QWORD PTR EINVAL[rip]
	mov	rdi, rbp
	mov	r14, QWORD PTR [rax]
	neg	r12
	call	clk_hw_get_num_parents@PLT
	cmp	eax, ebx
	jle	.L26
	.p2align 4,,10
	.p2align 3
.L13:
	mov	esi, ebx
	mov	rdi, rbp
	call	clk_hw_get_parent_by_index@PLT
	test	rax, rax
	je	.L3
	mov	rdi, rax
	mov	QWORD PTR 8[rsp], rax
	call	clk_hw_get_rate@PLT
	cmp	QWORD PTR 8[r14], 0
	mov	r8, QWORD PTR 8[rsp]
	mov	rsi, rax
	je	.L4
	mov	r9d, DWORD PTR [r14]
	mov	rdi, QWORD PTR 0[r13]
	xor	ecx, ecx
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L9:
	add	rcx, 1
	mov	rax, rsi
	xor	edx, edx
	div	rcx
	mov	r15, rax
	cmp	rdi, rax
	jnb	.L16
.L5:
	cmp	r9d, ecx
	jge	.L9
.L7:
	cmp	r15, rdi
	ja	.L3
.L16:
	test	r12, r12
	js	.L10
	mov	rax, rdi
	sub	rdi, r12
	sub	rax, r15
	cmp	rax, rdi
	jnb	.L11
.L10:
	mov	QWORD PTR 8[r13], rsi
	mov	r12, r15
	mov	QWORD PTR 16[r13], r8
.L11:
	test	r12, r12
	je	.L18
.L3:
	mov	rdi, rbp
	add	ebx, 1
	call	clk_hw_get_num_parents@PLT
	cmp	eax, ebx
	jg	.L13
.L26:
	mov	eax, r12d
	test	r12, r12
	js	.L1
.L12:
	mov	QWORD PTR 0[r13], r12
	xor	eax, eax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	mov	eax, DWORD PTR [r14]
	mov	rdi, QWORD PTR 0[r13]
	xor	ecx, ecx
	test	eax, eax
	jg	.L6
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L27:
	add	ecx, 1
	cmp	eax, ecx
	je	.L3
.L6:
	mov	r15, rsi
	shr	r15, cl
	cmp	r15, rdi
	ja	.L27
	jmp	.L16
.L18:
	xor	r12d, r12d
	jmp	.L12
	.cfi_endproc
.LFE0:
	.size	clk_programmable_determine_rate, .-clk_programmable_determine_rate
	.comm	EINVAL,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_clk-programmable.c_clk_programmable_determine_rate.c"
	.text
	.global	__aeabi_uidiv
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	clk_programmable_determine_rate, %function
clk_programmable_determine_rate:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #20
	mov	r8, r0
	str	r1, [sp, #8]
	bl	to_clk_programmable
	ldr	r3, .L27
	ldr	r2, [r0]
	mov	r0, r8
	mov	r6, #0
	ldr	r9, [r3]
	str	r2, [sp, #12]
	bl	clk_hw_get_num_parents
	cmp	r0, r6
	mov	r4, r6
	rsb	r9, r9, #0
	ble	.L25
.L13:
	mov	r1, r6
	mov	r0, r8
	bl	clk_hw_get_parent_by_index
	subs	r3, r0, #0
	str	r3, [sp, #4]
	beq	.L3
	bl	clk_hw_get_rate
	ldr	r3, [sp, #12]
	mov	r5, r0
	ldr	r1, [r3, #4]
	cmp	r1, #0
	beq	.L4
	ldr	r7, [r3]
	ldr	r3, [sp, #8]
	mov	r10, #0
	ldr	fp, [r3]
	b	.L5
.L9:
	mov	r1, r10
	mov	r0, r5
	bl	__aeabi_uidiv
	cmp	r0, fp
	mov	r4, r0
	bls	.L15
.L5:
	cmp	r7, r10
	add	r10, r10, #1
	bge	.L9
.L7:
	cmp	r4, fp
	bhi	.L3
.L15:
	cmp	r9, #0
	blt	.L10
	sub	r1, fp, r4
	sub	r2, fp, r9
	cmp	r1, r2
	bcs	.L11
.L10:
	mov	r9, r4
	ldr	r3, [sp, #8]
	ldr	r2, [sp, #4]
	str	r5, [r3, #4]
	str	r2, [r3, #8]
.L11:
	cmp	r9, #0
	beq	.L12
.L3:
	mov	r0, r8
	bl	clk_hw_get_num_parents
	add	r6, r6, #1
	cmp	r0, r6
	bgt	.L13
.L25:
	cmp	r9, #0
	blt	.L1
.L12:
	ldr	r3, [sp, #8]
	str	r9, [r3]
	mov	r9, #0
.L1:
	mov	r0, r9
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L4:
	ldr	r3, [sp, #12]
	ldr	r0, [r3]
	ldr	r3, [sp, #8]
	cmp	r0, #0
	ldr	fp, [r3]
	bgt	.L6
	b	.L7
.L26:
	cmp	r0, r1
	beq	.L3
.L6:
	cmp	fp, r5, lsr r1
	lsr	r4, r5, r1
	add	r1, r1, #1
	bcc	.L26
	b	.L15
.L28:
	.align	2
.L27:
	.word	EINVAL
	.size	clk_programmable_determine_rate, .-clk_programmable_determine_rate
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
