	.file	"extr_ixgbe_82599.c_ixgbe_fdir_write_perfect_filter_82599.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	ixgbe_fdir_write_perfect_filter_82599
	.type	ixgbe_fdir_write_perfect_filter_82599, @function
ixgbe_fdir_write_perfect_filter_82599:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rcx
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12d, edx
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	xor	edi, edi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	rax, QWORD PTR 40[rsi]
	mov	rbx, rsi
	mov	r14d, DWORD PTR [rax]
	call	IXGBE_FDIRSIPv6@PLT
	mov	rdi, rbp
	mov	edx, r14d
	mov	esi, eax
	call	IXGBE_WRITE_REG_BE32@PLT
	mov	rax, QWORD PTR 40[rbx]
	mov	edi, 1
	mov	r14d, DWORD PTR 4[rax]
	call	IXGBE_FDIRSIPv6@PLT
	mov	rdi, rbp
	mov	edx, r14d
	mov	esi, eax
	call	IXGBE_WRITE_REG_BE32@PLT
	mov	rax, QWORD PTR 40[rbx]
	mov	edi, 2
	mov	r14d, DWORD PTR 8[rax]
	call	IXGBE_FDIRSIPv6@PLT
	mov	rdi, rbp
	mov	edx, r14d
	mov	esi, eax
	call	IXGBE_WRITE_REG_BE32@PLT
	mov	rax, QWORD PTR 40[rbx]
	mov	esi, DWORD PTR IXGBE_FDIRIPSA[rip]
	mov	rdi, rbp
	mov	edx, DWORD PTR [rax]
	call	IXGBE_WRITE_REG_BE32@PLT
	mov	rax, QWORD PTR 32[rbx]
	mov	esi, DWORD PTR IXGBE_FDIRIPDA[rip]
	mov	rdi, rbp
	mov	edx, DWORD PTR [rax]
	call	IXGBE_WRITE_REG_BE32@PLT
	mov	edi, DWORD PTR 28[rbx]
	call	ntohs@PLT
	mov	ecx, DWORD PTR IXGBE_FDIRPORT_DESTINATION_SHIFT[rip]
	mov	edi, DWORD PTR 24[rbx]
	sal	eax, cl
	mov	r14d, eax
	call	ntohs@PLT
	mov	esi, DWORD PTR IXGBE_FDIRPORT[rip]
	mov	edx, r14d
	mov	rdi, rbp
	or	edx, eax
	call	IXGBE_WRITE_REG@PLT
	mov	edi, DWORD PTR 20[rbx]
	call	IXGBE_STORE_AS_BE16@PLT
	mov	ecx, DWORD PTR IXGBE_FDIRVLAN_FLEX_SHIFT[rip]
	mov	edi, DWORD PTR 16[rbx]
	sal	eax, cl
	mov	r14d, eax
	call	ntohs@PLT
	mov	esi, DWORD PTR IXGBE_FDIRVLAN[rip]
	mov	edx, r14d
	mov	rdi, rbp
	or	edx, eax
	call	IXGBE_WRITE_REG@PLT
	mov	ecx, DWORD PTR IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT[rip]
	mov	edx, r12d
	mov	rdi, rbp
	mov	esi, DWORD PTR IXGBE_FDIRHASH[rip]
	sal	edx, cl
	or	edx, DWORD PTR [rbx]
	call	IXGBE_WRITE_REG@PLT
	mov	rdi, rbp
	call	IXGBE_WRITE_FLUSH@PLT
	mov	edx, DWORD PTR IXGBE_FDIRCMD_CMD_ADD_FLOW[rip]
	or	edx, DWORD PTR IXGBE_FDIRCMD_FILTER_UPDATE[rip]
	or	edx, DWORD PTR IXGBE_FDIRCMD_LAST[rip]
	or	edx, DWORD PTR IXGBE_FDIRCMD_QUEUE_EN[rip]
	cmp	QWORD PTR IXGBE_FDIR_DROP_QUEUE[rip], r13
	jne	.L2
	or	edx, DWORD PTR IXGBE_FDIRCMD_DROP[rip]
.L2:
	mov	ecx, DWORD PTR IXGBE_FDIRCMD_FLOW_TYPE_SHIFT[rip]
	mov	eax, DWORD PTR 4[rbx]
	mov	rdi, rbp
	mov	rsi, QWORD PTR 8[rbx]
	sal	eax, cl
	mov	ecx, DWORD PTR IXGBE_FDIRCMD_RX_QUEUE_SHIFT[rip]
	sal	r13d, cl
	mov	ecx, DWORD PTR IXGBE_FDIRCMD_VT_POOL_SHIFT[rip]
	or	eax, r13d
	sal	esi, cl
	or	eax, esi
	mov	esi, DWORD PTR IXGBE_FDIRCMD[rip]
	or	edx, eax
	call	IXGBE_WRITE_REG@PLT
	pop	rbx
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	ixgbe_fdir_write_perfect_filter_82599, .-ixgbe_fdir_write_perfect_filter_82599
	.comm	IXGBE_FDIR_DROP_QUEUE,8,8
	.comm	IXGBE_FDIRVLAN_FLEX_SHIFT,4,4
	.comm	IXGBE_FDIRVLAN,4,4
	.comm	IXGBE_FDIRPORT_DESTINATION_SHIFT,4,4
	.comm	IXGBE_FDIRPORT,4,4
	.comm	IXGBE_FDIRIPSA,4,4
	.comm	IXGBE_FDIRIPDA,4,4
	.comm	IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT,4,4
	.comm	IXGBE_FDIRHASH,4,4
	.comm	IXGBE_FDIRCMD_VT_POOL_SHIFT,4,4
	.comm	IXGBE_FDIRCMD_RX_QUEUE_SHIFT,4,4
	.comm	IXGBE_FDIRCMD_QUEUE_EN,4,4
	.comm	IXGBE_FDIRCMD_LAST,4,4
	.comm	IXGBE_FDIRCMD_FLOW_TYPE_SHIFT,4,4
	.comm	IXGBE_FDIRCMD_FILTER_UPDATE,4,4
	.comm	IXGBE_FDIRCMD_DROP,4,4
	.comm	IXGBE_FDIRCMD_CMD_ADD_FLOW,4,4
	.comm	IXGBE_FDIRCMD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ixgbe_82599.c_ixgbe_fdir_write_perfect_filter_82599.c"
	.text
	.align	2
	.global	ixgbe_fdir_write_perfect_filter_82599
	.syntax unified
	.arm
	.fpu softvfp
	.type	ixgbe_fdir_write_perfect_filter_82599, %function
ixgbe_fdir_write_perfect_filter_82599:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r1
	mov	r5, r0
	mov	r0, #0
	mov	r6, r3
	mov	r7, r2
	bl	IXGBE_FDIRSIPv6
	ldr	r3, [r4, #32]
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r5
	bl	IXGBE_WRITE_REG_BE32
	mov	r0, #1
	bl	IXGBE_FDIRSIPv6
	ldr	r3, [r4, #32]
	mov	r1, r0
	ldr	r2, [r3, #4]
	mov	r0, r5
	bl	IXGBE_WRITE_REG_BE32
	mov	r0, #2
	bl	IXGBE_FDIRSIPv6
	ldr	r3, [r4, #32]
	mov	r1, r0
	ldr	r2, [r3, #8]
	mov	r0, r5
	bl	IXGBE_WRITE_REG_BE32
	ldr	r2, [r4, #32]
	ldr	r3, .L5
	mov	r0, r5
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	IXGBE_WRITE_REG_BE32
	ldr	r3, .L5+4
	ldr	r2, [r4, #28]
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r5
	bl	IXGBE_WRITE_REG_BE32
	ldr	r0, [r4, #24]
	bl	ntohs
	mov	r8, r0
	ldr	r3, .L5+8
	ldr	r0, [r4, #20]
	ldr	r2, [r3]
	lsl	r8, r8, r2
	bl	ntohs
	ldr	r3, .L5+12
	orr	r2, r8, r0
	ldr	r1, [r3]
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	ldr	r0, [r4, #16]
	bl	IXGBE_STORE_AS_BE16
	mov	r8, r0
	ldr	r3, .L5+16
	ldr	r0, [r4, #12]
	ldr	r2, [r3]
	lsl	r8, r8, r2
	bl	ntohs
	ldr	r3, .L5+20
	orr	r2, r8, r0
	ldr	r1, [r3]
	mov	r0, r5
	bl	IXGBE_WRITE_REG
	ldr	r3, .L5+24
	ldr	r2, [r4]
	ldr	r1, [r3]
	ldr	r3, .L5+28
	orr	r2, r2, r7, lsl r1
	mov	r0, r5
	ldr	r1, [r3]
	bl	IXGBE_WRITE_REG
	mov	r0, r5
	bl	IXGBE_WRITE_FLUSH
	ldr	r1, .L5+32
	ldr	r2, .L5+36
	ldr	r0, .L5+40
	ldr	r3, .L5+44
	ldr	r2, [r2]
	ldr	r0, [r0]
	ldr	r1, [r1]
	ldr	r3, [r3]
	cmp	r0, r6
	ldr	ip, .L5+48
	orr	r1, r1, r2
	orr	r1, r1, r3
	ldreq	r3, .L5+52
	ldr	r2, [ip]
	ldreq	r3, [r3]
	orr	r1, r1, r2
	orreq	r1, r1, r3
	ldr	r3, .L5+56
	ldr	r2, [r4, #8]
	ldr	r3, [r3]
	ldr	r0, .L5+60
	lsl	r2, r2, r3
	ldr	r3, .L5+64
	ldr	ip, [r4, #4]
	ldr	r0, [r0]
	ldr	r3, [r3]
	orr	r2, r2, ip, lsl r0
	ldr	ip, .L5+68
	orr	r2, r2, r6, lsl r3
	orr	r2, r2, r1
	mov	r0, r5
	ldr	r1, [ip]
	bl	IXGBE_WRITE_REG
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L6:
	.align	2
.L5:
	.word	IXGBE_FDIRIPSA
	.word	IXGBE_FDIRIPDA
	.word	IXGBE_FDIRPORT_DESTINATION_SHIFT
	.word	IXGBE_FDIRPORT
	.word	IXGBE_FDIRVLAN_FLEX_SHIFT
	.word	IXGBE_FDIRVLAN
	.word	IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT
	.word	IXGBE_FDIRHASH
	.word	IXGBE_FDIRCMD_CMD_ADD_FLOW
	.word	IXGBE_FDIRCMD_FILTER_UPDATE
	.word	IXGBE_FDIR_DROP_QUEUE
	.word	IXGBE_FDIRCMD_LAST
	.word	IXGBE_FDIRCMD_QUEUE_EN
	.word	IXGBE_FDIRCMD_DROP
	.word	IXGBE_FDIRCMD_VT_POOL_SHIFT
	.word	IXGBE_FDIRCMD_FLOW_TYPE_SHIFT
	.word	IXGBE_FDIRCMD_RX_QUEUE_SHIFT
	.word	IXGBE_FDIRCMD
	.size	ixgbe_fdir_write_perfect_filter_82599, .-ixgbe_fdir_write_perfect_filter_82599
	.comm	IXGBE_FDIR_DROP_QUEUE,4,4
	.comm	IXGBE_FDIRVLAN_FLEX_SHIFT,4,4
	.comm	IXGBE_FDIRVLAN,4,4
	.comm	IXGBE_FDIRPORT_DESTINATION_SHIFT,4,4
	.comm	IXGBE_FDIRPORT,4,4
	.comm	IXGBE_FDIRIPSA,4,4
	.comm	IXGBE_FDIRIPDA,4,4
	.comm	IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT,4,4
	.comm	IXGBE_FDIRHASH,4,4
	.comm	IXGBE_FDIRCMD_VT_POOL_SHIFT,4,4
	.comm	IXGBE_FDIRCMD_RX_QUEUE_SHIFT,4,4
	.comm	IXGBE_FDIRCMD_QUEUE_EN,4,4
	.comm	IXGBE_FDIRCMD_LAST,4,4
	.comm	IXGBE_FDIRCMD_FLOW_TYPE_SHIFT,4,4
	.comm	IXGBE_FDIRCMD_FILTER_UPDATE,4,4
	.comm	IXGBE_FDIRCMD_DROP,4,4
	.comm	IXGBE_FDIRCMD_CMD_ADD_FLOW,4,4
	.comm	IXGBE_FDIRCMD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
