	.file	"extr_clk-tegra210.c_tegra210_vic_mbist_war.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	tegra210_vic_mbist_war, @function
tegra210_vic_mbist_war:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	rdi, QWORD PTR LVL2_CLK_GATE_OVRE[rip]
	add	rdi, QWORD PTR clk_base[rip]
	call	readl_relaxed@PLT
	mov	edi, 5
	mov	r12, QWORD PTR LVL2_CLK_GATE_OVRE[rip]
	add	r12, QWORD PTR clk_base[rip]
	mov	ebp, eax
	call	BIT@PLT
	mov	rsi, r12
	or	eax, ebp
	mov	edi, eax
	call	writel_relaxed@PLT
	mov	rsi, QWORD PTR clk_base[rip]
	mov	edi, 1
	call	fence_udelay@PLT
	mov	rdi, QWORD PTR NV_PVIC_THI_SLCG_OVERRIDE_LOW[rip]
	add	rdi, QWORD PTR vic_base[rip]
	call	readl_relaxed@PLT
	xor	edi, edi
	mov	r13, QWORD PTR NV_PVIC_THI_SLCG_OVERRIDE_LOW[rip]
	add	r13, QWORD PTR vic_base[rip]
	mov	r12d, eax
	call	BIT@PLT
	mov	esi, 2
	mov	edi, 7
	or	eax, r12d
	mov	ebx, eax
	call	GENMASK@PLT
	mov	edi, 24
	or	ebx, eax
	call	BIT@PLT
	mov	rsi, r13
	or	ebx, eax
	mov	edi, ebx
	call	writel_relaxed@PLT
	mov	rsi, QWORD PTR NV_PVIC_THI_SLCG_OVERRIDE_LOW[rip]
	mov	edi, 1
	add	rsi, QWORD PTR vic_base[rip]
	call	fence_udelay@PLT
	mov	edi, r12d
	mov	rsi, QWORD PTR NV_PVIC_THI_SLCG_OVERRIDE_LOW[rip]
	add	rsi, QWORD PTR vic_base[rip]
	call	writel_relaxed@PLT
	mov	rdi, QWORD PTR NV_PVIC_THI_SLCG_OVERRIDE_LOW[rip]
	add	rdi, QWORD PTR vic_base[rip]
	call	readl@PLT
	mov	edi, ebp
	mov	rsi, QWORD PTR LVL2_CLK_GATE_OVRE[rip]
	add	rsi, QWORD PTR clk_base[rip]
	call	writel_relaxed@PLT
	mov	rsi, QWORD PTR clk_base[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 40
	mov	edi, 1
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	fence_udelay@PLT
	.cfi_endproc
.LFE0:
	.size	tegra210_vic_mbist_war, .-tegra210_vic_mbist_war
	.comm	vic_base,8,8
	.comm	clk_base,8,8
	.comm	NV_PVIC_THI_SLCG_OVERRIDE_LOW,8,8
	.comm	LVL2_CLK_GATE_OVRE,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_clk-tegra210.c_tegra210_vic_mbist_war.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tegra210_vic_mbist_war, %function
tegra210_vic_mbist_war:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r4, .L4
	ldr	r10, .L4+4
	ldr	r0, [r4]
	ldr	r3, [r10]
	ldr	r6, .L4+8
	add	r0, r0, r3
	bl	readl_relaxed
	mov	r8, r0
	mov	r0, #5
	bl	BIT
	ldr	r3, [r10]
	ldr	r1, [r4]
	ldr	r5, .L4+12
	add	r1, r1, r3
	orr	r0, r0, r8
	bl	writel_relaxed
	ldr	r1, [r4]
	mov	r0, #1
	bl	fence_udelay
	ldr	r3, [r5]
	ldr	r0, [r6]
	add	r0, r0, r3
	bl	readl_relaxed
	mov	r9, r0
	mov	r0, #0
	bl	BIT
	mov	r1, #2
	mov	r7, r0
	mov	r0, #7
	bl	GENMASK
	mov	r3, r0
	orr	r7, r7, r9
	mov	r0, #24
	orr	r7, r7, r3
	bl	BIT
	ldr	r3, [r5]
	ldr	r1, [r6]
	orr	r0, r7, r0
	add	r1, r1, r3
	bl	writel_relaxed
	ldr	r3, [r5]
	ldr	r1, [r6]
	mov	r0, #1
	add	r1, r1, r3
	bl	fence_udelay
	ldr	r3, [r5]
	ldr	r1, [r6]
	mov	r0, r9
	add	r1, r1, r3
	bl	writel_relaxed
	ldr	r3, [r5]
	ldr	r0, [r6]
	add	r0, r0, r3
	bl	readl
	ldr	r3, [r10]
	ldr	r1, [r4]
	mov	r0, r8
	add	r1, r1, r3
	bl	writel_relaxed
	ldr	r1, [r4]
	mov	r0, #1
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	fence_udelay
.L5:
	.align	2
.L4:
	.word	clk_base
	.word	LVL2_CLK_GATE_OVRE
	.word	vic_base
	.word	NV_PVIC_THI_SLCG_OVERRIDE_LOW
	.size	tegra210_vic_mbist_war, .-tegra210_vic_mbist_war
	.comm	vic_base,4,4
	.comm	clk_base,4,4
	.comm	NV_PVIC_THI_SLCG_OVERRIDE_LOW,4,4
	.comm	LVL2_CLK_GATE_OVRE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
