	.file	"extr_amplc_pci230.c_pci230_ai_cmdtest.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"comedi%d: amplc_pci230: ai_cmdtest: channel numbers must increase or sequence must repeat exactly\n"
	.align 8
.LC1:
	.string	"comedi%d: amplc_pci230: ai_cmdtest: single-ended channel pairs must have the same range\n"
	.align 8
.LC2:
	.string	"comedi%d: amplc_pci230: ai_cmdtest: channel sequence ranges must be all bipolar or all unipolar\n"
	.align 8
.LC3:
	.string	"comedi%d: amplc_pci230: ai_cmdtest: channel sequence analogue references must be all the same (single-ended or differential)\n"
	.align 8
.LC4:
	.string	"comedi%d: amplc_pci230: ai_cmdtest: differential channel number out of range 0 to %u\n"
	.align 8
.LC5:
	.string	"comedi: comedi%d: amplc_pci230: ai_cmdtest: Buggy PCI230+/260+ h/w version %u requires first channel of multi-channel sequence to be 0 (corrected in h/w version 4)\n"
	.text
	.p2align 4
	.type	pci230_ai_cmdtest, @function
pci230_ai_cmdtest:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	mov	eax, DWORD PTR TRIG_INT[rip]
	mov	edx, DWORD PTR [rdx]
	mov	r10d, DWORD PTR TRIG_NOW[rip]
	mov	r9d, DWORD PTR TRIG_FOLLOW[rip]
	mov	QWORD PTR 32[rsp], rdi
	mov	rbp, QWORD PTR thisboard[rip]
	mov	ecx, eax
	mov	r11d, DWORD PTR 4[rbx]
	mov	QWORD PTR 8[rsp], rsi
	or	r10d, eax
	mov	edi, DWORD PTR TRIG_TIMER[rip]
	and	r10d, edx
	cmp	r10d, edx
	mov	DWORD PTR [rbx], r10d
	setne	r8b
	test	r10d, r10d
	sete	dl
	or	ecx, r9d
	or	r8d, edx
	or	ecx, edi
	cmp	QWORD PTR 8[rbp], 0
	mov	edx, DWORD PTR TRIG_EXT[rip]
	movzx	r8d, r8b
	jne	.L2
	mov	esi, ecx
	and	esi, r11d
	cmp	QWORD PTR 0[rbp], 0
	jle	.L4
.L2:
	mov	esi, ecx
	or	esi, edx
	and	esi, r11d
.L4:
	mov	DWORD PTR 4[rbx], esi
	cmp	r11d, esi
	jne	.L76
	test	esi, esi
	jne	.L5
.L76:
	add	r8d, 1
.L5:
	mov	ecx, DWORD PTR 8[rbx]
	or	eax, edx
	or	eax, edi
	and	eax, ecx
	mov	DWORD PTR 8[rbx], eax
	je	.L77
	cmp	eax, ecx
	je	.L7
.L77:
	add	r8d, 1
.L7:
	mov	ecx, DWORD PTR TRIG_COUNT[rip]
	mov	r11d, DWORD PTR TRIG_NONE[rip]
	mov	r13d, DWORD PTR 12[rbx]
	mov	r14d, DWORD PTR 16[rbx]
	mov	ebp, ecx
	or	ecx, r11d
	and	ebp, r13d
	and	ecx, r14d
	mov	DWORD PTR 12[rbx], ebp
	mov	DWORD PTR 16[rbx], ecx
	cmp	ebp, r13d
	jne	.L65
	test	ebp, ebp
	jne	.L9
.L65:
	mov	r15d, 1
.L1:
	add	rsp, 56
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	cmp	r14d, ecx
	setne	r13b
	test	ecx, ecx
	sete	r14b
	or	r13d, r14d
	test	r8d, r8d
	setne	r8b
	or	r13b, r8b
	jne	.L65
	lea	r8d, -1[r10]
	mov	r15d, 2
	test	r8d, r10d
	lea	r8d, -1[rsi]
	setne	r10b
	and	r8d, esi
	cmp	r8d, 1
	movzx	r10d, r10b
	lea	r8d, -1[rax]
	sbb	r10d, -1
	and	r8d, eax
	cmp	r8d, 1
	lea	r8d, -1[rbp]
	sbb	r10d, -1
	and	ebp, r8d
	cmp	ebp, 1
	lea	ebp, -1[rcx]
	sbb	r10d, -1
	and	ebp, ecx
	jne	.L1
	cmp	esi, r9d
	jne	.L157
.L15:
	test	r10d, r10d
	jne	.L68
	mov	r15d, DWORD PTR 20[rbx]
	test	r15d, r15d
	je	.L16
	mov	DWORD PTR 20[rbx], 0
	mov	r15d, 1
.L16:
	cmp	eax, edi
	je	.L158
	mov	edi, DWORD PTR 40[rbx]
	cmp	eax, edx
	je	.L159
	mov	rax, QWORD PTR 32[rbx]
	test	edi, edi
	je	.L20
	mov	DWORD PTR 40[rbx], 0
	add	r15d, 1
.L20:
	cmp	QWORD PTR 48[rbx], rax
	je	.L25
	mov	QWORD PTR 48[rbx], rax
	add	r15d, 1
.L25:
	cmp	r11d, ecx
	je	.L160
.L26:
	cmp	edx, esi
	je	.L161
	cmp	DWORD PTR TRIG_TIMER[rip], esi
	je	.L162
	mov	ecx, DWORD PTR 64[rbx]
	test	ecx, ecx
	je	.L30
	mov	DWORD PTR 64[rbx], 0
	mov	r15d, 3
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L161:
	mov	eax, DWORD PTR CR_FLAGS_MASK[rip]
	mov	edi, DWORD PTR 64[rbx]
	mov	edx, eax
	not	edx
	test	edi, edx
	jne	.L163
	mov	edx, DWORD PTR CR_EDGE[rip]
	not	edx
	and	edx, eax
	test	edx, edi
	jne	.L29
.L30:
	test	r15d, r15d
	jne	.L155
	mov	eax, DWORD PTR TRIG_TIMER[rip]
	cmp	DWORD PTR 8[rbx], eax
	je	.L33
.L153:
	cmp	DWORD PTR 4[rbx], eax
	je	.L164
.L41:
	mov	rax, QWORD PTR 24[rbx]
	test	rax, rax
	je	.L1
	cmp	QWORD PTR 32[rbx], 0
	jle	.L1
	xor	r12d, r12d
	xor	r14d, r14d
	mov	DWORD PTR 44[rsp], r15d
	xor	r13d, r13d
	mov	r15, rbx
	mov	DWORD PTR 40[rsp], 0
	mov	rbx, r12
	mov	r12d, r14d
	mov	DWORD PTR 4[rsp], 0
	mov	DWORD PTR 24[rsp], 0
	mov	DWORD PTR 28[rsp], 0
	jmp	.L51
	.p2align 4,,10
	.p2align 3
.L72:
	mov	DWORD PTR 40[rsp], r12d
	xor	edx, edx
.L45:
	mov	rax, QWORD PTR 24[r15]
	mov	rbx, QWORD PTR 16[rsp]
	mov	rdx, QWORD PTR [rax+rdx]
	cmp	QWORD PTR [rax+rbx], rdx
	je	.L47
	or	ebp, 1
.L47:
	mov	eax, ebp
	or	eax, 8
	cmp	ecx, DWORD PTR 4[rsp]
	cmovne	ebp, eax
	mov	eax, ebp
	or	eax, 4
	cmp	r11d, DWORD PTR 24[rsp]
	cmovne	ebp, eax
	cmp	edi, ecx
	je	.L44
	xor	r13d, esi
	and	r13d, -2
	jne	.L44
	cmp	r14d, DWORD PTR 28[rsp]
	mov	eax, ebp
	setne	dl
	or	eax, 2
	test	dl, dl
	cmovne	ebp, eax
.L44:
	lea	ebx, 1[r12]
	mov	r12, rbx
	cmp	rbx, QWORD PTR 32[r15]
	jge	.L50
	mov	DWORD PTR 4[rsp], ecx
	mov	rax, QWORD PTR 24[r15]
	mov	r13d, esi
	mov	DWORD PTR 24[rsp], r11d
	mov	DWORD PTR 28[rsp], r14d
.L51:
	mov	rdi, QWORD PTR [rax+rbx*8]
	lea	rdx, 0[0+rbx*8]
	mov	QWORD PTR 16[rsp], rdx
	call	CR_CHAN@PLT
	mov	DWORD PTR [rsp], eax
	mov	rax, QWORD PTR 24[r15]
	mov	rdi, QWORD PTR [rax+rbx*8]
	call	CR_RANGE@PLT
	mov	r14d, eax
	mov	rax, QWORD PTR 24[r15]
	mov	rdi, QWORD PTR [rax+rbx*8]
	call	CR_AREF@PLT
	mov	edi, DWORD PTR AREF_DIFF[rip]
	mov	edx, r14d
	mov	esi, DWORD PTR [rsp]
	mov	ecx, eax
	mov	rax, QWORD PTR pci230_ai_bipolar[rip]
	cmp	edi, ecx
	mov	r11d, DWORD PTR [rax+rdx*4]
	jne	.L43
	mov	rax, QWORD PTR 8[rsp]
	mov	edx, DWORD PTR [rax]
	mov	eax, edx
	shr	eax, 31
	add	eax, edx
	mov	edx, ebp
	sar	eax
	or	edx, 16
	cmp	eax, esi
	cmovbe	ebp, edx
.L43:
	test	r12d, r12d
	je	.L44
	cmp	esi, r13d
	ja	.L79
	mov	edx, DWORD PTR 40[rsp]
	test	edx, edx
	je	.L72
.L150:
	mov	eax, r12d
	xor	edx, edx
	div	DWORD PTR 40[rsp]
	sal	rdx, 3
	jmp	.L45
	.p2align 4,,10
	.p2align 3
.L160:
	cmp	QWORD PTR 56[rbx], 0
	je	.L26
	mov	QWORD PTR 56[rbx], 0
	add	r15d, 1
	jmp	.L26
	.p2align 4,,10
	.p2align 3
.L158:
	mov	rdi, QWORD PTR devpriv[rip]
	mov	rax, QWORD PTR 32[rbx]
	mov	r14d, 4000
	mov	edi, DWORD PTR [rdi]
	test	edi, edi
	jne	.L18
	mov	rdi, QWORD PTR 24[rbx]
	mov	r14d, 3200
	test	rdi, rdi
	je	.L18
	test	rax, rax
	jg	.L165
.L18:
	cmp	DWORD PTR 40[rbx], r14d
	jnb	.L20
	mov	DWORD PTR 40[rbx], r14d
	add	r15d, 1
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L79:
	mov	eax, DWORD PTR 40[rsp]
	test	eax, eax
	je	.L47
	jmp	.L150
	.p2align 4,,10
	.p2align 3
.L50:
	mov	rax, QWORD PTR devpriv[rip]
	mov	esi, DWORD PTR 40[rsp]
	mov	r14d, ebx
	mov	rbx, r15
	mov	r15d, DWORD PTR 44[rsp]
	mov	ecx, DWORD PTR [rax]
	sub	ecx, 1
	test	esi, esi
	je	.L52
	mov	eax, r12d
	xor	edx, edx
	div	esi
	test	edx, edx
	je	.L73
	mov	r13d, ebp
	or	r13d, 1
	cmp	ecx, 2
	ja	.L154
	cmp	DWORD PTR 40[rsp], 1
	jbe	.L154
	mov	rax, QWORD PTR 24[rbx]
	mov	rdi, QWORD PTR [rax]
	call	CR_CHAN@PLT
	test	eax, eax
	jne	.L63
.L64:
	mov	eax, r13d
	mov	ebp, r13d
	and	eax, 1
	and	ebp, 32
	jmp	.L56
	.p2align 4,,10
	.p2align 3
.L154:
	and	ebp, 32
.L54:
	mov	rax, QWORD PTR 32[rsp]
	lea	rdi, .LC0[rip]
	mov	esi, DWORD PTR [rax]
	xor	eax, eax
	call	DPRINTK@PLT
.L57:
	test	r13b, 2
	jne	.L166
.L58:
	test	r13b, 4
	jne	.L167
.L59:
	test	r13b, 8
	jne	.L168
.L60:
	and	r13d, 16
	jne	.L169
.L61:
	mov	r15d, 5
	test	ebp, ebp
	je	.L1
	mov	rax, QWORD PTR devpriv[rip]
	lea	rdi, .LC5[rip]
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR 32[rsp]
	mov	esi, DWORD PTR [rax]
	call	printk@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L159:
	mov	eax, DWORD PTR CR_FLAGS_MASK[rip]
	test	eax, edi
	je	.L22
	mov	edx, eax
	not	edx
	test	edx, edi
	jne	.L170
.L23:
	mov	edx, DWORD PTR CR_INVERT[rip]
	mov	esi, DWORD PTR CR_EDGE[rip]
	not	edx
	and	edx, eax
	and	edi, edx
	cmp	edi, esi
	jne	.L24
.L152:
	mov	ecx, DWORD PTR 16[rbx]
	mov	r11d, DWORD PTR TRIG_NONE[rip]
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR TRIG_EXT[rip]
	mov	rax, QWORD PTR 32[rbx]
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L157:
	cmp	eax, edi
	je	.L15
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L163:
	xor	esi, esi
	call	COMBINE@PLT
	mov	edx, DWORD PTR CR_EDGE[rip]
	mov	DWORD PTR 64[rbx], eax
	mov	edi, eax
	not	edx
	and	edx, DWORD PTR CR_FLAGS_MASK[rip]
	test	edx, eax
	je	.L155
.L29:
	xor	esi, esi
	call	COMBINE@PLT
	mov	DWORD PTR 64[rbx], eax
.L155:
	mov	r15d, 3
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L33:
	mov	esi, DWORD PTR 68[rbx]
	lea	rdi, 40[rbx]
	and	esi, DWORD PTR TRIG_ROUND_MASK[rip]
	mov	r14d, DWORD PTR 40[rbx]
	call	pci230_ns_to_single_timer@PLT
	mov	eax, DWORD PTR TRIG_TIMER[rip]
	cmp	DWORD PTR 40[rbx], r14d
	je	.L153
	cmp	DWORD PTR 4[rbx], eax
	je	.L40
.L42:
	mov	r15d, 4
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L164:
	lea	r14, 64[rbx]
	mov	esi, DWORD PTR 68[rbx]
	and	esi, DWORD PTR TRIG_ROUND_MASK[rip]
	mov	rdi, r14
	mov	r12d, DWORD PTR 64[rbx]
	call	pci230_ns_to_single_timer@PLT
	mov	rdi, rbx
	call	pci230_ai_check_scan_period@PLT
	test	eax, eax
	je	.L37
.L38:
	cmp	DWORD PTR 64[rbx], r12d
	jne	.L42
	test	r13b, r13b
	je	.L41
	jmp	.L42
	.p2align 4,,10
	.p2align 3
.L162:
	mov	rdi, rbx
	call	pci230_ai_check_scan_period@PLT
	test	eax, eax
	je	.L155
	jmp	.L30
.L73:
	mov	r14d, DWORD PTR 40[rsp]
	.p2align 4,,10
	.p2align 3
.L52:
	cmp	ecx, 2
	jbe	.L171
.L55:
	test	ebp, ebp
	je	.L1
	mov	r13d, ebp
	jmp	.L64
	.p2align 4,,10
	.p2align 3
.L22:
	mov	rax, QWORD PTR 32[rbx]
	cmp	edi, 1
	jbe	.L20
	mov	DWORD PTR 40[rbx], 1
	add	r15d, 1
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L171:
	cmp	r14d, 1
	jbe	.L55
	mov	rax, QWORD PTR 24[rbx]
	mov	rdi, QWORD PTR [rax]
	call	CR_CHAN@PLT
	test	eax, eax
	je	.L55
	mov	r13d, ebp
	.p2align 4,,10
	.p2align 3
.L63:
	mov	eax, r13d
	mov	ebp, 32
	or	r13d, 32
	and	eax, 1
.L56:
	test	eax, eax
	je	.L57
	jmp	.L54
	.p2align 4,,10
	.p2align 3
.L24:
	mov	edi, DWORD PTR 20[rbx]
	add	r15d, 1
	call	COMBINE@PLT
	mov	DWORD PTR 40[rbx], eax
	jmp	.L152
	.p2align 4,,10
	.p2align 3
.L165:
	mov	rdi, QWORD PTR [rdi]
	call	CR_AREF@PLT
	cmp	eax, DWORD PTR AREF_DIFF[rip]
	mov	ecx, DWORD PTR 16[rbx]
	mov	rax, QWORD PTR 32[rbx]
	mov	r11d, DWORD PTR TRIG_NONE[rip]
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR TRIG_EXT[rip]
	jne	.L18
	mov	r14d, 8000
	jmp	.L18
.L40:
	lea	r14, 64[rbx]
	mov	esi, DWORD PTR 68[rbx]
	and	esi, DWORD PTR TRIG_ROUND_MASK[rip]
	mov	rdi, r14
	mov	r12d, DWORD PTR 64[rbx]
	call	pci230_ns_to_single_timer@PLT
	mov	rdi, rbx
	call	pci230_ai_check_scan_period@PLT
	test	eax, eax
	jne	.L42
	mov	r13d, 1
	.p2align 4,,10
	.p2align 3
.L37:
	mov	esi, DWORD PTR TRIG_ROUND_UP[rip]
	mov	rdi, r14
	call	pci230_ns_to_single_timer@PLT
	mov	rdi, rbx
	call	pci230_ai_check_scan_period@PLT
	jmp	.L38
	.p2align 4,,10
	.p2align 3
.L166:
	mov	rax, QWORD PTR 32[rsp]
	lea	rdi, .LC1[rip]
	mov	esi, DWORD PTR [rax]
	xor	eax, eax
	call	DPRINTK@PLT
	jmp	.L58
	.p2align 4,,10
	.p2align 3
.L169:
	mov	rax, QWORD PTR 8[rsp]
	lea	rdi, .LC4[rip]
	mov	eax, DWORD PTR [rax]
	mov	edx, eax
	shr	edx, 31
	add	edx, eax
	mov	rax, QWORD PTR 32[rsp]
	sar	edx
	mov	esi, DWORD PTR [rax]
	sub	edx, 1
	xor	eax, eax
	call	DPRINTK@PLT
	jmp	.L61
	.p2align 4,,10
	.p2align 3
.L168:
	mov	rax, QWORD PTR 32[rsp]
	lea	rdi, .LC3[rip]
	mov	esi, DWORD PTR [rax]
	xor	eax, eax
	call	DPRINTK@PLT
	jmp	.L60
	.p2align 4,,10
	.p2align 3
.L167:
	mov	rax, QWORD PTR 32[rsp]
	lea	rdi, .LC2[rip]
	mov	esi, DWORD PTR [rax]
	xor	eax, eax
	call	DPRINTK@PLT
	jmp	.L59
	.p2align 4,,10
	.p2align 3
.L170:
	xor	esi, esi
	add	r15d, 1
	call	COMBINE@PLT
	mov	DWORD PTR 40[rbx], eax
	mov	edi, eax
	mov	eax, DWORD PTR CR_FLAGS_MASK[rip]
	jmp	.L23
.L68:
	mov	r15d, 2
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	pci230_ai_cmdtest, .-pci230_ai_cmdtest
	.comm	thisboard,8,8
	.comm	pci230_ai_bipolar,8,8
	.comm	devpriv,8,8
	.comm	TRIG_TIMER,4,4
	.comm	TRIG_ROUND_UP,4,4
	.comm	TRIG_ROUND_MASK,4,4
	.comm	TRIG_NOW,4,4
	.comm	TRIG_NONE,4,4
	.comm	TRIG_INT,4,4
	.comm	TRIG_FOLLOW,4,4
	.comm	TRIG_EXT,4,4
	.comm	TRIG_COUNT,4,4
	.comm	MIN_SPEED_AI,4,4
	.comm	MAX_SPEED_AI_SE,4,4
	.comm	MAX_SPEED_AI_PLUS,4,4
	.comm	MAX_SPEED_AI_DIFF,4,4
	.comm	CR_INVERT,4,4
	.comm	CR_FLAGS_MASK,4,4
	.comm	CR_EDGE,4,4
	.comm	AREF_DIFF,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amplc_pci230.c_pci230_ai_cmdtest.c"
	.text
	.global	__aeabi_uidivmod
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"comedi%d: amplc_pci230: ai_cmdtest: channel numbers"
	.ascii	" must increase or sequence must repeat exactly\012\000"
	.align	2
.LC1:
	.ascii	"comedi%d: amplc_pci230: ai_cmdtest: single-ended ch"
	.ascii	"annel pairs must have the same range\012\000"
	.align	2
.LC2:
	.ascii	"comedi%d: amplc_pci230: ai_cmdtest: channel sequenc"
	.ascii	"e ranges must be all bipolar or all unipolar\012\000"
	.align	2
.LC3:
	.ascii	"comedi%d: amplc_pci230: ai_cmdtest: channel sequenc"
	.ascii	"e analogue references must be all the same (single-"
	.ascii	"ended or differential)\012\000"
	.align	2
.LC4:
	.ascii	"comedi%d: amplc_pci230: ai_cmdtest: differential ch"
	.ascii	"annel number out of range 0 to %u\012\000"
	.align	2
.LC5:
	.ascii	"comedi: comedi%d: amplc_pci230: ai_cmdtest: Buggy P"
	.ascii	"CI230+/260+ h/w version %u requires first channel o"
	.ascii	"f multi-channel sequence to be 0 (corrected in h/w "
	.ascii	"version 4)\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pci230_ai_cmdtest, %function
pci230_ai_cmdtest:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r2
	ldr	r3, .L167
	ldr	r2, .L167+4
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	ip, [r4]
	orr	r2, r3, r2
	and	r2, r2, ip
	clz	lr, r2
	ldr	r5, .L167+8
	ldr	r7, .L167+12
	ldr	r5, [r5]
	ldr	r6, .L167+16
	ldr	r10, [r7]
	sub	sp, sp, #44
	ldr	r7, [r5, #4]
	ldr	r8, [r6]
	lsr	lr, lr, #5
	str	r1, [sp, #12]
	ldr	r1, .L167+20
	cmp	r2, ip
	orrne	lr, lr, #1
	orr	ip, r3, r10
	cmp	r7, #0
	str	r0, [sp, #20]
	ldr	r7, [r1]
	ldr	r0, [r4, #4]
	str	r2, [r4]
	orr	ip, ip, r8
	bne	.L2
	ldr	r1, [r5]
	cmp	r1, #0
	andle	r1, ip, r0
	ble	.L4
.L2:
	orr	r1, ip, r7
	and	r1, r1, r0
.L4:
	clz	ip, r1
	lsr	ip, ip, #5
	cmp	r0, r1
	moveq	r0, ip
	orrne	r0, ip, #1
	orr	r3, r3, r7
	cmp	r0, #0
	ldr	r0, [r4, #8]
	orr	r3, r3, r8
	and	r3, r3, r0
	addne	lr, lr, #1
	subs	r0, r3, r0
	movne	r0, #1
	cmp	r3, #0
	moveq	r0, #1
	cmp	r0, #0
	ldr	r0, .L167+24
	ldr	r9, [r4, #12]
	ldr	ip, [r0]
	addne	lr, lr, #1
	and	r5, ip, r9
	clz	r0, r5
	lsr	r0, r0, #5
	cmp	r5, r9
	orrne	r0, r0, #1
	ldr	r9, .L167+28
	ldr	fp, [r4, #16]
	ldr	r9, [r9]
	cmp	r0, #0
	orr	ip, ip, r9
	str	r1, [r4, #4]
	str	r3, [r4, #8]
	str	r5, [r4, #12]
	and	ip, ip, fp
	beq	.L7
	mov	r5, #1
	str	ip, [r4, #16]
.L1:
	mov	r0, r5
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	clz	r0, ip
	lsr	r0, r0, #5
	cmp	ip, fp
	moveq	fp, r0
	orrne	fp, r0, #1
	cmp	lr, #0
	movne	fp, #1
	cmp	fp, #0
	str	ip, [r4, #16]
	bne	.L61
	sub	r0, r2, #1
	tst	r0, r2
	movne	r2, #1
	sub	r0, r1, #1
	moveq	r2, #0
	tst	r0, r1
	sub	r0, r3, #1
	addne	r2, r2, #1
	tst	r0, r3
	sub	r0, r5, #1
	addne	r2, r2, #1
	tst	r0, r5
	sub	r0, ip, #1
	addne	r2, r2, #1
	tst	r0, ip
	bne	.L64
	cmp	r10, r1
	bne	.L152
.L12:
	cmp	r2, #0
	bne	.L64
	ldr	r5, [r4, #20]
	cmp	r5, #0
	movne	r5, #1
	strne	r2, [r4, #20]
	cmp	r3, r8
	beq	.L153
	cmp	r3, r7
	ldr	r0, [r4, #32]
	beq	.L154
	cmp	r0, #0
	movne	r2, #0
	ldr	r3, [r4, #28]
	addne	r5, r5, #1
	strne	r2, [r4, #32]
.L17:
	ldr	r2, [r4, #36]
	cmp	r2, r3
	strne	r3, [r4, #36]
	addne	r5, r5, #1
	cmp	r9, ip
	bne	.L23
	ldr	r3, [r4, #40]
	cmp	r3, #0
	movne	r3, #0
	addne	r5, r5, #1
	strne	r3, [r4, #40]
.L23:
	cmp	r7, r1
	beq	.L155
	ldr	r3, [r6]
	cmp	r3, r1
	beq	.L156
	ldr	r3, [r4, #44]
	cmp	r3, #0
	beq	.L27
	mov	r5, #3
	mov	r3, #0
	mov	r0, r5
	str	r3, [r4, #44]
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L155:
	ldr	r7, .L167+32
	ldr	r0, [r4, #44]
	ldr	r3, [r7]
	bics	r2, r0, r3
	mvn	r2, r3
	bne	.L157
	ldr	r2, .L167+36
	ldr	r2, [r2]
	bic	r2, r3, r2
	tst	r2, r0
	bne	.L26
.L27:
	cmp	r5, #0
	bne	.L29
	ldr	r3, [r6]
	ldr	r2, [r4, #8]
	cmp	r2, r3
	beq	.L30
	ldr	r2, [r4, #4]
	cmp	r2, r3
	ldreq	r7, .L167+40
	beq	.L31
.L38:
	ldr	r3, [r4, #24]
	cmp	r3, #0
	beq	.L1
	ldr	r2, [r4, #28]
	cmp	r2, #0
	ble	.L1
	mov	r6, #0
	ldr	r2, .L167+44
	mov	r9, r6
	mov	r10, r6
	str	r6, [sp, #24]
	str	r6, [sp]
	str	r6, [sp, #4]
	str	r6, [sp, #8]
	str	r2, [sp, #16]
	str	r5, [sp, #28]
	b	.L47
.L159:
	cmp	r1, #0
	bne	.L158
.L43:
	ldr	r2, [sp]
	cmp	r5, r2
	ldr	r2, [sp, #4]
	orrne	r10, r10, #8
	cmp	r3, r2
	orrne	r10, r10, #4
	cmp	fp, r5
	beq	.L41
	ldr	r2, [sp, #8]
	eor	r9, r9, r8
	subs	r2, r7, r2
	bic	r9, r9, #1
	movne	r2, #1
	cmp	r9, #0
	movne	r2, #0
	cmp	r2, #0
	orrne	r10, r10, #2
.L41:
	ldr	r2, [r4, #28]
	add	r6, r6, #1
	cmp	r2, r6
	bls	.L46
	mov	r9, r8
	stmib	sp, {r3, r7}
	ldr	r3, [r4, #24]
	str	r5, [sp]
.L47:
	ldr	r0, [r3, r6, lsl #2]
	bl	CR_CHAN
	ldr	r3, [r4, #24]
	mov	r8, r0
	ldr	r0, [r3, r6, lsl #2]
	bl	CR_RANGE
	ldr	r3, [r4, #24]
	mov	r7, r0
	ldr	r0, [r3, r6, lsl #2]
	bl	CR_AREF
	ldr	r3, [sp, #16]
	mov	r5, r0
	ldr	fp, [r3]
	ldr	r3, .L167+48
	cmp	fp, r0
	ldr	r3, [r3]
	lsl	r2, r6, #2
	ldr	r3, [r3, r7, lsl #2]
	bne	.L40
	ldr	r1, [sp, #12]
	ldr	r1, [r1]
	add	r1, r1, r1, lsr #31
	cmp	r8, r1, asr #1
	orrcs	r10, r10, #16
.L40:
	cmp	r6, #0
	beq	.L41
	ldr	r1, [sp, #24]
	cmp	r8, r9
	cmpls	r1, #0
	bne	.L159
	mov	r0, #0
	str	r6, [sp, #24]
.L42:
	ldr	r1, [r4, #24]
	ldr	ip, [r1, r2]
	ldr	r2, [r1, r0]
	cmp	ip, r2
	orrne	r10, r10, #1
	b	.L43
.L152:
	cmp	r3, r8
	beq	.L12
.L64:
	mov	r5, #2
	mov	r0, r5
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L153:
	ldr	r2, .L167+52
	ldr	r3, [r4, #28]
	ldr	r2, [r2]
	ldr	r2, [r2]
	cmp	r2, #0
	movne	r2, #4000
	bne	.L15
	ldr	r2, [r4, #24]
	cmp	r2, #0
	beq	.L67
	cmp	r3, #0
	bgt	.L160
.L67:
	mov	r2, #3200
.L15:
	ldr	r0, [r4, #32]
	cmp	r0, r2
	strcc	r2, [r4, #32]
	addcc	r5, r5, #1
	b	.L17
.L46:
	ldr	r7, .L167+52
	ldr	r1, [sp, #24]
	ldr	r3, [r7]
	cmp	r1, #0
	ldr	r8, [r3]
	ldr	r5, [sp, #28]
	sub	r8, r8, #1
	beq	.L48
	mov	r0, r6
	bl	__aeabi_uidivmod
	cmp	r1, #0
	beq	.L69
	cmp	r8, #2
	orr	r5, r10, #1
	bhi	.L150
	ldr	r3, [sp, #24]
	cmp	r3, #1
	beq	.L150
	ldr	r3, [r4, #24]
	ldr	r0, [r3]
	bl	CR_CHAN
	cmp	r0, #0
	bne	.L59
.L60:
	and	r3, r5, #1
	and	r10, r5, #32
	b	.L52
.L150:
	and	r10, r10, #32
.L50:
	ldr	r3, [sp, #20]
	ldr	r0, .L167+56
	ldr	r1, [r3]
	bl	DPRINTK
.L53:
	tst	r5, #2
	bne	.L161
.L54:
	tst	r5, #4
	bne	.L162
.L55:
	tst	r5, #8
	bne	.L163
.L56:
	tst	r5, #16
	bne	.L164
.L57:
	cmp	r10, #0
	moveq	r5, #5
	beq	.L1
	ldr	r2, [sp, #20]
	ldr	r3, [r7]
	ldr	r1, [r2]
	ldr	r0, .L167+60
	ldr	r2, [r3]
	bl	printk
	mov	r5, #5
	b	.L1
.L154:
	ldr	r8, .L167+32
	ldr	r3, [r8]
	tst	r3, r0
	beq	.L19
	bics	r2, r0, r3
	mvn	r2, r3
	bne	.L165
.L20:
	ldr	r2, .L167+64
	ldr	r1, .L167+36
	ldr	r2, [r2]
	ldr	r1, [r1]
	bic	r2, r3, r2
	and	r0, r0, r2
	cmp	r0, r1
	bne	.L21
.L149:
	ldr	r3, .L167+28
	ldr	ip, [r4, #16]
	ldr	r9, [r3]
	ldr	r3, .L167+20
	ldr	r1, [r4, #4]
	ldr	r7, [r3]
	ldr	r3, [r4, #28]
	b	.L17
.L30:
	ldr	r7, .L167+40
	ldr	r1, [r4, #48]
	ldr	r3, [r7]
	add	r0, r4, #32
	and	r1, r1, r3
	ldr	r8, [r4, #32]
	bl	pci230_ns_to_single_timer
	ldr	r3, [r4, #32]
	ldr	r2, [r4, #4]
	cmp	r3, r8
	ldr	r3, [r6]
	beq	.L36
	cmp	r2, r3
	beq	.L37
.L39:
	mov	r5, #4
	b	.L1
.L36:
	cmp	r2, r3
	bne	.L38
.L31:
	mov	r6, r4
	ldr	r3, [r7]
	ldr	r1, [r4, #48]
	ldr	r7, [r6, #44]!
	and	r1, r1, r3
	mov	r0, r6
	bl	pci230_ns_to_single_timer
	mov	r0, r4
	bl	pci230_ai_check_scan_period
	cmp	r0, #0
	beq	.L34
.L35:
	ldr	lr, [r4, #44]
	cmp	lr, r7
	orrne	fp, fp, #1
	cmp	fp, #0
	bne	.L39
	b	.L38
.L156:
	mov	r0, r4
	bl	pci230_ai_check_scan_period
	cmp	r0, #0
	bne	.L27
.L29:
	mov	r5, #3
	b	.L1
.L69:
	ldr	r6, [sp, #24]
.L48:
	cmp	r8, #2
	bls	.L166
.L51:
	cmp	r10, #0
	beq	.L1
	mov	r5, r10
	b	.L60
.L19:
	cmp	r0, #1
	ldr	r3, [r4, #28]
	movhi	r2, #1
	addhi	r5, r5, r2
	strhi	r2, [r4, #32]
	b	.L17
.L157:
	mov	r1, #0
	bl	COMBINE
	ldr	r2, .L167+36
	ldr	r3, [r7]
	ldr	r2, [r2]
	str	r0, [r4, #44]
	bic	r2, r3, r2
	tst	r0, r2
	beq	.L29
.L26:
	mov	r1, #0
	bl	COMBINE
	mov	r5, #3
	str	r0, [r4, #44]
	b	.L1
.L166:
	cmp	r6, #1
	beq	.L51
	ldr	r3, [r4, #24]
	ldr	r0, [r3]
	bl	CR_CHAN
	cmp	r0, #0
	beq	.L51
	mov	r5, r10
.L59:
	mov	r10, #32
	and	r3, r5, #1
	orr	r5, r5, r10
.L52:
	cmp	r3, #0
	beq	.L53
	b	.L50
.L21:
	ldr	r0, [r4, #20]
	bl	COMBINE
	add	r5, r5, #1
	str	r0, [r4, #32]
	b	.L149
.L160:
	ldr	r0, [r2]
	bl	CR_AREF
	ldr	r3, .L167+44
	ldr	ip, [r4, #16]
	ldr	r3, [r3]
	ldr	r1, [r4, #4]
	cmp	r0, r3
	ldr	r3, .L167+28
	moveq	r2, #8000
	ldr	r9, [r3]
	ldr	r3, .L167+20
	ldr	r7, [r3]
	ldr	r3, [r4, #28]
	bne	.L67
	b	.L15
.L37:
	mov	r6, r4
	ldr	r1, [r7]
	ldr	r3, [r4, #48]
	ldr	r7, [r6, #44]!
	and	r1, r1, r3
	mov	r0, r6
	bl	pci230_ns_to_single_timer
	mov	r0, r4
	bl	pci230_ai_check_scan_period
	cmp	r0, #0
	bne	.L39
	mov	fp, #1
.L34:
	ldr	r3, .L167+68
	mov	r0, r6
	ldr	r1, [r3]
	bl	pci230_ns_to_single_timer
	mov	r0, r4
	bl	pci230_ai_check_scan_period
	b	.L35
.L164:
	ldr	r3, [sp, #12]
	ldr	r2, [sp, #20]
	ldr	r3, [r3]
	ldr	r1, [r2]
	add	r3, r3, r3, lsr #31
	asr	r2, r3, #1
	sub	r2, r2, #1
	ldr	r0, .L167+72
	bl	DPRINTK
	b	.L57
.L163:
	ldr	r3, [sp, #20]
	ldr	r0, .L167+76
	ldr	r1, [r3]
	bl	DPRINTK
	b	.L56
.L162:
	ldr	r3, [sp, #20]
	ldr	r0, .L167+80
	ldr	r1, [r3]
	bl	DPRINTK
	b	.L55
.L161:
	ldr	r3, [sp, #20]
	ldr	r0, .L167+84
	ldr	r1, [r3]
	bl	DPRINTK
	b	.L54
.L165:
	mov	r1, #0
	bl	COMBINE
	add	r5, r5, #1
	ldr	r3, [r8]
	str	r0, [r4, #32]
	b	.L20
.L158:
	mov	r0, r6
	str	r3, [sp, #36]
	str	r2, [sp, #32]
	bl	__aeabi_uidivmod
	ldr	r2, [sp, #32]
	ldr	r3, [sp, #36]
	lsl	r0, r1, #2
	b	.L42
.L61:
	mov	r5, #1
	b	.L1
.L168:
	.align	2
.L167:
	.word	TRIG_INT
	.word	TRIG_NOW
	.word	thisboard
	.word	TRIG_FOLLOW
	.word	TRIG_TIMER
	.word	TRIG_EXT
	.word	TRIG_COUNT
	.word	TRIG_NONE
	.word	CR_FLAGS_MASK
	.word	CR_EDGE
	.word	TRIG_ROUND_MASK
	.word	AREF_DIFF
	.word	pci230_ai_bipolar
	.word	devpriv
	.word	.LC0
	.word	.LC5
	.word	CR_INVERT
	.word	TRIG_ROUND_UP
	.word	.LC4
	.word	.LC3
	.word	.LC2
	.word	.LC1
	.size	pci230_ai_cmdtest, .-pci230_ai_cmdtest
	.comm	thisboard,4,4
	.comm	pci230_ai_bipolar,4,4
	.comm	devpriv,4,4
	.comm	TRIG_TIMER,4,4
	.comm	TRIG_ROUND_UP,4,4
	.comm	TRIG_ROUND_MASK,4,4
	.comm	TRIG_NOW,4,4
	.comm	TRIG_NONE,4,4
	.comm	TRIG_INT,4,4
	.comm	TRIG_FOLLOW,4,4
	.comm	TRIG_EXT,4,4
	.comm	TRIG_COUNT,4,4
	.comm	MIN_SPEED_AI,4,4
	.comm	MAX_SPEED_AI_SE,4,4
	.comm	MAX_SPEED_AI_PLUS,4,4
	.comm	MAX_SPEED_AI_DIFF,4,4
	.comm	CR_INVERT,4,4
	.comm	CR_FLAGS_MASK,4,4
	.comm	CR_EDGE,4,4
	.comm	AREF_DIFF,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
