	.file	"extr_gpiolib-of.c_of_gpiochip_add.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	of_gpiochip_add
	.type	of_gpiochip_add, @function
of_gpiochip_add:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	r12d, DWORD PTR 4[rdi]
	test	r12d, r12d
	je	.L1
	cmp	QWORD PTR 16[rdi], 0
	mov	rbp, rdi
	je	.L3
	mov	eax, DWORD PTR [rdi]
	cmp	DWORD PTR MAX_PHANDLE_ARGS[rip], eax
	jge	.L5
.L15:
	mov	r12d, DWORD PTR EINVAL[rip]
	neg	r12d
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	rax, QWORD PTR of_gpio_simple_xlate[rip]
	mov	DWORD PTR [rdi], 2
	mov	QWORD PTR 16[rdi], rax
	mov	eax, 2
	cmp	DWORD PTR MAX_PHANDLE_ARGS[rip], eax
	jl	.L15
.L5:
	mov	rdi, rbp
	call	of_gpiochip_init_valid_mask@PLT
	mov	rdi, rbp
	call	of_gpiochip_add_pin_range@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L1
	mov	eax, DWORD PTR 8[rbp]
	mov	edi, DWORD PTR 4[rbp]
	test	eax, eax
	je	.L16
.L6:
	call	of_node_get@PLT
	mov	rdi, rbp
	call	of_gpiochip_scan_gpios@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L1
	mov	edi, DWORD PTR 4[rbp]
	call	of_node_put@PLT
	mov	rdi, rbp
	call	gpiochip_remove_pin_ranges@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L16:
	call	of_fwnode_handle@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	devprop_gpiochip_set_names@PLT
	mov	edi, DWORD PTR 4[rbp]
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	of_gpiochip_add, .-of_gpiochip_add
	.comm	of_gpio_simple_xlate,8,8
	.comm	MAX_PHANDLE_ARGS,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gpiolib-of.c_of_gpiochip_add.c"
	.text
	.align	2
	.global	of_gpiochip_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	of_gpiochip_add, %function
of_gpiochip_add:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r5, [r0, #4]
	cmp	r5, #0
	beq	.L1
	ldr	r3, [r0, #12]
	mov	r4, r0
	cmp	r3, #0
	moveq	r2, #2
	moveq	r3, r2
	ldreq	r1, .L16
	streq	r2, [r0]
	ldreq	r2, [r1]
	ldrne	r3, [r0]
	streq	r2, [r0, #12]
	ldr	r2, .L16+4
	ldr	r2, [r2]
	cmp	r2, r3
	bge	.L5
	ldr	r3, .L16+8
	ldr	r5, [r3]
	rsb	r5, r5, #0
.L1:
	mov	r0, r5
	pop	{r4, r5, r6, pc}
.L5:
	bl	of_gpiochip_init_valid_mask
	mov	r0, r4
	bl	of_gpiochip_add_pin_range
	subs	r5, r0, #0
	bne	.L1
	ldmib	r4, {r0, r3}
	cmp	r3, #0
	beq	.L15
.L6:
	bl	of_node_get
	mov	r0, r4
	bl	of_gpiochip_scan_gpios
	subs	r5, r0, #0
	beq	.L1
	ldr	r0, [r4, #4]
	bl	of_node_put
	mov	r0, r4
	bl	gpiochip_remove_pin_ranges
	b	.L1
.L15:
	bl	of_fwnode_handle
	mov	r1, r0
	mov	r0, r4
	bl	devprop_gpiochip_set_names
	ldr	r0, [r4, #4]
	b	.L6
.L17:
	.align	2
.L16:
	.word	of_gpio_simple_xlate
	.word	MAX_PHANDLE_ARGS
	.word	EINVAL
	.size	of_gpiochip_add, .-of_gpiochip_add
	.comm	of_gpio_simple_xlate,4,4
	.comm	MAX_PHANDLE_ARGS,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
