	.file	"extr_e1000_ich8lan.c_e1000_set_d3_lplu_state_ich8lan.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"e1000_set_d3_lplu_state_ich8lan"
	.text
	.p2align 4
	.type	e1000_set_d3_lplu_state_ich8lan, @function
e1000_set_d3_lplu_state_ich8lan:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	rbx, rdi
	lea	rdi, .LC0[rip]
	sub	rsp, 16
	.cfi_def_cfa_offset 48
	mov	r12, QWORD PTR E1000_SUCCESS[rip]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	DEBUGFUNC@PLT
	mov	esi, DWORD PTR E1000_PHY_CTRL[rip]
	mov	rdi, rbx
	call	E1000_READ_REG@PLT
	test	ebp, ebp
	je	.L15
	mov	rdx, QWORD PTR 24[rbx]
	cmp	rdx, QWORD PTR E1000_ALL_SPEED_DUPLEX[rip]
	je	.L6
	cmp	rdx, QWORD PTR E1000_ALL_NOT_GIG[rip]
	je	.L6
	cmp	rdx, QWORD PTR E1000_ALL_10_SPEED[rip]
	je	.L6
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L16
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	mov	rax, r12
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	or	eax, DWORD PTR E1000_PHY_CTRL_NOND0A_LPLU[rip]
	mov	esi, DWORD PTR E1000_PHY_CTRL[rip]
	mov	rdi, rbx
	mov	edx, eax
	call	E1000_WRITE_REG@PLT
	mov	rax, QWORD PTR e1000_phy_igp_3[rip]
	cmp	QWORD PTR 8[rbx], rax
	jne	.L11
	mov	rax, QWORD PTR e1000_ich8lan[rip]
	cmp	QWORD PTR [rbx], rax
	je	.L17
.L8:
	mov	esi, DWORD PTR IGP01E1000_PHY_PORT_CONFIG[rip]
	lea	rdx, 4[rsp]
	mov	rdi, rbx
	call	[QWORD PTR 40[rbx]]
	mov	r12, rax
	test	rax, rax
	jne	.L1
	mov	edx, DWORD PTR IGP01E1000_PSCFR_SMART_SPEED[rip]
	not	edx
	and	edx, DWORD PTR 4[rsp]
.L12:
	mov	DWORD PTR 4[rsp], edx
	mov	esi, DWORD PTR IGP01E1000_PHY_PORT_CONFIG[rip]
	mov	rdi, rbx
	call	[QWORD PTR 32[rbx]]
	mov	r12, rax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L15:
	mov	edx, DWORD PTR E1000_PHY_CTRL_NOND0A_LPLU[rip]
	mov	esi, DWORD PTR E1000_PHY_CTRL[rip]
	mov	rdi, rbx
	not	edx
	and	edx, eax
	call	E1000_WRITE_REG@PLT
	mov	rax, QWORD PTR e1000_phy_igp_3[rip]
	cmp	QWORD PTR 8[rbx], rax
	je	.L3
.L11:
	mov	r12, QWORD PTR E1000_SUCCESS[rip]
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rax, QWORD PTR 16[rbx]
	cmp	rax, QWORD PTR e1000_smart_speed_on[rip]
	je	.L18
	cmp	rax, QWORD PTR e1000_smart_speed_off[rip]
	jne	.L1
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L18:
	mov	esi, DWORD PTR IGP01E1000_PHY_PORT_CONFIG[rip]
	lea	rdx, 4[rsp]
	mov	rdi, rbx
	call	[QWORD PTR 40[rbx]]
	mov	r12, rax
	test	rax, rax
	jne	.L1
	mov	edx, DWORD PTR 4[rsp]
	or	edx, DWORD PTR IGP01E1000_PSCFR_SMART_SPEED[rip]
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L17:
	mov	rdi, rbx
	call	e1000_gig_downshift_workaround_ich8lan@PLT
	jmp	.L8
.L16:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	e1000_set_d3_lplu_state_ich8lan, .-e1000_set_d3_lplu_state_ich8lan
	.comm	e1000_smart_speed_on,8,8
	.comm	e1000_smart_speed_off,8,8
	.comm	e1000_phy_igp_3,8,8
	.comm	e1000_ich8lan,8,8
	.comm	IGP01E1000_PSCFR_SMART_SPEED,4,4
	.comm	IGP01E1000_PHY_PORT_CONFIG,4,4
	.comm	E1000_SUCCESS,8,8
	.comm	E1000_PHY_CTRL_NOND0A_LPLU,4,4
	.comm	E1000_PHY_CTRL,4,4
	.comm	E1000_ALL_SPEED_DUPLEX,8,8
	.comm	E1000_ALL_NOT_GIG,8,8
	.comm	E1000_ALL_10_SPEED,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_e1000_ich8lan.c_e1000_set_d3_lplu_state_ich8lan.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"e1000_set_d3_lplu_state_ich8lan\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	e1000_set_d3_lplu_state_ich8lan, %function
e1000_set_d3_lplu_state_ich8lan:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r0
	ldr	r3, .L19
	ldr	r8, .L19+4
	ldr	r7, .L19+8
	sub	sp, sp, #8
	ldr	r0, .L19+12
	mov	r6, r1
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	ldr	r5, [r8]
	bl	DEBUGFUNC
	mov	r0, r4
	ldr	r1, [r7]
	bl	E1000_READ_REG
	cmp	r6, #0
	mov	r2, r0
	beq	.L15
	ldr	r1, .L19+16
	ldr	r3, [r4, #12]
	ldr	r1, [r1]
	cmp	r3, r1
	beq	.L6
	ldr	r1, .L19+20
	ldr	r1, [r1]
	cmp	r3, r1
	beq	.L6
	ldr	r1, .L19+24
	ldr	r1, [r1]
	cmp	r3, r1
	beq	.L6
.L1:
	ldr	r3, .L19
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L16
	mov	r0, r5
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L6:
	ldr	r3, .L19+28
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r1, [r7]
	orr	r2, r2, r3
	bl	E1000_WRITE_REG
	ldr	r3, .L19+32
	ldr	r2, [r4, #4]
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L11
	ldr	r3, .L19+36
	ldr	r2, [r4]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L17
.L8:
	ldr	r6, .L19+40
	mov	r2, sp
	mov	r0, r4
	ldr	r3, [r4, #20]
	ldr	r1, [r6]
	blx	r3
	subs	r5, r0, #0
	bne	.L1
	ldr	r3, .L19+44
	ldr	r2, [sp]
	ldr	r3, [r3]
	ldr	r1, [r6]
	bic	r2, r2, r3
.L12:
	mov	r0, r4
	ldr	r3, [r4, #16]
	str	r2, [sp]
	blx	r3
	mov	r5, r0
	b	.L1
.L15:
	ldr	r3, .L19+28
	mov	r0, r4
	ldr	r3, [r3]
	ldr	r1, [r7]
	bic	r2, r2, r3
	bl	E1000_WRITE_REG
	ldr	r3, .L19+32
	ldr	r2, [r4, #4]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L3
.L11:
	ldr	r5, [r8]
	b	.L1
.L3:
	ldr	r2, .L19+48
	ldr	r3, [r4, #8]
	ldr	r2, [r2]
	cmp	r3, r2
	beq	.L18
	ldr	r2, .L19+52
	ldr	r2, [r2]
	cmp	r3, r2
	bne	.L1
	b	.L8
.L18:
	ldr	r6, .L19+40
	mov	r2, sp
	mov	r0, r4
	ldr	r3, [r4, #20]
	ldr	r1, [r6]
	blx	r3
	subs	r5, r0, #0
	bne	.L1
	ldr	r3, .L19+44
	ldr	r2, [sp]
	ldr	r3, [r3]
	ldr	r1, [r6]
	orr	r2, r2, r3
	b	.L12
.L17:
	mov	r0, r4
	bl	e1000_gig_downshift_workaround_ich8lan
	b	.L8
.L16:
	bl	__stack_chk_fail
.L20:
	.align	2
.L19:
	.word	.LC1
	.word	E1000_SUCCESS
	.word	E1000_PHY_CTRL
	.word	.LC0
	.word	E1000_ALL_SPEED_DUPLEX
	.word	E1000_ALL_NOT_GIG
	.word	E1000_ALL_10_SPEED
	.word	E1000_PHY_CTRL_NOND0A_LPLU
	.word	e1000_phy_igp_3
	.word	e1000_ich8lan
	.word	IGP01E1000_PHY_PORT_CONFIG
	.word	IGP01E1000_PSCFR_SMART_SPEED
	.word	e1000_smart_speed_on
	.word	e1000_smart_speed_off
	.size	e1000_set_d3_lplu_state_ich8lan, .-e1000_set_d3_lplu_state_ich8lan
	.comm	e1000_smart_speed_on,4,4
	.comm	e1000_smart_speed_off,4,4
	.comm	e1000_phy_igp_3,4,4
	.comm	e1000_ich8lan,4,4
	.comm	IGP01E1000_PSCFR_SMART_SPEED,4,4
	.comm	IGP01E1000_PHY_PORT_CONFIG,4,4
	.comm	E1000_SUCCESS,4,4
	.comm	E1000_PHY_CTRL_NOND0A_LPLU,4,4
	.comm	E1000_PHY_CTRL,4,4
	.comm	E1000_ALL_SPEED_DUPLEX,4,4
	.comm	E1000_ALL_NOT_GIG,4,4
	.comm	E1000_ALL_10_SPEED,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
