	.file	"extr_pktsched_fq_codel.c_fq_if_dequeue_classq_multi.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	fq_if_dequeue_classq_multi
	.type	fq_if_dequeue_classq_multi, @function
fq_if_dequeue_classq_multi:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 136
	.cfi_def_cfa_offset 192
	mov	rax, QWORD PTR 192[rsp]
	mov	QWORD PTR 72[rsp], rdi
	mov	QWORD PTR [rsp], rsi
	mov	QWORD PTR 64[rsp], rax
	mov	rax, QWORD PTR 200[rsp]
	mov	QWORD PTR 8[rsp], rdx
	mov	QWORD PTR 40[rsp], rcx
	mov	QWORD PTR 48[rsp], r8
	mov	QWORD PTR 56[rsp], r9
	mov	QWORD PTR 32[rsp], rax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 120[rsp], rax
	xor	eax, eax
	mov	QWORD PTR 88[rsp], 0
	mov	QWORD PTR 96[rsp], 0
	mov	QWORD PTR 104[rsp], 0
	mov	QWORD PTR 112[rsp], 0
	call	IFCQ_LOCK_ASSERT_HELD@PLT
	mov	rbx, QWORD PTR [rbx]
	mov	eax, DWORD PTR [rbx]
	cmp	eax, 128
	je	.L2
	xor	edi, edi
	call	VERIFY@PLT
	mov	eax, DWORD PTR [rbx]
.L2:
	mov	rsi, QWORD PTR 32[rsp]
	xor	r13d, r13d
	xor	ebp, ebp
	xor	r15d, r15d
	mov	QWORD PTR 24[rsp], 0
	mov	DWORD PTR [rsi], eax
	lea	rax, 96[rsp]
	mov	QWORD PTR 16[rsp], rax
	jmp	.L16
	.p2align 4,,10
	.p2align 3
.L10:
	lea	rax, 84[rsp]
	mov	rcx, QWORD PTR 8[rsp]
	mov	rsi, r14
	mov	rdi, rbx
	mov	rdx, QWORD PTR [rsp]
	push	rax
	.cfi_def_cfa_offset 200
	mov	eax, DWORD PTR FALSE[rip]
	sub	rcx, r13
	sub	rdx, rbp
	push	rax
	.cfi_def_cfa_offset 208
	lea	rax, 128[rsp]
	push	rax
	.cfi_def_cfa_offset 216
	lea	rax, 128[rsp]
	push	rax
	.cfi_def_cfa_offset 224
	mov	r9, QWORD PTR 48[rsp]
	lea	r8, 120[rsp]
	call	fq_if_dequeue@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 192
	cmp	QWORD PTR 88[rsp], 0
	je	.L9
	mov	rax, QWORD PTR 32[rsp]
	mov	esi, DWORD PTR 84[rsp]
	xor	edi, edi
	cmp	DWORD PTR [rax], esi
	sete	dil
	call	ASSERT@PLT
	xor	edi, edi
	cmp	QWORD PTR 104[rsp], 0
	jle	.L11
	xor	edi, edi
	cmp	QWORD PTR 112[rsp], 0
	setg	dil
.L11:
	call	ASSERT@PLT
	cmp	QWORD PTR 24[rsp], 0
	je	.L57
	mov	rsi, QWORD PTR 88[rsp]
	mov	rdi, r15
	call	fq_if_append_mbuf@PLT
	mov	r15, QWORD PTR 96[rsp]
	add	rbp, QWORD PTR 104[rsp]
	add	r13, QWORD PTR 112[rsp]
.L13:
	xor	esi, esi
	mov	rdi, r15
	call	fq_if_append_mbuf@PLT
	mov	rax, QWORD PTR 112[rsp]
	sub	QWORD PTR [r14], rax
	mov	QWORD PTR 104[rsp], 0
	mov	QWORD PTR 112[rsp], 0
.L9:
	mov	rdi, r14
	call	FQ_IF_CLASSQ_IDLE@PLT
	test	eax, eax
	jne	.L14
.L60:
	cmp	QWORD PTR [r14], 0
	jle	.L58
.L15:
	cmp	rbp, QWORD PTR [rsp]
	jge	.L4
.L61:
	cmp	r13, QWORD PTR 8[rsp]
	jge	.L4
.L16:
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR FQ_IF_ER[rip]
	lea	rdx, [rax+rdx*4]
	mov	edi, DWORD PTR [rdx]
	test	edi, edi
	jne	.L3
	mov	rcx, QWORD PTR FQ_IF_EB[rip]
	lea	rcx, [rax+rcx*4]
	mov	esi, DWORD PTR [rcx]
	test	esi, esi
	jne	.L3
	mov	rsi, QWORD PTR FQ_IF_IB[rip]
	lea	rax, [rax+rsi*4]
	mov	esi, DWORD PTR [rax]
	mov	DWORD PTR [rcx], esi
	mov	DWORD PTR [rax], 0
	mov	eax, DWORD PTR [rcx]
	test	eax, eax
	je	.L4
	mov	edi, DWORD PTR [rdx]
.L3:
	call	pktsched_ffs@PLT
	lea	r12d, -1[rax]
	test	eax, eax
	je	.L59
.L6:
	movsx	rax, r12d
	lea	rdx, [rax+rax*2]
	mov	rax, QWORD PTR 16[rbx]
	lea	r14, [rax+rdx*8]
	cmp	QWORD PTR [r14], 0
	jg	.L10
	mov	esi, DWORD PTR 12[r14]
	mov	edi, DWORD PTR 16[r14]
	call	min@PLT
	imul	eax, DWORD PTR 8[r14]
	cdqe
	add	rax, QWORD PTR [r14]
	mov	QWORD PTR [r14], rax
	test	rax, rax
	jg	.L10
	mov	rdi, r14
	call	FQ_IF_CLASSQ_IDLE@PLT
	test	eax, eax
	je	.L60
	.p2align 4,,10
	.p2align 3
.L14:
	mov	rdx, QWORD PTR FQ_IF_ER[rip]
	mov	rax, QWORD PTR 8[rbx]
	mov	edi, r12d
	lea	rsi, [rax+rdx*4]
	call	pktsched_bit_clr@PLT
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR FQ_IF_ER[rip]
	mov	ecx, r12d
	mov	edi, DWORD PTR [rax+rdx*4]
	mov	rdx, QWORD PTR FQ_IF_EB[rip]
	or	edi, DWORD PTR [rax+rdx*4]
	mov	rdx, QWORD PTR FQ_IF_IB[rip]
	or	edi, DWORD PTR [rax+rdx*4]
	sar	edi, cl
	not	edi
	and	edi, 1
	call	VERIFY@PLT
	mov	QWORD PTR [r14], 0
	cmp	rbp, QWORD PTR [rsp]
	jl	.L61
	.p2align 4,,10
	.p2align 3
.L4:
	mov	rax, QWORD PTR 24[rsp]
	test	rax, rax
	je	.L17
	mov	rbx, QWORD PTR 40[rsp]
	test	rbx, rbx
	je	.L18
	mov	QWORD PTR [rbx], rax
.L18:
	mov	rax, QWORD PTR 48[rsp]
	test	rax, rax
	je	.L19
	mov	QWORD PTR [rax], r15
.L19:
	mov	rax, QWORD PTR 56[rsp]
	test	rax, rax
	je	.L20
	mov	QWORD PTR [rax], rbp
.L20:
	mov	rax, QWORD PTR 64[rsp]
	test	rax, rax
	je	.L21
	mov	QWORD PTR [rax], r13
.L21:
	mov	rdi, QWORD PTR 72[rsp]
	mov	rdx, r13
	mov	rsi, rbp
	call	IFCQ_XMIT_ADD@PLT
.L22:
	mov	rax, QWORD PTR 120[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L62
	add	rsp, 136
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L59:
	.cfi_restore_state
	mov	rdx, QWORD PTR FQ_IF_EB[rip]
	mov	rax, QWORD PTR 8[rbx]
	mov	edi, DWORD PTR [rax+rdx*4]
	call	pktsched_ffs@PLT
	xor	edi, edi
	test	eax, eax
	mov	r12d, eax
	setg	dil
	sub	r12d, 1
	call	VERIFY@PLT
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR FQ_IF_EB[rip]
	mov	edi, r12d
	lea	rsi, [rax+rdx*4]
	call	pktsched_bit_clr@PLT
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR FQ_IF_ER[rip]
	mov	edi, r12d
	lea	rsi, [rax+rdx*4]
	call	pktsched_bit_set@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L57:
	mov	rax, QWORD PTR 88[rsp]
	mov	r15, QWORD PTR 96[rsp]
	mov	rbp, QWORD PTR 104[rsp]
	mov	r13, QWORD PTR 112[rsp]
	mov	QWORD PTR 24[rsp], rax
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L58:
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR FQ_IF_IB[rip]
	mov	edi, r12d
	lea	rsi, [rax+rdx*4]
	call	pktsched_bit_set@PLT
	mov	rax, QWORD PTR 8[rbx]
	mov	rdx, QWORD PTR FQ_IF_ER[rip]
	mov	edi, r12d
	lea	rsi, [rax+rdx*4]
	call	pktsched_bit_clr@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L17:
	mov	rax, QWORD PTR 40[rsp]
	test	rax, rax
	je	.L23
	mov	QWORD PTR [rax], 0
.L23:
	mov	rax, QWORD PTR 48[rsp]
	test	rax, rax
	je	.L24
	mov	QWORD PTR [rax], 0
.L24:
	mov	rax, QWORD PTR 56[rsp]
	test	rax, rax
	je	.L25
	mov	QWORD PTR [rax], 0
.L25:
	mov	rax, QWORD PTR 64[rsp]
	test	rax, rax
	je	.L22
	mov	QWORD PTR [rax], 0
	jmp	.L22
.L62:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	fq_if_dequeue_classq_multi, .-fq_if_dequeue_classq_multi
	.comm	FQ_IF_IB,8,8
	.comm	FQ_IF_ER,8,8
	.comm	FQ_IF_EB,8,8
	.comm	FALSE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pktsched_fq_codel.c_fq_if_dequeue_classq_multi.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	fq_if_dequeue_classq_multi
	.syntax unified
	.arm
	.fpu softvfp
	.type	fq_if_dequeue_classq_multi, %function
fq_if_dequeue_classq_multi:
	@ args = 16, pretend = 0, frame = 64
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, #0
	mov	r5, r0
	sub	sp, sp, #92
	str	r3, [sp, #44]
	ldr	r3, .L65
	str	r0, [sp, #60]
	str	r1, [sp, #24]
	str	r2, [sp, #28]
	ldr	r3, [r3]
	str	r3, [sp, #84]
	mov	r3,#0
	ldr	r3, [sp, #128]
	str	r4, [sp, #64]
	str	r3, [sp, #48]
	ldr	r3, [sp, #132]
	str	r4, [sp, #68]
	str	r3, [sp, #52]
	ldr	r3, [sp, #136]
	str	r4, [sp, #72]
	str	r3, [sp, #56]
	ldr	r3, [sp, #140]
	str	r4, [sp, #76]
	str	r3, [sp, #40]
	bl	IFCQ_LOCK_ASSERT_HELD
	ldr	r6, [r5]
	ldr	r3, [r6]
	cmp	r3, #128
	beq	.L2
	mov	r0, r4
	bl	VERIFY
	ldr	r3, [r6]
.L2:
	mov	r8, #0
	ldr	r2, [sp, #40]
	mov	r10, r8
	ldr	fp, .L65+4
	str	r8, [sp, #32]
	str	r8, [sp, #36]
	str	r3, [r2]
	b	.L16
.L10:
	ldr	r3, .L65+8
	add	r2, sp, #68
	ldr	r3, [r3]
	str	r2, [sp, #4]
	str	r3, [sp, #16]
	add	r3, sp, #64
	ldr	r2, [sp, #24]
	str	r3, [sp]
	ldr	r3, [sp, #28]
	add	ip, sp, #80
	add	r0, sp, #76
	add	r1, sp, #72
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	sub	r3, r3, r8
	mov	r1, r7
	mov	r0, r6
	str	ip, [sp, #20]
	sub	r2, r2, r10
	bl	fq_if_dequeue
	ldr	r3, [sp, #64]
	cmp	r3, #0
	beq	.L9
	ldr	r3, [sp, #40]
	ldr	r0, [r3]
	ldr	r3, [sp, #80]
	sub	r0, r0, r3
	clz	r0, r0
	lsr	r0, r0, #5
	bl	ASSERT
	ldr	r3, [sp, #72]
	cmp	r3, #0
	movle	r0, #0
	ble	.L11
	ldr	r0, [sp, #76]
	cmp	r0, #0
	movle	r0, #0
	movgt	r0, #1
.L11:
	bl	ASSERT
	ldr	r3, [sp, #36]
	cmp	r3, #0
	beq	.L60
	ldr	r1, [sp, #64]
	ldr	r0, [sp, #32]
	bl	fq_if_append_mbuf
	add	r1, sp, #68
	ldm	r1, {r1, r2, r3}
	str	r1, [sp, #32]
	add	r10, r10, r2
	add	r8, r8, r3
.L13:
	mov	r1, #0
	ldr	r0, [sp, #32]
	bl	fq_if_append_mbuf
	mov	r2, #0
	ldr	r3, [r5, r9]
	ldr	r1, [sp, #76]
	sub	r3, r3, r1
	str	r3, [r5, r9]
	str	r2, [sp, #72]
	str	r2, [sp, #76]
.L9:
	mov	r0, r7
	bl	FQ_IF_CLASSQ_IDLE
	cmp	r0, #0
	bne	.L14
.L63:
	ldr	r3, [r5, r9]
	cmp	r3, #0
	ble	.L61
.L15:
	ldr	r3, [sp, #24]
	ldr	r2, [sp, #28]
	cmp	r8, r2
	cmplt	r10, r3
	bge	.L4
.L16:
	ldr	r3, [r6, #4]
	ldr	r2, [fp]
	ldr	r0, [r3, r2, lsl #2]
	cmp	r0, #0
	bne	.L3
	ldr	r1, .L65+12
	ldr	r1, [r1]
	ldr	ip, [r3, r1, lsl #2]
	cmp	ip, #0
	bne	.L3
	ldr	ip, .L65+16
	ldr	ip, [ip]
	ldr	lr, [r3, ip, lsl #2]
	str	lr, [r3, r1, lsl #2]
	str	r0, [r3, ip, lsl #2]
	ldr	r1, [r3, r1, lsl #2]
	cmp	r1, #0
	beq	.L4
	ldr	r0, [r3, r2, lsl #2]
.L3:
	bl	pktsched_ffs
	cmp	r0, #0
	subne	r4, r0, #1
	beq	.L62
.L6:
	ldr	r5, [r6, #8]
	lsl	r9, r4, #4
	ldr	r3, [r5, r4, lsl #4]
	add	r7, r5, r4, lsl #4
	cmp	r3, #0
	bgt	.L10
	ldr	r1, [r7, #8]
	ldr	r0, [r7, #12]
	bl	min
	ldr	r2, [r7, #4]
	ldr	r3, [r5, r4, lsl #4]
	mla	r0, r2, r0, r3
	cmp	r0, #0
	str	r0, [r5, r4, lsl #4]
	bgt	.L10
	mov	r0, r7
	bl	FQ_IF_CLASSQ_IDLE
	cmp	r0, #0
	beq	.L63
.L14:
	ldr	r3, [r6, #4]
	ldr	r1, [fp]
	mov	r0, r4
	add	r1, r3, r1, lsl #2
	bl	pktsched_bit_clr
	ldr	r2, .L65+12
	ldr	r1, .L65+16
	ldr	r3, [r6, #4]
	ldr	r0, [fp]
	ldr	r2, [r2]
	ldr	r1, [r1]
	ldr	r0, [r3, r0, lsl #2]
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, [r3, r1, lsl #2]
	orr	r0, r0, r2
	orr	r0, r0, r3
	mvn	r0, r0, asr r4
	and	r0, r0, #1
	bl	VERIFY
	mov	r3, #0
	str	r3, [r5, r9]
	b	.L15
.L62:
	ldr	r5, .L65+12
	ldr	r3, [r6, #4]
	ldr	r2, [r5]
	ldr	r0, [r3, r2, lsl #2]
	bl	pktsched_ffs
	mov	r4, r0
	cmp	r0, #0
	movle	r0, #0
	movgt	r0, #1
	bl	VERIFY
	ldr	r3, [r6, #4]
	ldr	r1, [r5]
	sub	r4, r4, #1
	add	r1, r3, r1, lsl #2
	mov	r0, r4
	bl	pktsched_bit_clr
	ldr	r1, [fp]
	ldr	r3, [r6, #4]
	mov	r0, r4
	add	r1, r3, r1, lsl #2
	bl	pktsched_bit_set
	b	.L6
.L60:
	ldr	r3, [sp, #64]
	ldr	r10, [sp, #72]
	str	r3, [sp, #36]
	ldr	r3, [sp, #68]
	ldr	r8, [sp, #76]
	str	r3, [sp, #32]
	b	.L13
.L61:
	ldr	r3, .L65+16
	mov	r0, r4
	ldr	r1, [r3]
	ldr	r3, [r6, #4]
	add	r1, r3, r1, lsl #2
	bl	pktsched_bit_set
	ldr	r1, [fp]
	ldr	r3, [r6, #4]
	mov	r0, r4
	add	r1, r3, r1, lsl #2
	bl	pktsched_bit_clr
	b	.L15
.L4:
	ldr	r3, [sp, #36]
	cmp	r3, #0
	beq	.L17
	ldr	r2, [sp, #44]
	mov	r1, r10
	cmp	r2, #0
	strne	r3, [r2]
	ldr	r3, [sp, #48]
	ldr	r0, [sp, #60]
	cmp	r3, #0
	ldrne	r2, [sp, #32]
	strne	r2, [r3]
	ldr	r3, [sp, #52]
	mov	r2, r8
	cmp	r3, #0
	strne	r10, [r3]
	ldr	r3, [sp, #56]
	cmp	r3, #0
	strne	r8, [r3]
	bl	IFCQ_XMIT_ADD
.L22:
	ldr	r3, .L65
	ldr	r2, [r3]
	ldr	r3, [sp, #84]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L64
	mov	r0, #0
	add	sp, sp, #92
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L17:
	ldr	r3, [sp, #44]
	cmp	r3, #0
	ldrne	r2, [sp, #36]
	strne	r2, [r3]
	ldr	r2, [sp, #48]
	cmp	r2, #0
	movne	r3, #0
	strne	r3, [r2]
	ldr	r2, [sp, #52]
	cmp	r2, #0
	movne	r3, #0
	strne	r3, [r2]
	ldr	r2, [sp, #56]
	cmp	r2, #0
	movne	r3, #0
	strne	r3, [r2]
	b	.L22
.L64:
	bl	__stack_chk_fail
.L66:
	.align	2
.L65:
	.word	.LC0
	.word	FQ_IF_ER
	.word	FALSE
	.word	FQ_IF_EB
	.word	FQ_IF_IB
	.size	fq_if_dequeue_classq_multi, .-fq_if_dequeue_classq_multi
	.comm	FQ_IF_IB,4,4
	.comm	FQ_IF_ER,4,4
	.comm	FQ_IF_EB,4,4
	.comm	FALSE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
