	.file	"extr_sdhci-sprd.c_sdhci_sprd_set_clock.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	sdhci_sprd_set_clock, @function
sdhci_sprd_set_clock:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	test	esi, esi
	je	.L9
	mov	ebp, esi
	cmp	DWORD PTR [rdi], esi
	je	.L3
	call	sdhci_sprd_sd_clk_off@PLT
	mov	esi, ebp
	mov	rdi, r12
	call	_sdhci_sprd_set_clock@PLT
	xor	edx, edx
	cmp	ebp, 400000
	mov	rdi, r12
	setbe	dl
	mov	esi, DWORD PTR SDHCI_SPRD_BIT_CMD_DLY_INV[rip]
	or	esi, DWORD PTR SDHCI_SPRD_BIT_POSRD_DLY_INV[rip]
	call	sdhci_sprd_set_dll_invert@PLT
	cmp	DWORD PTR SDHCI_SPRD_PHY_DLL_CLK[rip], ebp
	jb	.L10
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	_sdhci_sprd_set_clock@PLT
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	edx, DWORD PTR SDHCI_CLOCK_CONTROL[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	xor	esi, esi
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	sdhci_writew@PLT
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	rdi, r12
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	sdhci_sprd_enable_phy_dll@PLT
	.cfi_endproc
.LFE0:
	.size	sdhci_sprd_set_clock, .-sdhci_sprd_set_clock
	.comm	SDHCI_SPRD_PHY_DLL_CLK,4,4
	.comm	SDHCI_SPRD_BIT_POSRD_DLY_INV,4,4
	.comm	SDHCI_SPRD_BIT_CMD_DLY_INV,4,4
	.comm	SDHCI_CLOCK_CONTROL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sdhci-sprd.c_sdhci_sprd_set_clock.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sdhci_sprd_set_clock, %function
sdhci_sprd_set_clock:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	subs	r5, r1, #0
	beq	.L9
	ldr	r3, [r0]
	mov	r4, r0
	cmp	r3, r5
	beq	.L3
	bl	sdhci_sprd_sd_clk_off
	mov	r1, r5
	mov	r0, r4
	bl	_sdhci_sprd_set_clock
	ldr	r2, .L10
	ldr	r3, .L10+4
	ldr	r1, [r2]
	ldr	r2, .L10+8
	ldr	r3, [r3]
	cmp	r5, r2
	movhi	r2, #0
	movls	r2, #1
	orr	r1, r1, r3
	mov	r0, r4
	bl	sdhci_sprd_set_dll_invert
	ldr	r3, .L10+12
	ldr	r3, [r3]
	cmp	r3, r5
	popcs	{r4, r5, r6, pc}
	mov	r0, r4
	pop	{r4, r5, r6, lr}
	b	sdhci_sprd_enable_phy_dll
.L3:
	pop	{r4, r5, r6, lr}
	b	_sdhci_sprd_set_clock
.L9:
	ldr	r3, .L10+16
	pop	{r4, r5, r6, lr}
	ldr	r2, [r3]
	b	sdhci_writew
.L11:
	.align	2
.L10:
	.word	SDHCI_SPRD_BIT_CMD_DLY_INV
	.word	SDHCI_SPRD_BIT_POSRD_DLY_INV
	.word	400000
	.word	SDHCI_SPRD_PHY_DLL_CLK
	.word	SDHCI_CLOCK_CONTROL
	.size	sdhci_sprd_set_clock, .-sdhci_sprd_set_clock
	.comm	SDHCI_SPRD_PHY_DLL_CLK,4,4
	.comm	SDHCI_SPRD_BIT_POSRD_DLY_INV,4,4
	.comm	SDHCI_SPRD_BIT_CMD_DLY_INV,4,4
	.comm	SDHCI_CLOCK_CONTROL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
