	.file	"extr_ar9003_mac.c_ar9003_hw_get_isr.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"received PCI FATAL interrupt\n"
.LC1:
	.string	"received PCI PERR interrupt\n"
.LC2:
	.string	"AR_INTR_SYNC_LOCAL_TIMEOUT\n"
	.text
	.p2align 4
	.type	ar9003_hw_get_isr, @function
ar9003_hw_get_isr:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	QWORD PTR 8[rsp], rdx
	call	ath9k_hw_common@PLT
	mov	rdi, rbp
	mov	r15d, DWORD PTR AR_INTR_MAC_IRQ[rip]
	mov	QWORD PTR 16[rsp], rax
	call	ath9k_hw_mci_is_enabled@PLT
	test	rax, rax
	je	.L2
	or	r15d, DWORD PTR AR_INTR_ASYNC_MASK_MCI[rip]
.L2:
	mov	esi, DWORD PTR AR_INTR_ASYNC_CAUSE[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	r12d, eax
	test	r15d, eax
	jne	.L91
	mov	esi, DWORD PTR AR_INTR_SYNC_CAUSE[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	and	eax, DWORD PTR AR_INTR_SYNC_DEFAULT[rip]
	mov	DWORD PTR [rbx], 0
	mov	r13d, eax
	mov	eax, r12d
	or	eax, r13d
	jne	.L5
.L1:
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L101:
	.cfi_restore_state
	mov	esi, DWORD PTR AR_ISR_S0[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	esi, DWORD PTR AR_ISR_S0[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	REG_WRITE@PLT
	mov	esi, DWORD PTR AR_ISR_S1[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	esi, DWORD PTR AR_ISR_S1[rip]
	mov	rdi, rbp
	mov	edx, eax
	call	REG_WRITE@PLT
	mov	eax, DWORD PTR AR_ISR_TXOK[rip]
	or	eax, DWORD PTR AR_ISR_TXERR[rip]
	or	eax, DWORD PTR AR_ISR_TXEOL[rip]
	not	eax
	and	r14d, eax
.L15:
	test	DWORD PTR AR_ISR_GENTMR[rip], r14d
	je	.L89
	mov	eax, DWORD PTR 32[rbp]
	test	DWORD PTR ATH9K_HW_CAP_RAC_SUPPORTED[rip], eax
	jne	.L31
	mov	esi, DWORD PTR AR_ISR_S5[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	edx, eax
.L20:
	mov	esi, DWORD PTR AR_ISR_S5_GENTIMER_TRIG[rip]
	mov	edi, edx
	mov	DWORD PTR 28[rsp], edx
	call	MS@PLT
	mov	edx, DWORD PTR 28[rsp]
	mov	esi, DWORD PTR AR_ISR_S5_GENTIMER_THRESH[rip]
	mov	QWORD PTR 0[rbp], rax
	mov	edi, edx
	call	MS@PLT
	cmp	QWORD PTR 0[rbp], 0
	mov	edx, DWORD PTR 28[rsp]
	mov	QWORD PTR 8[rbp], rax
	je	.L21
	mov	eax, DWORD PTR ATH9K_INT_GENTIMER[rip]
	or	DWORD PTR [rbx], eax
.L21:
	mov	eax, DWORD PTR 32[rbp]
	test	DWORD PTR ATH9K_HW_CAP_RAC_SUPPORTED[rip], eax
	jne	.L89
	mov	esi, DWORD PTR AR_ISR_S5[rip]
	mov	rdi, rbp
	call	REG_WRITE@PLT
	mov	eax, DWORD PTR AR_ISR_GENTMR[rip]
	not	eax
	and	r14d, eax
	.p2align 4,,10
	.p2align 3
.L89:
	mov	eax, DWORD PTR [rbx]
.L18:
	or	r15d, eax
	mov	DWORD PTR [rbx], r15d
	mov	eax, DWORD PTR 32[rbp]
	test	DWORD PTR ATH9K_HW_CAP_RAC_SUPPORTED[rip], eax
	je	.L92
.L23:
	test	DWORD PTR ATH9K_INT_BB_WATCHDOG[rip], r15d
	je	.L5
	mov	rdi, rbp
	call	ar9003_hw_bb_watchdog_read@PLT
.L5:
	test	DWORD PTR AR_INTR_ASYNC_MASK_MCI[rip], r12d
	jne	.L93
.L24:
	mov	eax, 1
	test	r13d, r13d
	je	.L1
.L102:
	mov	rax, QWORD PTR 8[rsp]
	test	rax, rax
	je	.L25
	mov	DWORD PTR [rax], r13d
.L25:
	mov	edx, DWORD PTR AR_INTR_SYNC_HOST1_FATAL[rip]
	mov	eax, DWORD PTR AR_INTR_SYNC_HOST1_PERR[rip]
	mov	ecx, edx
	or	ecx, eax
	test	ecx, r13d
	je	.L26
	test	edx, r13d
	jne	.L94
.L27:
	test	r13d, eax
	jne	.L95
.L28:
	mov	eax, DWORD PTR ATH9K_INT_FATAL[rip]
	or	DWORD PTR [rbx], eax
.L26:
	test	DWORD PTR AR_INTR_SYNC_RADM_CPL_TIMEOUT[rip], r13d
	jne	.L96
.L29:
	test	DWORD PTR AR_INTR_SYNC_LOCAL_TIMEOUT[rip], r13d
	jne	.L97
.L30:
	mov	esi, DWORD PTR AR_INTR_SYNC_CAUSE_CLR[rip]
	mov	edx, r13d
	mov	rdi, rbp
	call	REG_WRITE@PLT
	mov	esi, DWORD PTR AR_INTR_SYNC_CAUSE_CLR[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, 1
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L91:
	.cfi_restore_state
	mov	esi, DWORD PTR AR_RTC_STATUS[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	and	eax, DWORD PTR AR_RTC_STATUS_M[rip]
	cmp	eax, DWORD PTR AR_RTC_STATUS_ON[rip]
	je	.L98
	mov	esi, DWORD PTR AR_INTR_SYNC_CAUSE[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	and	eax, DWORD PTR AR_INTR_SYNC_DEFAULT[rip]
	mov	DWORD PTR [rbx], 0
	mov	r13d, eax
	test	DWORD PTR AR_INTR_ASYNC_MASK_MCI[rip], r12d
	je	.L24
	jmp	.L93
	.p2align 4,,10
	.p2align 3
.L98:
	mov	esi, DWORD PTR AR_ISR[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	esi, DWORD PTR AR_INTR_SYNC_CAUSE[rip]
	mov	rdi, rbp
	mov	r14d, eax
	call	REG_READ@PLT
	and	eax, DWORD PTR AR_INTR_SYNC_DEFAULT[rip]
	mov	DWORD PTR [rbx], 0
	mov	r13d, eax
	test	r14d, r14d
	je	.L5
	mov	r15d, r14d
	and	r15d, DWORD PTR AR_ISR_BCNMISC[rip]
	jne	.L99
.L6:
	mov	eax, DWORD PTR 32[rbp]
	test	DWORD PTR ATH9K_HW_CAP_RAC_SUPPORTED[rip], eax
	jne	.L7
.L8:
	cmp	r14d, -1
	je	.L100
	mov	eax, DWORD PTR ATH9K_INT_COMMON[rip]
	and	eax, r14d
	cmp	QWORD PTR 24[rbp], 0
	mov	DWORD PTR [rbx], eax
	je	.L11
	mov	edx, DWORD PTR AR_ISR_RXMINTR[rip]
	or	edx, DWORD PTR AR_ISR_RXINTM[rip]
	test	edx, r14d
	je	.L11
	or	eax, DWORD PTR ATH9K_INT_RXLP[rip]
	mov	DWORD PTR [rbx], eax
.L11:
	cmp	QWORD PTR 16[rbp], 0
	je	.L12
	mov	eax, DWORD PTR AR_ISR_TXMINTR[rip]
	or	eax, DWORD PTR AR_ISR_TXINTM[rip]
	test	eax, r14d
	je	.L12
	mov	eax, DWORD PTR ATH9K_INT_TX[rip]
	or	DWORD PTR [rbx], eax
.L12:
	mov	eax, DWORD PTR AR_ISR_LP_RXOK[rip]
	or	eax, DWORD PTR AR_ISR_RXERR[rip]
	test	eax, r14d
	je	.L13
	mov	eax, DWORD PTR ATH9K_INT_RXLP[rip]
	or	DWORD PTR [rbx], eax
.L13:
	test	DWORD PTR AR_ISR_HP_RXOK[rip], r14d
	je	.L14
	mov	eax, DWORD PTR ATH9K_INT_RXHP[rip]
	or	DWORD PTR [rbx], eax
.L14:
	mov	eax, DWORD PTR AR_ISR_TXOK[rip]
	or	eax, DWORD PTR AR_ISR_TXERR[rip]
	or	eax, DWORD PTR AR_ISR_TXEOL[rip]
	test	eax, r14d
	je	.L15
	mov	eax, DWORD PTR [rbx]
	or	eax, DWORD PTR ATH9K_INT_TX[rip]
	mov	DWORD PTR [rbx], eax
	mov	edx, DWORD PTR 32[rbp]
	test	DWORD PTR ATH9K_HW_CAP_RAC_SUPPORTED[rip], edx
	je	.L101
	test	DWORD PTR AR_ISR_GENTMR[rip], r14d
	je	.L18
.L31:
	mov	esi, DWORD PTR AR_ISR_S5_S[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	edx, eax
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L93:
	mov	rsi, rbx
	mov	rdi, rbp
	call	ar9003_mci_get_isr@PLT
	mov	eax, 1
	test	r13d, r13d
	je	.L1
	jmp	.L102
	.p2align 4,,10
	.p2align 3
.L97:
	mov	esi, DWORD PTR INTERRUPT[rip]
	mov	rdi, QWORD PTR 16[rsp]
	lea	rdx, .LC2[rip]
	call	ath_dbg@PLT
	jmp	.L30
	.p2align 4,,10
	.p2align 3
.L96:
	mov	edx, DWORD PTR AR_RC_HOSTIF[rip]
	mov	esi, DWORD PTR AR_RC[rip]
	mov	rdi, rbp
	call	REG_WRITE@PLT
	mov	esi, DWORD PTR AR_RC[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	REG_WRITE@PLT
	mov	eax, DWORD PTR ATH9K_INT_FATAL[rip]
	or	DWORD PTR [rbx], eax
	jmp	.L29
	.p2align 4,,10
	.p2align 3
.L99:
	mov	esi, DWORD PTR AR_ISR_S2[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	ecx, DWORD PTR MAP_ISR_S2_TIM[rip]
	mov	r15d, DWORD PTR AR_ISR_S2_DTIM[rip]
	mov	edx, eax
	mov	eax, DWORD PTR AR_ISR_S2_TIM[rip]
	and	r15d, edx
	and	eax, edx
	sar	eax, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_DTIM[rip]
	sar	r15d, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_DTIMSYNC[rip]
	or	eax, r15d
	mov	r15d, DWORD PTR AR_ISR_S2_DTIMSYNC[rip]
	and	r15d, edx
	sar	r15d, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_CABEND[rip]
	or	eax, r15d
	mov	r15d, DWORD PTR AR_ISR_S2_CABEND[rip]
	and	r15d, edx
	sar	r15d, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_GTT[rip]
	or	r15d, eax
	mov	eax, DWORD PTR AR_ISR_S2_GTT[rip]
	and	eax, edx
	sal	eax, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_CST[rip]
	or	r15d, eax
	mov	eax, DWORD PTR AR_ISR_S2_CST[rip]
	and	eax, edx
	sal	eax, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_TSFOOR[rip]
	or	eax, r15d
	mov	r15d, DWORD PTR AR_ISR_S2_TSFOOR[rip]
	and	r15d, edx
	sar	r15d, cl
	mov	ecx, DWORD PTR MAP_ISR_S2_BB_WATCHDOG[rip]
	or	eax, r15d
	mov	r15d, DWORD PTR AR_ISR_S2_BB_WATCHDOG[rip]
	and	r15d, edx
	sar	r15d, cl
	or	r15d, eax
	mov	eax, DWORD PTR 32[rbp]
	test	DWORD PTR ATH9K_HW_CAP_RAC_SUPPORTED[rip], eax
	je	.L103
.L7:
	mov	esi, DWORD PTR AR_ISR_RAC[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	r14d, eax
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L92:
	mov	esi, DWORD PTR AR_ISR[rip]
	mov	edx, r14d
	mov	rdi, rbp
	call	REG_WRITE@PLT
	mov	esi, DWORD PTR AR_ISR[rip]
	mov	rdi, rbp
	call	REG_READ@PLT
	mov	r15d, DWORD PTR [rbx]
	jmp	.L23
	.p2align 4,,10
	.p2align 3
.L100:
	mov	DWORD PTR [rbx], 0
	xor	eax, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L103:
	mov	esi, DWORD PTR AR_ISR_S2[rip]
	mov	rdi, rbp
	call	REG_WRITE@PLT
	mov	eax, DWORD PTR AR_ISR_BCNMISC[rip]
	not	eax
	and	r14d, eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L95:
	mov	esi, DWORD PTR ANY[rip]
	mov	rdi, QWORD PTR 16[rsp]
	lea	rdx, .LC1[rip]
	call	ath_dbg@PLT
	jmp	.L28
	.p2align 4,,10
	.p2align 3
.L94:
	mov	esi, DWORD PTR ANY[rip]
	mov	rdi, QWORD PTR 16[rsp]
	lea	rdx, .LC0[rip]
	call	ath_dbg@PLT
	mov	eax, DWORD PTR AR_INTR_SYNC_HOST1_PERR[rip]
	jmp	.L27
	.cfi_endproc
.LFE0:
	.size	ar9003_hw_get_isr, .-ar9003_hw_get_isr
	.comm	MAP_ISR_S2_TSFOOR,4,4
	.comm	MAP_ISR_S2_TIM,4,4
	.comm	MAP_ISR_S2_GTT,4,4
	.comm	MAP_ISR_S2_DTIMSYNC,4,4
	.comm	MAP_ISR_S2_DTIM,4,4
	.comm	MAP_ISR_S2_CST,4,4
	.comm	MAP_ISR_S2_CABEND,4,4
	.comm	MAP_ISR_S2_BB_WATCHDOG,4,4
	.comm	INTERRUPT,4,4
	.comm	ATH9K_INT_TX,4,4
	.comm	ATH9K_INT_RXLP,4,4
	.comm	ATH9K_INT_RXHP,4,4
	.comm	ATH9K_INT_GENTIMER,4,4
	.comm	ATH9K_INT_FATAL,4,4
	.comm	ATH9K_INT_COMMON,4,4
	.comm	ATH9K_INT_BB_WATCHDOG,4,4
	.comm	ATH9K_HW_CAP_RAC_SUPPORTED,4,4
	.comm	AR_RTC_STATUS_ON,4,4
	.comm	AR_RTC_STATUS_M,4,4
	.comm	AR_RTC_STATUS,4,4
	.comm	AR_RC_HOSTIF,4,4
	.comm	AR_RC,4,4
	.comm	AR_ISR_TXOK,4,4
	.comm	AR_ISR_TXMINTR,4,4
	.comm	AR_ISR_TXINTM,4,4
	.comm	AR_ISR_TXERR,4,4
	.comm	AR_ISR_TXEOL,4,4
	.comm	AR_ISR_S5_S,4,4
	.comm	AR_ISR_S5_GENTIMER_TRIG,4,4
	.comm	AR_ISR_S5_GENTIMER_THRESH,4,4
	.comm	AR_ISR_S5,4,4
	.comm	AR_ISR_S2_TSFOOR,4,4
	.comm	AR_ISR_S2_TIM,4,4
	.comm	AR_ISR_S2_GTT,4,4
	.comm	AR_ISR_S2_DTIMSYNC,4,4
	.comm	AR_ISR_S2_DTIM,4,4
	.comm	AR_ISR_S2_CST,4,4
	.comm	AR_ISR_S2_CABEND,4,4
	.comm	AR_ISR_S2_BB_WATCHDOG,4,4
	.comm	AR_ISR_S2,4,4
	.comm	AR_ISR_S1,4,4
	.comm	AR_ISR_S0,4,4
	.comm	AR_ISR_RXMINTR,4,4
	.comm	AR_ISR_RXINTM,4,4
	.comm	AR_ISR_RXERR,4,4
	.comm	AR_ISR_RAC,4,4
	.comm	AR_ISR_LP_RXOK,4,4
	.comm	AR_ISR_HP_RXOK,4,4
	.comm	AR_ISR_GENTMR,4,4
	.comm	AR_ISR_BCNMISC,4,4
	.comm	AR_ISR,4,4
	.comm	AR_INTR_SYNC_RADM_CPL_TIMEOUT,4,4
	.comm	AR_INTR_SYNC_LOCAL_TIMEOUT,4,4
	.comm	AR_INTR_SYNC_HOST1_PERR,4,4
	.comm	AR_INTR_SYNC_HOST1_FATAL,4,4
	.comm	AR_INTR_SYNC_DEFAULT,4,4
	.comm	AR_INTR_SYNC_CAUSE_CLR,4,4
	.comm	AR_INTR_SYNC_CAUSE,4,4
	.comm	AR_INTR_MAC_IRQ,4,4
	.comm	AR_INTR_ASYNC_MASK_MCI,4,4
	.comm	AR_INTR_ASYNC_CAUSE,4,4
	.comm	ANY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ar9003_mac.c_ar9003_hw_get_isr.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"received PCI FATAL interrupt\012\000"
	.align	2
.LC1:
	.ascii	"received PCI PERR interrupt\012\000"
	.align	2
.LC2:
	.ascii	"AR_INTR_SYNC_LOCAL_TIMEOUT\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ar9003_hw_get_isr, %function
ar9003_hw_get_isr:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #20
	mov	r4, r0
	mov	r6, r1
	str	r2, [sp, #4]
	bl	ath9k_hw_common
	mov	r2, r0
	ldr	r3, .L110
	mov	r0, r4
	ldr	r5, [r3]
	str	r2, [sp, #8]
	bl	ath9k_hw_mci_is_enabled
	cmp	r0, #0
	ldrne	r3, .L110+4
	mov	r0, r4
	ldrne	r3, [r3]
	orrne	r5, r5, r3
	ldr	r3, .L110+8
	ldr	r1, [r3]
	bl	REG_READ
	ands	r5, r5, r0
	mov	r7, r0
	bne	.L99
	ldr	r3, .L110+12
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	ldr	r3, .L110+16
	ldr	r3, [r3]
	str	r5, [r6]
	and	r5, r0, r3
	orrs	r0, r7, r5
	bne	.L5
.L1:
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L107:
	ldr	r3, .L110+20
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	ldr	r3, .L110+20
	mov	r2, r0
	ldr	r1, [r3]
	mov	r0, r4
	bl	REG_WRITE
	ldr	r3, .L110+24
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	ldr	r3, .L110+24
	mov	r2, r0
	ldr	r1, [r3]
	mov	r0, r4
	bl	REG_WRITE
	ldr	r2, .L110+28
	ldr	r3, [fp]
	ldr	r1, [r10]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
	bic	r8, r8, r3
.L15:
	ldr	r10, .L110+32
	ldr	r3, [r10]
	tst	r8, r3
	beq	.L97
	ldr	r2, [r4, #16]
	ldr	r3, [r9]
	tst	r2, r3
	bne	.L31
	ldr	r3, .L110+36
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	mov	fp, r0
.L20:
	ldr	r3, .L110+40
	mov	r0, fp
	ldr	r1, [r3]
	bl	MS
	ldr	r3, .L110+44
	str	r0, [r4]
	ldr	r1, [r3]
	mov	r0, fp
	bl	MS
	ldr	r3, [r4]
	str	r0, [r4, #4]
	cmp	r3, #0
	ldrne	r2, .L110+48
	ldrne	r3, [r6]
	ldrne	r2, [r2]
	orrne	r3, r3, r2
	strne	r3, [r6]
	ldr	r2, [r4, #16]
	ldr	r3, [r9]
	tst	r2, r3
	beq	.L22
.L97:
	ldr	r3, [r6]
.L18:
	ldr	r2, [sp, #12]
	orr	r3, r2, r3
	str	r3, [r6]
	ldr	r2, [r9]
	ldr	r1, [r4, #16]
	tst	r1, r2
	beq	.L100
.L23:
	ldr	r2, .L110+52
	ldr	r2, [r2]
	tst	r3, r2
	beq	.L5
	mov	r0, r4
	bl	ar9003_hw_bb_watchdog_read
.L5:
	ldr	r3, .L110+4
	ldr	r3, [r3]
	tst	r7, r3
	bne	.L101
.L24:
	cmp	r5, #0
	moveq	r0, #1
	beq	.L1
.L108:
	ldr	r3, [sp, #4]
	ldr	r7, .L110+56
	cmp	r3, #0
	strne	r5, [r3]
	ldr	r3, .L110+60
	ldr	r2, [r3]
	ldr	r3, [r7]
	orr	r1, r2, r3
	tst	r1, r5
	beq	.L26
	tst	r2, r5
	bne	.L102
.L27:
	tst	r5, r3
	bne	.L103
.L28:
	ldr	r2, .L110+64
	ldr	r3, [r6]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [r6]
.L26:
	ldr	r3, .L110+68
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L104
.L29:
	ldr	r3, .L110+72
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L105
.L30:
	ldr	r6, .L110+76
	mov	r2, r5
	ldr	r1, [r6]
	mov	r0, r4
	bl	REG_WRITE
	mov	r0, r4
	ldr	r1, [r6]
	bl	REG_READ
	mov	r0, #1
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L99:
	ldr	r3, .L110+80
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	ldr	r2, .L110+84
	ldr	r3, .L110+88
	ldr	r2, [r2]
	ldr	r3, [r3]
	and	r0, r0, r2
	cmp	r0, r3
	beq	.L106
	ldr	r3, .L110+12
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	mov	r2, #0
	ldr	r3, .L110+16
	ldr	r3, [r3]
	str	r2, [r6]
	and	r5, r0, r3
	ldr	r3, .L110+4
	ldr	r3, [r3]
	tst	r7, r3
	beq	.L24
	b	.L101
.L106:
	ldr	r3, .L110+92
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	ldr	r3, .L110+12
	mov	r8, r0
	ldr	r1, [r3]
	mov	r0, r4
	bl	REG_READ
	mov	r2, #0
	ldr	r3, .L110+16
	cmp	r8, r2
	ldr	r3, [r3]
	str	r2, [r6]
	and	r5, r0, r3
	beq	.L5
	ldr	r10, .L110+96
	ldr	r3, [r10]
	ands	r3, r8, r3
	str	r3, [sp, #12]
	bne	.L95
	ldr	r9, .L110+100
.L6:
	ldr	r2, [r4, #16]
	ldr	r3, [r9]
	tst	r2, r3
	bne	.L7
.L8:
	cmn	r8, #1
	moveq	r0, #0
	streq	r0, [r6]
	beq	.L1
	ldr	r3, .L110+104
	ldr	r2, [r4, #12]
	ldr	r3, [r3]
	cmp	r2, #0
	and	r3, r3, r8
	str	r3, [r6]
	beq	.L11
	ldr	r2, .L110+108
	ldr	r1, .L110+112
	ldr	r2, [r2]
	ldr	r1, [r1]
	orr	r2, r2, r1
	tst	r2, r8
	ldrne	r2, .L110+116
	ldrne	r2, [r2]
	orrne	r3, r2, r3
	strne	r3, [r6]
.L11:
	ldr	r3, [r4, #8]
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L110+120
	ldr	r2, .L110+124
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r2
	tst	r3, r8
	ldrne	r2, .L110+128
	ldrne	r3, [r6]
	ldrne	r2, [r2]
	orrne	r3, r3, r2
	strne	r3, [r6]
.L12:
	ldr	r3, .L110+132
	ldr	r2, .L110+136
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	fp, .L110+140
	orr	r3, r3, r2
	tst	r3, r8
	ldrne	r2, .L110+116
	ldrne	r3, [r6]
	ldrne	r2, [r2]
	ldr	r10, .L110+144
	orrne	r3, r3, r2
	strne	r3, [r6]
	ldr	r3, .L110+148
	ldr	r3, [r3]
	tst	r8, r3
	ldrne	r2, .L110+152
	ldrne	r3, [r6]
	ldrne	r2, [r2]
	orrne	r3, r3, r2
	strne	r3, [r6]
	ldr	r2, .L110+28
	ldr	r3, [fp]
	ldr	r1, [r10]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
	tst	r3, r8
	beq	.L15
	ldr	r2, .L110+128
	ldr	r3, [r6]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [r6]
	ldr	r1, [r4, #16]
	ldr	r2, [r9]
	tst	r1, r2
	beq	.L107
	ldr	r10, .L110+32
	ldr	r2, [r10]
	tst	r8, r2
	beq	.L18
.L31:
	ldr	r3, .L110+156
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	mov	fp, r0
	b	.L20
.L101:
	mov	r1, r6
	mov	r0, r4
	bl	ar9003_mci_get_isr
	cmp	r5, #0
	moveq	r0, #1
	beq	.L1
	b	.L108
.L105:
	ldr	r3, .L110+160
	ldr	r0, [sp, #8]
	ldr	r1, [r3]
	ldr	r2, .L110+164
	bl	ath_dbg
	b	.L30
.L104:
	ldr	r3, .L110+168
	ldr	r7, .L110+172
	ldr	r2, [r3]
	ldr	r1, [r7]
	mov	r0, r4
	bl	REG_WRITE
	mov	r2, #0
	mov	r0, r4
	ldr	r1, [r7]
	bl	REG_WRITE
	ldr	r2, .L110+64
	ldr	r3, [r6]
	ldr	r2, [r2]
	orr	r3, r3, r2
	str	r3, [r6]
	b	.L29
.L95:
	ldr	r3, .L110+176
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	mov	r2, r0
	ldr	r3, .L110+180
	ldr	r1, .L110+184
	ldr	ip, .L110+188
	ldr	lr, .L110+192
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	r0, .L110+196
	ldr	ip, [ip]
	ldr	r9, [lr]
	and	r3, r3, r2
	ldr	lr, .L110+200
	asr	r3, r3, r1
	and	ip, ip, r2
	ldr	r0, [r0]
	ldr	r1, .L110+204
	orr	r3, r3, ip, asr r9
	ldr	lr, [lr]
	ldr	r9, .L110+208
	and	r0, r0, r2
	ldr	r1, [r1]
	ldr	ip, .L110+212
	orr	r3, r3, r0, asr lr
	ldr	r9, [r9]
	ldr	lr, .L110+216
	and	r1, r1, r2
	ldr	ip, [ip]
	ldr	r0, .L110+220
	orr	r3, r3, r1, asr r9
	ldr	lr, [lr]
	ldr	r9, .L110+224
	and	ip, ip, r2
	ldr	r0, [r0]
	ldr	r1, .L110+228
	orr	r3, r3, ip, lsl lr
	ldr	r9, [r9]
	ldr	lr, .L110+232
	and	r0, r0, r2
	ldr	r1, [r1]
	ldr	ip, .L110+236
	orr	r3, r3, r0, lsl r9
	ldr	lr, [lr]
	ldr	r9, .L110+100
	ldr	fp, .L110+240
	and	r1, r1, r2
	ldr	ip, [ip]
	orr	r3, r3, r1, asr lr
	ldr	fp, [fp]
	ldr	r0, [r9]
	ldr	r1, [r4, #16]
	and	ip, ip, r2
	orr	r3, r3, ip, asr fp
	tst	r1, r0
	str	r3, [sp, #12]
	beq	.L109
.L7:
	ldr	r3, .L110+244
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_READ
	mov	r8, r0
	b	.L8
.L100:
	ldr	r3, .L110+92
	mov	r2, r8
	mov	r8, r3
	ldr	r1, [r3]
	mov	r0, r4
	bl	REG_WRITE
	mov	r0, r4
	ldr	r1, [r8]
	bl	REG_READ
	ldr	r3, [r6]
	b	.L23
.L109:
	ldr	r3, .L110+176
	mov	r0, r4
	ldr	r1, [r3]
	bl	REG_WRITE
	ldr	r3, [r10]
	bic	r8, r8, r3
	b	.L6
.L103:
	ldr	r3, .L110+248
	ldr	r2, .L110+252
	ldr	r1, [r3]
	ldr	r0, [sp, #8]
	bl	ath_dbg
	b	.L28
.L102:
	ldr	r3, .L110+248
	ldr	r2, .L110+256
	ldr	r1, [r3]
	ldr	r0, [sp, #8]
	bl	ath_dbg
	ldr	r3, [r7]
	b	.L27
.L22:
	ldr	r3, .L110+36
	mov	r2, fp
	ldr	r1, [r3]
	mov	r0, r4
	bl	REG_WRITE
	ldr	r2, [r10]
	ldr	r3, [r6]
	bic	r8, r8, r2
	b	.L18
.L111:
	.align	2
.L110:
	.word	AR_INTR_MAC_IRQ
	.word	AR_INTR_ASYNC_MASK_MCI
	.word	AR_INTR_ASYNC_CAUSE
	.word	AR_INTR_SYNC_CAUSE
	.word	AR_INTR_SYNC_DEFAULT
	.word	AR_ISR_S0
	.word	AR_ISR_S1
	.word	AR_ISR_TXEOL
	.word	AR_ISR_GENTMR
	.word	AR_ISR_S5
	.word	AR_ISR_S5_GENTIMER_TRIG
	.word	AR_ISR_S5_GENTIMER_THRESH
	.word	ATH9K_INT_GENTIMER
	.word	ATH9K_INT_BB_WATCHDOG
	.word	AR_INTR_SYNC_HOST1_PERR
	.word	AR_INTR_SYNC_HOST1_FATAL
	.word	ATH9K_INT_FATAL
	.word	AR_INTR_SYNC_RADM_CPL_TIMEOUT
	.word	AR_INTR_SYNC_LOCAL_TIMEOUT
	.word	AR_INTR_SYNC_CAUSE_CLR
	.word	AR_RTC_STATUS
	.word	AR_RTC_STATUS_M
	.word	AR_RTC_STATUS_ON
	.word	AR_ISR
	.word	AR_ISR_BCNMISC
	.word	ATH9K_HW_CAP_RAC_SUPPORTED
	.word	ATH9K_INT_COMMON
	.word	AR_ISR_RXMINTR
	.word	AR_ISR_RXINTM
	.word	ATH9K_INT_RXLP
	.word	AR_ISR_TXMINTR
	.word	AR_ISR_TXINTM
	.word	ATH9K_INT_TX
	.word	AR_ISR_LP_RXOK
	.word	AR_ISR_RXERR
	.word	AR_ISR_TXOK
	.word	AR_ISR_TXERR
	.word	AR_ISR_HP_RXOK
	.word	ATH9K_INT_RXHP
	.word	AR_ISR_S5_S
	.word	INTERRUPT
	.word	.LC2
	.word	AR_RC_HOSTIF
	.word	AR_RC
	.word	AR_ISR_S2
	.word	AR_ISR_S2_DTIM
	.word	MAP_ISR_S2_DTIM
	.word	AR_ISR_S2_TIM
	.word	MAP_ISR_S2_TIM
	.word	AR_ISR_S2_DTIMSYNC
	.word	MAP_ISR_S2_DTIMSYNC
	.word	AR_ISR_S2_CABEND
	.word	MAP_ISR_S2_CABEND
	.word	AR_ISR_S2_GTT
	.word	MAP_ISR_S2_GTT
	.word	AR_ISR_S2_CST
	.word	MAP_ISR_S2_CST
	.word	AR_ISR_S2_TSFOOR
	.word	MAP_ISR_S2_TSFOOR
	.word	AR_ISR_S2_BB_WATCHDOG
	.word	MAP_ISR_S2_BB_WATCHDOG
	.word	AR_ISR_RAC
	.word	ANY
	.word	.LC1
	.word	.LC0
	.size	ar9003_hw_get_isr, .-ar9003_hw_get_isr
	.comm	MAP_ISR_S2_TSFOOR,4,4
	.comm	MAP_ISR_S2_TIM,4,4
	.comm	MAP_ISR_S2_GTT,4,4
	.comm	MAP_ISR_S2_DTIMSYNC,4,4
	.comm	MAP_ISR_S2_DTIM,4,4
	.comm	MAP_ISR_S2_CST,4,4
	.comm	MAP_ISR_S2_CABEND,4,4
	.comm	MAP_ISR_S2_BB_WATCHDOG,4,4
	.comm	INTERRUPT,4,4
	.comm	ATH9K_INT_TX,4,4
	.comm	ATH9K_INT_RXLP,4,4
	.comm	ATH9K_INT_RXHP,4,4
	.comm	ATH9K_INT_GENTIMER,4,4
	.comm	ATH9K_INT_FATAL,4,4
	.comm	ATH9K_INT_COMMON,4,4
	.comm	ATH9K_INT_BB_WATCHDOG,4,4
	.comm	ATH9K_HW_CAP_RAC_SUPPORTED,4,4
	.comm	AR_RTC_STATUS_ON,4,4
	.comm	AR_RTC_STATUS_M,4,4
	.comm	AR_RTC_STATUS,4,4
	.comm	AR_RC_HOSTIF,4,4
	.comm	AR_RC,4,4
	.comm	AR_ISR_TXOK,4,4
	.comm	AR_ISR_TXMINTR,4,4
	.comm	AR_ISR_TXINTM,4,4
	.comm	AR_ISR_TXERR,4,4
	.comm	AR_ISR_TXEOL,4,4
	.comm	AR_ISR_S5_S,4,4
	.comm	AR_ISR_S5_GENTIMER_TRIG,4,4
	.comm	AR_ISR_S5_GENTIMER_THRESH,4,4
	.comm	AR_ISR_S5,4,4
	.comm	AR_ISR_S2_TSFOOR,4,4
	.comm	AR_ISR_S2_TIM,4,4
	.comm	AR_ISR_S2_GTT,4,4
	.comm	AR_ISR_S2_DTIMSYNC,4,4
	.comm	AR_ISR_S2_DTIM,4,4
	.comm	AR_ISR_S2_CST,4,4
	.comm	AR_ISR_S2_CABEND,4,4
	.comm	AR_ISR_S2_BB_WATCHDOG,4,4
	.comm	AR_ISR_S2,4,4
	.comm	AR_ISR_S1,4,4
	.comm	AR_ISR_S0,4,4
	.comm	AR_ISR_RXMINTR,4,4
	.comm	AR_ISR_RXINTM,4,4
	.comm	AR_ISR_RXERR,4,4
	.comm	AR_ISR_RAC,4,4
	.comm	AR_ISR_LP_RXOK,4,4
	.comm	AR_ISR_HP_RXOK,4,4
	.comm	AR_ISR_GENTMR,4,4
	.comm	AR_ISR_BCNMISC,4,4
	.comm	AR_ISR,4,4
	.comm	AR_INTR_SYNC_RADM_CPL_TIMEOUT,4,4
	.comm	AR_INTR_SYNC_LOCAL_TIMEOUT,4,4
	.comm	AR_INTR_SYNC_HOST1_PERR,4,4
	.comm	AR_INTR_SYNC_HOST1_FATAL,4,4
	.comm	AR_INTR_SYNC_DEFAULT,4,4
	.comm	AR_INTR_SYNC_CAUSE_CLR,4,4
	.comm	AR_INTR_SYNC_CAUSE,4,4
	.comm	AR_INTR_MAC_IRQ,4,4
	.comm	AR_INTR_ASYNC_MASK_MCI,4,4
	.comm	AR_INTR_ASYNC_CAUSE,4,4
	.comm	ANY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
