	.file	"extr_qlge_mpi.c_ql_hard_reset_mpi_risc.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	ql_hard_reset_mpi_risc
	.type	ql_hard_reset_mpi_risc, @function
ql_hard_reset_mpi_risc:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	edx, DWORD PTR CSR_CMD_SET_RST[rip]
	mov	esi, DWORD PTR CSR[rip]
	mov	ebx, DWORD PTR UDELAY_COUNT[rip]
	call	ql_write32@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L2:
	mov	edi, DWORD PTR UDELAY_DELAY[rip]
	call	mdelay@PLT
	sub	ebx, 1
	je	.L3
.L5:
	mov	esi, DWORD PTR CSR[rip]
	mov	rdi, rbp
	call	ql_read32@PLT
	test	DWORD PTR CSR_RR[rip], eax
	je	.L2
	mov	edx, DWORD PTR CSR_CMD_CLR_RST[rip]
	mov	esi, DWORD PTR CSR[rip]
	mov	rdi, rbp
	call	ql_write32@PLT
	test	ebx, ebx
	je	.L3
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	eax, DWORD PTR ETIMEDOUT[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	neg	eax
	ret
	.cfi_endproc
.LFE0:
	.size	ql_hard_reset_mpi_risc, .-ql_hard_reset_mpi_risc
	.comm	UDELAY_DELAY,4,4
	.comm	UDELAY_COUNT,4,4
	.comm	ETIMEDOUT,4,4
	.comm	CSR_RR,4,4
	.comm	CSR_CMD_SET_RST,4,4
	.comm	CSR_CMD_CLR_RST,4,4
	.comm	CSR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_qlge_mpi.c_ql_hard_reset_mpi_risc.c"
	.text
	.align	2
	.global	ql_hard_reset_mpi_risc
	.syntax unified
	.arm
	.fpu softvfp
	.type	ql_hard_reset_mpi_risc, %function
ql_hard_reset_mpi_risc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r2, .L12
	ldr	r6, .L12+4
	ldr	r3, .L12+8
	ldr	r2, [r2]
	ldr	r1, [r6]
	mov	r5, r0
	ldr	r4, [r3]
	ldr	r7, .L12+12
	bl	ql_write32
	ldr	r8, .L12+16
	b	.L5
.L2:
	ldr	r0, [r8]
	bl	mdelay
	subs	r4, r4, #1
	beq	.L3
.L5:
	mov	r0, r5
	ldr	r1, [r6]
	bl	ql_read32
	ldr	r3, [r7]
	tst	r0, r3
	beq	.L2
	ldr	r3, .L12+20
	mov	r0, r5
	ldr	r1, [r6]
	ldr	r2, [r3]
	bl	ql_write32
	cmp	r4, #0
	beq	.L3
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L3:
	ldr	r3, .L12+24
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L13:
	.align	2
.L12:
	.word	CSR_CMD_SET_RST
	.word	CSR
	.word	UDELAY_COUNT
	.word	CSR_RR
	.word	UDELAY_DELAY
	.word	CSR_CMD_CLR_RST
	.word	ETIMEDOUT
	.size	ql_hard_reset_mpi_risc, .-ql_hard_reset_mpi_risc
	.comm	UDELAY_DELAY,4,4
	.comm	UDELAY_COUNT,4,4
	.comm	ETIMEDOUT,4,4
	.comm	CSR_RR,4,4
	.comm	CSR_CMD_SET_RST,4,4
	.comm	CSR_CMD_CLR_RST,4,4
	.comm	CSR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
