	.file	"extr_mv64x60_pic.c_mv64x60_unmask_low.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mv64x60_unmask_low, @function
mv64x60_unmask_low:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	edi, edi
	xor	ebp, ebp
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rsi, rbp
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	rax, QWORD PTR irq_map[rip]
	mov	ebx, DWORD PTR [rax+rdi*4]
	lea	rdi, mv64x60_lock[rip]
	and	ebx, DWORD PTR MV64x60_LEVEL2_MASK[rip]
	call	spin_lock_irqsave@PLT
	mov	ecx, ebx
	mov	esi, 1
	mov	rdi, QWORD PTR MV64X60_IC_CPU0_INTR_MASK_LO[rip]
	sal	esi, cl
	add	rdi, QWORD PTR mv64x60_irq_reg_base[rip]
	or	esi, DWORD PTR mv64x60_cached_low_mask[rip]
	mov	DWORD PTR mv64x60_cached_low_mask[rip], esi
	call	out_le32@PLT
	mov	rsi, rbp
	lea	rdi, mv64x60_lock[rip]
	call	spin_unlock_irqrestore@PLT
	mov	rdi, QWORD PTR MV64X60_IC_CPU0_INTR_MASK_LO[rip]
	add	rdi, QWORD PTR mv64x60_irq_reg_base[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	in_le32@PLT
	.cfi_endproc
.LFE0:
	.size	mv64x60_unmask_low, .-mv64x60_unmask_low
	.comm	mv64x60_lock,4,4
	.comm	mv64x60_irq_reg_base,8,8
	.comm	mv64x60_cached_low_mask,4,4
	.comm	irq_map,8,8
	.comm	MV64x60_LEVEL2_MASK,4,4
	.comm	MV64X60_IC_CPU0_INTR_MASK_LO,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mv64x60_pic.c_mv64x60_unmask_low.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mv64x60_unmask_low, %function
mv64x60_unmask_low:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r8, #0
	ldr	r2, .L4
	ldr	r3, .L4+4
	ldr	r2, [r2]
	ldr	r7, .L4+8
	ldr	r4, [r2, r0, lsl #2]
	ldr	r3, [r3]
	mov	r1, r8
	mov	r0, r7
	and	r4, r4, r3
	bl	spin_lock_irqsave
	mov	r2, #1
	ldr	r3, .L4+12
	ldr	r6, .L4+16
	ldr	r1, [r3]
	ldr	r5, .L4+20
	orr	r1, r1, r2, lsl r4
	ldr	r0, [r6]
	ldr	r2, [r5]
	str	r1, [r3]
	add	r0, r0, r2
	bl	out_le32
	mov	r1, r8
	mov	r0, r7
	bl	spin_unlock_irqrestore
	ldr	r0, [r6]
	ldr	r3, [r5]
	pop	{r4, r5, r6, r7, r8, lr}
	add	r0, r0, r3
	b	in_le32
.L5:
	.align	2
.L4:
	.word	irq_map
	.word	MV64x60_LEVEL2_MASK
	.word	mv64x60_lock
	.word	mv64x60_cached_low_mask
	.word	mv64x60_irq_reg_base
	.word	MV64X60_IC_CPU0_INTR_MASK_LO
	.size	mv64x60_unmask_low, .-mv64x60_unmask_low
	.comm	mv64x60_lock,4,4
	.comm	mv64x60_irq_reg_base,4,4
	.comm	mv64x60_cached_low_mask,4,4
	.comm	irq_map,4,4
	.comm	MV64x60_LEVEL2_MASK,4,4
	.comm	MV64X60_IC_CPU0_INTR_MASK_LO,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
