	.file	"extr_asm.c_dcpu16_assemble.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"SET"
.LC1:
	.string	"ADD"
.LC2:
	.string	"SUB"
.LC3:
	.string	"MUL"
.LC4:
	.string	"DIV"
.LC5:
	.string	"MOD"
.LC6:
	.string	"SHL"
.LC7:
	.string	"SHR"
.LC8:
	.string	"AND"
.LC9:
	.string	"BOR"
.LC10:
	.string	"XOR"
.LC11:
	.string	"IFE"
.LC12:
	.string	"IFN"
.LC13:
	.string	"IFG"
.LC14:
	.string	"IFB"
.LC15:
	.string	"JSR"
.LC16:
	.string	"Unknown instruction\n"
.LC17:
	.string	"Missing comma\n"
	.text
	.p2align 4
	.globl	dcpu16_assemble
	.type	dcpu16_assemble, @function
dcpu16_assemble:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pxor	xmm0, xmm0
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	rbx, rdi
	sub	rsp, 288
	.cfi_def_cfa_offset 336
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 280[rsp], rax
	xor	eax, eax
	lea	rbp, 16[rsp]
	mov	DWORD PTR [rsp], 0
	mov	rdi, rbp
	mov	DWORD PTR 4[rsp], 0
	movaps	XMMWORD PTR 16[rsp], xmm0
	movaps	XMMWORD PTR 32[rsp], xmm0
	movaps	XMMWORD PTR 48[rsp], xmm0
	movaps	XMMWORD PTR 64[rsp], xmm0
	movaps	XMMWORD PTR 80[rsp], xmm0
	movaps	XMMWORD PTR 96[rsp], xmm0
	movaps	XMMWORD PTR 112[rsp], xmm0
	movaps	XMMWORD PTR 128[rsp], xmm0
	movaps	XMMWORD PTR 144[rsp], xmm0
	movaps	XMMWORD PTR 160[rsp], xmm0
	movaps	XMMWORD PTR 176[rsp], xmm0
	movaps	XMMWORD PTR 192[rsp], xmm0
	movaps	XMMWORD PTR 208[rsp], xmm0
	movaps	XMMWORD PTR 224[rsp], xmm0
	movaps	XMMWORD PTR 240[rsp], xmm0
	movaps	XMMWORD PTR 256[rsp], xmm0
	call	clean_line@PLT
	cmp	BYTE PTR 16[rsp], 0
	jne	.L2
.L4:
	xor	eax, eax
.L1:
	mov	rbx, QWORD PTR 280[rsp]
	xor	rbx, QWORD PTR fs:40
	jne	.L50
	add	rsp, 288
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	rdi, rbp
	call	strlen@PLT
	cmp	eax, 3
	jle	.L4
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC0[rip]
	mov	r12d, 1
	call	strncmp@PLT
	test	eax, eax
	jne	.L51
.L5:
	lea	r14, 19[rsp]
	mov	rcx, -3
	lea	rdi, 275[rsp]
	movabs	r8, 17592186045441
	mov	rax, r14
	sub	rcx, rbp
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L11:
	add	rax, 1
	cmp	rdi, rax
	je	.L52
.L9:
	movzx	edx, BYTE PTR [rax]
	lea	rbp, [rcx+rax]
	mov	rsi, rax
	cmp	dl, 44
	ja	.L11
	bt	r8, rdx
	jnc	.L11
.L10:
	cmp	dl, 44
	jne	.L12
	mov	BYTE PTR [rsi], 0
	mov	rdx, rsp
	mov	rdi, r14
	lea	rsi, 8[rsp]
	mov	DWORD PTR 8[rsp], 0
	mov	DWORD PTR 12[rsp], 0
	call	decode_parameter@PLT
	lea	rdx, 4[rsp]
	lea	rsi, 12[rsp]
	lea	rdi, 1[r14+rbp]
	mov	r13d, eax
	call	decode_parameter@PLT
	sal	r13d, 4
	sal	eax, 10
	and	r13d, 1008
	movzx	eax, ax
	or	eax, r13d
	or	r12d, eax
	shr	eax, 8
	and	r12d, 255
	cmp	DWORD PTR 8[rsp], 1
	mov	DWORD PTR [rbx], eax
	mov	eax, 2
	mov	DWORD PTR 4[rbx], r12d
	jne	.L13
	mov	eax, DWORD PTR [rsp]
	movzx	edx, ah
	and	eax, 255
	mov	DWORD PTR 8[rbx], edx
	mov	DWORD PTR 12[rbx], eax
	mov	eax, 4
.L13:
	cmp	DWORD PTR 12[rsp], 1
	jne	.L1
	mov	edx, DWORD PTR 4[rsp]
	movsx	rcx, eax
	add	eax, 2
	movzx	esi, dh
	and	edx, 255
	mov	DWORD PTR [rbx+rcx*4], esi
	mov	DWORD PTR 4[rbx+rcx*4], edx
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L51:
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC1[rip]
	mov	r12d, 2
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC2[rip]
	mov	r12d, 3
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC3[rip]
	mov	r12d, 4
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC4[rip]
	mov	r12d, 5
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC5[rip]
	mov	r12d, 6
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC6[rip]
	mov	r12d, 7
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC7[rip]
	mov	r12d, 8
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC8[rip]
	mov	r12d, 9
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC9[rip]
	mov	r12d, 10
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC10[rip]
	mov	r12d, 11
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC11[rip]
	mov	r12d, 12
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC12[rip]
	mov	r12d, 13
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC13[rip]
	mov	r12d, 14
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC14[rip]
	mov	r12d, 15
	call	strncmp@PLT
	test	eax, eax
	je	.L5
	mov	edx, 3
	mov	rsi, rbp
	lea	rdi, .LC15[rip]
	call	strncmp@PLT
	test	eax, eax
	jne	.L53
	lea	rdx, 12[rsp]
	lea	rsi, 8[rsp]
	mov	DWORD PTR 8[rsp], 0
	lea	rdi, 19[rsp]
	mov	DWORD PTR 12[rsp], 0
	call	decode_parameter@PLT
	mov	DWORD PTR 4[rbx], 16
	sal	eax, 2
	and	eax, 252
	cmp	DWORD PTR 8[rsp], 1
	mov	DWORD PTR [rbx], eax
	mov	eax, 2
	jne	.L1
	mov	eax, DWORD PTR 12[rsp]
	movzx	edx, ah
	and	eax, 255
	mov	DWORD PTR 12[rbx], eax
	mov	eax, 4
	mov	DWORD PTR 8[rbx], edx
	jmp	.L1
.L52:
	movzx	edx, BYTE PTR 275[rsp]
	mov	rsi, rdi
	mov	ebp, 256
	jmp	.L10
.L12:
	mov	edi, DWORD PTR stderr[rip]
	lea	rsi, .LC17[rip]
	call	fprintf@PLT
	mov	eax, -1
	jmp	.L1
.L50:
	call	__stack_chk_fail@PLT
.L53:
	mov	edi, DWORD PTR stderr[rip]
	lea	rsi, .LC16[rip]
	call	fprintf@PLT
	or	eax, -1
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	dcpu16_assemble, .-dcpu16_assemble
	.comm	stderr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_asm.c_dcpu16_assemble.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"BOR\000"
	.align	2
.LC1:
	.ascii	"XOR\000"
	.align	2
.LC2:
	.ascii	"IFE\000"
	.align	2
.LC3:
	.ascii	"IFN\000"
	.align	2
.LC4:
	.ascii	"IFG\000"
	.align	2
.LC5:
	.ascii	"IFB\000"
	.align	2
.LC6:
	.ascii	"JSR\000"
	.align	2
.LC7:
	.ascii	"Unknown instruction\012\000"
	.align	2
.LC8:
	.ascii	"Missing comma\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	dcpu16_assemble
	.syntax unified
	.arm
	.fpu softvfp
	.type	dcpu16_assemble, %function
dcpu16_assemble:
	@ args = 0, pretend = 0, frame = 280
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, #0
	mov	r6, r1
	sub	sp, sp, #280
	ldr	r3, .L60
	mov	r1, r4
	mov	r2, #252
	mov	r5, r0
	add	r0, sp, #24
	ldr	r3, [r3]
	str	r3, [sp, #276]
	mov	r3,#0
	str	r4, [sp, #4]
	str	r4, [sp, #8]
	str	r4, [sp, #20]
	bl	memset
	mov	r1, r6
	add	r0, sp, #20
	bl	clean_line
	ldrb	r0, [sp, #20]	@ zero_extendqisi2
	cmp	r0, r4
	beq	.L1
	add	r0, sp, #20
	bl	strlen
	cmp	r0, #3
	movle	r0, r4
	ble	.L1
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #83
	bne	.L41
	ldrb	r3, [sp, #21]	@ zero_extendqisi2
	cmp	r3, #69
	beq	.L53
.L41:
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #65
	bne	.L42
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #68
	bne	.L42
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #68
	moveq	r6, #2
	bne	.L42
.L4:
	mov	r4, #0
	add	r2, sp, #23
	b	.L16
.L18:
	add	r4, r4, #1
	cmp	r4, #256
	beq	.L54
.L16:
	ldrb	r3, [r2]	@ zero_extendqisi2
	mov	r1, r2
	cmp	r3, #10
	cmpne	r3, #44
	movne	r2, #1
	moveq	r2, #0
	cmp	r3, #0
	moveq	r2, #0
	cmp	r2, #0
	add	r2, r1, #1
	bne	.L18
.L17:
	cmp	r3, #44
	bne	.L19
	mov	r3, #0
	add	r7, sp, #23
	strb	r3, [r1]
	add	r2, sp, #4
	add	r1, sp, #12
	mov	r0, r7
	str	r3, [sp, #12]
	str	r3, [sp, #16]
	bl	decode_parameter
	add	r4, r4, #1
	add	r2, sp, #8
	mov	r8, r0
	add	r1, sp, #16
	add	r0, r7, r4
	bl	decode_parameter
	ldr	r3, .L60+4
	lsl	r8, r8, #4
	and	r0, r3, r0, lsl #10
	ldr	r3, [sp, #12]
	and	r8, r8, #1008
	cmp	r3, #1
	ldreq	r3, [sp, #4]
	orr	r0, r0, r8
	asreq	r2, r3, #8
	andeq	r3, r3, #255
	orr	r6, r0, r6
	streq	r3, [r5, #12]
	ldr	r3, [sp, #16]
	lsr	r0, r0, #8
	andeq	r2, r2, #255
	and	r6, r6, #255
	stm	r5, {r0, r6}
	streq	r2, [r5, #8]
	moveq	r0, #4
	movne	r0, #2
	cmp	r3, #1
	bne	.L1
	ldr	r3, [sp, #8]
	add	r1, r5, r0, lsl #2
	asr	r2, r3, #8
	and	r2, r2, #255
	and	r3, r3, #255
	str	r2, [r5, r0, lsl #2]
	str	r3, [r1, #4]
	add	r0, r0, #2
.L1:
	ldr	r3, .L60
	ldr	r2, [r3]
	ldr	r3, [sp, #276]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L55
	add	sp, sp, #280
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L42:
	cmp	r3, #83
	bne	.L43
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #85
	beq	.L56
.L43:
	cmp	r3, #77
	bne	.L44
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #85
	bne	.L44
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #76
	moveq	r6, #4
	beq	.L4
.L44:
	cmp	r3, #68
	bne	.L45
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #73
	bne	.L45
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #86
	moveq	r6, #5
	beq	.L4
.L45:
	cmp	r3, #77
	bne	.L46
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #79
	bne	.L46
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #68
	moveq	r6, #6
	beq	.L4
.L46:
	cmp	r3, #83
	beq	.L57
.L48:
	cmp	r3, #65
	bne	.L49
	ldrb	r3, [sp, #21]	@ zero_extendqisi2
	cmp	r3, #78
	bne	.L49
	ldrb	r3, [sp, #22]	@ zero_extendqisi2
	cmp	r3, #68
	moveq	r6, #9
	beq	.L4
.L49:
	mov	r2, #3
	ldr	r0, .L60+8
	add	r1, sp, #20
	bl	strncmp
	cmp	r0, #0
	beq	.L34
	mov	r2, #3
	ldr	r0, .L60+12
	add	r1, sp, #20
	bl	strncmp
	cmp	r0, #0
	beq	.L35
	mov	r2, #3
	ldr	r0, .L60+16
	add	r1, sp, #20
	bl	strncmp
	cmp	r0, #0
	beq	.L36
	mov	r2, #3
	ldr	r0, .L60+20
	add	r1, sp, #20
	bl	strncmp
	cmp	r0, #0
	beq	.L37
	mov	r2, #3
	ldr	r0, .L60+24
	add	r1, sp, #20
	bl	strncmp
	cmp	r0, #0
	beq	.L38
	mov	r2, #3
	ldr	r0, .L60+28
	add	r1, sp, #20
	bl	strncmp
	cmp	r0, #0
	beq	.L39
	mov	r2, #3
	ldr	r0, .L60+32
	add	r1, sp, #20
	bl	strncmp
	subs	r3, r0, #0
	bne	.L58
	add	r2, sp, #16
	add	r1, sp, #12
	add	r0, sp, #23
	str	r3, [sp, #12]
	str	r3, [sp, #16]
	bl	decode_parameter
	mov	r2, #16
	ldr	r1, [sp, #12]
	lsl	r3, r0, #2
	and	r3, r3, #252
	cmp	r1, #1
	movne	r0, #2
	str	r3, [r5]
	str	r2, [r5, #4]
	bne	.L1
	ldr	r3, [sp, #16]
	mov	r0, #4
	asr	r2, r3, #8
	and	r2, r2, #255
	and	r3, r3, #255
	str	r2, [r5, #8]
	str	r3, [r5, #12]
	b	.L1
.L53:
	ldrb	r3, [sp, #22]	@ zero_extendqisi2
	cmp	r3, #84
	moveq	r6, #1
	beq	.L4
	b	.L41
.L56:
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #66
	moveq	r6, #3
	beq	.L4
	b	.L43
.L54:
	add	r1, sp, #276
	ldrb	r3, [sp, #279]	@ zero_extendqisi2
	add	r1, r1, #3
	b	.L17
.L19:
	ldr	r3, .L60+36
	ldr	r1, .L60+40
	ldr	r0, [r3]
	bl	fprintf
	mvn	r0, #0
	b	.L1
.L57:
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #72
	beq	.L59
.L47:
	cmp	r3, #83
	bne	.L48
	ldrb	r2, [sp, #21]	@ zero_extendqisi2
	cmp	r2, #72
	bne	.L48
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #82
	moveq	r6, #8
	beq	.L4
	b	.L48
.L59:
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	cmp	r2, #76
	moveq	r6, #7
	beq	.L4
	b	.L47
.L55:
	bl	__stack_chk_fail
.L34:
	mov	r6, #10
	b	.L4
.L35:
	mov	r6, #11
	b	.L4
.L58:
	ldr	r3, .L60+36
	ldr	r1, .L60+44
	ldr	r0, [r3]
	bl	fprintf
	mvn	r0, #0
	b	.L1
.L39:
	mov	r6, #15
	b	.L4
.L38:
	mov	r6, #14
	b	.L4
.L37:
	mov	r6, #13
	b	.L4
.L36:
	mov	r6, #12
	b	.L4
.L61:
	.align	2
.L60:
	.word	.LC9
	.word	65535
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	stderr
	.word	.LC8
	.word	.LC7
	.size	dcpu16_assemble, .-dcpu16_assemble
	.comm	stderr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
