	.file	"extr_logic.c_gl_logicop_rgba_span.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Bad function in gl_logicop_rgba_span"
	.text
	.p2align 4
	.globl	gl_logicop_rgba_span
	.type	gl_logicop_rgba_span, @function
gl_logicop_rgba_span:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	mov	r12, r9
	push	rbx
	.cfi_offset 3, -56
	mov	rbx, r8
	sub	rsp, 88
	mov	r14, QWORD PTR 16[rbp]
	mov	r15, QWORD PTR 24[rbp]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	movsx	rax, DWORD PTR MAX_WIDTH[rip]
	mov	r11, rsp
	mov	QWORD PTR -72[rbp], rsp
	mov	r13, QWORD PTR 32[rbp]
	lea	rax, 15[0+rax*4]
	mov	r9, rax
	mov	r8, rax
	and	r9, -4096
	and	r8, -16
	sub	r11, r9
	mov	r9, r11
	cmp	rsp, r9
	je	.L3
.L139:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, r9
	jne	.L139
.L3:
	and	r8d, 4095
	sub	rsp, r8
	test	r8, r8
	jne	.L140
.L4:
	mov	r10, rax
	mov	r11, rsp
	mov	r9, rax
	mov	r8, rsp
	and	r10, -4096
	and	r9, -16
	sub	r11, r10
	mov	r10, r11
	cmp	rsp, r10
	je	.L6
.L141:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, r10
	jne	.L141
.L6:
	and	r9d, 4095
	sub	rsp, r9
	test	r9, r9
	jne	.L142
.L7:
	mov	r11, rax
	mov	r10, rax
	mov	r9, rsp
	and	r11, -16
	and	r10, -4096
	mov	QWORD PTR -80[rbp], r11
	mov	r11, rsp
	sub	r11, r10
	mov	r10, r11
	mov	r11, QWORD PTR -80[rbp]
	cmp	rsp, r10
	je	.L9
.L143:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, r10
	jne	.L143
.L9:
	and	r11d, 4095
	sub	rsp, r11
	test	r11, r11
	je	.L10
	or	QWORD PTR -8[rsp+r11], 0
.L10:
	mov	r11, rax
	and	rax, -4096
	mov	r10, rsp
	and	r11, -16
	mov	QWORD PTR -80[rbp], r11
	mov	r11, rsp
	sub	r11, rax
	mov	rax, r11
	mov	r11, QWORD PTR -80[rbp]
	cmp	rsp, rax
	je	.L12
.L144:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, rax
	jne	.L144
.L12:
	and	r11d, 4095
	sub	rsp, r11
	test	r11, r11
	je	.L13
	or	QWORD PTR -8[rsp+r11], 0
.L13:
	mov	r11, rsp
	push	r11
	mov	QWORD PTR -120[rbp], r11
	push	r10
	mov	QWORD PTR -80[rbp], rdi
	mov	QWORD PTR -112[rbp], r10
	mov	QWORD PTR -104[rbp], r9
	mov	QWORD PTR -96[rbp], r8
	mov	QWORD PTR -88[rbp], rsi
	call	gl_read_color_span@PLT
	mov	rdi, QWORD PTR -80[rbp]
	pop	r11
	pop	rax
	mov	eax, DWORD PTR 8[rdi]
	add	eax, -128
	cmp	eax, 15
	ja	.L14
	lea	rdx, .L16[rip]
	mov	rsi, QWORD PTR -88[rbp]
	mov	r8, QWORD PTR -96[rbp]
	movsx	rax, DWORD PTR [rdx+rax*4]
	mov	r9, QWORD PTR -104[rbp]
	mov	r10, QWORD PTR -112[rbp]
	mov	r11, QWORD PTR -120[rbp]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L16:
	.long	.L31-.L16
	.long	.L30-.L16
	.long	.L29-.L16
	.long	.L28-.L16
	.long	.L27-.L16
	.long	.L26-.L16
	.long	.L25-.L16
	.long	.L24-.L16
	.long	.L23-.L16
	.long	.L22-.L16
	.long	.L21-.L16
	.long	.L20-.L16
	.long	.L19-.L16
	.long	.L18-.L16
	.long	.L17-.L16
	.long	.L15-.L16
	.text
	.p2align 4,,10
	.p2align 3
.L140:
	or	QWORD PTR -8[rsp+r8], 0
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L142:
	or	QWORD PTR -8[rsp+r9], 0
	jmp	.L7
.L30:
	mov	rax, QWORD PTR [rdi]
	mov	edx, DWORD PTR 12[rax]
	mov	ecx, DWORD PTR 8[rax]
	mov	edi, DWORD PTR 4[rax]
	mov	r8d, DWORD PTR [rax]
	test	rsi, rsi
	je	.L20
	xor	eax, eax
	.p2align 4,,10
	.p2align 3
.L49:
	mov	r9d, DWORD PTR 0[r13+rax*4]
	test	r9d, r9d
	je	.L48
	mov	DWORD PTR [rbx+rax*4], edx
	mov	DWORD PTR [r12+rax*4], ecx
	mov	DWORD PTR [r14+rax*4], edi
	mov	DWORD PTR [r15+rax*4], r8d
.L48:
	add	rax, 1
	cmp	rsi, rax
	jne	.L49
	.p2align 4,,10
	.p2align 3
.L20:
	mov	rsp, QWORD PTR -72[rbp]
.L1:
	mov	rax, QWORD PTR -56[rbp]
	xor	rax, QWORD PTR fs:40
	jne	.L145
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa 7, 8
	ret
.L21:
	.cfi_restore_state
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L37:
	mov	r8d, DWORD PTR 0[r13+rax*4]
	test	r8d, r8d
	je	.L50
	not	DWORD PTR [rbx+rax*4]
	not	DWORD PTR [r12+rax*4]
	not	DWORD PTR [r14+rax*4]
	not	DWORD PTR [r15+rax*4]
.L50:
	add	rax, 1
	cmp	rsi, rax
	jne	.L37
	jmp	.L20
.L29:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L45:
	mov	ecx, DWORD PTR 0[r13+rax*4]
	test	ecx, ecx
	je	.L61
	mov	edx, DWORD PTR [r8+rax*4]
	not	edx
	or	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	not	edx
	or	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	not	edx
	or	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	not	edx
	or	DWORD PTR [r15+rax*4], edx
.L61:
	add	rax, 1
	cmp	rsi, rax
	jne	.L45
	jmp	.L20
.L31:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L46:
	mov	edi, DWORD PTR 0[r13+rax*4]
	test	edi, edi
	je	.L57
	mov	edx, DWORD PTR [r8+rax*4]
	xor	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	xor	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	xor	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	xor	DWORD PTR [r15+rax*4], edx
.L57:
	add	rax, 1
	cmp	rsi, rax
	jne	.L46
	jmp	.L20
.L15:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L32:
	mov	edx, DWORD PTR 0[r13+rax*4]
	test	edx, edx
	je	.L53
	mov	edx, DWORD PTR [r8+rax*4]
	and	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	and	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	and	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	and	DWORD PTR [r15+rax*4], edx
.L53:
	add	rax, 1
	cmp	rsi, rax
	jne	.L32
	jmp	.L20
.L17:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L33:
	mov	edi, DWORD PTR 0[r13+rax*4]
	test	edi, edi
	je	.L60
	mov	edx, DWORD PTR [rbx+rax*4]
	not	edx
	and	edx, DWORD PTR [r8+rax*4]
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r12+rax*4]
	not	edx
	and	edx, DWORD PTR [r9+rax*4]
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r14+rax*4]
	not	edx
	and	edx, DWORD PTR [r10+rax*4]
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r15+rax*4]
	not	edx
	and	edx, DWORD PTR [r11+rax*4]
	mov	DWORD PTR [r15+rax*4], edx
.L60:
	add	rax, 1
	cmp	rsi, rax
	jne	.L33
	jmp	.L20
.L18:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L35:
	mov	edx, DWORD PTR 0[r13+rax*4]
	test	edx, edx
	je	.L59
	mov	edx, DWORD PTR [r8+rax*4]
	not	edx
	and	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	not	edx
	and	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	not	edx
	and	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	not	edx
	and	DWORD PTR [r15+rax*4], edx
.L59:
	add	rax, 1
	cmp	rsi, rax
	jne	.L35
	jmp	.L20
.L19:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L36:
	mov	r10d, DWORD PTR 0[r13+rax*4]
	test	r10d, r10d
	je	.L47
	mov	DWORD PTR [r15+rax*4], 0
	mov	DWORD PTR [r14+rax*4], 0
	mov	DWORD PTR [r12+rax*4], 0
	mov	DWORD PTR [rbx+rax*4], 0
.L47:
	add	rax, 1
	cmp	rsi, rax
	jne	.L36
	jmp	.L20
.L25:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L41:
	mov	edi, DWORD PTR 0[r13+rax*4]
	test	edi, edi
	je	.L51
	mov	edx, DWORD PTR [r8+rax*4]
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	mov	DWORD PTR [r15+rax*4], edx
.L51:
	add	rax, 1
	cmp	rsi, rax
	jne	.L41
	jmp	.L20
.L26:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L42:
	mov	edx, DWORD PTR 0[r13+rax*4]
	test	edx, edx
	je	.L56
	mov	edx, DWORD PTR [rbx+rax*4]
	or	edx, DWORD PTR [r8+rax*4]
	not	edx
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r12+rax*4]
	or	edx, DWORD PTR [r9+rax*4]
	not	edx
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r14+rax*4]
	or	edx, DWORD PTR [r10+rax*4]
	not	edx
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r15+rax*4]
	or	edx, DWORD PTR [r11+rax*4]
	not	edx
	mov	DWORD PTR [r15+rax*4], edx
.L56:
	add	rax, 1
	cmp	rsi, rax
	jne	.L42
	jmp	.L20
.L27:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L43:
	mov	ecx, DWORD PTR 0[r13+rax*4]
	test	ecx, ecx
	je	.L55
	mov	edx, DWORD PTR [r8+rax*4]
	or	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	or	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	or	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	or	DWORD PTR [r15+rax*4], edx
.L55:
	add	rax, 1
	cmp	rsi, rax
	jne	.L43
	jmp	.L20
.L28:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L44:
	mov	edx, DWORD PTR 0[r13+rax*4]
	test	edx, edx
	je	.L62
	mov	edx, DWORD PTR [rbx+rax*4]
	not	edx
	or	edx, DWORD PTR [r8+rax*4]
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r12+rax*4]
	not	edx
	or	edx, DWORD PTR [r9+rax*4]
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r14+rax*4]
	not	edx
	or	edx, DWORD PTR [r10+rax*4]
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r15+rax*4]
	not	edx
	or	edx, DWORD PTR [r11+rax*4]
	mov	DWORD PTR [r15+rax*4], edx
.L62:
	add	rax, 1
	cmp	rsi, rax
	jne	.L44
	jmp	.L20
.L23:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L39:
	mov	ecx, DWORD PTR 0[r13+rax*4]
	test	ecx, ecx
	je	.L52
	mov	edx, DWORD PTR [r8+rax*4]
	not	edx
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r9+rax*4]
	not	edx
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r10+rax*4]
	not	edx
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r11+rax*4]
	not	edx
	mov	DWORD PTR [r15+rax*4], edx
.L52:
	add	rax, 1
	cmp	rsi, rax
	jne	.L39
	jmp	.L20
.L24:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L40:
	mov	edi, DWORD PTR 0[r13+rax*4]
	test	edi, edi
	je	.L54
	mov	edx, DWORD PTR [rbx+rax*4]
	and	edx, DWORD PTR [r8+rax*4]
	not	edx
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r12+rax*4]
	and	edx, DWORD PTR [r9+rax*4]
	not	edx
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r14+rax*4]
	and	edx, DWORD PTR [r10+rax*4]
	not	edx
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r15+rax*4]
	and	edx, DWORD PTR [r11+rax*4]
	not	edx
	mov	DWORD PTR [r15+rax*4], edx
.L54:
	add	rax, 1
	cmp	rsi, rax
	jne	.L40
	jmp	.L20
.L22:
	xor	eax, eax
	test	rsi, rsi
	je	.L20
	.p2align 4,,10
	.p2align 3
.L38:
	mov	ecx, DWORD PTR 0[r13+rax*4]
	test	ecx, ecx
	je	.L58
	mov	edx, DWORD PTR [rbx+rax*4]
	xor	edx, DWORD PTR [r8+rax*4]
	not	edx
	mov	DWORD PTR [rbx+rax*4], edx
	mov	edx, DWORD PTR [r12+rax*4]
	xor	edx, DWORD PTR [r9+rax*4]
	not	edx
	mov	DWORD PTR [r12+rax*4], edx
	mov	edx, DWORD PTR [r14+rax*4]
	xor	edx, DWORD PTR [r10+rax*4]
	not	edx
	mov	DWORD PTR [r14+rax*4], edx
	mov	edx, DWORD PTR [r15+rax*4]
	xor	edx, DWORD PTR [r11+rax*4]
	not	edx
	mov	DWORD PTR [r15+rax*4], edx
.L58:
	add	rax, 1
	cmp	rsi, rax
	jne	.L38
	jmp	.L20
.L14:
	lea	rsi, .LC0[rip]
	call	gl_problem@PLT
	mov	rsp, QWORD PTR -72[rbp]
	jmp	.L1
.L145:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	gl_logicop_rgba_span, .-gl_logicop_rgba_span
	.comm	MAX_WIDTH,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_logic.c_gl_logicop_rgba_span.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Bad function in gl_logicop_rgba_span\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	gl_logicop_rgba_span
	.syntax unified
	.arm
	.fpu softvfp
	.type	gl_logicop_rgba_span, %function
gl_logicop_rgba_span:
	@ args = 20, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #52
	mov	r8, r0
	ldr	ip, .L133
	str	sp, [fp, #-56]
	ldr	ip, [ip]
	ldr	lr, .L133+4
	lsl	ip, ip, #2
	add	ip, ip, #7
	bic	ip, ip, #7
	sub	sp, sp, ip
	add	r7, sp, #16
	sub	sp, sp, ip
	add	r6, sp, #16
	sub	sp, sp, ip
	add	r5, sp, #16
	sub	sp, sp, ip
	ldr	ip, [fp, #4]
	ldr	lr, [lr]
	str	lr, [fp, #-40]
	mov	lr,#0
	str	ip, [fp, #-48]
	ldr	ip, [fp, #8]
	add	r10, sp, #16
	str	ip, [fp, #-52]
	ldr	ip, [fp, #12]
	ldr	r4, [fp, #20]
	str	ip, [fp, #-60]
	ldr	ip, [fp, #16]
	mov	r9, r1
	str	ip, [fp, #-64]
	str	r10, [sp, #12]
	str	r5, [sp, #8]
	str	r6, [sp, #4]
	str	r7, [sp]
	bl	gl_read_color_span
	ldr	r3, [r8, #4]
	sub	r3, r3, #128
	cmp	r3, #15
	ldrls	pc, [pc, r3, asl #2]
	b	.L2
.L4:
	.word	.L19
	.word	.L18
	.word	.L17
	.word	.L16
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L5
	.word	.L3
.L17:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L62:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L61
	ldr	r1, [r7]
	ldr	lr, [ip]
	mvn	r1, r1
	orr	r1, lr, r1
	str	r1, [ip]
	ldr	r1, [r10]
	ldr	r8, [r6]
	mvn	r1, r1
	mvn	r8, r8
	ldr	lr, [r5]
	str	r1, [fp, #-48]
	mvn	lr, lr
	ldr	r1, [r0]
	orr	r8, r1, r8
	str	r8, [r0]
	ldr	r8, [r2]
	ldr	r1, [fp, #-48]
	orr	lr, r8, lr
	str	lr, [r2]
	ldr	lr, [r3]
	orr	r1, lr, r1
	str	r1, [r3]
.L61:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L62
.L8:
	ldr	sp, [fp, #-56]
.L1:
	ldr	r3, .L133+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L132
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L46:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L45
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	and	r1, r1, lr
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	and	lr, lr, r8
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	and	lr, lr, r1
	str	lr, [r2]
	ldr	r1, [r3]
	and	r1, r1, r8
	str	r1, [r3]
.L45:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L46
	b	.L8
.L19:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L54:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L53
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	eor	r1, r1, lr
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	eor	lr, lr, r8
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	eor	lr, lr, r1
	str	lr, [r2]
	ldr	r1, [r3]
	eor	r1, r1, r8
	str	r1, [r3]
.L53:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L54
	b	.L8
.L18:
	ldr	r3, [r8]
	cmp	r9, #0
	ldr	lr, [r3, #12]
	ldr	r5, [r3, #8]
	ldr	r6, [r3, #4]
	ldr	r7, [r3]
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L38:
	ldr	r1, [r4, #4]!
	add	ip, ip, #4
	cmp	r1, #0
	strne	lr, [ip, #-4]
	strne	r5, [r0]
	strne	r6, [r2]
	strne	r7, [r3]
	cmp	r9, r4
	add	r0, r0, #4
	add	r2, r2, #4
	add	r3, r3, #4
	bne	.L38
	b	.L8
.L16:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L64:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L63
	ldr	r1, [ip]
	ldr	lr, [r7]
	mvn	r1, r1
	orr	r1, r1, lr
	str	r1, [ip]
	ldr	r1, [r0]
	ldr	lr, [r6]
	mvn	r1, r1
	orr	r1, r1, lr
	str	r1, [r0]
	ldr	r1, [r2]
	ldr	lr, [r5]
	mvn	r1, r1
	orr	r1, r1, lr
	str	r1, [r2]
	ldr	r1, [r3]
	ldr	lr, [r10]
	mvn	r1, r1
	orr	r1, r1, lr
	str	r1, [r3]
.L63:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L64
	b	.L8
.L15:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L50:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L49
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	orr	r1, r1, lr
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	orr	lr, lr, r8
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	orr	lr, lr, r1
	str	lr, [r2]
	ldr	r1, [r3]
	orr	r1, r1, r8
	str	r1, [r3]
.L49:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L50
	b	.L8
.L14:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L52:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L51
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	orr	r1, r1, lr
	mvn	r1, r1
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	orr	lr, lr, r8
	mvn	lr, lr
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	orr	lr, lr, r1
	mvn	lr, lr
	str	lr, [r2]
	ldr	r1, [r3]
	orr	r1, r1, r8
	mvn	r1, r1
	str	r1, [r3]
.L51:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L52
	b	.L8
.L13:
	cmp	r9, #0
	beq	.L8
	mov	r3, #0
	sub	r4, r4, #4
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	ip, [fp, #-60]
	ldr	lr, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L42:
	ldr	r2, [r4, #4]!
	cmp	r2, #0
	beq	.L41
	ldr	r8, [r7, r3, lsl #2]
	ldr	r2, [r6, r3, lsl #2]
	str	r8, [r1, r3, lsl #2]
	str	r2, [r0, r3, lsl #2]
	ldr	r8, [r5, r3, lsl #2]
	ldr	r2, [r10, r3, lsl #2]
	str	r8, [ip, r3, lsl #2]
	str	r2, [lr, r3, lsl #2]
.L41:
	cmp	r4, r9
	add	r3, r3, #1
	bne	.L42
	b	.L8
.L12:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L48:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L47
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	and	r1, r1, lr
	mvn	r1, r1
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	and	lr, lr, r8
	mvn	lr, lr
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	and	lr, lr, r1
	mvn	lr, lr
	str	lr, [r2]
	ldr	r1, [r3]
	and	r1, r1, r8
	mvn	r1, r1
	str	r1, [r3]
.L47:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L48
	b	.L8
.L11:
	cmp	r9, #0
	beq	.L8
	mov	r3, #0
	sub	r4, r4, #4
	ldr	lr, [fp, #-60]
	ldr	r8, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L44:
	ldr	r2, [r4, #4]!
	cmp	r2, #0
	beq	.L43
	ldr	ip, [r7, r3, lsl #2]
	ldr	r2, [r10, r3, lsl #2]
	mvn	ip, ip
	str	r2, [fp, #-60]
	ldr	r2, [fp, #-48]
	ldr	r0, [r6, r3, lsl #2]
	str	ip, [r2, r3, lsl #2]
	ldr	r1, [r5, r3, lsl #2]
	ldr	r2, [fp, #-60]
	mvn	r0, r0
	mvn	r1, r1
	mvn	r2, r2
	ldr	ip, [fp, #-52]
	str	r0, [ip, r3, lsl #2]
	str	r1, [lr, r3, lsl #2]
	str	r2, [r8, r3, lsl #2]
.L43:
	cmp	r4, r9
	add	r3, r3, #1
	bne	.L44
	b	.L8
.L10:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L56:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L55
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	eor	r1, r1, lr
	mvn	r1, r1
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	eor	lr, lr, r8
	mvn	lr, lr
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	eor	lr, lr, r1
	mvn	lr, lr
	str	lr, [r2]
	ldr	r1, [r3]
	eor	r1, r1, r8
	mvn	r1, r1
	str	r1, [r3]
.L55:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L56
	b	.L8
.L9:
	cmp	r9, #0
	beq	.L8
	mov	r3, #0
	sub	r4, r4, #4
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	ip, [fp, #-60]
	ldr	lr, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L40:
	ldr	r2, [r4, #4]!
	cmp	r2, #0
	beq	.L39
	ldr	r2, [r1, r3, lsl #2]
	mvn	r2, r2
	str	r2, [r1, r3, lsl #2]
	ldr	r2, [r0, r3, lsl #2]
	mvn	r2, r2
	str	r2, [r0, r3, lsl #2]
	ldr	r2, [ip, r3, lsl #2]
	mvn	r2, r2
	str	r2, [ip, r3, lsl #2]
	ldr	r2, [lr, r3, lsl #2]
	mvn	r2, r2
	str	r2, [lr, r3, lsl #2]
.L39:
	cmp	r4, r9
	add	r3, r3, #1
	bne	.L40
	b	.L8
.L7:
	cmp	r9, #0
	beq	.L8
	mov	r3, #0
	mov	r2, r3
	sub	r4, r4, #4
	ldr	r0, [fp, #-48]
	ldr	ip, [fp, #-52]
	ldr	lr, [fp, #-60]
	ldr	r5, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L36:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	strne	r2, [r5, r3, lsl #2]
	strne	r2, [lr, r3, lsl #2]
	strne	r2, [ip, r3, lsl #2]
	strne	r2, [r0, r3, lsl #2]
	cmp	r4, r9
	add	r3, r3, #1
	bne	.L36
	b	.L8
.L6:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L58:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L57
	ldr	r1, [ip]
	ldr	lr, [r7]
	ldr	r8, [r6]
	bic	r1, r1, lr
	str	r1, [ip]
	ldr	lr, [r0]
	ldr	r1, [r5]
	bic	lr, lr, r8
	str	lr, [r0]
	ldr	lr, [r2]
	ldr	r8, [r10]
	bic	lr, lr, r1
	str	lr, [r2]
	ldr	r1, [r3]
	bic	r1, r1, r8
	str	r1, [r3]
.L57:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L58
	b	.L8
.L5:
	cmp	r9, #0
	beq	.L8
	sub	r4, r4, #4
	ldr	ip, [fp, #-48]
	ldr	r0, [fp, #-52]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-64]
	add	r9, r4, r9, lsl #2
.L60:
	ldr	r1, [r4, #4]!
	cmp	r1, #0
	beq	.L59
	ldr	r8, [ip]
	ldr	lr, [r7]
	ldr	r1, [r6]
	bic	lr, lr, r8
	str	lr, [ip]
	ldr	r8, [r0]
	ldr	lr, [r5]
	bic	r1, r1, r8
	str	r1, [r0]
	ldr	r8, [r2]
	ldr	r1, [r10]
	bic	lr, lr, r8
	str	lr, [r2]
	ldr	lr, [r3]
	bic	r1, r1, lr
	str	r1, [r3]
.L59:
	cmp	r4, r9
	add	ip, ip, #4
	add	r7, r7, #4
	add	r0, r0, #4
	add	r6, r6, #4
	add	r2, r2, #4
	add	r5, r5, #4
	add	r3, r3, #4
	add	r10, r10, #4
	bne	.L60
	b	.L8
.L132:
	bl	__stack_chk_fail
.L2:
	mov	r0, r8
	ldr	r1, .L133+8
	bl	gl_problem
	ldr	sp, [fp, #-56]
	b	.L1
.L134:
	.align	2
.L133:
	.word	MAX_WIDTH
	.word	.LC1
	.word	.LC0
	.size	gl_logicop_rgba_span, .-gl_logicop_rgba_span
	.comm	MAX_WIDTH,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
