	.file	"extr_layer2.c_pcbit_tx_update.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	pcbit_tx_update, @function
pcbit_tx_update:
.LFB0:
	.cfi_startproc
	endbr64
	mov	eax, DWORD PTR [rdi]
	add	eax, 1
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	rdx, QWORD PTR 16[rdi]
	mov	DWORD PTR [rdi], eax
	cdqe
	mov	DWORD PTR [rdx+rax*4], esi
	mov	eax, DWORD PTR 4[rdi]
	mov	rsi, QWORD PTR BANK4[rip]
	add	rsi, QWORD PTR 8[rdi]
	sal	eax, 3
	or	eax, DWORD PTR [rdi]
	mov	edi, eax
	jmp	writeb@PLT
	.cfi_endproc
.LFE0:
	.size	pcbit_tx_update, .-pcbit_tx_update
	.comm	BANK4,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_layer2.c_pcbit_tx_update.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pcbit_tx_update, %function
pcbit_tx_update:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r0]
	str	lr, [sp, #-4]!
	add	r3, r3, #1
	rsbs	r2, r3, #0
	ldr	ip, [r0, #12]
	ldr	lr, .L4
	and	r2, r2, #7
	and	r3, r3, #7
	rsbpl	r3, r2, #0
	str	r3, [r0]
	str	r1, [ip, r3, lsl #2]
	ldr	r1, [r0, #8]
	ldr	r3, [lr]
	ldm	r0, {r2, ip}
	ldr	lr, [sp], #4
	orr	r0, r2, ip, lsl #3
	add	r1, r1, r3
	b	writeb
.L5:
	.align	2
.L4:
	.word	BANK4
	.size	pcbit_tx_update, .-pcbit_tx_update
	.comm	BANK4,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
