	.file	"extr_phy-histb-combphy.c_histb_combphy_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	histb_combphy_init, @function
histb_combphy_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	phy_get_drvdata@PLT
	mov	rdi, rax
	mov	rbp, rax
	call	histb_combphy_set_mode@PLT
	mov	r12d, eax
	test	eax, eax
	je	.L5
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	rdi, QWORD PTR COMBPHY_CFG_REG[rip]
	add	rdi, QWORD PTR 0[rbp]
	call	readl@PLT
	mov	edi, DWORD PTR COMBPHY_BYPASS_CODEC[rip]
	mov	rsi, QWORD PTR COMBPHY_CFG_REG[rip]
	add	rsi, QWORD PTR 0[rbp]
	not	edi
	and	edi, eax
	call	writel@PLT
	mov	edi, DWORD PTR 12[rbp]
	call	clk_prepare_enable@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L1
	mov	edi, DWORD PTR 8[rbp]
	call	reset_control_deassert@PLT
	mov	rdi, QWORD PTR COMBPHY_CFG_REG[rip]
	add	rdi, QWORD PTR 0[rbp]
	call	readl@PLT
	or	eax, DWORD PTR COMBPHY_CLKREF_OUT_OEN[rip]
	mov	rsi, QWORD PTR COMBPHY_CFG_REG[rip]
	mov	edi, eax
	add	rsi, QWORD PTR 0[rbp]
	call	writel@PLT
	mov	edi, 5
	call	mdelay@PLT
	mov	rdi, rbp
	mov	edx, 8
	mov	esi, 1
	call	nano_register_write@PLT
	mov	rdi, rbp
	mov	edx, 9
	mov	esi, 12
	call	nano_register_write@PLT
	mov	rdi, rbp
	mov	edx, 4
	mov	esi, 26
	call	nano_register_write@PLT
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	histb_combphy_init, .-histb_combphy_init
	.comm	COMBPHY_CLKREF_OUT_OEN,4,4
	.comm	COMBPHY_CFG_REG,8,8
	.comm	COMBPHY_BYPASS_CODEC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_phy-histb-combphy.c_histb_combphy_init.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	histb_combphy_init, %function
histb_combphy_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	bl	phy_get_drvdata
	mov	r5, r0
	bl	histb_combphy_set_mode
	subs	r4, r0, #0
	beq	.L5
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, pc}
.L5:
	ldr	r6, .L6
	ldr	r0, [r5]
	ldr	r3, [r6]
	add	r0, r0, r3
	bl	readl
	ldr	r2, .L6+4
	ldr	r3, [r6]
	ldr	r2, [r2]
	ldr	r1, [r5]
	bic	r0, r0, r2
	add	r1, r1, r3
	bl	writel
	ldr	r0, [r5, #8]
	bl	clk_prepare_enable
	subs	r4, r0, #0
	bne	.L1
	ldr	r0, [r5, #4]
	bl	reset_control_deassert
	ldr	r3, [r6]
	ldr	r0, [r5]
	add	r0, r0, r3
	bl	readl
	ldr	r3, .L6+8
	ldr	r2, [r6]
	ldr	r3, [r3]
	ldr	r1, [r5]
	orr	r0, r0, r3
	add	r1, r1, r2
	bl	writel
	mov	r0, #5
	bl	mdelay
	mov	r2, #8
	mov	r1, #1
	mov	r0, r5
	bl	nano_register_write
	mov	r2, #9
	mov	r1, #12
	mov	r0, r5
	bl	nano_register_write
	mov	r0, r5
	mov	r2, #4
	mov	r1, #26
	bl	nano_register_write
	mov	r0, r4
	pop	{r4, r5, r6, pc}
.L7:
	.align	2
.L6:
	.word	COMBPHY_CFG_REG
	.word	COMBPHY_BYPASS_CODEC
	.word	COMBPHY_CLKREF_OUT_OEN
	.size	histb_combphy_init, .-histb_combphy_init
	.comm	COMBPHY_CLKREF_OUT_OEN,4,4
	.comm	COMBPHY_CFG_REG,4,4
	.comm	COMBPHY_BYPASS_CODEC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
