	.file	"extr_rt2400pci.c_rt2400pci_config_erp.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	rt2400pci_config_erp, @function
rt2400pci_config_erp:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebx, edx
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	test	DWORD PTR BSS_CHANGED_ERP_PREAMBLE[rip], edx
	jne	.L21
	test	DWORD PTR BSS_CHANGED_BASIC_RATES[rip], ebx
	jne	.L22
.L3:
	test	DWORD PTR BSS_CHANGED_ERP_SLOT[rip], ebx
	jne	.L23
.L4:
	test	DWORD PTR BSS_CHANGED_BEACON_INT[rip], ebx
	jne	.L24
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L25
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L21:
	.cfi_restore_state
	lea	r12, 4[rsp]
	mov	eax, DWORD PTR [rsi]
	mov	esi, DWORD PTR TXCSR1[rip]
	mov	rdx, r12
	lea	r14d, 0[0+rax*8]
	call	rt2x00mmio_register_read@PLT
	mov	esi, DWORD PTR TXCSR1_ACK_TIMEOUT[rip]
	mov	edx, 511
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TXCSR1_ACK_CONSUME_TIME[rip]
	mov	edx, 314
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR IEEE80211_HEADER[rip]
	mov	esi, DWORD PTR TXCSR1_TSF_OFFSET[rip]
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR TXCSR1_AUTORESPONDER[rip]
	mov	edx, 1
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR TXCSR1[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	mov	esi, DWORD PTR ARCSR2[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2x00mmio_register_read@PLT
	mov	esi, DWORD PTR ARCSR2_SIGNAL[rip]
	xor	edx, edx
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR ARCSR2_SERVICE[rip]
	mov	edx, 4
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edi, DWORD PTR ACK_SIZE[rip]
	mov	esi, 10
	call	GET_DURATION@PLT
	mov	esi, DWORD PTR ARCSR2_LENGTH[rip]
	mov	rdi, r12
	mov	edx, eax
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR ARCSR2[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	mov	esi, DWORD PTR ARCSR3[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2x00mmio_register_read@PLT
	mov	esi, DWORD PTR ARCSR3_SIGNAL[rip]
	mov	edx, r14d
	mov	rdi, r12
	or	edx, 1
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR ARCSR3_SERVICE[rip]
	mov	edx, 4
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edi, DWORD PTR ACK_SIZE[rip]
	mov	esi, 20
	call	GET_DURATION@PLT
	mov	esi, DWORD PTR ARCSR2_LENGTH[rip]
	mov	rdi, r12
	mov	edx, eax
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR ARCSR3[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	mov	esi, DWORD PTR ARCSR4[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2x00mmio_register_read@PLT
	mov	esi, DWORD PTR ARCSR4_SIGNAL[rip]
	mov	edx, r14d
	mov	rdi, r12
	or	edx, 2
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR ARCSR4_SERVICE[rip]
	mov	edx, 4
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edi, DWORD PTR ACK_SIZE[rip]
	mov	esi, 55
	call	GET_DURATION@PLT
	mov	esi, DWORD PTR ARCSR2_LENGTH[rip]
	mov	rdi, r12
	mov	edx, eax
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR ARCSR4[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	mov	esi, DWORD PTR ARCSR5[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2x00mmio_register_read@PLT
	mov	esi, DWORD PTR ARCSR5_SIGNAL[rip]
	mov	edx, r14d
	mov	rdi, r12
	or	edx, 3
	call	rt2x00_set_field32@PLT
	mov	esi, DWORD PTR ARCSR5_SERVICE[rip]
	mov	edx, 132
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edi, DWORD PTR ACK_SIZE[rip]
	mov	esi, 110
	call	GET_DURATION@PLT
	mov	esi, DWORD PTR ARCSR2_LENGTH[rip]
	mov	rdi, r12
	mov	edx, eax
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR ARCSR5[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	test	DWORD PTR BSS_CHANGED_BASIC_RATES[rip], ebx
	je	.L3
.L22:
	mov	edx, DWORD PTR 4[r13]
	mov	esi, DWORD PTR ARCSR1[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	test	DWORD PTR BSS_CHANGED_ERP_SLOT[rip], ebx
	je	.L4
.L23:
	lea	r12, 4[rsp]
	mov	esi, DWORD PTR CSR11[rip]
	mov	rdi, rbp
	mov	rdx, r12
	call	rt2x00mmio_register_read@PLT
	mov	edx, DWORD PTR 8[r13]
	mov	esi, DWORD PTR CSR11_SLOT_TIME[rip]
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR CSR11[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	mov	esi, DWORD PTR CSR18[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2x00mmio_register_read@PLT
	mov	edx, DWORD PTR 12[r13]
	mov	esi, DWORD PTR CSR18_SIFS[rip]
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 16[r13]
	mov	esi, DWORD PTR CSR18_PIFS[rip]
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR CSR18[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	mov	esi, DWORD PTR CSR19[rip]
	mov	rdx, r12
	mov	rdi, rbp
	call	rt2x00mmio_register_read@PLT
	mov	edx, DWORD PTR 20[r13]
	mov	esi, DWORD PTR CSR19_DIFS[rip]
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 24[r13]
	mov	esi, DWORD PTR CSR19_EIFS[rip]
	mov	rdi, r12
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR CSR19[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	test	DWORD PTR BSS_CHANGED_BEACON_INT[rip], ebx
	je	.L1
.L24:
	lea	r12, 4[rsp]
	mov	esi, DWORD PTR CSR12[rip]
	mov	rdi, rbp
	mov	rdx, r12
	call	rt2x00mmio_register_read@PLT
	mov	edx, DWORD PTR 28[r13]
	mov	esi, DWORD PTR CSR12_BEACON_INTERVAL[rip]
	mov	rdi, r12
	sal	edx, 4
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 28[r13]
	mov	esi, DWORD PTR CSR12_CFP_MAX_DURATION[rip]
	mov	rdi, r12
	sal	edx, 4
	call	rt2x00_set_field32@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, DWORD PTR CSR12[rip]
	mov	rdi, rbp
	call	rt2x00mmio_register_write@PLT
	jmp	.L1
.L25:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	rt2400pci_config_erp, .-rt2400pci_config_erp
	.comm	TXCSR1_TSF_OFFSET,4,4
	.comm	TXCSR1_AUTORESPONDER,4,4
	.comm	TXCSR1_ACK_TIMEOUT,4,4
	.comm	TXCSR1_ACK_CONSUME_TIME,4,4
	.comm	TXCSR1,4,4
	.comm	IEEE80211_HEADER,4,4
	.comm	CSR19_EIFS,4,4
	.comm	CSR19_DIFS,4,4
	.comm	CSR19,4,4
	.comm	CSR18_SIFS,4,4
	.comm	CSR18_PIFS,4,4
	.comm	CSR18,4,4
	.comm	CSR12_CFP_MAX_DURATION,4,4
	.comm	CSR12_BEACON_INTERVAL,4,4
	.comm	CSR12,4,4
	.comm	CSR11_SLOT_TIME,4,4
	.comm	CSR11,4,4
	.comm	BSS_CHANGED_ERP_SLOT,4,4
	.comm	BSS_CHANGED_ERP_PREAMBLE,4,4
	.comm	BSS_CHANGED_BEACON_INT,4,4
	.comm	BSS_CHANGED_BASIC_RATES,4,4
	.comm	ARCSR5_SIGNAL,4,4
	.comm	ARCSR5_SERVICE,4,4
	.comm	ARCSR5,4,4
	.comm	ARCSR4_SIGNAL,4,4
	.comm	ARCSR4_SERVICE,4,4
	.comm	ARCSR4,4,4
	.comm	ARCSR3_SIGNAL,4,4
	.comm	ARCSR3_SERVICE,4,4
	.comm	ARCSR3,4,4
	.comm	ARCSR2_SIGNAL,4,4
	.comm	ARCSR2_SERVICE,4,4
	.comm	ARCSR2_LENGTH,4,4
	.comm	ARCSR2,4,4
	.comm	ARCSR1,4,4
	.comm	ACK_SIZE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rt2400pci.c_rt2400pci_config_erp.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rt2400pci_config_erp, %function
rt2400pci_config_erp:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r5, r2
	ldr	r3, .L26
	ldr	r2, .L26+4
	ldr	r3, [r3]
	sub	sp, sp, #12
	tst	r5, r3
	mov	r6, r1
	ldr	r2, [r2]
	str	r2, [sp, #4]
	mov	r2,#0
	mov	r4, r0
	bne	.L21
	ldr	r3, .L26+8
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L22
.L3:
	ldr	r3, .L26+12
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L23
.L4:
	ldr	r3, .L26+16
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L24
.L1:
	ldr	r3, .L26+4
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L25
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L21:
	ldr	r8, .L26+20
	ldr	r7, [r1]
	mov	r2, sp
	ldr	r1, [r8]
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+24
	ldr	r2, .L26+28
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+32
	ldr	r2, .L26+36
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+40
	ldr	r2, .L26+44
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+48
	ldr	fp, .L26+52
	ldr	r1, [r3]
	mov	r2, #1
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r1, [r8]
	ldr	r2, [sp]
	mov	r0, r4
	bl	rt2x00mmio_register_write
	ldr	r1, [fp]
	mov	r2, sp
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+56
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+60
	ldr	r8, .L26+64
	ldr	r1, [r3]
	ldr	r9, .L26+68
	mov	r2, #4
	mov	r0, sp
	bl	rt2x00_set_field32
	mov	r1, #10
	ldr	r0, [r8]
	ldr	r10, [r9]
	bl	GET_DURATION
	mov	r1, r10
	mov	r2, r0
	ldr	r10, .L26+72
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r1, [fp]
	ldr	r2, [sp]
	mov	r0, r4
	bl	rt2x00mmio_register_write
	ldr	r1, [r10]
	mov	r2, sp
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+76
	lsl	r7, r7, #3
	ldr	r1, [r3]
	orr	r2, r7, #1
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+80
	mov	r2, #4
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	mov	r1, #20
	ldr	r0, [r8]
	ldr	fp, [r9]
	bl	GET_DURATION
	mov	r1, fp
	mov	r2, r0
	ldr	fp, .L26+84
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r1, [r10]
	ldr	r2, [sp]
	mov	r0, r4
	bl	rt2x00mmio_register_write
	mov	r2, sp
	ldr	r1, [fp]
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+88
	orr	r2, r7, #2
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+92
	mov	r2, #4
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	mov	r1, #55
	ldr	r0, [r8]
	ldr	r10, [r9]
	bl	GET_DURATION
	mov	r1, r10
	mov	r2, r0
	ldr	r10, .L26+96
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r1, [fp]
	ldr	r2, [sp]
	mov	r0, r4
	bl	rt2x00mmio_register_write
	mov	r2, sp
	ldr	r1, [r10]
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+100
	orr	r2, r7, #3
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+104
	mov	r2, #132
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	mov	r1, #110
	ldr	r0, [r8]
	ldr	r7, [r9]
	bl	GET_DURATION
	mov	r1, r7
	mov	r2, r0
	mov	r0, sp
	bl	rt2x00_set_field32
	mov	r0, r4
	ldr	r1, [r10]
	ldr	r2, [sp]
	bl	rt2x00mmio_register_write
	ldr	r3, .L26+8
	ldr	r3, [r3]
	tst	r5, r3
	beq	.L3
.L22:
	ldr	r3, .L26+108
	mov	r0, r4
	ldr	r1, [r3]
	ldr	r2, [r6, #4]
	bl	rt2x00mmio_register_write
	ldr	r3, .L26+12
	ldr	r3, [r3]
	tst	r5, r3
	beq	.L4
.L23:
	ldr	r7, .L26+112
	mov	r2, sp
	ldr	r1, [r7]
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+116
	ldr	r2, [r6, #8]
	ldr	r1, [r3]
	ldr	r8, .L26+120
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r1, [r7]
	ldr	r2, [sp]
	mov	r0, r4
	bl	rt2x00mmio_register_write
	mov	r2, sp
	ldr	r1, [r8]
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+124
	ldr	r2, [r6, #12]
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+128
	ldr	r2, [r6, #16]
	ldr	r1, [r3]
	ldr	r7, .L26+132
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r1, [r8]
	ldr	r2, [sp]
	mov	r0, r4
	bl	rt2x00mmio_register_write
	mov	r2, sp
	ldr	r1, [r7]
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r3, .L26+136
	ldr	r2, [r6, #20]
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	ldr	r3, .L26+140
	ldr	r2, [r6, #24]
	ldr	r1, [r3]
	mov	r0, sp
	bl	rt2x00_set_field32
	mov	r0, r4
	ldr	r1, [r7]
	ldr	r2, [sp]
	bl	rt2x00mmio_register_write
	ldr	r3, .L26+16
	ldr	r3, [r3]
	tst	r5, r3
	beq	.L1
.L24:
	ldr	r5, .L26+144
	mov	r2, sp
	ldr	r1, [r5]
	mov	r0, r4
	bl	rt2x00mmio_register_read
	ldr	r2, [r6, #28]
	ldr	r3, .L26+148
	mov	r0, sp
	ldr	r1, [r3]
	lsl	r2, r2, #4
	bl	rt2x00_set_field32
	ldr	r2, [r6, #28]
	ldr	r3, .L26+152
	mov	r0, sp
	ldr	r1, [r3]
	lsl	r2, r2, #4
	bl	rt2x00_set_field32
	mov	r0, r4
	ldr	r1, [r5]
	ldr	r2, [sp]
	bl	rt2x00mmio_register_write
	b	.L1
.L25:
	bl	__stack_chk_fail
.L27:
	.align	2
.L26:
	.word	BSS_CHANGED_ERP_PREAMBLE
	.word	.LC0
	.word	BSS_CHANGED_BASIC_RATES
	.word	BSS_CHANGED_ERP_SLOT
	.word	BSS_CHANGED_BEACON_INT
	.word	TXCSR1
	.word	TXCSR1_ACK_TIMEOUT
	.word	511
	.word	TXCSR1_ACK_CONSUME_TIME
	.word	314
	.word	TXCSR1_TSF_OFFSET
	.word	IEEE80211_HEADER
	.word	TXCSR1_AUTORESPONDER
	.word	ARCSR2
	.word	ARCSR2_SIGNAL
	.word	ARCSR2_SERVICE
	.word	ACK_SIZE
	.word	ARCSR2_LENGTH
	.word	ARCSR3
	.word	ARCSR3_SIGNAL
	.word	ARCSR3_SERVICE
	.word	ARCSR4
	.word	ARCSR4_SIGNAL
	.word	ARCSR4_SERVICE
	.word	ARCSR5
	.word	ARCSR5_SIGNAL
	.word	ARCSR5_SERVICE
	.word	ARCSR1
	.word	CSR11
	.word	CSR11_SLOT_TIME
	.word	CSR18
	.word	CSR18_SIFS
	.word	CSR18_PIFS
	.word	CSR19
	.word	CSR19_DIFS
	.word	CSR19_EIFS
	.word	CSR12
	.word	CSR12_BEACON_INTERVAL
	.word	CSR12_CFP_MAX_DURATION
	.size	rt2400pci_config_erp, .-rt2400pci_config_erp
	.comm	TXCSR1_TSF_OFFSET,4,4
	.comm	TXCSR1_AUTORESPONDER,4,4
	.comm	TXCSR1_ACK_TIMEOUT,4,4
	.comm	TXCSR1_ACK_CONSUME_TIME,4,4
	.comm	TXCSR1,4,4
	.comm	IEEE80211_HEADER,4,4
	.comm	CSR19_EIFS,4,4
	.comm	CSR19_DIFS,4,4
	.comm	CSR19,4,4
	.comm	CSR18_SIFS,4,4
	.comm	CSR18_PIFS,4,4
	.comm	CSR18,4,4
	.comm	CSR12_CFP_MAX_DURATION,4,4
	.comm	CSR12_BEACON_INTERVAL,4,4
	.comm	CSR12,4,4
	.comm	CSR11_SLOT_TIME,4,4
	.comm	CSR11,4,4
	.comm	BSS_CHANGED_ERP_SLOT,4,4
	.comm	BSS_CHANGED_ERP_PREAMBLE,4,4
	.comm	BSS_CHANGED_BEACON_INT,4,4
	.comm	BSS_CHANGED_BASIC_RATES,4,4
	.comm	ARCSR5_SIGNAL,4,4
	.comm	ARCSR5_SERVICE,4,4
	.comm	ARCSR5,4,4
	.comm	ARCSR4_SIGNAL,4,4
	.comm	ARCSR4_SERVICE,4,4
	.comm	ARCSR4,4,4
	.comm	ARCSR3_SIGNAL,4,4
	.comm	ARCSR3_SERVICE,4,4
	.comm	ARCSR3,4,4
	.comm	ARCSR2_SIGNAL,4,4
	.comm	ARCSR2_SERVICE,4,4
	.comm	ARCSR2_LENGTH,4,4
	.comm	ARCSR2,4,4
	.comm	ARCSR1,4,4
	.comm	ACK_SIZE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
