	.file	"extr_uncore_nhmex.c_nhmex_mbox_get_constraint.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	nhmex_mbox_get_constraint, @function
nhmex_mbox_get_constraint:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	edx, 8
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xor	r14d, r14d
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	edi, DWORD PTR 16[rsi]
	mov	r13d, DWORD PTR 12[rsi]
	xor	esi, esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	call	__BITS_VALUE@PLT
	mov	edi, DWORD PTR 16[rbx]
	mov	edx, 8
	mov	esi, 1
	mov	DWORD PTR 16[rsp], eax
	call	__BITS_VALUE@PLT
	mov	DWORD PTR 20[rsp], eax
	lea	rax, 16[rsp]
	mov	QWORD PTR 8[rsp], rax
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L43:
	mov	eax, DWORD PTR 20[rbx]
	bt	eax, r15d
	jnc	.L3
	mov	rax, QWORD PTR 8[rsp]
	mov	DWORD PTR [rax+r15*4], 255
.L4:
	cmp	r15, 1
	jne	.L22
.L44:
	mov	eax, DWORD PTR EXTRA_REG_NONE[rip]
	cmp	DWORD PTR 4[rbx], eax
	je	.L11
	mov	rdi, rbp
	call	uncore_box_is_fake@PLT
	test	rax, rax
	jne	.L10
	mov	eax, DWORD PTR 8[rbx]
	test	eax, eax
	jne	.L11
.L10:
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR [rbx]
	mov	rdi, rbp
	call	nhmex_mbox_get_shared_reg@PLT
	test	eax, eax
	jne	.L11
.L5:
	mov	r12d, DWORD PTR 16[rsp]
	mov	eax, r14d
	and	eax, 1
	cmp	r12d, 255
	je	.L16
	test	eax, eax
	jne	.L17
	cmp	r12d, DWORD PTR EXTRA_REG_NHMEX_M_ZDP_CTL_FVC[rip]
	jl	.L20
	mov	edi, DWORD PTR 16[rbx]
	mov	edx, 8
	mov	esi, 1
	call	__BITS_VALUE@PLT
	xor	edi, edi
	cmp	eax, 255
	setne	dil
	call	BUG_ON@PLT
	mov	edx, DWORD PTR EXTRA_REG_NHMEX_M_ZDP_CTL_FVC[rip]
	mov	edi, DWORD PTR 16[rbx]
	xor	esi, esi
	sub	r12d, edx
	add	r12d, 1
	mov	eax, r12d
	sar	eax, 31
	shr	eax, 30
	add	r12d, eax
	and	r12d, 3
	sub	r12d, eax
	add	r12d, edx
	mov	edx, 8
	mov	DWORD PTR 16[rsp], r12d
	call	__BITS_VALUE@PLT
	cmp	r12d, eax
	je	.L20
	xor	edx, edx
	mov	esi, r12d
	mov	rdi, rbx
	call	nhmex_mbox_alter_er@PLT
	mov	r13d, eax
.L2:
	xor	r15d, r15d
.L6:
	mov	rdi, rbp
	mov	r12d, r15d
	call	uncore_box_is_fake@PLT
	test	rax, rax
	je	.L43
.L3:
	mov	rax, QWORD PTR 8[rsp]
	mov	r9d, DWORD PTR [rax+r15*4]
	cmp	r9d, 255
	mov	DWORD PTR 4[rsp], r9d
	je	.L4
	mov	edx, 32
	mov	esi, r12d
	mov	edi, r13d
	call	__BITS_VALUE@PLT
	mov	r9d, DWORD PTR 4[rsp]
	mov	rdi, rbp
	mov	edx, eax
	mov	esi, r9d
	call	nhmex_mbox_get_shared_reg@PLT
	test	eax, eax
	je	.L5
	mov	eax, 1
	mov	ecx, r12d
	sal	eax, cl
	or	r14d, eax
	cmp	r15, 1
	je	.L44
.L22:
	mov	r15d, 1
	jmp	.L6
.L16:
	test	eax, eax
	je	.L20
.L17:
	mov	esi, r12d
	mov	rdi, rbp
	call	nhmex_mbox_put_shared_reg@PLT
.L20:
	and	r14d, 2
	lea	r12, uncore_constraint_empty[rip]
	jne	.L45
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L46
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r12
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	mov	rdi, rbp
	call	uncore_box_is_fake@PLT
	test	rax, rax
	jne	.L41
	mov	ebp, DWORD PTR 16[rsp]
	cmp	ebp, 255
	jne	.L47
.L14:
	or	DWORD PTR 20[rbx], r14d
	mov	eax, DWORD PTR EXTRA_REG_NONE[rip]
	cmp	DWORD PTR 4[rbx], eax
	je	.L41
	mov	DWORD PTR 8[rbx], 1
.L41:
	xor	r12d, r12d
	jmp	.L1
.L45:
	mov	esi, DWORD PTR 20[rsp]
	mov	rdi, rbp
	call	nhmex_mbox_put_shared_reg@PLT
	jmp	.L1
.L47:
	mov	edi, DWORD PTR 16[rbx]
	xor	esi, esi
	mov	edx, 8
	call	__BITS_VALUE@PLT
	cmp	ebp, eax
	je	.L14
	mov	edx, 1
	mov	esi, ebp
	mov	rdi, rbx
	call	nhmex_mbox_alter_er@PLT
	jmp	.L14
.L46:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	nhmex_mbox_get_constraint, .-nhmex_mbox_get_constraint
	.comm	uncore_constraint_empty,4,4
	.comm	EXTRA_REG_NONE,4,4
	.comm	EXTRA_REG_NHMEX_M_ZDP_CTL_FVC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_uncore_nhmex.c_nhmex_mbox_get_constraint.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nhmex_mbox_get_constraint, %function
nhmex_mbox_get_constraint:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r5, r1
	ldr	r3, .L51
	sub	sp, sp, #20
	mov	r2, #8
	mov	r6, r0
	ldr	r0, [r1, #16]
	mov	r1, #0
	ldr	r3, [r3]
	str	r3, [sp, #12]
	mov	r3,#0
	ldr	r7, [r5, #12]
	bl	__BITS_VALUE
	mov	r3, r0
	mov	r2, #8
	mov	r1, #1
	ldr	r0, [r5, #16]
	str	r3, [sp, #4]
	bl	__BITS_VALUE
	mov	r8, #0
	ldr	r10, .L51+4
	str	r0, [sp, #8]
	b	.L2
.L46:
	ldr	r3, [r5, #20]
	asr	r3, r3, r4
	tst	r3, #1
	beq	.L3
	mov	r2, #255
	add	r3, sp, #4
	str	r2, [r3, r4, lsl #2]
.L4:
	cmp	r4, #1
	bne	.L22
.L47:
	ldr	r3, .L51+8
	ldr	r2, [r5, #4]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L11
	mov	r0, r6
	bl	uncore_box_is_fake
	cmp	r0, #0
	bne	.L10
	ldr	r3, [r5, #8]
	cmp	r3, #0
	bne	.L11
.L10:
	mov	r0, r6
	ldr	r2, [r5]
	ldr	r1, [r5, #4]
	bl	nhmex_mbox_get_shared_reg
	cmp	r0, #0
	bne	.L11
.L5:
	ldr	r4, [sp, #4]
	and	r7, r8, #1
	cmp	r4, #255
	beq	.L16
	cmp	r7, #0
	bne	.L17
	ldr	r3, [r10]
	cmp	r4, r3
	blt	.L20
	mov	r2, #8
	mov	r1, #1
	ldr	r0, [r5, #16]
	bl	__BITS_VALUE
	subs	r0, r0, #255
	movne	r0, #1
	bl	BUG_ON
	ldr	r1, [r10]
	mov	r2, #8
	sub	r4, r4, r1
	add	r4, r4, #1
	rsbs	r3, r4, #0
	and	r3, r3, #3
	and	r4, r4, #3
	rsbpl	r4, r3, #0
	add	r4, r4, r1
	ldr	r0, [r5, #16]
	mov	r1, r7
	str	r4, [sp, #4]
	bl	__BITS_VALUE
	cmp	r4, r0
	beq	.L20
	mov	r2, r7
	mov	r1, r4
	mov	r0, r5
	bl	nhmex_mbox_alter_er
	mov	r7, r0
.L2:
	mov	r4, #0
	mov	r9, #1
.L6:
	mov	r0, r6
	bl	uncore_box_is_fake
	cmp	r0, #0
	beq	.L46
.L3:
	add	r3, sp, #4
	ldr	fp, [r3, r4, lsl #2]
	cmp	fp, #255
	beq	.L4
	mov	r2, #32
	mov	r1, r4
	mov	r0, r7
	bl	__BITS_VALUE
	mov	r1, fp
	mov	r2, r0
	mov	r0, r6
	bl	nhmex_mbox_get_shared_reg
	cmp	r0, #0
	beq	.L5
	cmp	r4, #1
	orr	r8, r8, r9, lsl r4
	beq	.L47
.L22:
	mov	r4, #1
	b	.L6
.L16:
	cmp	r7, #0
	beq	.L20
.L17:
	mov	r1, r4
	mov	r0, r6
	bl	nhmex_mbox_put_shared_reg
.L20:
	tst	r8, #2
	ldreq	r0, .L51+12
	bne	.L48
.L1:
	ldr	r3, .L51
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L49
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	mov	r0, r6
	bl	uncore_box_is_fake
	subs	r1, r0, #0
	bne	.L9
	ldr	r4, [sp, #4]
	cmp	r4, #255
	bne	.L50
.L14:
	ldr	r3, .L51+8
	ldr	r1, [r5, #4]
	ldr	r2, [r3]
	ldr	r3, [r5, #20]
	cmp	r1, r2
	orr	r8, r3, r8
	str	r8, [r5, #20]
	movne	r3, #1
	movne	r0, #0
	strne	r3, [r5, #8]
	bne	.L1
.L9:
	mov	r0, #0
	b	.L1
.L48:
	mov	r0, r6
	ldr	r1, [sp, #8]
	bl	nhmex_mbox_put_shared_reg
	ldr	r0, .L51+12
	b	.L1
.L50:
	mov	r2, #8
	ldr	r0, [r5, #16]
	bl	__BITS_VALUE
	cmp	r4, r0
	beq	.L14
	mov	r1, r4
	mov	r2, #1
	mov	r0, r5
	bl	nhmex_mbox_alter_er
	b	.L14
.L49:
	bl	__stack_chk_fail
.L52:
	.align	2
.L51:
	.word	.LC0
	.word	EXTRA_REG_NHMEX_M_ZDP_CTL_FVC
	.word	EXTRA_REG_NONE
	.word	uncore_constraint_empty
	.size	nhmex_mbox_get_constraint, .-nhmex_mbox_get_constraint
	.comm	uncore_constraint_empty,4,4
	.comm	EXTRA_REG_NONE,4,4
	.comm	EXTRA_REG_NHMEX_M_ZDP_CTL_FVC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
