	.file	"extr_r600_cp.c_r600_cp_load_microcode.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	r600_cp_load_microcode, @function
r600_cp_load_microcode:
.LFB0:
	.cfi_startproc
	endbr64
	cmp	QWORD PTR 8[rdi], 0
	je	.L10
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmp	QWORD PTR [rdi], 0
	je	.L1
	call	r600_do_cp_stop@PLT
	mov	edi, 15
	call	R600_RB_BLKSZ@PLT
	mov	edi, 3
	mov	ebp, DWORD PTR R600_RB_NO_UPDATE[rip]
	mov	ebx, eax
	call	R600_RB_BUFSZ@PLT
	mov	edi, DWORD PTR R600_CP_RB_CNTL[rip]
	or	ebx, eax
	mov	esi, ebx
	or	esi, ebp
	call	RADEON_WRITE@PLT
	mov	esi, DWORD PTR R600_SOFT_RESET_CP[rip]
	mov	edi, DWORD PTR R600_GRBM_SOFT_RESET[rip]
	call	RADEON_WRITE@PLT
	mov	edi, DWORD PTR R600_GRBM_SOFT_RESET[rip]
	call	RADEON_READ@PLT
	mov	edi, 15
	call	mdelay@PLT
	mov	edi, DWORD PTR R600_GRBM_SOFT_RESET[rip]
	xor	esi, esi
	call	RADEON_WRITE@PLT
	mov	rax, QWORD PTR 8[r12]
	mov	edi, DWORD PTR R600_CP_ME_RAM_WADDR[rip]
	xor	esi, esi
	mov	rbx, QWORD PTR [rax]
	call	RADEON_WRITE@PLT
	mov	edx, DWORD PTR PM4_UCODE_SIZE[rip]
	test	edx, edx
	jle	.L3
	xor	ebp, ebp
	.p2align 4,,10
	.p2align 3
.L4:
	mov	edi, ebx
	add	ebp, 1
	add	rbx, 4
	call	be32_to_cpup@PLT
	mov	edi, DWORD PTR R600_CP_ME_RAM_DATA[rip]
	mov	esi, eax
	call	RADEON_WRITE@PLT
	mov	eax, DWORD PTR PM4_UCODE_SIZE[rip]
	lea	eax, [rax+rax*2]
	cmp	eax, ebp
	jg	.L4
.L3:
	mov	rax, QWORD PTR [r12]
	mov	edi, DWORD PTR R600_CP_PFP_UCODE_ADDR[rip]
	xor	esi, esi
	mov	rbx, QWORD PTR [rax]
	call	RADEON_WRITE@PLT
	mov	eax, DWORD PTR PFP_UCODE_SIZE[rip]
	test	eax, eax
	jle	.L5
	xor	ebp, ebp
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edi, ebx
	add	ebp, 1
	add	rbx, 4
	call	be32_to_cpup@PLT
	mov	edi, DWORD PTR R600_CP_PFP_UCODE_DATA[rip]
	mov	esi, eax
	call	RADEON_WRITE@PLT
	cmp	DWORD PTR PFP_UCODE_SIZE[rip], ebp
	jg	.L6
.L5:
	mov	edi, DWORD PTR R600_CP_PFP_UCODE_ADDR[rip]
	xor	esi, esi
	call	RADEON_WRITE@PLT
	mov	edi, DWORD PTR R600_CP_ME_RAM_WADDR[rip]
	xor	esi, esi
	call	RADEON_WRITE@PLT
	mov	edi, DWORD PTR R600_CP_ME_RAM_RADDR[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_restore 3
	.cfi_def_cfa_offset 24
	xor	esi, esi
	pop	rbp
	.cfi_restore 6
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_restore 12
	.cfi_def_cfa_offset 8
	jmp	RADEON_WRITE@PLT
	.p2align 4,,10
	.p2align 3
.L1:
	.cfi_restore_state
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	ret
	.cfi_endproc
.LFE0:
	.size	r600_cp_load_microcode, .-r600_cp_load_microcode
	.comm	R600_SOFT_RESET_CP,4,4
	.comm	R600_RB_NO_UPDATE,4,4
	.comm	R600_GRBM_SOFT_RESET,4,4
	.comm	R600_CP_RB_CNTL,4,4
	.comm	R600_CP_PFP_UCODE_DATA,4,4
	.comm	R600_CP_PFP_UCODE_ADDR,4,4
	.comm	R600_CP_ME_RAM_WADDR,4,4
	.comm	R600_CP_ME_RAM_RADDR,4,4
	.comm	R600_CP_ME_RAM_DATA,4,4
	.comm	R600_BUF_SWAP_32BIT,4,4
	.comm	PM4_UCODE_SIZE,4,4
	.comm	PFP_UCODE_SIZE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_r600_cp.c_r600_cp_load_microcode.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	r600_cp_load_microcode, %function
r600_cp_load_microcode:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r0, #4]
	cmp	r3, #0
	bxeq	lr
	ldr	r3, [r0]
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	cmp	r3, #0
	mov	r7, r0
	popeq	{r4, r5, r6, r7, r8, r9, r10, pc}
	bl	r600_do_cp_stop
	ldr	r3, .L20
	mov	r0, #15
	ldr	r5, [r3]
	bl	R600_RB_BLKSZ
	ldr	r3, .L20+4
	mov	r4, r0
	mov	r0, #3
	ldr	r6, [r3]
	bl	R600_RB_BUFSZ
	orr	r4, r4, r0
	orr	r1, r4, r6
	mov	r0, r5
	bl	RADEON_WRITE
	ldr	r4, .L20+8
	ldr	r3, .L20+12
	ldr	r0, [r4]
	ldr	r1, [r3]
	bl	RADEON_WRITE
	ldr	r0, [r4]
	bl	RADEON_READ
	mov	r0, #15
	bl	mdelay
	ldr	r6, .L20+16
	mov	r1, #0
	ldr	r0, [r4]
	bl	RADEON_WRITE
	ldr	r10, .L20+20
	ldr	r3, [r7, #4]
	mov	r1, #0
	ldr	r0, [r6]
	ldr	r4, [r3]
	bl	RADEON_WRITE
	ldr	r3, [r10]
	cmp	r3, #0
	ble	.L3
	mov	r5, #0
	ldr	r9, .L20+24
.L4:
	mov	r0, r4
	ldr	r8, [r9]
	bl	be32_to_cpup
	mov	r1, r0
	mov	r0, r8
	bl	RADEON_WRITE
	ldr	r3, [r10]
	add	r5, r5, #1
	add	r3, r3, r3, lsl #1
	cmp	r3, r5
	add	r4, r4, #4
	bgt	.L4
.L3:
	ldr	r8, .L20+28
	ldr	r3, [r7]
	ldr	r10, .L20+32
	mov	r1, #0
	ldr	r0, [r8]
	ldr	r4, [r3]
	bl	RADEON_WRITE
	ldr	r3, [r10]
	cmp	r3, #0
	ble	.L5
	mov	r5, #0
	ldr	r9, .L20+36
.L6:
	mov	r0, r4
	ldr	r7, [r9]
	bl	be32_to_cpup
	mov	r1, r0
	mov	r0, r7
	bl	RADEON_WRITE
	ldr	r3, [r10]
	add	r5, r5, #1
	cmp	r3, r5
	add	r4, r4, #4
	bgt	.L6
.L5:
	mov	r1, #0
	ldr	r0, [r8]
	bl	RADEON_WRITE
	mov	r1, #0
	ldr	r0, [r6]
	bl	RADEON_WRITE
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r3, .L20+40
	mov	r1, #0
	ldr	r0, [r3]
	b	RADEON_WRITE
.L21:
	.align	2
.L20:
	.word	R600_CP_RB_CNTL
	.word	R600_RB_NO_UPDATE
	.word	R600_GRBM_SOFT_RESET
	.word	R600_SOFT_RESET_CP
	.word	R600_CP_ME_RAM_WADDR
	.word	PM4_UCODE_SIZE
	.word	R600_CP_ME_RAM_DATA
	.word	R600_CP_PFP_UCODE_ADDR
	.word	PFP_UCODE_SIZE
	.word	R600_CP_PFP_UCODE_DATA
	.word	R600_CP_ME_RAM_RADDR
	.size	r600_cp_load_microcode, .-r600_cp_load_microcode
	.comm	R600_SOFT_RESET_CP,4,4
	.comm	R600_RB_NO_UPDATE,4,4
	.comm	R600_GRBM_SOFT_RESET,4,4
	.comm	R600_CP_RB_CNTL,4,4
	.comm	R600_CP_PFP_UCODE_DATA,4,4
	.comm	R600_CP_PFP_UCODE_ADDR,4,4
	.comm	R600_CP_ME_RAM_WADDR,4,4
	.comm	R600_CP_ME_RAM_RADDR,4,4
	.comm	R600_CP_ME_RAM_DATA,4,4
	.comm	R600_BUF_SWAP_32BIT,4,4
	.comm	PM4_UCODE_SIZE,4,4
	.comm	PFP_UCODE_SIZE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
