	.file	"extr_fpudispatch.c_fpudispatch.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"class %d subop %d\n"
	.text
	.p2align 4
	.globl	fpudispatch
	.type	fpudispatch, @function
fpudispatch:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12d, edi
	mov	edi, 1
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rcx
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	ebx, esi
	call	VASSERT@PLT
	mov	rdi, rbp
	call	parisc_linux_get_fpu_type@PLT
	mov	rax, QWORD PTR FPU_TYPE_FLAG_POS[rip]
	mov	edi, r12d
	mov	r14d, DWORD PTR 0[rbp+rax*4]
	call	get_class@PLT
	mov	edi, r12d
	mov	r13d, eax
	cmp	eax, 1
	jne	.L2
	test	DWORD PTR PA2_0_FPU_FLAG[rip], r14d
	jne	.L15
	call	get_subop1_PA1_1@PLT
	mov	r14d, eax
.L4:
	cmp	QWORD PTR FPUDEBUG[rip], 0
	jne	.L16
.L5:
	lea	esi, -128[rbx]
	cmp	esi, 5
	ja	.L6
	lea	rax, .L8[rip]
	movsx	rcx, DWORD PTR [rax+rsi*4]
	add	rcx, rax
	notrack jmp	rcx
	.section	.rodata
	.align 4
	.align 4
.L8:
	.long	.L9-.L8
	.long	.L12-.L8
	.long	.L11-.L8
	.long	.L10-.L8
	.long	.L9-.L8
	.long	.L7-.L8
	.text
	.p2align 4,,10
	.p2align 3
.L15:
	call	get_subop1_PA2_0@PLT
	cmp	QWORD PTR FPUDEBUG[rip], 0
	mov	r14d, eax
	je	.L5
.L16:
	mov	edx, r14d
	mov	esi, r13d
	lea	rdi, .LC0[rip]
	call	printk@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L2:
	call	get_subop@PLT
	mov	r14d, eax
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L9:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rcx, rbp
	mov	edx, r14d
	pop	rbp
	.cfi_def_cfa_offset 32
	mov	esi, r13d
	mov	edi, r12d
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	decode_0c@PLT
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rsi, rbp
	mov	edi, r12d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	decode_06@PLT
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rcx, rbp
	mov	edx, r14d
	pop	rbp
	.cfi_def_cfa_offset 32
	mov	esi, r13d
	mov	edi, r12d
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	decode_0e@PLT
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rsi, rbp
	mov	edi, r12d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	decode_26@PLT
	.p2align 4,,10
	.p2align 3
.L12:
	.cfi_restore_state
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rsi, rbp
	mov	edi, r12d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	decode_2e@PLT
.L6:
	.cfi_restore_state
	pop	rbx
	.cfi_def_cfa_offset 40
	mov	eax, DWORD PTR UNIMPLEMENTEDEXCEPTION[rip]
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	fpudispatch, .-fpudispatch
	.comm	UNIMPLEMENTEDEXCEPTION,4,4
	.comm	PA2_0_FPU_FLAG,4,4
	.comm	FPU_TYPE_FLAG_POS,8,8
	.comm	FPUDEBUG,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_fpudispatch.c_fpudispatch.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"class %d subop %d\012\000"
	.text
	.align	2
	.global	fpudispatch
	.syntax unified
	.arm
	.fpu softvfp
	.type	fpudispatch, %function
fpudispatch:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r5, r3
	mov	r6, r0
	mov	r0, #1
	mov	r4, r1
	bl	VASSERT
	mov	r0, r5
	bl	parisc_linux_get_fpu_type
	ldr	r3, .L20
	mov	r0, r6
	ldr	r3, [r3]
	ldr	r8, [r5, r3, lsl #2]
	bl	get_class
	cmp	r0, #1
	mov	r7, r0
	bne	.L2
	ldr	r3, .L20+4
	mov	r0, r6
	ldr	r3, [r3]
	tst	r8, r3
	bne	.L18
	bl	get_subop1_PA1_1
	mov	r8, r0
.L4:
	ldr	r3, .L20+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L19
.L5:
	sub	ip, r4, #128
	cmp	ip, #5
	ldrls	pc, [pc, ip, asl #2]
	b	.L6
.L8:
	.word	.L9
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L7
.L18:
	bl	get_subop1_PA2_0
	ldr	r3, .L20+8
	mov	r8, r0
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L5
.L19:
	mov	r2, r8
	mov	r1, r7
	ldr	r0, .L20+12
	bl	printk
	b	.L5
.L2:
	mov	r0, r6
	bl	get_subop
	mov	r8, r0
	b	.L4
.L9:
	mov	r3, r5
	mov	r2, r8
	mov	r1, r7
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	decode_0c
.L7:
	mov	r1, r5
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	decode_06
.L10:
	mov	r3, r5
	mov	r2, r8
	mov	r1, r7
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	decode_0e
.L11:
	mov	r1, r5
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	decode_26
.L12:
	mov	r1, r5
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, lr}
	b	decode_2e
.L6:
	ldr	r3, .L20+16
	ldr	r0, [r3]
	pop	{r4, r5, r6, r7, r8, pc}
.L21:
	.align	2
.L20:
	.word	FPU_TYPE_FLAG_POS
	.word	PA2_0_FPU_FLAG
	.word	FPUDEBUG
	.word	.LC0
	.word	UNIMPLEMENTEDEXCEPTION
	.size	fpudispatch, .-fpudispatch
	.comm	UNIMPLEMENTEDEXCEPTION,4,4
	.comm	PA2_0_FPU_FLAG,4,4
	.comm	FPU_TYPE_FLAG_POS,4,4
	.comm	FPUDEBUG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
