	.file	"extr_curve25519.c_fe_mul.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	fe_mul, @function
fe_mul:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, DWORD PTR 12[rsi]
	mov	r13d, DWORD PTR 16[rsi]
	mov	ecx, DWORD PTR 20[rsi]
	mov	r14d, DWORD PTR 4[rsi]
	mov	r10d, DWORD PTR 4[rdx]
	mov	eax, DWORD PTR [rsi]
	mov	r15d, DWORD PTR 8[rsi]
	mov	DWORD PTR -44[rsp], ebx
	mov	ebx, DWORD PTR 24[rsi]
	mov	r8d, DWORD PTR 20[rdx]
	mov	QWORD PTR -8[rsp], rdi
	mov	edi, DWORD PTR 36[rsi]
	mov	ebp, DWORD PTR 24[rdx]
	mov	DWORD PTR -32[rsp], r13d
	mov	r13d, ecx
	mov	ecx, DWORD PTR 28[rsi]
	mov	r11d, DWORD PTR [rdx]
	mov	DWORD PTR -92[rsp], ebx
	mov	ebx, DWORD PTR 32[rsi]
	mov	esi, DWORD PTR 16[rdx]
	mov	DWORD PTR -88[rsp], r14d
	mov	DWORD PTR -84[rsp], ecx
	mov	ecx, DWORD PTR 8[rdx]
	mov	DWORD PTR -80[rsp], ebx
	mov	DWORD PTR -76[rsp], edi
	mov	edi, DWORD PTR 12[rdx]
	mov	DWORD PTR -100[rsp], r10d
	mov	r12d, DWORD PTR 28[rdx]
	mov	DWORD PTR -64[rsp], r8d
	mov	ebx, r12d
	mov	r12d, DWORD PTR 32[rdx]
	mov	edx, DWORD PTR 36[rdx]
	mov	DWORD PTR -72[rsp], esi
	mov	DWORD PTR -40[rsp], ebp
	mov	DWORD PTR -24[rsp], edx
	lea	edx, [rcx+rcx*8]
	mov	r14d, r12d
	lea	r10d, [rcx+rdx*2]
	lea	edx, [rdi+rdi*8]
	mov	DWORD PTR -28[rsp], ebx
	lea	r9d, [rdi+rdx*2]
	lea	edx, [rsi+rsi*8]
	mov	DWORD PTR -20[rsp], r14d
	lea	r12d, [rsi+rdx*2]
	lea	edx, [r8+r8*8]
	mov	DWORD PTR -68[rsp], r13d
	add	r13d, r13d
	lea	r8d, [r8+rdx*2]
	lea	edx, 0[rbp+rbp*8]
	mov	DWORD PTR -52[rsp], r13d
	mov	r13d, DWORD PTR -84[rsp]
	lea	ebp, 0[rbp+rdx*2]
	lea	esi, [r14+r14*8]
	mov	DWORD PTR -96[rsp], r11d
	imul	r11d, eax
	lea	edx, [rbx+rbx*8]
	lea	edx, [rbx+rdx*2]
	lea	ebx, [r14+rsi*2]
	mov	r14d, DWORD PTR -24[rsp]
	lea	esi, [r14+r14*8]
	lea	esi, [r14+rsi*2]
	mov	r14d, DWORD PTR -88[rsp]
	add	r14d, r14d
	mov	DWORD PTR -60[rsp], r14d
	mov	r14d, DWORD PTR -44[rsp]
	add	r14d, r14d
	mov	DWORD PTR -56[rsp], r14d
	lea	r14d, [r13+r13]
	mov	r13d, DWORD PTR -76[rsp]
	mov	DWORD PTR -36[rsp], r14d
	add	r13d, r13d
	mov	DWORD PTR -48[rsp], r13d
	mov	r13d, DWORD PTR -60[rsp]
	imul	r13d, esi
	add	r13d, r11d
	mov	r11d, r15d
	imul	r11d, ebx
	add	r13d, r11d
	mov	r11d, DWORD PTR -56[rsp]
	imul	r11d, edx
	add	r11d, r13d
	mov	r13d, DWORD PTR -32[rsp]
	imul	r13d, ebp
	add	r11d, r13d
	mov	r13d, DWORD PTR -52[rsp]
	imul	r13d, r8d
	add	r13d, r11d
	mov	r11d, DWORD PTR -92[rsp]
	imul	r11d, r12d
	add	r13d, r11d
	mov	r11d, r14d
	mov	r14d, DWORD PTR -100[rsp]
	imul	r11d, r9d
	add	r11d, r13d
	mov	r13d, DWORD PTR -80[rsp]
	imul	r13d, r10d
	add	r11d, r13d
	mov	DWORD PTR -16[rsp], r11d
	mov	r11d, DWORD PTR -48[rsp]
	imul	r11d, r14d
	mov	r13d, r11d
	lea	r11d, [r11+r11*8]
	lea	r13d, 0[r13+r11*2]
	mov	r11d, DWORD PTR -16[rsp]
	add	r11d, r13d
	mov	r13d, r14d
	mov	DWORD PTR -16[rsp], r11d
	mov	r14d, DWORD PTR -88[rsp]
	imul	r13d, eax
	imul	r14d, DWORD PTR -96[rsp]
	mov	r11d, r14d
	mov	r14d, DWORD PTR -44[rsp]
	add	r11d, r13d
	mov	r13d, r15d
	imul	r13d, esi
	add	r11d, r13d
	mov	r13d, r14d
	imul	r13d, ebx
	add	r13d, r11d
	mov	r11d, DWORD PTR -32[rsp]
	imul	r11d, edx
	add	r13d, r11d
	mov	r11d, DWORD PTR -68[rsp]
	imul	r11d, ebp
	imul	r10d, DWORD PTR -76[rsp]
	add	r11d, r13d
	mov	r13d, DWORD PTR -92[rsp]
	imul	r13d, r8d
	add	r11d, r13d
	mov	r13d, DWORD PTR -84[rsp]
	imul	r13d, r12d
	add	r13d, r11d
	mov	r11d, DWORD PTR -80[rsp]
	imul	r11d, r9d
	imul	r9d, DWORD PTR -48[rsp]
	add	r11d, r13d
	mov	r13d, DWORD PTR -56[rsp]
	add	r10d, r11d
	mov	DWORD PTR -12[rsp], r10d
	mov	r10d, eax
	imul	r13d, esi
	imul	r10d, ecx
	mov	r11d, r10d
	mov	r10d, DWORD PTR -100[rsp]
	imul	r10d, DWORD PTR -60[rsp]
	add	r10d, r11d
	mov	r11d, DWORD PTR -96[rsp]
	imul	r11d, r15d
	add	r10d, r11d
	mov	r11d, r13d
	mov	r13d, DWORD PTR -32[rsp]
	add	r11d, r10d
	mov	r10d, r13d
	imul	r10d, ebx
	add	r11d, r10d
	mov	r10d, DWORD PTR -52[rsp]
	imul	r10d, edx
	add	r10d, r11d
	mov	r11d, DWORD PTR -92[rsp]
	imul	r11d, ebp
	add	r10d, r11d
	mov	r11d, DWORD PTR -36[rsp]
	imul	r11d, r8d
	add	r11d, r10d
	mov	r10d, DWORD PTR -80[rsp]
	imul	r10d, r12d
	add	r10d, r11d
	mov	r11d, r13d
	add	r9d, r10d
	mov	DWORD PTR -32[rsp], r9d
	mov	r9d, eax
	imul	r9d, edi
	mov	r10d, r9d
	mov	r9d, DWORD PTR -88[rsp]
	imul	r9d, ecx
	add	r9d, r10d
	mov	r10d, DWORD PTR -100[rsp]
	imul	r10d, r15d
	imul	r12d, DWORD PTR -76[rsp]
	add	r9d, r10d
	mov	r10d, DWORD PTR -96[rsp]
	imul	r10d, r14d
	add	r10d, r9d
	mov	r9d, r13d
	mov	r13d, DWORD PTR -92[rsp]
	imul	r9d, esi
	imul	r13d, edx
	add	r10d, r9d
	mov	r9d, DWORD PTR -68[rsp]
	imul	r9d, ebx
	add	r9d, r10d
	add	r9d, r13d
	mov	r13d, DWORD PTR -84[rsp]
	imul	r13d, ebp
	mov	r10d, r13d
	add	r10d, r9d
	mov	r9d, DWORD PTR -80[rsp]
	imul	r9d, r8d
	add	r9d, r10d
	lea	r13d, [r9+r12]
	mov	r12d, DWORD PTR -72[rsp]
	imul	r12d, eax
	mov	r10d, r12d
	mov	r12d, DWORD PTR -60[rsp]
	imul	r12d, edi
	mov	r9d, r12d
	mov	r12d, r15d
	imul	r12d, ecx
	add	r9d, r10d
	add	r9d, r12d
	mov	r12d, DWORD PTR -100[rsp]
	imul	r12d, DWORD PTR -56[rsp]
	mov	r10d, r12d
	mov	r12d, DWORD PTR -92[rsp]
	add	r10d, r9d
	mov	r9d, DWORD PTR -96[rsp]
	imul	r12d, ebx
	imul	r9d, r11d
	add	r10d, r9d
	mov	r9d, DWORD PTR -52[rsp]
	imul	r9d, esi
	add	r9d, r10d
	mov	r10d, DWORD PTR -36[rsp]
	add	r9d, r12d
	imul	r10d, edx
	add	r10d, r9d
	mov	r9d, DWORD PTR -80[rsp]
	imul	r9d, ebp
	add	r9d, r10d
	imul	r8d, DWORD PTR -48[rsp]
	mov	r10d, DWORD PTR -68[rsp]
	imul	r10d, DWORD PTR -96[rsp]
	imul	ebp, DWORD PTR -76[rsp]
	lea	r12d, [r9+r8]
	mov	r8d, DWORD PTR -64[rsp]
	imul	r8d, eax
	mov	r9d, r8d
	mov	r8d, DWORD PTR -88[rsp]
	imul	r8d, DWORD PTR -72[rsp]
	add	r8d, r9d
	mov	r9d, r15d
	imul	r9d, edi
	add	r8d, r9d
	mov	r9d, r14d
	imul	r9d, ecx
	add	r9d, r8d
	mov	r8d, DWORD PTR -100[rsp]
	imul	r8d, r11d
	add	r9d, r8d
	mov	r8d, r10d
	mov	r10d, DWORD PTR -80[rsp]
	add	r8d, r9d
	mov	r9d, DWORD PTR -92[rsp]
	imul	r9d, esi
	add	r8d, r9d
	mov	r9d, DWORD PTR -84[rsp]
	imul	r9d, ebx
	add	r9d, r8d
	mov	r8d, r10d
	imul	r8d, edx
	add	r8d, r9d
	mov	r9d, DWORD PTR -40[rsp]
	add	ebp, r8d
	mov	r8d, DWORD PTR -64[rsp]
	imul	r8d, DWORD PTR -60[rsp]
	imul	r9d, eax
	add	r8d, r9d
	mov	r9d, DWORD PTR -72[rsp]
	imul	r9d, r15d
	add	r8d, r9d
	mov	r9d, DWORD PTR -56[rsp]
	imul	r9d, edi
	add	r9d, r8d
	mov	r8d, r11d
	imul	r8d, ecx
	add	r9d, r8d
	mov	r8d, DWORD PTR -100[rsp]
	imul	r8d, DWORD PTR -52[rsp]
	add	r8d, r9d
	mov	r9d, DWORD PTR -92[rsp]
	imul	r9d, DWORD PTR -96[rsp]
	add	r8d, r9d
	mov	r9d, DWORD PTR -36[rsp]
	imul	edx, DWORD PTR -48[rsp]
	imul	r9d, esi
	add	r9d, r8d
	mov	r8d, r10d
	imul	r8d, ebx
	add	r8d, r9d
	add	edx, r8d
	mov	DWORD PTR -80[rsp], edx
	mov	edx, DWORD PTR -28[rsp]
	imul	edx, eax
	mov	r8d, edx
	mov	edx, DWORD PTR -88[rsp]
	imul	edx, DWORD PTR -40[rsp]
	add	edx, r8d
	mov	r8d, DWORD PTR -64[rsp]
	mov	r9d, DWORD PTR -92[rsp]
	imul	ebx, DWORD PTR -76[rsp]
	imul	r8d, r15d
	add	edx, r8d
	mov	r8d, DWORD PTR -72[rsp]
	imul	r8d, r14d
	mov	r14d, DWORD PTR -84[rsp]
	imul	r14d, DWORD PTR -96[rsp]
	add	r8d, edx
	mov	edx, r11d
	imul	edx, edi
	add	r8d, edx
	mov	edx, DWORD PTR -68[rsp]
	imul	edx, ecx
	add	edx, r8d
	mov	r8d, DWORD PTR -100[rsp]
	imul	r8d, r9d
	add	edx, r8d
	mov	r8d, r14d
	mov	r14d, DWORD PTR -56[rsp]
	add	r8d, edx
	imul	r14d, DWORD PTR -64[rsp]
	mov	edx, r10d
	imul	edx, esi
	add	edx, r8d
	mov	r8d, DWORD PTR -20[rsp]
	add	ebx, edx
	mov	edx, DWORD PTR -60[rsp]
	imul	edx, DWORD PTR -28[rsp]
	imul	r8d, eax
	add	edx, r8d
	mov	r8d, DWORD PTR -40[rsp]
	imul	r8d, r15d
	add	r8d, edx
	mov	edx, r14d
	mov	r14d, DWORD PTR -36[rsp]
	add	edx, r8d
	mov	r8d, DWORD PTR -72[rsp]
	imul	r14d, DWORD PTR -100[rsp]
	imul	eax, DWORD PTR -24[rsp]
	imul	r8d, r11d
	imul	r15d, DWORD PTR -28[rsp]
	imul	esi, DWORD PTR -48[rsp]
	add	r8d, edx
	mov	edx, DWORD PTR -52[rsp]
	imul	edx, edi
	imul	edi, r9d
	add	edx, r8d
	mov	r8d, r9d
	imul	r8d, ecx
	imul	ecx, DWORD PTR -84[rsp]
	add	r8d, edx
	mov	edx, r14d
	mov	r14d, DWORD PTR -88[rsp]
	imul	r14d, DWORD PTR -20[rsp]
	add	edx, r8d
	mov	r8d, DWORD PTR -96[rsp]
	imul	r8d, r10d
	add	eax, r14d
	add	eax, r15d
	mov	r15d, DWORD PTR -44[rsp]
	imul	r15d, DWORD PTR -40[rsp]
	add	edx, r8d
	add	esi, edx
	add	eax, r15d
	mov	r15d, DWORD PTR -64[rsp]
	imul	r15d, r11d
	add	eax, r15d
	mov	r15d, DWORD PTR -68[rsp]
	imul	r15d, DWORD PTR -72[rsp]
	add	eax, r15d
	add	eax, edi
	add	eax, ecx
	mov	ecx, DWORD PTR -100[rsp]
	imul	ecx, r10d
	add	eax, ecx
	mov	ecx, DWORD PTR -76[rsp]
	imul	ecx, DWORD PTR -96[rsp]
	mov	edi, DWORD PTR -16[rsp]
	mov	r14d, DWORD PTR -80[rsp]
	add	ecx, eax
	lea	edx, 33554432[rdi]
	mov	eax, DWORD PTR kTop38Bits[rip]
	mov	r10d, edx
	sar	r10d, 26
	and	edx, eax
	add	r10d, DWORD PTR -12[rsp]
	sub	edi, edx
	lea	edx, 33554432[r12]
	mov	r8d, edx
	and	edx, eax
	mov	r11d, edi
	sar	r8d, 26
	lea	edi, 16777216[r10]
	add	ebp, r8d
	mov	r8d, r12d
	mov	r9d, edi
	sub	r8d, edx
	mov	edx, DWORD PTR kTop39Bits[rip]
	sar	r9d, 25
	add	r9d, DWORD PTR -32[rsp]
	lea	r12d, 33554432[r9]
	and	edi, edx
	sub	r10d, edi
	lea	edi, 16777216[rbp]
	mov	r15d, edi
	and	edi, edx
	mov	DWORD PTR -100[rsp], r10d
	sub	ebp, edi
	sar	r15d, 25
	mov	edi, r12d
	add	r14d, r15d
	sar	edi, 26
	mov	DWORD PTR -96[rsp], ebp
	add	r13d, edi
	lea	edi, 33554432[r14]
	mov	DWORD PTR -92[rsp], edi
	lea	ebp, 16777216[r13]
	sar	edi, 26
	add	ebx, edi
	mov	r15d, ebp
	mov	DWORD PTR -88[rsp], ebx
	sar	r15d, 25
	add	ebx, 16777216
	add	r8d, r15d
	mov	r15d, ebx
	sar	r15d, 25
	lea	edi, 33554432[r8]
	add	esi, r15d
	lea	r15d, 33554432[rsi]
	mov	r10d, r15d
	mov	DWORD PTR -84[rsp], r15d
	sar	r10d, 26
	add	ecx, r10d
	lea	r15d, 16777216[rcx]
	mov	r10d, r15d
	mov	DWORD PTR -80[rsp], r15d
	sar	r10d, 25
	lea	r15d, [r10+r10*8]
	lea	r10d, [r10+r15*2]
	mov	r15d, eax
	add	r11d, r10d
	lea	r10d, 33554432[r11]
	and	r15d, r10d
	sar	r10d, 26
	sub	r11d, r15d
	add	r10d, DWORD PTR -100[rsp]
	mov	r15, QWORD PTR -8[rsp]
	and	r12d, eax
	sub	r9d, r12d
	and	ebp, edx
	and	ebx, edx
	and	edx, DWORD PTR -80[rsp]
	mov	DWORD PTR 8[r15], r9d
	mov	r9d, r13d
	sub	ecx, edx
	sub	r9d, ebp
	mov	DWORD PTR [r15], r11d
	mov	DWORD PTR 12[r15], r9d
	mov	r9d, eax
	and	r9d, edi
	sar	edi, 26
	add	edi, DWORD PTR -96[rsp]
	mov	DWORD PTR 4[r15], r10d
	mov	DWORD PTR 20[r15], edi
	mov	edi, DWORD PTR -92[rsp]
	sub	r8d, r9d
	mov	DWORD PTR 16[r15], r8d
	and	edi, eax
	and	eax, DWORD PTR -84[rsp]
	mov	DWORD PTR 36[r15], ecx
	sub	r14d, edi
	mov	edi, DWORD PTR -88[rsp]
	sub	esi, eax
	mov	DWORD PTR 24[r15], r14d
	sub	edi, ebx
	mov	DWORD PTR 32[r15], esi
	mov	DWORD PTR 28[r15], edi
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	fe_mul, .-fe_mul
	.comm	kTop39Bits,4,4
	.comm	kTop38Bits,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_curve25519.c_fe_mul.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	fe_mul, %function
fe_mul:
	@ args = 0, pretend = 0, frame = 80
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r10, [r2, #12]
	ldr	ip, [r1, #4]
	mov	fp, r10
	lsl	lr, ip, #1
	ldr	r4, [r2, #16]
	mul	fp, lr, fp
	sub	sp, sp, #84
	str	r0, [sp, #68]
	mov	r3, r4
	ldr	r0, [r1]
	str	r4, [sp, #40]
	str	r0, [sp, #8]
	mla	r0, r4, r0, fp
	ldr	r4, [r2, #8]
	mov	fp, r0
	str	r10, [sp, #28]
	mov	r10, r4
	ldr	r9, [r2, #20]
	mul	r3, ip, r3
	mov	r8, r9
	ldr	r5, [sp, #8]
	str	r9, [sp, #48]
	mla	r5, r9, r5, r3
	str	r1, [sp, #4]
	ldr	r9, [r2]
	ldr	r1, [r1, #8]
	ldr	r6, [r2, #24]
	str	r10, [sp, #36]
	str	r1, [sp, #16]
	mla	r1, r10, r1, fp
	mov	r10, r9
	mov	r7, r6
	ldr	r0, [r2, #28]
	str	r5, [sp, #32]
	ldr	r5, [r2, #32]
	mul	r8, lr, r8
	str	r5, [sp, #44]
	mov	r5, r0
	ldr	r3, [sp, #8]
	str	r0, [sp, #56]
	mla	r3, r6, r3, r8
	mov	r8, r3
	ldr	r0, [sp, #44]
	mul	r10, ip, r10
	mul	r0, ip, r0
	ldr	r4, [r2, #36]
	mul	r7, ip, r7
	ldr	r2, [r2, #4]
	mov	fp, r1
	str	r2, [sp, #24]
	str	r9, [sp, #20]
	str	r10, [sp, #12]
	mov	r10, r0
	ldr	r0, [sp, #56]
	ldr	r1, [sp, #8]
	ldr	r9, [sp, #28]
	mla	r1, r0, r1, r7
	ldr	r3, [sp, #32]
	mov	r7, r1
	ldr	r1, [sp, #16]
	mul	r5, lr, r5
	mla	r3, r9, r1, r3
	ldr	r9, [sp, #4]
	ldr	r1, [sp, #8]
	ldr	r9, [r9, #12]
	add	r2, r4, r4, lsl #3
	lsl	r0, r9, #1
	ldr	r9, [sp, #44]
	add	r2, r4, r2, lsl #1
	mla	r1, r9, r1, r5
	ldr	r9, [sp, #40]
	mov	r5, r1
	ldr	r1, [sp, #16]
	str	r2, [sp, #32]
	mla	r1, r9, r1, r8
	ldr	r8, [sp, #24]
	mul	r2, lr, r2
	mov	r9, r8
	mul	r9, lr, r9
	mov	lr, r9
	mov	r9, r8
	mla	r8, r0, r8, fp
	str	r0, [sp, #52]
	ldr	r0, [sp, #36]
	mov	fp, r8
	mov	r8, r0
	mul	r8, ip, r8
	mov	ip, r8
	mov	r8, r9
	str	r1, [sp, #64]
	ldr	r9, [sp, #12]
	ldr	r1, [sp, #8]
	mla	r1, r8, r1, r9
	str	r1, [sp, #60]
	ldr	r1, [sp, #8]
	ldr	r8, [sp, #16]
	mla	r1, r4, r1, r10
	ldr	r10, [sp, #48]
	mov	r4, r1
	mla	r8, r10, r8, r7
	ldr	r1, [sp, #4]
	mov	r7, r8
	ldr	r8, [r1, #12]
	ldr	r9, [sp, #20]
	mla	r8, r0, r8, r3
	mov	r3, r8
	ldr	r8, [r1, #16]
	ldr	r1, [sp, #8]
	str	r8, [sp, #12]
	mla	r1, r9, r1, r2
	mov	r2, r1
	ldr	r1, [sp, #8]
	ldr	r8, [sp, #64]
	mla	r1, r0, r1, lr
	mov	lr, r1
	ldr	r1, [sp, #16]
	ldr	r0, [sp, #52]
	mov	r10, r1
	mla	r10, r6, r10, r5
	mov	r5, r10
	ldr	r10, [sp, #28]
	mla	r8, r0, r10, r8
	ldr	r10, [sp, #12]
	ldr	r0, [sp, #44]
	mla	r10, r9, r10, fp
	mov	fp, r10
	add	r10, r0, r0, lsl #3
	ldr	r9, [sp, #60]
	str	r10, [sp, #44]
	ldr	r10, [sp, #32]
	mla	r1, r10, r1, r9
	ldr	r9, [sp, #28]
	str	r1, [sp, #60]
	ldr	r1, [sp, #8]
	ldr	r10, [sp, #16]
	mla	r1, r9, r1, ip
	ldr	r9, [sp, #44]
	mov	ip, r1
	add	r1, r0, r9, lsl #1
	mov	r9, r1
	ldr	r0, [sp, #56]
	ldr	r1, [sp, #4]
	mla	r10, r0, r10, r4
	mov	r4, r10
	ldr	r10, [r1, #12]
	ldr	r1, [sp, #40]
	mla	r10, r1, r10, r7
	ldr	r1, [sp, #24]
	mov	r7, r10
	ldr	r10, [sp, #12]
	mla	r10, r1, r10, r3
	ldr	r3, [sp, #16]
	str	r10, [sp, #64]
	mov	r10, r9
	mov	r9, r3
	mov	r1, r3
	mla	r9, r10, r9, r2
	mov	r2, r9
	ldr	r9, [sp, #20]
	ldr	r3, [sp, #48]
	mla	r1, r9, r1, lr
	mov	lr, r1
	ldr	r1, [sp, #4]
	str	r10, [sp, #44]
	ldr	r1, [r1, #20]
	lsl	r1, r1, #1
	mov	r9, r1
	ldr	r1, [sp, #52]
	str	r9, [sp, #56]
	mla	r3, r1, r3, r5
	ldr	r1, [sp, #36]
	mov	r5, r3
	ldr	r3, [sp, #12]
	mla	r3, r1, r3, r8
	ldr	r1, [sp, #32]
	mov	r8, r3
	mla	r1, r9, r1, fp
	mov	fp, r1
	add	r1, r0, r0, lsl #3
	str	r1, [sp, #8]
	mov	r1, r10
	ldr	r3, [sp, #4]
	ldr	r10, [sp, #60]
	ldr	r9, [r3, #12]
	mla	r9, r1, r9, r10
	mov	r1, r9
	ldr	r9, [sp, #24]
	ldr	r10, [sp, #16]
	mla	r10, r9, r10, ip
	mov	ip, r10
	ldr	r10, [sp, #8]
	ldr	r9, [sp, #12]
	add	r10, r0, r10, lsl #1
	str	r10, [sp, #16]
	ldr	r0, [r3, #12]
	ldr	r10, [sp, #28]
	mla	r0, r6, r0, r4
	mla	r9, r10, r9, r7
	mov	r4, r0
	mov	r7, r9
	ldr	r0, [r3, #20]
	ldr	r9, [sp, #20]
	ldr	r10, [sp, #64]
	ldr	r3, [r3, #24]
	mla	r10, r9, r0, r10
	ldr	r0, [sp, #52]
	str	r10, [sp, #60]
	mov	r10, r0
	ldr	r9, [sp, #16]
	str	r3, [sp, #8]
	mla	r10, r9, r10, r2
	mov	r2, r10
	ldr	r10, [sp, #32]
	ldr	r9, [sp, #40]
	mla	r10, r0, r10, lr
	mov	lr, r10
	ldr	r10, [sp, #12]
	ldr	r0, [sp, #56]
	mla	r10, r9, r10, r5
	mov	r5, r10
	mov	r10, r3
	ldr	r9, [sp, #24]
	add	r3, r6, r6, lsl #3
	mla	r9, r0, r9, r8
	str	r3, [sp, #52]
	mov	r8, r9
	ldr	r3, [sp, #12]
	ldr	r9, [sp, #44]
	mla	r10, r9, r10, fp
	mov	r9, r3
	mov	fp, r10
	ldr	r10, [sp, #16]
	mla	r9, r10, r9, r1
	ldr	r10, [sp, #4]
	mov	r1, r9
	ldr	r0, [r10, #12]
	ldr	r9, [sp, #20]
	mla	r0, r9, r0, ip
	mov	ip, r10
	str	r0, [sp, #72]
	ldr	r0, [r10, #28]
	mov	r10, r3
	ldr	r3, [sp, #48]
	mla	r10, r3, r10, r4
	ldr	r3, [ip, #20]
	mov	r4, r10
	ldr	r10, [sp, #36]
	mla	r3, r10, r3, r7
	mov	r7, r3
	ldr	r3, [sp, #52]
	ldr	ip, [sp, #60]
	add	r10, r6, r3, lsl #1
	mov	r6, r10
	ldr	r3, [sp, #8]
	ldr	r10, [sp, #32]
	str	r6, [sp, #52]
	mla	r3, r10, r3, ip
	ldr	r10, [sp, #68]
	str	r10, [sp, #64]
	mov	r10, r6
	ldr	r6, [sp, #12]
	mov	ip, r6
	mla	ip, r10, ip, r2
	ldr	r10, [sp, #44]
	mov	r2, ip
	mla	r6, r10, r6, lr
	mov	lr, r6
	mov	r6, r0
	lsl	r0, r0, #1
	mov	ip, r0
	ldr	r10, [sp, #28]
	ldr	r0, [sp, #56]
	str	ip, [sp, #60]
	mla	r10, r0, r10, r5
	mov	r5, r10
	ldr	r10, [sp, #8]
	mla	r10, r9, r10, r8
	ldr	r9, [sp, #16]
	mov	r8, r10
	mla	r9, ip, r9, fp
	ldr	r10, [sp, #48]
	mov	fp, r9
	ldr	r9, [sp, #4]
	add	r0, r10, r10, lsl #3
	str	r0, [sp, #68]
	ldr	r10, [sp, #52]
	ldr	r0, [r9, #20]
	ldr	ip, [sp, #72]
	mla	r0, r10, r0, r1
	ldr	r10, [sp, #32]
	mov	r1, r0
	ldr	r0, [sp, #12]
	str	r6, [sp, #12]
	mla	ip, r10, r0, ip
	ldr	r0, [r9, #20]
	ldr	r9, [sp, #40]
	ldr	r10, [sp, #48]
	mla	r0, r9, r0, r4
	ldr	r9, [sp, #24]
	mov	r4, r0
	ldr	r0, [sp, #8]
	mla	r0, r9, r0, r7
	mov	r7, r0
	ldr	r0, [sp, #68]
	ldr	r9, [sp, #44]
	add	r0, r10, r0, lsl #1
	mov	r10, r0
	mov	r0, r9
	mla	r0, r6, r0, r3
	ldr	r6, [sp, #4]
	str	r0, [sp, #76]
	ldr	r0, [r6, #32]
	ldr	r6, [sp, #56]
	str	r10, [sp, #48]
	mov	r3, r6
	mla	r3, r10, r3, r2
	ldr	r2, [sp, #8]
	str	r3, [sp, #56]
	mov	r3, r2
	ldr	r10, [sp, #16]
	mla	r10, r6, r10, lr
	ldr	r6, [sp, #48]
	mov	lr, r10
	ldr	r10, [sp, #36]
	mla	r2, r6, r2, r1
	mla	r3, r10, r3, r5
	str	r2, [sp, #68]
	mov	r5, r3
	ldr	r2, [sp, #4]
	ldr	r3, [sp, #60]
	ldr	r10, [sp, #32]
	ldr	r1, [sp, #28]
	mla	r10, r3, r10, r8
	ldr	r3, [r2, #20]
	mov	r8, r10
	mla	r3, r9, r3, ip
	ldr	ip, [sp, #8]
	ldr	r9, [sp, #20]
	mov	r6, ip
	mla	r6, r1, r6, r4
	mov	r1, r9
	mov	r4, r6
	ldr	r6, [sp, #12]
	ldr	r10, [sp, #52]
	mla	r1, r6, r1, r7
	ldr	r6, [r2, #36]
	mov	r2, ip
	mla	r10, r0, r10, fp
	mov	fp, r10
	mov	r7, r1
	str	r3, [sp, #72]
	ldr	r1, [sp, #16]
	ldr	r3, [sp, #76]
	ldr	r10, [sp, #40]
	mla	r3, r0, r1, r3
	ldr	r1, [sp, #40]
	add	r10, r10, r10, lsl #3
	add	r1, r1, r10, lsl #1
	ldr	r10, [sp, #52]
	str	r1, [sp, #4]
	mla	r2, r10, r2, lr
	mov	lr, r2
	ldr	r2, [sp, #56]
	ldr	r10, [sp, #24]
	mla	r2, r1, ip, r2
	ldr	r1, [sp, #44]
	str	r2, [sp, #20]
	ldr	r2, [sp, #60]
	mla	r1, r0, r1, r8
	mla	r10, r2, r10, r5
	mov	r8, r1
	ldr	r1, [sp, #48]
	mov	r5, r10
	lsl	r10, r6, #1
	mla	r1, r10, r1, fp
	str	r1, [sp, #40]
	ldr	r1, [sp, #12]
	ldr	r2, [sp, #4]
	ldr	ip, [sp, #68]
	ldr	fp, [sp, #28]
	mla	ip, r2, r1, ip
	ldr	r1, [sp, #16]
	ldr	r2, [sp, #8]
	str	ip, [sp, #56]
	ldr	ip, [sp, #72]
	add	fp, fp, fp, lsl #3
	mla	ip, r1, r2, ip
	ldr	r1, [sp, #36]
	ldr	r2, [sp, #12]
	mla	r1, r2, r1, r4
	str	r1, [sp, #68]
	ldr	r1, [sp, #32]
	ldr	r4, [sp, #60]
	mla	r1, r0, r1, r7
	mov	r7, r1
	ldr	r1, [sp, #52]
	ldr	r2, [sp, #20]
	mla	r1, r6, r1, r3
	mov	r3, r1
	ldr	r1, [sp, #28]
	str	r9, [sp, #20]
	add	fp, r1, fp, lsl #1
	ldr	r1, [sp, #48]
	mla	r9, r0, r9, r5
	mla	r1, r4, r1, lr
	mov	lr, r1
	ldr	r1, [sp, #16]
	mov	r5, r9
	mla	r1, r10, r1, r8
	ldr	r9, [sp, #36]
	ldr	r8, [sp, #40]
	mla	r2, fp, r4, r2
	add	r8, r8, #33554432
	add	r4, r9, r9, lsl #3
	str	r8, [sp, #8]
	str	r4, [sp, #36]
	ldr	r8, [sp, #24]
	ldr	r4, [sp, #56]
	mul	r8, r10, r8
	mla	r4, fp, r0, r4
	str	r1, [sp, #28]
	str	r8, [sp, #16]
	mov	r1, r4
	ldr	r8, [sp, #52]
	ldr	r4, [sp, #12]
	mla	r8, r4, r8, ip
	mov	ip, r8
	ldr	r8, [sp, #44]
	ldr	r4, [sp, #68]
	mla	r8, r6, r8, r7
	mov	r7, r8
	ldr	r8, [sp, #24]
	mla	r4, r0, r8, r4
	ldr	r8, [sp, #8]
	add	r3, r3, r8, asr #26
	mov	r8, r3
	mov	r3, r9
	ldr	r9, [sp, #36]
	str	r8, [sp, #24]
	add	r3, r3, r9, lsl #1
	mla	r2, r3, r0, r2
	mla	r1, r3, r6, r1
	ldr	r3, [sp, #48]
	add	r9, r8, #16777216
	mla	r3, r0, r3, ip
	mov	ip, r3
	str	r9, [sp, #12]
	ldr	r9, [sp, #4]
	ldr	r8, [sp, #32]
	mla	r9, r0, r9, lr
	mov	lr, r9
	mla	r8, r10, r8, r5
	ldr	r0, [sp, #20]
	ldr	r9, [sp, #28]
	mov	r5, r8
	ldr	r8, [sp, #12]
	mla	r0, r6, r0, r4
	add	r8, r9, r8, asr #25
	ldr	r9, [sp, #16]
	ldr	r3, [sp, #16]
	add	r9, r9, r9, lsl #3
	mov	r4, r0
	add	r0, r3, r9, lsl #1
	ldr	r9, [sp, #4]
	str	r8, [sp, #28]
	mla	r9, r6, r9, ip
	mov	ip, r9
	add	r8, r8, #33554432
	add	r7, r7, r8, asr #26
	add	r3, r7, #16777216
	mla	lr, r10, fp, lr
	mov	fp, r3
	add	r2, r2, r0
	str	r7, [sp, #32]
	add	r7, r2, #33554432
	add	r1, r1, r7, asr #26
	str	r1, [sp, #16]
	add	r3, r5, r3, asr #25
	add	r1, r1, #16777216
	str	r3, [sp, #36]
	add	r5, r3, #33554432
	add	lr, lr, r1, asr #25
	ldr	r3, .L4
	str	lr, [sp, #20]
	add	lr, lr, #33554432
	ldr	r3, [r3]
	ldr	r9, [sp, #8]
	add	r0, r4, r5, asr #26
	add	ip, ip, lr, asr #26
	str	ip, [sp, #4]
	add	r4, r0, #16777216
	ldr	ip, [sp, #40]
	str	r0, [sp, #44]
	and	r7, r7, r3
	asr	r0, r4, #25
	and	r9, r9, r3
	sub	r2, r2, r7
	add	r10, r0, r0, lsl #3
	sub	r7, ip, r9
	ldr	ip, [sp, #4]
	add	r0, r0, r10, lsl #1
	ldr	r6, .L4+4
	add	r0, r0, r2
	add	ip, ip, #16777216
	ldr	r6, [r6]
	add	r9, r7, ip, asr #25
	add	r7, r0, #33554432
	ldr	r2, [sp, #12]
	str	r7, [sp, #8]
	and	r7, r3, r7
	str	r7, [sp, #12]
	and	r7, r6, fp
	ldr	fp, [sp, #24]
	and	r2, r6, r2
	sub	r2, fp, r2
	ldr	fp, [sp, #16]
	and	r1, r1, r6
	and	r4, r4, r6
	sub	r1, fp, r1
	and	ip, ip, r6
	ldr	fp, [sp, #36]
	ldr	r6, [sp, #28]
	and	r5, r5, r3
	and	r8, r8, r3
	sub	r5, fp, r5
	sub	r8, r6, r8
	ldr	fp, [sp, #12]
	ldr	r6, [sp, #32]
	and	lr, lr, r3
	sub	r7, r6, r7
	ldr	r6, [sp, #8]
	add	r10, r9, #33554432
	add	r1, r1, r6, asr #26
	ldr	r6, [sp, #20]
	sub	r0, r0, fp
	sub	lr, r6, lr
	ldr	fp, [sp, #44]
	ldr	r6, [sp, #4]
	add	r2, r2, r10, asr #26
	and	r3, r3, r10
	ldr	r10, [sp, #64]
	sub	r4, fp, r4
	sub	ip, r6, ip
	sub	r3, r9, r3
	stmib	r10, {r1, lr}
	str	r5, [r10, #32]
	str	r8, [r10, #24]
	str	r0, [r10]
	str	r4, [r10, #36]
	str	r7, [r10, #28]
	str	ip, [r10, #12]
	str	r3, [r10, #16]
	str	r2, [r10, #20]
	add	sp, sp, #84
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
	.align	2
.L4:
	.word	kTop38Bits
	.word	kTop39Bits
	.size	fe_mul, .-fe_mul
	.comm	kTop39Bits,4,4
	.comm	kTop38Bits,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
