	.file	"extr_nv50.c_nv50_clk_calc.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	nv50_clk_calc
	.type	nv50_clk_calc, @function
nv50_clk_calc:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 72
	.cfi_def_cfa_offset 128
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 56[rsp], rax
	xor	eax, eax
	call	nv50_clk@PLT
	mov	rdx, QWORD PTR nv_clk_src_shader[rip]
	mov	r12, rax
	lea	rbp, 8[rax]
	mov	rax, QWORD PTR [rax]
	mov	rsi, r12
	mov	rdi, rbp
	mov	QWORD PTR [rsp], rax
	mov	rax, QWORD PTR [rbx]
	mov	ebx, DWORD PTR [rax+rdx*4]
	mov	rdx, QWORD PTR nv_clk_src_core[rip]
	mov	DWORD PTR 12[rsp], ebx
	mov	ebx, DWORD PTR [rax+rdx*4]
	mov	rdx, QWORD PTR nv_clk_src_vdec[rip]
	mov	r14d, DWORD PTR [rax+rdx*4]
	mov	rdx, QWORD PTR nv_clk_src_dom6[rip]
	mov	eax, DWORD PTR [rax+rdx*4]
	mov	DWORD PTR 8[rsp], eax
	call	clk_init@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L29
.L1:
	mov	rax, QWORD PTR 56[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L30
	add	rsp, 72
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r13d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L29:
	.cfi_restore_state
	mov	esi, DWORD PTR fifo[rip]
	mov	edx, 1
	mov	rdi, rbp
	call	clk_wr32@PLT
	mov	esi, 8000
	mov	rdi, rbp
	call	clk_nsec@PLT
	xor	edx, edx
	mov	esi, 16
	mov	rdi, rbp
	call	clk_setf@PLT
	xor	esi, esi
	mov	edx, 1
	mov	rdi, rbp
	call	clk_wait@PLT
	test	r14d, r14d
	jne	.L31
	mov	DWORD PTR 16[rsp], 0
	xor	r9d, r9d
	xor	r8d, r8d
	lea	r15, 48[rsp]
.L3:
	mov	eax, DWORD PTR 8[rsp]
	test	eax, eax
	jne	.L32
.L8:
	mov	esi, DWORD PTR mast[rip]
	mov	edx, r8d
	xor	ecx, ecx
	mov	rdi, rbp
	mov	DWORD PTR 8[rsp], r8d
	mov	DWORD PTR 24[rsp], r9d
	call	clk_mask@PLT
	mov	r9d, DWORD PTR 24[rsp]
	mov	ecx, DWORD PTR 16[rsp]
	mov	rdi, rbp
	mov	esi, DWORD PTR divs[rip]
	mov	edx, r9d
	call	clk_mask@PLT
	mov	r8d, DWORD PTR 8[rsp]
	mov	ecx, r14d
	mov	rdi, rbp
	mov	esi, DWORD PTR mast[rip]
	mov	edx, r8d
	call	clk_mask@PLT
	mov	rax, QWORD PTR [rsp]
	cmp	DWORD PTR [rax], 145
	jg	.L11
	mov	esi, DWORD PTR mast[rip]
	mov	ecx, 1048704
	mov	edx, 1048752
	mov	rdi, rbp
	call	clk_mask@PLT
.L12:
	lea	r14, 40[rsp]
	lea	r8, 44[rsp]
	mov	r9, r15
	mov	edx, ebx
	mov	rcx, r14
	mov	esi, 16424
	mov	rdi, r12
	mov	QWORD PTR [rsp], r8
	call	calc_pll@PLT
	mov	r8, QWORD PTR [rsp]
	test	eax, eax
	je	.L27
	mov	eax, DWORD PTR 48[rsp]
	mov	edx, -1069612800
	mov	rdi, rbp
	mov	QWORD PTR [rsp], r8
	mov	ecx, eax
	sal	eax, 16
	sal	ecx, 19
	or	ecx, eax
	mov	rax, QWORD PTR nvpll[rip]
	or	ecx, -2147483648
	mov	esi, DWORD PTR [rax]
	call	clk_mask@PLT
	mov	rax, QWORD PTR nvpll[rip]
	mov	ecx, DWORD PTR 40[rsp]
	mov	rdi, rbp
	mov	edx, 65535
	mov	esi, DWORD PTR 4[rax]
	sal	ecx, 8
	or	ecx, DWORD PTR 44[rsp]
	call	clk_mask@PLT
	mov	eax, DWORD PTR 48[rsp]
	mov	r8, QWORD PTR [rsp]
	lea	edx, -1[rax]
	test	eax, eax
	mov	DWORD PTR 48[rsp], edx
	je	.L14
	add	ebx, ebx
	cmp	ebx, DWORD PTR 12[rsp]
	je	.L33
.L14:
	mov	edx, DWORD PTR 12[rsp]
	mov	r9, r15
	mov	rcx, r14
	mov	esi, 16416
	mov	rdi, r12
	call	calc_pll@PLT
	test	eax, eax
	jne	.L16
.L27:
	mov	r13d, DWORD PTR ERANGE[rip]
	neg	r13d
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L11:
	mov	esi, DWORD PTR mast[rip]
	mov	ecx, 129
	mov	edx, 179
	mov	rdi, rbp
	call	clk_mask@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L16:
	mov	eax, DWORD PTR 48[rsp]
	mov	edx, -1069612800
	mov	rdi, rbp
	mov	ecx, eax
	sal	eax, 16
	sal	ecx, 19
	or	ecx, eax
	mov	rax, QWORD PTR spll[rip]
	or	ecx, -2147483648
	mov	esi, DWORD PTR [rax]
	call	clk_mask@PLT
	mov	rax, QWORD PTR spll[rip]
	mov	ecx, DWORD PTR 40[rsp]
	mov	rdi, rbp
	mov	edx, 65535
	mov	esi, DWORD PTR 4[rax]
	sal	ecx, 8
	or	ecx, DWORD PTR 44[rsp]
	call	clk_mask@PLT
	mov	esi, DWORD PTR mast[rip]
	mov	ecx, 51
	mov	rdi, rbp
	mov	edx, 1048627
	call	clk_mask@PLT
.L15:
	mov	rdi, rbp
	mov	edx, 1
	mov	esi, 16
	call	clk_setf@PLT
	xor	edx, edx
	xor	esi, esi
	mov	rdi, rbp
	call	clk_wait@PLT
	mov	esi, DWORD PTR fifo[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	clk_wr32@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L32:
	mov	esi, DWORD PTR nv_clk_src_href[rip]
	mov	rdi, r12
	mov	DWORD PTR 28[rsp], r9d
	mov	DWORD PTR 24[rsp], r8d
	call	nvkm_clk_read@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	esi, eax
	call	clk_same@PLT
	mov	r8d, DWORD PTR 24[rsp]
	mov	r9d, DWORD PTR 28[rsp]
	test	rax, rax
	je	.L34
.L9:
	or	r8d, 201326592
	or	r9d, 7
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L31:
	lea	r15, 48[rsp]
	mov	esi, r14d
	mov	edi, ebx
	mov	rdx, r15
	call	calc_div@PLT
	mov	DWORD PTR 16[rsp], eax
	mov	rax, QWORD PTR [rsp]
	cmp	DWORD PTR [rax], 152
	je	.L4
	mov	rdi, r12
	mov	esi, 16432
	call	read_pll@PLT
	mov	edi, eax
.L5:
	lea	rdx, 52[rsp]
	mov	esi, r14d
	call	calc_div@PLT
	mov	edi, r14d
	sub	edi, DWORD PTR 16[rsp]
	mov	DWORD PTR 24[rsp], eax
	call	abs@PLT
	mov	edi, r14d
	sub	edi, DWORD PTR 24[rsp]
	mov	QWORD PTR 16[rsp], rax
	call	abs@PLT
	cmp	QWORD PTR 16[rsp], rax
	jg	.L6
	mov	rax, QWORD PTR [rsp]
	mov	r14d, 0
	mov	edi, 3072
	mov	r9d, 1792
	mov	r8d, 3072
	cmp	DWORD PTR [rax], 152
	mov	eax, DWORD PTR 48[rsp]
	cmovne	r14d, edi
	sal	eax, 8
	mov	DWORD PTR 16[rsp], eax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L6:
	mov	eax, DWORD PTR 52[rsp]
	mov	r9d, 1792
	mov	r14d, 2048
	mov	r8d, 3072
	sal	eax, 8
	mov	DWORD PTR 16[rsp], eax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L4:
	mov	esi, DWORD PTR nv_clk_src_hclkm3d2[rip]
	mov	rdi, r12
	call	nvkm_clk_read@PLT
	mov	edi, eax
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L34:
	mov	esi, DWORD PTR nv_clk_src_hclk[rip]
	mov	rdi, r12
	call	nvkm_clk_read@PLT
	mov	edi, DWORD PTR 8[rsp]
	mov	esi, eax
	call	clk_same@PLT
	mov	r8d, DWORD PTR 24[rsp]
	mov	r9d, DWORD PTR 28[rsp]
	test	rax, rax
	je	.L10
	or	r14d, 134217728
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L33:
	mov	rax, QWORD PTR spll[rip]
	mov	ecx, edx
	sal	edx, 16
	mov	rdi, rbp
	sal	ecx, 19
	mov	esi, DWORD PTR [rax]
	or	ecx, edx
	mov	edx, -1069612800
	call	clk_mask@PLT
	mov	esi, DWORD PTR mast[rip]
	mov	ecx, 35
	mov	rdi, rbp
	mov	edx, 1048627
	call	clk_mask@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L10:
	mov	esi, DWORD PTR nv_clk_src_hclk[rip]
	mov	rdi, r12
	mov	DWORD PTR 28[rsp], r9d
	or	r14d, 201326592
	mov	DWORD PTR 24[rsp], r8d
	call	nvkm_clk_read@PLT
	mov	esi, DWORD PTR 8[rsp]
	mov	rdx, r15
	lea	edi, [rax+rax*2]
	call	calc_div@PLT
	mov	ecx, DWORD PTR 48[rsp]
	mov	r9d, DWORD PTR 28[rsp]
	or	DWORD PTR 16[rsp], ecx
	mov	r8d, DWORD PTR 24[rsp]
	jmp	.L9
.L30:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	nv50_clk_calc, .-nv50_clk_calc
	.comm	spll,8,8
	.comm	nvpll,8,8
	.comm	nv_clk_src_vdec,8,8
	.comm	nv_clk_src_shader,8,8
	.comm	nv_clk_src_href,4,4
	.comm	nv_clk_src_hclkm3d2,4,4
	.comm	nv_clk_src_hclk,4,4
	.comm	nv_clk_src_dom6,8,8
	.comm	nv_clk_src_core,8,8
	.comm	mast,4,4
	.comm	fifo,4,4
	.comm	divs,4,4
	.comm	ERANGE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nv50.c_nv50_clk_calc.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	nv50_clk_calc
	.syntax unified
	.arm
	.fpu softvfp
	.type	nv50_clk_calc, %function
nv50_clk_calc:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L35
	sub	sp, sp, #52
	mov	r5, r1
	ldr	r3, [r3]
	str	r3, [sp, #44]
	mov	r3,#0
	bl	nv50_clk
	mov	r4, r0
	mov	r6, r0
	ldr	ip, .L35+4
	ldr	r3, [r5]
	ldr	r0, .L35+8
	ldr	r5, [ip]
	ldr	r1, .L35+12
	ldr	r2, .L35+16
	ldr	fp, [r4], #4
	ldr	lr, [r0]
	ldr	ip, [r1]
	ldr	r5, [r3, r5, lsl #2]
	ldr	r2, [r2]
	mov	r0, r4
	mov	r1, r6
	str	r5, [sp, #8]
	ldr	r9, [r3, lr, lsl #2]
	ldr	r7, [r3, ip, lsl #2]
	ldr	r8, [r3, r2, lsl #2]
	bl	clk_init
	subs	r5, r0, #0
	beq	.L29
.L1:
	ldr	r3, .L35
	ldr	r2, [r3]
	ldr	r3, [sp, #44]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L30
	mov	r0, r5
	add	sp, sp, #52
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L29:
	ldr	r3, .L35+20
	mov	r2, #1
	ldr	r1, [r3]
	mov	r0, r4
	bl	clk_wr32
	mov	r1, #8000
	mov	r0, r4
	bl	clk_nsec
	mov	r2, r5
	mov	r1, #16
	mov	r0, r4
	bl	clk_setf
	mov	r2, #1
	mov	r1, r5
	mov	r0, r4
	bl	clk_wait
	cmp	r7, #0
	bne	.L31
	mov	r10, r7
	add	r3, sp, #36
	str	r7, [sp, #20]
	str	r7, [sp, #12]
	str	r3, [sp, #16]
.L3:
	cmp	r8, #0
	bne	.L32
.L8:
	ldr	r8, .L35+24
	mov	r3, #0
	mov	r2, r10
	ldr	r1, [r8]
	mov	r0, r4
	bl	clk_mask
	ldr	r1, .L35+28
	ldr	r3, [sp, #20]
	ldr	r2, [sp, #12]
	ldr	r1, [r1]
	mov	r0, r4
	bl	clk_mask
	mov	r2, r10
	mov	r3, r7
	ldr	r1, [r8]
	mov	r0, r4
	bl	clk_mask
	ldr	r3, [fp]
	ldr	r1, [r8]
	cmp	r3, #145
	movgt	r3, #129
	movgt	r2, #179
	ldrle	r3, .L35+32
	ldrle	r2, .L35+36
	mov	r0, r4
	bl	clk_mask
	ldr	r3, [sp, #16]
	add	r2, sp, #32
	str	r3, [sp, #4]
	str	r2, [sp]
	mov	r0, r6
	mov	r2, r9
	ldr	r1, .L35+40
	add	r3, sp, #28
	bl	calc_pll
	cmp	r0, #0
	beq	.L27
	ldr	r2, [sp, #36]
	ldr	r7, .L35+44
	lsl	r3, r2, #16
	ldr	r1, [r7]
	orr	r3, r3, r2, lsl #19
	ldr	r1, [r1]
	ldr	r2, .L35+48
	orr	r3, r3, #-2147483648
	mov	r0, r4
	bl	clk_mask
	ldr	r2, [sp, #28]
	ldr	r1, [r7]
	ldr	r3, [sp, #32]
	mov	r0, r4
	orr	r3, r3, r2, lsl #8
	ldr	r1, [r1, #4]
	ldr	r2, .L35+52
	bl	clk_mask
	ldr	r3, [sp, #36]
	cmp	r3, #0
	sub	r3, r3, #1
	str	r3, [sp, #36]
	beq	.L14
	ldr	r2, [sp, #8]
	cmp	r2, r9, lsl #1
	beq	.L33
.L14:
	ldr	r3, [sp, #16]
	mov	r0, r6
	str	r3, [sp, #4]
	add	r3, sp, #32
	str	r3, [sp]
	ldr	r2, [sp, #8]
	ldr	r1, .L35+56
	add	r3, sp, #28
	bl	calc_pll
	cmp	r0, #0
	bne	.L16
.L27:
	ldr	r3, .L35+60
	ldr	r5, [r3]
	rsb	r5, r5, #0
	b	.L1
.L16:
	ldr	r2, [sp, #36]
	ldr	r6, .L35+64
	lsl	r3, r2, #16
	ldr	r1, [r6]
	orr	r3, r3, r2, lsl #19
	ldr	r1, [r1]
	ldr	r2, .L35+48
	orr	r3, r3, #-2147483648
	mov	r0, r4
	bl	clk_mask
	ldr	r2, [sp, #28]
	ldr	r1, [r6]
	ldr	r3, [sp, #32]
	ldr	r1, [r1, #4]
	orr	r3, r3, r2, lsl #8
	mov	r0, r4
	ldr	r2, .L35+52
	bl	clk_mask
	mov	r3, #51
	mov	r0, r4
	ldr	r1, [r8]
	ldr	r2, .L35+68
	bl	clk_mask
.L15:
	mov	r2, #1
	mov	r1, #16
	mov	r0, r4
	bl	clk_setf
	mov	r2, #0
	mov	r0, r4
	mov	r1, r2
	bl	clk_wait
	ldr	r3, .L35+20
	mov	r0, r4
	mov	r2, #0
	ldr	r1, [r3]
	bl	clk_wr32
	b	.L1
.L32:
	ldr	r3, .L35+72
	mov	r0, r6
	ldr	r1, [r3]
	bl	nvkm_clk_read
	mov	r1, r0
	mov	r0, r8
	bl	clk_same
	cmp	r0, #0
	beq	.L34
.L9:
	ldr	r3, [sp, #12]
	orr	r10, r10, #201326592
	orr	r3, r3, #7
	str	r3, [sp, #12]
	b	.L8
.L31:
	add	r3, sp, #36
	mov	r2, r3
	mov	r1, r7
	mov	r0, r9
	str	r3, [sp, #16]
	bl	calc_div
	ldr	r3, [fp]
	mov	r10, r0
	cmp	r3, #152
	beq	.L4
	mov	r0, r6
	ldr	r1, .L35+76
	bl	read_pll
.L5:
	mov	r1, r7
	add	r2, sp, #40
	bl	calc_div
	sub	r10, r7, r10
	sub	r7, r7, r0
	cmp	r7, #0
	rsblt	r7, r7, #0
	cmp	r10, #0
	rsblt	r10, r10, #0
	cmp	r10, r7
	bgt	.L6
	ldr	r3, [sp, #36]
	ldr	r2, [fp]
	lsl	r3, r3, #8
	str	r3, [sp, #20]
	mov	r3, #1792
	cmp	r2, #152
	moveq	r7, #0
	movne	r7, #3072
	mov	r10, #3072
	str	r3, [sp, #12]
	b	.L3
.L6:
	mov	r2, #1792
	ldr	r3, [sp, #40]
	mov	r7, #2048
	lsl	r3, r3, #8
	mov	r10, #3072
	str	r2, [sp, #12]
	str	r3, [sp, #20]
	b	.L3
.L4:
	ldr	r3, .L35+80
	mov	r0, r6
	ldr	r1, [r3]
	bl	nvkm_clk_read
	b	.L5
.L34:
	ldr	r3, .L35+84
	mov	r0, r6
	ldr	r1, [r3]
	bl	nvkm_clk_read
	mov	r1, r0
	mov	r0, r8
	bl	clk_same
	cmp	r0, #0
	ldr	r3, .L35+84
	orrne	r7, r7, #134217728
	bne	.L9
	ldr	r1, [r3]
	mov	r0, r6
	bl	nvkm_clk_read
	ldr	r2, [sp, #16]
	mov	r1, r8
	add	r0, r0, r0, lsl #1
	bl	calc_div
	ldr	r2, [sp, #20]
	ldr	r3, [sp, #36]
	orr	r7, r7, #201326592
	orr	r3, r2, r3
	str	r3, [sp, #20]
	b	.L9
.L33:
	ldr	r2, .L35+64
	lsl	r1, r3, #16
	ldr	r2, [r2]
	orr	r3, r1, r3, lsl #19
	mov	r0, r4
	ldr	r1, [r2]
	ldr	r2, .L35+48
	bl	clk_mask
	mov	r3, #35
	mov	r0, r4
	ldr	r1, [r8]
	ldr	r2, .L35+68
	bl	clk_mask
	b	.L15
.L30:
	bl	__stack_chk_fail
.L36:
	.align	2
.L35:
	.word	.LC0
	.word	nv_clk_src_shader
	.word	nv_clk_src_core
	.word	nv_clk_src_vdec
	.word	nv_clk_src_dom6
	.word	fifo
	.word	mast
	.word	divs
	.word	1048704
	.word	1048752
	.word	16424
	.word	nvpll
	.word	-1069612800
	.word	65535
	.word	16416
	.word	ERANGE
	.word	spll
	.word	1048627
	.word	nv_clk_src_href
	.word	16432
	.word	nv_clk_src_hclkm3d2
	.word	nv_clk_src_hclk
	.size	nv50_clk_calc, .-nv50_clk_calc
	.comm	spll,4,4
	.comm	nvpll,4,4
	.comm	nv_clk_src_vdec,4,4
	.comm	nv_clk_src_shader,4,4
	.comm	nv_clk_src_href,4,4
	.comm	nv_clk_src_hclkm3d2,4,4
	.comm	nv_clk_src_hclk,4,4
	.comm	nv_clk_src_dom6,4,4
	.comm	nv_clk_src_core,4,4
	.comm	mast,4,4
	.comm	fifo,4,4
	.comm	divs,4,4
	.comm	ERANGE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
