	.file	"extr_nv40.c_nv40_fifo_chan_ctor.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	nv40_fifo_chan_ctor, @function
nv40_fifo_chan_ctor:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 24
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	cmp	r8d, 7
	ja	.L2
	mov	r13d, DWORD PTR EINVAL[rip]
	neg	r13d
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L7
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r13d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	sub	rsp, 8
	.cfi_def_cfa_offset 72
	mov	rbp, rcx
	mov	r12, r9
	mov	r8d, 12582912
	lea	rax, 8[rsp]
	mov	rcx, QWORD PTR NVDEV_ENGINE_SW[rip]
	mov	r9d, 4096
	mov	rbx, rsi
	push	rax
	.cfi_def_cfa_offset 80
	mov	eax, 1
	sal	rax, cl
	mov	rcx, QWORD PTR NVDEV_ENGINE_DMAOBJ[rip]
	bts	rax, rcx
	mov	rcx, QWORD PTR NVDEV_ENGINE_GR[rip]
	bts	rax, rcx
	mov	rcx, QWORD PTR NVDEV_ENGINE_MPEG[rip]
	bts	rax, rcx
	xor	ecx, ecx
	push	rax
	.cfi_def_cfa_offset 88
	mov	eax, DWORD PTR 4[rbp]
	push	rax
	.cfi_def_cfa_offset 96
	call	nouveau_fifo_channel_create@PLT
	mov	rdi, QWORD PTR 32[rsp]
	add	rsp, 32
	.cfi_def_cfa_offset 64
	mov	r13d, eax
	call	nv_object@PLT
	mov	QWORD PTR [r12], rax
	test	r13d, r13d
	jne	.L1
	mov	rdi, QWORD PTR [rsp]
	call	nv_parent@PLT
	mov	edx, DWORD PTR nv40_fifo_context_attach[rip]
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR 12[rax], edx
	call	nv_parent@PLT
	mov	edx, DWORD PTR nv40_fifo_context_detach[rip]
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR 8[rax], edx
	call	nv_parent@PLT
	mov	edx, DWORD PTR nv40_fifo_object_attach[rip]
	mov	rdi, QWORD PTR [rsp]
	mov	DWORD PTR 4[rax], edx
	call	nv_parent@PLT
	mov	edx, DWORD PTR nv04_fifo_object_detach[rip]
	mov	edi, DWORD PTR [rbx]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR [rsp]
	mov	edx, DWORD PTR 0[rbp]
	mov	esi, DWORD PTR 8[rax]
	sal	esi, 7
	mov	DWORD PTR [rax], esi
	call	nv_wo32@PLT
	mov	rax, QWORD PTR [rsp]
	mov	edx, DWORD PTR 0[rbp]
	mov	edi, DWORD PTR [rbx]
	mov	esi, DWORD PTR [rax]
	add	esi, 4
	call	nv_wo32@PLT
	mov	rax, QWORD PTR [rsp]
	mov	edi, DWORD PTR [rbx]
	mov	rdx, QWORD PTR 16[rax]
	mov	esi, DWORD PTR [rax]
	mov	edx, DWORD PTR [rdx]
	add	esi, 12
	sar	edx, 4
	call	nv_wo32@PLT
	mov	rax, QWORD PTR [rsp]
	mov	edi, DWORD PTR [rbx]
	mov	edx, DWORD PTR NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES[rip]
	or	edx, DWORD PTR NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8[rip]
	mov	esi, DWORD PTR [rax]
	or	edx, DWORD PTR NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES[rip]
	or	edx, 805306368
	add	esi, 24
	call	nv_wo32@PLT
	mov	rax, QWORD PTR [rsp]
	mov	edi, DWORD PTR [rbx]
	mov	edx, 131071
	mov	esi, DWORD PTR [rax]
	add	esi, 60
	call	nv_wo32@PLT
	jmp	.L1
.L7:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	nv40_fifo_chan_ctor, .-nv40_fifo_chan_ctor
	.comm	nv40_fifo_object_attach,4,4
	.comm	nv40_fifo_context_detach,4,4
	.comm	nv40_fifo_context_attach,4,4
	.comm	nv04_fifo_object_detach,4,4
	.comm	NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES,4,4
	.comm	NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES,4,4
	.comm	NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8,4,4
	.comm	NV_PFIFO_CACHE1_BIG_ENDIAN,4,4
	.comm	NVDEV_ENGINE_SW,8,8
	.comm	NVDEV_ENGINE_MPEG,8,8
	.comm	NVDEV_ENGINE_GR,8,8
	.comm	NVDEV_ENGINE_DMAOBJ,8,8
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nv40.c_nv40_fifo_chan_ctor.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nv40_fifo_chan_ctor, %function
nv40_fifo_chan_ctor:
	@ args = 8, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #44
	ldr	ip, [sp, #80]
	mov	r5, r3
	ldr	r3, .L8
	cmp	ip, #7
	ldr	r3, [r3]
	str	r3, [sp, #36]
	mov	r3,#0
	ldr	r8, [sp, #84]
	bhi	.L2
	ldr	r3, .L8+4
	ldr	r6, [r3]
	rsb	r6, r6, #0
.L1:
	ldr	r3, .L8
	ldr	r2, [r3]
	ldr	r3, [sp, #36]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L7
	mov	r0, r6
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	mov	ip, #1
	ldr	lr, .L8+8
	ldr	r3, .L8+12
	ldr	r10, [lr]
	ldr	lr, [r3]
	ldr	r3, .L8+16
	sub	r7, r10, #32
	ldr	r6, [r3]
	lsl	r7, ip, r7
	sub	r3, lr, #32
	rsb	r9, r10, #32
	orr	r7, r7, ip, lsr r9
	lsl	r3, ip, r3
	rsb	r9, lr, #32
	orr	r3, r3, ip, lsr r9
	ldr	r9, .L8+20
	lsl	lr, ip, lr
	ldr	r9, [r9]
	orr	r3, r7, r3
	orr	lr, lr, ip, lsl r10
	sub	r7, r6, #32
	orr	lr, lr, ip, lsl r6
	lsl	r7, ip, r7
	rsb	r6, r6, #32
	orr	r7, r7, ip, lsr r6
	sub	r6, r9, #32
	orr	r3, r3, r7
	lsl	r6, ip, r6
	rsb	r7, r9, #32
	orr	r6, r6, ip, lsr r7
	orr	ip, lr, ip, lsl r9
	mov	fp, #4096
	ldr	lr, [r5, #4]
	str	ip, [sp, #16]
	mov	ip, #12582912
	orr	r6, r3, r6
	add	r3, sp, #32
	str	r6, [sp, #20]
	str	ip, [sp]
	str	lr, [sp, #8]
	str	r3, [sp, #24]
	str	fp, [sp, #4]
	mov	r3, #0
	mov	r4, r1
	bl	nouveau_fifo_channel_create
	mov	r6, r0
	ldr	r0, [sp, #32]
	bl	nv_object
	cmp	r6, #0
	str	r0, [r8]
	bne	.L1
	ldr	r0, [sp, #32]
	bl	nv_parent
	mov	r3, r0
	ldr	r2, .L8+24
	ldr	r0, [sp, #32]
	ldr	r2, [r2]
	str	r2, [r3, #12]
	bl	nv_parent
	mov	r3, r0
	ldr	r2, .L8+28
	ldr	r0, [sp, #32]
	ldr	r2, [r2]
	str	r2, [r3, #8]
	bl	nv_parent
	mov	r3, r0
	ldr	r2, .L8+32
	ldr	r0, [sp, #32]
	ldr	r2, [r2]
	str	r2, [r3, #4]
	bl	nv_parent
	ldr	r3, [sp, #32]
	ldr	r2, .L8+36
	ldr	r1, [r3, #4]
	ldr	r2, [r2]
	lsl	r1, r1, #7
	str	r2, [r0]
	ldr	r2, [r5]
	str	r1, [r3]
	ldr	r0, [r4]
	bl	nv_wo32
	ldr	r3, [sp, #32]
	ldr	r2, [r5]
	ldr	r1, [r3]
	ldr	r0, [r4]
	add	r1, r1, #4
	bl	nv_wo32
	ldr	r3, [sp, #32]
	ldr	r0, [r4]
	ldr	r2, [r3, #8]
	ldr	r1, [r3]
	ldr	r2, [r2]
	add	r1, r1, #12
	asr	r2, r2, #4
	bl	nv_wo32
	ldr	r1, .L8+40
	ldr	r2, .L8+44
	ldr	r3, .L8+48
	ldr	r0, [r1]
	ldr	r2, [r2]
	ldr	r1, [sp, #32]
	ldr	r3, [r3]
	ldr	r1, [r1]
	orr	r2, r2, r0
	orr	r2, r2, r3
	ldr	r0, [r4]
	orr	r2, r2, #805306368
	add	r1, r1, #24
	bl	nv_wo32
	ldr	r3, [sp, #32]
	ldr	r0, [r4]
	ldr	r1, [r3]
	ldr	r2, .L8+52
	add	r1, r1, #60
	bl	nv_wo32
	b	.L1
.L7:
	bl	__stack_chk_fail
.L9:
	.align	2
.L8:
	.word	.LC0
	.word	EINVAL
	.word	NVDEV_ENGINE_DMAOBJ
	.word	NVDEV_ENGINE_SW
	.word	NVDEV_ENGINE_GR
	.word	NVDEV_ENGINE_MPEG
	.word	nv40_fifo_context_attach
	.word	nv40_fifo_context_detach
	.word	nv40_fifo_object_attach
	.word	nv04_fifo_object_detach
	.word	NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8
	.word	NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES
	.word	NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES
	.word	131071
	.size	nv40_fifo_chan_ctor, .-nv40_fifo_chan_ctor
	.comm	nv40_fifo_object_attach,4,4
	.comm	nv40_fifo_context_detach,4,4
	.comm	nv40_fifo_context_attach,4,4
	.comm	nv04_fifo_object_detach,4,4
	.comm	NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES,4,4
	.comm	NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES,4,4
	.comm	NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8,4,4
	.comm	NV_PFIFO_CACHE1_BIG_ENDIAN,4,4
	.comm	NVDEV_ENGINE_SW,8,8
	.comm	NVDEV_ENGINE_MPEG,8,8
	.comm	NVDEV_ENGINE_GR,8,8
	.comm	NVDEV_ENGINE_DMAOBJ,8,8
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
