	.file	"extr_amd8111e.c_amd8111e_init_ring.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	amd8111e_init_ring, @function
amd8111e_init_ring:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	netdev_priv@PLT
	cmp	QWORD PTR 56[rax], 0
	mov	QWORD PTR 80[rax], 0
	mov	rbx, rax
	mov	QWORD PTR 88[rax], 0
	mov	QWORD PTR 72[rax], 0
	mov	QWORD PTR 64[rax], 0
	je	.L2
	mov	rdi, rbp
	call	amd8111e_free_skbs@PLT
.L3:
	mov	rdi, rbp
	xor	ebp, ebp
	call	amd8111e_set_rx_buff_len@PLT
	mov	eax, DWORD PTR NUM_RX_BUFFERS[rip]
	test	eax, eax
	jg	.L6
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L9:
	mov	rax, QWORD PTR 48[rbx]
	mov	esi, 2
	mov	rdi, QWORD PTR [rax+rbp*8]
	add	rbp, 1
	call	skb_reserve@PLT
	mov	eax, DWORD PTR NUM_RX_BUFFERS[rip]
	cmp	eax, ebp
	jle	.L31
.L6:
	mov	rax, QWORD PTR 48[rbx]
	mov	rdi, QWORD PTR 32[rbx]
	movsx	r13, ebp
	lea	r12, [rax+rbp*8]
	call	dev_alloc_skb@PLT
	mov	QWORD PTR [r12], rax
	test	rax, rax
	jne	.L9
	lea	r12d, -1[r13]
	test	r13d, r13d
	je	.L12
	lea	eax, -1[rbp]
	movsx	r12, r12d
	sub	r13, rax
	sal	r12, 3
	lea	rbp, -16[0+r13*8]
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rax, QWORD PTR 48[rbx]
	mov	rdi, QWORD PTR [rax+r12]
	sub	r12, 8
	call	dev_kfree_skb@PLT
	cmp	rbp, r12
	jne	.L11
.L12:
	mov	eax, DWORD PTR NUM_RX_RING_DR[rip]
	mov	ecx, DWORD PTR 20[rbx]
	mov	rdx, QWORD PTR 24[rbx]
	mov	edi, DWORD PTR 16[rbx]
	lea	esi, 0[0+rax*4]
	call	pci_free_consistent@PLT
.L5:
	mov	eax, DWORD PTR NUM_TX_RING_DR[rip]
	mov	rdx, QWORD PTR 8[rbx]
	mov	edi, DWORD PTR 16[rbx]
	mov	ecx, DWORD PTR [rbx]
	lea	esi, 0[0+rax*4]
	call	pci_free_consistent@PLT
.L4:
	mov	eax, DWORD PTR ENOMEM[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	eax, DWORD PTR NUM_TX_RING_DR[rip]
	mov	edi, DWORD PTR 16[rbx]
	mov	rdx, rbx
	lea	esi, 0[0+rax*4]
	call	pci_alloc_consistent@PLT
	mov	QWORD PTR 8[rbx], rax
	test	rax, rax
	je	.L4
	mov	eax, DWORD PTR NUM_RX_RING_DR[rip]
	mov	edi, DWORD PTR 16[rbx]
	lea	rdx, 20[rbx]
	lea	esi, 0[0+rax*4]
	call	pci_alloc_consistent@PLT
	mov	QWORD PTR 24[rbx], rax
	test	rax, rax
	jne	.L3
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L31:
	test	eax, eax
	jle	.L13
	xor	ebp, ebp
	.p2align 4,,10
	.p2align 3
.L14:
	mov	rax, QWORD PTR 40[rbx]
	mov	ecx, DWORD PTR PCI_DMA_FROMDEVICE[rip]
	mov	edi, DWORD PTR 16[rbx]
	lea	r12, [rax+rbp*4]
	mov	rax, QWORD PTR 32[rbx]
	lea	rdx, -2[rax]
	mov	rax, QWORD PTR 48[rbx]
	mov	rax, QWORD PTR [rax+rbp*8]
	mov	esi, DWORD PTR [rax]
	call	pci_map_single@PLT
	mov	r13, QWORD PTR 24[rbx]
	mov	DWORD PTR [r12], eax
	mov	rax, QWORD PTR 40[rbx]
	mov	r12, rbp
	sal	r12, 5
	mov	edi, DWORD PTR [rax+rbp*4]
	add	r13, r12
	add	rbp, 1
	call	cpu_to_le32@PLT
	mov	QWORD PTR 16[r13], rax
	mov	rax, QWORD PTR 32[rbx]
	mov	r13, QWORD PTR 24[rbx]
	lea	rdi, -2[rax]
	call	cpu_to_le16@PLT
	add	r13, r12
	mov	QWORD PTR 0[r13], rax
	xor	eax, eax
	call	wmb@PLT
	mov	rdi, QWORD PTR OWN_BIT[rip]
	add	r12, QWORD PTR 24[rbx]
	call	cpu_to_le16@PLT
	cmp	DWORD PTR NUM_RX_BUFFERS[rip], ebp
	mov	QWORD PTR 24[r12], rax
	jg	.L14
.L13:
	mov	edx, DWORD PTR NUM_TX_RING_DR[rip]
	test	edx, edx
	jle	.L8
	sub	edx, 1
	mov	rax, QWORD PTR 8[rbx]
	add	rdx, 1
	sal	rdx, 5
	add	rdx, rax
	.p2align 4,,10
	.p2align 3
.L16:
	mov	QWORD PTR 16[rax], 0
	add	rax, 32
	mov	QWORD PTR -24[rax], 0
	mov	QWORD PTR -32[rax], 0
	cmp	rdx, rax
	jne	.L16
.L8:
	add	rsp, 8
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	amd8111e_init_ring, .-amd8111e_init_ring
	.comm	PCI_DMA_FROMDEVICE,4,4
	.comm	OWN_BIT,8,8
	.comm	NUM_TX_RING_DR,4,4
	.comm	NUM_RX_RING_DR,4,4
	.comm	NUM_RX_BUFFERS,4,4
	.comm	ENOMEM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_amd8111e.c_amd8111e_init_ring.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	amd8111e_init_ring, %function
amd8111e_init_ring:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r5, r0
	bl	netdev_priv
	mov	r3, #0
	ldr	r2, [r0, #32]
	mov	r4, r0
	cmp	r2, r3
	str	r3, [r0, #44]
	str	r3, [r0, #48]
	str	r3, [r0, #40]
	str	r3, [r0, #36]
	beq	.L2
	mov	r0, r5
	bl	amd8111e_free_skbs
	ldr	r7, .L31
.L3:
	ldr	r8, .L31+4
	mov	r0, r5
	bl	amd8111e_set_rx_buff_len
	ldr	r3, [r8]
	cmp	r3, #0
	movgt	r5, #0
	bgt	.L6
	b	.L12
.L9:
	ldr	r3, [r4, #28]
	mov	r1, #2
	ldr	r0, [r3, r5, lsl #2]
	bl	skb_reserve
	ldr	r3, [r8]
	add	r5, r5, #1
	cmp	r3, r5
	ble	.L30
.L6:
	ldr	r0, [r4, #20]
	ldr	r6, [r4, #28]
	bl	dev_alloc_skb
	cmp	r0, #0
	str	r0, [r6, r5, lsl #2]
	bne	.L9
	cmp	r5, #0
	sub	r5, r5, #1
	beq	.L11
.L10:
	ldr	r3, [r4, #28]
	ldr	r0, [r3, r5, lsl #2]
	sub	r5, r5, #1
	bl	dev_kfree_skb
	cmn	r5, #1
	bne	.L10
.L11:
	ldr	r2, .L31+8
	ldr	r3, [r4, #12]
	ldr	r1, [r2]
	ldr	r0, [r4, #8]
	ldr	r2, [r4, #16]
	lsl	r1, r1, #2
	bl	pci_free_consistent
.L5:
	ldr	r1, [r7]
	ldr	r3, [r4]
	ldr	r2, [r4, #4]
	ldr	r0, [r4, #8]
	lsl	r1, r1, #2
	bl	pci_free_consistent
.L4:
	ldr	r3, .L31+12
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L2:
	ldr	r7, .L31
	mov	r2, r0
	ldr	r1, [r7]
	ldr	r0, [r0, #8]
	lsl	r1, r1, #2
	bl	pci_alloc_consistent
	cmp	r0, #0
	str	r0, [r4, #4]
	beq	.L4
	ldr	r3, .L31+8
	ldr	r0, [r4, #8]
	ldr	r1, [r3]
	add	r2, r4, #12
	lsl	r1, r1, #2
	bl	pci_alloc_consistent
	cmp	r0, #0
	str	r0, [r4, #16]
	bne	.L3
	b	.L5
.L30:
	cmp	r3, #0
	ble	.L12
	mov	r5, #0
	ldr	r10, .L31+16
	ldr	r9, .L31+20
.L13:
	ldr	r3, [r4, #28]
	ldr	r2, [r4, #20]
	ldr	r3, [r3, r5, lsl #2]
	sub	r2, r2, #2
	ldr	r1, [r3]
	ldr	r0, [r4, #8]
	ldr	r3, [r10]
	ldr	r6, [r4, #24]
	bl	pci_map_single
	ldr	r3, [r4, #24]
	str	r0, [r6, r5, lsl #2]
	ldr	r0, [r3, r5, lsl #2]
	ldr	r6, [r4, #16]
	bl	cpu_to_le32
	ldr	r3, [r4, #20]
	add	r6, r6, r5, lsl #4
	str	r0, [r6, #8]
	sub	r0, r3, #2
	ldr	r6, [r4, #16]
	bl	cpu_to_le16
	str	r0, [r6, r5, lsl #4]
	bl	wmb
	ldr	r6, [r4, #16]
	lsl	r3, r5, #4
	ldr	r0, [r9]
	add	r6, r6, r3
	bl	cpu_to_le16
	ldr	r3, [r8]
	add	r5, r5, #1
	cmp	r3, r5
	str	r0, [r6, #12]
	bgt	.L13
.L12:
	ldr	r1, [r7]
	cmp	r1, #0
	ble	.L8
	mov	r2, #0
	ldr	r3, [r4, #4]
	add	r1, r3, r1, lsl #4
.L15:
	str	r2, [r3, #8]
	str	r2, [r3, #4]
	str	r2, [r3], #16
	cmp	r1, r3
	bne	.L15
.L8:
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L32:
	.align	2
.L31:
	.word	NUM_TX_RING_DR
	.word	NUM_RX_BUFFERS
	.word	NUM_RX_RING_DR
	.word	ENOMEM
	.word	PCI_DMA_FROMDEVICE
	.word	OWN_BIT
	.size	amd8111e_init_ring, .-amd8111e_init_ring
	.comm	PCI_DMA_FROMDEVICE,4,4
	.comm	OWN_BIT,4,4
	.comm	NUM_TX_RING_DR,4,4
	.comm	NUM_RX_RING_DR,4,4
	.comm	NUM_RX_BUFFERS,4,4
	.comm	ENOMEM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
