	.file	"extr_spi-tegra114.c_handle_cpu_based_xfer.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CpuXfer ERROR bit set 0x%x\n"
.LC1:
	.string	"CpuXfer 0x%08x:0x%08x\n"
	.text
	.p2align 4
	.type	handle_cpu_based_xfer, @function
handle_cpu_based_xfer:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	lea	r13, 32[rdi]
	xor	esi, esi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	mov	r12, QWORD PTR 80[rdi]
	mov	rdi, r13
	call	spin_lock_irqsave@PLT
	cmp	QWORD PTR 72[rbp], 0
	jne	.L2
	cmp	QWORD PTR 64[rbp], 0
	jne	.L2
	mov	edx, DWORD PTR 0[rbp]
	test	DWORD PTR DATA_DIR_RX[rip], edx
	jne	.L14
.L5:
	mov	rax, QWORD PTR 24[rbp]
	test	DWORD PTR DATA_DIR_TX[rip], edx
	cmovne	rax, QWORD PTR 16[rbp]
	mov	QWORD PTR 8[rbp], rax
	cmp	QWORD PTR [r12], rax
	je	.L15
	mov	edi, DWORD PTR 36[rbp]
	mov	rsi, rbp
	mov	rdx, r12
	call	tegra_spi_calculate_curr_xfer_param@PLT
	mov	rsi, r12
	mov	rdi, rbp
	call	tegra_spi_start_cpu_based_transfer@PLT
.L8:
	mov	rdi, r13
	xor	esi, esi
	call	spin_unlock_irqrestore@PLT
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	eax, DWORD PTR IRQ_HANDLED[rip]
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edx, DWORD PTR 60[rbp]
	mov	edi, DWORD PTR 56[rbp]
	lea	rsi, .LC0[rip]
	xor	eax, eax
	call	dev_err@PLT
	mov	ecx, DWORD PTR 48[rbp]
	mov	edx, DWORD PTR 52[rbp]
	xor	eax, eax
	mov	edi, DWORD PTR 56[rbp]
	lea	rsi, .LC1[rip]
	call	dev_err@PLT
	mov	rdi, rbp
	call	tegra_spi_dump_regs@PLT
	mov	rdi, rbp
	call	tegra_spi_flush_fifos@PLT
	lea	rdi, 40[rbp]
	call	complete@PLT
	xor	esi, esi
	mov	rdi, r13
	call	spin_unlock_irqrestore@PLT
	mov	edi, DWORD PTR 44[rbp]
	call	reset_control_assert@PLT
	mov	edi, 2
	call	udelay@PLT
	mov	edi, DWORD PTR 44[rbp]
	call	reset_control_deassert@PLT
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	eax, DWORD PTR IRQ_HANDLED[rip]
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L14:
	.cfi_restore_state
	mov	rsi, r12
	mov	rdi, rbp
	call	tegra_spi_read_rx_fifo_to_client_rxbuf@PLT
	mov	edx, DWORD PTR 0[rbp]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L15:
	lea	rdi, 40[rbp]
	call	complete@PLT
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	handle_cpu_based_xfer, .-handle_cpu_based_xfer
	.comm	IRQ_HANDLED,4,4
	.comm	DATA_DIR_TX,4,4
	.comm	DATA_DIR_RX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_spi-tegra114.c_handle_cpu_based_xfer.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"CpuXfer ERROR bit set 0x%x\012\000"
	.align	2
.LC1:
	.ascii	"CpuXfer 0x%08x:0x%08x\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	handle_cpu_based_xfer, %function
handle_cpu_based_xfer:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r4, r0
	add	r5, r0, #16
	mov	r0, r5
	mov	r1, #0
	ldr	r6, [r4, #56]
	bl	spin_lock_irqsave
	ldr	r3, [r4, #52]
	cmp	r3, #0
	bne	.L2
	ldr	r3, [r4, #48]
	cmp	r3, #0
	bne	.L2
	ldr	r3, .L16
	ldr	r2, [r4]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L14
.L5:
	ldr	r1, .L16+4
	ldr	r3, [r4, #8]
	ldr	r0, [r1]
	ldr	r1, [r4, #12]
	tst	r2, r0
	moveq	r3, r1
	ldr	r2, [r6]
	str	r3, [r4, #4]
	cmp	r2, r3
	beq	.L15
	mov	r1, r4
	mov	r2, r6
	ldr	r0, [r4, #20]
	bl	tegra_spi_calculate_curr_xfer_param
	mov	r1, r6
	mov	r0, r4
	bl	tegra_spi_start_cpu_based_transfer
.L8:
	mov	r0, r5
	mov	r1, #0
	bl	spin_unlock_irqrestore
	ldr	r3, .L16+8
	ldr	r0, [r3]
	pop	{r4, r5, r6, pc}
.L2:
	ldr	r2, [r4, #44]
	ldr	r1, .L16+12
	ldr	r0, [r4, #40]
	bl	dev_err
	ldr	r3, [r4, #32]
	ldr	r2, [r4, #36]
	ldr	r1, .L16+16
	ldr	r0, [r4, #40]
	bl	dev_err
	mov	r0, r4
	bl	tegra_spi_dump_regs
	mov	r0, r4
	bl	tegra_spi_flush_fifos
	add	r0, r4, #24
	bl	complete
	mov	r1, #0
	mov	r0, r5
	bl	spin_unlock_irqrestore
	ldr	r0, [r4, #28]
	bl	reset_control_assert
	mov	r0, #2
	bl	udelay
	ldr	r0, [r4, #28]
	bl	reset_control_deassert
	ldr	r3, .L16+8
	ldr	r0, [r3]
	pop	{r4, r5, r6, pc}
.L14:
	mov	r1, r6
	mov	r0, r4
	bl	tegra_spi_read_rx_fifo_to_client_rxbuf
	ldr	r2, [r4]
	b	.L5
.L15:
	add	r0, r4, #24
	bl	complete
	b	.L8
.L17:
	.align	2
.L16:
	.word	DATA_DIR_RX
	.word	DATA_DIR_TX
	.word	IRQ_HANDLED
	.word	.LC0
	.word	.LC1
	.size	handle_cpu_based_xfer, .-handle_cpu_based_xfer
	.comm	IRQ_HANDLED,4,4
	.comm	DATA_DIR_TX,4,4
	.comm	DATA_DIR_RX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
