	.file	"extr_fsl_esai.c_fsl_esai_trigger_start.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	fsl_esai_trigger_start, @function
fsl_esai_trigger_start:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movsx	rdx, esi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13, rdx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR [rdi]
	mov	esi, DWORD PTR 20[rdi]
	mov	r12, QWORD PTR [rax+rdx*8]
	mov	rdi, r12
	call	DIV_ROUND_UP@PLT
	mov	ebx, DWORD PTR ESAI_xFCR_xFEN[rip]
	mov	r15d, DWORD PTR ESAI_xFCR_xFEN_MASK[rip]
	mov	edi, r13d
	mov	r14d, eax
	call	REG_ESAI_xFCR@PLT
	mov	edi, DWORD PTR 8[rbp]
	mov	ecx, ebx
	mov	edx, r15d
	mov	esi, eax
	call	regmap_update_bits@PLT
	test	r12, r12
	jle	.L2
	test	r13d, r13d
	je	.L13
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L3:
	mov	edi, DWORD PTR 8[rbp]
	mov	esi, DWORD PTR REG_ESAI_ETDR[rip]
	xor	edx, edx
	add	rbx, 1
	call	regmap_write@PLT
	cmp	r12, rbx
	jg	.L3
.L5:
	mov	edi, r14d
	call	ESAI_xCR_TE@PLT
	mov	r14d, DWORD PTR ESAI_xCR_TE_MASK[rip]
	mov	edi, r13d
	mov	r12d, eax
	call	REG_ESAI_xCR@PLT
	mov	edi, DWORD PTR 8[rbp]
	mov	edx, r14d
	mov	ecx, r12d
	mov	esi, eax
	call	regmap_update_bits@PLT
	mov	r14d, DWORD PTR 16[rbp]
.L4:
	mov	edi, r14d
	call	ESAI_xSMB_xS@PLT
	mov	r15d, DWORD PTR ESAI_xSMB_xS_MASK[rip]
	mov	edi, r13d
	mov	r12d, eax
	call	REG_ESAI_xSMB@PLT
	mov	edi, DWORD PTR 8[rbp]
	mov	ecx, r12d
	mov	edx, r15d
	mov	esi, eax
	call	regmap_update_bits@PLT
	mov	edi, r14d
	call	ESAI_xSMA_xS@PLT
	mov	r14d, DWORD PTR ESAI_xSMA_xS_MASK[rip]
	mov	edi, r13d
	mov	r12d, eax
	call	REG_ESAI_xSMA@PLT
	mov	edi, DWORD PTR 8[rbp]
	mov	ecx, r12d
	mov	edx, r14d
	mov	esi, eax
	call	regmap_update_bits@PLT
	mov	r14d, DWORD PTR ESAI_xCR_xEIE[rip]
	mov	r12d, DWORD PTR ESAI_xCR_xEIE_MASK[rip]
	mov	edi, r13d
	call	REG_ESAI_xCR@PLT
	mov	edi, DWORD PTR 8[rbp]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	ecx, r14d
	pop	rbp
	.cfi_def_cfa_offset 40
	mov	edx, r12d
	mov	esi, eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	regmap_update_bits@PLT
.L2:
	.cfi_restore_state
	test	r13d, r13d
	jne	.L5
.L13:
	mov	edi, r14d
	call	ESAI_xCR_RE@PLT
	mov	r14d, DWORD PTR ESAI_xCR_RE_MASK[rip]
	xor	edi, edi
	mov	r12d, eax
	call	REG_ESAI_xCR@PLT
	mov	edi, DWORD PTR 8[rbp]
	mov	edx, r14d
	mov	ecx, r12d
	mov	esi, eax
	call	regmap_update_bits@PLT
	mov	r14d, DWORD PTR 12[rbp]
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	fsl_esai_trigger_start, .-fsl_esai_trigger_start
	.comm	REG_ESAI_ETDR,4,4
	.comm	ESAI_xSMB_xS_MASK,4,4
	.comm	ESAI_xSMA_xS_MASK,4,4
	.comm	ESAI_xFCR_xFEN_MASK,4,4
	.comm	ESAI_xFCR_xFEN,4,4
	.comm	ESAI_xCR_xEIE_MASK,4,4
	.comm	ESAI_xCR_xEIE,4,4
	.comm	ESAI_xCR_TE_MASK,4,4
	.comm	ESAI_xCR_RE_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_fsl_esai.c_fsl_esai_trigger_start.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	fsl_esai_trigger_start, %function
fsl_esai_trigger_start:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r7, r1
	ldr	r3, [r0]
	ldr	r1, [r0, #16]
	ldr	r6, [r3, r7, lsl #2]
	mov	r5, r0
	mov	r0, r6
	bl	DIV_ROUND_UP
	mov	r9, r0
	mov	r0, r7
	ldr	r4, [r5, #4]
	bl	REG_ESAI_xFCR
	ldr	r3, .L12
	ldr	r2, .L12+4
	mov	r1, r0
	ldr	r3, [r3]
	mov	r0, r4
	ldr	r2, [r2]
	bl	regmap_update_bits
	cmp	r7, #0
	cmpne	r6, #0
	ble	.L2
	mov	r4, #0
	ldr	r8, .L12+8
.L3:
	mov	r2, #0
	ldr	r1, [r8]
	ldr	r0, [r5, #4]
	add	r4, r4, #1
	bl	regmap_write
	cmp	r6, r4
	bgt	.L3
	mov	r0, r7
	ldr	r6, [r5, #4]
	bl	REG_ESAI_xCR
	mov	r4, r0
.L7:
	ldr	r3, .L12+12
	mov	r0, r9
	ldr	r8, [r3]
	bl	ESAI_xCR_TE
	mov	r2, r8
	mov	r3, r0
	mov	r1, r4
	mov	r0, r6
	bl	regmap_update_bits
	ldr	r6, [r5, #12]
.L6:
	mov	r0, r7
	ldr	r8, [r5, #4]
	bl	REG_ESAI_xSMB
	ldr	r3, .L12+16
	mov	r4, r0
	mov	r0, r6
	ldr	r9, [r3]
	bl	ESAI_xSMB_xS
	mov	r2, r9
	mov	r1, r4
	mov	r3, r0
	mov	r0, r8
	bl	regmap_update_bits
	mov	r0, r7
	ldr	r8, [r5, #4]
	bl	REG_ESAI_xSMA
	ldr	r3, .L12+20
	mov	r4, r0
	mov	r0, r6
	ldr	r6, [r3]
	bl	ESAI_xSMA_xS
	mov	r2, r6
	mov	r3, r0
	mov	r1, r4
	mov	r0, r8
	bl	regmap_update_bits
	mov	r0, r7
	ldr	r4, [r5, #4]
	bl	REG_ESAI_xCR
	ldr	r3, .L12+24
	ldr	r2, .L12+28
	mov	r1, r0
	ldr	r3, [r3]
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r2, [r2]
	b	regmap_update_bits
.L2:
	mov	r0, r7
	ldr	r6, [r5, #4]
	bl	REG_ESAI_xCR
	cmp	r7, #0
	mov	r4, r0
	bne	.L7
	ldr	r3, .L12+32
	mov	r0, r9
	ldr	r8, [r3]
	bl	ESAI_xCR_RE
	mov	r2, r8
	mov	r3, r0
	mov	r1, r4
	mov	r0, r6
	bl	regmap_update_bits
	ldr	r6, [r5, #8]
	b	.L6
.L13:
	.align	2
.L12:
	.word	ESAI_xFCR_xFEN
	.word	ESAI_xFCR_xFEN_MASK
	.word	REG_ESAI_ETDR
	.word	ESAI_xCR_TE_MASK
	.word	ESAI_xSMB_xS_MASK
	.word	ESAI_xSMA_xS_MASK
	.word	ESAI_xCR_xEIE
	.word	ESAI_xCR_xEIE_MASK
	.word	ESAI_xCR_RE_MASK
	.size	fsl_esai_trigger_start, .-fsl_esai_trigger_start
	.comm	REG_ESAI_ETDR,4,4
	.comm	ESAI_xSMB_xS_MASK,4,4
	.comm	ESAI_xSMA_xS_MASK,4,4
	.comm	ESAI_xFCR_xFEN_MASK,4,4
	.comm	ESAI_xFCR_xFEN,4,4
	.comm	ESAI_xCR_xEIE_MASK,4,4
	.comm	ESAI_xCR_xEIE,4,4
	.comm	ESAI_xCR_TE_MASK,4,4
	.comm	ESAI_xCR_RE_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
