	.file	"extr_smsc95xx.c_smsc95xx_reset.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"entering smsc95xx_reset"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d"
	.section	.rodata.str1.1
.LC2:
	.string	"Failed to read HW_CFG: %d"
	.section	.rodata.str1.8
	.align 8
.LC3:
	.string	"timeout waiting for completion of Lite Reset"
	.section	.rodata.str1.1
.LC4:
	.string	"Failed to write PM_CTRL: %d"
.LC5:
	.string	"Failed to read PM_CTRL: %d"
.LC6:
	.string	"timeout waiting for PHY Reset"
.LC7:
	.string	"MAC Address: %pM"
	.section	.rodata.str1.8
	.align 8
.LC8:
	.string	"Read Value from HW_CFG : 0x%08x"
	.align 8
.LC9:
	.string	"Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d"
	.align 8
.LC10:
	.string	"Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x"
	.section	.rodata.str1.1
.LC11:
	.string	"rx_urb_size=%ld"
.LC12:
	.string	"Failed to write BURST_CAP: %d"
.LC13:
	.string	"Failed to read BURST_CAP: %d"
	.section	.rodata.str1.8
	.align 8
.LC14:
	.string	"Read Value from BURST_CAP after writing: 0x%08x"
	.section	.rodata.str1.1
.LC15:
	.string	"ret = %d"
	.section	.rodata.str1.8
	.align 8
.LC16:
	.string	"Failed to read BULK_IN_DLY: %d"
	.align 8
.LC17:
	.string	"Read Value from BULK_IN_DLY after writing: 0x%08x"
	.align 8
.LC18:
	.string	"Read Value from HW_CFG: 0x%08x"
	.align 8
.LC19:
	.string	"Failed to write HW_CFG register, ret=%d"
	.align 8
.LC20:
	.string	"Read Value from HW_CFG after writing: 0x%08x"
	.align 8
.LC21:
	.string	"Failed to write INT_STS register, ret=%d"
	.section	.rodata.str1.1
.LC22:
	.string	"Failed to read ID_REV: %d"
.LC23:
	.string	"ID_REV = 0x%08x"
	.section	.rodata.str1.8
	.align 8
.LC24:
	.string	"Failed to write LED_GPIO_CFG register, ret=%d"
	.section	.rodata.str1.1
.LC25:
	.string	"Failed to write FLOW: %d"
.LC26:
	.string	"Failed to write AFC_CFG: %d"
.LC27:
	.string	"Failed to read MAC_CR: %d"
.LC28:
	.string	"Failed to write VAN1: %d"
	.section	.rodata.str1.8
	.align 8
.LC29:
	.string	"Failed to set csum offload: %d"
	.section	.rodata.str1.1
.LC30:
	.string	"Failed to read INT_EP_CTL: %d"
	.section	.rodata.str1.8
	.align 8
.LC31:
	.string	"Failed to write INT_EP_CTL: %d"
	.section	.rodata.str1.1
.LC32:
	.string	"smsc95xx_reset, return 0"
	.text
	.p2align 4
	.type	smsc95xx_reset, @function
smsc95xx_reset:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	mov	rax, QWORD PTR 24[rdi]
	mov	r14, QWORD PTR [rax]
	mov	rax, QWORD PTR 8[rdi]
	mov	QWORD PTR 8[rsp], rax
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L92
.L2:
	mov	edx, DWORD PTR HW_CFG_LRST_[rip]
	mov	rdi, rbp
	xor	ebx, ebx
	lea	r13, 20[rsp]
	mov	esi, DWORD PTR HW_CFG[rip]
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	jns	.L3
	jmp	.L93
	.p2align 4,,10
	.p2align 3
.L5:
	mov	edi, 10
	add	ebx, 1
	call	msleep@PLT
	mov	eax, DWORD PTR 20[rsp]
	and	eax, DWORD PTR HW_CFG_LRST_[rip]
	mov	r15d, eax
	je	.L6
	cmp	ebx, 100
	je	.L7
.L3:
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	jns	.L5
.L90:
	mov	edx, r12d
	lea	rsi, .LC2[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L94
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	cmp	ebx, 100
	je	.L7
	mov	edx, DWORD PTR PM_CTL_PHY_RST_[rip]
	mov	esi, DWORD PTR PM_CTRL[rip]
	mov	rdi, rbp
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	jns	.L9
	jmp	.L95
	.p2align 4,,10
	.p2align 3
.L10:
	mov	edi, 10
	add	r15d, 1
	call	msleep@PLT
	mov	eax, DWORD PTR 20[rsp]
	test	DWORD PTR PM_CTL_PHY_RST_[rip], eax
	je	.L11
	cmp	r15d, 100
	je	.L12
.L9:
	mov	esi, DWORD PTR PM_CTRL[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	jns	.L10
	mov	edx, eax
	lea	rsi, .LC5[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L92:
	lea	rsi, .LC0[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L93:
	mov	edx, eax
	lea	rsi, .LC1[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L11:
	cmp	r15d, 100
	je	.L12
	mov	rdi, rbp
	call	smsc95xx_init_mac_address@PLT
	mov	rdi, rbp
	call	smsc95xx_set_mac_address@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L96
.L14:
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L90
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L97
.L16:
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	edx, DWORD PTR 20[rsp]
	mov	rdi, rbp
	or	edx, DWORD PTR HW_CFG_BIR_[rip]
	mov	DWORD PTR 20[rsp], edx
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L98
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L90
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L99
.L19:
	cmp	QWORD PTR turbo_mode[rip], 0
	jne	.L20
	mov	eax, DWORD PTR MAX_SINGLE_PACKET_SIZE[rip]
	xor	r12d, r12d
	mov	DWORD PTR 0[rbp], eax
.L21:
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L100
.L23:
	mov	esi, DWORD PTR BURST_CAP[rip]
	mov	edx, r12d
	mov	rdi, rbp
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L101
	mov	esi, DWORD PTR BURST_CAP[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L102
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L103
.L26:
	mov	edx, DWORD PTR DEFAULT_BULK_IN_DELAY[rip]
	mov	esi, DWORD PTR BULK_IN_DLY[rip]
	mov	rdi, rbp
	mov	DWORD PTR 20[rsp], edx
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L104
	mov	esi, DWORD PTR BULK_IN_DLY[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L105
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L106
.L29:
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L90
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L107
.L31:
	cmp	QWORD PTR turbo_mode[rip], 0
	mov	eax, DWORD PTR 20[rsp]
	je	.L32
	or	eax, DWORD PTR HW_CFG_MEF_[rip]
	or	eax, DWORD PTR HW_CFG_BCE_[rip]
.L32:
	mov	edx, DWORD PTR HW_CFG_RXDOFF_[rip]
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	rdi, rbp
	not	edx
	and	edx, eax
	mov	eax, DWORD PTR NET_IP_ALIGN[rip]
	sal	eax, 9
	or	edx, eax
	mov	DWORD PTR 20[rsp], edx
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L108
	mov	esi, DWORD PTR HW_CFG[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L90
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L109
.L35:
	mov	esi, DWORD PTR INT_STS[rip]
	mov	edx, -1
	mov	rdi, rbp
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L110
	mov	esi, DWORD PTR ID_REV[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L111
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	jne	.L112
.L38:
	mov	esi, DWORD PTR LED_GPIO_CFG[rip]
	mov	edx, DWORD PTR LED_GPIO_CFG_SPD_LED[rip]
	mov	rdi, rbp
	or	edx, DWORD PTR LED_GPIO_CFG_LNK_LED[rip]
	or	edx, DWORD PTR LED_GPIO_CFG_FDX_LED[rip]
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L113
	mov	esi, DWORD PTR FLOW[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L114
	mov	edx, DWORD PTR AFC_CFG_DEFAULT[rip]
	mov	esi, DWORD PTR AFC_CFG[rip]
	mov	rdi, rbp
	mov	DWORD PTR 20[rsp], edx
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L115
	mov	esi, DWORD PTR MAC_CR[rip]
	mov	rdx, r14
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L116
	mov	edx, DWORD PTR ETH_P_8021Q[rip]
	mov	esi, DWORD PTR VLAN1[rip]
	mov	rdi, rbp
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L117
	mov	esi, DWORD PTR 4[r14]
	mov	rdi, QWORD PTR 8[rsp]
	call	ethtool_op_set_tx_hw_csum@PLT
	mov	rdi, rbp
	call	smsc95xx_set_csums@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L118
	mov	rdi, QWORD PTR 8[rbp]
	call	smsc95xx_set_multicast@PLT
	mov	rdi, rbp
	call	smsc95xx_phy_initialize@PLT
	test	rax, rax
	js	.L119
	mov	esi, DWORD PTR INT_EP_CTL[rip]
	mov	rdx, r13
	mov	rdi, rbp
	call	smsc95xx_read_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L120
	mov	esi, DWORD PTR INT_EP_CTL[rip]
	mov	edx, DWORD PTR 20[rsp]
	mov	rdi, rbp
	or	edx, DWORD PTR INT_EP_CTL_PHY_INT_[rip]
	mov	DWORD PTR 20[rsp], edx
	call	smsc95xx_write_reg@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L121
	mov	rdi, rbp
	xor	r12d, r12d
	call	smsc95xx_start_tx_path@PLT
	mov	rdi, rbp
	call	smsc95xx_start_rx_path@PLT
	mov	rdi, rbp
	call	netif_msg_ifup@PLT
	test	rax, rax
	je	.L1
	lea	rsi, .LC32[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L7:
	lea	rsi, .LC3[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L95:
	mov	edx, eax
	lea	rsi, .LC4[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L97:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC8[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L16
.L98:
	mov	edx, eax
	lea	rsi, .LC9[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L12:
	lea	rsi, .LC6[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L96:
	mov	rax, QWORD PTR 8[rbp]
	lea	rsi, .LC7[rip]
	mov	rdi, rbp
	mov	edx, DWORD PTR [rax]
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L14
.L20:
	mov	rax, QWORD PTR 16[rbp]
	mov	rcx, QWORD PTR USB_SPEED_HIGH[rip]
	cmp	QWORD PTR [rax], rcx
	je	.L122
	mov	ecx, DWORD PTR DEFAULT_FS_BURST_CAP_SIZE[rip]
	mov	eax, ecx
	cdq
	idiv	DWORD PTR FS_USB_PKT_SIZE[rip]
	mov	DWORD PTR 0[rbp], ecx
	mov	r12d, eax
	jmp	.L21
.L100:
	mov	edx, DWORD PTR 0[rbp]
	lea	rsi, .LC11[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L23
.L99:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC10[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L19
.L101:
	mov	edx, eax
	lea	rsi, .LC12[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L102:
	mov	edx, eax
	lea	rsi, .LC13[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L103:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC14[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L26
.L122:
	mov	ecx, DWORD PTR DEFAULT_HS_BURST_CAP_SIZE[rip]
	mov	eax, ecx
	cdq
	idiv	DWORD PTR HS_USB_PKT_SIZE[rip]
	mov	DWORD PTR 0[rbp], ecx
	mov	r12d, eax
	jmp	.L21
.L104:
	mov	edx, eax
	lea	rsi, .LC15[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L106:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC17[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L29
.L105:
	mov	edx, eax
	lea	rsi, .LC16[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L107:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC18[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L31
.L108:
	mov	edx, eax
	lea	rsi, .LC19[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L109:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC20[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L35
.L111:
	mov	edx, eax
	lea	rsi, .LC22[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L110:
	mov	edx, eax
	lea	rsi, .LC21[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L113:
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L112:
	mov	edx, DWORD PTR 20[rsp]
	lea	rsi, .LC23[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devdbg@PLT
	jmp	.L38
.L94:
	call	__stack_chk_fail@PLT
.L121:
	mov	edx, eax
	lea	rsi, .LC31[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L120:
	mov	edx, eax
	lea	rsi, .LC30[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L115:
	mov	edx, eax
	lea	rsi, .LC26[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L114:
	mov	edx, eax
	lea	rsi, .LC25[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L119:
	mov	r12d, DWORD PTR EIO[rip]
	neg	r12d
	jmp	.L1
.L118:
	mov	edx, eax
	lea	rsi, .LC29[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L117:
	mov	edx, eax
	lea	rsi, .LC28[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
.L116:
	mov	edx, eax
	lea	rsi, .LC27[rip]
	mov	rdi, rbp
	xor	eax, eax
	call	devwarn@PLT
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	smsc95xx_reset, .-smsc95xx_reset
	.comm	turbo_mode,8,8
	.comm	VLAN1,4,4
	.comm	USB_SPEED_HIGH,8,8
	.comm	PM_CTRL,4,4
	.comm	PM_CTL_PHY_RST_,4,4
	.comm	NET_IP_ALIGN,4,4
	.comm	MAX_SINGLE_PACKET_SIZE,4,4
	.comm	MAC_CR,4,4
	.comm	LED_GPIO_CFG_SPD_LED,4,4
	.comm	LED_GPIO_CFG_LNK_LED,4,4
	.comm	LED_GPIO_CFG_FDX_LED,4,4
	.comm	LED_GPIO_CFG,4,4
	.comm	INT_STS,4,4
	.comm	INT_EP_CTL_PHY_INT_,4,4
	.comm	INT_EP_CTL,4,4
	.comm	ID_REV,4,4
	.comm	HW_CFG_RXDOFF_,4,4
	.comm	HW_CFG_MEF_,4,4
	.comm	HW_CFG_LRST_,4,4
	.comm	HW_CFG_BIR_,4,4
	.comm	HW_CFG_BCE_,4,4
	.comm	HW_CFG,4,4
	.comm	HS_USB_PKT_SIZE,4,4
	.comm	FS_USB_PKT_SIZE,4,4
	.comm	FLOW,4,4
	.comm	ETH_P_8021Q,8,8
	.comm	EIO,4,4
	.comm	DEFAULT_HS_BURST_CAP_SIZE,4,4
	.comm	DEFAULT_FS_BURST_CAP_SIZE,4,4
	.comm	DEFAULT_BULK_IN_DELAY,4,4
	.comm	BURST_CAP,4,4
	.comm	BULK_IN_DLY,4,4
	.comm	AFC_CFG_DEFAULT,4,4
	.comm	AFC_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_smsc95xx.c_smsc95xx_reset.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"entering smsc95xx_reset\000"
	.align	2
.LC1:
	.ascii	"Failed to write HW_CFG_LRST_ bit in HW_CFG register"
	.ascii	", ret = %d\000"
	.align	2
.LC2:
	.ascii	"Failed to read HW_CFG: %d\000"
	.align	2
.LC3:
	.ascii	"timeout waiting for completion of Lite Reset\000"
	.align	2
.LC4:
	.ascii	"Failed to write PM_CTRL: %d\000"
	.align	2
.LC5:
	.ascii	"Failed to read PM_CTRL: %d\000"
	.align	2
.LC6:
	.ascii	"timeout waiting for PHY Reset\000"
	.align	2
.LC7:
	.ascii	"MAC Address: %pM\000"
	.align	2
.LC8:
	.ascii	"Read Value from HW_CFG : 0x%08x\000"
	.align	2
.LC9:
	.ascii	"Failed to write HW_CFG_BIR_ bit in HW_CFG register,"
	.ascii	" ret = %d\000"
	.align	2
.LC10:
	.ascii	"Read Value from HW_CFG after writing HW_CFG_BIR_: 0"
	.ascii	"x%08x\000"
	.global	__aeabi_idiv
	.align	2
.LC11:
	.ascii	"rx_urb_size=%ld\000"
	.align	2
.LC12:
	.ascii	"Failed to write BURST_CAP: %d\000"
	.align	2
.LC13:
	.ascii	"Failed to read BURST_CAP: %d\000"
	.align	2
.LC14:
	.ascii	"Read Value from BURST_CAP after writing: 0x%08x\000"
	.align	2
.LC15:
	.ascii	"ret = %d\000"
	.align	2
.LC16:
	.ascii	"Failed to read BULK_IN_DLY: %d\000"
	.align	2
.LC17:
	.ascii	"Read Value from BULK_IN_DLY after writing: 0x%08x\000"
	.align	2
.LC18:
	.ascii	"Read Value from HW_CFG: 0x%08x\000"
	.align	2
.LC19:
	.ascii	"Failed to write HW_CFG register, ret=%d\000"
	.align	2
.LC20:
	.ascii	"Read Value from HW_CFG after writing: 0x%08x\000"
	.align	2
.LC21:
	.ascii	"Failed to write INT_STS register, ret=%d\000"
	.align	2
.LC22:
	.ascii	"Failed to read ID_REV: %d\000"
	.align	2
.LC23:
	.ascii	"ID_REV = 0x%08x\000"
	.align	2
.LC24:
	.ascii	"Failed to write LED_GPIO_CFG register, ret=%d\000"
	.align	2
.LC25:
	.ascii	"Failed to write FLOW: %d\000"
	.align	2
.LC26:
	.ascii	"Failed to write AFC_CFG: %d\000"
	.align	2
.LC27:
	.ascii	"Failed to read MAC_CR: %d\000"
	.align	2
.LC28:
	.ascii	"Failed to write VAN1: %d\000"
	.align	2
.LC29:
	.ascii	"Failed to set csum offload: %d\000"
	.align	2
.LC30:
	.ascii	"Failed to read INT_EP_CTL: %d\000"
	.align	2
.LC31:
	.ascii	"Failed to write INT_EP_CTL: %d\000"
	.align	2
.LC32:
	.ascii	"smsc95xx_reset, return 0\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC33:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	smsc95xx_reset, %function
smsc95xx_reset:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, [r0, #12]
	ldr	r2, .L125
	sub	sp, sp, #12
	mov	r6, r0
	ldr	r2, [r2]
	str	r2, [sp, #4]
	mov	r2,#0
	ldr	r9, [r3]
	ldr	r10, [r0, #4]
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L94
.L2:
	ldr	r8, .L125+4
	ldr	r7, .L125+8
	mov	r0, r6
	ldr	r2, [r8]
	ldr	r1, [r7]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	movge	r5, #0
	bge	.L3
	b	.L95
.L5:
	mov	r0, #10
	bl	msleep
	ldr	r2, [sp]
	ldr	r3, [r8]
	add	r5, r5, #1
	ands	fp, r2, r3
	beq	.L6
	cmp	r5, #100
	beq	.L7
.L3:
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	bge	.L5
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+12
	bl	devwarn
.L1:
	ldr	r3, .L125
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L96
	mov	r0, r4
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L6:
	cmp	r5, #100
	beq	.L7
	ldr	r8, .L125+16
	ldr	r5, .L125+20
	mov	r0, r6
	ldr	r2, [r8]
	ldr	r1, [r5]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	bge	.L9
	b	.L97
.L10:
	mov	r0, #10
	bl	msleep
	ldr	r2, [sp]
	ldr	r3, [r8]
	add	fp, fp, #1
	tst	r2, r3
	beq	.L11
	cmp	fp, #100
	beq	.L12
.L9:
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r5]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	bge	.L10
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+24
	bl	devwarn
	b	.L1
.L94:
	mov	r0, r6
	ldr	r1, .L125+28
	bl	devdbg
	b	.L2
.L95:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+32
	bl	devwarn
	b	.L1
.L11:
	cmp	fp, #100
	beq	.L12
	mov	r0, r6
	bl	smsc95xx_init_mac_address
	mov	r0, r6
	bl	smsc95xx_set_mac_address
	subs	r4, r0, #0
	blt	.L1
	mov	r0, r6
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L98
.L14:
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L92
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L99
.L16:
	ldr	r3, .L125+36
	ldr	r2, [sp]
	ldr	r3, [r3]
	mov	r0, r6
	orr	r2, r2, r3
	ldr	r1, [r7]
	str	r2, [sp]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L100
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L92
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L101
.L19:
	ldr	r5, .L125+40
	ldr	r4, [r5]
	cmp	r4, #0
	bne	.L20
	ldr	r3, .L125+44
	ldr	r3, [r3]
	str	r3, [r6]
.L21:
	mov	r0, r6
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L102
.L23:
	ldr	r8, .L125+48
	mov	r2, r4
	mov	r0, r6
	ldr	r1, [r8]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L103
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r8]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L104
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L105
.L26:
	ldr	r3, .L125+52
	ldr	r8, .L125+56
	ldr	r2, [r3]
	mov	r0, r6
	ldr	r1, [r8]
	str	r2, [sp]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L106
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r8]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L107
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L108
.L29:
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L92
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L109
.L31:
	ldr	r2, [r5]
	ldr	r3, [sp]
	cmp	r2, #0
	beq	.L32
	ldr	r1, .L125+60
	ldr	r2, .L125+64
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
.L32:
	ldr	r1, .L125+68
	ldr	r2, .L125+72
	ldr	r1, [r1]
	ldr	r2, [r2]
	bic	r3, r3, r1
	orr	r2, r3, r2, lsl #9
	mov	r0, r6
	ldr	r1, [r7]
	str	r2, [sp]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L110
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r7]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L92
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L111
.L35:
	ldr	r3, .L125+76
	mvn	r2, #0
	mov	r0, r6
	ldr	r1, [r3]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L112
	ldr	r3, .L125+80
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r3]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L113
	bl	netif_msg_ifup
	cmp	r0, #0
	bne	.L114
.L38:
	ldr	r1, .L125+84
	ldr	r3, .L125+88
	ldr	r2, .L125+92
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L125+96
	orr	r3, r3, r0
	ldr	r1, [r1]
	mov	r0, r6
	orr	r2, r3, r2
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L115
	ldr	r3, .L125+100
	mov	r2, #0
	mov	r0, r6
	ldr	r1, [r3]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L116
	ldr	r2, .L125+104
	ldr	r3, .L125+108
	ldr	r2, [r2]
	mov	r0, r6
	ldr	r1, [r3]
	str	r2, [sp]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L117
	ldr	r3, .L125+112
	mov	r2, r9
	mov	r0, r6
	ldr	r1, [r3]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	blt	.L118
	ldr	r3, .L125+116
	ldr	r2, .L125+120
	mov	r0, r6
	ldr	r2, [r2]
	ldr	r1, [r3]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	blt	.L119
	ldr	r1, [r9, #4]
	mov	r0, r10
	bl	ethtool_op_set_tx_hw_csum
	mov	r0, r6
	bl	smsc95xx_set_csums
	subs	r4, r0, #0
	blt	.L120
	ldr	r0, [r6, #4]
	bl	smsc95xx_set_multicast
	mov	r0, r6
	bl	smsc95xx_phy_initialize
	cmp	r0, #0
	blt	.L121
	ldr	r5, .L125+124
	mov	r2, sp
	mov	r0, r6
	ldr	r1, [r5]
	bl	smsc95xx_read_reg
	subs	r4, r0, #0
	blt	.L122
	ldr	r3, .L125+128
	ldr	r2, [sp]
	ldr	r3, [r3]
	mov	r0, r6
	orr	r2, r2, r3
	ldr	r1, [r5]
	str	r2, [sp]
	bl	smsc95xx_write_reg
	subs	r4, r0, #0
	mov	r0, r6
	blt	.L123
	bl	smsc95xx_start_tx_path
	mov	r0, r6
	bl	smsc95xx_start_rx_path
	mov	r0, r6
	bl	netif_msg_ifup
	subs	r4, r0, #0
	beq	.L1
	mov	r0, r6
	ldr	r1, .L125+132
	bl	devdbg
	mov	r4, #0
	b	.L1
.L7:
	mov	r0, r6
	ldr	r1, .L125+136
	bl	devwarn
	b	.L1
.L97:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+140
	bl	devwarn
	b	.L1
.L99:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+144
	bl	devdbg
	b	.L16
.L100:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+148
	bl	devwarn
	b	.L1
.L92:
	mov	r2, r4
	ldr	r1, .L125+12
	bl	devwarn
	b	.L1
.L12:
	mov	r0, r6
	ldr	r1, .L125+152
	bl	devwarn
	b	.L1
.L98:
	ldr	r3, [r6, #4]
	mov	r0, r6
	ldr	r1, .L125+156
	ldr	r2, [r3]
	bl	devdbg
	b	.L14
.L20:
	ldr	r2, [r6, #8]
	ldr	r3, .L125+160
	ldr	r2, [r2]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L124
	ldr	r2, .L125+164
	ldr	r3, .L125+168
	ldr	r8, [r2]
	ldr	r1, [r3]
	mov	r0, r8
	bl	__aeabi_idiv
	str	r8, [r6]
	mov	r4, r0
	b	.L21
.L102:
	mov	r0, r6
	ldr	r2, [r6]
	ldr	r1, .L125+172
	bl	devdbg
	b	.L23
.L101:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+176
	bl	devdbg
	b	.L19
.L103:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+180
	bl	devwarn
	b	.L1
.L104:
	mov	r2, r4
	ldr	r1, .L125+184
	bl	devwarn
	b	.L1
.L105:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+188
	bl	devdbg
	b	.L26
.L124:
	ldr	r2, .L125+192
	ldr	r3, .L125+196
	ldr	r8, [r2]
	ldr	r1, [r3]
	mov	r0, r8
	bl	__aeabi_idiv
	str	r8, [r6]
	mov	r4, r0
	b	.L21
.L106:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+200
	bl	devwarn
	b	.L1
.L107:
	mov	r2, r4
	ldr	r1, .L125+204
	bl	devwarn
	b	.L1
.L108:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+208
	bl	devdbg
	b	.L29
.L109:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+212
	bl	devdbg
	b	.L31
.L110:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+216
	bl	devwarn
	b	.L1
.L111:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+220
	bl	devdbg
	b	.L35
.L113:
	mov	r2, r4
	ldr	r1, .L125+224
	bl	devwarn
	b	.L1
.L112:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+228
	bl	devwarn
	b	.L1
.L115:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+232
	bl	devwarn
	b	.L1
.L114:
	mov	r0, r6
	ldr	r2, [sp]
	ldr	r1, .L125+236
	bl	devdbg
	b	.L38
.L96:
	bl	__stack_chk_fail
.L123:
	mov	r2, r4
	ldr	r1, .L125+240
	bl	devwarn
	b	.L1
.L122:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+244
	bl	devwarn
	b	.L1
.L117:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+248
	bl	devwarn
	b	.L1
.L116:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+252
	bl	devwarn
	b	.L1
.L121:
	ldr	r3, .L125+256
	ldr	r0, [r3]
	rsb	r4, r0, #0
	b	.L1
.L120:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+260
	bl	devwarn
	b	.L1
.L119:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+264
	bl	devwarn
	b	.L1
.L118:
	mov	r0, r6
	mov	r2, r4
	ldr	r1, .L125+268
	bl	devwarn
	b	.L1
.L126:
	.align	2
.L125:
	.word	.LC33
	.word	HW_CFG_LRST_
	.word	HW_CFG
	.word	.LC2
	.word	PM_CTL_PHY_RST_
	.word	PM_CTRL
	.word	.LC5
	.word	.LC0
	.word	.LC1
	.word	HW_CFG_BIR_
	.word	turbo_mode
	.word	MAX_SINGLE_PACKET_SIZE
	.word	BURST_CAP
	.word	DEFAULT_BULK_IN_DELAY
	.word	BULK_IN_DLY
	.word	HW_CFG_MEF_
	.word	HW_CFG_BCE_
	.word	HW_CFG_RXDOFF_
	.word	NET_IP_ALIGN
	.word	INT_STS
	.word	ID_REV
	.word	LED_GPIO_CFG_LNK_LED
	.word	LED_GPIO_CFG_SPD_LED
	.word	LED_GPIO_CFG_FDX_LED
	.word	LED_GPIO_CFG
	.word	FLOW
	.word	AFC_CFG_DEFAULT
	.word	AFC_CFG
	.word	MAC_CR
	.word	VLAN1
	.word	ETH_P_8021Q
	.word	INT_EP_CTL
	.word	INT_EP_CTL_PHY_INT_
	.word	.LC32
	.word	.LC3
	.word	.LC4
	.word	.LC8
	.word	.LC9
	.word	.LC6
	.word	.LC7
	.word	USB_SPEED_HIGH
	.word	DEFAULT_FS_BURST_CAP_SIZE
	.word	FS_USB_PKT_SIZE
	.word	.LC11
	.word	.LC10
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	DEFAULT_HS_BURST_CAP_SIZE
	.word	HS_USB_PKT_SIZE
	.word	.LC15
	.word	.LC16
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC22
	.word	.LC21
	.word	.LC24
	.word	.LC23
	.word	.LC31
	.word	.LC30
	.word	.LC26
	.word	.LC25
	.word	EIO
	.word	.LC29
	.word	.LC28
	.word	.LC27
	.size	smsc95xx_reset, .-smsc95xx_reset
	.comm	turbo_mode,4,4
	.comm	VLAN1,4,4
	.comm	USB_SPEED_HIGH,4,4
	.comm	PM_CTRL,4,4
	.comm	PM_CTL_PHY_RST_,4,4
	.comm	NET_IP_ALIGN,4,4
	.comm	MAX_SINGLE_PACKET_SIZE,4,4
	.comm	MAC_CR,4,4
	.comm	LED_GPIO_CFG_SPD_LED,4,4
	.comm	LED_GPIO_CFG_LNK_LED,4,4
	.comm	LED_GPIO_CFG_FDX_LED,4,4
	.comm	LED_GPIO_CFG,4,4
	.comm	INT_STS,4,4
	.comm	INT_EP_CTL_PHY_INT_,4,4
	.comm	INT_EP_CTL,4,4
	.comm	ID_REV,4,4
	.comm	HW_CFG_RXDOFF_,4,4
	.comm	HW_CFG_MEF_,4,4
	.comm	HW_CFG_LRST_,4,4
	.comm	HW_CFG_BIR_,4,4
	.comm	HW_CFG_BCE_,4,4
	.comm	HW_CFG,4,4
	.comm	HS_USB_PKT_SIZE,4,4
	.comm	FS_USB_PKT_SIZE,4,4
	.comm	FLOW,4,4
	.comm	ETH_P_8021Q,4,4
	.comm	EIO,4,4
	.comm	DEFAULT_HS_BURST_CAP_SIZE,4,4
	.comm	DEFAULT_FS_BURST_CAP_SIZE,4,4
	.comm	DEFAULT_BULK_IN_DELAY,4,4
	.comm	BURST_CAP,4,4
	.comm	BULK_IN_DLY,4,4
	.comm	AFC_CFG_DEFAULT,4,4
	.comm	AFC_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
