	.file	"extr_bnx2x_link.c_bnx2x_8073_common_init_phy.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"populate_phy failed\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"Loading spirom for phy address 0x%x\n"
	.text
	.p2align 4
	.type	bnx2x_8073_common_init_phy, @function
bnx2x_8073_common_init_phy:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	.cfi_offset 15, -24
	mov	r15d, ecx
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 72
	mov	QWORD PTR -88[rbp], rdx
	movsx	rcx, DWORD PTR PORT_MAX[rip]
	mov	QWORD PTR -80[rbp], rsi
	mov	rdi, rsp
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	lea	rax, 15[0+rcx*4]
	mov	rdx, rax
	and	rax, -4096
	sub	rdi, rax
	and	rdx, -16
	mov	rax, rdi
	cmp	rsp, rax
	je	.L3
.L46:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, rax
	jne	.L46
.L3:
	and	edx, 4095
	sub	rsp, rdx
	test	rdx, rdx
	jne	.L47
.L4:
	lea	rax, 15[0+rcx*8]
	mov	rcx, rsp
	mov	QWORD PTR -104[rbp], rsp
	mov	rdx, rax
	and	rax, -4096
	sub	rcx, rax
	and	rdx, -16
	mov	rax, rcx
	cmp	rsp, rax
	je	.L6
.L48:
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	cmp	rsp, rax
	jne	.L48
.L6:
	and	edx, 4095
	sub	rsp, rdx
	test	rdx, rdx
	jne	.L49
.L7:
	mov	esi, DWORD PTR NIG_REG_PORT_SWAP[rip]
	mov	rdi, rbx
	mov	QWORD PTR -96[rbp], rsp
	call	REG_RD@PLT
	mov	esi, DWORD PTR NIG_REG_STRAP_OVERRIDE[rip]
	mov	rdi, rbx
	mov	r12, rax
	call	REG_RD@PLT
	test	r12, r12
	mov	rdi, rbx
	mov	r8, rax
	setne	al
	xor	esi, esi
	test	r8, r8
	setne	sil
	and	esi, eax
	call	bnx2x_ext_phy_hw_reset@PLT
	mov	eax, DWORD PTR PORT_MAX[rip]
	mov	rcx, QWORD PTR -104[rbp]
	sub	eax, 1
	cmp	eax, DWORD PTR PORT_0[rip]
	movsx	r12, eax
	lea	r13, [rcx+r12*4]
	jge	.L15
	jmp	.L16
	.p2align 4,,10
	.p2align 3
.L51:
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -88[rbp]
	mov	r8d, r12d
	mov	rcx, QWORD PTR [rax]
.L12:
	mov	r9, r13
	mov	esi, r15d
	mov	rdi, rbx
	mov	DWORD PTR -68[rbp], r8d
	call	bnx2x_populate_phy@PLT
	mov	r8d, DWORD PTR -68[rbp]
	test	rax, rax
	jne	.L50
	lea	esi, 0[0+r8*4]
	mov	edx, DWORD PTR NIG_MASK_XGXS0_LINK_STATUS[rip]
	mov	rdi, rbx
	sub	r12, 1
	or	edx, DWORD PTR NIG_MASK_XGXS0_LINK10G[rip]
	movsx	rsi, esi
	or	edx, DWORD PTR NIG_MASK_SERDES0_LINK_STATUS[rip]
	add	rsi, QWORD PTR NIG_REG_MASK_INTERRUPT_PORT0[rip]
	or	edx, DWORD PTR NIG_MASK_MI_INT[rip]
	call	bnx2x_bits_dis@PLT
	mov	edx, DWORD PTR MISC_REGISTERS_GPIO_OUTPUT_HIGH[rip]
	mov	ecx, r14d
	mov	rdi, rbx
	mov	esi, DWORD PTR MISC_REGISTERS_GPIO_2[rip]
	call	bnx2x_set_gpio@PLT
	mov	ecx, DWORD PTR MDIO_PMA_REG_CTRL[rip]
	mov	rsi, r13
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	mov	r8d, 32768
	mov	rdi, rbx
	sub	r13, 4
	call	bnx2x_cl45_write@PLT
	cmp	DWORD PTR PORT_0[rip], r12d
	jg	.L16
.L15:
	mov	rdi, rbx
	mov	r14d, r12d
	call	CHIP_IS_E1x@PLT
	test	rax, rax
	mov	rax, QWORD PTR -80[rbp]
	jne	.L51
	mov	rdx, QWORD PTR [rax+r12*8]
	mov	rax, QWORD PTR -88[rbp]
	xor	r8d, r8d
	mov	rcx, QWORD PTR [rax+r12*8]
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L47:
	or	QWORD PTR -8[rsp+rdx], 0
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L16:
	mov	edi, 150
	call	msleep@PLT
	movsx	rax, DWORD PTR PORT_0[rip]
	mov	rdi, QWORD PTR -104[rbp]
	mov	rdx, rax
	lea	rcx, [rdi+rax*4]
	test	BYTE PTR [rdi+rax*4], 1
	je	.L52
	mov	rsi, QWORD PTR PORT_1[rip]
	mov	rdi, QWORD PTR -104[rbp]
	mov	r10, QWORD PTR -96[rbp]
	lea	rdi, [rdi+rsi*4]
	mov	QWORD PTR [r10+rax*8], rdi
	mov	QWORD PTR [r10+rsi*8], rcx
.L17:
	mov	eax, DWORD PTR PORT_MAX[rip]
	xor	r14d, r14d
	sub	eax, 1
	movsx	r12, eax
	cmp	edx, eax
	jle	.L23
	jmp	.L24
	.p2align 4,,10
	.p2align 3
.L22:
	mov	ecx, DWORD PTR MDIO_PMA_REG_TX_POWER_DOWN[rip]
	lea	r8, -60[rbp]
	mov	rsi, r13
	mov	rdi, rbx
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	sub	r12, 1
	call	bnx2x_cl45_read@PLT
	mov	r8d, DWORD PTR -60[rbp]
	mov	rsi, r13
	mov	rdi, rbx
	mov	ecx, DWORD PTR MDIO_PMA_REG_TX_POWER_DOWN[rip]
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	or	r8d, 1024
	call	bnx2x_cl45_write@PLT
	cmp	DWORD PTR PORT_0[rip], r12d
	jg	.L24
.L23:
	mov	rdi, rbx
	mov	r15d, r14d
	call	CHIP_IS_E1x@PLT
	mov	edi, DWORD PTR NETIF_MSG_LINK[rip]
	lea	rsi, .LC1[rip]
	test	rax, rax
	mov	rax, QWORD PTR -96[rbp]
	cmovne	r15d, r12d
	mov	r13, QWORD PTR [rax+r12*8]
	xor	eax, eax
	mov	edx, DWORD PTR 0[r13]
	call	DP@PLT
	mov	edx, r15d
	mov	rsi, r13
	mov	rdi, rbx
	call	bnx2x_8073_8727_external_rom_boot@PLT
	test	rax, rax
	je	.L22
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	mov	rcx, QWORD PTR -56[rbp]
	xor	rcx, QWORD PTR fs:40
	jne	.L53
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa 7, 8
	ret
	.p2align 4,,10
	.p2align 3
.L50:
	.cfi_restore_state
	mov	edi, DWORD PTR NETIF_MSG_LINK[rip]
	lea	rsi, .LC0[rip]
	xor	eax, eax
	call	DP@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L24:
	mov	edi, 600
	lea	r14, -60[rbp]
	call	msleep@PLT
	mov	eax, DWORD PTR PORT_MAX[rip]
	mov	r15, QWORD PTR -96[rbp]
	sub	eax, 1
	cmp	eax, DWORD PTR PORT_0[rip]
	movsx	r12, eax
	jl	.L20
	.p2align 4,,10
	.p2align 3
.L25:
	mov	r13, QWORD PTR [r15+r12*8]
	mov	ecx, DWORD PTR MDIO_PMA_REG_TX_POWER_DOWN[rip]
	mov	r8, r14
	mov	rdi, rbx
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	mov	rsi, r13
	call	bnx2x_cl45_read@PLT
	mov	r8d, DWORD PTR -60[rbp]
	mov	rsi, r13
	mov	rdi, rbx
	mov	ecx, DWORD PTR MDIO_PMA_REG_TX_POWER_DOWN[rip]
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	and	r8d, -1025
	call	bnx2x_cl45_write@PLT
	mov	esi, 30000
	mov	edi, 15000
	call	usleep_range@PLT
	mov	r8, r14
	mov	rsi, r13
	mov	rdi, rbx
	mov	ecx, DWORD PTR MDIO_PMA_REG_EDC_FFE_MAIN[rip]
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	call	bnx2x_cl45_read@PLT
	mov	r8d, DWORD PTR -60[rbp]
	mov	rsi, r13
	mov	rdi, rbx
	mov	ecx, DWORD PTR MDIO_PMA_REG_EDC_FFE_MAIN[rip]
	mov	edx, DWORD PTR MDIO_PMA_DEVAD[rip]
	or	r8d, 4096
	call	bnx2x_cl45_write@PLT
	mov	edx, DWORD PTR MISC_REGISTERS_GPIO_OUTPUT_LOW[rip]
	mov	ecx, r12d
	mov	rdi, rbx
	mov	esi, DWORD PTR MISC_REGISTERS_GPIO_2[rip]
	sub	r12, 1
	call	bnx2x_set_gpio@PLT
	cmp	DWORD PTR PORT_0[rip], r12d
	jle	.L25
.L20:
	xor	eax, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L52:
	mov	rdi, QWORD PTR -96[rbp]
	mov	QWORD PTR [rdi+rax*8], rcx
	mov	rax, QWORD PTR PORT_1[rip]
	mov	rcx, QWORD PTR -104[rbp]
	lea	rcx, [rcx+rax*4]
	mov	QWORD PTR [rdi+rax*8], rcx
	jmp	.L17
.L49:
	or	QWORD PTR -8[rsp+rdx], 0
	jmp	.L7
.L53:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	bnx2x_8073_common_init_phy, .-bnx2x_8073_common_init_phy
	.comm	PORT_MAX,4,4
	.comm	PORT_1,8,8
	.comm	PORT_0,4,4
	.comm	NIG_REG_STRAP_OVERRIDE,4,4
	.comm	NIG_REG_PORT_SWAP,4,4
	.comm	NIG_REG_MASK_INTERRUPT_PORT0,8,8
	.comm	NIG_MASK_XGXS0_LINK_STATUS,4,4
	.comm	NIG_MASK_XGXS0_LINK10G,4,4
	.comm	NIG_MASK_SERDES0_LINK_STATUS,4,4
	.comm	NIG_MASK_MI_INT,4,4
	.comm	NETIF_MSG_LINK,4,4
	.comm	MISC_REGISTERS_GPIO_OUTPUT_LOW,4,4
	.comm	MISC_REGISTERS_GPIO_OUTPUT_HIGH,4,4
	.comm	MISC_REGISTERS_GPIO_2,4,4
	.comm	MDIO_PMA_REG_TX_POWER_DOWN,4,4
	.comm	MDIO_PMA_REG_EDC_FFE_MAIN,4,4
	.comm	MDIO_PMA_REG_CTRL,4,4
	.comm	MDIO_PMA_DEVAD,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_bnx2x_link.c_bnx2x_8073_common_init_phy.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"populate_phy failed\012\000"
	.align	2
.LC1:
	.ascii	"Loading spirom for phy address 0x%x\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bnx2x_8073_common_init_phy, %function
bnx2x_8073_common_init_phy:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #44
	mov	lr, r1
	ldr	r6, .L30
	ldr	r1, .L30+4
	ldr	ip, [r6]
	str	r3, [fp, #-52]
	lsl	ip, ip, #2
	add	ip, ip, #7
	bic	ip, ip, #7
	sub	sp, sp, ip
	ldr	r3, .L30+8
	add	r5, sp, #8
	str	lr, [fp, #-56]
	sub	sp, sp, ip
	str	r2, [fp, #-60]
	str	r5, [fp, #-64]
	ldr	r1, [r1]
	mov	r4, r0
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	bl	REG_RD
	ldr	r3, .L30+12
	mov	r5, r0
	ldr	r1, [r3]
	mov	r0, r4
	bl	REG_RD
	subs	r1, r0, #0
	movne	r1, #1
	cmp	r5, #0
	moveq	r1, #0
	mov	r0, r4
	ldr	r8, .L30+16
	bl	bnx2x_ext_phy_hw_reset
	ldr	r6, [r6]
	ldr	r3, [r8]
	sub	r6, r6, #1
	cmp	r6, r3
	add	r3, sp, #8
	str	r3, [fp, #-68]
	blt	.L10
	ldr	r3, [fp, #-64]
	ldr	r9, .L30+20
	ldr	r10, .L30+24
	add	r7, r3, r6, lsl #2
	b	.L9
.L7:
	ldr	r3, .L30+28
	ldr	r2, [r9]
	ldr	r3, [r3]
	ldr	ip, [r10]
	orr	r3, r2, r3
	ldr	r2, .L30+32
	ldr	r0, [r2]
	ldr	r2, .L30+36
	ldr	r1, [r2]
	orr	r2, r3, ip
	ldr	r3, .L30+40
	orr	r2, r2, r0
	add	r1, r1, r5, lsl #2
	mov	r0, r4
	str	r3, [fp, #-48]
	bl	bnx2x_bits_dis
	ldr	r3, [fp, #-48]
	ldr	r2, .L30+44
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r3, r6
	mov	r0, r4
	bl	bnx2x_set_gpio
	mov	r1, #32768
	ldr	r3, .L30+48
	ldr	r2, .L30+52
	str	r1, [sp]
	ldr	r3, [r3]
	mov	r1, r7
	mov	r0, r4
	ldr	r2, [r2]
	bl	bnx2x_cl45_write
	ldr	r3, [r8]
	sub	r6, r6, #1
	cmp	r3, r6
	sub	r7, r7, #4
	bgt	.L10
.L9:
	mov	r0, r4
	bl	CHIP_IS_E1x
	subs	r5, r0, #0
	movne	r5, r6
	ldr	r3, [fp, #-56]
	mov	r0, r4
	ldrne	r2, [r3]
	ldreq	r2, [r3, r6, lsl #2]
	ldrne	r3, [fp, #-60]
	ldreq	r3, [fp, #-60]
	ldrne	r3, [r3]
	ldreq	r3, [r3, r6, lsl #2]
	ldr	r1, [fp, #-52]
	stm	sp, {r5, r7}
	bl	bnx2x_populate_phy
	cmp	r0, #0
	beq	.L7
	ldr	r3, .L30+56
	ldr	r1, .L30+60
	ldr	r0, [r3]
	bl	DP
	ldr	r3, .L30+64
	ldr	r0, [r3]
	rsb	r0, r0, #0
.L1:
	ldr	r3, .L30+8
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L29
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L10:
	mov	r0, #150
	bl	msleep
	ldr	r2, [r8]
	ldr	r1, [fp, #-64]
	ldr	r3, [r1, r2, lsl #2]
	add	r1, r1, r2, lsl #2
	tst	r3, #1
	bne	.L3
	ldr	r3, .L30+68
	ldr	r0, [fp, #-68]
	str	r1, [r0, r2, lsl #2]
	ldr	r1, [r3]
	ldr	r3, [fp, #-64]
	add	r3, r3, r1, lsl #2
	str	r3, [r0, r1, lsl #2]
.L11:
	ldr	r3, .L30
	ldr	r7, [r3]
	sub	r6, r7, #1
	cmp	r2, r6
	bgt	.L18
	ldr	r3, [fp, #-68]
	sub	r7, r7, #-1073741823
	ldr	r9, .L30+72
	ldr	r10, .L30+52
	add	r7, r3, r7, lsl #2
	b	.L17
.L16:
	sub	r3, fp, #44
	str	r3, [sp]
	mov	r1, r5
	ldr	r3, [r9]
	ldr	r2, [r10]
	mov	r0, r4
	bl	bnx2x_cl45_read
	ldr	r3, [fp, #-44]
	mov	r1, r5
	orr	r3, r3, #1024
	str	r3, [sp]
	ldr	r3, [r9]
	mov	r0, r4
	ldr	r2, [r10]
	bl	bnx2x_cl45_write
	ldr	r3, [r8]
	sub	r6, r6, #1
	cmp	r3, r6
	bgt	.L18
.L17:
	mov	r0, r4
	bl	CHIP_IS_E1x
	subs	r3, r0, #0
	movne	r3, r6
	ldr	r5, [r7], #-4
	str	r3, [fp, #-48]
	ldr	r3, .L30+56
	ldr	r2, [r5]
	ldr	r1, .L30+76
	ldr	r0, [r3]
	bl	DP
	ldr	r3, [fp, #-48]
	mov	r1, r5
	mov	r2, r3
	mov	r0, r4
	bl	bnx2x_8073_8727_external_rom_boot
	cmp	r0, #0
	beq	.L16
	ldr	r3, .L30+64
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L3:
	ldr	r3, .L30+68
	ldr	r0, [fp, #-64]
	ldr	r3, [r3]
	ldr	ip, [fp, #-68]
	add	r0, r0, r3, lsl #2
	str	r0, [ip, r2, lsl #2]
	str	r1, [ip, r3, lsl #2]
	b	.L11
.L18:
	mov	r0, #600
	bl	msleep
	ldr	r3, .L30
	ldr	r10, [r3]
	ldr	r3, [r8]
	sub	r6, r10, #1
	cmp	r6, r3
	blt	.L14
	ldr	r3, .L30+40
	sub	r10, r10, #-1073741823
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-68]
	ldr	r7, .L30+52
	add	r10, r3, r10, lsl #2
	ldr	r9, .L30+72
	sub	r3, fp, #44
	str	r3, [fp, #-48]
.L19:
	ldr	r2, [fp, #-48]
	ldr	r5, [r10], #-4
	ldr	r3, [r9]
	str	r2, [sp]
	mov	r1, r5
	ldr	r2, [r7]
	mov	r0, r4
	bl	bnx2x_cl45_read
	ldr	r3, [fp, #-44]
	mov	r1, r5
	bic	r3, r3, #1024
	str	r3, [sp]
	ldr	r3, [r9]
	ldr	r2, [r7]
	mov	r0, r4
	bl	bnx2x_cl45_write
	ldr	r1, .L30+80
	ldr	r0, .L30+84
	bl	usleep_range
	ldr	r2, [fp, #-48]
	ldr	r3, .L30+88
	str	r2, [sp]
	mov	r1, r5
	ldr	r3, [r3]
	ldr	r2, [r7]
	mov	r0, r4
	bl	bnx2x_cl45_read
	ldr	r3, [fp, #-44]
	mov	r1, r5
	orr	r3, r3, #4096
	str	r3, [sp]
	ldr	r3, .L30+88
	ldr	r2, [r7]
	ldr	r3, [r3]
	mov	r0, r4
	bl	bnx2x_cl45_write
	ldr	r1, [fp, #-52]
	ldr	r2, .L30+92
	mov	r3, r6
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	bnx2x_set_gpio
	ldr	r3, [r8]
	sub	r6, r6, #1
	cmp	r3, r6
	ble	.L19
.L14:
	mov	r0, #0
	b	.L1
.L29:
	bl	__stack_chk_fail
.L31:
	.align	2
.L30:
	.word	PORT_MAX
	.word	NIG_REG_PORT_SWAP
	.word	.LC2
	.word	NIG_REG_STRAP_OVERRIDE
	.word	PORT_0
	.word	NIG_MASK_XGXS0_LINK_STATUS
	.word	NIG_MASK_SERDES0_LINK_STATUS
	.word	NIG_MASK_XGXS0_LINK10G
	.word	NIG_MASK_MI_INT
	.word	NIG_REG_MASK_INTERRUPT_PORT0
	.word	MISC_REGISTERS_GPIO_2
	.word	MISC_REGISTERS_GPIO_OUTPUT_HIGH
	.word	MDIO_PMA_REG_CTRL
	.word	MDIO_PMA_DEVAD
	.word	NETIF_MSG_LINK
	.word	.LC0
	.word	EINVAL
	.word	PORT_1
	.word	MDIO_PMA_REG_TX_POWER_DOWN
	.word	.LC1
	.word	30000
	.word	15000
	.word	MDIO_PMA_REG_EDC_FFE_MAIN
	.word	MISC_REGISTERS_GPIO_OUTPUT_LOW
	.size	bnx2x_8073_common_init_phy, .-bnx2x_8073_common_init_phy
	.comm	PORT_MAX,4,4
	.comm	PORT_1,4,4
	.comm	PORT_0,4,4
	.comm	NIG_REG_STRAP_OVERRIDE,4,4
	.comm	NIG_REG_PORT_SWAP,4,4
	.comm	NIG_REG_MASK_INTERRUPT_PORT0,4,4
	.comm	NIG_MASK_XGXS0_LINK_STATUS,4,4
	.comm	NIG_MASK_XGXS0_LINK10G,4,4
	.comm	NIG_MASK_SERDES0_LINK_STATUS,4,4
	.comm	NIG_MASK_MI_INT,4,4
	.comm	NETIF_MSG_LINK,4,4
	.comm	MISC_REGISTERS_GPIO_OUTPUT_LOW,4,4
	.comm	MISC_REGISTERS_GPIO_OUTPUT_HIGH,4,4
	.comm	MISC_REGISTERS_GPIO_2,4,4
	.comm	MDIO_PMA_REG_TX_POWER_DOWN,4,4
	.comm	MDIO_PMA_REG_EDC_FFE_MAIN,4,4
	.comm	MDIO_PMA_REG_CTRL,4,4
	.comm	MDIO_PMA_DEVAD,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
