	.file	"extr_pinctrl-ssbi-gpio.c_pm8xxx_pin_config_set.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"invalid pull-up strength\n"
.LC1:
	.string	"invalid drive strength\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC2:
	.string	"unsupported config parameter: %x\n"
	.text
	.p2align 4
	.type	pm8xxx_pin_config_set, @function
pm8xxx_pin_config_set:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, ecx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	pinctrl_dev_get_drvdata@PLT
	mov	QWORD PTR 8[rsp], rax
	mov	rax, QWORD PTR 8[rax]
	mov	r13, QWORD PTR [rax+rbp*8]
	test	r12d, r12d
	je	.L2
	lea	eax, -1[r12]
	xor	ebp, ebp
	lea	r12, .L5[rip]
	lea	r14, 8[rbx+rax*8]
	.p2align 4,,10
	.p2align 3
.L21:
	mov	rdi, QWORD PTR [rbx]
	call	pinconf_to_config_param@PLT
	mov	rdi, QWORD PTR [rbx]
	mov	r15d, eax
	call	pinconf_to_config_argument@PLT
	lea	ecx, -128[r15]
	cmp	ecx, 10
	ja	.L3
	movsx	rdx, DWORD PTR [r12+rcx*4]
	add	rdx, r12
	notrack jmp	rdx
	.section	.rodata
	.align 4
	.align 4
.L5:
	.long	.L15-.L5
	.long	.L14-.L5
	.long	.L13-.L5
	.long	.L12-.L5
	.long	.L11-.L5
	.long	.L10-.L5
	.long	.L9-.L5
	.long	.L8-.L5
	.long	.L7-.L5
	.long	.L6-.L5
	.long	.L4-.L5
	.text
	.p2align 4,,10
	.p2align 3
.L6:
	mov	DWORD PTR 4[r13], 1
	mov	edi, 3
	call	BIT@PLT
	or	ebp, eax
	.p2align 4,,10
	.p2align 3
.L17:
	add	rbx, 8
	cmp	rbx, r14
	jne	.L21
	xor	edi, edi
	call	BIT@PLT
	test	eax, ebp
	jne	.L53
.L22:
	mov	edi, 1
	call	BIT@PLT
	test	eax, ebp
	jne	.L54
.L23:
	mov	edi, 2
	call	BIT@PLT
	test	eax, ebp
	jne	.L55
.L24:
	mov	edi, 3
	call	BIT@PLT
	test	eax, ebp
	jne	.L56
.L25:
	mov	edi, 4
	call	BIT@PLT
	test	eax, ebp
	jne	.L57
.L26:
	mov	edi, 5
	call	BIT@PLT
	and	eax, ebp
	je	.L1
	mov	eax, DWORD PTR 36[r13]
	xor	ecx, ecx
	test	eax, eax
	je	.L58
.L27:
	mov	rdi, QWORD PTR 8[rsp]
	mov	rsi, r13
	mov	edx, 5
	call	pm8xxx_write_bank@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	mov	eax, DWORD PTR PM8XXX_GPIO_BIAS_PD[rip]
.L49:
	mov	DWORD PTR 0[r13], eax
	mov	edi, 2
	call	BIT@PLT
	mov	DWORD PTR 4[r13], 0
	mov	edi, 3
	mov	r15d, eax
	call	BIT@PLT
	or	eax, r15d
	or	ebp, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L8:
	mov	eax, DWORD PTR 8[r13]
	jmp	.L49
	.p2align 4,,10
	.p2align 3
.L9:
	mov	DWORD PTR 28[r13], 1
	mov	edi, 1
	call	BIT@PLT
	or	ebp, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L10:
	mov	DWORD PTR 28[r13], 0
	mov	edi, 1
	call	BIT@PLT
	or	ebp, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L11:
	mov	eax, DWORD PTR PM8XXX_GPIO_MODE_INPUT[rip]
	mov	DWORD PTR 12[r13], eax
.L50:
	xor	edi, edi
	call	BIT@PLT
	mov	edi, 1
	mov	r15d, eax
	call	BIT@PLT
	or	eax, r15d
	or	ebp, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L12:
	test	eax, eax
	mov	edx, DWORD PTR PM8XXX_GPIO_MODE_OUTPUT[rip]
	setne	al
	movzx	eax, al
	mov	DWORD PTR 12[r13], edx
	mov	DWORD PTR 16[r13], eax
	jmp	.L50
	.p2align 4,,10
	.p2align 3
.L13:
	mov	DWORD PTR 20[r13], eax
	xor	edi, edi
	call	BIT@PLT
	or	ebp, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L14:
	cmp	DWORD PTR PMIC_GPIO_STRENGTH_LOW[rip], eax
	jb	.L59
	mov	DWORD PTR 24[r13], eax
	mov	edi, 3
	call	BIT@PLT
	or	ebp, eax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L15:
	cmp	DWORD PTR PM8XXX_GPIO_BIAS_PU_1P5_30[rip], eax
	jb	.L60
	mov	DWORD PTR 8[r13], eax
	jmp	.L49
	.p2align 4,,10
	.p2align 3
.L4:
	mov	eax, DWORD PTR PM8XXX_GPIO_BIAS_NP[rip]
	jmp	.L49
.L3:
	mov	rax, QWORD PTR 8[rsp]
	mov	edx, r15d
	lea	rsi, .LC2[rip]
	mov	edi, DWORD PTR [rax]
	xor	eax, eax
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
.L57:
	.cfi_restore_state
	mov	eax, DWORD PTR 32[r13]
	mov	rdi, QWORD PTR 8[rsp]
	mov	edx, 4
	mov	rsi, r13
	lea	ecx, [rax+rax]
	call	pm8xxx_write_bank@PLT
	jmp	.L26
.L56:
	mov	eax, DWORD PTR 24[r13]
	mov	rdi, QWORD PTR 8[rsp]
	mov	edx, 3
	mov	rsi, r13
	lea	ecx, 0[0+rax*4]
	or	ecx, DWORD PTR 4[r13]
	call	pm8xxx_write_bank@PLT
	jmp	.L25
.L55:
	mov	eax, DWORD PTR 0[r13]
	mov	rdi, QWORD PTR 8[rsp]
	mov	edx, 2
	mov	rsi, r13
	lea	ecx, [rax+rax]
	call	pm8xxx_write_bank@PLT
	jmp	.L24
.L54:
	mov	esi, DWORD PTR 28[r13]
	mov	eax, DWORD PTR 12[r13]
	mov	edx, 1
	mov	rdi, QWORD PTR 8[rsp]
	sal	eax, 2
	lea	ecx, [rsi+rsi]
	mov	rsi, r13
	or	ecx, eax
	or	ecx, DWORD PTR 16[r13]
	call	pm8xxx_write_bank@PLT
	jmp	.L23
.L53:
	mov	eax, DWORD PTR 20[r13]
	mov	rdi, QWORD PTR 8[rsp]
	xor	edx, edx
	mov	rsi, r13
	lea	ecx, [rax+rax]
	or	ecx, DWORD PTR PM8XXX_GPIO_MODE_ENABLED[rip]
	call	pm8xxx_write_bank@PLT
	jmp	.L22
.L58:
	mov	edi, 3
	call	BIT@PLT
	mov	ecx, eax
	jmp	.L27
.L2:
	xor	edi, edi
	xor	ebp, ebp
	call	BIT@PLT
	mov	edi, 1
	call	BIT@PLT
	mov	edi, 2
	call	BIT@PLT
	jmp	.L24
.L60:
	lea	rsi, .LC0[rip]
.L51:
	mov	rax, QWORD PTR 8[rsp]
	mov	edi, DWORD PTR [rax]
	xor	eax, eax
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
.L59:
	lea	rsi, .LC1[rip]
	jmp	.L51
	.cfi_endproc
.LFE0:
	.size	pm8xxx_pin_config_set, .-pm8xxx_pin_config_set
	.comm	PMIC_GPIO_STRENGTH_LOW,4,4
	.comm	PM8XXX_GPIO_MODE_OUTPUT,4,4
	.comm	PM8XXX_GPIO_MODE_INPUT,4,4
	.comm	PM8XXX_GPIO_MODE_ENABLED,4,4
	.comm	PM8XXX_GPIO_BIAS_PU_1P5_30,4,4
	.comm	PM8XXX_GPIO_BIAS_PD,4,4
	.comm	PM8XXX_GPIO_BIAS_NP,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pinctrl-ssbi-gpio.c_pm8xxx_pin_config_set.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"invalid pull-up strength\012\000"
	.align	2
.LC1:
	.ascii	"invalid drive strength\012\000"
	.align	2
.LC2:
	.ascii	"unsupported config parameter: %x\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pm8xxx_pin_config_set, %function
pm8xxx_pin_config_set:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r8, r3
	mov	r5, r1
	mov	r4, r2
	bl	pinctrl_dev_get_drvdata
	ldr	r3, [r0, #4]
	cmp	r8, #0
	mov	r9, r0
	ldr	r7, [r3, r5, lsl #2]
	beq	.L2
	mov	r6, #0
	mov	r5, r6
	ldr	fp, .L61
	sub	r4, r4, #4
.L21:
	ldr	r0, [r4, #4]!
	bl	pinconf_to_config_param
	mov	r10, r0
	ldr	r0, [r4]
	bl	pinconf_to_config_argument
	sub	r3, r10, #128
	cmp	r3, #10
	ldrls	pc, [pc, r3, asl #2]
	b	.L3
.L5:
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L4
.L4:
	ldr	r3, .L61+4
.L49:
	mov	r0, #2
	ldr	r3, [r3]
	str	r3, [r7]
.L50:
	bl	BIT
	mov	r3, #0
	mov	r10, r0
	str	r3, [r7, #4]
	mov	r0, #3
	bl	BIT
	orr	r10, r10, r0
	orr	r6, r6, r10
.L17:
	add	r5, r5, #1
	cmp	r8, r5
	bne	.L21
	mov	r0, #0
	bl	BIT
	tst	r0, r6
	bne	.L53
.L22:
	mov	r0, #1
	bl	BIT
	tst	r0, r6
	bne	.L54
.L23:
	mov	r0, #2
	bl	BIT
	tst	r0, r6
	bne	.L55
.L24:
	mov	r0, #3
	bl	BIT
	tst	r0, r6
	bne	.L56
.L25:
	mov	r0, #4
	bl	BIT
	tst	r0, r6
	bne	.L57
.L26:
	mov	r0, #5
	bl	BIT
	ands	r0, r0, r6
	popeq	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
	ldr	r3, [r7, #36]
	cmp	r3, #0
	movne	r3, #0
	beq	.L58
.L27:
	mov	r1, r7
	mov	r0, r9
	mov	r2, #5
	bl	pm8xxx_write_bank
	mov	r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L6:
	mov	r3, #1
	mov	r0, #3
	str	r3, [r7, #4]
	bl	BIT
	orr	r6, r6, r0
	b	.L17
.L7:
	ldr	r3, .L61+8
	b	.L49
.L8:
	ldr	r0, [r7, #8]
.L16:
	str	r0, [r7]
	mov	r0, #2
	b	.L50
.L9:
	mov	r0, #1
	str	r0, [r7, #28]
	bl	BIT
	orr	r6, r6, r0
	b	.L17
.L10:
	mov	r3, #0
	mov	r0, #1
	str	r3, [r7, #28]
	bl	BIT
	orr	r6, r6, r0
	b	.L17
.L11:
	mov	r0, #0
	ldr	r3, .L61+12
	ldr	r3, [r3]
	str	r3, [r7, #12]
.L51:
	bl	BIT
	mov	r10, r0
	mov	r0, #1
	bl	BIT
	orr	r10, r10, r0
	orr	r6, r6, r10
	b	.L17
.L12:
	subs	r0, r0, #0
	movne	r0, #1
	ldr	r3, .L61+16
	str	r0, [r7, #16]
	ldr	r3, [r3]
	mov	r0, #0
	str	r3, [r7, #12]
	b	.L51
.L13:
	str	r0, [r7, #20]
	mov	r0, #0
	bl	BIT
	orr	r6, r6, r0
	b	.L17
.L14:
	ldr	r3, [fp]
	cmp	r3, r0
	bcc	.L59
	str	r0, [r7, #24]
	mov	r0, #3
	bl	BIT
	orr	r6, r6, r0
	b	.L17
.L15:
	ldr	r3, .L61+20
	ldr	r3, [r3]
	cmp	r3, r0
	bcc	.L60
	str	r0, [r7, #8]
	b	.L16
.L57:
	ldr	r3, [r7, #32]
	mov	r2, #4
	mov	r1, r7
	mov	r0, r9
	lsl	r3, r3, #1
	bl	pm8xxx_write_bank
	b	.L26
.L56:
	ldr	r1, [r7, #24]
	ldr	r3, [r7, #4]
	mov	r2, #3
	orr	r3, r3, r1, lsl #2
	mov	r0, r9
	mov	r1, r7
	bl	pm8xxx_write_bank
	b	.L25
.L55:
	ldr	r3, [r7]
	mov	r2, #2
	mov	r1, r7
	mov	r0, r9
	lsl	r3, r3, #1
	bl	pm8xxx_write_bank
	b	.L24
.L54:
	ldr	r3, [r7, #28]
	ldr	r1, [r7, #12]
	ldr	r2, [r7, #16]
	lsl	r3, r3, #1
	orr	r3, r3, r1, lsl #2
	orr	r3, r3, r2
	mov	r1, r7
	mov	r2, #1
	mov	r0, r9
	bl	pm8xxx_write_bank
	b	.L23
.L53:
	ldr	r3, .L61+24
	ldr	r1, [r7, #20]
	ldr	r3, [r3]
	mov	r2, #0
	orr	r3, r3, r1, lsl #1
	mov	r0, r9
	mov	r1, r7
	bl	pm8xxx_write_bank
	b	.L22
.L58:
	mov	r0, #3
	bl	BIT
	mov	r3, r0
	b	.L27
.L2:
	mov	r0, r8
	bl	BIT
	mov	r0, #1
	bl	BIT
	mov	r0, #2
	mov	r6, r8
	bl	BIT
	b	.L24
.L60:
	ldr	r0, [r9]
	ldr	r1, .L61+28
	bl	dev_err
	ldr	r3, .L61+32
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L59:
	ldr	r0, [r9]
	ldr	r1, .L61+36
	bl	dev_err
	ldr	r3, .L61+32
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
	mov	r2, r10
	ldr	r0, [r9]
	ldr	r1, .L61+40
	bl	dev_err
	ldr	r3, .L61+32
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L62:
	.align	2
.L61:
	.word	PMIC_GPIO_STRENGTH_LOW
	.word	PM8XXX_GPIO_BIAS_NP
	.word	PM8XXX_GPIO_BIAS_PD
	.word	PM8XXX_GPIO_MODE_INPUT
	.word	PM8XXX_GPIO_MODE_OUTPUT
	.word	PM8XXX_GPIO_BIAS_PU_1P5_30
	.word	PM8XXX_GPIO_MODE_ENABLED
	.word	.LC0
	.word	EINVAL
	.word	.LC1
	.word	.LC2
	.size	pm8xxx_pin_config_set, .-pm8xxx_pin_config_set
	.comm	PMIC_GPIO_STRENGTH_LOW,4,4
	.comm	PM8XXX_GPIO_MODE_OUTPUT,4,4
	.comm	PM8XXX_GPIO_MODE_INPUT,4,4
	.comm	PM8XXX_GPIO_MODE_ENABLED,4,4
	.comm	PM8XXX_GPIO_BIAS_PU_1P5_30,4,4
	.comm	PM8XXX_GPIO_BIAS_PD,4,4
	.comm	PM8XXX_GPIO_BIAS_NP,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
