	.file	"extr_bnxt.c_bnxt_hwrm_ring_alloc.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Failed to set async event completion ring.\n"
	.text
	.p2align 4
	.type	bnxt_hwrm_ring_alloc, @function
bnxt_hwrm_ring_alloc:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	eax, DWORD PTR [rdi]
	mov	ecx, DWORD PTR BNXT_FLAG_AGG_RINGS[rip]
	mov	r12, QWORD PTR HWRM_RING_ALLOC_NQ[rip]
	test	DWORD PTR BNXT_FLAG_CHIP_P5[rip], eax
	mov	r11d, DWORD PTR 4[rdi]
	cmove	r12, QWORD PTR HWRM_RING_ALLOC_CMPL[rip]
	mov	DWORD PTR 24[rsp], eax
	mov	DWORD PTR 28[rsp], ecx
	mov	QWORD PTR [rsp], r12
	test	r11d, r11d
	jle	.L18
	xor	r14d, r14d
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L7:
	add	r14, 1
	cmp	DWORD PTR 4[rbx], r14d
	jle	.L4
.L8:
	mov	rax, QWORD PTR 56[rbx]
	mov	rbp, QWORD PTR [rax+r14*8]
	mov	rax, QWORD PTR 48[rbx]
	mov	r12, QWORD PTR 16[rbp]
	mov	r13d, DWORD PTR [rax+r12*4]
	mov	edi, r13d
	call	disable_irq_nosync@PLT
	mov	rdx, QWORD PTR [rsp]
	lea	rsi, 16[rbp]
	mov	rcx, r12
	mov	rdi, rbx
	call	hwrm_ring_alloc_send_msg@PLT
	mov	r15d, eax
	test	eax, eax
	jne	.L36
	mov	r8d, DWORD PTR 40[rbp]
	mov	rdx, QWORD PTR [rsp]
	lea	rsi, 12[rbp]
	mov	rcx, r12
	mov	rdi, rbx
	mov	QWORD PTR 8[rsp], rsi
	call	bnxt_set_db@PLT
	mov	rsi, QWORD PTR 8[rsp]
	mov	edx, DWORD PTR 8[rbp]
	mov	rdi, rbx
	call	bnxt_db_nq@PLT
	mov	edi, r13d
	call	enable_irq@PLT
	mov	r10, QWORD PTR 16[rbx]
	mov	esi, DWORD PTR 40[rbp]
	lea	rax, [r14+r14*2]
	lea	rax, [r10+rax*4]
	mov	DWORD PTR 8[rax], esi
	test	r14, r14
	jne	.L7
	mov	rdi, rbx
	call	bnxt_hwrm_set_async_event_cr@PLT
	mov	r15d, eax
	test	eax, eax
	je	.L7
	mov	edi, DWORD PTR 40[rbx]
	lea	rsi, .LC0[rip]
	add	r14, 1
	call	netdev_warn@PLT
	cmp	DWORD PTR 4[rbx], r14d
	jg	.L8
	.p2align 4,,10
	.p2align 3
.L4:
	mov	r9d, DWORD PTR 8[rbx]
	mov	r12, QWORD PTR HWRM_RING_ALLOC_TX[rip]
	test	r9d, r9d
	jle	.L9
	xor	r14d, r14d
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L37:
	mov	r8d, DWORD PTR 32[rbp]
	mov	rcx, r14
	mov	rdx, r12
	mov	rsi, rbp
	mov	rdi, rbx
	add	r14, 1
	call	bnxt_set_db@PLT
	cmp	DWORD PTR 8[rbx], r14d
	jle	.L9
.L11:
	lea	rbp, [r14+r14*2]
	mov	eax, DWORD PTR [rbx]
	sal	rbp, 4
	add	rbp, QWORD PTR 32[rbx]
	test	DWORD PTR BNXT_FLAG_CHIP_P5[rip], eax
	je	.L10
	mov	rax, QWORD PTR 40[rbp]
	mov	rcx, QWORD PTR BNXT_TX_HDL[rip]
	mov	rdi, rbx
	mov	rdx, QWORD PTR HWRM_RING_ALLOC_CMPL[rip]
	mov	rsi, QWORD PTR 48[rax]
	mov	QWORD PTR [rsp], rdx
	mov	r10, QWORD PTR [rsi+rcx*8]
	mov	QWORD PTR 16[r10], rcx
	mov	rcx, QWORD PTR [rax]
	lea	rsi, 8[r10]
	mov	QWORD PTR 16[rsp], r10
	mov	QWORD PTR 8[rsp], rcx
	call	hwrm_ring_alloc_send_msg@PLT
	mov	r15d, eax
	test	eax, eax
	jne	.L1
	mov	r10, QWORD PTR 16[rsp]
	mov	rdx, QWORD PTR [rsp]
	mov	rdi, rbx
	mov	rcx, QWORD PTR 8[rsp]
	lea	r13, 4[r10]
	mov	r8d, DWORD PTR 32[r10]
	mov	rsi, r13
	call	bnxt_set_db@PLT
	mov	r10, QWORD PTR 16[rsp]
	mov	rsi, r13
	mov	rdi, rbx
	mov	edx, DWORD PTR [r10]
	call	bnxt_db_cq@PLT
.L10:
	lea	rsi, 8[rbp]
	mov	rcx, r14
	mov	rdx, r12
	mov	rdi, rbx
	call	hwrm_ring_alloc_send_msg@PLT
	mov	r15d, eax
	test	eax, eax
	je	.L37
.L1:
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r15d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	r8d, DWORD PTR 12[rbx]
	mov	r14, QWORD PTR HWRM_RING_ALLOC_RX[rip]
	test	r8d, r8d
	jle	.L1
	mov	eax, DWORD PTR 24[rsp]
	and	eax, DWORD PTR 28[rsp]
	mov	DWORD PTR [rsp], 0
	xor	ebp, ebp
	mov	DWORD PTR 24[rsp], eax
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L12:
	mov	rsi, QWORD PTR 16[rbx]
	mov	edx, DWORD PTR 80[r13]
	lea	rax, [r12+r12*2]
	lea	rax, [rsi+rax*4]
	mov	DWORD PTR 4[rax], edx
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR BNXT_FLAG_CHIP_P5[rip], eax
	jne	.L38
.L13:
	add	DWORD PTR [rsp], 1
	movsx	rax, DWORD PTR 12[rbx]
	add	rbp, 88
	mov	ecx, DWORD PTR [rsp]
	cmp	eax, ecx
	jle	.L39
.L14:
	mov	r13, QWORD PTR 24[rbx]
	mov	rdx, r14
	mov	rdi, rbx
	add	r13, rbp
	mov	rax, QWORD PTR 48[r13]
	lea	rsi, 56[r13]
	mov	r12, QWORD PTR [rax]
	mov	QWORD PTR 16[rsp], rax
	mov	rcx, r12
	call	hwrm_ring_alloc_send_msg@PLT
	mov	r15d, eax
	test	eax, eax
	jne	.L1
	mov	r8d, DWORD PTR 80[r13]
	lea	rsi, 4[r13]
	mov	rdi, rbx
	mov	rcx, r12
	mov	rdx, r14
	mov	QWORD PTR 8[rsp], rsi
	call	bnxt_set_db@PLT
	mov	edi, DWORD PTR 24[rsp]
	mov	rsi, QWORD PTR 8[rsp]
	test	edi, edi
	jne	.L12
	mov	edx, DWORD PTR 0[r13]
	mov	rdi, rbx
	call	bnxt_db_write@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L38:
	mov	rcx, QWORD PTR 16[rsp]
	mov	rax, QWORD PTR BNXT_RX_HDL[rip]
	mov	rdi, rbx
	mov	rdx, QWORD PTR HWRM_RING_ALLOC_CMPL[rip]
	mov	rsi, QWORD PTR 48[rcx]
	mov	rcx, r12
	mov	QWORD PTR 8[rsp], rdx
	mov	r13, QWORD PTR [rsi+rax*8]
	mov	QWORD PTR 16[r13], rax
	lea	rsi, 8[r13]
	call	hwrm_ring_alloc_send_msg@PLT
	test	eax, eax
	jne	.L20
	mov	rdx, QWORD PTR 8[rsp]
	mov	r8d, DWORD PTR 32[r13]
	lea	rsi, 4[r13]
	mov	rdi, rbx
	mov	rcx, r12
	mov	QWORD PTR 8[rsp], rsi
	call	bnxt_set_db@PLT
	mov	edx, DWORD PTR 0[r13]
	mov	rsi, QWORD PTR 8[rsp]
	mov	rdi, rbx
	call	bnxt_db_cq@PLT
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L36:
	mov	edi, r13d
	call	enable_irq@PLT
	jmp	.L1
.L39:
	mov	ecx, DWORD PTR 24[rsp]
	test	ecx, ecx
	je	.L1
	mov	r14, QWORD PTR HWRM_RING_ALLOC_AGG[rip]
	test	eax, eax
	jle	.L1
	mov	DWORD PTR [rsp], 0
	xor	r12d, r12d
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L40:
	mov	rcx, QWORD PTR 8[rsp]
	mov	r8d, DWORD PTR 40[r13]
	lea	rsi, 12[r13]
	mov	rdx, r14
	mov	rdi, rbx
	mov	QWORD PTR 8[rsp], rsi
	add	r12, 88
	call	bnxt_set_db@PLT
	mov	edx, DWORD PTR 8[r13]
	mov	rsi, QWORD PTR 8[rsp]
	mov	rdi, rbx
	call	bnxt_db_write@PLT
	mov	edx, DWORD PTR 0[r13]
	lea	rsi, 4[r13]
	mov	rdi, rbx
	call	bnxt_db_write@PLT
	mov	rdx, QWORD PTR 16[rbx]
	lea	rax, 0[rbp+rbp*2]
	add	DWORD PTR [rsp], 1
	mov	ecx, DWORD PTR [rsp]
	lea	rax, [rdx+rax*4]
	mov	edx, DWORD PTR 40[r13]
	mov	DWORD PTR [rax], edx
	movsx	rax, DWORD PTR 12[rbx]
	cmp	eax, ecx
	jle	.L1
.L17:
	mov	r13, QWORD PTR 24[rbx]
	mov	rdx, r14
	mov	rdi, rbx
	add	r13, r12
	mov	rbp, QWORD PTR 32[r13]
	lea	rsi, 16[r13]
	lea	rcx, [rax+rbp]
	mov	QWORD PTR 8[rsp], rcx
	call	hwrm_ring_alloc_send_msg@PLT
	test	eax, eax
	je	.L40
.L20:
.L6:
	endbr64
	mov	r15d, eax
	jmp	.L1
.L18:
	xor	r15d, r15d
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	bnxt_hwrm_ring_alloc, .-bnxt_hwrm_ring_alloc
	.comm	HWRM_RING_ALLOC_TX,8,8
	.comm	HWRM_RING_ALLOC_RX,8,8
	.comm	HWRM_RING_ALLOC_NQ,8,8
	.comm	HWRM_RING_ALLOC_CMPL,8,8
	.comm	HWRM_RING_ALLOC_AGG,8,8
	.comm	BNXT_TX_HDL,8,8
	.comm	BNXT_RX_HDL,8,8
	.comm	BNXT_FLAG_CHIP_P5,4,4
	.comm	BNXT_FLAG_AGG_RINGS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_bnxt.c_bnxt_hwrm_ring_alloc.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Failed to set async event completion ring.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bnxt_hwrm_ring_alloc, %function
bnxt_hwrm_ring_alloc:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L44
	ldr	r1, [r0]
	ldr	r2, [r3]
	ldr	r3, .L44+4
	tst	r1, r2
	ldr	r3, [r3]
	sub	sp, sp, #28
	str	r3, [sp, #20]
	ldrne	r3, .L44+8
	ldreq	r3, .L44+12
	mov	r4, r0
	ldr	fp, [r3]
	ldr	r3, [r0, #4]
	str	r1, [sp, #16]
	cmp	r3, #0
	ble	.L18
	mov	r7, #0
	mov	r9, r7
	b	.L8
.L7:
	ldr	r3, [r4, #4]
	add	r7, r7, #4
	cmp	r3, r9
	ble	.L4
.L8:
	ldr	r3, [r4, #36]
	ldr	r2, [r4, #32]
	ldr	r5, [r3, r7]
	ldr	r6, [r5, #12]
	add	r8, r5, #8
	ldr	r10, [r2, r6, lsl #2]
	mov	r0, r10
	bl	disable_irq_nosync
	mov	r3, r6
	mov	r2, fp
	mov	r0, r4
	add	r1, r5, #12
	bl	hwrm_ring_alloc_send_msg
	subs	r3, r0, #0
	str	r3, [sp, #8]
	bne	.L38
	ldr	r2, [r5, #24]
	mov	r3, r6
	mov	r1, r8
	str	r2, [sp]
	mov	r0, r4
	mov	r2, fp
	bl	bnxt_set_db
	mov	r1, r8
	ldr	r2, [r5, #4]
	mov	r0, r4
	bl	bnxt_db_nq
	mov	r0, r10
	bl	enable_irq
	ldr	r2, [r4, #16]
	ldr	r1, [r5, #24]
	add	r3, r7, r7, lsl #1
	cmp	r9, #0
	add	r3, r2, r3
	add	r9, r9, #1
	str	r1, [r3, #8]
	bne	.L7
	mov	r0, r4
	bl	bnxt_hwrm_set_async_event_cr
	subs	r3, r0, #0
	str	r3, [sp, #8]
	beq	.L7
	ldr	r1, .L44+16
	ldr	r0, [r4, #28]
	bl	netdev_warn
	ldr	r3, [r4, #4]
	add	r7, r7, #4
	cmp	r3, r9
	bgt	.L8
.L4:
	ldr	r2, [r4, #8]
	ldr	r3, .L44+20
	cmp	r2, #0
	ldr	r10, [r3]
	ble	.L9
	mov	r8, #0
	ldr	fp, .L44+24
	mov	r7, r8
	b	.L11
.L40:
	ldr	r3, [r5, #16]
	mov	r1, r5
	str	r3, [sp]
	mov	r2, r10
	mov	r3, r7
	mov	r0, r4
	bl	bnxt_set_db
	ldr	r3, [r4, #8]
	add	r7, r7, #1
	cmp	r3, r7
	add	r8, r8, #24
	ble	.L39
.L11:
	ldr	r3, .L44
	ldr	r2, [r4]
	ldr	r3, [r3]
	ldr	r5, [r4, #24]
	tst	r2, r3
	add	r5, r5, r8
	beq	.L10
	ldr	r3, [r5, #20]
	ldr	r1, [fp]
	ldr	r2, [r3, #28]
	ldr	r3, [r3]
	ldr	r6, [r2, r1, lsl #2]
	ldr	r2, .L44+12
	str	r1, [r6, #12]
	ldr	r2, [r2]
	add	r1, r6, #8
	mov	r0, r4
	str	r3, [sp, #12]
	str	r2, [sp, #8]
	bl	hwrm_ring_alloc_send_msg
	subs	r9, r0, #0
	add	r1, r6, #4
	bne	.L35
	ldr	r0, [r6, #20]
	ldr	r2, [sp, #8]
	str	r0, [sp]
	ldr	r3, [sp, #12]
	mov	r0, r4
	str	r1, [sp, #8]
	bl	bnxt_set_db
	mov	r0, r4
	ldr	r2, [r6]
	ldr	r1, [sp, #8]
	bl	bnxt_db_cq
.L10:
	mov	r3, r7
	mov	r2, r10
	mov	r0, r4
	add	r1, r5, #4
	bl	hwrm_ring_alloc_send_msg
	subs	r9, r0, #0
	beq	.L40
.L35:
	str	r9, [sp, #8]
.L1:
	ldr	r0, [sp, #8]
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L39:
	str	r9, [sp, #8]
.L9:
	ldr	r2, [r4, #12]
	ldr	r3, .L44+28
	cmp	r2, #0
	ldr	fp, [r3]
	ble	.L1
	ldr	r3, [sp, #16]
	ldr	r2, [sp, #20]
	mov	r6, #0
	and	r3, r3, r2
	str	r3, [sp, #16]
	b	.L14
.L12:
	ldr	r2, [r4, #16]
	ldr	r3, .L44
	add	r1, r8, r8, lsl #1
	ldr	r0, [r4]
	add	r2, r2, r1, lsl #2
	ldr	r1, [r3]
	ldr	ip, [r5, #48]
	tst	r0, r1
	str	ip, [r2, #4]
	bne	.L41
.L13:
	ldr	r3, [r4, #12]
	cmp	r3, r6
	ble	.L42
.L14:
	ldr	r10, [r4, #20]
	add	r7, r6, r6, lsl #1
	add	r7, r6, r7, lsl #2
	add	r5, r10, r7, lsl #2
	ldr	r9, [r5, #32]
	add	r1, r5, #36
	ldr	r8, [r9]
	mov	r2, fp
	mov	r3, r8
	mov	r0, r4
	bl	hwrm_ring_alloc_send_msg
	subs	r3, r0, #0
	add	r1, r5, #4
	add	r6, r6, #1
	str	r3, [sp, #8]
	bne	.L1
	ldr	r2, [r5, #48]
	mov	r3, r8
	str	r2, [sp]
	mov	r0, r4
	mov	r2, fp
	str	r1, [sp, #12]
	bl	bnxt_set_db
	ldr	r3, [sp, #16]
	ldr	r1, [sp, #12]
	cmp	r3, #0
	bne	.L12
	mov	r0, r4
	ldr	r2, [r10, r7, lsl #2]
	bl	bnxt_db_write
	b	.L12
.L41:
	ldr	r3, .L44+32
	ldr	r2, [r9, #28]
	ldr	r1, [r3]
	ldr	r3, .L44+12
	ldr	r5, [r2, r1, lsl #2]
	ldr	r7, [r3]
	str	r1, [r5, #12]
	mov	r2, r7
	mov	r3, r8
	mov	r0, r4
	add	r1, r5, #8
	bl	hwrm_ring_alloc_send_msg
	cmp	r0, #0
	add	r9, r5, #4
	bne	.L20
	ldr	r1, [r5, #20]
	mov	r2, r7
	str	r1, [sp]
	mov	r3, r8
	mov	r1, r9
	mov	r0, r4
	bl	bnxt_set_db
	mov	r1, r9
	mov	r0, r4
	ldr	r2, [r5]
	bl	bnxt_db_cq
	b	.L13
.L38:
	mov	r0, r10
	bl	enable_irq
	ldr	r0, [sp, #8]
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L42:
	ldr	r2, [sp, #16]
	cmp	r2, #0
	beq	.L1
	ldr	r2, .L44+36
	cmp	r3, #0
	ldr	fp, [r2]
	ble	.L1
	mov	r9, #0
	mov	r8, r9
	b	.L17
.L43:
	ldr	r2, [r5, #28]
	mov	r3, r6
	str	r2, [sp]
	mov	r0, r4
	mov	r2, fp
	str	r1, [sp, #12]
	bl	bnxt_set_db
	ldr	r1, [sp, #12]
	ldr	r2, [r5, #8]
	mov	r0, r4
	bl	bnxt_db_write
	ldr	r2, [r10, r8]
	add	r1, r5, #4
	mov	r0, r4
	bl	bnxt_db_write
	ldr	r3, [r4, #12]
	ldr	r1, [r5, #28]
	ldr	r2, [r4, #16]
	add	r7, r7, r7, lsl #1
	cmp	r3, r9
	add	r8, r8, #52
	str	r1, [r2, r7, lsl #2]
	ble	.L1
.L17:
	ldr	r10, [r4, #20]
	mov	r2, fp
	add	r5, r10, r8
	ldr	r7, [r5, #24]
	add	r1, r5, #16
	add	r6, r3, r7
	mov	r3, r6
	mov	r0, r4
	bl	hwrm_ring_alloc_send_msg
	cmp	r0, #0
	add	r1, r5, #12
	add	r9, r9, #1
	beq	.L43
.L20:
.L6:
	str	r0, [sp, #8]
	b	.L1
.L18:
	mov	r3, #0
	str	r3, [sp, #8]
	b	.L4
.L45:
	.align	2
.L44:
	.word	BNXT_FLAG_CHIP_P5
	.word	BNXT_FLAG_AGG_RINGS
	.word	HWRM_RING_ALLOC_NQ
	.word	HWRM_RING_ALLOC_CMPL
	.word	.LC0
	.word	HWRM_RING_ALLOC_TX
	.word	BNXT_TX_HDL
	.word	HWRM_RING_ALLOC_RX
	.word	BNXT_RX_HDL
	.word	HWRM_RING_ALLOC_AGG
	.size	bnxt_hwrm_ring_alloc, .-bnxt_hwrm_ring_alloc
	.comm	HWRM_RING_ALLOC_TX,4,4
	.comm	HWRM_RING_ALLOC_RX,4,4
	.comm	HWRM_RING_ALLOC_NQ,4,4
	.comm	HWRM_RING_ALLOC_CMPL,4,4
	.comm	HWRM_RING_ALLOC_AGG,4,4
	.comm	BNXT_TX_HDL,4,4
	.comm	BNXT_RX_HDL,4,4
	.comm	BNXT_FLAG_CHIP_P5,4,4
	.comm	BNXT_FLAG_AGG_RINGS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
