	.file	"extr_a5xx_debugfs.c_reset_set.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	reset_set, @function
reset_set:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rdi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR 8[rdi]
	mov	r12, QWORD PTR [rax]
	mov	rdi, r12
	call	to_adreno_gpu@PLT
	mov	rdi, rax
	mov	rbx, rax
	call	to_a5xx_gpu@PLT
	mov	edi, DWORD PTR CAP_SYS_ADMIN[rip]
	mov	rbp, rax
	call	capable@PLT
	test	eax, eax
	jne	.L2
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	rdi, r13
	call	mutex_lock@PLT
	mov	rdx, QWORD PTR ADRENO_FW_PM4[rip]
	mov	rax, QWORD PTR [rbx]
	mov	rdi, QWORD PTR [rax+rdx*8]
	call	release_firmware@PLT
	mov	rax, QWORD PTR [rbx]
	mov	rdx, QWORD PTR ADRENO_FW_PM4[rip]
	mov	QWORD PTR [rax+rdx*8], 0
	mov	rdx, QWORD PTR ADRENO_FW_PFP[rip]
	mov	rdi, QWORD PTR [rax+rdx*8]
	call	release_firmware@PLT
	mov	rax, QWORD PTR [rbx]
	mov	rdx, QWORD PTR ADRENO_FW_PFP[rip]
	mov	QWORD PTR [rax+rdx*8], 0
	mov	rdi, QWORD PTR 8[rbp]
	test	rdi, rdi
	je	.L4
	mov	esi, DWORD PTR 24[r12]
	call	msm_gem_unpin_iova@PLT
	mov	rdi, QWORD PTR 8[rbp]
	call	drm_gem_object_put@PLT
	mov	QWORD PTR 8[rbp], 0
.L4:
	mov	rdi, QWORD PTR 0[rbp]
	test	rdi, rdi
	je	.L5
	mov	esi, DWORD PTR 24[r12]
	call	msm_gem_unpin_iova@PLT
	mov	rdi, QWORD PTR 0[rbp]
	call	drm_gem_object_put@PLT
	mov	QWORD PTR 0[rbp], 0
.L5:
	mov	DWORD PTR [r12], 1
	mov	rdi, QWORD PTR 8[r12]
	call	pm_runtime_get_sync@PLT
	mov	rax, QWORD PTR 16[r12]
	mov	rdi, r12
	call	[QWORD PTR [rax]]
	mov	rdi, QWORD PTR 8[r12]
	call	pm_runtime_put_sync@PLT
	mov	rdi, r13
	call	mutex_unlock@PLT
	add	rsp, 8
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	reset_set, .-reset_set
	.comm	EINVAL,4,4
	.comm	CAP_SYS_ADMIN,4,4
	.comm	ADRENO_FW_PM4,8,8
	.comm	ADRENO_FW_PFP,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_a5xx_debugfs.c_reset_set.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset_set, %function
reset_set:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r0, #4]
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r5, [r3]
	mov	r6, r0
	mov	r0, r5
	bl	to_adreno_gpu
	mov	r7, r0
	bl	to_a5xx_gpu
	ldr	r3, .L14
	mov	r4, r0
	ldr	r0, [r3]
	bl	capable
	cmp	r0, #0
	bne	.L2
	ldr	r3, .L14+4
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L2:
	mov	r8, #0
	ldr	r10, .L14+8
	mov	r0, r6
	bl	mutex_lock
	ldr	r2, [r10]
	ldr	r3, [r7]
	ldr	r9, .L14+12
	ldr	r0, [r3, r2, lsl #2]
	bl	release_firmware
	ldr	r3, [r7]
	ldr	r1, [r10]
	ldr	r2, [r9]
	str	r8, [r3, r1, lsl #2]
	ldr	r0, [r3, r2, lsl #2]
	bl	release_firmware
	ldr	r2, [r9]
	ldr	r3, [r7]
	str	r8, [r3, r2, lsl #2]
	ldr	r0, [r4, #4]
	cmp	r0, r8
	beq	.L4
	ldr	r1, [r5, #12]
	bl	msm_gem_unpin_iova
	ldr	r0, [r4, #4]
	bl	drm_gem_object_put
	str	r8, [r4, #4]
.L4:
	ldr	r0, [r4]
	cmp	r0, #0
	beq	.L5
	ldr	r1, [r5, #12]
	bl	msm_gem_unpin_iova
	ldr	r0, [r4]
	bl	drm_gem_object_put
	mov	r3, #0
	str	r3, [r4]
.L5:
	mov	r3, #1
	ldr	r0, [r5, #4]
	str	r3, [r5]
	bl	pm_runtime_get_sync
	ldr	r3, [r5, #8]
	mov	r0, r5
	ldr	r3, [r3]
	blx	r3
	ldr	r0, [r5, #4]
	bl	pm_runtime_put_sync
	mov	r0, r6
	bl	mutex_unlock
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L15:
	.align	2
.L14:
	.word	CAP_SYS_ADMIN
	.word	EINVAL
	.word	ADRENO_FW_PM4
	.word	ADRENO_FW_PFP
	.size	reset_set, .-reset_set
	.comm	EINVAL,4,4
	.comm	CAP_SYS_ADMIN,4,4
	.comm	ADRENO_FW_PM4,4,4
	.comm	ADRENO_FW_PFP,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
