	.file	"extr_rk_clk_pll.c_rk3328_clk_pll_set_freq.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Set PLL_MODEREG to %x\n"
.LC1:
	.string	"Set PLL_CON0 to %x\n"
.LC2:
	.string	"Set PLL_CON1 to %x\n"
.LC3:
	.string	"Set PLL_CON2 to %x\n"
	.text
	.p2align 4
	.type	rk3328_clk_pll_set_freq, @function
rk3328_clk_pll_set_freq:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	r14, rdx
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, r8
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	sub	rsp, 16
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	call	clknode_get_softc@PLT
	mov	rbx, QWORD PTR 32[rax]
	mov	rbp, rax
	test	rbx, rbx
	je	.L18
.L2:
	mov	rax, QWORD PTR [rbx]
	test	rax, rax
	je	.L5
	mov	rdx, QWORD PTR [r14]
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L19:
	mov	rax, QWORD PTR 32[rbx]
	add	rbx, 32
	test	rax, rax
	je	.L5
.L8:
	cmp	rdx, rax
	jne	.L19
	mov	rdi, r12
	lea	r14, 4[rsp]
	call	DEVICE_LOCK@PLT
	mov	ecx, DWORD PTR 0[rbp]
	mov	esi, DWORD PTR RK3328_CLK_PLL_MODE_MASK[rip]
	lea	rdi, .LC0[rip]
	sal	esi, cl
	mov	ecx, DWORD PTR RK_CLK_PLL_MASK_SHIFT[rip]
	sal	esi, cl
	mov	DWORD PTR 4[rsp], esi
	call	dprintf@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	rsi, QWORD PTR 8[rbp]
	mov	rdi, r12
	call	WRITE4@PLT
	mov	ecx, DWORD PTR RK3328_CLK_PLL_POSTDIV1_SHIFT[rip]
	mov	esi, DWORD PTR 8[rbx]
	lea	rdi, .LC1[rip]
	mov	eax, DWORD PTR 12[rbx]
	sal	esi, cl
	mov	ecx, DWORD PTR RK3328_CLK_PLL_FBDIV_SHIFT[rip]
	sal	eax, cl
	or	esi, eax
	mov	eax, DWORD PTR RK3328_CLK_PLL_POSTDIV1_MASK[rip]
	or	eax, DWORD PTR RK3328_CLK_PLL_FBDIV_MASK[rip]
	sal	eax, 16
	or	esi, eax
	mov	DWORD PTR 4[rsp], esi
	call	dprintf@PLT
	mov	edx, DWORD PTR 4[rsp]
	mov	rsi, QWORD PTR 16[rbp]
	mov	rdi, r12
	call	WRITE4@PLT
	mov	ecx, DWORD PTR RK3328_CLK_PLL_DSMPD_SHIFT[rip]
	mov	esi, DWORD PTR 16[rbx]
	lea	rdi, .LC2[rip]
	mov	eax, DWORD PTR 20[rbx]
	sal	esi, cl
	mov	ecx, DWORD PTR RK3328_CLK_PLL_POSTDIV2_SHIFT[rip]
	sal	eax, cl
	mov	ecx, DWORD PTR RK_CLK_PLL_MASK_SHIFT[rip]
	or	esi, eax
	mov	eax, DWORD PTR RK3328_CLK_PLL_DSMPD_MASK[rip]
	or	eax, DWORD PTR RK3328_CLK_PLL_POSTDIV2_MASK[rip]
	or	eax, DWORD PTR RK3328_CLK_PLL_REFDIV_MASK[rip]
	sal	eax, cl
	mov	ecx, DWORD PTR RK3328_CLK_PLL_REFDIV_SHIFT[rip]
	or	esi, eax
	mov	eax, DWORD PTR 24[rbx]
	sal	eax, cl
	or	esi, eax
	mov	DWORD PTR 4[rsp], esi
	call	dprintf@PLT
	mov	rax, QWORD PTR 16[rbp]
	mov	edx, DWORD PTR 4[rsp]
	mov	rdi, r12
	lea	rsi, 4[rax]
	call	WRITE4@PLT
	mov	rax, QWORD PTR 16[rbp]
	mov	rdx, r14
	mov	rdi, r12
	lea	rsi, 8[rax]
	call	READ4@PLT
	mov	eax, DWORD PTR 28[rbx]
	mov	ecx, DWORD PTR RK3328_CLK_PLL_FRAC_SHIFT[rip]
	lea	rdi, .LC3[rip]
	mov	esi, DWORD PTR RK3328_CLK_PLL_FRAC_MASK[rip]
	mov	ebx, 1000
	sal	eax, cl
	not	esi
	and	esi, DWORD PTR 4[rsp]
	or	esi, eax
	mov	DWORD PTR 4[rsp], esi
	call	dprintf@PLT
	mov	rax, QWORD PTR 16[rbp]
	mov	edx, DWORD PTR 4[rsp]
	mov	rdi, r12
	lea	rsi, 8[rax]
	call	WRITE4@PLT
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L9:
	mov	edi, 1
	call	DELAY@PLT
	sub	ebx, 1
	je	.L11
.L10:
	mov	rax, QWORD PTR 16[rbp]
	mov	rdx, r14
	mov	rdi, r12
	lea	rsi, 4[rax]
	call	READ4@PLT
	mov	eax, DWORD PTR 4[rsp]
	test	DWORD PTR RK3328_CLK_PLL_LOCK_MASK[rip], eax
	jne	.L9
.L11:
	mov	eax, DWORD PTR 0[rbp]
	mov	esi, DWORD PTR RK3328_CLK_PLL_MODE_MASK[rip]
	lea	rdi, .LC0[rip]
	mov	edx, DWORD PTR RK3328_CLK_PLL_MODE_NORMAL[rip]
	mov	ecx, eax
	sal	esi, cl
	mov	ecx, DWORD PTR RK_CLK_PLL_MASK_SHIFT[rip]
	sal	esi, cl
	mov	ecx, eax
	sal	edx, cl
	or	esi, edx
	mov	DWORD PTR 4[rsp], esi
	call	dprintf@PLT
	mov	rsi, QWORD PTR 8[rbp]
	mov	edx, DWORD PTR 4[rsp]
	mov	rdi, r12
	call	WRITE4@PLT
	mov	rdi, r12
	call	DEVICE_UNLOCK@PLT
	mov	DWORD PTR 0[r13], 1
	xor	eax, eax
.L1:
	mov	rcx, QWORD PTR 8[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L20
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	DWORD PTR 0[r13], 1
.L16:
	mov	eax, DWORD PTR EINVAL[rip]
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L18:
	mov	rbx, QWORD PTR 24[rax]
	test	rbx, rbx
	jne	.L2
	jmp	.L16
.L20:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	rk3328_clk_pll_set_freq, .-rk3328_clk_pll_set_freq
	.comm	RK_CLK_PLL_MASK_SHIFT,4,4
	.comm	RK3328_CLK_PLL_REFDIV_SHIFT,4,4
	.comm	RK3328_CLK_PLL_REFDIV_MASK,4,4
	.comm	RK3328_CLK_PLL_POSTDIV2_SHIFT,4,4
	.comm	RK3328_CLK_PLL_POSTDIV2_MASK,4,4
	.comm	RK3328_CLK_PLL_POSTDIV1_SHIFT,4,4
	.comm	RK3328_CLK_PLL_POSTDIV1_MASK,4,4
	.comm	RK3328_CLK_PLL_MODE_NORMAL,4,4
	.comm	RK3328_CLK_PLL_MODE_MASK,4,4
	.comm	RK3328_CLK_PLL_LOCK_MASK,4,4
	.comm	RK3328_CLK_PLL_FRAC_SHIFT,4,4
	.comm	RK3328_CLK_PLL_FRAC_MASK,4,4
	.comm	RK3328_CLK_PLL_FBDIV_SHIFT,4,4
	.comm	RK3328_CLK_PLL_FBDIV_MASK,4,4
	.comm	RK3328_CLK_PLL_DSMPD_SHIFT,4,4
	.comm	RK3328_CLK_PLL_DSMPD_MASK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rk_clk_pll.c_rk3328_clk_pll_set_freq.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Set PLL_MODEREG to %x\012\000"
	.align	2
.LC1:
	.ascii	"Set PLL_CON0 to %x\012\000"
	.align	2
.LC2:
	.ascii	"Set PLL_CON1 to %x\012\000"
	.align	2
.LC3:
	.ascii	"Set PLL_CON2 to %x\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rk3328_clk_pll_set_freq, %function
rk3328_clk_pll_set_freq:
	@ args = 4, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r3, .L20
	sub	sp, sp, #8
	mov	r8, r2
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	mov	r6, r0
	ldr	r7, [sp, #40]
	bl	clknode_get_softc
	ldr	r4, [r0, #16]
	mov	r5, r0
	cmp	r4, #0
	beq	.L17
.L2:
	ldr	r3, [r4]
	cmp	r3, #0
	ldrne	r2, [r8]
	bne	.L8
	b	.L5
.L18:
	ldr	r3, [r4, #28]!
	cmp	r3, #0
	beq	.L5
.L8:
	cmp	r2, r3
	bne	.L18
	ldr	r9, .L20+4
	ldr	r8, .L20+8
	mov	r0, r6
	bl	DEVICE_LOCK
	ldr	r2, [r5]
	ldr	r1, [r9]
	ldr	r3, [r8]
	lsl	r1, r1, r2
	lsl	r1, r1, r3
	ldr	r0, .L20+12
	str	r1, [sp]
	bl	dprintf
	ldr	r2, [sp]
	ldr	r1, [r5, #4]
	mov	r0, r6
	bl	WRITE4
	ldr	r1, .L20+16
	ldr	r2, .L20+20
	ldr	r0, [r1]
	ldr	r3, .L20+24
	ldr	r1, [r4, #8]
	ldr	ip, .L20+28
	ldr	r2, [r2]
	ldr	ip, [ip]
	ldr	r3, [r3]
	lsl	r1, r1, r0
	ldr	r0, [r4, #4]
	orr	r3, r3, ip
	orr	r1, r1, r0, lsl r2
	orr	r1, r1, r3, lsl #16
	ldr	r0, .L20+32
	str	r1, [sp]
	bl	dprintf
	ldr	r2, [sp]
	ldr	r1, [r5, #8]
	mov	r0, r6
	bl	WRITE4
	ldr	r1, .L20+36
	ldr	r0, .L20+40
	ldr	ip, [r1]
	ldr	r2, .L20+44
	ldr	r1, [r4, #16]
	ldr	r3, .L20+48
	ldr	lr, [r0]
	ldr	r2, [r2]
	lsl	r1, r1, ip
	ldr	r0, .L20+52
	ldr	ip, [r4, #12]
	ldr	r3, [r3]
	ldr	r0, [r0]
	orr	r1, r1, ip, lsl r2
	ldr	r2, .L20+56
	ldr	ip, [r8]
	orr	r3, r3, lr
	orr	r3, r3, r0
	ldr	r2, [r2]
	ldr	r0, [r4, #20]
	orr	r1, r1, r3, lsl ip
	orr	r1, r1, r0, lsl r2
	ldr	r0, .L20+60
	str	r1, [sp]
	bl	dprintf
	ldr	r1, [r5, #8]
	ldr	r2, [sp]
	add	r1, r1, #4
	mov	r0, r6
	bl	WRITE4
	ldr	r1, [r5, #8]
	mov	r2, sp
	add	r1, r1, #8
	mov	r0, r6
	bl	READ4
	ldr	r2, .L20+64
	ldr	r3, .L20+68
	ldr	r0, [r2]
	ldr	r1, [sp]
	ldr	r2, [r4, #24]
	ldr	r3, [r3]
	bic	r1, r1, r0
	orr	r1, r1, r2, lsl r3
	ldr	r0, .L20+72
	str	r1, [sp]
	bl	dprintf
	ldr	r1, [r5, #8]
	mov	r0, r6
	ldr	r2, [sp]
	add	r1, r1, #8
	bl	WRITE4
	mov	r4, #1000
	ldr	r10, .L20+76
	b	.L10
.L9:
	mov	r0, #1
	bl	DELAY
	subs	r4, r4, #1
	beq	.L11
.L10:
	ldr	r1, [r5, #8]
	mov	r2, sp
	mov	r0, r6
	add	r1, r1, #4
	bl	READ4
	ldr	r2, [sp]
	ldr	r3, [r10]
	tst	r2, r3
	bne	.L9
.L11:
	ldr	r2, .L20+80
	ldr	r3, [r9]
	ldr	r1, [r2]
	ldr	r2, [r5]
	ldr	r0, [r8]
	lsl	r3, r3, r2
	lsl	r1, r1, r2
	orr	r1, r1, r3, lsl r0
	ldr	r0, .L20+12
	str	r1, [sp]
	bl	dprintf
	ldr	r1, [r5, #4]
	ldr	r2, [sp]
	mov	r0, r6
	bl	WRITE4
	mov	r0, r6
	bl	DEVICE_UNLOCK
	mov	r3, #1
	mov	r0, #0
	str	r3, [r7]
.L1:
	ldr	r3, .L20
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L19
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L5:
	mov	r2, #1
	ldr	r3, .L20+84
	str	r2, [r7]
	ldr	r0, [r3]
	b	.L1
.L17:
	ldr	r4, [r0, #12]
	cmp	r4, #0
	bne	.L2
	ldr	r3, .L20+84
	ldr	r0, [r3]
	b	.L1
.L19:
	bl	__stack_chk_fail
.L21:
	.align	2
.L20:
	.word	.LC4
	.word	RK3328_CLK_PLL_MODE_MASK
	.word	RK_CLK_PLL_MASK_SHIFT
	.word	.LC0
	.word	RK3328_CLK_PLL_FBDIV_SHIFT
	.word	RK3328_CLK_PLL_POSTDIV1_SHIFT
	.word	RK3328_CLK_PLL_POSTDIV1_MASK
	.word	RK3328_CLK_PLL_FBDIV_MASK
	.word	.LC1
	.word	RK3328_CLK_PLL_POSTDIV2_SHIFT
	.word	RK3328_CLK_PLL_POSTDIV2_MASK
	.word	RK3328_CLK_PLL_DSMPD_SHIFT
	.word	RK3328_CLK_PLL_DSMPD_MASK
	.word	RK3328_CLK_PLL_REFDIV_MASK
	.word	RK3328_CLK_PLL_REFDIV_SHIFT
	.word	.LC2
	.word	RK3328_CLK_PLL_FRAC_MASK
	.word	RK3328_CLK_PLL_FRAC_SHIFT
	.word	.LC3
	.word	RK3328_CLK_PLL_LOCK_MASK
	.word	RK3328_CLK_PLL_MODE_NORMAL
	.word	EINVAL
	.size	rk3328_clk_pll_set_freq, .-rk3328_clk_pll_set_freq
	.comm	RK_CLK_PLL_MASK_SHIFT,4,4
	.comm	RK3328_CLK_PLL_REFDIV_SHIFT,4,4
	.comm	RK3328_CLK_PLL_REFDIV_MASK,4,4
	.comm	RK3328_CLK_PLL_POSTDIV2_SHIFT,4,4
	.comm	RK3328_CLK_PLL_POSTDIV2_MASK,4,4
	.comm	RK3328_CLK_PLL_POSTDIV1_SHIFT,4,4
	.comm	RK3328_CLK_PLL_POSTDIV1_MASK,4,4
	.comm	RK3328_CLK_PLL_MODE_NORMAL,4,4
	.comm	RK3328_CLK_PLL_MODE_MASK,4,4
	.comm	RK3328_CLK_PLL_LOCK_MASK,4,4
	.comm	RK3328_CLK_PLL_FRAC_SHIFT,4,4
	.comm	RK3328_CLK_PLL_FRAC_MASK,4,4
	.comm	RK3328_CLK_PLL_FBDIV_SHIFT,4,4
	.comm	RK3328_CLK_PLL_FBDIV_MASK,4,4
	.comm	RK3328_CLK_PLL_DSMPD_SHIFT,4,4
	.comm	RK3328_CLK_PLL_DSMPD_MASK,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
