	.file	"extr_sh2rec.c_generateMOVWL0.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	generateMOVWL0, @function
generateMOVWL0:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	ebp, edi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rsi
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	INSTRUCTION_B@PLT
	mov	edi, ebp
	mov	r12d, eax
	call	INSTRUCTION_C@PLT
	mov	edx, DWORD PTR R10[rip]
	mov	esi, DWORD PTR R_PR[rip]
	mov	rdi, rbx
	mov	r13d, eax
	call	emitSTS@PLT
	mov	ecx, DWORD PTR R0[rip]
	mov	esi, DWORD PTR R9[rip]
	mov	rdi, rbx
	mov	edx, 1
	call	emitMOVLL4@PLT
	mov	ecx, DWORD PTR R4[rip]
	mov	edx, r13d
	mov	rdi, rbx
	mov	esi, DWORD PTR R8[rip]
	call	emitMOVLL4@PLT
	mov	ecx, DWORD PTR R1[rip]
	xor	edx, edx
	mov	rdi, rbx
	mov	esi, DWORD PTR R8[rip]
	call	emitMOVLL4@PLT
	mov	esi, DWORD PTR R0[rip]
	mov	rdi, rbx
	call	emitJSR@PLT
	mov	ecx, DWORD PTR OP_ADD[rip]
	mov	edx, DWORD PTR R4[rip]
	mov	rdi, rbx
	mov	esi, DWORD PTR R1[rip]
	call	emitALU@PLT
	mov	esi, DWORD PTR R0[rip]
	mov	ecx, DWORD PTR OP_EXTSW[rip]
	mov	rdi, rbx
	mov	edx, esi
	call	emitALU@PLT
	mov	edx, DWORD PTR R_PR[rip]
	mov	esi, DWORD PTR R10[rip]
	mov	rdi, rbx
	call	emitLDS@PLT
	mov	ecx, DWORD PTR R8[rip]
	mov	edx, r12d
	mov	rdi, rbx
	mov	esi, DWORD PTR R0[rip]
	call	emitMOVLS4@PLT
	add	DWORD PTR 4[rbx], 1
	add	DWORD PTR [rbx], 2
	add	rsp, 8
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	generateMOVWL0, .-generateMOVWL0
	.comm	R_PR,4,4
	.comm	R9,4,4
	.comm	R8,4,4
	.comm	R4,4,4
	.comm	R10,4,4
	.comm	R1,4,4
	.comm	R0,4,4
	.comm	OP_EXTSW,4,4
	.comm	OP_ADD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sh2rec.c_generateMOVWL0.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	generateMOVWL0, %function
generateMOVWL0:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #12
	mov	r4, r1
	mov	r5, r0
	bl	INSTRUCTION_B
	mov	r7, r0
	mov	r0, r5
	bl	INSTRUCTION_C
	ldr	r8, .L4
	ldr	r9, .L4+4
	ldr	r2, [r8]
	ldr	r1, [r9]
	str	r0, [sp, #4]
	mov	r0, r4
	bl	emitSTS
	ldr	r5, .L4+8
	ldr	r2, .L4+12
	ldr	r6, .L4+16
	ldr	fp, .L4+20
	ldr	r3, [r5]
	ldr	r1, [r2]
	ldr	r10, .L4+24
	mov	r0, r4
	mov	r2, #1
	bl	emitMOVLL4
	ldr	r2, [sp, #4]
	ldr	r3, [fp]
	ldr	r1, [r6]
	mov	r0, r4
	bl	emitMOVLL4
	ldr	r3, [r10]
	mov	r2, #0
	ldr	r1, [r6]
	mov	r0, r4
	bl	emitMOVLL4
	ldr	r1, [r5]
	mov	r0, r4
	bl	emitJSR
	ldr	r3, .L4+28
	ldr	r2, [fp]
	ldr	r1, [r10]
	mov	r0, r4
	ldr	r3, [r3]
	bl	emitALU
	ldr	r2, [r5]
	ldr	r3, .L4+32
	mov	r1, r2
	ldr	r3, [r3]
	mov	r0, r4
	bl	emitALU
	ldr	r2, [r9]
	ldr	r1, [r8]
	mov	r0, r4
	bl	emitLDS
	mov	r2, r7
	ldr	r3, [r6]
	mov	r0, r4
	ldr	r1, [r5]
	bl	emitMOVLS4
	ldr	r2, [r4, #4]
	ldr	r3, [r4]
	add	r2, r2, #1
	add	r3, r3, #2
	str	r2, [r4, #4]
	str	r3, [r4]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
	.align	2
.L4:
	.word	R10
	.word	R_PR
	.word	R0
	.word	R9
	.word	R8
	.word	R4
	.word	R1
	.word	OP_ADD
	.word	OP_EXTSW
	.size	generateMOVWL0, .-generateMOVWL0
	.comm	R_PR,4,4
	.comm	R9,4,4
	.comm	R8,4,4
	.comm	R4,4,4
	.comm	R10,4,4
	.comm	R1,4,4
	.comm	R0,4,4
	.comm	OP_EXTSW,4,4
	.comm	OP_ADD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
