	.file	"extr_ixgbe_x540.c_ixgbe_acquire_swfw_sync_X540.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"ixgbe_acquire_swfw_sync_X540"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"Failed to get NVM access and register semaphore, returning IXGBE_ERR_SWFW_SYNC\n"
	.align 8
.LC2:
	.string	"Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n"
	.align 8
.LC3:
	.string	"Resource not released by other SW, returning IXGBE_ERR_SWFW_SYNC\n"
	.align 8
.LC4:
	.string	"Returning error IXGBE_ERR_SWFW_SYNC\n"
	.text
	.p2align 4
	.globl	ixgbe_acquire_swfw_sync_X540
	.type	ixgbe_acquire_swfw_sync_X540, @function
ixgbe_acquire_swfw_sync_X540:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	lea	rdi, .LC0[rip]
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, esi
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	mov	r12d, DWORD PTR IXGBE_GSSR_NVM_PHY_MASK[rip]
	mov	r15d, DWORD PTR IXGBE_GSSR_I2C_MASK[rip]
	and	r12d, esi
	and	r15d, esi
	call	DEBUGFUNC@PLT
	mov	r14d, r12d
	mov	ecx, r12d
	mov	eax, r12d
	mov	edx, DWORD PTR IXGBE_GSSR_SW_MNG_SM[rip]
	sal	r14d, 5
	and	eax, DWORD PTR IXGBE_GSSR_EEP_SM[rip]
	lea	r13d, 0[0+r15*4]
	cmovne	eax, DWORD PTR IXGBE_GSSR_FLASH_SM[rip]
	or	ecx, edx
	test	edx, ebx
	mov	edx, 1000
	cmovne	r12d, ecx
	or	r13d, r14d
	mov	rcx, QWORD PTR ixgbe_mac_X550[rip]
	mov	r14d, 200
	or	r12d, r15d
	cmp	QWORD PTR 0[rbp], rcx
	cmovge	r14d, edx
	xor	ebx, ebx
	or	r13d, eax
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rdi, rbp
	call	ixgbe_get_swfw_sync_semaphore@PLT
	test	rax, rax
	jne	.L24
	mov	rdi, rbp
	call	IXGBE_SWFW_SYNC_BY_MAC@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	mov	edx, r13d
	or	edx, r12d
	test	edx, eax
	je	.L25
	mov	rdi, rbp
	add	ebx, 1
	call	ixgbe_release_swfw_sync_semaphore@PLT
	mov	edi, 5
	call	msec_delay@PLT
	cmp	r14d, ebx
	jne	.L8
	mov	rdi, rbp
	call	ixgbe_get_swfw_sync_semaphore@PLT
	test	rax, rax
	jne	.L26
	mov	rdi, rbp
	call	IXGBE_SWFW_SYNC_BY_MAC@PLT
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_READ_REG@PLT
	test	r13d, eax
	jne	.L27
	test	r12d, eax
	je	.L11
	mov	esi, DWORD PTR IXGBE_GSSR_EEP_SM[rip]
	or	esi, DWORD PTR IXGBE_GSSR_PHY0_SM[rip]
	or	esi, DWORD PTR IXGBE_GSSR_PHY1_SM[rip]
	or	esi, DWORD PTR IXGBE_GSSR_MAC_CSR_SM[rip]
	or	esi, DWORD PTR IXGBE_GSSR_SW_MNG_SM[rip]
	test	r15d, r15d
	je	.L12
	or	esi, DWORD PTR IXGBE_GSSR_I2C_MASK[rip]
.L12:
	mov	rdi, rbp
	call	ixgbe_release_swfw_sync_X540@PLT
	mov	rdi, rbp
	call	ixgbe_release_swfw_sync_semaphore@PLT
	lea	rdi, .LC3[rip]
	call	DEBUGOUT@PLT
	mov	eax, DWORD PTR IXGBE_ERR_SWFW_SYNC[rip]
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L24:
	lea	rdi, .LC1[rip]
	call	DEBUGOUT@PLT
	mov	eax, DWORD PTR IXGBE_ERR_SWFW_SYNC[rip]
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L25:
	.cfi_restore_state
	mov	rdi, rbp
	or	r12d, eax
	call	IXGBE_SWFW_SYNC_BY_MAC@PLT
	mov	edx, r12d
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	mov	rdi, rbp
	call	ixgbe_release_swfw_sync_semaphore@PLT
	mov	eax, DWORD PTR IXGBE_SUCCESS[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L26:
	.cfi_restore_state
	lea	rdi, .LC2[rip]
	call	DEBUGOUT@PLT
	mov	eax, DWORD PTR IXGBE_ERR_SWFW_SYNC[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
.L11:
	.cfi_restore_state
	mov	rdi, rbp
	call	ixgbe_release_swfw_sync_semaphore@PLT
	lea	rdi, .LC4[rip]
	call	DEBUGOUT@PLT
	mov	eax, DWORD PTR IXGBE_ERR_SWFW_SYNC[rip]
	jmp	.L1
.L27:
	mov	rdi, rbp
	or	r12d, eax
	call	IXGBE_SWFW_SYNC_BY_MAC@PLT
	mov	edx, r12d
	mov	rdi, rbp
	mov	esi, eax
	call	IXGBE_WRITE_REG@PLT
	mov	rdi, rbp
	call	ixgbe_release_swfw_sync_semaphore@PLT
	mov	edi, 5
	call	msec_delay@PLT
	mov	eax, DWORD PTR IXGBE_SUCCESS[rip]
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	ixgbe_acquire_swfw_sync_X540, .-ixgbe_acquire_swfw_sync_X540
	.comm	ixgbe_mac_X550,8,8
	.comm	IXGBE_SUCCESS,4,4
	.comm	IXGBE_GSSR_SW_MNG_SM,4,4
	.comm	IXGBE_GSSR_PHY1_SM,4,4
	.comm	IXGBE_GSSR_PHY0_SM,4,4
	.comm	IXGBE_GSSR_NVM_PHY_MASK,4,4
	.comm	IXGBE_GSSR_MAC_CSR_SM,4,4
	.comm	IXGBE_GSSR_I2C_MASK,4,4
	.comm	IXGBE_GSSR_FLASH_SM,4,4
	.comm	IXGBE_GSSR_EEP_SM,4,4
	.comm	IXGBE_ERR_SWFW_SYNC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ixgbe_x540.c_ixgbe_acquire_swfw_sync_X540.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"ixgbe_acquire_swfw_sync_X540\000"
	.align	2
.LC1:
	.ascii	"Failed to get NVM access and register semaphore, re"
	.ascii	"turning IXGBE_ERR_SWFW_SYNC\012\000"
	.align	2
.LC2:
	.ascii	"Failed to get NVM sempahore and register semaphore "
	.ascii	"while forcefully ignoring FW sempahore bit(s) and s"
	.ascii	"etting SW semaphore bit(s), returning IXGBE_ERR_SWF"
	.ascii	"W_SYNC\012\000"
	.align	2
.LC3:
	.ascii	"Resource not released by other SW, returning IXGBE_"
	.ascii	"ERR_SWFW_SYNC\012\000"
	.align	2
.LC4:
	.ascii	"Returning error IXGBE_ERR_SWFW_SYNC\012\000"
	.text
	.align	2
	.global	ixgbe_acquire_swfw_sync_X540
	.syntax unified
	.arm
	.fpu softvfp
	.type	ixgbe_acquire_swfw_sync_X540, %function
ixgbe_acquire_swfw_sync_X540:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r5, r1
	mov	r4, r0
	ldr	r3, .L30
	ldr	fp, .L30+4
	ldr	r7, [r3]
	ldr	r9, [fp]
	ldr	r10, .L30+8
	sub	sp, sp, #12
	ldr	r0, .L30+12
	and	r7, r7, r1
	and	r9, r9, r1
	bl	DEBUGFUNC
	ldr	r2, [r10]
	ldr	r1, .L30+16
	ands	r2, r7, r2
	ldrne	r2, .L30+20
	ldr	r1, [r1]
	ldrne	r2, [r2]
	tst	r1, r5
	lsl	r3, r7, #5
	orrne	r7, r7, r1
	ldr	r1, .L30+24
	ldr	r6, [r4]
	ldr	r1, [r1]
	mov	r5, #0
	cmp	r6, r1
	movlt	r6, #200
	movge	r6, #1000
	orr	r3, r3, r9, lsl #2
	orr	r3, r2, r3
	orr	r7, r7, r9
	str	r3, [sp, #4]
	orr	r8, r3, r7
.L8:
	mov	r0, r4
	bl	ixgbe_get_swfw_sync_semaphore
	cmp	r0, #0
	add	r5, r5, #1
	bne	.L26
	mov	r0, r4
	bl	IXGBE_SWFW_SYNC_BY_MAC
	mov	r1, r0
	mov	r0, r4
	bl	IXGBE_READ_REG
	tst	r8, r0
	beq	.L27
	mov	r0, r4
	bl	ixgbe_release_swfw_sync_semaphore
	mov	r0, #5
	bl	msec_delay
	cmp	r6, r5
	bne	.L8
	mov	r0, r4
	bl	ixgbe_get_swfw_sync_semaphore
	cmp	r0, #0
	bne	.L28
	mov	r0, r4
	bl	IXGBE_SWFW_SYNC_BY_MAC
	mov	r1, r0
	mov	r0, r4
	bl	IXGBE_READ_REG
	ldr	r3, [sp, #4]
	tst	r3, r0
	bne	.L29
	tst	r7, r0
	beq	.L11
	ldr	r3, .L30+28
	ldr	r1, [r10]
	ldr	r2, [r3]
	ldr	r3, .L30+32
	orr	r1, r1, r2
	ldr	r2, .L30+36
	ldr	r0, [r3]
	ldr	r3, .L30+16
	ldr	r2, [r2]
	ldr	r3, [r3]
	orr	r1, r1, r0
	cmp	r9, #0
	orr	r1, r1, r2
	orr	r1, r1, r3
	ldrne	r3, [fp]
	mov	r0, r4
	orrne	r1, r1, r3
	bl	ixgbe_release_swfw_sync_X540
	mov	r0, r4
	bl	ixgbe_release_swfw_sync_semaphore
	ldr	r0, .L30+40
	bl	DEBUGOUT
	ldr	r3, .L30+44
	ldr	r0, [r3]
	b	.L1
.L26:
	ldr	r0, .L30+48
	bl	DEBUGOUT
	ldr	r3, .L30+44
	ldr	r0, [r3]
.L1:
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L27:
	orr	r7, r7, r0
	mov	r0, r4
	bl	IXGBE_SWFW_SYNC_BY_MAC
	mov	r2, r7
	mov	r1, r0
	mov	r0, r4
	bl	IXGBE_WRITE_REG
	mov	r0, r4
	bl	ixgbe_release_swfw_sync_semaphore
	ldr	r3, .L30+52
	ldr	r0, [r3]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L28:
	ldr	r0, .L30+56
	bl	DEBUGOUT
	ldr	r3, .L30+44
	ldr	r0, [r3]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
	mov	r0, r4
	bl	ixgbe_release_swfw_sync_semaphore
	ldr	r0, .L30+60
	bl	DEBUGOUT
	ldr	r3, .L30+44
	ldr	r0, [r3]
	b	.L1
.L29:
	orr	r7, r7, r0
	mov	r0, r4
	bl	IXGBE_SWFW_SYNC_BY_MAC
	mov	r2, r7
	mov	r1, r0
	mov	r0, r4
	bl	IXGBE_WRITE_REG
	mov	r0, r4
	bl	ixgbe_release_swfw_sync_semaphore
	mov	r0, #5
	bl	msec_delay
	ldr	r3, .L30+52
	ldr	r0, [r3]
	b	.L1
.L31:
	.align	2
.L30:
	.word	IXGBE_GSSR_NVM_PHY_MASK
	.word	IXGBE_GSSR_I2C_MASK
	.word	IXGBE_GSSR_EEP_SM
	.word	.LC0
	.word	IXGBE_GSSR_SW_MNG_SM
	.word	IXGBE_GSSR_FLASH_SM
	.word	ixgbe_mac_X550
	.word	IXGBE_GSSR_PHY0_SM
	.word	IXGBE_GSSR_PHY1_SM
	.word	IXGBE_GSSR_MAC_CSR_SM
	.word	.LC3
	.word	IXGBE_ERR_SWFW_SYNC
	.word	.LC1
	.word	IXGBE_SUCCESS
	.word	.LC2
	.word	.LC4
	.size	ixgbe_acquire_swfw_sync_X540, .-ixgbe_acquire_swfw_sync_X540
	.comm	ixgbe_mac_X550,4,4
	.comm	IXGBE_SUCCESS,4,4
	.comm	IXGBE_GSSR_SW_MNG_SM,4,4
	.comm	IXGBE_GSSR_PHY1_SM,4,4
	.comm	IXGBE_GSSR_PHY0_SM,4,4
	.comm	IXGBE_GSSR_NVM_PHY_MASK,4,4
	.comm	IXGBE_GSSR_MAC_CSR_SM,4,4
	.comm	IXGBE_GSSR_I2C_MASK,4,4
	.comm	IXGBE_GSSR_FLASH_SM,4,4
	.comm	IXGBE_GSSR_EEP_SM,4,4
	.comm	IXGBE_ERR_SWFW_SYNC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
