	.file	"extr_rv740_dpm.c_rv740_populate_smc_acpi_state.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	rv740_populate_smc_acpi_state
	.type	rv740_populate_smc_acpi_state, @function
rv740_populate_smc_acpi_state:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rsi
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	call	rv770_get_pi@PLT
	movdqu	xmm7, XMMWORD PTR 16[rbx]
	mov	rcx, rax
	mov	r14d, DWORD PTR 32[rax]
	mov	ebp, DWORD PTR 36[rax]
	mov	r13d, DWORD PTR 40[rax]
	mov	r15d, DWORD PTR 44[rax]
	mov	eax, DWORD PTR 48[rax]
	mov	rsi, QWORD PTR 24[rcx]
	mov	DWORD PTR 8[rsp], eax
	mov	eax, DWORD PTR 52[rcx]
	mov	DWORD PTR 16[rsp], eax
	mov	eax, DWORD PTR 56[rcx]
	mov	DWORD PTR 20[rsp], eax
	mov	eax, DWORD PTR 60[rcx]
	mov	DWORD PTR 24[rsp], eax
	mov	eax, DWORD PTR 64[rcx]
	movups	XMMWORD PTR [rbx], xmm7
	mov	DWORD PTR 28[rsp], eax
	mov	eax, DWORD PTR PPSMC_SWSTATE_FLAG_DC[rip]
	not	eax
	and	DWORD PTR 8[rbx], eax
	test	rsi, rsi
	je	.L2
	mov	rax, QWORD PTR [rbx]
	mov	rdi, r12
	mov	QWORD PTR 32[rsp], rcx
	lea	rdx, 100[rax]
	call	rv770_populate_vddc_value@PLT
	mov	rcx, QWORD PTR 32[rsp]
	cmp	QWORD PTR 16[rcx], 0
	jne	.L3
	mov	ecx, DWORD PTR 8[rcx]
	xor	edx, edx
.L4:
	mov	rax, QWORD PTR [rbx]
	mov	DWORD PTR 96[rax], edx
	mov	DWORD PTR 104[rax], ecx
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rax, QWORD PTR [rbx]
	mov	rsi, QWORD PTR [rcx]
	mov	rdi, r12
	lea	rdx, 100[rax]
	call	rv770_populate_vddc_value@PLT
	mov	rax, QWORD PTR [rbx]
	mov	DWORD PTR 96[rax], 0
.L5:
	mov	r10d, DWORD PTR BIAS_GEN_PDNB[rip]
	mov	r11d, ebp
	or	r10d, DWORD PTR RESET_EN[rip]
	mov	edi, 4
	or	r11d, r10d
	mov	ebp, DWORD PTR SCLK_MUX_SEL_MASK[rip]
	or	r10d, DWORD PTR BYPASS[rip]
	or	r10d, r15d
	mov	edx, DWORD PTR SPLL_RESET[rip]
	mov	r9d, DWORD PTR MRDCKA0_RESET[rip]
	mov	DWORD PTR 44[rsp], r11d
	or	r9d, DWORD PTR MRDCKA1_RESET[rip]
	or	edx, DWORD PTR SPLL_SLEEP[rip]
	not	ebp
	mov	DWORD PTR 40[rsp], r10d
	or	r9d, DWORD PTR MRDCKB0_RESET[rip]
	or	edx, DWORD PTR SPLL_BYPASS_EN[rip]
	or	r9d, DWORD PTR MRDCKB1_RESET[rip]
	or	edx, DWORD PTR 8[rsp]
	or	r9d, DWORD PTR MRDCKC0_RESET[rip]
	or	r9d, DWORD PTR MRDCKC1_RESET[rip]
	or	r9d, DWORD PTR MRDCKD0_RESET[rip]
	or	r9d, DWORD PTR MRDCKD1_RESET[rip]
	or	r9d, DWORD PTR 24[rsp]
	and	ebp, DWORD PTR 16[rsp]
	mov	DWORD PTR 24[rsp], edx
	mov	DWORD PTR 32[rsp], r9d
	mov	r15d, DWORD PTR MRDCKA0_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKA1_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKB0_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKB1_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKC0_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKC1_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKD0_BYPASS[rip]
	or	r15d, DWORD PTR MRDCKD1_BYPASS[rip]
	or	r15d, DWORD PTR 28[rsp]
	call	SCLK_MUX_SEL@PLT
	mov	rcx, QWORD PTR [rbx]
	mov	edi, r14d
	or	ebp, eax
	mov	QWORD PTR 8[rsp], rcx
	call	cpu_to_be32@PLT
	mov	rcx, QWORD PTR 8[rsp]
	mov	r11d, DWORD PTR 44[rsp]
	mov	r14, QWORD PTR [rbx]
	mov	QWORD PTR 88[rcx], rax
	mov	edi, r11d
	call	cpu_to_be32@PLT
	mov	edi, r13d
	mov	QWORD PTR 80[r14], rax
	mov	r14, QWORD PTR [rbx]
	call	cpu_to_be32@PLT
	mov	r10d, DWORD PTR 40[rsp]
	mov	r13, QWORD PTR [rbx]
	mov	QWORD PTR 72[r14], rax
	mov	edi, r10d
	call	cpu_to_be32@PLT
	mov	r9d, DWORD PTR 32[rsp]
	mov	QWORD PTR 64[r13], rax
	mov	r13, QWORD PTR [rbx]
	mov	edi, r9d
	call	cpu_to_be32@PLT
	mov	edi, r15d
	mov	QWORD PTR 56[r13], rax
	mov	r13, QWORD PTR [rbx]
	call	cpu_to_be32@PLT
	mov	edx, DWORD PTR 24[rsp]
	mov	QWORD PTR 48[r13], rax
	mov	r13, QWORD PTR [rbx]
	mov	edi, edx
	mov	QWORD PTR 40[r13], 0
	call	cpu_to_be32@PLT
	mov	edi, ebp
	mov	QWORD PTR 32[r13], rax
	mov	r13, QWORD PTR [rbx]
	call	cpu_to_be32@PLT
	mov	edi, DWORD PTR 20[rsp]
	mov	rbp, QWORD PTR [rbx]
	mov	QWORD PTR 24[r13], rax
	call	cpu_to_be32@PLT
	mov	rdx, QWORD PTR [rbx]
	mov	rdi, r12
	xor	esi, esi
	mov	QWORD PTR 16[rbp], rax
	movdqu	xmm4, XMMWORD PTR 32[rdx]
	movdqu	xmm5, XMMWORD PTR 16[rdx]
	mov	QWORD PTR 8[rdx], 0
	movdqu	xmm3, XMMWORD PTR 48[rdx]
	movdqu	xmm6, XMMWORD PTR [rdx]
	movdqu	xmm2, XMMWORD PTR 64[rdx]
	movdqu	xmm1, XMMWORD PTR 80[rdx]
	movups	XMMWORD PTR 128[rdx], xmm5
	movdqu	xmm0, XMMWORD PTR 96[rdx]
	movups	XMMWORD PTR 112[rdx], xmm6
	movups	XMMWORD PTR 144[rdx], xmm4
	movups	XMMWORD PTR 160[rdx], xmm3
	movups	XMMWORD PTR 176[rdx], xmm2
	movups	XMMWORD PTR 192[rdx], xmm1
	movups	XMMWORD PTR 208[rdx], xmm0
	movups	XMMWORD PTR 224[rdx], xmm6
	movups	XMMWORD PTR 240[rdx], xmm5
	movups	XMMWORD PTR 256[rdx], xmm4
	movups	XMMWORD PTR 272[rdx], xmm3
	movups	XMMWORD PTR 288[rdx], xmm2
	movups	XMMWORD PTR 304[rdx], xmm1
	movups	XMMWORD PTR 320[rdx], xmm0
	call	rv770_populate_mvdd_value@PLT
	add	rsp, 56
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	edx, DWORD PTR 8[rcx]
	mov	ecx, edx
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	rv740_populate_smc_acpi_state, .-rv740_populate_smc_acpi_state
	.comm	SPLL_SLEEP,4,4
	.comm	SPLL_RESET,4,4
	.comm	SPLL_BYPASS_EN,4,4
	.comm	SCLK_MUX_SEL_MASK,4,4
	.comm	RESET_EN,4,4
	.comm	PPSMC_SWSTATE_FLAG_DC,4,4
	.comm	MRDCKD1_RESET,4,4
	.comm	MRDCKD1_BYPASS,4,4
	.comm	MRDCKD0_RESET,4,4
	.comm	MRDCKD0_BYPASS,4,4
	.comm	MRDCKC1_RESET,4,4
	.comm	MRDCKC1_BYPASS,4,4
	.comm	MRDCKC0_RESET,4,4
	.comm	MRDCKC0_BYPASS,4,4
	.comm	MRDCKB1_RESET,4,4
	.comm	MRDCKB1_BYPASS,4,4
	.comm	MRDCKB0_RESET,4,4
	.comm	MRDCKB0_BYPASS,4,4
	.comm	MRDCKA1_RESET,4,4
	.comm	MRDCKA1_BYPASS,4,4
	.comm	MRDCKA0_RESET,4,4
	.comm	MRDCKA0_BYPASS,4,4
	.comm	BYPASS,4,4
	.comm	BIAS_GEN_PDNB,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rv740_dpm.c_rv740_populate_smc_acpi_state.c"
	.text
	.align	2
	.global	rv740_populate_smc_acpi_state
	.syntax unified
	.arm
	.fpu softvfp
	.type	rv740_populate_smc_acpi_state, %function
rv740_populate_smc_acpi_state:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #28
	mov	r4, r1
	mov	r6, r0
	bl	rv770_get_pi
	mov	r5, r0
	ldr	r3, .L8
	ldr	r7, [r0, #12]
	ldr	r2, [r3]
	ldr	r3, [r5, #20]
	ldr	r1, [r4, #12]
	str	r3, [sp, #4]
	ldr	r3, [r5, #28]
	ldr	r0, [r4, #8]
	str	r3, [sp, #8]
	ldr	r3, [r5, #32]
	bic	r2, r1, r2
	str	r3, [sp, #12]
	ldr	r3, [r5, #36]
	cmp	r7, #0
	str	r3, [sp, #16]
	ldr	r3, [r5, #44]
	ldr	r10, [r5, #16]
	ldr	r9, [r5, #24]
	ldr	r8, [r5, #40]
	ldr	fp, [r5, #48]
	str	r3, [sp, #20]
	stm	r4, {r0, r1}
	str	r2, [r4, #4]
	beq	.L2
	add	r2, r0, #52
	mov	r1, r7
	mov	r0, r6
	bl	rv770_populate_vddc_value
	ldr	r2, [r5, #8]
	ldr	r1, [r4]
	cmp	r2, #0
	ldrne	r2, [r5, #4]
	ldreq	r0, [r5, #4]
	movne	r0, r2
	ldr	r3, [sp, #20]
	str	r2, [r1, #48]
	str	r0, [r1, #56]
.L5:
	ldr	ip, .L8+4
	ldr	r0, .L8+8
	ldr	r5, [ip]
	ldr	r0, [r0]
	ldr	r1, .L8+12
	ldr	r2, .L8+16
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r5, r5, r0
	ldr	r0, .L8+20
	orr	r1, r1, r2
	ldr	r0, [r0]
	ldr	r2, .L8+24
	orr	r5, r5, r0
	ldr	r2, [r2]
	ldr	r0, .L8+28
	orr	r1, r1, r2
	ldr	r0, [r0]
	ldr	r2, .L8+32
	orr	r5, r5, r0
	ldr	r2, [r2]
	ldr	r0, .L8+36
	orr	r1, r1, r2
	ldr	r0, [r0]
	ldr	r2, .L8+40
	orr	r5, r5, r0
	ldr	r2, [r2]
	ldr	r0, .L8+44
	orr	r1, r1, r2
	ldr	r0, [r0]
	ldr	r2, .L8+48
	orr	r5, r5, r0
	ldr	r2, [r2]
	ldr	r0, .L8+52
	orr	r1, r1, r2
	ldr	ip, [r0]
	ldr	r2, .L8+56
	orr	r5, r5, ip
	ldr	r2, [r2]
	ldr	ip, .L8+60
	orr	r1, r1, r2
	ldr	ip, [ip]
	ldr	r2, .L8+64
	ldr	r0, .L8+68
	ldr	lr, .L8+72
	ldr	r0, [r0]
	orr	r5, r5, ip
	ldr	ip, [r2]
	ldr	r2, .L8+76
	orr	r0, r0, ip
	orr	r5, r5, r3
	ldr	ip, [r2]
	ldr	r3, [lr]
	ldr	r2, .L8+80
	orr	ip, ip, r3
	ldr	r2, [r2]
	ldr	r3, .L8+84
	orr	r1, r1, r2
	ldr	r2, [r3]
	ldr	r3, .L8+88
	orr	r2, r0, r2
	ldr	r3, [r3]
	orr	fp, r1, fp
	orr	r3, ip, r3
	ldr	ip, [sp, #4]
	ldr	r1, .L8+92
	orr	r7, r0, ip
	ldr	r0, [sp, #8]
	ldr	r1, [r1]
	orr	r2, r2, r0
	str	r2, [sp, #20]
	ldr	r2, [sp, #12]
	mov	r0, #4
	orr	r3, r3, r2
	str	r3, [sp, #8]
	ldr	r3, [sp, #16]
	bic	r1, r3, r1
	str	r1, [sp, #4]
	bl	SCLK_MUX_SEL
	mov	ip, r0
	ldr	r1, [sp, #4]
	mov	r0, r10
	orr	r10, r1, ip
	ldr	r1, [r4]
	str	r1, [sp, #4]
	bl	cpu_to_be32
	mov	ip, r0
	ldr	r1, [sp, #4]
	mov	r0, r7
	str	ip, [r1, #44]
	ldr	r7, [r4]
	bl	cpu_to_be32
	mov	r1, r0
	mov	r0, r9
	str	r1, [r7, #40]
	ldr	r7, [r4]
	bl	cpu_to_be32
	mov	r1, r0
	ldr	r2, [sp, #20]
	str	r1, [r7, #36]
	mov	r0, r2
	ldr	r7, [r4]
	bl	cpu_to_be32
	mov	r2, r0
	mov	r0, r5
	str	r2, [r7, #32]
	ldr	r5, [r4]
	bl	cpu_to_be32
	mov	r2, r0
	mov	r0, fp
	str	r2, [r5, #28]
	ldr	r9, [r4]
	bl	cpu_to_be32
	mov	r5, #0
	mov	r2, r0
	ldr	r7, [r4]
	ldr	r3, [sp, #8]
	str	r2, [r9, #24]
	mov	r0, r3
	str	r5, [r7, #20]
	bl	cpu_to_be32
	mov	r3, r0
	mov	r0, r10
	str	r3, [r7, #16]
	ldr	r7, [r4]
	bl	cpu_to_be32
	mov	r3, r0
	mov	r0, r8
	str	r3, [r7, #12]
	ldr	r7, [r4]
	bl	cpu_to_be32
	ldr	r8, [r4]
	str	r0, [r7, #8]
	mov	ip, r8
	mov	r7, r8
	str	r5, [r8, #4]
	add	r4, r8, #60
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	r4!, {r0, r1, r2, r3}
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	r4!, {r0, r1, r2, r3}
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	r4!, {r0, r1, r2, r3}
	add	lr, r8, #120
	ldm	ip, {r0, r1, r2}
	stm	r4, {r0, r1, r2}
	ldmia	r7!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldmia	r7!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldmia	r7!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1, r2}
	stm	lr, {r0, r1, r2}
	mov	r2, r8
	mov	r0, r6
	mov	r1, r5
	bl	rv770_populate_mvdd_value
	mov	r0, r5
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	add	r2, r0, #52
	ldr	r1, [r5]
	mov	r0, r6
	bl	rv770_populate_vddc_value
	ldr	r2, [r4]
	ldr	r3, [sp, #20]
	str	r7, [r2, #48]
	b	.L5
.L9:
	.align	2
.L8:
	.word	PPSMC_SWSTATE_FLAG_DC
	.word	MRDCKA0_RESET
	.word	MRDCKA1_RESET
	.word	MRDCKA0_BYPASS
	.word	MRDCKA1_BYPASS
	.word	MRDCKB0_RESET
	.word	MRDCKB0_BYPASS
	.word	MRDCKB1_RESET
	.word	MRDCKB1_BYPASS
	.word	MRDCKC0_RESET
	.word	MRDCKC0_BYPASS
	.word	MRDCKC1_RESET
	.word	MRDCKC1_BYPASS
	.word	MRDCKD0_RESET
	.word	MRDCKD0_BYPASS
	.word	MRDCKD1_RESET
	.word	RESET_EN
	.word	BIAS_GEN_PDNB
	.word	SPLL_SLEEP
	.word	SPLL_RESET
	.word	MRDCKD1_BYPASS
	.word	BYPASS
	.word	SPLL_BYPASS_EN
	.word	SCLK_MUX_SEL_MASK
	.size	rv740_populate_smc_acpi_state, .-rv740_populate_smc_acpi_state
	.comm	SPLL_SLEEP,4,4
	.comm	SPLL_RESET,4,4
	.comm	SPLL_BYPASS_EN,4,4
	.comm	SCLK_MUX_SEL_MASK,4,4
	.comm	RESET_EN,4,4
	.comm	PPSMC_SWSTATE_FLAG_DC,4,4
	.comm	MRDCKD1_RESET,4,4
	.comm	MRDCKD1_BYPASS,4,4
	.comm	MRDCKD0_RESET,4,4
	.comm	MRDCKD0_BYPASS,4,4
	.comm	MRDCKC1_RESET,4,4
	.comm	MRDCKC1_BYPASS,4,4
	.comm	MRDCKC0_RESET,4,4
	.comm	MRDCKC0_BYPASS,4,4
	.comm	MRDCKB1_RESET,4,4
	.comm	MRDCKB1_BYPASS,4,4
	.comm	MRDCKB0_RESET,4,4
	.comm	MRDCKB0_BYPASS,4,4
	.comm	MRDCKA1_RESET,4,4
	.comm	MRDCKA1_BYPASS,4,4
	.comm	MRDCKA0_RESET,4,4
	.comm	MRDCKA0_BYPASS,4,4
	.comm	BYPASS,4,4
	.comm	BIAS_GEN_PDNB,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
