	.file	"extr_arcompact-dis.c_arcAnalyzeInstr.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	arcAnalyzeInstr
	.type	arcAnalyzeInstr, @function
arcAnalyzeInstr:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rsi
	xor	esi, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 104
	.cfi_def_cfa_offset 160
	mov	r15, QWORD PTR [rdx]
	mov	edx, 40
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 88[rsp], rax
	xor	eax, eax
	lea	r13, 16[rsp]
	mov	rax, QWORD PTR BFD_ENDIAN_LITTLE[rip]
	lea	r14, 64[rsp]
	mov	rdi, r13
	mov	QWORD PTR 8[rsp], rax
	call	memset@PLT
	mov	rcx, rbx
	mov	edx, 2
	mov	rsi, r14
	mov	rdi, rbp
	call	[QWORD PTR 8[rbx]]
	test	eax, eax
	jne	.L21
	mov	rcx, QWORD PTR 8[rsp]
	xor	eax, eax
	mov	r9, QWORD PTR 8[rbx]
	lea	rdi, 2[rbp]
	cmp	r15, rcx
	sete	al
	mov	eax, DWORD PTR 64[rsp+rax*4]
	mov	edx, eax
	and	edx, 248
	cmp	edx, 56
	jle	.L4
	cmp	edx, 72
	je	.L4
	xor	edx, edx
	cmp	r15, rcx
	mov	DWORD PTR 16[rsp], 2
	mov	rcx, rbx
	setne	dl
	sal	eax, 8
	mov	rsi, r14
	or	eax, DWORD PTR 64[rsp+rdx*4]
	mov	rdx, QWORD PTR 24[rsp]
	mov	DWORD PTR [rdx], eax
	mov	edx, 4
	call	r9
	mov	rax, QWORD PTR BFD_ENDIAN_LITTLE[rip]
	mov	rdi, r14
	cmp	QWORD PTR [rbx], rax
	je	.L19
.L10:
	call	bfd_getb32@PLT
	mov	rdx, QWORD PTR 24[rsp]
	mov	DWORD PTR 4[rdx], eax
.L6:
	mov	eax, DWORD PTR _coreRegName[rip]
	mov	rdx, rbx
	mov	rsi, r13
	mov	rdi, rbp
	mov	QWORD PTR 48[rsp], r13
	mov	DWORD PTR 44[rsp], eax
	mov	eax, DWORD PTR _auxRegName[rip]
	mov	DWORD PTR 40[rsp], eax
	mov	eax, DWORD PTR _condCodeName[rip]
	mov	DWORD PTR 36[rsp], eax
	mov	eax, DWORD PTR _instName[rip]
	mov	DWORD PTR 32[rsp], eax
	call	dsmOneArcInst@PLT
	movdqa	xmm0, XMMWORD PTR 16[rsp]
	movdqa	xmm1, XMMWORD PTR 32[rsp]
	mov	DWORD PTR 16[rbx], eax
	mov	rax, QWORD PTR 48[rsp]
	movups	XMMWORD PTR [r12], xmm0
	mov	QWORD PTR 32[r12], rax
	movups	XMMWORD PTR 16[r12], xmm1
.L1:
	mov	rax, QWORD PTR 88[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L22
	add	rsp, 104
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r12
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	mov	QWORD PTR 8[rsp], rdi
	lea	rsi, 72[rsp]
	mov	rcx, rbx
	mov	edx, 2
	mov	DWORD PTR 16[rsp], 4
	call	r9
	mov	rdi, QWORD PTR 8[rsp]
	test	eax, eax
	jne	.L23
	mov	rax, QWORD PTR BFD_ENDIAN_LITTLE[rip]
	mov	rdi, r14
	cmp	QWORD PTR [rbx], rax
	je	.L24
	call	bfd_getb32@PLT
	mov	rdx, QWORD PTR 24[rsp]
	mov	DWORD PTR [rdx], eax
.L9:
	lea	rdi, 4[rbp]
	mov	rcx, rbx
	mov	edx, 4
	mov	rsi, r14
	call	[QWORD PTR 8[rbx]]
	mov	rax, QWORD PTR BFD_ENDIAN_LITTLE[rip]
	mov	rdi, r14
	cmp	QWORD PTR [rbx], rax
	jne	.L10
.L19:
	call	bfd_getl32@PLT
	mov	rdx, QWORD PTR 24[rsp]
	mov	DWORD PTR 4[rdx], eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L21:
	mov	rdx, rbx
	mov	rsi, rbp
	mov	edi, eax
	call	[QWORD PTR 24[rbx]]
	mov	DWORD PTR 16[rsp], -1
	movdqa	xmm3, XMMWORD PTR 32[rsp]
	movdqa	xmm2, XMMWORD PTR 16[rsp]
	mov	rax, QWORD PTR 48[rsp]
	movups	XMMWORD PTR 16[r12], xmm3
	mov	QWORD PTR 32[r12], rax
	movups	XMMWORD PTR [r12], xmm2
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L24:
	call	bfd_getl32@PLT
	mov	rdx, QWORD PTR 24[rsp]
	mov	DWORD PTR [rdx], eax
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L23:
	mov	rsi, rdi
	mov	rdx, rbx
	mov	edi, eax
	call	[QWORD PTR 24[rbx]]
	mov	DWORD PTR 16[rsp], -1
	movdqa	xmm5, XMMWORD PTR 32[rsp]
	movdqa	xmm4, XMMWORD PTR 16[rsp]
	mov	rax, QWORD PTR 48[rsp]
	movups	XMMWORD PTR 16[r12], xmm5
	mov	QWORD PTR 32[r12], rax
	movups	XMMWORD PTR [r12], xmm4
	jmp	.L1
.L22:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	arcAnalyzeInstr, .-arcAnalyzeInstr
	.comm	_instName,4,4
	.comm	_coreRegName,4,4
	.comm	_condCodeName,4,4
	.comm	_auxRegName,4,4
	.comm	BFD_ENDIAN_LITTLE,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_arcompact-dis.c_arcAnalyzeInstr.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	arcAnalyzeInstr
	.syntax unified
	.arm
	.fpu softvfp
	.type	arcAnalyzeInstr, %function
arcAnalyzeInstr:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r2
	mov	r2, #0
	sub	sp, sp, #52
	ldr	ip, .L22
	ldr	r8, .L22+4
	str	r2, [sp]
	str	r2, [sp, #4]
	str	r2, [sp, #8]
	str	r2, [sp, #12]
	str	r2, [sp, #16]
	str	r2, [sp, #20]
	str	r2, [sp, #24]
	mov	r5, r1
	mov	r6, r0
	mov	r3, r4
	mov	r0, r1
	mov	r2, #2
	add	r1, sp, #28
	ldr	r9, [r4, #4]
	ldr	ip, [ip]
	str	ip, [sp, #44]
	mov	ip,#0
	ldr	r7, [r4]
	ldr	fp, [r8]
	blx	r9
	cmp	r0, #0
	movne	r1, r5
	bne	.L14
	sub	r3, r7, fp
	clz	r3, r3
	add	r2, sp, #48
	lsr	r3, r3, #5
	add	r3, r2, r3, lsl #2
	ldr	r2, [r3, #-20]
	ldr	r10, [r4, #4]
	and	r3, r2, #248
	cmp	r3, #72
	cmpne	r3, #56
	add	r9, r5, #2
	ble	.L4
	subs	r7, r7, fp
	mov	ip, #2
	movne	r7, #1
	add	r3, sp, #48
	add	r7, r3, r7, lsl ip
	ldr	r3, [r7, #-20]
	ldr	r1, [sp, #4]
	orr	r2, r3, r2, lsl #8
	str	ip, [sp]
	mov	r0, r9
	str	r2, [r1]
	mov	r3, r4
	mov	r2, #4
	add	r1, sp, #28
	blx	r10
.L16:
	ldr	r3, [r8]
	ldr	r2, [r4]
	add	r0, sp, #28
	cmp	r2, r3
	beq	.L18
	bl	bfd_getb32
	ldr	r3, [sp, #4]
	str	r0, [r3, #4]
.L6:
	ldr	r2, .L22+8
	ldr	r1, .L22+12
	ldr	r0, .L22+16
	ldr	r3, .L22+20
	ldr	r2, [r2]
	ldr	r1, [r1]
	ldr	ip, [r0]
	ldr	r3, [r3]
	mov	r0, r5
	str	r2, [sp, #20]
	str	r1, [sp, #16]
	mov	r2, r4
	mov	r1, sp
	str	ip, [sp, #12]
	str	r3, [sp, #8]
	str	sp, [sp, #24]
	bl	dsmOneArcInst
	mov	ip, sp
	mov	lr, r6
	mov	r5, r0
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1, r2}
	stm	lr, {r0, r1, r2}
	str	r5, [r4, #8]
.L1:
	ldr	r3, .L22
	ldr	r2, [r3]
	ldr	r3, [sp, #44]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L19
	mov	r0, r6
	add	sp, sp, #52
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L4:
	mov	r2, #4
	mov	r3, r4
	str	r2, [sp]
	mov	r0, r9
	mov	r2, #2
	add	r1, sp, #36
	blx	r10
	cmp	r0, #0
	bne	.L20
	ldr	r2, [r4]
	ldr	r3, [r8]
	add	r0, sp, #28
	cmp	r2, r3
	beq	.L21
	bl	bfd_getb32
	ldr	r3, [sp, #4]
	str	r0, [r3]
.L9:
	mov	r2, #4
	mov	r3, r4
	ldr	r7, [r4, #4]
	add	r1, sp, #28
	add	r0, r5, r2
	blx	r7
	b	.L16
.L20:
	mov	r1, r9
.L14:
	mov	r2, r4
	ldr	r3, [r4, #12]
	blx	r3
	mvn	r3, #0
	mov	lr, sp
	mov	ip, r6
	str	r3, [sp]
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1, r2}
	stm	ip, {r0, r1, r2}
	b	.L1
.L21:
	bl	bfd_getl32
	ldr	r3, [sp, #4]
	str	r0, [r3]
	b	.L9
.L18:
	bl	bfd_getl32
	ldr	r3, [sp, #4]
	str	r0, [r3, #4]
	b	.L6
.L19:
	bl	__stack_chk_fail
.L23:
	.align	2
.L22:
	.word	.LC0
	.word	BFD_ENDIAN_LITTLE
	.word	_coreRegName
	.word	_auxRegName
	.word	_condCodeName
	.word	_instName
	.size	arcAnalyzeInstr, .-arcAnalyzeInstr
	.comm	_instName,4,4
	.comm	_coreRegName,4,4
	.comm	_condCodeName,4,4
	.comm	_auxRegName,4,4
	.comm	BFD_ENDIAN_LITTLE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
