	.file	"extr_savagefb_driver.c_savage_set_default_par.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	savage_set_default_par, @function
savage_set_default_par:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	rdx, rdi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12, rdi
	mov	edi, 980
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rsi
	mov	esi, 18488
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	vga_out16@PLT
	mov	rdx, r12
	mov	esi, 41017
	mov	edi, 980
	call	vga_out16@PLT
	mov	rdx, r12
	mov	esi, 1544
	mov	edi, 964
	call	vga_out16@PLT
	mov	rdx, r12
	mov	esi, 102
	mov	edi, 980
	call	vga_out8@PLT
	mov	rsi, r12
	mov	edi, 981
	call	vga_in8@PLT
	mov	rdx, r12
	mov	edi, 981
	movzx	r13d, al
	mov	esi, r13d
	or	esi, -128
	movzx	esi, sil
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 58
	mov	edi, 980
	call	vga_out8@PLT
	mov	rsi, r12
	mov	edi, 981
	call	vga_in8@PLT
	mov	rdx, r12
	mov	edi, 981
	movzx	ebp, al
	mov	esi, ebp
	or	esi, -128
	movzx	esi, sil
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 83
	mov	edi, 980
	call	vga_out8@PLT
	mov	rsi, r12
	mov	edi, 981
	call	vga_in8@PLT
	mov	rdx, r12
	mov	edi, 981
	mov	esi, eax
	and	esi, 127
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 102
	mov	edi, 980
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, r13d
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 58
	mov	edi, 980
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, ebp
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 102
	mov	edi, 980
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, r13d
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 58
	mov	edi, 980
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, ebp
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 8
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR [rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 6
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 49
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 1[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 50
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 2[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 52
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 3[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 54
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 4[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 58
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 5[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 64
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 6[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 66
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 7[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 69
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 8[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 80
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 9[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 81
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 10[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 83
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 11[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 88
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 12[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 96
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 13[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 102
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 14[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 103
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 15[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 104
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 16[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 105
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 17[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 111
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 18[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 51
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 19[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 134
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 20[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 136
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 21[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 144
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 22[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 145
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 23[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 176
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 24[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 59
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 25[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 60
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 26[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 67
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 27[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 93
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 28[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 94
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 29[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 101
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 30[rbx]
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 14
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 31[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 15
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 32[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 16
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 33[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 17
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 34[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 18
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 35[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 19
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 36[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 41
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 37[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 21
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 38[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 48
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 39[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 24
	mov	edi, 964
	call	vga_out8@PLT
	movzx	esi, BYTE PTR 40[rbx]
	mov	rdx, r12
	mov	edi, 965
	call	vga_out8@PLT
	mov	rax, QWORD PTR S3_SAVAGE_MX[rip]
	cmp	QWORD PTR [r12], rax
	je	.L8
.L2:
	mov	rdx, r12
	mov	esi, 102
	mov	edi, 980
	call	vga_out8@PLT
	mov	rsi, r12
	mov	edi, 981
	call	vga_in8@PLT
	mov	rdx, r12
	mov	edi, 981
	mov	esi, eax
	mov	ebp, eax
	or	esi, -128
	movzx	esi, sil
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 58
	mov	edi, 980
	call	vga_out8@PLT
	mov	rsi, r12
	mov	edi, 981
	call	vga_in8@PLT
	mov	rdx, r12
	mov	edi, 981
	mov	esi, eax
	mov	r13d, eax
	or	esi, -128
	movzx	esi, sil
	call	vga_out8@PLT
	mov	rax, QWORD PTR S3_SAVAGE_MX[rip]
	cmp	QWORD PTR [r12], rax
	je	.L4
	mov	esi, DWORD PTR 68[rbx]
	mov	edi, DWORD PTR FIFO_CONTROL_REG[rip]
	mov	rdx, r12
	call	savage_out32@PLT
	mov	esi, DWORD PTR 64[rbx]
	mov	edi, DWORD PTR MIU_CONTROL_REG[rip]
	mov	rdx, r12
	call	savage_out32@PLT
	mov	esi, DWORD PTR 60[rbx]
	mov	edi, DWORD PTR STREAMS_TIMEOUT_REG[rip]
	mov	rdx, r12
	call	savage_out32@PLT
	mov	esi, DWORD PTR 56[rbx]
	mov	edi, DWORD PTR MISC_TIMEOUT_REG[rip]
	mov	rdx, r12
	call	savage_out32@PLT
.L4:
	mov	rdx, r12
	mov	esi, 58
	mov	edi, 980
	call	vga_out8@PLT
	movzx	esi, r13b
	mov	rdx, r12
	mov	edi, 981
	call	vga_out8@PLT
	mov	rdx, r12
	mov	esi, 102
	mov	edi, 980
	call	vga_out8@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movzx	esi, bpl
	mov	rdx, r12
	pop	rbx
	.cfi_def_cfa_offset 32
	mov	edi, 981
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	vga_out8@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	xor	ebp, ebp
	.p2align 4,,10
	.p2align 3
.L3:
	lea	esi, 84[rbp]
	mov	rdx, r12
	mov	edi, 964
	call	vga_out8@PLT
	mov	rax, QWORD PTR 48[rbx]
	mov	rdx, r12
	mov	edi, 965
	movzx	esi, BYTE PTR [rax+rbp]
	add	rbp, 1
	call	vga_out8@PLT
	cmp	rbp, 8
	jne	.L3
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	savage_set_default_par, .-savage_set_default_par
	.comm	STREAMS_TIMEOUT_REG,4,4
	.comm	S3_SAVAGE_MX,8,8
	.comm	MIU_CONTROL_REG,4,4
	.comm	MISC_TIMEOUT_REG,4,4
	.comm	FIFO_CONTROL_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_savagefb_driver.c_savage_set_default_par.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	savage_set_default_par, %function
savage_set_default_par:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r0
	mov	r5, r1
	mov	r2, r0
	ldr	r1, .L9
	mov	r0, #980
	bl	vga_out16
	mov	r2, r4
	ldr	r1, .L9+4
	mov	r0, #980
	bl	vga_out16
	mov	r2, r4
	ldr	r1, .L9+8
	mov	r0, #964
	bl	vga_out16
	mov	r2, r4
	mov	r1, #102
	mov	r0, #980
	bl	vga_out8
	mov	r1, r4
	ldr	r0, .L9+12
	bl	vga_in8
	mvn	r8, #127
	orr	r1, r0, r8
	mov	r7, r0
	mov	r2, r4
	and	r1, r1, #255
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #58
	mov	r0, #980
	bl	vga_out8
	mov	r1, r4
	ldr	r0, .L9+12
	bl	vga_in8
	orr	r1, r0, r8
	mov	r6, r0
	mov	r2, r4
	and	r1, r1, #255
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #83
	mov	r0, #980
	bl	vga_out8
	mov	r1, r4
	ldr	r0, .L9+12
	bl	vga_in8
	mov	r2, r4
	and	r1, r0, #127
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #102
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	mov	r1, r7
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #58
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	mov	r1, r6
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #102
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	mov	r1, r7
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #58
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	mov	r1, r6
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #8
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #6
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #49
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #1]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #50
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #2]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #52
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #3]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #54
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #4]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #58
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #5]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #64
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #6]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #66
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #7]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #69
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #8]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #80
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #9]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #81
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #10]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #83
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #11]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #88
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #12]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #96
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #13]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #102
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #14]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #103
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #15]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #104
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #16]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #105
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #17]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #111
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #18]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #51
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #19]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #134
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #20]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #136
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #21]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #144
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #22]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #145
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #23]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #176
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #24]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #59
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #25]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #60
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #26]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #67
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #27]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #93
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #28]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #94
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #29]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #101
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #30]	@ zero_extendqisi2
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #14
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #31]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #15
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #32]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #16
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #33]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #17
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #34]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #18
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #35]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #19
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #36]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #41
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #37]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #21
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #38]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	mov	r2, r4
	mov	r1, #48
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #39]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	ldr	r8, .L9+20
	mov	r2, r4
	mov	r1, #24
	mov	r0, #964
	bl	vga_out8
	mov	r2, r4
	ldrb	r1, [r5, #40]	@ zero_extendqisi2
	ldr	r0, .L9+16
	bl	vga_out8
	ldr	r2, [r4]
	ldr	r3, [r8]
	cmp	r2, r3
	beq	.L8
.L2:
	mov	r2, r4
	mov	r1, #102
	mov	r0, #980
	bl	vga_out8
	mov	r1, r4
	ldr	r0, .L9+12
	bl	vga_in8
	mvn	r9, #127
	orr	r1, r0, r9
	mov	r2, r4
	and	r1, r1, #255
	mov	r6, r0
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #58
	mov	r0, #980
	bl	vga_out8
	mov	r1, r4
	ldr	r0, .L9+12
	bl	vga_in8
	orr	r1, r0, r9
	mov	r2, r4
	mov	r7, r0
	and	r1, r1, #255
	ldr	r0, .L9+12
	bl	vga_out8
	ldr	r3, [r8]
	ldr	r2, [r4]
	cmp	r2, r3
	beq	.L4
	ldr	r3, .L9+24
	mov	r2, r4
	ldr	r0, [r3]
	ldr	r1, [r5, #60]
	bl	savage_out32
	ldr	r3, .L9+28
	mov	r2, r4
	ldr	r0, [r3]
	ldr	r1, [r5, #56]
	bl	savage_out32
	ldr	r3, .L9+32
	mov	r2, r4
	ldr	r0, [r3]
	ldr	r1, [r5, #52]
	bl	savage_out32
	ldr	r3, .L9+36
	mov	r2, r4
	ldr	r1, [r5, #48]
	ldr	r0, [r3]
	bl	savage_out32
.L4:
	mov	r2, r4
	mov	r1, #58
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	mov	r1, r7
	ldr	r0, .L9+12
	bl	vga_out8
	mov	r2, r4
	mov	r1, #102
	mov	r0, #980
	bl	vga_out8
	mov	r2, r4
	mov	r1, r6
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r0, .L9+12
	b	vga_out8
.L8:
	mov	r6, #0
	ldr	r7, .L9+16
.L3:
	add	r1, r6, #84
	mov	r2, r4
	and	r1, r1, #255
	mov	r0, #964
	bl	vga_out8
	ldr	r3, [r5, #44]
	mov	r2, r4
	ldrb	r1, [r3, r6]	@ zero_extendqisi2
	mov	r0, r7
	add	r6, r6, #1
	bl	vga_out8
	cmp	r6, #8
	bne	.L3
	b	.L2
.L10:
	.align	2
.L9:
	.word	18488
	.word	41017
	.word	1544
	.word	981
	.word	965
	.word	S3_SAVAGE_MX
	.word	FIFO_CONTROL_REG
	.word	MIU_CONTROL_REG
	.word	STREAMS_TIMEOUT_REG
	.word	MISC_TIMEOUT_REG
	.size	savage_set_default_par, .-savage_set_default_par
	.comm	STREAMS_TIMEOUT_REG,4,4
	.comm	S3_SAVAGE_MX,4,4
	.comm	MIU_CONTROL_REG,4,4
	.comm	MISC_TIMEOUT_REG,4,4
	.comm	FIFO_CONTROL_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
