	.file	"extr_mc13783-core.c_mc13783_adc_do_conversion.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	mc13783_adc_do_conversion
	.type	mc13783_adc_do_conversion, @function
mc13783_adc_do_conversion:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13d, esi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12d, edx
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rcx
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	mutex_lock@PLT
	mov	edx, DWORD PTR MC13783_ADC0_ADINC1[rip]
	mov	eax, DWORD PTR MC13783_ADC1_ADEN[rip]
	or	edx, DWORD PTR MC13783_ADC0_ADINC2[rip]
	or	eax, DWORD PTR MC13783_ADC1_ADTRIGIGN[rip]
	or	eax, DWORD PTR MC13783_ADC1_ASC[rip]
	cmp	r12d, 7
	jbe	.L2
	or	eax, DWORD PTR MC13783_ADC1_ADSEL[rip]
.L2:
	cmp	r13d, 129
	je	.L3
	cmp	r13d, 130
	je	.L4
	mov	r8d, DWORD PTR EINVAL[rip]
	neg	r8d
	cmp	r13d, 128
	je	.L13
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r8d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	ecx, DWORD PTR MC13783_ADC1_CHAN0_SHIFT[rip]
	and	r12d, 7
	sal	r12d, cl
	or	r12d, DWORD PTR MC13783_ADC1_RAND[rip]
	or	r12d, eax
.L6:
	mov	esi, DWORD PTR MC13783_REG_ADC_0[rip]
	mov	rdi, rbp
	call	mc13783_reg_write@PLT
	mov	esi, DWORD PTR MC13783_REG_ADC_1[rip]
	mov	edx, r12d
	mov	rdi, rbp
	lea	r12, 16[rbx]
	call	mc13783_reg_write@PLT
	lea	rdi, 16[rbp]
	call	wait_for_completion_interruptible@PLT
.L8:
	mov	esi, DWORD PTR MC13783_REG_ADC_2[rip]
	mov	rdx, rbx
	mov	rdi, rbp
	add	rbx, 4
	call	mc13783_reg_read@PLT
	cmp	r12, rbx
	jne	.L8
	cmp	QWORD PTR 8[rbp], 0
	jne	.L14
.L9:
	mov	rdi, rbp
	call	mutex_unlock@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	r8d, r8d
	pop	rbx
	.cfi_def_cfa_offset 32
	mov	eax, r8d
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	ecx, DWORD PTR MC13783_ADC0_ADREFEN[rip]
	or	ecx, DWORD PTR MC13783_ADC0_ADREFMODE[rip]
	mov	r12d, 4
	or	ecx, DWORD PTR MC13783_ADC0_TSMOD0[rip]
	or	ecx, DWORD PTR MC13783_ADC0_TSMOD1[rip]
	or	edx, ecx
	mov	ecx, DWORD PTR MC13783_ADC1_CHAN1_SHIFT[rip]
	sal	r12d, cl
	or	r12d, eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L4:
	mov	ecx, DWORD PTR MC13783_ADC1_CHAN1_SHIFT[rip]
	mov	r12d, 4
	sal	r12d, cl
	or	r12d, eax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L14:
	mov	rdi, rbp
	call	mc13783_adc_set_ts_irq_mode@PLT
	jmp	.L9
	.cfi_endproc
.LFE0:
	.size	mc13783_adc_do_conversion, .-mc13783_adc_do_conversion
	.comm	MC13783_REG_ADC_2,4,4
	.comm	MC13783_REG_ADC_1,4,4
	.comm	MC13783_REG_ADC_0,4,4
	.comm	MC13783_ADC1_RAND,4,4
	.comm	MC13783_ADC1_CHAN1_SHIFT,4,4
	.comm	MC13783_ADC1_CHAN0_SHIFT,4,4
	.comm	MC13783_ADC1_ASC,4,4
	.comm	MC13783_ADC1_ADTRIGIGN,4,4
	.comm	MC13783_ADC1_ADSEL,4,4
	.comm	MC13783_ADC1_ADEN,4,4
	.comm	MC13783_ADC0_TSMOD1,4,4
	.comm	MC13783_ADC0_TSMOD0,4,4
	.comm	MC13783_ADC0_ADREFMODE,4,4
	.comm	MC13783_ADC0_ADREFEN,4,4
	.comm	MC13783_ADC0_ADINC2,4,4
	.comm	MC13783_ADC0_ADINC1,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mc13783-core.c_mc13783_adc_do_conversion.c"
	.text
	.align	2
	.global	mc13783_adc_do_conversion
	.syntax unified
	.arm
	.fpu softvfp
	.type	mc13783_adc_do_conversion, %function
mc13783_adc_do_conversion:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r8, r2
	mov	r7, r1
	mov	r4, r3
	mov	r5, r0
	bl	mutex_lock
	ldr	r2, .L18
	ldr	r1, .L18+4
	ldr	ip, [r2]
	ldr	r2, .L18+8
	ldr	r1, [r1]
	ldr	r3, .L18+12
	ldr	r2, [r2]
	cmp	r8, #7
	ldr	r0, .L18+16
	orr	r2, r1, r2
	ldr	r3, [r3]
	ldrhi	r1, .L18+20
	ldr	r0, [r0]
	ldrhi	r1, [r1]
	orr	r3, r3, ip
	orr	r3, r3, r0
	orrhi	r3, r3, r1
	cmp	r7, #129
	beq	.L3
	cmp	r7, #130
	beq	.L4
	cmp	r7, #128
	beq	.L16
	ldr	r3, .L18+24
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L3:
	ldr	r1, .L18+28
	ldr	r0, .L18+32
	ldr	r1, [r1]
	ldr	r6, [r0]
	and	r8, r8, #7
	orr	r8, r6, r8, lsl r1
	orr	r6, r8, r3
.L6:
	ldr	r3, .L18+36
	mov	r0, r5
	ldr	r1, [r3]
	bl	mc13783_reg_write
	ldr	r3, .L18+40
	mov	r2, r6
	ldr	r1, [r3]
	mov	r0, r5
	bl	mc13783_reg_write
	add	r0, r5, #8
	bl	wait_for_completion_interruptible
	ldr	r7, .L18+44
	add	r6, r4, #16
.L8:
	mov	r2, r4
	mov	r0, r5
	ldr	r1, [r7]
	add	r4, r4, #4
	bl	mc13783_reg_read
	cmp	r6, r4
	bne	.L8
	ldr	r3, [r5, #4]
	cmp	r3, #0
	bne	.L17
.L9:
	mov	r0, r5
	bl	mutex_unlock
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L16:
	mov	r0, #4
	ldr	ip, .L18+48
	ldr	r1, .L18+52
	ldr	lr, [ip]
	ldr	r1, [r1]
	ldr	ip, .L18+56
	orr	r1, r1, lr
	ldr	lr, [ip]
	ldr	ip, .L18+60
	orr	r1, r1, lr
	ldr	lr, [ip]
	ldr	ip, .L18+64
	orr	r1, r1, lr
	ldr	r6, [ip]
	orr	r2, r2, r1
	orr	r6, r3, r0, lsl r6
	b	.L6
.L4:
	mov	r1, #4
	ldr	r0, .L18+64
	ldr	r6, [r0]
	orr	r6, r3, r1, lsl r6
	b	.L6
.L17:
	mov	r0, r5
	bl	mc13783_adc_set_ts_irq_mode
	b	.L9
.L19:
	.align	2
.L18:
	.word	MC13783_ADC1_ADTRIGIGN
	.word	MC13783_ADC0_ADINC1
	.word	MC13783_ADC0_ADINC2
	.word	MC13783_ADC1_ADEN
	.word	MC13783_ADC1_ASC
	.word	MC13783_ADC1_ADSEL
	.word	EINVAL
	.word	MC13783_ADC1_CHAN0_SHIFT
	.word	MC13783_ADC1_RAND
	.word	MC13783_REG_ADC_0
	.word	MC13783_REG_ADC_1
	.word	MC13783_REG_ADC_2
	.word	MC13783_ADC0_ADREFMODE
	.word	MC13783_ADC0_ADREFEN
	.word	MC13783_ADC0_TSMOD0
	.word	MC13783_ADC0_TSMOD1
	.word	MC13783_ADC1_CHAN1_SHIFT
	.size	mc13783_adc_do_conversion, .-mc13783_adc_do_conversion
	.comm	MC13783_REG_ADC_2,4,4
	.comm	MC13783_REG_ADC_1,4,4
	.comm	MC13783_REG_ADC_0,4,4
	.comm	MC13783_ADC1_RAND,4,4
	.comm	MC13783_ADC1_CHAN1_SHIFT,4,4
	.comm	MC13783_ADC1_CHAN0_SHIFT,4,4
	.comm	MC13783_ADC1_ASC,4,4
	.comm	MC13783_ADC1_ADTRIGIGN,4,4
	.comm	MC13783_ADC1_ADSEL,4,4
	.comm	MC13783_ADC1_ADEN,4,4
	.comm	MC13783_ADC0_TSMOD1,4,4
	.comm	MC13783_ADC0_TSMOD0,4,4
	.comm	MC13783_ADC0_ADREFMODE,4,4
	.comm	MC13783_ADC0_ADREFEN,4,4
	.comm	MC13783_ADC0_ADINC2,4,4
	.comm	MC13783_ADC0_ADINC1,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
