	.file	"extr_radeon_accel.c_radeonfb_prim_copyarea.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	radeonfb_prim_copyarea, @function
radeonfb_prim_copyarea:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	rcx, rdi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	r14d, DWORD PTR 16[rsi]
	mov	ebp, DWORD PTR 20[rsi]
	mov	r13d, DWORD PTR 8[rsi]
	mov	ebx, DWORD PTR 12[rsi]
	mov	edx, ebp
	mov	eax, r14d
	mov	r15d, DWORD PTR [rsi]
	mov	r12d, DWORD PTR 4[rsi]
	sub	edx, ebx
	sub	eax, r13d
	mov	DWORD PTR [rsp], eax
	jns	.L2
	lea	eax, -1[r15]
	add	r14d, eax
	add	r13d, eax
.L2:
	test	edx, edx
	jns	.L3
	lea	eax, -1[r12]
	add	ebp, eax
	add	ebx, eax
.L3:
	mov	edi, 3
	mov	DWORD PTR 4[rsp], edx
	mov	QWORD PTR 8[rsp], rcx
	call	radeon_fifo_wait@PLT
	mov	rcx, QWORD PTR 8[rsp]
	mov	edi, DWORD PTR DP_GUI_MASTER_CNTL[rip]
	mov	esi, DWORD PTR GMC_BRUSH_NONE[rip]
	or	esi, DWORD PTR GMC_SRC_DSTCOLOR[rip]
	or	esi, DWORD PTR ROP3_S[rip]
	or	esi, DWORD PTR DP_SRC_SOURCE_MEMORY[rip]
	or	esi, DWORD PTR [rcx]
	call	OUTREG@PLT
	mov	edi, DWORD PTR DP_WRITE_MSK[rip]
	mov	esi, -1
	call	OUTREG@PLT
	mov	eax, DWORD PTR [rsp]
	mov	edx, DWORD PTR 4[rsp]
	mov	esi, 0
	test	eax, eax
	cmovns	esi, DWORD PTR DST_X_LEFT_TO_RIGHT[rip]
	test	edx, edx
	js	.L5
	or	esi, DWORD PTR DST_Y_TOP_TO_BOTTOM[rip]
.L5:
	mov	edi, DWORD PTR DP_CNTL[rip]
	sal	ebx, 16
	call	OUTREG@PLT
	mov	edi, 2
	call	radeon_fifo_wait@PLT
	mov	esi, DWORD PTR RB2D_DC_FLUSH_ALL[rip]
	mov	edi, DWORD PTR DSTCACHE_CTLSTAT[rip]
	call	OUTREG@PLT
	mov	edi, DWORD PTR WAIT_UNTIL[rip]
	mov	esi, DWORD PTR WAIT_2D_IDLECLEAN[rip]
	or	esi, DWORD PTR WAIT_DMA_GUI_IDLE[rip]
	call	OUTREG@PLT
	mov	edi, 3
	call	radeon_fifo_wait@PLT
	mov	esi, ebp
	mov	edi, DWORD PTR SRC_Y_X[rip]
	sal	esi, 16
	or	esi, r14d
	call	OUTREG@PLT
	mov	edi, DWORD PTR DST_Y_X[rip]
	mov	esi, ebx
	or	esi, r13d
	call	OUTREG@PLT
	mov	esi, r12d
	mov	edi, DWORD PTR DST_HEIGHT_WIDTH[rip]
	add	rsp, 24
	.cfi_def_cfa_offset 56
	sal	esi, 16
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	or	esi, r15d
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	OUTREG@PLT
	.cfi_endproc
.LFE0:
	.size	radeonfb_prim_copyarea, .-radeonfb_prim_copyarea
	.comm	WAIT_UNTIL,4,4
	.comm	WAIT_DMA_GUI_IDLE,4,4
	.comm	WAIT_2D_IDLECLEAN,4,4
	.comm	SRC_Y_X,4,4
	.comm	ROP3_S,4,4
	.comm	RB2D_DC_FLUSH_ALL,4,4
	.comm	GMC_SRC_DSTCOLOR,4,4
	.comm	GMC_BRUSH_NONE,4,4
	.comm	DST_Y_X,4,4
	.comm	DST_Y_TOP_TO_BOTTOM,4,4
	.comm	DST_X_LEFT_TO_RIGHT,4,4
	.comm	DST_HEIGHT_WIDTH,4,4
	.comm	DSTCACHE_CTLSTAT,4,4
	.comm	DP_WRITE_MSK,4,4
	.comm	DP_SRC_SOURCE_MEMORY,4,4
	.comm	DP_GUI_MASTER_CNTL,4,4
	.comm	DP_CNTL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_radeon_accel.c_radeonfb_prim_copyarea.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	radeonfb_prim_copyarea, %function
radeonfb_prim_copyarea:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldm	r1, {r9, r10}
	ldr	r4, [r1, #8]
	ldr	r5, [r1, #16]
	ldr	r6, [r1, #12]
	ldr	r7, [r1, #20]
	subs	fp, r5, r4
	submi	r3, r9, #1
	sub	r8, r7, r6
	sub	sp, sp, #12
	addmi	r5, r5, r3
	addmi	r4, r4, r3
	cmp	r8, #0
	sublt	r3, r10, #1
	str	r0, [sp, #4]
	mov	r0, #3
	addlt	r7, r7, r3
	addlt	r6, r6, r3
	bl	radeon_fifo_wait
	ldr	r0, .L9
	ldr	r3, .L9+4
	ldr	r1, .L9+8
	ldr	ip, [r0]
	ldr	r1, [r1]
	ldr	r3, [r3]
	ldr	r0, .L9+12
	ldr	r2, [sp, #4]
	ldr	r0, [r0]
	orr	r3, r3, r1
	orr	r3, r3, ip
	ldr	r1, [r2]
	ldr	r2, .L9+16
	orr	r3, r3, r0
	orr	r1, r3, r1
	ldr	r0, [r2]
	bl	OUTREG
	ldr	r3, .L9+20
	mvn	r1, #0
	ldr	r0, [r3]
	bl	OUTREG
	ldr	r3, .L9+24
	cmp	fp, #0
	ldr	r0, [r3]
	ldrge	r3, .L9+28
	movlt	r1, #0
	ldrge	r1, [r3]
	cmp	r8, #0
	ldrge	r3, .L9+32
	ldrge	r3, [r3]
	orrge	r1, r1, r3
	bl	OUTREG
	mov	r0, #2
	bl	radeon_fifo_wait
	ldr	r2, .L9+36
	ldr	r3, .L9+40
	ldr	r1, [r2]
	ldr	r0, [r3]
	bl	OUTREG
	ldr	r2, .L9+44
	ldr	r3, .L9+48
	ldr	r1, [r2]
	ldr	r2, [r3]
	ldr	r3, .L9+52
	orr	r1, r1, r2
	ldr	r0, [r3]
	bl	OUTREG
	mov	r0, #3
	bl	radeon_fifo_wait
	ldr	r3, .L9+56
	orr	r1, r5, r7, lsl #16
	ldr	r0, [r3]
	bl	OUTREG
	ldr	r3, .L9+60
	orr	r1, r4, r6, lsl #16
	ldr	r0, [r3]
	bl	OUTREG
	ldr	r3, .L9+64
	orr	r1, r9, r10, lsl #16
	ldr	r0, [r3]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	OUTREG
.L10:
	.align	2
.L9:
	.word	ROP3_S
	.word	GMC_BRUSH_NONE
	.word	GMC_SRC_DSTCOLOR
	.word	DP_SRC_SOURCE_MEMORY
	.word	DP_GUI_MASTER_CNTL
	.word	DP_WRITE_MSK
	.word	DP_CNTL
	.word	DST_X_LEFT_TO_RIGHT
	.word	DST_Y_TOP_TO_BOTTOM
	.word	RB2D_DC_FLUSH_ALL
	.word	DSTCACHE_CTLSTAT
	.word	WAIT_2D_IDLECLEAN
	.word	WAIT_DMA_GUI_IDLE
	.word	WAIT_UNTIL
	.word	SRC_Y_X
	.word	DST_Y_X
	.word	DST_HEIGHT_WIDTH
	.size	radeonfb_prim_copyarea, .-radeonfb_prim_copyarea
	.comm	WAIT_UNTIL,4,4
	.comm	WAIT_DMA_GUI_IDLE,4,4
	.comm	WAIT_2D_IDLECLEAN,4,4
	.comm	SRC_Y_X,4,4
	.comm	ROP3_S,4,4
	.comm	RB2D_DC_FLUSH_ALL,4,4
	.comm	GMC_SRC_DSTCOLOR,4,4
	.comm	GMC_BRUSH_NONE,4,4
	.comm	DST_Y_X,4,4
	.comm	DST_Y_TOP_TO_BOTTOM,4,4
	.comm	DST_X_LEFT_TO_RIGHT,4,4
	.comm	DST_HEIGHT_WIDTH,4,4
	.comm	DSTCACHE_CTLSTAT,4,4
	.comm	DP_WRITE_MSK,4,4
	.comm	DP_SRC_SOURCE_MEMORY,4,4
	.comm	DP_GUI_MASTER_CNTL,4,4
	.comm	DP_CNTL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
