	.file	"extr_if_vge.c_vge_rxeof.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	vge_rxeof, @function
vge_rxeof:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xor	r12d, r12d
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	DWORD PTR 28[rsp], esi
	call	VGE_LOCK_ASSERT@PLT
	mov	esi, DWORD PTR 16[rbx]
	mov	edi, DWORD PTR 20[rbx]
	mov	edx, DWORD PTR BUS_DMASYNC_POSTREAD[rip]
	or	edx, DWORD PTR BUS_DMASYNC_POSTWRITE[rip]
	mov	r13, QWORD PTR 56[rbx]
	call	bus_dmamap_sync@PLT
	movsx	r15, DWORD PTR [rbx]
	mov	r14, r15
	sal	r15, 3
	test	ebp, ebp
	jle	.L7
	.p2align 4,,10
	.p2align 3
.L4:
	mov	eax, DWORD PTR 0[r13]
	test	DWORD PTR IFF_DRV_RUNNING[rip], eax
	je	.L25
	mov	rdx, QWORD PTR 48[rbx]
	add	rdx, r15
	mov	edi, DWORD PTR 4[rdx]
	mov	QWORD PTR [rsp], rdx
	call	le32toh@PLT
	test	DWORD PTR VGE_RDSTS_OWN[rip], eax
	mov	rdx, QWORD PTR [rsp]
	mov	ebp, eax
	jne	.L25
	mov	edi, DWORD PTR [rdx]
	add	r12d, 1
	call	le32toh@PLT
	mov	edi, ebp
	mov	DWORD PTR [rsp], eax
	call	VGE_RXBYTES@PLT
	mov	ecx, eax
	mov	rax, QWORD PTR 40[rbx]
	mov	r8, QWORD PTR [rax+r15]
	test	DWORD PTR VGE_RXPKT_SOF[rip], ebp
	jne	.L50
	mov	edx, DWORD PTR VGE_RDSTS_RXOK[rip]
	or	edx, DWORD PTR VGE_RDSTS_VIDM[rip]
	or	edx, DWORD PTR VGE_RDSTS_RLERR[rip]
	or	edx, DWORD PTR VGE_RDSTS_CSUMERR[rip]
	test	edx, ebp
	je	.L51
	mov	esi, r14d
	mov	rdi, rbx
	mov	QWORD PTR 16[rsp], r8
	mov	DWORD PTR 8[rsp], ecx
	call	vge_newbuf@PLT
	mov	ecx, DWORD PTR 8[rsp]
	mov	r8, QWORD PTR 16[rsp]
	test	rax, rax
	jne	.L48
	mov	rsi, QWORD PTR 32[rbx]
	mov	edi, DWORD PTR ETHER_CRC_LEN[rip]
	test	rsi, rsi
	je	.L14
	mov	eax, ecx
	mov	r9d, DWORD PTR MCLBYTES[rip]
	sub	r9d, DWORD PTR VGE_RX_BUF_ALIGN[rip]
	cdq
	idiv	r9d
	mov	r9, QWORD PTR 24[rbx]
	mov	DWORD PTR [r8], edx
	cmp	edx, edi
	jle	.L52
	mov	eax, DWORD PTR M_PKTHDR[rip]
	sub	edx, edi
	mov	DWORD PTR [r8], edx
	mov	edx, eax
	not	edx
	and	DWORD PTR 4[r8], edx
	mov	QWORD PTR 32[r9], r8
.L16:
	sub	ecx, edi
	or	DWORD PTR 4[rsi], eax
	mov	DWORD PTR 8[rsi], ecx
.L17:
	mov	rdi, rsi
	mov	QWORD PTR 8[rsp], rsi
	call	vge_fixup_rx@PLT
	mov	rsi, QWORD PTR 8[rsp]
	mov	eax, DWORD PTR 4[r13]
	mov	QWORD PTR 24[rsi], r13
	test	DWORD PTR IFCAP_RXCSUM[rip], eax
	je	.L19
	mov	eax, DWORD PTR [rsp]
	test	DWORD PTR VGE_RDCTL_FRAG[rip], eax
	jne	.L19
	test	DWORD PTR VGE_RDCTL_IPPKT[rip], eax
	je	.L21
	mov	eax, DWORD PTR CSUM_IP_CHECKED[rip]
	or	DWORD PTR 12[rsi], eax
.L21:
	mov	eax, DWORD PTR [rsp]
	test	DWORD PTR VGE_RDCTL_IPCSUMOK[rip], eax
	je	.L22
	mov	eax, DWORD PTR CSUM_IP_VALID[rip]
	or	DWORD PTR 12[rsi], eax
.L22:
	mov	ecx, DWORD PTR [rsp]
	mov	eax, DWORD PTR VGE_RDCTL_TCPPKT[rip]
	or	eax, DWORD PTR VGE_RDCTL_UDPPKT[rip]
	test	ecx, eax
	jne	.L53
	.p2align 4,,10
	.p2align 3
.L19:
	test	DWORD PTR VGE_RDSTS_VTAG[rip], ebp
	jne	.L54
.L23:
	mov	rdi, rbx
	mov	QWORD PTR [rsp], rsi
	call	VGE_UNLOCK@PLT
	mov	rsi, QWORD PTR [rsp]
	mov	rdi, r13
	call	[QWORD PTR 8[r13]]
	mov	rdi, rbx
	call	VGE_LOCK@PLT
	mov	QWORD PTR 32[rbx], 0
	mov	QWORD PTR 24[rbx], 0
.L10:
	mov	edi, r14d
	call	VGE_RX_DESC_INC@PLT
	cmp	DWORD PTR 28[rsp], r12d
	jne	.L4
.L6:
	mov	esi, DWORD PTR 16[rbx]
	mov	edi, DWORD PTR 20[rbx]
	mov	DWORD PTR [rbx], r14d
	mov	edx, DWORD PTR BUS_DMASYNC_PREREAD[rip]
	or	edx, DWORD PTR BUS_DMASYNC_PREWRITE[rip]
	call	bus_dmamap_sync@PLT
	mov	rdx, QWORD PTR 8[rbx]
	test	rdx, rdx
	je	.L1
	mov	esi, DWORD PTR VGE_RXDESC_RESIDUECNT[rip]
	mov	rdi, rbx
	call	CSR_WRITE_2@PLT
	mov	QWORD PTR 8[rbx], 0
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L50:
	mov	esi, r14d
	mov	rdi, rbx
	mov	QWORD PTR [rsp], r8
	call	vge_newbuf@PLT
	mov	r8, QWORD PTR [rsp]
	test	rax, rax
	jne	.L48
	mov	eax, DWORD PTR MCLBYTES[rip]
	sub	eax, DWORD PTR VGE_RX_BUF_ALIGN[rip]
	cmp	QWORD PTR 32[rbx], 0
	mov	DWORD PTR [r8], eax
	je	.L55
	mov	eax, DWORD PTR M_PKTHDR[rip]
	not	eax
	and	DWORD PTR 4[r8], eax
	mov	rax, QWORD PTR 24[rbx]
	mov	QWORD PTR 32[rax], r8
	mov	QWORD PTR 24[rbx], r8
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L48:
	mov	esi, DWORD PTR IFCOUNTER_IQDROPS[rip]
	mov	edx, 1
.L47:
	mov	rdi, r13
	call	if_inc_counter@PLT
	mov	rdi, rbx
	call	VGE_CHAIN_RESET@PLT
	mov	esi, r14d
	mov	rdi, rbx
	call	vge_discard_rxbuf@PLT
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L54:
	mov	edi, DWORD PTR [rsp]
	and	edi, DWORD PTR VGE_RDCTL_VLANID[rip]
	mov	QWORD PTR 8[rsp], rsi
	call	bswap16@PLT
	mov	rsi, QWORD PTR 8[rsp]
	mov	DWORD PTR 20[rsi], eax
	mov	eax, DWORD PTR M_VLANTAG[rip]
	or	DWORD PTR 4[rsi], eax
	jmp	.L23
	.p2align 4,,10
	.p2align 3
.L14:
	sub	ecx, edi
	mov	eax, DWORD PTR M_PKTHDR[rip]
	mov	rsi, r8
	or	DWORD PTR 4[r8], eax
	mov	DWORD PTR [r8], ecx
	mov	DWORD PTR 8[r8], ecx
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L52:
	sub	edi, edx
	sub	DWORD PTR [r9], edi
	mov	rdi, r8
	mov	DWORD PTR 8[rsp], ecx
	call	m_freem@PLT
	mov	eax, DWORD PTR M_PKTHDR[rip]
	mov	edi, DWORD PTR ETHER_CRC_LEN[rip]
	mov	rsi, QWORD PTR 32[rbx]
	mov	ecx, DWORD PTR 8[rsp]
	jmp	.L16
	.p2align 4,,10
	.p2align 3
.L51:
	mov	esi, DWORD PTR IFCOUNTER_IERRORS[rip]
	mov	edx, 1
	jmp	.L47
	.p2align 4,,10
	.p2align 3
.L25:
	test	r12d, r12d
	jne	.L6
.L7:
	xor	r12d, r12d
.L1:
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L55:
	.cfi_restore_state
	mov	QWORD PTR 32[rbx], r8
	mov	QWORD PTR 24[rbx], r8
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L53:
	test	DWORD PTR VGE_RDCTL_PROTOCSUMOK[rip], ecx
	je	.L19
	mov	eax, DWORD PTR CSUM_DATA_VALID[rip]
	mov	DWORD PTR 16[rsi], 65535
	or	eax, DWORD PTR CSUM_PSEUDO_HDR[rip]
	or	DWORD PTR 12[rsi], eax
	jmp	.L19
	.cfi_endproc
.LFE0:
	.size	vge_rxeof, .-vge_rxeof
	.comm	VGE_RX_BUF_ALIGN,4,4
	.comm	VGE_RXPKT_SOF,4,4
	.comm	VGE_RXDESC_RESIDUECNT,4,4
	.comm	VGE_RDSTS_VTAG,4,4
	.comm	VGE_RDSTS_VIDM,4,4
	.comm	VGE_RDSTS_RXOK,4,4
	.comm	VGE_RDSTS_RLERR,4,4
	.comm	VGE_RDSTS_OWN,4,4
	.comm	VGE_RDSTS_CSUMERR,4,4
	.comm	VGE_RDCTL_VLANID,4,4
	.comm	VGE_RDCTL_UDPPKT,4,4
	.comm	VGE_RDCTL_TCPPKT,4,4
	.comm	VGE_RDCTL_PROTOCSUMOK,4,4
	.comm	VGE_RDCTL_IPPKT,4,4
	.comm	VGE_RDCTL_IPCSUMOK,4,4
	.comm	VGE_RDCTL_FRAG,4,4
	.comm	M_VLANTAG,4,4
	.comm	M_PKTHDR,4,4
	.comm	MCLBYTES,4,4
	.comm	IFF_DRV_RUNNING,4,4
	.comm	IFCOUNTER_IQDROPS,4,4
	.comm	IFCOUNTER_IERRORS,4,4
	.comm	IFCAP_RXCSUM,4,4
	.comm	ETHER_CRC_LEN,4,4
	.comm	CSUM_PSEUDO_HDR,4,4
	.comm	CSUM_IP_VALID,4,4
	.comm	CSUM_IP_CHECKED,4,4
	.comm	CSUM_DATA_VALID,4,4
	.comm	BUS_DMASYNC_PREWRITE,4,4
	.comm	BUS_DMASYNC_PREREAD,4,4
	.comm	BUS_DMASYNC_POSTWRITE,4,4
	.comm	BUS_DMASYNC_POSTREAD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_if_vge.c_vge_rxeof.c"
	.text
	.global	__aeabi_idivmod
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vge_rxeof, %function
vge_rxeof:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	mov	r5, r1
	sub	sp, sp, #28
	str	r1, [sp, #12]
	bl	VGE_LOCK_ASSERT
	ldr	r2, .L54
	ldr	r3, .L54+4
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r4, #8]
	ldr	r0, [r4, #12]
	orr	r2, r2, r3
	ldr	r10, [r4, #32]
	bl	bus_dmamap_sync
	cmp	r5, #0
	ldr	fp, [r4]
	ble	.L7
	mov	r9, #0
	lsl	r3, fp, #3
	str	r3, [sp, #4]
	lsl	r3, fp, #2
	str	r3, [sp, #16]
.L4:
	ldr	r3, .L54+8
	ldr	r2, [r10]
	ldr	r3, [r3]
	tst	r2, r3
	beq	.L25
	ldr	r6, [r4, #28]
	ldr	r3, [sp, #4]
	add	r3, r6, r3
	ldr	r0, [r3, #4]
	bl	le32toh
	ldr	r3, .L54+12
	mov	r5, r0
	ldr	r3, [r3]
	tst	r0, r3
	bne	.L25
	ldr	r3, [sp, #4]
	add	r9, r9, #1
	ldr	r0, [r6, r3]
	bl	le32toh
	mov	r3, r0
	mov	r0, r5
	str	r3, [sp, #8]
	bl	VGE_RXBYTES
	ldr	r3, .L54+16
	mov	r8, r0
	ldr	r2, [r3]
	ldr	r3, [r4, #24]
	tst	r5, r2
	ldr	r2, [sp, #16]
	ldr	r7, [r3, r2]
	bne	.L49
	ldr	r3, .L54+20
	ldr	r2, .L54+24
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L54+28
	orr	r3, r3, r2
	ldr	r2, .L54+32
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r1
	orr	r3, r3, r2
	tst	r3, r5
	beq	.L50
	mov	r1, fp
	mov	r0, r4
	bl	vge_newbuf
	cmp	r0, #0
	bne	.L47
	ldr	r6, [r4, #20]
	ldr	r2, .L54+36
	cmp	r6, #0
	ldr	r3, [r2]
	beq	.L14
	ldr	r0, .L54+40
	ldr	r1, .L54+44
	ldr	ip, [r0]
	ldr	r1, [r1]
	mov	r0, r8
	sub	r1, ip, r1
	str	r3, [sp, #20]
	bl	__aeabi_idivmod
	ldr	r3, [sp, #20]
	ldr	ip, [r4, #16]
	cmp	r1, r3
	str	r1, [r7]
	ble	.L51
	ldr	r0, .L54+48
	ldr	r2, [r7, #4]
	ldr	lr, [r0]
	sub	r1, r1, r3
	bic	r2, r2, lr
	stm	r7, {r1, r2}
	str	r7, [ip, #28]
.L16:
	ldr	r2, [r6, #4]
	sub	r8, r8, r3
	orr	lr, r2, lr
	str	r8, [r6, #8]
	str	lr, [r6, #4]
.L17:
	mov	r0, r6
	bl	vge_fixup_rx
	ldr	r3, .L54+52
	ldr	r2, [r10, #4]
	ldr	r3, [r3]
	str	r10, [r6, #24]
	tst	r2, r3
	beq	.L19
	ldr	r3, .L54+56
	ldr	r2, [sp, #8]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L19
	ldr	r3, .L54+60
	ldr	r3, [r3]
	tst	r2, r3
	ldrne	r2, .L54+64
	ldrne	r3, [r6, #12]
	ldrne	r2, [r2]
	orrne	r3, r3, r2
	strne	r3, [r6, #12]
	ldr	r3, .L54+68
	ldr	r2, [sp, #8]
	ldr	r3, [r3]
	tst	r2, r3
	ldrne	r2, .L54+72
	ldrne	r3, [r6, #12]
	ldrne	r2, [r2]
	orrne	r3, r3, r2
	strne	r3, [r6, #12]
	ldr	r2, .L54+76
	ldr	r3, .L54+80
	ldr	r2, [r2]
	ldr	r3, [r3]
	orr	r3, r3, r2
	ldr	r2, [sp, #8]
	tst	r3, r2
	bne	.L52
.L19:
	ldr	r3, .L54+84
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L53
.L23:
	mov	r0, r4
	bl	VGE_UNLOCK
	ldr	r3, [r10, #8]
	mov	r1, r6
	mov	r0, r10
	blx	r3
	mov	r0, r4
	bl	VGE_LOCK
	mov	r3, #0
	str	r3, [r4, #20]
	str	r3, [r4, #16]
.L10:
	mov	r0, fp
	bl	VGE_RX_DESC_INC
	ldr	r3, [sp, #12]
	cmp	r3, r9
	bne	.L4
.L6:
	ldr	r2, .L54+88
	ldr	r3, .L54+92
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r4, #8]
	orr	r2, r2, r3
	ldr	r0, [r4, #12]
	str	fp, [r4]
	bl	bus_dmamap_sync
	ldr	r2, [r4, #4]
	cmp	r2, #0
	beq	.L1
	ldr	r3, .L54+96
	mov	r0, r4
	ldr	r1, [r3]
	bl	CSR_WRITE_2
	mov	r3, #0
	mov	r0, r9
	str	r3, [r4, #4]
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L49:
	mov	r1, fp
	mov	r0, r4
	bl	vge_newbuf
	cmp	r0, #0
	bne	.L47
	ldr	r2, .L54+44
	ldr	r3, .L54+40
	ldr	r1, [r2]
	ldr	r2, [r4, #20]
	ldr	r3, [r3]
	cmp	r2, #0
	ldrne	r2, .L54+48
	sub	r3, r3, r1
	str	r3, [r7]
	ldrne	r1, [r2]
	ldrne	r3, [r7, #4]
	ldrne	r2, [r4, #16]
	bicne	r3, r3, r1
	strne	r3, [r7, #4]
	streq	r7, [r4, #20]
	strne	r7, [r2, #28]
	str	r7, [r4, #16]
	b	.L10
.L47:
	ldr	r3, .L54+100
.L46:
	ldr	r1, [r3]
	mov	r2, #1
	mov	r0, r10
	bl	if_inc_counter
	mov	r0, r4
	bl	VGE_CHAIN_RESET
	mov	r1, fp
	mov	r0, r4
	bl	vge_discard_rxbuf
	b	.L10
.L53:
	ldr	r3, .L54+104
	ldr	r0, [r3]
	ldr	r3, [sp, #8]
	and	r3, r3, r0
	mov	r0, r3
	bl	bswap16
	ldr	r2, .L54+108
	ldr	r3, [r6, #4]
	ldr	r2, [r2]
	str	r0, [r6, #20]
	orr	r3, r3, r2
	str	r3, [r6, #4]
	b	.L23
.L14:
	ldr	r2, .L54+48
	sub	r8, r8, r3
	ldr	r3, [r2]
	ldr	r2, [r7, #4]
	mov	r6, r7
	orr	r2, r2, r3
	str	r8, [r7, #8]
	str	r8, [r7]
	str	r2, [r7, #4]
	b	.L17
.L51:
	ldr	r0, [ip]
	sub	r3, r3, r1
	sub	r3, r0, r3
	str	r3, [ip]
	mov	r0, r7
	bl	m_freem
	ldr	r1, .L54+48
	ldr	r2, .L54+36
	ldr	lr, [r1]
	ldr	r3, [r2]
	ldr	r6, [r4, #20]
	b	.L16
.L50:
	ldr	r3, .L54+112
	b	.L46
.L25:
	cmp	r9, #0
	bne	.L6
.L7:
	mov	r9, #0
.L1:
	mov	r0, r9
	add	sp, sp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L52:
	ldr	r3, .L54+116
	ldr	r3, [r3]
	tst	r2, r3
	beq	.L19
	ldr	r3, .L54+120
	ldr	r2, .L54+124
	ldr	r1, [r3]
	ldr	r2, [r2]
	ldr	r3, [r6, #12]
	orr	r2, r2, r1
	ldr	r1, .L54+128
	orr	r3, r3, r2
	str	r3, [r6, #12]
	str	r1, [r6, #16]
	b	.L19
.L55:
	.align	2
.L54:
	.word	BUS_DMASYNC_POSTREAD
	.word	BUS_DMASYNC_POSTWRITE
	.word	IFF_DRV_RUNNING
	.word	VGE_RDSTS_OWN
	.word	VGE_RXPKT_SOF
	.word	VGE_RDSTS_RXOK
	.word	VGE_RDSTS_VIDM
	.word	VGE_RDSTS_RLERR
	.word	VGE_RDSTS_CSUMERR
	.word	ETHER_CRC_LEN
	.word	MCLBYTES
	.word	VGE_RX_BUF_ALIGN
	.word	M_PKTHDR
	.word	IFCAP_RXCSUM
	.word	VGE_RDCTL_FRAG
	.word	VGE_RDCTL_IPPKT
	.word	CSUM_IP_CHECKED
	.word	VGE_RDCTL_IPCSUMOK
	.word	CSUM_IP_VALID
	.word	VGE_RDCTL_UDPPKT
	.word	VGE_RDCTL_TCPPKT
	.word	VGE_RDSTS_VTAG
	.word	BUS_DMASYNC_PREREAD
	.word	BUS_DMASYNC_PREWRITE
	.word	VGE_RXDESC_RESIDUECNT
	.word	IFCOUNTER_IQDROPS
	.word	VGE_RDCTL_VLANID
	.word	M_VLANTAG
	.word	IFCOUNTER_IERRORS
	.word	VGE_RDCTL_PROTOCSUMOK
	.word	CSUM_PSEUDO_HDR
	.word	CSUM_DATA_VALID
	.word	65535
	.size	vge_rxeof, .-vge_rxeof
	.comm	VGE_RX_BUF_ALIGN,4,4
	.comm	VGE_RXPKT_SOF,4,4
	.comm	VGE_RXDESC_RESIDUECNT,4,4
	.comm	VGE_RDSTS_VTAG,4,4
	.comm	VGE_RDSTS_VIDM,4,4
	.comm	VGE_RDSTS_RXOK,4,4
	.comm	VGE_RDSTS_RLERR,4,4
	.comm	VGE_RDSTS_OWN,4,4
	.comm	VGE_RDSTS_CSUMERR,4,4
	.comm	VGE_RDCTL_VLANID,4,4
	.comm	VGE_RDCTL_UDPPKT,4,4
	.comm	VGE_RDCTL_TCPPKT,4,4
	.comm	VGE_RDCTL_PROTOCSUMOK,4,4
	.comm	VGE_RDCTL_IPPKT,4,4
	.comm	VGE_RDCTL_IPCSUMOK,4,4
	.comm	VGE_RDCTL_FRAG,4,4
	.comm	M_VLANTAG,4,4
	.comm	M_PKTHDR,4,4
	.comm	MCLBYTES,4,4
	.comm	IFF_DRV_RUNNING,4,4
	.comm	IFCOUNTER_IQDROPS,4,4
	.comm	IFCOUNTER_IERRORS,4,4
	.comm	IFCAP_RXCSUM,4,4
	.comm	ETHER_CRC_LEN,4,4
	.comm	CSUM_PSEUDO_HDR,4,4
	.comm	CSUM_IP_VALID,4,4
	.comm	CSUM_IP_CHECKED,4,4
	.comm	CSUM_DATA_VALID,4,4
	.comm	BUS_DMASYNC_PREWRITE,4,4
	.comm	BUS_DMASYNC_PREREAD,4,4
	.comm	BUS_DMASYNC_POSTWRITE,4,4
	.comm	BUS_DMASYNC_POSTREAD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
