	.file	"extr_cmipci.c_setup_ac3.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	setup_ac3, @function
setup_ac3:
.LFB0:
	.cfi_startproc
	endbr64
	mov	r8d, edx
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	edx, DWORD PTR CM_AC3EN1[rip]
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mov	rbx, rsi
	mov	esi, DWORD PTR CM_REG_CHFORMAT[rip]
	test	r8d, r8d
	je	.L2
	mov	r12d, ecx
	call	snd_cmipci_set_bit@PLT
	mov	edx, DWORD PTR CM_AC3EN2[rip]
	mov	esi, DWORD PTR CM_REG_MISC_CTRL[rip]
	mov	rdi, rbp
	call	snd_cmipci_set_bit@PLT
	cmp	QWORD PTR 8[rbp], 0
	je	.L3
	mov	edx, DWORD PTR CM_SPD24SEL[rip]
	mov	esi, DWORD PTR CM_REG_CHFORMAT[rip]
	mov	rdi, rbp
	call	snd_cmipci_set_bit@PLT
	mov	edx, DWORD PTR CM_SPD32SEL[rip]
	mov	esi, DWORD PTR CM_REG_MISC_CTRL[rip]
.L9:
	mov	rdi, rbp
.L12:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	snd_cmipci_clear_bit@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	edx, DWORD PTR CM_SPD32SEL[rip]
	mov	esi, DWORD PTR CM_REG_MISC_CTRL[rip]
	mov	rdi, rbp
	call	snd_cmipci_set_bit@PLT
	cmp	DWORD PTR 0[rbp], 33
	je	.L14
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	call	snd_cmipci_clear_bit@PLT
	mov	edx, DWORD PTR CM_AC3EN2[rip]
	mov	esi, DWORD PTR CM_REG_MISC_CTRL[rip]
	mov	rdi, rbp
	call	snd_cmipci_clear_bit@PLT
	cmp	QWORD PTR 8[rbp], 0
	je	.L6
	mov	rax, QWORD PTR [rbx]
	mov	edi, DWORD PTR [rax]
	call	snd_pcm_format_width@PLT
	mov	edx, DWORD PTR CM_SPD32SEL[rip]
	mov	esi, DWORD PTR CM_REG_MISC_CTRL[rip]
	mov	rdi, rbp
	cmp	eax, 16
	jle	.L7
	call	snd_cmipci_set_bit@PLT
	mov	edx, DWORD PTR CM_SPD24SEL[rip]
	mov	esi, DWORD PTR CM_REG_CHFORMAT[rip]
	mov	rdi, rbp
.L10:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	snd_cmipci_set_bit@PLT
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	edx, DWORD PTR CM_SPD32SEL[rip]
	mov	esi, DWORD PTR CM_REG_MISC_CTRL[rip]
	mov	rdi, rbp
	call	snd_cmipci_clear_bit@PLT
	mov	edx, DWORD PTR CM_SPD24SEL[rip]
	mov	esi, DWORD PTR CM_REG_CHFORMAT[rip]
	mov	rdi, rbp
	call	snd_cmipci_clear_bit@PLT
	mov	edx, DWORD PTR CM_PLAYBACK_SRATE_176K[rip]
.L11:
	mov	esi, DWORD PTR CM_REG_CHFORMAT[rip]
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L7:
	call	snd_cmipci_clear_bit@PLT
	mov	edx, DWORD PTR CM_SPD24SEL[rip]
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edx, DWORD PTR CM_PLAYBACK_SRATE_176K[rip]
	mov	esi, DWORD PTR CM_REG_CHFORMAT[rip]
	mov	rdi, rbp
	cmp	r12d, 47999
	jle	.L12
	jmp	.L10
	.cfi_endproc
.LFE0:
	.size	setup_ac3, .-setup_ac3
	.comm	CM_SPD32SEL,4,4
	.comm	CM_SPD24SEL,4,4
	.comm	CM_REG_MISC_CTRL,4,4
	.comm	CM_REG_CHFORMAT,4,4
	.comm	CM_PLAYBACK_SRATE_176K,4,4
	.comm	CM_AC3EN2,4,4
	.comm	CM_AC3EN1,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cmipci.c_setup_ac3.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	setup_ac3, %function
setup_ac3:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	ip, .L13
	ldr	r5, .L13+4
	cmp	r2, #0
	mov	r7, r1
	mov	r4, r0
	ldr	r1, [r5]
	ldr	r2, [ip]
	beq	.L2
	mov	r6, r3
	ldr	r7, .L13+8
	bl	snd_cmipci_set_bit
	ldr	r3, .L13+12
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, [r7]
	bl	snd_cmipci_set_bit
	ldr	r3, [r4, #4]
	cmp	r3, #0
	beq	.L3
	ldr	r3, .L13+16
	ldr	r1, [r5]
	ldr	r2, [r3]
	mov	r0, r4
	bl	snd_cmipci_set_bit
	ldr	r3, .L13+20
	mov	r0, r4
	ldr	r1, [r7]
	ldr	r2, [r3]
	pop	{r4, r5, r6, r7, r8, lr}
	b	snd_cmipci_clear_bit
.L3:
	ldr	r3, .L13+20
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, [r7]
	bl	snd_cmipci_set_bit
	ldr	r3, [r4]
	cmp	r3, #33
	popne	{r4, r5, r6, r7, r8, pc}
	ldr	r2, .L13+24
	ldr	r3, .L13+28
	cmp	r6, r2
	mov	r0, r4
	ldr	r1, [r5]
	ldr	r2, [r3]
	ble	.L10
	b	.L9
.L2:
	bl	snd_cmipci_clear_bit
	ldr	r6, .L13+8
	ldr	r3, .L13+12
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, [r6]
	bl	snd_cmipci_clear_bit
	ldr	r3, [r4, #4]
	cmp	r3, #0
	beq	.L6
	ldr	r3, [r7]
	ldr	r0, [r3]
	bl	snd_pcm_format_width
	ldr	r3, .L13+20
	cmp	r0, #16
	ldr	r1, [r6]
	mov	r0, r4
	ldr	r2, [r3]
	ble	.L7
	bl	snd_cmipci_set_bit
	mov	r0, r4
	ldr	r3, .L13+16
	ldr	r1, [r5]
	ldr	r2, [r3]
.L9:
	pop	{r4, r5, r6, r7, r8, lr}
	b	snd_cmipci_set_bit
.L6:
	ldr	r3, .L13+20
	ldr	r1, [r6]
	ldr	r2, [r3]
	mov	r0, r4
	bl	snd_cmipci_clear_bit
	ldr	r3, .L13+16
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, [r5]
	bl	snd_cmipci_clear_bit
	ldr	r3, .L13+28
.L11:
	mov	r0, r4
	ldr	r1, [r5]
	ldr	r2, [r3]
.L10:
	pop	{r4, r5, r6, r7, r8, lr}
	b	snd_cmipci_clear_bit
.L7:
	bl	snd_cmipci_clear_bit
	ldr	r3, .L13+16
	b	.L11
.L14:
	.align	2
.L13:
	.word	CM_AC3EN1
	.word	CM_REG_CHFORMAT
	.word	CM_REG_MISC_CTRL
	.word	CM_AC3EN2
	.word	CM_SPD24SEL
	.word	CM_SPD32SEL
	.word	47999
	.word	CM_PLAYBACK_SRATE_176K
	.size	setup_ac3, .-setup_ac3
	.comm	CM_SPD32SEL,4,4
	.comm	CM_SPD24SEL,4,4
	.comm	CM_REG_MISC_CTRL,4,4
	.comm	CM_REG_CHFORMAT,4,4
	.comm	CM_PLAYBACK_SRATE_176K,4,4
	.comm	CM_AC3EN2,4,4
	.comm	CM_AC3EN1,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
