	.file	"extr_main.c_ath9k_start.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Starting driver with initial channel: %d MHz\n"
	.align 8
.LC1:
	.string	"Unable to reset hardware; reset status %d (freq %u MHz)\n"
	.text
	.p2align 4
	.type	ath9k_start, @function
ath9k_start:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	mov	rbp, QWORD PTR 8[rdi]
	mov	r13, QWORD PTR 8[rbp]
	mov	rdi, r13
	call	ath9k_hw_common@PLT
	mov	rbx, QWORD PTR [r12]
	mov	esi, DWORD PTR CONFIG[rip]
	lea	rdx, .LC0[rip]
	mov	rdi, rax
	mov	r14, rax
	mov	ecx, DWORD PTR [rbx]
	call	ath_dbg@PLT
	mov	rdi, rbp
	call	ath9k_ps_wakeup@PLT
	mov	rdi, rbp
	call	mutex_lock@PLT
	mov	rdi, r12
	mov	rsi, r13
	lea	r12, 4[rbp]
	call	ath9k_cmn_get_curchannel@PLT
	xor	esi, esi
	mov	rdi, r13
	mov	r15, rax
	call	ath9k_hw_configpcipowersave@PLT
	mov	rdi, r12
	call	spin_lock_bh@PLT
	lea	rdi, 32[r13]
	mov	esi, -1
	call	atomic_set@PLT
	mov	edx, DWORD PTR 28[r13]
	xor	ecx, ecx
	mov	rsi, r15
	mov	rdi, r13
	call	ath9k_hw_reset@PLT
	test	eax, eax
	jne	.L16
.L2:
	mov	eax, DWORD PTR ATH9K_INT_TX[rip]
	mov	edx, DWORD PTR 24[r13]
	or	eax, DWORD PTR ATH9K_INT_RXEOL[rip]
	or	eax, DWORD PTR ATH9K_INT_RXORN[rip]
	or	eax, DWORD PTR ATH9K_INT_FATAL[rip]
	or	eax, DWORD PTR ATH9K_INT_GLOBAL[rip]
	test	DWORD PTR ATH9K_HW_CAP_EDMA[rip], edx
	je	.L3
	mov	ecx, DWORD PTR ATH9K_INT_RXHP[rip]
	or	ecx, DWORD PTR ATH9K_INT_RXLP[rip]
	or	ecx, DWORD PTR ATH9K_INT_BB_WATCHDOG[rip]
	or	eax, ecx
.L4:
	or	eax, DWORD PTR ATH9K_INT_GTT[rip]
	mov	DWORD PTR 4[r13], eax
	test	DWORD PTR ATH9K_HW_CAP_HT[rip], edx
	je	.L5
	or	eax, DWORD PTR ATH9K_INT_CST[rip]
	mov	DWORD PTR 4[r13], eax
.L5:
	mov	rdi, rbp
	call	ath_mci_enable@PLT
	mov	edi, DWORD PTR SC_OP_INVALID[rip]
	lea	rsi, 16[rbp]
	call	clear_bit@PLT
	mov	rax, QWORD PTR 8[rbp]
	xor	esi, esi
	mov	rdi, rbp
	mov	DWORD PTR 8[rax], 0
	call	ath_complete_reset@PLT
	test	eax, eax
	jne	.L6
	mov	DWORD PTR 0[r13], 0
.L6:
	mov	rsi, QWORD PTR 16[r13]
	test	rsi, rsi
	js	.L7
	mov	edx, DWORD PTR AR_GPIO_OUTPUT_MUX_AS_OUTPUT[rip]
	mov	rdi, r13
	call	ath9k_hw_cfg_output@PLT
	mov	rsi, QWORD PTR 16[r13]
	xor	edx, edx
	mov	rdi, r13
	call	ath9k_hw_set_gpio@PLT
.L7:
	mov	rdi, QWORD PTR 8[rbp]
	call	ath9k_cmn_init_crypto@PLT
	mov	rdi, r12
	call	spin_unlock_bh@PLT
	mov	rdi, rbp
	call	mutex_unlock@PLT
	mov	rdi, rbp
	call	ath9k_ps_restore@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	or	eax, DWORD PTR ATH9K_INT_RX[rip]
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L16:
	mov	ecx, DWORD PTR [rbx]
	mov	edx, eax
	lea	rsi, .LC1[rip]
	mov	rdi, r14
	call	ath_err@PLT
	mov	DWORD PTR 0[r13], 0
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	ath9k_start, .-ath9k_start
	.comm	SC_OP_INVALID,4,4
	.comm	CONFIG,4,4
	.comm	ATH9K_INT_TX,4,4
	.comm	ATH9K_INT_RXORN,4,4
	.comm	ATH9K_INT_RXLP,4,4
	.comm	ATH9K_INT_RXHP,4,4
	.comm	ATH9K_INT_RXEOL,4,4
	.comm	ATH9K_INT_RX,4,4
	.comm	ATH9K_INT_GTT,4,4
	.comm	ATH9K_INT_GLOBAL,4,4
	.comm	ATH9K_INT_FATAL,4,4
	.comm	ATH9K_INT_CST,4,4
	.comm	ATH9K_INT_BB_WATCHDOG,4,4
	.comm	ATH9K_HW_CAP_HT,4,4
	.comm	ATH9K_HW_CAP_EDMA,4,4
	.comm	AR_GPIO_OUTPUT_MUX_AS_OUTPUT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_main.c_ath9k_start.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Starting driver with initial channel: %d MHz\012\000"
	.align	2
.LC1:
	.ascii	"Unable to reset hardware; reset status %d (freq %u "
	.ascii	"MHz)\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ath9k_start, %function
ath9k_start:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r5, [r0, #4]
	mov	r7, r0
	ldr	r4, [r5, #8]
	add	r6, r5, #4
	mov	r0, r4
	bl	ath9k_hw_common
	ldr	r9, [r7]
	ldr	r2, .L17
	ldr	r3, [r9]
	ldr	r1, [r2]
	ldr	r2, .L17+4
	mov	r8, r0
	bl	ath_dbg
	mov	r0, r5
	bl	ath9k_ps_wakeup
	mov	r0, r5
	bl	mutex_lock
	mov	r1, r4
	mov	r0, r7
	bl	ath9k_cmn_get_curchannel
	mov	r7, r0
	mov	r1, #0
	mov	r0, r4
	bl	ath9k_hw_configpcipowersave
	mov	r0, r6
	bl	spin_lock_bh
	mvn	r1, #0
	add	r0, r4, #24
	bl	atomic_set
	ldr	r2, [r4, #20]
	mov	r1, r7
	mov	r0, r4
	mov	r3, #0
	bl	ath9k_hw_reset
	subs	r2, r0, #0
	bne	.L16
.L2:
	ldr	r2, .L17+8
	ldr	r3, .L17+12
	ldr	r1, .L17+16
	ldr	r0, [r2]
	ldr	r3, [r3]
	ldr	r2, .L17+20
	ldr	r1, [r1]
	ldr	r2, [r2]
	orr	r3, r3, r0
	ldr	r0, .L17+24
	orr	r3, r3, r1
	ldr	r1, .L17+28
	ldr	r0, [r0]
	orr	r3, r3, r2
	ldr	r2, [r4, #16]
	ldr	r1, [r1]
	tst	r2, r0
	orr	r3, r3, r1
	ldrne	ip, .L17+32
	ldrne	r1, .L17+36
	ldrne	r0, .L17+40
	ldrne	r1, [r1]
	ldrne	ip, [ip]
	ldreq	r1, .L17+44
	ldrne	r0, [r0]
	orrne	r1, r1, ip
	ldreq	r1, [r1]
	orrne	r1, r1, r0
	orr	r3, r3, r1
	ldr	r1, .L17+48
	ldr	r0, .L17+52
	ldr	r1, [r1]
	ldr	r0, [r0]
	tst	r2, r1
	ldrne	r2, .L17+56
	orr	r3, r3, r0
	ldrne	r2, [r2]
	str	r3, [r4, #4]
	orrne	r3, r2, r3
	strne	r3, [r4, #4]
	mov	r0, r5
	bl	ath_mci_enable
	ldr	r3, .L17+60
	add	r1, r5, #12
	ldr	r0, [r3]
	bl	clear_bit
	mov	r1, #0
	ldr	r3, [r5, #8]
	mov	r0, r5
	str	r1, [r3, #8]
	bl	ath_complete_reset
	ldr	r1, [r4, #12]
	cmp	r0, #0
	streq	r0, [r4]
	cmp	r1, #0
	blt	.L7
	ldr	r3, .L17+64
	mov	r0, r4
	ldr	r2, [r3]
	bl	ath9k_hw_cfg_output
	mov	r2, #0
	mov	r0, r4
	ldr	r1, [r4, #12]
	bl	ath9k_hw_set_gpio
.L7:
	ldr	r0, [r5, #8]
	bl	ath9k_cmn_init_crypto
	mov	r0, r6
	bl	spin_unlock_bh
	mov	r0, r5
	bl	mutex_unlock
	mov	r0, r5
	bl	ath9k_ps_restore
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L16:
	ldr	r3, [r9]
	mov	r0, r8
	ldr	r1, .L17+68
	bl	ath_err
	mov	r3, #0
	str	r3, [r4]
	b	.L2
.L18:
	.align	2
.L17:
	.word	CONFIG
	.word	.LC0
	.word	ATH9K_INT_RXEOL
	.word	ATH9K_INT_TX
	.word	ATH9K_INT_RXORN
	.word	ATH9K_INT_FATAL
	.word	ATH9K_HW_CAP_EDMA
	.word	ATH9K_INT_GLOBAL
	.word	ATH9K_INT_RXLP
	.word	ATH9K_INT_RXHP
	.word	ATH9K_INT_BB_WATCHDOG
	.word	ATH9K_INT_RX
	.word	ATH9K_HW_CAP_HT
	.word	ATH9K_INT_GTT
	.word	ATH9K_INT_CST
	.word	SC_OP_INVALID
	.word	AR_GPIO_OUTPUT_MUX_AS_OUTPUT
	.word	.LC1
	.size	ath9k_start, .-ath9k_start
	.comm	SC_OP_INVALID,4,4
	.comm	CONFIG,4,4
	.comm	ATH9K_INT_TX,4,4
	.comm	ATH9K_INT_RXORN,4,4
	.comm	ATH9K_INT_RXLP,4,4
	.comm	ATH9K_INT_RXHP,4,4
	.comm	ATH9K_INT_RXEOL,4,4
	.comm	ATH9K_INT_RX,4,4
	.comm	ATH9K_INT_GTT,4,4
	.comm	ATH9K_INT_GLOBAL,4,4
	.comm	ATH9K_INT_FATAL,4,4
	.comm	ATH9K_INT_CST,4,4
	.comm	ATH9K_INT_BB_WATCHDOG,4,4
	.comm	ATH9K_HW_CAP_HT,4,4
	.comm	ATH9K_HW_CAP_EDMA,4,4
	.comm	AR_GPIO_OUTPUT_MUX_AS_OUTPUT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
