	.file	"extr_xilinx_axienet_main.c_axienet_dma_err_handler.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	axienet_dma_err_handler, @function
axienet_dma_err_handler:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	r13, QWORD PTR 96[rdi]
	mov	esi, DWORD PTR XAE_OPTION_TXEN[rip]
	or	esi, DWORD PTR XAE_OPTION_RXEN[rip]
	not	esi
	and	esi, DWORD PTR [rdi]
	mov	rdi, r13
	call	axienet_setoptions@PLT
	mov	rdi, QWORD PTR 88[rbp]
	call	mutex_lock@PLT
	mov	rdi, rbp
	call	axienet_mdio_disable@PLT
	mov	rdi, rbp
	call	__axienet_device_reset@PLT
	mov	rdi, rbp
	call	axienet_mdio_enable@PLT
	mov	rdi, QWORD PTR 88[rbp]
	call	mutex_unlock@PLT
	cmp	QWORD PTR 8[rbp], 0
	je	.L2
	xor	r12d, r12d
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rdi, QWORD PTR 56[rbx]
	test	rdi, rdi
	je	.L4
	call	dev_kfree_skb_irq@PLT
.L4:
	mov	QWORD PTR 64[rbx], 0
	add	r12, 1
	mov	DWORD PTR [rbx], 0
	mov	QWORD PTR 48[rbx], 0
	mov	QWORD PTR 40[rbx], 0
	mov	QWORD PTR 32[rbx], 0
	mov	QWORD PTR 24[rbx], 0
	mov	QWORD PTR 16[rbx], 0
	mov	QWORD PTR 8[rbx], 0
	mov	QWORD PTR 56[rbx], 0
	cmp	QWORD PTR 8[rbp], r12
	jbe	.L2
.L5:
	mov	rdx, QWORD PTR 80[rbp]
	lea	rax, [r12+r12*8]
	lea	rbx, [rdx+rax*8]
	mov	rsi, QWORD PTR 64[rbx]
	test	rsi, rsi
	je	.L3
	mov	ecx, DWORD PTR DMA_TO_DEVICE[rip]
	mov	edi, DWORD PTR 0[r13]
	mov	edx, DWORD PTR [rbx]
	and	edx, DWORD PTR XAXIDMA_BD_CTRL_LENGTH_MASK[rip]
	call	dma_unmap_single@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rdx, QWORD PTR 16[rbp]
	test	rdx, rdx
	je	.L6
	mov	rcx, QWORD PTR 72[rbp]
	lea	rdx, [rdx+rdx*8]
	lea	rax, 8[rcx]
	lea	rdx, 8[rcx+rdx*8]
	.p2align 4,,10
	.p2align 3
.L7:
	mov	QWORD PTR 40[rax], 0
	add	rax, 72
	mov	QWORD PTR -40[rax], 0
	mov	QWORD PTR -48[rax], 0
	mov	QWORD PTR -56[rax], 0
	mov	QWORD PTR -64[rax], 0
	mov	QWORD PTR -72[rax], 0
	cmp	rax, rdx
	jne	.L7
.L6:
	mov	QWORD PTR 64[rbp], 0
	mov	esi, DWORD PTR XAXIDMA_RX_CR_OFFSET[rip]
	mov	rdi, rbp
	mov	QWORD PTR 56[rbp], 0
	mov	QWORD PTR 48[rbp], 0
	call	axienet_dma_in32@PLT
	mov	rcx, QWORD PTR XAXIDMA_COALESCE_SHIFT[rip]
	mov	rdx, QWORD PTR XAXIDMA_DFT_RX_THRESHOLD[rip]
	mov	rdi, rbp
	mov	r8, rax
	mov	rax, QWORD PTR XAXIDMA_COALESCE_MASK[rip]
	mov	esi, DWORD PTR XAXIDMA_RX_CR_OFFSET[rip]
	sal	rdx, cl
	mov	rcx, QWORD PTR XAXIDMA_DELAY_SHIFT[rip]
	not	rax
	and	rax, r8
	or	rdx, rax
	mov	rax, QWORD PTR XAXIDMA_DELAY_MASK[rip]
	not	rax
	and	rax, rdx
	mov	rdx, QWORD PTR XAXIDMA_DFT_RX_WAITBOUND[rip]
	sal	rdx, cl
	or	rdx, QWORD PTR XAXIDMA_IRQ_ALL_MASK[rip]
	or	rdx, rax
	call	axienet_dma_out32@PLT
	mov	esi, DWORD PTR XAXIDMA_TX_CR_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_dma_in32@PLT
	mov	rcx, QWORD PTR XAXIDMA_COALESCE_SHIFT[rip]
	mov	rdx, QWORD PTR XAXIDMA_DFT_TX_THRESHOLD[rip]
	mov	rdi, rbp
	mov	r8, rax
	mov	rax, QWORD PTR XAXIDMA_COALESCE_MASK[rip]
	mov	esi, DWORD PTR XAXIDMA_TX_CR_OFFSET[rip]
	sal	rdx, cl
	mov	rcx, QWORD PTR XAXIDMA_DELAY_SHIFT[rip]
	not	rax
	and	rax, r8
	or	rdx, rax
	mov	rax, QWORD PTR XAXIDMA_DELAY_MASK[rip]
	not	rax
	and	rax, rdx
	mov	rdx, QWORD PTR XAXIDMA_DFT_TX_WAITBOUND[rip]
	sal	rdx, cl
	or	rdx, QWORD PTR XAXIDMA_IRQ_ALL_MASK[rip]
	or	rdx, rax
	call	axienet_dma_out32@PLT
	mov	rdx, QWORD PTR 24[rbp]
	mov	esi, DWORD PTR XAXIDMA_RX_CDESC_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_dma_out32@PLT
	mov	esi, DWORD PTR XAXIDMA_RX_CR_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_dma_in32@PLT
	mov	esi, DWORD PTR XAXIDMA_RX_CR_OFFSET[rip]
	or	rax, QWORD PTR XAXIDMA_CR_RUNSTOP_MASK[rip]
	mov	rdi, rbp
	mov	rdx, rax
	call	axienet_dma_out32@PLT
	mov	rax, QWORD PTR 16[rbp]
	mov	rdx, QWORD PTR 24[rbp]
	mov	rdi, rbp
	mov	esi, DWORD PTR XAXIDMA_RX_TDESC_OFFSET[rip]
	lea	rax, [rax+rax*8]
	lea	rdx, -72[rdx+rax*8]
	call	axienet_dma_out32@PLT
	mov	rdx, QWORD PTR 32[rbp]
	mov	esi, DWORD PTR XAXIDMA_TX_CDESC_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_dma_out32@PLT
	mov	esi, DWORD PTR XAXIDMA_TX_CR_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_dma_in32@PLT
	mov	esi, DWORD PTR XAXIDMA_TX_CR_OFFSET[rip]
	or	rax, QWORD PTR XAXIDMA_CR_RUNSTOP_MASK[rip]
	mov	rdi, rbp
	mov	rdx, rax
	call	axienet_dma_out32@PLT
	mov	esi, DWORD PTR XAE_RCW1_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_ior@PLT
	mov	rdx, QWORD PTR XAE_RCW1_RX_MASK[rip]
	mov	esi, DWORD PTR XAE_RCW1_OFFSET[rip]
	mov	rdi, rbp
	not	rdx
	and	rdx, rax
	call	axienet_iow@PLT
	mov	esi, DWORD PTR XAE_IP_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_ior@PLT
	mov	rdx, QWORD PTR XAE_INT_RXRJECT_MASK[rip]
	test	rdx, rax
	jne	.L27
.L8:
	xor	edx, edx
	cmp	QWORD PTR 40[rbp], 0
	jle	.L9
	mov	rdx, QWORD PTR XAE_INT_RECV_ERROR_MASK[rip]
.L9:
	mov	esi, DWORD PTR XAE_IE_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_iow@PLT
	mov	rdx, QWORD PTR XAE_FCC_FCRX_MASK[rip]
	mov	esi, DWORD PTR XAE_FCC_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_iow@PLT
	mov	esi, DWORD PTR XAE_OPTION_TXEN[rip]
	mov	rdi, r13
	or	esi, DWORD PTR XAE_OPTION_RXEN[rip]
	not	esi
	and	esi, DWORD PTR 0[rbp]
	call	axienet_setoptions@PLT
	xor	esi, esi
	mov	rdi, r13
	call	axienet_set_mac_address@PLT
	mov	rdi, r13
	call	axienet_set_multicast_list@PLT
	mov	esi, DWORD PTR 0[rbp]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, r13
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	axienet_setoptions@PLT
	.p2align 4,,10
	.p2align 3
.L27:
	.cfi_restore_state
	mov	esi, DWORD PTR XAE_IS_OFFSET[rip]
	mov	rdi, rbp
	call	axienet_iow@PLT
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	axienet_dma_err_handler, .-axienet_dma_err_handler
	.comm	XAXIDMA_TX_CR_OFFSET,4,4
	.comm	XAXIDMA_TX_CDESC_OFFSET,4,4
	.comm	XAXIDMA_RX_TDESC_OFFSET,4,4
	.comm	XAXIDMA_RX_CR_OFFSET,4,4
	.comm	XAXIDMA_RX_CDESC_OFFSET,4,4
	.comm	XAXIDMA_IRQ_ALL_MASK,8,8
	.comm	XAXIDMA_DFT_TX_WAITBOUND,8,8
	.comm	XAXIDMA_DFT_TX_THRESHOLD,8,8
	.comm	XAXIDMA_DFT_RX_WAITBOUND,8,8
	.comm	XAXIDMA_DFT_RX_THRESHOLD,8,8
	.comm	XAXIDMA_DELAY_SHIFT,8,8
	.comm	XAXIDMA_DELAY_MASK,8,8
	.comm	XAXIDMA_CR_RUNSTOP_MASK,8,8
	.comm	XAXIDMA_COALESCE_SHIFT,8,8
	.comm	XAXIDMA_COALESCE_MASK,8,8
	.comm	XAXIDMA_BD_CTRL_LENGTH_MASK,4,4
	.comm	XAE_RCW1_RX_MASK,8,8
	.comm	XAE_RCW1_OFFSET,4,4
	.comm	XAE_OPTION_TXEN,4,4
	.comm	XAE_OPTION_RXEN,4,4
	.comm	XAE_IS_OFFSET,4,4
	.comm	XAE_IP_OFFSET,4,4
	.comm	XAE_INT_RXRJECT_MASK,8,8
	.comm	XAE_INT_RECV_ERROR_MASK,8,8
	.comm	XAE_IE_OFFSET,4,4
	.comm	XAE_FCC_OFFSET,4,4
	.comm	XAE_FCC_FCRX_MASK,8,8
	.comm	DMA_TO_DEVICE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_xilinx_axienet_main.c_axienet_dma_err_handler.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	axienet_dma_err_handler, %function
axienet_dma_err_handler:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r6, r0
	ldr	r3, .L31
	ldr	r2, .L31+4
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, [r0]
	ldr	r9, [r0, #48]
	orr	r3, r3, r2
	bic	r1, r1, r3
	mov	r0, r9
	bl	axienet_setoptions
	ldr	r0, [r6, #44]
	bl	mutex_lock
	mov	r0, r6
	bl	axienet_mdio_disable
	mov	r0, r6
	bl	__axienet_device_reset
	mov	r0, r6
	bl	axienet_mdio_enable
	ldr	r0, [r6, #44]
	bl	mutex_unlock
	ldr	r3, [r6, #4]
	cmp	r3, #0
	beq	.L2
	mov	r7, #0
	ldr	fp, .L31+8
	mov	r8, r7
	mov	r5, r7
	ldr	r10, .L31+12
	b	.L5
.L3:
	ldr	r0, [r4, #28]
	add	r7, r7, #36
	cmp	r0, #0
	beq	.L4
	bl	dev_kfree_skb_irq
.L4:
	ldr	r3, [r6, #4]
	str	r5, [r4, #32]
	cmp	r3, r8
	str	r5, [r4]
	str	r5, [r4, #24]
	str	r5, [r4, #20]
	str	r5, [r4, #16]
	str	r5, [r4, #12]
	str	r5, [r4, #8]
	str	r5, [r4, #4]
	str	r5, [r4, #28]
	bls	.L2
.L5:
	ldr	r3, [r6, #40]
	add	r8, r8, #1
	add	r4, r3, r7
	ldr	r1, [r4, #32]
	cmp	r1, #0
	beq	.L3
	ldr	r2, [r3, r7]
	ldr	r3, [r10]
	ldr	r0, [r9]
	and	r2, r2, r3
	ldr	r3, [fp]
	bl	dma_unmap_single
	b	.L3
.L2:
	ldr	r1, [r6, #8]
	cmp	r1, #0
	beq	.L6
	mov	r2, #0
	ldr	r3, [r6, #36]
	add	r1, r1, r1, lsl #3
	add	r1, r3, r1, lsl #2
.L7:
	str	r2, [r3, #24]
	str	r2, [r3, #20]
	str	r2, [r3, #16]
	str	r2, [r3, #12]
	str	r2, [r3, #8]
	str	r2, [r3, #4]
	add	r3, r3, #36
	cmp	r1, r3
	bne	.L7
.L6:
	mov	r3, #0
	ldr	r5, .L31+16
	str	r3, [r6, #32]
	ldr	r1, [r5]
	str	r3, [r6, #28]
	str	r3, [r6, #24]
	mov	r0, r6
	bl	axienet_dma_in32
	ldr	r3, .L31+20
	ldr	r2, .L31+24
	ldr	fp, .L31+28
	ldr	r1, [r3]
	ldr	r4, [r2]
	ldr	r10, .L31+32
	ldr	r2, [fp]
	ldr	r8, .L31+36
	ldr	r7, .L31+40
	ldr	ip, .L31+44
	bic	r1, r0, r1
	ldr	lr, [r10]
	ldr	ip, [ip]
	ldr	r0, [r8]
	orr	r1, r1, r4, lsl r2
	ldr	r2, [r7]
	bic	r1, r1, lr
	orr	r2, r2, ip, lsl r0
	ldr	r4, .L31+48
	orr	r2, r2, r1
	mov	r0, r6
	ldr	r1, [r5]
	bl	axienet_dma_out32
	ldr	r1, [r4]
	mov	r0, r6
	bl	axienet_dma_in32
	ldr	r3, .L31+20
	ldr	r2, .L31+52
	ldr	r3, [r3]
	ldr	lr, .L31+56
	ldr	ip, [r2]
	ldr	r1, [fp]
	ldr	lr, [lr]
	ldr	r7, [r7]
	bic	r0, r0, r3
	ldr	r10, [r10]
	ldr	r2, [r8]
	orr	r0, r0, ip, lsl r1
	orr	r2, r7, lr, lsl r2
	bic	r0, r0, r10
	orr	r2, r2, r0
	ldr	r1, [r4]
	mov	r0, r6
	bl	axienet_dma_out32
	ldr	r3, .L31+60
	ldr	r2, [r6, #12]
	ldr	r1, [r3]
	mov	r0, r6
	bl	axienet_dma_out32
	ldr	r1, [r5]
	mov	r0, r6
	bl	axienet_dma_in32
	mov	r2, r0
	ldr	r7, .L31+64
	ldr	r1, [r5]
	ldr	r3, [r7]
	mov	r0, r6
	orr	r2, r2, r3
	bl	axienet_dma_out32
	ldr	r2, [r6, #12]
	ldr	r3, [r6, #8]
	ldr	r1, .L31+68
	add	r3, r3, r3, lsl #3
	sub	r2, r2, #36
	add	r2, r2, r3, lsl #2
	ldr	r1, [r1]
	mov	r0, r6
	bl	axienet_dma_out32
	ldr	r3, .L31+72
	ldr	r2, [r6, #16]
	ldr	r1, [r3]
	mov	r0, r6
	bl	axienet_dma_out32
	ldr	r1, [r4]
	mov	r0, r6
	bl	axienet_dma_in32
	ldr	r2, [r7]
	ldr	r5, .L31+76
	orr	r2, r0, r2
	ldr	r1, [r4]
	mov	r0, r6
	bl	axienet_dma_out32
	ldr	r1, [r5]
	mov	r0, r6
	bl	axienet_ior
	mov	r3, r0
	ldr	r2, .L31+80
	ldr	r1, [r5]
	ldr	r2, [r2]
	mov	r0, r6
	bic	r2, r3, r2
	bl	axienet_iow
	ldr	r3, .L31+84
	mov	r0, r6
	ldr	r1, [r3]
	bl	axienet_ior
	ldr	r3, .L31+88
	ldr	r2, [r3]
	tst	r2, r0
	bne	.L30
.L8:
	ldr	r2, [r6, #20]
	ldr	r3, .L31+92
	cmp	r2, #0
	ldr	r1, [r3]
	ldrgt	r3, .L31+96
	movle	r2, #0
	ldrgt	r2, [r3]
	mov	r0, r6
	bl	axienet_iow
	ldr	r3, .L31+100
	ldr	r2, .L31+104
	ldr	r1, [r3]
	mov	r0, r6
	ldr	r2, [r2]
	bl	axienet_iow
	ldr	r3, .L31
	ldr	r2, .L31+4
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, [r6]
	orr	r3, r3, r2
	bic	r1, r1, r3
	mov	r0, r9
	bl	axienet_setoptions
	mov	r1, #0
	mov	r0, r9
	bl	axienet_set_mac_address
	mov	r0, r9
	bl	axienet_set_multicast_list
	mov	r0, r9
	ldr	r1, [r6]
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	axienet_setoptions
.L30:
	ldr	r3, .L31+108
	mov	r0, r6
	ldr	r1, [r3]
	bl	axienet_iow
	b	.L8
.L32:
	.align	2
.L31:
	.word	XAE_OPTION_TXEN
	.word	XAE_OPTION_RXEN
	.word	DMA_TO_DEVICE
	.word	XAXIDMA_BD_CTRL_LENGTH_MASK
	.word	XAXIDMA_RX_CR_OFFSET
	.word	XAXIDMA_COALESCE_MASK
	.word	XAXIDMA_DFT_RX_THRESHOLD
	.word	XAXIDMA_COALESCE_SHIFT
	.word	XAXIDMA_DELAY_MASK
	.word	XAXIDMA_DELAY_SHIFT
	.word	XAXIDMA_IRQ_ALL_MASK
	.word	XAXIDMA_DFT_RX_WAITBOUND
	.word	XAXIDMA_TX_CR_OFFSET
	.word	XAXIDMA_DFT_TX_THRESHOLD
	.word	XAXIDMA_DFT_TX_WAITBOUND
	.word	XAXIDMA_RX_CDESC_OFFSET
	.word	XAXIDMA_CR_RUNSTOP_MASK
	.word	XAXIDMA_RX_TDESC_OFFSET
	.word	XAXIDMA_TX_CDESC_OFFSET
	.word	XAE_RCW1_OFFSET
	.word	XAE_RCW1_RX_MASK
	.word	XAE_IP_OFFSET
	.word	XAE_INT_RXRJECT_MASK
	.word	XAE_IE_OFFSET
	.word	XAE_INT_RECV_ERROR_MASK
	.word	XAE_FCC_OFFSET
	.word	XAE_FCC_FCRX_MASK
	.word	XAE_IS_OFFSET
	.size	axienet_dma_err_handler, .-axienet_dma_err_handler
	.comm	XAXIDMA_TX_CR_OFFSET,4,4
	.comm	XAXIDMA_TX_CDESC_OFFSET,4,4
	.comm	XAXIDMA_RX_TDESC_OFFSET,4,4
	.comm	XAXIDMA_RX_CR_OFFSET,4,4
	.comm	XAXIDMA_RX_CDESC_OFFSET,4,4
	.comm	XAXIDMA_IRQ_ALL_MASK,4,4
	.comm	XAXIDMA_DFT_TX_WAITBOUND,4,4
	.comm	XAXIDMA_DFT_TX_THRESHOLD,4,4
	.comm	XAXIDMA_DFT_RX_WAITBOUND,4,4
	.comm	XAXIDMA_DFT_RX_THRESHOLD,4,4
	.comm	XAXIDMA_DELAY_SHIFT,4,4
	.comm	XAXIDMA_DELAY_MASK,4,4
	.comm	XAXIDMA_CR_RUNSTOP_MASK,4,4
	.comm	XAXIDMA_COALESCE_SHIFT,4,4
	.comm	XAXIDMA_COALESCE_MASK,4,4
	.comm	XAXIDMA_BD_CTRL_LENGTH_MASK,4,4
	.comm	XAE_RCW1_RX_MASK,4,4
	.comm	XAE_RCW1_OFFSET,4,4
	.comm	XAE_OPTION_TXEN,4,4
	.comm	XAE_OPTION_RXEN,4,4
	.comm	XAE_IS_OFFSET,4,4
	.comm	XAE_IP_OFFSET,4,4
	.comm	XAE_INT_RXRJECT_MASK,4,4
	.comm	XAE_INT_RECV_ERROR_MASK,4,4
	.comm	XAE_IE_OFFSET,4,4
	.comm	XAE_FCC_OFFSET,4,4
	.comm	XAE_FCC_FCRX_MASK,4,4
	.comm	DMA_TO_DEVICE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
