	.file	"extr_ucode_loader.c_brcms_ucode_data_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	brcms_ucode_data_init
	.type	brcms_ucode_data_init, @function
brcms_ucode_data_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	r12, rsi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	brcms_check_firmwares@PLT
	test	eax, eax
	jns	.L5
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	edx, DWORD PTR D11LCN0BSINITVALS24[rip]
	lea	rsi, 56[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11LCN0INITVALS24[rip]
	lea	rsi, 52[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11LCN1BSINITVALS24[rip]
	lea	rsi, 48[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11LCN1INITVALS24[rip]
	lea	rsi, 44[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11LCN2BSINITVALS24[rip]
	lea	rsi, 40[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11LCN2INITVALS24[rip]
	lea	rsi, 36[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11N0ABSINITVALS16[rip]
	lea	rsi, 32[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11N0BSINITVALS16[rip]
	lea	rsi, 28[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11N0INITVALS16[rip]
	lea	rsi, 24[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11UCODE_OVERSIGHT16_MIMO[rip]
	lea	rsi, 20[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11UCODE_OVERSIGHT16_MIMOSZ[rip]
	lea	rsi, 16[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_uint@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11UCODE_OVERSIGHT24_LCN[rip]
	lea	rsi, 12[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11UCODE_OVERSIGHT24_LCNSZ[rip]
	lea	rsi, 8[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_uint@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11UCODE_OVERSIGHT_BOMMAJOR[rip]
	lea	rsi, 4[r12]
	mov	rdi, rbp
	call	brcms_ucode_init_buf@PLT
	test	eax, eax
	js	.L1
	mov	edx, DWORD PTR D11UCODE_OVERSIGHT_BOMMINOR[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 24
	mov	rsi, r12
	mov	rdi, rbp
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	brcms_ucode_init_buf@PLT
	.cfi_endproc
.LFE0:
	.size	brcms_ucode_data_init, .-brcms_ucode_data_init
	.comm	D11UCODE_OVERSIGHT_BOMMINOR,4,4
	.comm	D11UCODE_OVERSIGHT_BOMMAJOR,4,4
	.comm	D11UCODE_OVERSIGHT24_LCNSZ,4,4
	.comm	D11UCODE_OVERSIGHT24_LCN,4,4
	.comm	D11UCODE_OVERSIGHT16_MIMOSZ,4,4
	.comm	D11UCODE_OVERSIGHT16_MIMO,4,4
	.comm	D11N0INITVALS16,4,4
	.comm	D11N0BSINITVALS16,4,4
	.comm	D11N0ABSINITVALS16,4,4
	.comm	D11LCN2INITVALS24,4,4
	.comm	D11LCN2BSINITVALS24,4,4
	.comm	D11LCN1INITVALS24,4,4
	.comm	D11LCN1BSINITVALS24,4,4
	.comm	D11LCN0INITVALS24,4,4
	.comm	D11LCN0BSINITVALS24,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ucode_loader.c_brcms_ucode_data_init.c"
	.text
	.align	2
	.global	brcms_ucode_data_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	brcms_ucode_data_init, %function
brcms_ucode_data_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r5, r1
	mov	r4, r0
	bl	brcms_check_firmwares
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #56
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+4
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #52
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+8
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #48
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+12
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #44
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+16
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #40
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+20
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #36
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+24
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #32
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+28
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #28
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+32
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #24
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+36
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #20
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+40
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #16
	bl	brcms_ucode_init_uint
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+44
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #12
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+48
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #8
	bl	brcms_ucode_init_uint
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+52
	mov	r0, r4
	ldr	r2, [r3]
	add	r1, r5, #4
	bl	brcms_ucode_init_buf
	cmp	r0, #0
	poplt	{r4, r5, r6, pc}
	ldr	r3, .L5+56
	mov	r1, r5
	mov	r0, r4
	pop	{r4, r5, r6, lr}
	ldr	r2, [r3]
	b	brcms_ucode_init_buf
.L6:
	.align	2
.L5:
	.word	D11LCN0BSINITVALS24
	.word	D11LCN0INITVALS24
	.word	D11LCN1BSINITVALS24
	.word	D11LCN1INITVALS24
	.word	D11LCN2BSINITVALS24
	.word	D11LCN2INITVALS24
	.word	D11N0ABSINITVALS16
	.word	D11N0BSINITVALS16
	.word	D11N0INITVALS16
	.word	D11UCODE_OVERSIGHT16_MIMO
	.word	D11UCODE_OVERSIGHT16_MIMOSZ
	.word	D11UCODE_OVERSIGHT24_LCN
	.word	D11UCODE_OVERSIGHT24_LCNSZ
	.word	D11UCODE_OVERSIGHT_BOMMAJOR
	.word	D11UCODE_OVERSIGHT_BOMMINOR
	.size	brcms_ucode_data_init, .-brcms_ucode_data_init
	.comm	D11UCODE_OVERSIGHT_BOMMINOR,4,4
	.comm	D11UCODE_OVERSIGHT_BOMMAJOR,4,4
	.comm	D11UCODE_OVERSIGHT24_LCNSZ,4,4
	.comm	D11UCODE_OVERSIGHT24_LCN,4,4
	.comm	D11UCODE_OVERSIGHT16_MIMOSZ,4,4
	.comm	D11UCODE_OVERSIGHT16_MIMO,4,4
	.comm	D11N0INITVALS16,4,4
	.comm	D11N0BSINITVALS16,4,4
	.comm	D11N0ABSINITVALS16,4,4
	.comm	D11LCN2INITVALS24,4,4
	.comm	D11LCN2BSINITVALS24,4,4
	.comm	D11LCN1INITVALS24,4,4
	.comm	D11LCN1BSINITVALS24,4,4
	.comm	D11LCN0INITVALS24,4,4
	.comm	D11LCN0BSINITVALS24,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
