	.file	"extr_da7218.c_da7218_set_dai_pll.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"PLL input clock %d below valid range\n"
	.align 8
.LC1:
	.string	"PLL input clock %d above valid range\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Invalid PLL config\n"
	.text
	.p2align 4
	.type	da7218_set_dai_pll, @function
da7218_set_dai_pll:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, r8d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	r12, QWORD PTR [rdi]
	mov	ebx, edx
	mov	rdi, r12
	call	snd_soc_component_get_drvdata@PLT
	lea	rsi, .LC0[rip]
	mov	eax, DWORD PTR [rax]
	mov	edx, eax
	cmp	eax, 1999999
	jle	.L17
	cmp	eax, 4500000
	jg	.L4
	mov	r14d, DWORD PTR DA7218_PLL_INDIV_2_TO_4_5_MHZ[rip]
	mov	ecx, DWORD PTR DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL[rip]
.L5:
	cmp	ebx, 129
	je	.L10
.L21:
	cmp	ebx, 130
	je	.L11
	cmp	ebx, 128
	je	.L19
	mov	edi, DWORD PTR [r12]
	lea	rsi, .LC2[rip]
	xor	eax, eax
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	cmp	eax, 9000000
	jle	.L20
	cmp	eax, 18000000
	jg	.L7
	mov	r14d, DWORD PTR DA7218_PLL_INDIV_9_TO_18_MHZ[rip]
	mov	ecx, DWORD PTR DA7218_PLL_INDIV_9_TO_18_MHZ_VAL[rip]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L9:
	lea	rsi, .LC1[rip]
.L17:
	mov	edi, DWORD PTR [r12]
	xor	eax, eax
	call	dev_err@PLT
	mov	eax, DWORD PTR EINVAL[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L20:
	.cfi_restore_state
	mov	r14d, DWORD PTR DA7218_PLL_INDIV_4_5_TO_9_MHZ[rip]
	mov	ecx, DWORD PTR DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL[rip]
	cmp	ebx, 129
	jne	.L21
.L10:
	or	r14d, DWORD PTR DA7218_PLL_MODE_NORMAL[rip]
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L19:
	or	r14d, DWORD PTR DA7218_PLL_MODE_SRM[rip]
.L14:
	xor	edx, edx
	div	ecx
	xor	edx, edx
	mov	esi, eax
	mov	eax, r13d
	div	esi
	mov	rbx, rdx
	mov	r13d, eax
	sal	rbx, 13
	mov	rdi, rbx
	call	do_div@PLT
	mov	rdx, QWORD PTR DA7218_BYTE_MASK[rip]
	mov	rcx, QWORD PTR DA7218_BYTE_SHIFT[rip]
	mov	rdi, r12
	mov	esi, DWORD PTR DA7218_PLL_FRAC_TOP[rip]
	mov	r15d, edx
	and	r15d, ebx
	shr	rbx, cl
	and	edx, ebx
	call	snd_soc_component_write@PLT
	mov	esi, DWORD PTR DA7218_PLL_FRAC_BOT[rip]
	mov	edx, r15d
	mov	rdi, r12
	call	snd_soc_component_write@PLT
	mov	esi, DWORD PTR DA7218_PLL_INTEGER[rip]
	mov	edx, r13d
	mov	rdi, r12
	call	snd_soc_component_write@PLT
	mov	esi, DWORD PTR DA7218_PLL_CTRL[rip]
	mov	ecx, r14d
	mov	rdi, r12
	mov	edx, DWORD PTR DA7218_PLL_MODE_MASK[rip]
	or	edx, DWORD PTR DA7218_PLL_INDIV_MASK[rip]
	call	snd_soc_component_update_bits@PLT
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	mov	ecx, DWORD PTR DA7218_PLL_MODE_BYPASS[rip]
	mov	esi, DWORD PTR DA7218_PLL_CTRL[rip]
	mov	rdi, r12
	mov	edx, DWORD PTR DA7218_PLL_INDIV_MASK[rip]
	or	edx, DWORD PTR DA7218_PLL_MODE_MASK[rip]
	or	ecx, r14d
	call	snd_soc_component_update_bits@PLT
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	cmp	eax, 36000000
	jle	.L22
	cmp	eax, 54000000
	jg	.L9
	mov	r14d, DWORD PTR DA7218_PLL_INDIV_36_TO_54_MHZ[rip]
	mov	ecx, DWORD PTR DA7218_PLL_INDIV_36_TO_54_MHZ_VAL[rip]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L22:
	mov	r14d, DWORD PTR DA7218_PLL_INDIV_18_TO_36_MHZ[rip]
	mov	ecx, DWORD PTR DA7218_PLL_INDIV_18_TO_36_MHZ_VAL[rip]
	jmp	.L5
	.cfi_endproc
.LFE0:
	.size	da7218_set_dai_pll, .-da7218_set_dai_pll
	.comm	EINVAL,4,4
	.comm	DA7218_PLL_MODE_SRM,4,4
	.comm	DA7218_PLL_MODE_NORMAL,4,4
	.comm	DA7218_PLL_MODE_MASK,4,4
	.comm	DA7218_PLL_MODE_BYPASS,4,4
	.comm	DA7218_PLL_INTEGER,4,4
	.comm	DA7218_PLL_INDIV_MASK,4,4
	.comm	DA7218_PLL_INDIV_9_TO_18_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_9_TO_18_MHZ,4,4
	.comm	DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_4_5_TO_9_MHZ,4,4
	.comm	DA7218_PLL_INDIV_36_TO_54_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_36_TO_54_MHZ,4,4
	.comm	DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_2_TO_4_5_MHZ,4,4
	.comm	DA7218_PLL_INDIV_18_TO_36_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_18_TO_36_MHZ,4,4
	.comm	DA7218_PLL_FRAC_TOP,4,4
	.comm	DA7218_PLL_FRAC_BOT,4,4
	.comm	DA7218_PLL_CTRL,4,4
	.comm	DA7218_BYTE_SHIFT,8,8
	.comm	DA7218_BYTE_MASK,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_da7218.c_da7218_set_dai_pll.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"PLL input clock %d below valid range\012\000"
	.align	2
.LC1:
	.ascii	"PLL input clock %d above valid range\012\000"
	.align	2
.LC2:
	.ascii	"Invalid PLL config\012\000"
	.global	__aeabi_uidiv
	.global	__aeabi_uidivmod
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	da7218_set_dai_pll, %function
da7218_set_dai_pll:
	@ args = 4, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	ldr	r5, [r0]
	mov	r4, r2
	mov	r0, r5
	bl	snd_soc_component_get_drvdata
	ldr	r3, .L23
	ldr	r0, [r0]
	cmp	r0, r3
	blt	.L18
	ldr	r3, .L23+4
	cmp	r0, r3
	bgt	.L4
	ldr	r2, .L23+8
	ldr	r3, .L23+12
	ldr	r6, [r2]
	ldr	r1, [r3]
.L5:
	cmp	r4, #129
	beq	.L10
.L21:
	cmp	r4, #130
	beq	.L11
	cmp	r4, #128
	beq	.L19
	ldr	r0, [r5]
	ldr	r1, .L23+16
	bl	dev_err
	ldr	r3, .L23+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L4:
	ldr	r3, .L23+24
	cmp	r0, r3
	ble	.L20
	ldr	r3, .L23+28
	cmp	r0, r3
	bgt	.L7
	ldr	r2, .L23+32
	ldr	r3, .L23+36
	ldr	r6, [r2]
	ldr	r1, [r3]
	b	.L5
.L18:
	mov	r2, r0
	ldr	r1, .L23+40
	ldr	r0, [r5]
	bl	dev_err
	ldr	r3, .L23+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L20:
	ldr	r2, .L23+44
	ldr	r3, .L23+48
	cmp	r4, #129
	ldr	r6, [r2]
	ldr	r1, [r3]
	bne	.L21
.L10:
	ldr	r3, .L23+52
	ldr	r3, [r3]
	orr	r6, r6, r3
	b	.L14
.L19:
	ldr	r3, .L23+56
	ldr	r3, [r3]
	orr	r6, r6, r3
.L14:
	bl	__aeabi_uidiv
	mov	r8, r0
	ldr	r0, [sp, #32]
	mov	r1, r8
	bl	__aeabi_uidivmod
	mov	r7, r0
	lsr	r9, r1, #19
	lsl	r4, r1, #13
	mov	r2, r8
	mov	r1, r9
	mov	r0, r4
	bl	do_div
	ldr	r2, .L23+60
	ldr	r3, .L23+64
	ldr	ip, [r2]
	ldr	r3, [r3]
	lsr	r2, r4, ip
	rsb	r1, ip, #32
	orr	r2, r2, r9, lsl r1
	sub	ip, ip, #32
	ldr	r1, .L23+68
	orr	r2, r2, r9, lsr ip
	and	r2, r2, r3
	mov	r0, r5
	ldr	r1, [r1]
	and	r4, r4, r3
	bl	snd_soc_component_write
	ldr	r3, .L23+72
	mov	r2, r4
	ldr	r1, [r3]
	mov	r0, r5
	bl	snd_soc_component_write
	ldr	r3, .L23+76
	mov	r2, r7
	ldr	r1, [r3]
	mov	r0, r5
	bl	snd_soc_component_write
	ldr	r2, .L23+80
	ldr	r3, .L23+84
	ldr	ip, [r2]
	ldr	r1, .L23+88
	ldr	r2, [r3]
	mov	r0, r5
	mov	r3, r6
	ldr	r1, [r1]
	orr	r2, ip, r2
	bl	snd_soc_component_update_bits
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L11:
	ldr	r1, .L23+84
	ldr	r3, .L23+92
	ldr	r2, .L23+80
	ldr	ip, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L23+88
	mov	r0, r5
	ldr	r1, [r1]
	orr	r3, r6, r3
	orr	r2, ip, r2
	bl	snd_soc_component_update_bits
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L7:
	ldr	r3, .L23+96
	cmp	r0, r3
	ble	.L22
	ldr	r3, .L23+100
	cmp	r0, r3
	bgt	.L9
	ldr	r2, .L23+104
	ldr	r3, .L23+108
	ldr	r6, [r2]
	ldr	r1, [r3]
	b	.L5
.L22:
	ldr	r2, .L23+112
	ldr	r3, .L23+116
	ldr	r6, [r2]
	ldr	r1, [r3]
	b	.L5
.L9:
	mov	r2, r0
	ldr	r1, .L23+120
	ldr	r0, [r5]
	bl	dev_err
	ldr	r3, .L23+20
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L24:
	.align	2
.L23:
	.word	2000000
	.word	4500000
	.word	DA7218_PLL_INDIV_2_TO_4_5_MHZ
	.word	DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL
	.word	.LC2
	.word	EINVAL
	.word	9000000
	.word	18000000
	.word	DA7218_PLL_INDIV_9_TO_18_MHZ
	.word	DA7218_PLL_INDIV_9_TO_18_MHZ_VAL
	.word	.LC0
	.word	DA7218_PLL_INDIV_4_5_TO_9_MHZ
	.word	DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL
	.word	DA7218_PLL_MODE_NORMAL
	.word	DA7218_PLL_MODE_SRM
	.word	DA7218_BYTE_SHIFT
	.word	DA7218_BYTE_MASK
	.word	DA7218_PLL_FRAC_TOP
	.word	DA7218_PLL_FRAC_BOT
	.word	DA7218_PLL_INTEGER
	.word	DA7218_PLL_MODE_MASK
	.word	DA7218_PLL_INDIV_MASK
	.word	DA7218_PLL_CTRL
	.word	DA7218_PLL_MODE_BYPASS
	.word	36000000
	.word	54000000
	.word	DA7218_PLL_INDIV_36_TO_54_MHZ
	.word	DA7218_PLL_INDIV_36_TO_54_MHZ_VAL
	.word	DA7218_PLL_INDIV_18_TO_36_MHZ
	.word	DA7218_PLL_INDIV_18_TO_36_MHZ_VAL
	.word	.LC1
	.size	da7218_set_dai_pll, .-da7218_set_dai_pll
	.comm	EINVAL,4,4
	.comm	DA7218_PLL_MODE_SRM,4,4
	.comm	DA7218_PLL_MODE_NORMAL,4,4
	.comm	DA7218_PLL_MODE_MASK,4,4
	.comm	DA7218_PLL_MODE_BYPASS,4,4
	.comm	DA7218_PLL_INTEGER,4,4
	.comm	DA7218_PLL_INDIV_MASK,4,4
	.comm	DA7218_PLL_INDIV_9_TO_18_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_9_TO_18_MHZ,4,4
	.comm	DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_4_5_TO_9_MHZ,4,4
	.comm	DA7218_PLL_INDIV_36_TO_54_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_36_TO_54_MHZ,4,4
	.comm	DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_2_TO_4_5_MHZ,4,4
	.comm	DA7218_PLL_INDIV_18_TO_36_MHZ_VAL,4,4
	.comm	DA7218_PLL_INDIV_18_TO_36_MHZ,4,4
	.comm	DA7218_PLL_FRAC_TOP,4,4
	.comm	DA7218_PLL_FRAC_BOT,4,4
	.comm	DA7218_PLL_CTRL,4,4
	.comm	DA7218_BYTE_SHIFT,8,8
	.comm	DA7218_BYTE_MASK,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
