	.file	"extr_if_mgb.c_mgb_miibus_writereg.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mgb_miibus_writereg, @function
mgb_miibus_writereg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13d, ecx
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	ebx, edx
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	device_get_softc@PLT
	mov	edi, eax
	call	iflib_get_softc@PLT
	mov	ecx, DWORD PTR MGB_MII_BUSY[rip]
	mov	esi, DWORD PTR MGB_MII_ACCESS[rip]
	xor	edx, edx
	mov	rdi, rax
	mov	rbp, rax
	call	mgb_wait_for_bits@PLT
	cmp	rax, QWORD PTR MGB_STS_TIMEOUT[rip]
	je	.L6
	and	r12d, DWORD PTR MGB_MII_PHY_ADDR_MASK[rip]
	mov	ecx, DWORD PTR MGB_MII_PHY_ADDR_SHIFT[rip]
	mov	edx, r13d
	mov	rdi, rbp
	mov	esi, r12d
	and	ebx, DWORD PTR MGB_MII_REG_ADDR_MASK[rip]
	mov	r12d, DWORD PTR MGB_MII_BUSY[rip]
	sal	esi, cl
	mov	ecx, DWORD PTR MGB_MII_REG_ADDR_SHIFT[rip]
	or	r12d, DWORD PTR MGB_MII_WRITE[rip]
	sal	ebx, cl
	or	r12d, ebx
	or	r12d, esi
	mov	esi, DWORD PTR MGB_MII_DATA[rip]
	call	CSR_WRITE_REG@PLT
	mov	esi, DWORD PTR MGB_MII_ACCESS[rip]
	mov	edx, r12d
	mov	rdi, rbp
	call	CSR_WRITE_REG@PLT
	mov	ecx, DWORD PTR MGB_MII_BUSY[rip]
	xor	edx, edx
	mov	rdi, rbp
	mov	esi, DWORD PTR MGB_MII_ACCESS[rip]
	call	mgb_wait_for_bits@PLT
	mov	r8, rax
	xor	eax, eax
	cmp	r8, QWORD PTR MGB_STS_TIMEOUT[rip]
	je	.L6
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	eax, DWORD PTR EIO[rip]
	add	rsp, 8
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	mgb_miibus_writereg, .-mgb_miibus_writereg
	.comm	MGB_STS_TIMEOUT,8,8
	.comm	MGB_MII_WRITE,4,4
	.comm	MGB_MII_REG_ADDR_SHIFT,4,4
	.comm	MGB_MII_REG_ADDR_MASK,4,4
	.comm	MGB_MII_PHY_ADDR_SHIFT,4,4
	.comm	MGB_MII_PHY_ADDR_MASK,4,4
	.comm	MGB_MII_DATA,4,4
	.comm	MGB_MII_BUSY,4,4
	.comm	MGB_MII_ACCESS,4,4
	.comm	EIO,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_if_mgb.c_mgb_miibus_writereg.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mgb_miibus_writereg, %function
mgb_miibus_writereg:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	fp, r1
	mov	r10, r2
	mov	r9, r3
	bl	device_get_softc
	bl	iflib_get_softc
	ldr	r7, .L8
	ldr	r6, .L8+4
	ldr	r3, [r7]
	mov	r2, #0
	ldr	r1, [r6]
	mov	r5, r0
	bl	mgb_wait_for_bits
	ldr	r8, .L8+8
	ldr	r3, [r8]
	cmp	r0, r3
	beq	.L6
	ldr	r1, .L8+12
	ldr	r3, .L8+16
	ldr	r4, [r1]
	ldr	r3, [r3]
	and	r10, r10, r4
	ldr	r1, .L8+20
	ldr	r4, [r7]
	ldr	r2, .L8+24
	ldr	r1, [r1]
	orr	r4, r4, r3
	ldr	r3, .L8+28
	ldr	r2, [r2]
	and	fp, fp, r1
	ldr	r1, [r3]
	ldr	r3, .L8+32
	orr	r4, r4, r10, lsl r2
	orr	r4, r4, fp, lsl r1
	mov	r2, r9
	ldr	r1, [r3]
	mov	r0, r5
	bl	CSR_WRITE_REG
	mov	r2, r4
	ldr	r1, [r6]
	mov	r0, r5
	bl	CSR_WRITE_REG
	ldr	r3, [r7]
	mov	r0, r5
	mov	r2, #0
	ldr	r1, [r6]
	bl	mgb_wait_for_bits
	ldr	r3, [r8]
	cmp	r0, r3
	beq	.L6
	mov	r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L6:
	ldr	r3, .L8+36
	ldr	r0, [r3]
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L9:
	.align	2
.L8:
	.word	MGB_MII_BUSY
	.word	MGB_MII_ACCESS
	.word	MGB_STS_TIMEOUT
	.word	MGB_MII_REG_ADDR_MASK
	.word	MGB_MII_WRITE
	.word	MGB_MII_PHY_ADDR_MASK
	.word	MGB_MII_REG_ADDR_SHIFT
	.word	MGB_MII_PHY_ADDR_SHIFT
	.word	MGB_MII_DATA
	.word	EIO
	.size	mgb_miibus_writereg, .-mgb_miibus_writereg
	.comm	MGB_STS_TIMEOUT,4,4
	.comm	MGB_MII_WRITE,4,4
	.comm	MGB_MII_REG_ADDR_SHIFT,4,4
	.comm	MGB_MII_REG_ADDR_MASK,4,4
	.comm	MGB_MII_PHY_ADDR_SHIFT,4,4
	.comm	MGB_MII_PHY_ADDR_MASK,4,4
	.comm	MGB_MII_DATA,4,4
	.comm	MGB_MII_BUSY,4,4
	.comm	MGB_MII_ACCESS,4,4
	.comm	EIO,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
