	.file	"extr_rtw_mlme.c_rtw_restructure_ht_ie.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"declare supporting RX STBC\n"
	.text
	.p2align 4
	.globl	rtw_restructure_ht_ie
	.type	rtw_restructure_ht_ie, @function
rtw_restructure_ht_ie:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15, r9
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, ecx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, r8
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rsi
	xor	esi, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 88
	.cfi_def_cfa_offset 144
	mov	QWORD PTR 8[rsp], rdx
	lea	r14, 60[rsp]
	mov	edx, 12
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 72[rsp], rax
	xor	eax, eax
	mov	DWORD PTR 32[rdi], 0
	mov	eax, DWORD PTR [r8]
	mov	rdi, r14
	mov	QWORD PTR 48[rsp], 0
	mov	DWORD PTR 16[rsp], eax
	call	memset@PLT
	mov	edi, DWORD PTR IEEE80211_HT_CAP_DSSSCCK40[rip]
	call	cpu_to_le16@PLT
	cmp	QWORD PTR 48[rbx], 0
	mov	DWORD PTR 68[rsp], eax
	jne	.L46
	test	rbp, rbp
	je	.L47
.L3:
	mov	esi, DWORD PTR _HT_ADD_INFO_IE_[rip]
	lea	rdx, 36[rsp]
	mov	ecx, r13d
	mov	rdi, rbp
	call	rtw_get_ie@PLT
	mov	rdx, rax
	xor	eax, eax
	test	rdx, rdx
	je	.L5
	cmp	DWORD PTR 36[rsp], 4
	je	.L48
.L5:
	mov	edx, DWORD PTR 56[rbx]
	cmp	r15, 14
	jle	.L8
	and	edx, 240
	jne	.L9
.L10:
	mov	edi, DWORD PTR 36[rbx]
	mov	esi, DWORD PTR STBC_HT_ENABLE_TX[rip]
	call	TEST_FLAG@PLT
	test	rax, rax
	jne	.L49
.L12:
	mov	edi, DWORD PTR IEEE80211_HT_CAP_SM_PS[rip]
	call	cpu_to_le16@PLT
	mov	edi, DWORD PTR 36[rbx]
	mov	esi, DWORD PTR STBC_HT_ENABLE_RX[rip]
	or	DWORD PTR 68[rsp], eax
	call	TEST_FLAG@PLT
	test	rax, rax
	je	.L13
	cmp	r15, 14
	jg	.L14
	cmp	DWORD PTR 60[rbx], 1
	je	.L15
.L14:
	cmp	DWORD PTR 64[rbx], 1
	je	.L15
.L13:
	mov	esi, DWORD PTR 24[rbx]
	mov	edi, DWORD PTR 64[rsp]
	mov	edx, 16
	call	memcpy@PLT
	mov	esi, DWORD PTR HW_VAR_RF_TYPE[rip]
	lea	rdx, 48[rsp]
	mov	rdi, rbx
	call	rtw_hal_get_hwreg@PLT
	cmp	QWORD PTR 48[rsp], 130
	je	.L24
.L25:
	mov	esi, DWORD PTR MCS_RATE_2R[rip]
	mov	edi, DWORD PTR 64[rsp]
	call	set_mcs_rate_by_mask@PLT
.L17:
	mov	esi, DWORD PTR HAL_DEF_RX_PACKET_OFFSET[rip]
	lea	rdx, 40[rsp]
	mov	rdi, rbx
	lea	r15, 44[rsp]
	call	rtw_hal_get_def_var@PLT
	mov	esi, DWORD PTR HAL_DEF_MAX_RECVBUF_SZ[rip]
	mov	rdx, r15
	mov	rdi, rbx
	call	rtw_hal_get_def_var@PLT
	mov	eax, DWORD PTR [rbx]
	cmp	eax, 255
	je	.L18
	mov	DWORD PTR 44[rsp], eax
.L19:
	and	eax, 3
	mov	rcx, QWORD PTR _AES_[rip]
	mov	DWORD PTR 60[rsp], eax
	cmp	QWORD PTR 8[rbx], rcx
	jne	.L20
	mov	edx, DWORD PTR IEEE80211_HT_CAP_AMPDU_DENSITY[rip]
	and	edx, 28
	or	eax, edx
	mov	DWORD PTR 60[rsp], eax
.L20:
	mov	rcx, QWORD PTR 8[rsp]
	movsx	rax, DWORD PTR 16[rsp]
	mov	r8, r12
	mov	edx, 12
	mov	esi, DWORD PTR _HT_CAPABILITY_IE_[rip]
	lea	rdi, [rcx+rax*8]
	mov	rcx, r14
	call	rtw_set_ie@PLT
	mov	DWORD PTR 32[rbx], 1
	mov	eax, 1
	test	rbp, rbp
	je	.L1
	mov	esi, DWORD PTR _HT_ADD_INFO_IE_[rip]
	lea	rdx, 36[rsp]
	mov	ecx, r13d
	mov	rdi, rbp
	call	rtw_get_ie@PLT
	test	rax, rax
	je	.L44
	cmp	DWORD PTR 36[rsp], 4
	je	.L50
.L44:
	mov	eax, DWORD PTR 32[rbx]
.L1:
	mov	rcx, QWORD PTR 72[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L51
	add	rsp, 88
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	and	edx, 15
	je	.L10
.L9:
	cmp	QWORD PTR CHANNEL_WIDTH_40[rip], rax
	jne	.L10
	mov	edi, DWORD PTR IEEE80211_HT_CAP_SUP_WIDTH[rip]
	call	cpu_to_le16@PLT
	or	DWORD PTR 68[rsp], eax
	cmp	QWORD PTR 40[rbx], 0
	je	.L10
	mov	edi, DWORD PTR IEEE80211_HT_CAP_SGI_40[rip]
	call	cpu_to_le16@PLT
	or	DWORD PTR 68[rsp], eax
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L15:
	lea	rdi, .LC0[rip]
	call	DBG_871X@PLT
	mov	esi, DWORD PTR 24[rbx]
	mov	edi, DWORD PTR 64[rsp]
	mov	edx, 16
	call	memcpy@PLT
	mov	esi, DWORD PTR HW_VAR_RF_TYPE[rip]
	lea	rdx, 48[rsp]
	mov	rdi, rbx
	call	rtw_hal_get_hwreg@PLT
	cmp	QWORD PTR 48[rsp], 130
	je	.L52
	mov	edi, DWORD PTR IEEE80211_HT_CAP_RX_STBC_2R[rip]
	call	cpu_to_le16@PLT
	or	DWORD PTR 68[rsp], eax
	jmp	.L25
.L52:
	mov	edi, DWORD PTR IEEE80211_HT_CAP_RX_STBC_1R[rip]
	call	cpu_to_le16@PLT
	or	DWORD PTR 68[rsp], eax
.L24:
	mov	esi, DWORD PTR MCS_RATE_1R[rip]
	mov	edi, DWORD PTR 64[rsp]
	call	set_mcs_rate_by_mask@PLT
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L49:
	mov	edi, DWORD PTR IEEE80211_HT_CAP_TX_STBC[rip]
	call	cpu_to_le16@PLT
	or	DWORD PTR 68[rsp], eax
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L46:
	mov	edi, DWORD PTR IEEE80211_HT_CAP_SGI_20[rip]
	call	cpu_to_le16@PLT
	or	DWORD PTR 68[rsp], eax
	test	rbp, rbp
	jne	.L3
.L47:
	mov	esi, DWORD PTR WIFI_STATION_STATE[rip]
	lea	rdi, 32[rbx]
	call	check_fwstate@PLT
	mov	r8, rax
	mov	rax, QWORD PTR CHANNEL_WIDTH_40[rip]
	test	r8, r8
	je	.L5
	mov	rax, QWORD PTR 16[rbx]
	cmp	QWORD PTR CHANNEL_WIDTH_40[rip], rax
	cmovle	rax, QWORD PTR CHANNEL_WIDTH_40[rip]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L18:
	mov	esi, DWORD PTR HW_VAR_MAX_RX_AMPDU_FACTOR[rip]
	mov	rdx, r15
	mov	rdi, rbx
	call	rtw_hal_get_def_var@PLT
	mov	eax, DWORD PTR 44[rsp]
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L48:
	mov	rax, QWORD PTR 2[rdx]
	mov	edi, 2
	mov	QWORD PTR 24[rsp], rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR 20[rsp], eax
	call	BIT@PLT
	mov	r8d, eax
	mov	rax, QWORD PTR CHANNEL_WIDTH_20[rip]
	test	DWORD PTR 20[rsp], r8d
	je	.L5
	mov	rdx, QWORD PTR 24[rsp]
	mov	rdx, QWORD PTR 2[rdx]
	test	BYTE PTR [rdx], 1
	cmovne	rax, QWORD PTR CHANNEL_WIDTH_40[rip]
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L50:
	mov	rsi, QWORD PTR 8[rsp]
	lea	rcx, 2[rax]
	movsx	rax, DWORD PTR [r12]
	mov	r8, r12
	mov	edx, 4
	lea	rdi, [rsi+rax*8]
	mov	esi, DWORD PTR _HT_ADD_INFO_IE_[rip]
	call	rtw_set_ie@PLT
	jmp	.L44
.L51:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	rtw_restructure_ht_ie, .-rtw_restructure_ht_ie
	.comm	_HT_CAPABILITY_IE_,4,4
	.comm	_HT_ADD_INFO_IE_,4,4
	.comm	_AES_,8,8
	.comm	WIFI_STATION_STATE,4,4
	.comm	STBC_HT_ENABLE_TX,4,4
	.comm	STBC_HT_ENABLE_RX,4,4
	.comm	MCS_RATE_2R_13TO15_OFF,4,4
	.comm	MCS_RATE_2R,4,4
	.comm	MCS_RATE_1R,4,4
	.comm	IEEE80211_HT_CAP_TX_STBC,4,4
	.comm	IEEE80211_HT_CAP_SUP_WIDTH,4,4
	.comm	IEEE80211_HT_CAP_SM_PS,4,4
	.comm	IEEE80211_HT_CAP_SGI_40,4,4
	.comm	IEEE80211_HT_CAP_SGI_20,4,4
	.comm	IEEE80211_HT_CAP_RX_STBC_2R,4,4
	.comm	IEEE80211_HT_CAP_RX_STBC_1R,4,4
	.comm	IEEE80211_HT_CAP_DSSSCCK40,4,4
	.comm	IEEE80211_HT_CAP_AMPDU_DENSITY,4,4
	.comm	HW_VAR_RF_TYPE,4,4
	.comm	HW_VAR_MAX_RX_AMPDU_FACTOR,4,4
	.comm	HAL_DEF_RX_PACKET_OFFSET,4,4
	.comm	HAL_DEF_MAX_RECVBUF_SZ,4,4
	.comm	CHANNEL_WIDTH_40,8,8
	.comm	CHANNEL_WIDTH_20,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rtw_mlme.c_rtw_restructure_ht_ie.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"declare supporting RX STBC\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	rtw_restructure_ht_ie
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtw_restructure_ht_ie, %function
rtw_restructure_ht_ie:
	@ args = 8, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	ip, #0
	mov	r4, r0
	sub	sp, sp, #52
	ldr	r0, .L63
	ldr	r8, [sp, #88]
	mov	r6, r3
	ldr	r3, .L63+4
	str	ip, [r4, #16]
	ldr	r0, [r0]
	ldr	r3, [r3]
	str	r3, [sp, #44]
	mov	r3,#0
	mov	r5, r1
	mov	r7, r2
	ldr	r9, [r8]
	ldr	r10, [sp, #92]
	str	ip, [sp, #20]
	str	ip, [sp, #32]
	str	ip, [sp, #36]
	str	ip, [sp, #40]
	bl	cpu_to_le16
	ldr	r3, [r4, #28]
	str	r0, [sp, #40]
	cmp	r3, #0
	bne	.L55
	cmp	r5, #0
	beq	.L56
.L3:
	ldr	r2, .L63+8
	mov	r3, r6
	ldr	r1, [r2]
	mov	r0, r5
	add	r2, sp, #16
	bl	rtw_get_ie
	subs	fp, r0, #0
	beq	.L28
	ldr	r3, [sp, #16]
	cmp	r3, #4
	beq	.L57
.L28:
	mov	r0, #0
.L5:
	cmp	r10, #14
	ldr	r3, [r4, #32]
	ble	.L8
	tst	r3, #240
	bne	.L9
.L10:
	ldr	r3, .L63+12
	ldr	r0, [r4, #20]
	ldr	r1, [r3]
	bl	TEST_FLAG
	cmp	r0, #0
	bne	.L58
.L12:
	ldr	r3, .L63+16
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	ldr	r2, .L63+20
	orr	r3, r3, r0
	ldr	r1, [r2]
	ldr	r0, [r4, #20]
	str	r3, [sp, #40]
	bl	TEST_FLAG
	cmp	r0, #0
	beq	.L13
	cmp	r10, #14
	bgt	.L14
	ldr	r3, [r4, #36]
	cmp	r3, #1
	beq	.L15
.L14:
	ldr	r3, [r4, #40]
	cmp	r3, #1
	beq	.L15
.L13:
	mov	r2, #16
	ldr	r1, [r4, #12]
	ldr	r0, [sp, #36]
	bl	memcpy
	ldr	r3, .L63+24
	mov	r0, r4
	ldr	r1, [r3]
	add	r2, sp, #20
	bl	rtw_hal_get_hwreg
	ldr	r3, [sp, #20]
	cmp	r3, #130
	beq	.L24
.L25:
	ldr	r3, .L63+28
	ldr	r0, [sp, #36]
	ldr	r1, [r3]
	bl	set_mcs_rate_by_mask
.L17:
	ldr	r3, .L63+32
	add	r2, sp, #24
	ldr	r1, [r3]
	mov	r0, r4
	bl	rtw_hal_get_def_var
	ldr	r3, .L63+36
	mov	r0, r4
	ldr	r1, [r3]
	add	r2, sp, #28
	bl	rtw_hal_get_def_var
	ldr	r0, [r4]
	cmp	r0, #255
	strne	r0, [sp, #28]
	beq	.L59
.L19:
	ldr	r3, .L63+40
	ldr	r2, [r4, #4]
	ldr	r3, [r3]
	and	r0, r0, #3
	cmp	r2, r3
	ldreq	r3, .L63+44
	ldr	r2, .L63+48
	ldreq	r3, [r3]
	str	r0, [sp, #32]
	andeq	r3, r3, #28
	orreq	r0, r3, r0
	str	r8, [sp]
	streq	r0, [sp, #32]
	ldr	r1, [r2]
	add	r3, sp, #32
	mov	r2, #12
	add	r0, r7, r9, lsl #2
	bl	rtw_set_ie
	mov	r0, #1
	cmp	r5, #0
	str	r0, [r4, #16]
	beq	.L1
	ldr	r9, .L63+8
	mov	r3, r6
	mov	r0, r5
	ldr	r1, [r9]
	add	r2, sp, #16
	bl	rtw_get_ie
	subs	r3, r0, #0
	beq	.L53
	ldr	r2, [sp, #16]
	cmp	r2, #4
	beq	.L60
.L53:
	ldr	r0, [r4, #16]
.L1:
	ldr	r3, .L63+4
	ldr	r2, [r3]
	ldr	r3, [sp, #44]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L61
	add	sp, sp, #52
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
	tst	r3, #15
	beq	.L10
.L9:
	ldr	r3, .L63+52
	ldr	r3, [r3]
	cmp	r3, r0
	bne	.L10
	ldr	r3, .L63+56
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	ldr	r2, [r4, #24]
	orr	r3, r3, r0
	cmp	r2, #0
	str	r3, [sp, #40]
	beq	.L10
	ldr	r3, .L63+60
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	orr	r3, r3, r0
	str	r3, [sp, #40]
	b	.L10
.L15:
	ldr	r0, .L63+64
	bl	DBG_871X
	mov	r2, #16
	ldr	r1, [r4, #12]
	ldr	r0, [sp, #36]
	bl	memcpy
	ldr	r3, .L63+24
	mov	r0, r4
	ldr	r1, [r3]
	add	r2, sp, #20
	bl	rtw_hal_get_hwreg
	ldr	r3, [sp, #20]
	cmp	r3, #130
	beq	.L62
	ldr	r3, .L63+68
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	orr	r3, r3, r0
	str	r3, [sp, #40]
	b	.L25
.L62:
	ldr	r3, .L63+72
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	orr	r3, r3, r0
	str	r3, [sp, #40]
.L24:
	ldr	r3, .L63+76
	ldr	r0, [sp, #36]
	ldr	r1, [r3]
	bl	set_mcs_rate_by_mask
	b	.L17
.L58:
	ldr	r3, .L63+80
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	orr	r3, r3, r0
	str	r3, [sp, #40]
	b	.L12
.L55:
	ldr	r3, .L63+84
	ldr	r0, [r3]
	bl	cpu_to_le16
	ldr	r3, [sp, #40]
	cmp	r5, #0
	orr	r3, r3, r0
	str	r3, [sp, #40]
	bne	.L3
.L56:
	ldr	r3, .L63+88
	add	r0, r4, #16
	ldr	r1, [r3]
	bl	check_fwstate
	cmp	r0, #0
	beq	.L52
	ldr	r2, .L63+52
	ldr	r3, [r4, #8]
	ldr	r0, [r2]
	cmp	r0, r3
	movge	r0, r3
	b	.L5
.L59:
	ldr	r3, .L63+92
	mov	r0, r4
	ldr	r1, [r3]
	add	r2, sp, #28
	bl	rtw_hal_get_def_var
	ldr	r0, [sp, #28]
	b	.L19
.L57:
	ldr	r3, [fp, #2]
	mov	r0, #2
	ldr	r3, [r3]
	str	r3, [sp, #12]
	bl	BIT
	ldr	r3, [sp, #12]
	tst	r3, r0
	beq	.L6
	ldr	r3, [fp, #2]
	ldr	r3, [r3]
	tst	r3, #1
	beq	.L6
.L52:
	ldr	r3, .L63+52
	ldr	r0, [r3]
	b	.L5
.L60:
	ldr	r0, [r8]
	str	r8, [sp]
	ldr	r1, [r9]
	add	r0, r7, r0, lsl #2
	add	r3, r3, #2
	bl	rtw_set_ie
	b	.L53
.L6:
	ldr	r3, .L63+96
	ldr	r0, [r3]
	b	.L5
.L61:
	bl	__stack_chk_fail
.L64:
	.align	2
.L63:
	.word	IEEE80211_HT_CAP_DSSSCCK40
	.word	.LC1
	.word	_HT_ADD_INFO_IE_
	.word	STBC_HT_ENABLE_TX
	.word	IEEE80211_HT_CAP_SM_PS
	.word	STBC_HT_ENABLE_RX
	.word	HW_VAR_RF_TYPE
	.word	MCS_RATE_2R
	.word	HAL_DEF_RX_PACKET_OFFSET
	.word	HAL_DEF_MAX_RECVBUF_SZ
	.word	_AES_
	.word	IEEE80211_HT_CAP_AMPDU_DENSITY
	.word	_HT_CAPABILITY_IE_
	.word	CHANNEL_WIDTH_40
	.word	IEEE80211_HT_CAP_SUP_WIDTH
	.word	IEEE80211_HT_CAP_SGI_40
	.word	.LC0
	.word	IEEE80211_HT_CAP_RX_STBC_2R
	.word	IEEE80211_HT_CAP_RX_STBC_1R
	.word	MCS_RATE_1R
	.word	IEEE80211_HT_CAP_TX_STBC
	.word	IEEE80211_HT_CAP_SGI_20
	.word	WIFI_STATION_STATE
	.word	HW_VAR_MAX_RX_AMPDU_FACTOR
	.word	CHANNEL_WIDTH_20
	.size	rtw_restructure_ht_ie, .-rtw_restructure_ht_ie
	.comm	_HT_CAPABILITY_IE_,4,4
	.comm	_HT_ADD_INFO_IE_,4,4
	.comm	_AES_,4,4
	.comm	WIFI_STATION_STATE,4,4
	.comm	STBC_HT_ENABLE_TX,4,4
	.comm	STBC_HT_ENABLE_RX,4,4
	.comm	MCS_RATE_2R_13TO15_OFF,4,4
	.comm	MCS_RATE_2R,4,4
	.comm	MCS_RATE_1R,4,4
	.comm	IEEE80211_HT_CAP_TX_STBC,4,4
	.comm	IEEE80211_HT_CAP_SUP_WIDTH,4,4
	.comm	IEEE80211_HT_CAP_SM_PS,4,4
	.comm	IEEE80211_HT_CAP_SGI_40,4,4
	.comm	IEEE80211_HT_CAP_SGI_20,4,4
	.comm	IEEE80211_HT_CAP_RX_STBC_2R,4,4
	.comm	IEEE80211_HT_CAP_RX_STBC_1R,4,4
	.comm	IEEE80211_HT_CAP_DSSSCCK40,4,4
	.comm	IEEE80211_HT_CAP_AMPDU_DENSITY,4,4
	.comm	HW_VAR_RF_TYPE,4,4
	.comm	HW_VAR_MAX_RX_AMPDU_FACTOR,4,4
	.comm	HAL_DEF_RX_PACKET_OFFSET,4,4
	.comm	HAL_DEF_MAX_RECVBUF_SZ,4,4
	.comm	CHANNEL_WIDTH_40,4,4
	.comm	CHANNEL_WIDTH_20,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
