	.file	"extr_i915_irq.c_i915_pipestat_enable_mask.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"pipe %c: enable_mask=0x%x, status_mask=0x%x\n"
	.text
	.p2align 4
	.globl	i915_pipestat_enable_mask
	.type	i915_pipestat_enable_mask, @function
i915_pipestat_enable_mask:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	edx, esi
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r13, rdx
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	add	rdi, 8
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR -8[rdi]
	mov	ebx, DWORD PTR [rax+rdx*4]
	call	lockdep_assert_held@PLT
	mov	rdi, rbp
	mov	r12d, ebx
	sal	r12d, 16
	call	INTEL_GEN@PLT
	cmp	eax, 4
	jg	.L13
.L2:
	mov	edi, r13d
	call	pipe_name@PLT
	mov	esi, DWORD PTR PIPESTAT_INT_ENABLE_MASK[rip]
	xor	edi, edi
	mov	r8d, ebx
	mov	ecx, DWORD PTR PIPESTAT_INT_STATUS_MASK[rip]
	mov	edx, eax
	not	esi
	not	ecx
	and	esi, r12d
	and	ecx, ebx
	or	esi, ecx
	mov	ecx, r12d
	lea	rsi, .LC0[rip]
	setne	dil
	call	WARN_ONCE@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	edi, DWORD PTR PIPE_A_PSR_STATUS_VLV[rip]
	and	edi, ebx
	call	WARN_ON_ONCE@PLT
	test	rax, rax
	jne	.L5
	mov	edi, DWORD PTR PIPE_B_PSR_STATUS_VLV[rip]
	and	edi, ebx
	call	WARN_ON_ONCE@PLT
	test	rax, rax
	jne	.L5
	mov	ecx, DWORD PTR SPRITE0_FLIP_DONE_INT_EN_VLV[rip]
	mov	eax, DWORD PTR PIPE_FIFO_UNDERRUN_STATUS[rip]
	mov	edx, DWORD PTR SPRITE1_FLIP_DONE_INT_EN_VLV[rip]
	or	eax, ecx
	or	eax, edx
	not	eax
	and	r12d, eax
	or	ecx, r12d
	test	DWORD PTR SPRITE0_FLIP_DONE_INT_STATUS_VLV[rip], ebx
	cmovne	r12d, ecx
	or	edx, r12d
	test	DWORD PTR SPRITE1_FLIP_DONE_INT_STATUS_VLV[rip], ebx
	cmovne	r12d, edx
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L5:
	add	rsp, 8
	.cfi_def_cfa_offset 40
	xor	r12d, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	i915_pipestat_enable_mask, .-i915_pipestat_enable_mask
	.comm	SPRITE1_FLIP_DONE_INT_STATUS_VLV,4,4
	.comm	SPRITE1_FLIP_DONE_INT_EN_VLV,4,4
	.comm	SPRITE0_FLIP_DONE_INT_STATUS_VLV,4,4
	.comm	SPRITE0_FLIP_DONE_INT_EN_VLV,4,4
	.comm	PIPE_FIFO_UNDERRUN_STATUS,4,4
	.comm	PIPE_B_PSR_STATUS_VLV,4,4
	.comm	PIPE_A_PSR_STATUS_VLV,4,4
	.comm	PIPESTAT_INT_STATUS_MASK,4,4
	.comm	PIPESTAT_INT_ENABLE_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_i915_irq.c_i915_pipestat_enable_mask.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"pipe %c: enable_mask=0x%x, status_mask=0x%x\012\000"
	.text
	.align	2
	.global	i915_pipestat_enable_mask
	.syntax unified
	.arm
	.fpu softvfp
	.type	i915_pipestat_enable_mask, %function
i915_pipestat_enable_mask:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r4, r0
	ldr	r3, [r0], #4
	sub	sp, sp, #8
	ldr	r6, [r3, r1, lsl #2]
	mov	r5, r1
	bl	lockdep_assert_held
	mov	r0, r4
	bl	INTEL_GEN
	cmp	r0, #4
	lsl	r4, r6, #16
	bgt	.L15
.L2:
	ldr	r2, .L16
	ldr	r3, .L16+4
	ldr	r2, [r2]
	ldr	r3, [r3]
	bic	r2, r4, r2
	bic	r3, r6, r3
	orrs	r3, r2, r3
	mov	r0, r5
	movne	r5, #1
	moveq	r5, #0
	bl	pipe_name
	mov	r3, r4
	mov	r2, r0
	ldr	r1, .L16+8
	mov	r0, r5
	str	r6, [sp]
	bl	WARN_ONCE
	mov	r0, r4
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, pc}
.L15:
	ldr	r3, .L16+12
	ldr	r0, [r3]
	and	r0, r0, r6
	bl	WARN_ON_ONCE
	cmp	r0, #0
	bne	.L5
	ldr	r3, .L16+16
	ldr	r0, [r3]
	and	r0, r0, r6
	bl	WARN_ON_ONCE
	cmp	r0, #0
	bne	.L5
	ldr	r1, .L16+20
	ldr	r3, .L16+24
	ldr	r2, .L16+28
	ldr	r1, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r1, r3
	orr	r3, r3, r2
	ldr	r0, .L16+32
	bic	r4, r4, r3
	ldr	r3, .L16+36
	ldr	r0, [r0]
	ldr	r3, [r3]
	tst	r6, r0
	orrne	r4, r4, r1
	tst	r6, r3
	orrne	r4, r4, r2
	b	.L2
.L5:
	mov	r4, #0
	mov	r0, r4
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, pc}
.L17:
	.align	2
.L16:
	.word	PIPESTAT_INT_ENABLE_MASK
	.word	PIPESTAT_INT_STATUS_MASK
	.word	.LC0
	.word	PIPE_A_PSR_STATUS_VLV
	.word	PIPE_B_PSR_STATUS_VLV
	.word	SPRITE0_FLIP_DONE_INT_EN_VLV
	.word	PIPE_FIFO_UNDERRUN_STATUS
	.word	SPRITE1_FLIP_DONE_INT_EN_VLV
	.word	SPRITE0_FLIP_DONE_INT_STATUS_VLV
	.word	SPRITE1_FLIP_DONE_INT_STATUS_VLV
	.size	i915_pipestat_enable_mask, .-i915_pipestat_enable_mask
	.comm	SPRITE1_FLIP_DONE_INT_STATUS_VLV,4,4
	.comm	SPRITE1_FLIP_DONE_INT_EN_VLV,4,4
	.comm	SPRITE0_FLIP_DONE_INT_STATUS_VLV,4,4
	.comm	SPRITE0_FLIP_DONE_INT_EN_VLV,4,4
	.comm	PIPE_FIFO_UNDERRUN_STATUS,4,4
	.comm	PIPE_B_PSR_STATUS_VLV,4,4
	.comm	PIPE_A_PSR_STATUS_VLV,4,4
	.comm	PIPESTAT_INT_STATUS_MASK,4,4
	.comm	PIPESTAT_INT_ENABLE_MASK,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
