	.file	"extr_aarch64-dis.c_aarch64_decode_variant_using_iclass.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	aarch64_decode_variant_using_iclass, @function
aarch64_decode_variant_using_iclass:
.LFB0:
	.cfi_startproc
	endbr64
	mov	rax, QWORD PTR 8[rdi]
	mov	eax, DWORD PTR [rax]
	add	eax, -128
	cmp	eax, 11
	ja	.L2
	lea	rdx, .L4[rip]
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	rbx, rdi
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L4:
	.long	.L15-.L4
	.long	.L14-.L4
	.long	.L13-.L4
	.long	.L12-.L4
	.long	.L11-.L4
	.long	.L10-.L4
	.long	.L9-.L4
	.long	.L8-.L4
	.long	.L26-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.text
	.p2align 4,,10
	.p2align 3
.L5:
	mov	r8d, DWORD PTR FLD_imm5[rip]
	mov	edi, DWORD PTR [rdi]
	mov	edx, 2
	xor	esi, esi
	mov	ecx, DWORD PTR FLD_SVE_tszh[rip]
	call	extract_fields@PLT
	mov	edx, eax
	mov	eax, DWORD PTR FALSE[rip]
	test	dl, 31
	je	.L1
	mov	eax, edx
	and	eax, 1
	je	.L17
	.p2align 4,,10
	.p2align 3
.L26:
	xor	eax, eax
	.p2align 4,,10
	.p2align 3
.L7:
	mov	edx, DWORD PTR AARCH64_MAX_OPND_NUM[rip]
	test	edx, edx
	jle	.L24
	mov	rdx, QWORD PTR 8[rbx]
	cdqe
	mov	rcx, QWORD PTR 16[rbx]
	mov	rdx, QWORD PTR 8[rdx]
	mov	rsi, QWORD PTR [rdx+rax*8]
	xor	eax, eax
	.p2align 4,,10
	.p2align 3
.L25:
	mov	edx, DWORD PTR [rsi+rax*4]
	mov	DWORD PTR [rcx+rax*4], edx
	add	rax, 1
	cmp	DWORD PTR AARCH64_MAX_OPND_NUM[rip], eax
	jg	.L25
.L24:
	mov	eax, DWORD PTR TRUE[rip]
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	edx, DWORD PTR [rdi]
	mov	eax, edx
	and	eax, 132608
	cmp	eax, 1536
	je	.L26
	mov	ecx, edx
	mov	eax, 1
	and	ecx, 132096
	cmp	ecx, 1024
	je	.L7
	xor	eax, eax
	and	edx, 131072
	setne	al
	add	eax, 2
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L17:
	sar	edx
	add	eax, 1
	test	dl, 1
	jne	.L7
	sar	edx
	add	eax, 1
	test	dl, 1
	je	.L17
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L3:
	mov	r8d, DWORD PTR FLD_SVE_M_14[rip]
.L49:
	mov	ecx, DWORD PTR FLD_size[rip]
	mov	edi, DWORD PTR [rbx]
	mov	edx, 2
	xor	esi, esi
	call	extract_fields@PLT
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L15:
	mov	esi, DWORD PTR [rdi]
	mov	edi, DWORD PTR FLD_SVE_sz[rip]
	xor	edx, edx
	call	extract_field@PLT
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L14:
	mov	esi, DWORD PTR [rdi]
	mov	edi, DWORD PTR FLD_size[rip]
	xor	edx, edx
	call	extract_field@PLT
	mov	edx, eax
	lea	eax, -1[rax]
	test	edx, edx
	jg	.L7
.L50:
	mov	eax, DWORD PTR FALSE[rip]
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	esi, DWORD PTR [rdi]
	mov	edi, DWORD PTR FLD_size[rip]
	xor	edx, edx
	call	extract_field@PLT
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L12:
	mov	esi, DWORD PTR [rdi]
	mov	edi, DWORD PTR FLD_size[rip]
	xor	edx, edx
	call	extract_field@PLT
	cmp	eax, 2
	jle	.L7
	jmp	.L50
	.p2align 4,,10
	.p2align 3
.L11:
	mov	r8d, DWORD PTR FLD_SVE_tszl_19[rip]
.L48:
.L20:
	endbr64
	mov	ecx, DWORD PTR FLD_SVE_tszh[rip]
	mov	edi, DWORD PTR [rbx]
	mov	edx, 2
	xor	esi, esi
	call	extract_fields@PLT
	mov	edx, eax
	mov	eax, DWORD PTR FALSE[rip]
	test	edx, edx
	je	.L1
	xor	eax, eax
	cmp	edx, 1
	je	.L26
	.p2align 4,,10
	.p2align 3
.L22:
	sar	edx
	add	eax, 1
	cmp	edx, 1
	jne	.L22
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L10:
	mov	r8d, DWORD PTR FLD_SVE_tszl_8[rip]
	jmp	.L48
	.p2align 4,,10
	.p2align 3
.L9:
	mov	esi, DWORD PTR [rdi]
	mov	edi, DWORD PTR FLD_SVE_M_4[rip]
	xor	edx, edx
	call	extract_field@PLT
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L8:
	mov	r8d, DWORD PTR FLD_SVE_M_16[rip]
	jmp	.L49
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	mov	eax, DWORD PTR TRUE[rip]
	ret
	.cfi_endproc
.LFE0:
	.size	aarch64_decode_variant_using_iclass, .-aarch64_decode_variant_using_iclass
	.comm	TRUE,4,4
	.comm	FLD_size,4,4
	.comm	FLD_imm5,4,4
	.comm	FLD_SVE_tszl_8,4,4
	.comm	FLD_SVE_tszl_19,4,4
	.comm	FLD_SVE_tszh,4,4
	.comm	FLD_SVE_sz,4,4
	.comm	FLD_SVE_M_4,4,4
	.comm	FLD_SVE_M_16,4,4
	.comm	FLD_SVE_M_14,4,4
	.comm	FALSE,4,4
	.comm	AARCH64_MAX_OPND_NUM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_aarch64-dis.c_aarch64_decode_variant_using_iclass.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	aarch64_decode_variant_using_iclass, %function
aarch64_decode_variant_using_iclass:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, lr}
	ldr	r3, [r0, #4]
	mov	r4, r0
	ldr	r3, [r3]
	sub	sp, sp, #8
	sub	r3, r3, #128
	cmp	r3, #11
	ldrls	pc, [pc, r3, asl #2]
	b	.L24
.L4:
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L9
	.word	.L8
	.word	.L26
	.word	.L6
	.word	.L5
	.word	.L3
.L5:
	ldr	r2, .L45
	ldr	r3, .L45+4
	ldr	r2, [r2]
	ldr	r3, [r3]
	str	r2, [sp]
	mov	r1, #0
	mov	r2, #2
	ldr	r0, [r0]
	bl	extract_fields
	tst	r0, #31
	mov	r3, r0
	beq	.L42
	ands	r0, r0, #1
	beq	.L17
.L26:
	mov	r0, #0
.L7:
	ldr	ip, .L45+8
	ldr	r3, [ip]
	cmp	r3, #0
	ble	.L24
	mov	r3, #0
	ldr	r2, [r4, #4]
	ldr	r1, [r4, #8]
	ldr	r2, [r2, #4]
	sub	r1, r1, #4
	ldr	r2, [r2, r0, lsl #2]
	sub	r2, r2, #4
.L25:
	ldr	r0, [r2, #4]!
	add	r3, r3, #1
	str	r0, [r1, #4]!
	ldr	r0, [ip]
	cmp	r0, r3
	bgt	.L25
.L24:
	ldr	r3, .L45+12
	ldr	r0, [r3]
	add	sp, sp, #8
	@ sp needed
	pop	{r4, pc}
.L6:
	ldr	r2, [r0]
	ldr	r3, .L45+16
	and	r3, r3, r2
	cmp	r3, #1536
	beq	.L26
	and	r3, r2, #132096
	cmp	r3, #1024
	moveq	r0, #1
	beq	.L7
	tst	r2, #131072
	moveq	r0, #2
	movne	r0, #3
	b	.L7
.L17:
	asr	r3, r3, #1
	tst	r3, #1
	add	r0, r0, #1
	bne	.L7
	asr	r3, r3, #1
	tst	r3, #1
	add	r0, r0, #1
	beq	.L17
	b	.L7
.L3:
	ldr	r2, .L45+20
.L41:
	ldr	r2, [r2]
	ldr	r3, .L45+24
	mov	r1, #0
	ldr	r3, [r3]
	str	r2, [sp]
	ldr	r0, [r4]
	mov	r2, #2
	bl	extract_fields
	b	.L7
.L15:
	ldr	r3, .L45+28
	mov	r2, #0
	ldr	r0, [r3]
	ldr	r1, [r4]
	bl	extract_field
	b	.L7
.L14:
	ldr	r3, .L45+24
	mov	r2, #0
	ldr	r0, [r3]
	ldr	r1, [r4]
	bl	extract_field
	cmp	r0, #0
	subgt	r0, r0, #1
	bgt	.L7
.L42:
	ldr	r3, .L45+32
	ldr	r0, [r3]
	add	sp, sp, #8
	@ sp needed
	pop	{r4, pc}
.L13:
	ldr	r3, .L45+24
	mov	r2, #0
	ldr	r0, [r3]
	ldr	r1, [r4]
	bl	extract_field
	b	.L7
.L12:
	ldr	r3, .L45+24
	mov	r2, #0
	ldr	r0, [r3]
	ldr	r1, [r4]
	bl	extract_field
	cmp	r0, #2
	ble	.L7
	b	.L42
.L11:
	ldr	r2, .L45+36
.L40:
.L20:
	ldr	r2, [r2]
	ldr	r3, .L45+4
	mov	r1, #0
	ldr	r3, [r3]
	str	r2, [sp]
	ldr	r0, [r4]
	mov	r2, #2
	bl	extract_fields
	cmp	r0, #0
	mov	r3, r0
	beq	.L42
	cmp	r0, #1
	movne	r0, #0
	beq	.L26
.L22:
	asr	r3, r3, #1
	cmp	r3, #1
	add	r0, r0, #1
	bne	.L22
	b	.L7
.L10:
	ldr	r2, .L45+40
	b	.L40
.L9:
	ldr	r3, .L45+44
	mov	r2, #0
	ldr	r0, [r3]
	ldr	r1, [r4]
	bl	extract_field
	b	.L7
.L8:
	ldr	r2, .L45+48
	b	.L41
.L46:
	.align	2
.L45:
	.word	FLD_imm5
	.word	FLD_SVE_tszh
	.word	AARCH64_MAX_OPND_NUM
	.word	TRUE
	.word	132608
	.word	FLD_SVE_M_14
	.word	FLD_size
	.word	FLD_SVE_sz
	.word	FALSE
	.word	FLD_SVE_tszl_19
	.word	FLD_SVE_tszl_8
	.word	FLD_SVE_M_4
	.word	FLD_SVE_M_16
	.size	aarch64_decode_variant_using_iclass, .-aarch64_decode_variant_using_iclass
	.comm	TRUE,4,4
	.comm	FLD_size,4,4
	.comm	FLD_imm5,4,4
	.comm	FLD_SVE_tszl_8,4,4
	.comm	FLD_SVE_tszl_19,4,4
	.comm	FLD_SVE_tszh,4,4
	.comm	FLD_SVE_sz,4,4
	.comm	FLD_SVE_M_4,4,4
	.comm	FLD_SVE_M_16,4,4
	.comm	FLD_SVE_M_14,4,4
	.comm	FALSE,4,4
	.comm	AARCH64_MAX_OPND_NUM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
