	.file	"extr_ia64.c_ia64_expand_vecint_cmov.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	ia64_expand_vecint_cmov
	.type	ia64_expand_vecint_cmov, @function
ia64_expand_vecint_cmov:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rdi, QWORD PTR [rdi]
	call	GET_MODE@PLT
	mov	rdi, QWORD PTR 24[rbx]
	mov	ebp, eax
	call	GET_CODE@PLT
	mov	edi, ebp
	mov	r13d, eax
	call	gen_reg_rtx@PLT
	mov	rcx, QWORD PTR 32[rbx]
	mov	r8, QWORD PTR 40[rbx]
	mov	edi, r13d
	mov	rdx, rax
	mov	esi, ebp
	mov	r12, rax
	call	ia64_expand_vecint_compare@PLT
	mov	edi, ebp
	mov	edx, eax
	add	eax, 1
	cdqe
	lea	r14, [rbx+rax*8]
	mov	rax, QWORD PTR [r14]
	mov	QWORD PTR 8[rsp], rax
	mov	eax, 2
	sub	eax, edx
	cdqe
	lea	r13, [rbx+rax*8]
	mov	r15, QWORD PTR 0[r13]
	call	CONST0_RTX@PLT
	cmp	rax, QWORD PTR 8[rsp]
	je	.L8
	mov	edi, ebp
	call	CONST0_RTX@PLT
	cmp	rax, r15
	je	.L9
	mov	edi, ebp
	call	gen_reg_rtx@PLT
	mov	rdx, QWORD PTR [r14]
	mov	rsi, r12
	mov	edi, ebp
	mov	r15, rax
	call	gen_rtx_AND@PLT
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rsi, r15
	mov	rdx, rax
	call	gen_rtx_SET@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	edi, ebp
	call	gen_reg_rtx@PLT
	mov	rsi, r12
	mov	edi, ebp
	mov	r14, rax
	call	gen_rtx_NOT@PLT
	mov	rdx, QWORD PTR 0[r13]
	mov	edi, ebp
	mov	rsi, rax
	call	gen_rtx_AND@PLT
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rsi, r14
	mov	rdx, rax
	call	gen_rtx_SET@PLT
	mov	edi, eax
	call	emit_insn@PLT
	mov	rdx, r14
	mov	rsi, r15
	mov	edi, ebp
	call	gen_rtx_IOR@PLT
.L6:
	mov	rsi, QWORD PTR [rbx]
	mov	edi, DWORD PTR VOIDmode[rip]
	mov	rdx, rax
	call	gen_rtx_SET@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	mov	edi, eax
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	emit_insn@PLT
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	rdx, QWORD PTR 8[rsp]
	mov	rsi, r12
	mov	edi, ebp
	call	gen_rtx_AND@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L8:
	mov	edi, ebp
	mov	QWORD PTR 8[rsp], rax
	call	CONST0_RTX@PLT
	mov	rsi, QWORD PTR 8[rsp]
	cmp	rax, r15
	je	.L10
	mov	rsi, r12
	mov	edi, ebp
	call	gen_rtx_NOT@PLT
	mov	rdx, r15
	mov	edi, ebp
	mov	rsi, rax
	call	gen_rtx_AND@PLT
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L10:
	mov	rdi, QWORD PTR [rbx]
	add	rsp, 24
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	jmp	emit_move_insn@PLT
	.cfi_endproc
.LFE0:
	.size	ia64_expand_vecint_cmov, .-ia64_expand_vecint_cmov
	.comm	VOIDmode,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ia64.c_ia64_expand_vecint_cmov.c"
	.text
	.align	2
	.global	ia64_expand_vecint_cmov
	.syntax unified
	.arm
	.fpu softvfp
	.type	ia64_expand_vecint_cmov, %function
ia64_expand_vecint_cmov:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	sub	sp, sp, #12
	ldr	r0, [r0]
	bl	GET_MODE
	mov	r5, r0
	ldr	r0, [r4, #12]
	bl	GET_CODE
	mov	r6, r0
	mov	r0, r5
	bl	gen_reg_rtx
	mov	r7, r0
	ldr	r3, [r4, #20]
	mov	r0, r6
	str	r3, [sp]
	mov	r2, r7
	mov	r1, r5
	ldr	r3, [r4, #16]
	bl	ia64_expand_vecint_compare
	mov	r3, r0
	mov	r0, r5
	add	r9, r3, #1
	rsb	r6, r3, #2
	ldr	fp, [r4, r9, lsl #2]
	ldr	r10, [r4, r6, lsl #2]
	bl	CONST0_RTX
	cmp	r0, fp
	beq	.L9
	mov	r0, r5
	bl	CONST0_RTX
	cmp	r0, r10
	beq	.L10
	mov	r0, r5
	bl	gen_reg_rtx
	ldr	r2, [r4, r9, lsl #2]
	mov	r8, r0
	mov	r1, r7
	mov	r0, r5
	bl	gen_rtx_AND
	ldr	r9, .L12
	mov	r2, r0
	mov	r1, r8
	ldr	r0, [r9]
	bl	gen_rtx_SET
	bl	emit_insn
	mov	r0, r5
	bl	gen_reg_rtx
	mov	r3, r0
	mov	r1, r7
	mov	r0, r5
	mov	r7, r3
	bl	gen_rtx_NOT
	ldr	r2, [r4, r6, lsl #2]
	mov	r1, r0
	mov	r0, r5
	bl	gen_rtx_AND
	mov	r1, r7
	mov	r2, r0
	ldr	r0, [r9]
	bl	gen_rtx_SET
	bl	emit_insn
	mov	r2, r7
	mov	r1, r8
	mov	r0, r5
	bl	gen_rtx_IOR
	ldr	r1, [r4]
	mov	r2, r0
	ldr	r0, [r9]
	bl	gen_rtx_SET
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	emit_insn
.L10:
	mov	r2, fp
	mov	r1, r7
.L7:
	mov	r0, r5
	bl	gen_rtx_AND
	ldr	r3, .L12
	mov	r2, r0
	ldr	r1, [r4]
	ldr	r0, [r3]
	bl	gen_rtx_SET
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	emit_insn
.L9:
	mov	r8, r0
	mov	r0, r5
	bl	CONST0_RTX
	cmp	r0, r10
	beq	.L11
	mov	r1, r7
	mov	r0, r5
	bl	gen_rtx_NOT
	mov	r2, r10
	mov	r1, r0
	b	.L7
.L11:
	mov	r1, r8
	ldr	r0, [r4]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	emit_move_insn
.L13:
	.align	2
.L12:
	.word	VOIDmode
	.size	ia64_expand_vecint_cmov, .-ia64_expand_vecint_cmov
	.comm	VOIDmode,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
