	.file	"extr_imx7-mipi-csis.c_mipi_csis_set_params.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mipi_csis_set_params, @function
mipi_csis_set_params:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	esi, DWORD PTR MIPI_CSIS_CMN_CTRL[rip]
	mov	ebx, DWORD PTR 20[rdi]
	call	mipi_csis_read@PLT
	mov	edx, DWORD PTR MIPI_CSIS_CMN_CTRL_LANE_NR_MASK[rip]
	sub	ebx, 1
	mov	ecx, DWORD PTR MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET[rip]
	mov	esi, DWORD PTR MIPI_CSIS_CMN_CTRL[rip]
	mov	rdi, rbp
	not	edx
	sal	ebx, cl
	and	edx, eax
	or	edx, ebx
	call	mipi_csis_write@PLT
	mov	rdi, rbp
	call	__mipi_csis_set_format@PLT
	mov	esi, DWORD PTR 16[rbp]
	mov	rdi, rbp
	call	mipi_csis_set_hsync_settle@PLT
	mov	esi, DWORD PTR MIPI_CSIS_ISPCONFIG_CH0[rip]
	mov	rdi, rbp
	call	mipi_csis_read@PLT
	mov	edx, eax
	mov	rax, QWORD PTR 8[rbp]
	cmp	DWORD PTR [rax], 32
	je	.L8
	mov	eax, DWORD PTR MIPI_CSIS_ISPCFG_ALIGN_32BIT[rip]
	not	eax
	and	edx, eax
.L3:
	mov	esi, DWORD PTR MIPI_CSIS_ISPCONFIG_CH0[rip]
	mov	rdi, rbp
	call	mipi_csis_write@PLT
	mov	esi, DWORD PTR MIPI_CSIS_ISPSYNC_CH0[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	mipi_csis_write@PLT
	mov	esi, DWORD PTR MIPI_CSIS_CLK_CTRL[rip]
	mov	rdi, rbp
	call	mipi_csis_read@PLT
	mov	edx, DWORD PTR MIPI_CSIS_CLK_CTRL_WCLK_SRC[rip]
	mov	ebx, edx
	or	ebx, eax
	cmp	QWORD PTR 0[rbp], 0
	jne	.L5
	not	edx
	mov	ebx, edx
	and	ebx, eax
.L5:
	mov	edi, 15
	call	MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0@PLT
	mov	edx, DWORD PTR MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK[rip]
	mov	esi, DWORD PTR MIPI_CSIS_CLK_CTRL[rip]
	mov	rdi, rbp
	or	ebx, eax
	not	edx
	and	edx, ebx
	call	mipi_csis_write@PLT
	mov	esi, DWORD PTR MIPI_CSIS_DPHYBCTRL_L[rip]
	mov	rdi, rbp
	mov	edx, 500
	call	mipi_csis_write@PLT
	mov	esi, DWORD PTR MIPI_CSIS_DPHYBCTRL_H[rip]
	xor	edx, edx
	mov	rdi, rbp
	call	mipi_csis_write@PLT
	mov	esi, DWORD PTR MIPI_CSIS_CMN_CTRL[rip]
	mov	rdi, rbp
	call	mipi_csis_read@PLT
	mov	edx, DWORD PTR MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW[rip]
	mov	esi, DWORD PTR MIPI_CSIS_CMN_CTRL[rip]
	mov	rdi, rbp
	or	edx, DWORD PTR MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	or	edx, eax
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	mipi_csis_write@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	or	edx, DWORD PTR MIPI_CSIS_ISPCFG_ALIGN_32BIT[rip]
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	mipi_csis_set_params, .-mipi_csis_set_params
	.comm	MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET,4,4
	.comm	MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET,4,4
	.comm	MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET,4,4
	.comm	MIPI_CSIS_ISPSYNC_CH0,4,4
	.comm	MIPI_CSIS_ISPCONFIG_CH0,4,4
	.comm	MIPI_CSIS_ISPCFG_ALIGN_32BIT,4,4
	.comm	MIPI_CSIS_DPHYBCTRL_L,4,4
	.comm	MIPI_CSIS_DPHYBCTRL_H,4,4
	.comm	MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL,4,4
	.comm	MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW,4,4
	.comm	MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET,4,4
	.comm	MIPI_CSIS_CMN_CTRL_LANE_NR_MASK,4,4
	.comm	MIPI_CSIS_CMN_CTRL,4,4
	.comm	MIPI_CSIS_CLK_CTRL_WCLK_SRC,4,4
	.comm	MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK,4,4
	.comm	MIPI_CSIS_CLK_CTRL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_imx7-mipi-csis.c_mipi_csis_set_params.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mipi_csis_set_params, %function
mipi_csis_set_params:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r6, .L8
	mov	r4, r0
	ldr	r1, [r6]
	ldr	r5, [r0, #12]
	bl	mipi_csis_read
	ldr	r3, .L8+4
	ldr	r2, .L8+8
	ldr	r3, [r3]
	ldr	r2, [r2]
	bic	r0, r0, r3
	sub	r5, r5, #1
	orr	r2, r0, r5, lsl r2
	ldr	r1, [r6]
	mov	r0, r4
	bl	mipi_csis_write
	ldr	r5, .L8+12
	mov	r0, r4
	bl	__mipi_csis_set_format
	ldr	r1, [r4, #8]
	mov	r0, r4
	bl	mipi_csis_set_hsync_settle
	ldr	r1, [r5]
	mov	r0, r4
	bl	mipi_csis_read
	ldr	r3, [r4, #4]
	ldr	r1, [r5]
	ldr	r3, [r3]
	ldr	r7, .L8+16
	cmp	r3, #32
	ldr	r3, .L8+20
	ldr	r2, [r3]
	orreq	r2, r0, r2
	bicne	r2, r0, r2
	mov	r0, r4
	bl	mipi_csis_write
	ldr	r3, .L8+24
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	mipi_csis_write
	ldr	r1, [r7]
	mov	r0, r4
	bl	mipi_csis_read
	ldr	r3, .L8+28
	ldr	r2, [r4]
	ldr	r5, [r3]
	cmp	r2, #0
	biceq	r5, r0, r5
	orrne	r5, r5, r0
	mov	r0, #15
	bl	MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0
	ldr	r3, .L8+32
	orr	r5, r5, r0
	ldr	r2, [r3]
	ldr	r1, [r7]
	bic	r2, r5, r2
	mov	r0, r4
	bl	mipi_csis_write
	ldr	r3, .L8+36
	mov	r2, #500
	ldr	r1, [r3]
	mov	r0, r4
	bl	mipi_csis_write
	ldr	r3, .L8+40
	mov	r2, #0
	ldr	r1, [r3]
	mov	r0, r4
	bl	mipi_csis_write
	ldr	r1, [r6]
	mov	r0, r4
	bl	mipi_csis_read
	mov	r2, r0
	ldr	r1, .L8+44
	ldr	r3, .L8+48
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r1, [r6]
	orr	r3, r3, r0
	orr	r2, r3, r2
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, lr}
	b	mipi_csis_write
.L9:
	.align	2
.L8:
	.word	MIPI_CSIS_CMN_CTRL
	.word	MIPI_CSIS_CMN_CTRL_LANE_NR_MASK
	.word	MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET
	.word	MIPI_CSIS_ISPCONFIG_CH0
	.word	MIPI_CSIS_CLK_CTRL
	.word	MIPI_CSIS_ISPCFG_ALIGN_32BIT
	.word	MIPI_CSIS_ISPSYNC_CH0
	.word	MIPI_CSIS_CLK_CTRL_WCLK_SRC
	.word	MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK
	.word	MIPI_CSIS_DPHYBCTRL_L
	.word	MIPI_CSIS_DPHYBCTRL_H
	.word	MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL
	.word	MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW
	.size	mipi_csis_set_params, .-mipi_csis_set_params
	.comm	MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET,4,4
	.comm	MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET,4,4
	.comm	MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET,4,4
	.comm	MIPI_CSIS_ISPSYNC_CH0,4,4
	.comm	MIPI_CSIS_ISPCONFIG_CH0,4,4
	.comm	MIPI_CSIS_ISPCFG_ALIGN_32BIT,4,4
	.comm	MIPI_CSIS_DPHYBCTRL_L,4,4
	.comm	MIPI_CSIS_DPHYBCTRL_H,4,4
	.comm	MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL,4,4
	.comm	MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW,4,4
	.comm	MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET,4,4
	.comm	MIPI_CSIS_CMN_CTRL_LANE_NR_MASK,4,4
	.comm	MIPI_CSIS_CMN_CTRL,4,4
	.comm	MIPI_CSIS_CLK_CTRL_WCLK_SRC,4,4
	.comm	MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK,4,4
	.comm	MIPI_CSIS_CLK_CTRL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
