	.file	"extr_ixgbe_main.c_ixgbe_configure_bridge_mode.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"VEB"
.LC1:
	.string	"VEPA"
.LC2:
	.string	"enabling bridge mode: %s\n"
	.text
	.p2align 4
	.type	ixgbe_configure_bridge_mode, @function
ixgbe_configure_bridge_mode:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	lea	r12, 16[rdi]
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	cmp	esi, 128
	je	.L2
	cmp	esi, 129
	je	.L3
	mov	eax, DWORD PTR EINVAL[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	esi, DWORD PTR IXGBE_PFDTXGSWC[rip]
	xor	edx, edx
	mov	rdi, r12
	call	IXGBE_WRITE_REG@PLT
	mov	esi, DWORD PTR IXGBE_VMD_CTL[rip]
	mov	rdi, r12
	call	IXGBE_READ_REG@PLT
	mov	esi, DWORD PTR IXGBE_VMD_CTL[rip]
	or	eax, DWORD PTR IXGBE_VT_CTL_REPLEN[rip]
	mov	rdi, r12
	mov	edx, eax
	call	IXGBE_WRITE_REG@PLT
	mov	r13d, DWORD PTR 4[rbx]
	add	r13d, DWORD PTR [rbx]
	je	.L5
	xor	ebp, ebp
	.p2align 4,,10
	.p2align 3
.L7:
	mov	rax, QWORD PTR 16[rbx]
	test	rax, rax
	je	.L6
	mov	edx, ebp
	mov	esi, 1
	mov	rdi, r12
	call	rax
.L6:
	add	ebp, 1
	cmp	r13d, ebp
	jne	.L7
.L5:
	mov	DWORD PTR 8[rbx], 128
	lea	rdx, .LC1[rip]
.L13:
	mov	edi, DWORD PTR drv[rip]
	lea	rsi, .LC2[rip]
	call	e_info@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	edx, DWORD PTR IXGBE_PFDTXGSWC_VT_LBEN[rip]
	mov	esi, DWORD PTR IXGBE_PFDTXGSWC[rip]
	mov	rdi, r12
	call	IXGBE_WRITE_REG@PLT
	mov	esi, DWORD PTR IXGBE_VMD_CTL[rip]
	mov	rdi, r12
	call	IXGBE_READ_REG@PLT
	mov	edx, eax
	mov	eax, DWORD PTR [rbx]
	test	eax, eax
	je	.L31
.L8:
	mov	esi, DWORD PTR IXGBE_VMD_CTL[rip]
	mov	rdi, r12
	call	IXGBE_WRITE_REG@PLT
	mov	r13d, DWORD PTR 4[rbx]
	add	r13d, DWORD PTR [rbx]
	je	.L9
	xor	ebp, ebp
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rax, QWORD PTR 16[rbx]
	test	rax, rax
	je	.L10
	mov	edx, ebp
	xor	esi, esi
	mov	rdi, r12
	call	rax
.L10:
	add	ebp, 1
	cmp	r13d, ebp
	jne	.L11
.L9:
	mov	DWORD PTR 8[rbx], 129
	lea	rdx, .LC0[rip]
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L31:
	mov	eax, DWORD PTR IXGBE_VT_CTL_REPLEN[rip]
	not	eax
	and	edx, eax
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	ixgbe_configure_bridge_mode, .-ixgbe_configure_bridge_mode
	.comm	drv,4,4
	.comm	IXGBE_VT_CTL_REPLEN,4,4
	.comm	IXGBE_VMD_CTL,4,4
	.comm	IXGBE_PFDTXGSWC_VT_LBEN,4,4
	.comm	IXGBE_PFDTXGSWC,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ixgbe_main.c_ixgbe_configure_bridge_mode.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"VEB\000"
	.align	2
.LC1:
	.ascii	"VEPA\000"
	.align	2
.LC2:
	.ascii	"enabling bridge mode: %s\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ixgbe_configure_bridge_mode, %function
ixgbe_configure_bridge_mode:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	cmp	r1, #128
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r0
	add	r6, r0, #12
	beq	.L2
	cmp	r1, #129
	beq	.L3
	ldr	r3, .L31
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L2:
	ldr	r3, .L31+4
	ldr	r5, .L31+8
	ldr	r1, [r3]
	mov	r2, #0
	mov	r0, r6
	bl	IXGBE_WRITE_REG
	ldr	r1, [r5]
	mov	r0, r6
	bl	IXGBE_READ_REG
	mov	r2, r0
	ldr	r3, .L31+12
	mov	r0, r6
	ldr	r3, [r3]
	ldr	r1, [r5]
	orr	r2, r2, r3
	bl	IXGBE_WRITE_REG
	ldr	r7, [r4]
	ldr	r3, [r4, #4]
	adds	r7, r7, r3
	beq	.L5
	mov	r5, #0
.L7:
	ldr	r3, [r4, #12]
	cmp	r3, #0
	beq	.L6
	mov	r2, r5
	mov	r1, #1
	mov	r0, r6
	blx	r3
.L6:
	add	r5, r5, #1
	cmp	r7, r5
	bne	.L7
.L5:
	mov	r2, #128
	ldr	r3, .L31+16
	str	r2, [r4, #8]
	ldr	r0, [r3]
	ldr	r2, .L31+20
.L13:
	ldr	r1, .L31+24
	bl	e_info
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L3:
	ldr	r3, .L31+4
	ldr	r2, .L31+28
	ldr	r5, .L31+8
	ldr	r1, [r3]
	ldr	r2, [r2]
	mov	r0, r6
	bl	IXGBE_WRITE_REG
	ldr	r1, [r5]
	mov	r0, r6
	bl	IXGBE_READ_REG
	ldr	r3, [r4]
	mov	r2, r0
	cmp	r3, #0
	ldreq	r3, .L31+12
	ldr	r1, [r5]
	ldreq	r3, [r3]
	biceq	r2, r0, r3
	mov	r0, r6
	bl	IXGBE_WRITE_REG
	ldr	r7, [r4]
	ldr	r3, [r4, #4]
	adds	r7, r7, r3
	beq	.L9
	mov	r5, #0
.L11:
	ldr	r3, [r4, #12]
	cmp	r3, #0
	beq	.L10
	mov	r2, r5
	mov	r1, #0
	mov	r0, r6
	blx	r3
.L10:
	add	r5, r5, #1
	cmp	r7, r5
	bne	.L11
.L9:
	mov	r2, #129
	ldr	r3, .L31+16
	str	r2, [r4, #8]
	ldr	r0, [r3]
	ldr	r2, .L31+32
	b	.L13
.L32:
	.align	2
.L31:
	.word	EINVAL
	.word	IXGBE_PFDTXGSWC
	.word	IXGBE_VMD_CTL
	.word	IXGBE_VT_CTL_REPLEN
	.word	drv
	.word	.LC1
	.word	.LC2
	.word	IXGBE_PFDTXGSWC_VT_LBEN
	.word	.LC0
	.size	ixgbe_configure_bridge_mode, .-ixgbe_configure_bridge_mode
	.comm	drv,4,4
	.comm	IXGBE_VT_CTL_REPLEN,4,4
	.comm	IXGBE_VMD_CTL,4,4
	.comm	IXGBE_PFDTXGSWC_VT_LBEN,4,4
	.comm	IXGBE_PFDTXGSWC,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
