	.file	"extr_bwiphy.c_bwi_phy_init_11b_rev6.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	bwi_phy_init_11b_rev6, @function
bwi_phy_init_11b_rev6:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	edx, 33146
	mov	esi, 62
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	r13, QWORD PTR 24[rdi]
	call	PHY_WRITE@PLT
	mov	edx, 88
	mov	esi, 122
	mov	rdi, r12
	call	RF_SETBITS@PLT
	mov	eax, DWORD PTR 16[r12]
	lea	edx, -4[rax]
	cmp	edx, 1
	jbe	.L35
	cmp	eax, 8
	je	.L36
.L3:
	mov	ebx, 136
	.p2align 4,,10
	.p2align 3
.L6:
	imul	edx, ebx, -514
	mov	esi, ebx
	mov	rdi, r12
	add	ebx, 1
	add	edx, 77615
	call	PHY_WRITE@PLT
	cmp	ebx, 152
	jne	.L6
	.p2align 4,,10
	.p2align 3
.L7:
	imul	edx, ebx, -514
	mov	esi, ebx
	mov	rdi, r12
	add	ebx, 1
	add	edx, 94063
	call	PHY_WRITE@PLT
	cmp	ebx, 168
	jne	.L7
	mov	ebp, 8480
	.p2align 4,,10
	.p2align 3
.L8:
	mov	edx, ebp
	mov	esi, ebx
	mov	rdi, r12
	add	ebp, 514
	and	edx, 16191
	add	ebx, 1
	call	PHY_WRITE@PLT
	mov	edi, 10
	call	DELAY@PLT
	cmp	ebp, 24928
	jne	.L8
	mov	rax, QWORD PTR IEEE80211_MODE_11G[rip]
	cmp	QWORD PTR [r12], rax
	je	.L37
.L9:
	mov	ebp, DWORD PTR 20[r12]
	xor	edx, edx
	cmp	ebp, 7
	jg	.L38
	mov	esi, 13
	mov	rdi, r12
	call	bwi_rf_set_chan@PLT
.L11:
	mov	edx, 32
	mov	esi, 80
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 35
	mov	esi, 80
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edi, 40
	call	DELAY@PLT
	mov	eax, DWORD PTR 16[r12]
	cmp	eax, 5
	jle	.L23
	cmp	eax, 8
	je	.L23
.L12:
	mov	ecx, 7
	mov	edx, 248
	mov	esi, 122
	mov	rdi, r12
	call	RF_FILT_SETBITS@PLT
	xor	edx, edx
	mov	esi, ebp
	mov	rdi, r12
	call	bwi_rf_set_chan@PLT
	mov	edx, 512
	mov	esi, 20
	mov	rdi, r12
	call	PHY_WRITE@PLT
	cmp	DWORD PTR 16[r12], 5
	jle	.L14
	mov	edx, 35010
	mov	esi, 42
	mov	rdi, r12
	call	PHY_WRITE@PLT
.L15:
	mov	edx, 1640
	mov	esi, 56
	mov	rdi, r12
	call	PHY_WRITE@PLT
	xor	esi, esi
	mov	rdi, r12
	call	bwi_mac_set_tpctl_11bg@PLT
	cmp	DWORD PTR 16[r12], 5
	jle	.L39
.L17:
	cmp	DWORD PTR 8[r12], 4
	je	.L40
	mov	ecx, 4
	mov	edx, 65472
	mov	esi, 2
	mov	rdi, r12
	call	PHY_FILT_SETBITS@PLT
.L20:
	mov	esi, DWORD PTR BWI_BBP_ATTEN[rip]
	mov	rax, QWORD PTR IEEE80211_MODE_11B[rip]
	cmp	QWORD PTR [r12], rax
	je	.L41
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, r13
	xor	edx, edx
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	CSR_WRITE_2@PLT
	.p2align 4,,10
	.p2align 3
.L38:
	.cfi_restore_state
	mov	esi, 1
	mov	rdi, r12
	call	bwi_rf_set_chan@PLT
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edx, 35520
	mov	esi, 42
	mov	rdi, r12
	call	PHY_WRITE@PLT
	jmp	.L15
	.p2align 4,,10
	.p2align 3
.L40:
	mov	edx, DWORD PTR BWI_PHY_MAGIC_REG1_VAL2[rip]
	mov	esi, DWORD PTR BWI_PHY_MAGIC_REG1[rip]
	mov	rdi, r13
	call	CSR_WRITE_2@PLT
	mov	edx, 61440
	mov	esi, 97
	mov	rdi, r12
	call	PHY_CLRBITS@PLT
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L41:
	mov	edx, DWORD PTR BWI_BBP_ATTEN_MAGIC2[rip]
	mov	rdi, r13
	call	CSR_WRITE_2@PLT
	mov	edx, 1040
	mov	esi, 22
	mov	rdi, r12
	call	PHY_WRITE@PLT
	mov	edx, 2080
	mov	esi, 23
	mov	rdi, r12
	call	PHY_WRITE@PLT
	mov	edx, 7
	mov	esi, 98
	mov	rdi, r12
	call	PHY_WRITE@PLT
	mov	rdi, r12
	call	bwi_rf_init_bcm2050@PLT
	mov	rdi, r12
	call	bwi_rf_lo_update@PLT
	mov	eax, DWORD PTR 0[r13]
	test	DWORD PTR BWI_CARD_F_SW_NRSSI[rip], eax
	jne	.L42
.L22:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	rdi, r12
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	bwi_mac_init_tpctl_11bg@PLT
.L23:
	.cfi_restore_state
	mov	edx, 2
	mov	esi, 124
	mov	rdi, r12
	call	RF_SETBITS@PLT
	mov	edx, 32
	mov	esi, 80
	mov	rdi, r12
	call	RF_WRITE@PLT
	cmp	DWORD PTR 16[r12], 2
	jg	.L12
	mov	rdi, r12
	mov	edx, 32
	mov	esi, 124
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 112
	mov	esi, 90
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 123
	mov	esi, 91
	call	RF_WRITE@PLT
	mov	edx, 176
	mov	esi, 92
	mov	rdi, r12
	call	RF_WRITE@PLT
	jmp	.L12
.L39:
	mov	ecx, 3
	mov	edx, 65408
	mov	esi, 93
	mov	rdi, r12
	call	PHY_FILT_SETBITS@PLT
	cmp	DWORD PTR 16[r12], 2
	jg	.L17
	mov	edx, 13
	mov	esi, 93
	mov	rdi, r12
	call	RF_WRITE@PLT
	jmp	.L17
.L35:
	mov	rdi, r12
	mov	edx, 55
	mov	esi, 81
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 112
	mov	esi, 82
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 179
	mov	esi, 83
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 155
	mov	esi, 84
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 136
	mov	esi, 90
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 136
	mov	esi, 91
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 136
	mov	esi, 93
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 136
	mov	esi, 94
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 136
	mov	esi, 125
	call	RF_WRITE@PLT
	mov	esi, DWORD PTR BWI_HFLAG_MAGIC1[rip]
	mov	rdi, r12
	call	HFLAGS_SETBITS@PLT
	jmp	.L3
.L37:
	mov	rdi, r12
	mov	edx, 32
	mov	esi, 122
	call	RF_SETBITS@PLT
	mov	rdi, r12
	mov	edx, 4
	mov	esi, 81
	call	RF_SETBITS@PLT
	mov	rdi, r12
	mov	edx, 256
	mov	esi, 2050
	call	PHY_SETBITS@PLT
	mov	rdi, r12
	mov	edx, 8192
	mov	esi, 1067
	call	PHY_SETBITS@PLT
	xor	edx, edx
	mov	rdi, r12
	mov	esi, 91
	call	PHY_WRITE@PLT
	xor	edx, edx
	mov	esi, 92
	mov	rdi, r12
	call	PHY_WRITE@PLT
	jmp	.L9
.L36:
	xor	edx, edx
	mov	esi, 81
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 64
	mov	esi, 82
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 183
	mov	esi, 83
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 152
	mov	esi, 84
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 136
	mov	esi, 90
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 107
	mov	esi, 91
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 15
	mov	esi, 92
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	eax, DWORD PTR 0[r13]
	test	DWORD PTR BWI_CARD_F_ALT_IQ[rip], eax
	je	.L4
	mov	edx, 250
	mov	esi, 93
	mov	rdi, r12
	call	RF_WRITE@PLT
	mov	edx, 216
	mov	esi, 94
	mov	rdi, r12
	call	RF_WRITE@PLT
.L5:
	mov	rdi, r12
	mov	edx, 3
	mov	esi, 115
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 168
	mov	esi, 125
	call	RF_WRITE@PLT
	mov	rdi, r12
	mov	edx, 1
	mov	esi, 124
	call	RF_WRITE@PLT
	mov	edx, 8
	mov	esi, 126
	mov	rdi, r12
	call	RF_WRITE@PLT
	jmp	.L3
.L42:
	mov	rdi, r12
	call	bwi_rf_calc_nrssi_slope@PLT
	mov	rdi, r12
	call	bwi_rf_set_nrssi_thr@PLT
	jmp	.L22
.L4:
	mov	rdi, r12
	mov	edx, 245
	mov	esi, 93
	call	RF_WRITE@PLT
	mov	edx, 184
	mov	esi, 94
	mov	rdi, r12
	call	RF_WRITE@PLT
	jmp	.L5
	.cfi_endproc
.LFE0:
	.size	bwi_phy_init_11b_rev6, .-bwi_phy_init_11b_rev6
	.comm	IEEE80211_MODE_11G,8,8
	.comm	IEEE80211_MODE_11B,8,8
	.comm	BWI_PHY_MAGIC_REG1_VAL2,4,4
	.comm	BWI_PHY_MAGIC_REG1,4,4
	.comm	BWI_HFLAG_MAGIC1,4,4
	.comm	BWI_CARD_F_SW_NRSSI,4,4
	.comm	BWI_CARD_F_ALT_IQ,4,4
	.comm	BWI_BBP_ATTEN_MAGIC2,4,4
	.comm	BWI_BBP_ATTEN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_bwiphy.c_bwi_phy_init_11b_rev6.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bwi_phy_init_11b_rev6, %function
bwi_phy_init_11b_rev6:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r5, r0
	mov	r1, #62
	ldr	r2, .L41
	ldr	r7, [r0, #16]
	bl	PHY_WRITE
	mov	r2, #88
	mov	r0, r5
	mov	r1, #122
	bl	RF_SETBITS
	ldr	r3, [r5, #8]
	sub	r2, r3, #4
	cmp	r2, #1
	bls	.L33
	cmp	r3, #8
	beq	.L34
.L3:
	mov	r6, #136
	mvn	r8, #512
	ldr	r4, .L41+4
.L6:
	mov	r2, r4
	sub	r4, r4, #512
	mov	r1, r6
	mov	r0, r5
	sub	r4, r4, #2
	bl	PHY_WRITE
	cmp	r4, r8
	add	r6, r6, #1
	bne	.L6
	mov	r6, #152
	ldr	r4, .L41+8
	ldr	r8, .L41+4
.L7:
	mov	r2, r4
	sub	r4, r4, #512
	mov	r1, r6
	mov	r0, r5
	sub	r4, r4, #2
	bl	PHY_WRITE
	cmp	r4, r8
	add	r6, r6, #1
	bne	.L7
	mov	r6, #168
	ldr	r4, .L41+12
	ldr	r9, .L41+16
	ldr	r8, .L41+20
.L8:
	mov	r1, r6
	and	r2, r4, r9
	mov	r0, r5
	add	r4, r4, #512
	bl	PHY_WRITE
	add	r4, r4, #2
	mov	r0, #10
	bl	DELAY
	cmp	r4, r8
	add	r6, r6, #1
	bne	.L8
	ldr	r3, .L41+24
	ldr	r2, [r5]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L35
.L9:
	ldr	r4, [r5, #12]
	mov	r2, #0
	cmp	r4, #7
	movgt	r1, #1
	movle	r1, #13
	mov	r0, r5
	bl	bwi_rf_set_chan
	mov	r2, #32
	mov	r1, #80
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #35
	mov	r1, #80
	mov	r0, r5
	bl	RF_WRITE
	mov	r0, #40
	bl	DELAY
	ldr	r3, [r5, #8]
	cmp	r3, #8
	cmpne	r3, #5
	ble	.L36
.L12:
	mov	r3, #7
	mov	r2, #248
	mov	r1, #122
	mov	r0, r5
	bl	RF_FILT_SETBITS
	mov	r1, r4
	mov	r2, #0
	mov	r0, r5
	bl	bwi_rf_set_chan
	mov	r2, #512
	mov	r1, #20
	mov	r0, r5
	bl	PHY_WRITE
	ldr	r3, [r5, #8]
	mov	r1, #42
	cmp	r3, #5
	ldrgt	r2, .L41+28
	ldrle	r2, .L41+32
	mov	r0, r5
	bl	PHY_WRITE
	mov	r1, #56
	ldr	r2, .L41+36
	mov	r0, r5
	bl	PHY_WRITE
	mov	r1, #0
	mov	r0, r5
	bl	bwi_mac_set_tpctl_11bg
	ldr	r3, [r5, #8]
	cmp	r3, #5
	ble	.L37
.L16:
	ldr	r3, [r5, #4]
	cmp	r3, #4
	beq	.L38
	mov	r3, #4
	mov	r1, #2
	mov	r0, r5
	ldr	r2, .L41+40
	bl	PHY_FILT_SETBITS
.L19:
	ldr	r3, .L41+44
	ldr	r1, [r5]
	ldr	r2, [r3]
	ldr	r3, .L41+48
	cmp	r1, r2
	ldr	r1, [r3]
	beq	.L39
	mov	r0, r7
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r2, #0
	b	CSR_WRITE_2
.L38:
	ldr	r3, .L41+52
	ldr	r2, .L41+56
	ldr	r1, [r3]
	mov	r0, r7
	ldr	r2, [r2]
	bl	CSR_WRITE_2
	mov	r2, #61440
	mov	r1, #97
	mov	r0, r5
	bl	PHY_CLRBITS
	b	.L19
.L39:
	ldr	r3, .L41+60
	mov	r0, r7
	ldr	r2, [r3]
	bl	CSR_WRITE_2
	mov	r2, #1040
	mov	r1, #22
	mov	r0, r5
	bl	PHY_WRITE
	mov	r2, #2080
	mov	r1, #23
	mov	r0, r5
	bl	PHY_WRITE
	mov	r2, #7
	mov	r1, #98
	mov	r0, r5
	bl	PHY_WRITE
	mov	r0, r5
	bl	bwi_rf_init_bcm2050
	mov	r0, r5
	bl	bwi_rf_lo_update
	ldr	r3, .L41+64
	ldr	r2, [r7]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L40
	mov	r0, r5
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	bwi_mac_init_tpctl_11bg
.L37:
	mov	r3, #3
	mov	r1, #93
	mov	r0, r5
	ldr	r2, .L41+68
	bl	PHY_FILT_SETBITS
	ldr	r3, [r5, #8]
	cmp	r3, #2
	bgt	.L16
	mov	r2, #13
	mov	r1, #93
	mov	r0, r5
	bl	RF_WRITE
	b	.L16
.L36:
	mov	r2, #2
	mov	r1, #124
	mov	r0, r5
	bl	RF_SETBITS
	mov	r2, #32
	mov	r1, #80
	mov	r0, r5
	bl	RF_WRITE
	ldr	r3, [r5, #8]
	cmp	r3, #2
	bgt	.L12
	mov	r2, #32
	mov	r1, #124
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #112
	mov	r1, #90
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #123
	mov	r1, #91
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #176
	mov	r1, #92
	mov	r0, r5
	bl	RF_WRITE
	b	.L12
.L33:
	mov	r2, #55
	mov	r1, #81
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #112
	mov	r1, #82
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #179
	mov	r1, #83
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #155
	mov	r1, #84
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #136
	mov	r1, #90
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #136
	mov	r1, #91
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #136
	mov	r1, #93
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #136
	mov	r1, #94
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #136
	mov	r1, #125
	mov	r0, r5
	bl	RF_WRITE
	ldr	r3, .L41+72
	mov	r0, r5
	ldr	r1, [r3]
	bl	HFLAGS_SETBITS
	b	.L3
.L35:
	mov	r2, #32
	mov	r1, #122
	mov	r0, r5
	bl	RF_SETBITS
	mov	r2, #4
	mov	r1, #81
	mov	r0, r5
	bl	RF_SETBITS
	mov	r2, #256
	mov	r0, r5
	ldr	r1, .L41+76
	bl	PHY_SETBITS
	mov	r2, #8192
	mov	r0, r5
	ldr	r1, .L41+80
	bl	PHY_SETBITS
	mov	r2, #0
	mov	r1, #91
	mov	r0, r5
	bl	PHY_WRITE
	mov	r2, #0
	mov	r1, #92
	mov	r0, r5
	bl	PHY_WRITE
	b	.L9
.L34:
	mov	r2, #0
	mov	r1, #81
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #64
	mov	r1, #82
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #183
	mov	r1, #83
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #152
	mov	r1, #84
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #136
	mov	r1, #90
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #107
	mov	r1, #91
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #15
	mov	r1, #92
	mov	r0, r5
	bl	RF_WRITE
	ldr	r3, .L41+84
	ldr	r2, [r7]
	ldr	r3, [r3]
	tst	r2, r3
	beq	.L4
	mov	r2, #250
	mov	r1, #93
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #216
	mov	r1, #94
	mov	r0, r5
	bl	RF_WRITE
.L5:
	mov	r2, #3
	mov	r1, #115
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #168
	mov	r1, #125
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #1
	mov	r1, #124
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #8
	mov	r1, #126
	mov	r0, r5
	bl	RF_WRITE
	b	.L3
.L40:
	mov	r0, r5
	bl	bwi_rf_calc_nrssi_slope
	mov	r0, r5
	bl	bwi_rf_set_nrssi_thr
	mov	r0, r5
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	bwi_mac_init_tpctl_11bg
.L4:
	mov	r2, #245
	mov	r1, #93
	mov	r0, r5
	bl	RF_WRITE
	mov	r2, #184
	mov	r1, #94
	mov	r0, r5
	bl	RF_WRITE
	b	.L5
.L42:
	.align	2
.L41:
	.word	33146
	.word	7711
	.word	15935
	.word	8480
	.word	16191
	.word	24928
	.word	IEEE80211_MODE_11G
	.word	35010
	.word	35520
	.word	1640
	.word	65472
	.word	IEEE80211_MODE_11B
	.word	BWI_BBP_ATTEN
	.word	BWI_PHY_MAGIC_REG1
	.word	BWI_PHY_MAGIC_REG1_VAL2
	.word	BWI_BBP_ATTEN_MAGIC2
	.word	BWI_CARD_F_SW_NRSSI
	.word	65408
	.word	BWI_HFLAG_MAGIC1
	.word	2050
	.word	1067
	.word	BWI_CARD_F_ALT_IQ
	.size	bwi_phy_init_11b_rev6, .-bwi_phy_init_11b_rev6
	.comm	IEEE80211_MODE_11G,4,4
	.comm	IEEE80211_MODE_11B,4,4
	.comm	BWI_PHY_MAGIC_REG1_VAL2,4,4
	.comm	BWI_PHY_MAGIC_REG1,4,4
	.comm	BWI_HFLAG_MAGIC1,4,4
	.comm	BWI_CARD_F_SW_NRSSI,4,4
	.comm	BWI_CARD_F_ALT_IQ,4,4
	.comm	BWI_BBP_ATTEN_MAGIC2,4,4
	.comm	BWI_BBP_ATTEN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
