	.file	"extr_gfxhub_v2_0.c_gfxhub_v2_0_init_cache_regs.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	gfxhub_v2_0_init_cache_regs, @function
gfxhub_v2_0_init_cache_regs:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	mov	edx, DWORD PTR mmGCVM_L2_CNTL[rip]
	mov	rbx, rdi
	xor	esi, esi
	mov	edi, DWORD PTR GC[rip]
	call	RREG32_SOC15@PLT
	mov	edx, DWORD PTR ENABLE_L2_CACHE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	mov	ecx, 1
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR ENABLE_L2_FRAGMENT_PROCESSING[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	xor	ecx, ecx
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	mov	ecx, 1
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR L2_PDE0_CACHE_TAG_GENERATION_MODE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	xor	ecx, ecx
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR PDE_FAULT_CLASSIFICATION[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	xor	ecx, ecx
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR CONTEXT1_IDENTITY_ACCESS_MODE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	mov	ecx, 1
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR IDENTITY_MODE_FRAGMENT_SIZE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL[rip]
	xor	ecx, ecx
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR mmGCVM_L2_CNTL[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	mov	ecx, eax
	call	WREG32_SOC15@PLT
	mov	edx, DWORD PTR mmGCVM_L2_CNTL2[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	RREG32_SOC15@PLT
	mov	edx, DWORD PTR INVALIDATE_ALL_L1_TLBS[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL2[rip]
	mov	ecx, 1
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR INVALIDATE_L2_CACHE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL2[rip]
	mov	ecx, 1
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edi, DWORD PTR GC[rip]
	mov	edx, DWORD PTR mmGCVM_L2_CNTL2[rip]
	xor	esi, esi
	mov	ecx, eax
	call	WREG32_SOC15@PLT
	cmp	QWORD PTR [rbx], 0
	mov	edi, DWORD PTR mmGCVM_L2_CNTL3_DEFAULT[rip]
	je	.L2
	mov	edx, DWORD PTR BANK_SELECT[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL3[rip]
	mov	ecx, 12
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR L2_CACHE_BIGK_FRAGMENT_SIZE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL3[rip]
	mov	ecx, 9
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	ecx, eax
.L3:
	mov	edx, DWORD PTR mmGCVM_L2_CNTL3[rip]
	mov	edi, DWORD PTR GC[rip]
	xor	esi, esi
	call	WREG32_SOC15@PLT
	mov	edx, DWORD PTR VMC_TAP_PDE_REQUEST_PHYSICAL[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL4[rip]
	xor	ecx, ecx
	mov	edi, DWORD PTR mmGCVM_L2_CNTL4_DEFAULT[rip]
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR VMC_TAP_PTE_REQUEST_PHYSICAL[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL4[rip]
	xor	ecx, ecx
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR mmGCVM_L2_CNTL4[rip]
	xor	esi, esi
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	edi, DWORD PTR GC[rip]
	mov	ecx, eax
	jmp	WREG32_SOC15@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edx, DWORD PTR BANK_SELECT[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL3[rip]
	mov	ecx, 9
	call	REG_SET_FIELD@PLT
	mov	edx, DWORD PTR L2_CACHE_BIGK_FRAGMENT_SIZE[rip]
	mov	esi, DWORD PTR GCVM_L2_CNTL3[rip]
	mov	ecx, 6
	mov	edi, eax
	call	REG_SET_FIELD@PLT
	mov	ecx, eax
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	gfxhub_v2_0_init_cache_regs, .-gfxhub_v2_0_init_cache_regs
	.comm	mmGCVM_L2_CNTL4_DEFAULT,4,4
	.comm	mmGCVM_L2_CNTL4,4,4
	.comm	mmGCVM_L2_CNTL3_DEFAULT,4,4
	.comm	mmGCVM_L2_CNTL3,4,4
	.comm	mmGCVM_L2_CNTL2,4,4
	.comm	mmGCVM_L2_CNTL,4,4
	.comm	VMC_TAP_PTE_REQUEST_PHYSICAL,4,4
	.comm	VMC_TAP_PDE_REQUEST_PHYSICAL,4,4
	.comm	PDE_FAULT_CLASSIFICATION,4,4
	.comm	L2_PDE0_CACHE_TAG_GENERATION_MODE,4,4
	.comm	L2_CACHE_BIGK_FRAGMENT_SIZE,4,4
	.comm	INVALIDATE_L2_CACHE,4,4
	.comm	INVALIDATE_ALL_L1_TLBS,4,4
	.comm	IDENTITY_MODE_FRAGMENT_SIZE,4,4
	.comm	GCVM_L2_CNTL4,4,4
	.comm	GCVM_L2_CNTL3,4,4
	.comm	GCVM_L2_CNTL2,4,4
	.comm	GCVM_L2_CNTL,4,4
	.comm	GC,4,4
	.comm	ENABLE_L2_FRAGMENT_PROCESSING,4,4
	.comm	ENABLE_L2_CACHE,4,4
	.comm	ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY,4,4
	.comm	CONTEXT1_IDENTITY_ACCESS_MODE,4,4
	.comm	BANK_SELECT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gfxhub_v2_0.c_gfxhub_v2_0_init_cache_regs.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gfxhub_v2_0_init_cache_regs, %function
gfxhub_v2_0_init_cache_regs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r5, .L6
	ldr	r7, .L6+4
	mov	r6, r0
	ldr	r2, [r7]
	mov	r1, #0
	ldr	r0, [r5]
	ldr	r4, .L6+8
	bl	RREG32_SOC15
	ldr	r3, .L6+12
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #1
	bl	REG_SET_FIELD
	ldr	r3, .L6+16
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #0
	bl	REG_SET_FIELD
	ldr	r3, .L6+20
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #1
	bl	REG_SET_FIELD
	ldr	r3, .L6+24
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #0
	bl	REG_SET_FIELD
	ldr	r3, .L6+28
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #0
	bl	REG_SET_FIELD
	ldr	r3, .L6+32
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #1
	bl	REG_SET_FIELD
	ldr	r3, .L6+36
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #0
	bl	REG_SET_FIELD
	ldr	r4, .L6+40
	mov	r3, r0
	ldr	r2, [r7]
	mov	r1, #0
	ldr	r0, [r5]
	bl	WREG32_SOC15
	ldr	r2, [r4]
	mov	r1, #0
	ldr	r0, [r5]
	bl	RREG32_SOC15
	ldr	r7, .L6+44
	ldr	r3, .L6+48
	ldr	r1, [r7]
	ldr	r2, [r3]
	mov	r3, #1
	bl	REG_SET_FIELD
	ldr	r3, .L6+52
	ldr	r1, [r7]
	ldr	r2, [r3]
	mov	r3, #1
	bl	REG_SET_FIELD
	ldr	r2, [r4]
	mov	r3, r0
	mov	r1, #0
	ldr	r0, [r5]
	bl	WREG32_SOC15
	ldr	r3, .L6+56
	ldr	r2, [r6]
	ldr	r0, [r3]
	ldr	r4, .L6+60
	ldr	r3, .L6+64
	cmp	r2, #0
	ldr	r1, [r4]
	ldr	r2, [r3]
	beq	.L2
	mov	r3, #12
	bl	REG_SET_FIELD
	ldr	r3, .L6+68
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #9
	bl	REG_SET_FIELD
	mov	r3, r0
.L3:
	ldr	r2, .L6+72
	mov	r1, #0
	ldr	r2, [r2]
	ldr	r0, [r5]
	bl	WREG32_SOC15
	ldr	r4, .L6+76
	ldr	r2, .L6+80
	ldr	r3, .L6+84
	ldr	r1, [r4]
	ldr	r0, [r2]
	ldr	r2, [r3]
	mov	r3, #0
	bl	REG_SET_FIELD
	ldr	r3, .L6+88
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #0
	bl	REG_SET_FIELD
	ldr	r2, .L6+92
	mov	r3, r0
	mov	r1, #0
	ldr	r0, [r5]
	ldr	r2, [r2]
	pop	{r4, r5, r6, r7, r8, lr}
	b	WREG32_SOC15
.L2:
	mov	r3, #9
	bl	REG_SET_FIELD
	ldr	r3, .L6+68
	ldr	r1, [r4]
	ldr	r2, [r3]
	mov	r3, #6
	bl	REG_SET_FIELD
	mov	r3, r0
	b	.L3
.L7:
	.align	2
.L6:
	.word	GC
	.word	mmGCVM_L2_CNTL
	.word	GCVM_L2_CNTL
	.word	ENABLE_L2_CACHE
	.word	ENABLE_L2_FRAGMENT_PROCESSING
	.word	ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY
	.word	L2_PDE0_CACHE_TAG_GENERATION_MODE
	.word	PDE_FAULT_CLASSIFICATION
	.word	CONTEXT1_IDENTITY_ACCESS_MODE
	.word	IDENTITY_MODE_FRAGMENT_SIZE
	.word	mmGCVM_L2_CNTL2
	.word	GCVM_L2_CNTL2
	.word	INVALIDATE_ALL_L1_TLBS
	.word	INVALIDATE_L2_CACHE
	.word	mmGCVM_L2_CNTL3_DEFAULT
	.word	GCVM_L2_CNTL3
	.word	BANK_SELECT
	.word	L2_CACHE_BIGK_FRAGMENT_SIZE
	.word	mmGCVM_L2_CNTL3
	.word	GCVM_L2_CNTL4
	.word	mmGCVM_L2_CNTL4_DEFAULT
	.word	VMC_TAP_PDE_REQUEST_PHYSICAL
	.word	VMC_TAP_PTE_REQUEST_PHYSICAL
	.word	mmGCVM_L2_CNTL4
	.size	gfxhub_v2_0_init_cache_regs, .-gfxhub_v2_0_init_cache_regs
	.comm	mmGCVM_L2_CNTL4_DEFAULT,4,4
	.comm	mmGCVM_L2_CNTL4,4,4
	.comm	mmGCVM_L2_CNTL3_DEFAULT,4,4
	.comm	mmGCVM_L2_CNTL3,4,4
	.comm	mmGCVM_L2_CNTL2,4,4
	.comm	mmGCVM_L2_CNTL,4,4
	.comm	VMC_TAP_PTE_REQUEST_PHYSICAL,4,4
	.comm	VMC_TAP_PDE_REQUEST_PHYSICAL,4,4
	.comm	PDE_FAULT_CLASSIFICATION,4,4
	.comm	L2_PDE0_CACHE_TAG_GENERATION_MODE,4,4
	.comm	L2_CACHE_BIGK_FRAGMENT_SIZE,4,4
	.comm	INVALIDATE_L2_CACHE,4,4
	.comm	INVALIDATE_ALL_L1_TLBS,4,4
	.comm	IDENTITY_MODE_FRAGMENT_SIZE,4,4
	.comm	GCVM_L2_CNTL4,4,4
	.comm	GCVM_L2_CNTL3,4,4
	.comm	GCVM_L2_CNTL2,4,4
	.comm	GCVM_L2_CNTL,4,4
	.comm	GC,4,4
	.comm	ENABLE_L2_FRAGMENT_PROCESSING,4,4
	.comm	ENABLE_L2_CACHE,4,4
	.comm	ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY,4,4
	.comm	CONTEXT1_IDENTITY_ACCESS_MODE,4,4
	.comm	BANK_SELECT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
