	.file	"extr_sdhci-tegra.c_tegra_sdhci_reset.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	tegra_sdhci_reset, @function
tegra_sdhci_reset:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	sdhci_priv@PLT
	mov	rdi, rax
	call	sdhci_pltfm_priv@PLT
	mov	esi, r12d
	mov	rdi, rbp
	mov	rbx, QWORD PTR 16[rax]
	mov	r14, rax
	call	sdhci_reset@PLT
	test	DWORD PTR SDHCI_RESET_ALL[rip], r12d
	jne	.L34
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L34:
	.cfi_restore_state
	mov	esi, DWORD PTR 12[r14]
	mov	rdi, rbp
	call	tegra_sdhci_set_tap@PLT
	mov	esi, DWORD PTR SDHCI_TEGRA_VENDOR_MISC_CTRL[rip]
	mov	rdi, rbp
	call	sdhci_readl@PLT
	mov	esi, DWORD PTR SDHCI_TEGRA_VENDOR_CLOCK_CTRL[rip]
	mov	rdi, rbp
	mov	r13d, eax
	call	sdhci_readl@PLT
	mov	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300[rip]
	mov	rdi, rbp
	or	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_SDR50[rip]
	or	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_DDR50[rip]
	or	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_SDR104[rip]
	not	r12d
	and	r12d, r13d
	mov	r13d, DWORD PTR SDHCI_CLOCK_CTRL_TRIM_MASK[rip]
	or	r13d, DWORD PTR SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE[rip]
	not	r13d
	and	r13d, eax
	call	tegra_sdhci_is_pad_and_regulator_valid@PLT
	test	rax, rax
	je	.L3
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR NVQUIRK_ENABLE_SDHCI_SPEC_300[rip], eax
	je	.L4
	or	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300[rip]
.L4:
	mov	edx, DWORD PTR SDHCI_MISC_CTRL_ENABLE_SDR50[rip]
	mov	ecx, r12d
	or	ecx, edx
	test	DWORD PTR NVQUIRK_ENABLE_SDR50[rip], eax
	cmovne	r12d, ecx
	test	DWORD PTR NVQUIRK_ENABLE_DDR50[rip], eax
	je	.L6
	or	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_DDR50[rip]
.L6:
	test	DWORD PTR NVQUIRK_ENABLE_SDR104[rip], eax
	je	.L7
	or	r12d, DWORD PTR SDHCI_MISC_CTRL_ENABLE_SDR104[rip]
.L7:
	test	eax, edx
	jne	.L35
.L3:
	mov	ecx, DWORD PTR SDHCI_CLOCK_CTRL_TRIM_SHIFT[rip]
	mov	eax, DWORD PTR [r14]
	mov	esi, r12d
	mov	rdi, rbp
	mov	edx, DWORD PTR SDHCI_TEGRA_VENDOR_MISC_CTRL[rip]
	sal	eax, cl
	or	r13d, eax
	call	sdhci_writel@PLT
	mov	edx, DWORD PTR SDHCI_TEGRA_VENDOR_CLOCK_CTRL[rip]
	mov	esi, r13d
	mov	rdi, rbp
	call	sdhci_writel@PLT
	mov	eax, DWORD PTR [rbx]
	test	DWORD PTR NVQUIRK_HAS_PADCALIB[rip], eax
	jne	.L36
.L8:
	mov	DWORD PTR 8[r14], 0
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L35:
	.cfi_restore_state
	or	r13d, DWORD PTR SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE[rip]
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L36:
	mov	esi, DWORD PTR SDHCI_TEGRA_SDMEM_COMP_PADCTRL[rip]
	mov	rdi, rbp
	call	sdhci_readl@PLT
	mov	esi, DWORD PTR SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK[rip]
	mov	edx, DWORD PTR SDHCI_TEGRA_SDMEM_COMP_PADCTRL[rip]
	mov	rdi, rbp
	not	esi
	and	esi, eax
	or	esi, DWORD PTR SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL[rip]
	call	sdhci_writel@PLT
	mov	DWORD PTR 4[r14], 1
	jmp	.L8
	.cfi_endproc
.LFE0:
	.size	tegra_sdhci_reset, .-tegra_sdhci_reset
	.comm	SDHCI_TEGRA_VENDOR_MISC_CTRL,4,4
	.comm	SDHCI_TEGRA_VENDOR_CLOCK_CTRL,4,4
	.comm	SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL,4,4
	.comm	SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK,4,4
	.comm	SDHCI_TEGRA_SDMEM_COMP_PADCTRL,4,4
	.comm	SDHCI_RESET_ALL,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_SDR50,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_SDR104,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_DDR50,4,4
	.comm	SDHCI_CLOCK_CTRL_TRIM_SHIFT,4,4
	.comm	SDHCI_CLOCK_CTRL_TRIM_MASK,4,4
	.comm	SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE,4,4
	.comm	SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE,4,4
	.comm	NVQUIRK_HAS_PADCALIB,4,4
	.comm	NVQUIRK_ENABLE_SDR50,4,4
	.comm	NVQUIRK_ENABLE_SDR104,4,4
	.comm	NVQUIRK_ENABLE_SDHCI_SPEC_300,4,4
	.comm	NVQUIRK_ENABLE_DDR50,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sdhci-tegra.c_tegra_sdhci_reset.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tegra_sdhci_reset, %function
tegra_sdhci_reset:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r6, r1
	mov	r4, r0
	bl	sdhci_priv
	bl	sdhci_pltfm_priv
	mov	r5, r0
	mov	r1, r6
	mov	r0, r4
	ldr	r8, [r5, #16]
	bl	sdhci_reset
	ldr	r3, .L36
	ldr	r3, [r3]
	tst	r6, r3
	popeq	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
	ldr	r10, .L36+4
	ldr	r1, [r5, #12]
	mov	r0, r4
	bl	tegra_sdhci_set_tap
	ldr	r1, [r10]
	mov	r0, r4
	bl	sdhci_readl
	ldr	r9, .L36+8
	mov	r6, r0
	ldr	r1, [r9]
	mov	r0, r4
	bl	sdhci_readl
	mov	lr, r0
	ldr	r1, .L36+12
	ldr	fp, .L36+16
	ldr	ip, [r1]
	ldr	r0, [fp]
	ldr	r2, .L36+20
	ldr	r3, .L36+24
	orr	r0, ip, r0
	ldr	r7, .L36+28
	ldr	ip, .L36+32
	ldr	r1, [r2]
	ldr	r7, [r7]
	ldr	ip, [ip]
	ldr	r2, [r3]
	orr	r0, r0, r1
	orr	ip, r7, ip
	orr	r7, r0, r2
	mov	r0, r4
	bic	r6, r6, r7
	bic	r7, lr, ip
	bl	tegra_sdhci_is_pad_and_regulator_valid
	cmp	r0, #0
	beq	.L3
	ldr	ip, .L36+36
	ldr	r0, [r8]
	ldr	ip, [ip]
	ldr	r2, .L36+20
	tst	r0, ip
	ldrne	r1, .L36+12
	ldr	ip, .L36+40
	ldrne	r1, [r1]
	ldr	ip, [ip]
	orrne	r6, r6, r1
	tst	r0, ip
	ldr	ip, .L36+44
	ldr	r1, [fp]
	ldr	ip, [ip]
	orrne	r6, r6, r1
	tst	r0, ip
	ldrne	r2, [r2]
	ldr	r3, .L36+24
	orrne	r6, r6, r2
	ldr	r2, .L36+48
	ldr	r2, [r2]
	tst	r0, r2
	ldrne	r3, [r3]
	orrne	r6, r6, r3
	tst	r0, r1
	ldrne	r3, .L36+52
	ldrne	r3, [r3]
	orrne	r7, r7, r3
.L3:
	ldr	r3, .L36+56
	ldr	r0, [r5]
	ldr	r3, [r3]
	mov	r1, r6
	orr	r7, r7, r0, lsl r3
	ldr	r2, [r10]
	mov	r0, r4
	bl	sdhci_writel
	ldr	r2, [r9]
	mov	r1, r7
	mov	r0, r4
	bl	sdhci_writel
	ldr	r3, .L36+60
	ldr	r2, [r8]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L35
.L8:
	mov	r3, #0
	str	r3, [r5, #8]
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L35:
	ldr	r6, .L36+64
	mov	r0, r4
	ldr	r1, [r6]
	bl	sdhci_readl
	ldr	r3, .L36+68
	ldr	r2, .L36+72
	ldr	r3, [r3]
	ldr	r1, [r2]
	bic	r3, r0, r3
	orr	r1, r3, r1
	mov	r0, r4
	ldr	r2, [r6]
	bl	sdhci_writel
	mov	r3, #1
	str	r3, [r5, #4]
	b	.L8
.L37:
	.align	2
.L36:
	.word	SDHCI_RESET_ALL
	.word	SDHCI_TEGRA_VENDOR_MISC_CTRL
	.word	SDHCI_TEGRA_VENDOR_CLOCK_CTRL
	.word	SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300
	.word	SDHCI_MISC_CTRL_ENABLE_SDR50
	.word	SDHCI_MISC_CTRL_ENABLE_DDR50
	.word	SDHCI_MISC_CTRL_ENABLE_SDR104
	.word	SDHCI_CLOCK_CTRL_TRIM_MASK
	.word	SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE
	.word	NVQUIRK_ENABLE_SDHCI_SPEC_300
	.word	NVQUIRK_ENABLE_SDR50
	.word	NVQUIRK_ENABLE_DDR50
	.word	NVQUIRK_ENABLE_SDR104
	.word	SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE
	.word	SDHCI_CLOCK_CTRL_TRIM_SHIFT
	.word	NVQUIRK_HAS_PADCALIB
	.word	SDHCI_TEGRA_SDMEM_COMP_PADCTRL
	.word	SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK
	.word	SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL
	.size	tegra_sdhci_reset, .-tegra_sdhci_reset
	.comm	SDHCI_TEGRA_VENDOR_MISC_CTRL,4,4
	.comm	SDHCI_TEGRA_VENDOR_CLOCK_CTRL,4,4
	.comm	SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL,4,4
	.comm	SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK,4,4
	.comm	SDHCI_TEGRA_SDMEM_COMP_PADCTRL,4,4
	.comm	SDHCI_RESET_ALL,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_SDR50,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_SDR104,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300,4,4
	.comm	SDHCI_MISC_CTRL_ENABLE_DDR50,4,4
	.comm	SDHCI_CLOCK_CTRL_TRIM_SHIFT,4,4
	.comm	SDHCI_CLOCK_CTRL_TRIM_MASK,4,4
	.comm	SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE,4,4
	.comm	SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE,4,4
	.comm	NVQUIRK_HAS_PADCALIB,4,4
	.comm	NVQUIRK_ENABLE_SDR50,4,4
	.comm	NVQUIRK_ENABLE_SDR104,4,4
	.comm	NVQUIRK_ENABLE_SDHCI_SPEC_300,4,4
	.comm	NVQUIRK_ENABLE_DDR50,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
