	.file	"extr_intel_sideband.c_vlv_flisdsi_write.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	vlv_flisdsi_write
	.type	vlv_flisdsi_write, @function
vlv_flisdsi_write:
.LFB0:
	.cfi_startproc
	endbr64
	sub	rsp, 24
	.cfi_def_cfa_offset 32
	mov	r8d, esi
	mov	ecx, DWORD PTR SB_CRWRDA_NP[rip]
	mov	esi, DWORD PTR DPIO_DEVFN[rip]
	mov	DWORD PTR 12[rsp], edx
	mov	edx, DWORD PTR IOSF_PORT_FLISDSI[rip]
	lea	r9, 12[rsp]
	call	vlv_sideband_rw@PLT
	add	rsp, 24
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	vlv_flisdsi_write, .-vlv_flisdsi_write
	.comm	SB_CRWRDA_NP,4,4
	.comm	IOSF_PORT_FLISDSI,4,4
	.comm	DPIO_DEVFN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_intel_sideband.c_vlv_flisdsi_write.c"
	.text
	.align	2
	.global	vlv_flisdsi_write
	.syntax unified
	.arm
	.fpu softvfp
	.type	vlv_flisdsi_write, %function
vlv_flisdsi_write:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, lr}
	ldr	r3, .L4
	sub	sp, sp, #16
	ldr	lr, .L4+4
	ldr	r4, .L4+8
	str	r1, [sp]
	add	ip, sp, #12
	ldr	r3, [r3]
	ldr	r1, [lr]
	str	r2, [sp, #12]
	str	ip, [sp, #4]
	ldr	r2, [r4]
	bl	vlv_sideband_rw
	add	sp, sp, #16
	@ sp needed
	pop	{r4, pc}
.L5:
	.align	2
.L4:
	.word	SB_CRWRDA_NP
	.word	DPIO_DEVFN
	.word	IOSF_PORT_FLISDSI
	.size	vlv_flisdsi_write, .-vlv_flisdsi_write
	.comm	SB_CRWRDA_NP,4,4
	.comm	IOSF_PORT_FLISDSI,4,4
	.comm	DPIO_DEVFN,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
