	.file	"extr_xgene_edac.c_xgene_edac_mc_check.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"MCU uncorrectable error at rank %d\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"X-Gene"
.LC2:
	.string	""
	.section	.rodata.str1.8
	.align 8
.LC3:
	.string	"MCU correctable error at rank %d bank %d column %d row %d count %d\n"
	.section	.rodata.str1.1
.LC4:
	.string	"MCU address miss-match error\n"
	.section	.rodata.str1.8
	.align 8
.LC5:
	.string	"MCU address multi-match error\n"
	.text
	.p2align 4
	.type	xgene_edac_mc_check, @function
xgene_edac_mc_check:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	rbp, QWORD PTR 8[rdi]
	mov	esi, DWORD PTR PCPHPERRINTSTS[rip]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	lea	rdx, 16[rsp]
	mov	edi, DWORD PTR 8[rbp]
	call	xgene_edac_pcp_rd@PLT
	mov	edi, DWORD PTR 8[rbp]
	mov	esi, DWORD PTR PCPLPERRINTSTS[rip]
	lea	rdx, 20[rsp]
	call	xgene_edac_pcp_rd@PLT
	mov	eax, DWORD PTR MCU_UNCORR_ERR_MASK[rip]
	mov	edx, DWORD PTR MCU_CORR_ERR_MASK[rip]
	or	eax, DWORD PTR MCU_CTL_ERR_MASK[rip]
	and	edx, DWORD PTR 20[rsp]
	and	eax, DWORD PTR 16[rsp]
	or	eax, edx
	je	.L1
	mov	eax, DWORD PTR MCU_MAX_RANK[rip]
	xor	ebx, ebx
	lea	r13, .LC2[rip]
	test	eax, eax
	jg	.L3
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L5:
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	mov	rsi, QWORD PTR MCUEBLRR0[rip]
	add	rsi, QWORD PTR 0[rbp]
	imul	eax, ebx
	cdqe
	add	rsi, rax
	test	DWORD PTR MCU_ESRR_CERR_MASK[rip], r14d
	jne	.L31
.L6:
	xor	edi, edi
	call	writel@PLT
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	mov	rsi, QWORD PTR MCUERCRR0[rip]
	xor	edi, edi
	add	rsi, QWORD PTR 0[rbp]
	imul	eax, ebx
	cdqe
	add	rsi, rax
	call	writel@PLT
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	mov	rsi, QWORD PTR MCUSBECNT0[rip]
	xor	edi, edi
	add	rsi, QWORD PTR 0[rbp]
	imul	eax, ebx
	cdqe
	add	rsi, rax
	call	writel@PLT
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	mov	rsi, QWORD PTR MCUESRR0[rip]
	mov	edi, r14d
	add	rsi, QWORD PTR 0[rbp]
	imul	eax, ebx
	add	ebx, 1
	cdqe
	add	rsi, rax
	call	writel@PLT
	cmp	DWORD PTR MCU_MAX_RANK[rip], ebx
	jle	.L7
.L3:
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	mov	rdi, QWORD PTR MCUESRR0[rip]
	add	rdi, QWORD PTR 0[rbp]
	imul	eax, ebx
	cdqe
	add	rdi, rax
	call	readl@PLT
	mov	r14d, eax
	mov	eax, DWORD PTR MCU_ESRR_DEMANDUCERR_MASK[rip]
	or	eax, DWORD PTR MCU_ESRR_BACKUCERR_MASK[rip]
	test	eax, r14d
	je	.L5
	mov	esi, DWORD PTR KERN_ERR[rip]
	mov	r8d, ebx
	mov	rdi, r12
	xor	eax, eax
	lea	rcx, .LC0[rip]
	lea	rdx, .LC1[rip]
	call	edac_mc_chipset_printk@PLT
	mov	eax, DWORD PTR [r12]
	sub	rsp, 8
	.cfi_def_cfa_offset 104
	xor	r9d, r9d
	push	r13
	.cfi_def_cfa_offset 112
	mov	edi, DWORD PTR HW_EVENT_ERR_UNCORRECTED[rip]
	xor	r8d, r8d
	xor	ecx, ecx
	push	rax
	.cfi_def_cfa_offset 120
	mov	edx, 1
	mov	rsi, r12
	push	-1
	.cfi_def_cfa_offset 128
	push	0
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	call	edac_mc_handle_error@PLT
	add	rsp, 48
	.cfi_def_cfa_offset 96
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L31:
	mov	rdi, rsi
	call	readl@PLT
	mov	rdi, QWORD PTR MCUERCRR0[rip]
	add	rdi, QWORD PTR 0[rbp]
	mov	DWORD PTR 12[rsp], eax
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	imul	eax, ebx
	cdqe
	add	rdi, rax
	call	readl@PLT
	mov	rdi, QWORD PTR MCUSBECNT0[rip]
	add	rdi, QWORD PTR 0[rbp]
	mov	r15d, eax
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	imul	eax, ebx
	cdqe
	add	rdi, rax
	call	readl@PLT
	mov	edi, eax
	call	MCU_SBECNT_COUNT@PLT
	mov	edi, r15d
	mov	DWORD PTR 8[rsp], eax
	call	MCU_ERCRR_ERRROW_RD@PLT
	mov	edi, r15d
	mov	DWORD PTR 4[rsp], eax
	call	MCU_ERCRR_ERRCOL_RD@PLT
	mov	r8d, DWORD PTR 12[rsp]
	mov	r15d, eax
	mov	edi, r8d
	call	MCU_EBLRR_ERRBANK_RD@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 104
	mov	r8d, ebx
	mov	rdi, r12
	mov	ecx, DWORD PTR 16[rsp]
	mov	esi, DWORD PTR KERN_WARNING[rip]
	mov	r9d, eax
	xor	eax, eax
	push	rcx
	.cfi_def_cfa_offset 112
	mov	edx, DWORD PTR 20[rsp]
	lea	rcx, .LC3[rip]
	push	rdx
	.cfi_def_cfa_offset 120
	lea	rdx, .LC1[rip]
	push	r15
	.cfi_def_cfa_offset 128
	call	edac_mc_chipset_printk@PLT
	mov	eax, DWORD PTR [r12]
	add	rsp, 24
	.cfi_def_cfa_offset 104
	mov	rsi, r12
	push	r13
	.cfi_def_cfa_offset 112
	mov	edi, DWORD PTR HW_EVENT_ERR_CORRECTED[rip]
	xor	r9d, r9d
	xor	r8d, r8d
	push	rax
	.cfi_def_cfa_offset 120
	xor	ecx, ecx
	mov	edx, 1
	push	-1
	.cfi_def_cfa_offset 128
	push	0
	.cfi_def_cfa_offset 136
	push	0
	.cfi_def_cfa_offset 144
	call	edac_mc_handle_error@PLT
	mov	eax, DWORD PTR MCU_RANK_STRIDE[rip]
	mov	rsi, QWORD PTR MCUEBLRR0[rip]
	add	rsp, 48
	.cfi_def_cfa_offset 96
	add	rsi, QWORD PTR 0[rbp]
	imul	eax, ebx
	cdqe
	add	rsi, rax
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L7:
	mov	rdi, QWORD PTR MCUGESR[rip]
	add	rdi, QWORD PTR 0[rbp]
	call	readl@PLT
	mov	r13d, eax
	test	eax, eax
	je	.L1
	test	DWORD PTR MCU_GESR_ADDRNOMATCH_ERR_MASK[rip], eax
	jne	.L32
	test	DWORD PTR MCU_GESR_ADDRMULTIMATCH_ERR_MASK[rip], r13d
	jne	.L33
.L9:
	mov	rsi, QWORD PTR MCUGESR[rip]
	mov	edi, r13d
	add	rsi, QWORD PTR 0[rbp]
	call	writel@PLT
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L34
	add	rsp, 40
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L32:
	.cfi_restore_state
	mov	esi, DWORD PTR KERN_WARNING[rip]
	xor	eax, eax
	mov	rdi, r12
	lea	rcx, .LC4[rip]
	lea	rdx, .LC1[rip]
	call	edac_mc_chipset_printk@PLT
	test	DWORD PTR MCU_GESR_ADDRMULTIMATCH_ERR_MASK[rip], r13d
	je	.L9
.L33:
	mov	esi, DWORD PTR KERN_WARNING[rip]
	lea	rcx, .LC5[rip]
	mov	rdi, r12
	xor	eax, eax
	lea	rdx, .LC1[rip]
	call	edac_mc_chipset_printk@PLT
	jmp	.L9
.L34:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	xgene_edac_mc_check, .-xgene_edac_mc_check
	.comm	PCPLPERRINTSTS,4,4
	.comm	PCPHPERRINTSTS,4,4
	.comm	MCU_UNCORR_ERR_MASK,4,4
	.comm	MCU_RANK_STRIDE,4,4
	.comm	MCU_MAX_RANK,4,4
	.comm	MCU_GESR_ADDRNOMATCH_ERR_MASK,4,4
	.comm	MCU_GESR_ADDRMULTIMATCH_ERR_MASK,4,4
	.comm	MCU_ESRR_DEMANDUCERR_MASK,4,4
	.comm	MCU_ESRR_CERR_MASK,4,4
	.comm	MCU_ESRR_BACKUCERR_MASK,4,4
	.comm	MCU_CTL_ERR_MASK,4,4
	.comm	MCU_CORR_ERR_MASK,4,4
	.comm	MCUSBECNT0,8,8
	.comm	MCUGESR,8,8
	.comm	MCUESRR0,8,8
	.comm	MCUERCRR0,8,8
	.comm	MCUEBLRR0,8,8
	.comm	KERN_WARNING,4,4
	.comm	KERN_ERR,4,4
	.comm	HW_EVENT_ERR_UNCORRECTED,4,4
	.comm	HW_EVENT_ERR_CORRECTED,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_xgene_edac.c_xgene_edac_mc_check.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"MCU uncorrectable error at rank %d\012\000"
	.align	2
.LC1:
	.ascii	"X-Gene\000"
	.align	2
.LC2:
	.ascii	"\000"
	.align	2
.LC3:
	.ascii	"MCU correctable error at rank %d bank %d column %d "
	.ascii	"row %d count %d\012\000"
	.align	2
.LC4:
	.ascii	"MCU address miss-match error\012\000"
	.align	2
.LC5:
	.ascii	"MCU address multi-match error\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	xgene_edac_mc_check, %function
xgene_edac_mc_check:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L34
	ldr	r4, [r0, #4]
	sub	sp, sp, #68
	ldr	r1, [r3]
	ldr	r3, .L34+4
	add	r2, sp, #52
	mov	r7, r0
	ldr	r0, [r4, #4]
	ldr	r3, [r3]
	str	r3, [sp, #60]
	mov	r3,#0
	bl	xgene_edac_pcp_rd
	ldr	r3, .L34+8
	add	r2, sp, #56
	ldr	r1, [r3]
	ldr	r0, [r4, #4]
	bl	xgene_edac_pcp_rd
	ldr	r3, .L34+12
	ldr	r1, .L34+16
	ldr	r2, .L34+20
	ldr	r1, [r1]
	ldr	r3, [r3]
	ldr	r2, [r2]
	orr	r3, r3, r1
	ldr	r0, [sp, #52]
	ldr	r1, [sp, #56]
	and	r3, r3, r0
	and	r2, r2, r1
	orrs	r3, r3, r2
	beq	.L1
	ldr	r3, .L34+24
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L7
	mov	r10, #0
	ldr	r8, .L34+28
	ldr	r5, .L34+32
	ldr	fp, .L34+36
	b	.L3
.L5:
	ldr	r3, .L34+40
	ldr	r1, [r4]
	ldr	r0, [fp]
	ldr	r3, [r3]
	add	r0, r1, r0
	ldr	r1, [r5]
	tst	r6, r3
	mla	r1, r10, r1, r0
	bne	.L30
.L6:
	mov	r0, #0
	bl	writel
	ldr	r2, .L34+44
	ldr	r3, [r4]
	ldr	r2, [r2]
	ldr	r1, [r5]
	add	r3, r3, r2
	mla	r1, r10, r1, r3
	mov	r0, #0
	bl	writel
	ldr	r2, .L34+48
	ldr	r3, [r4]
	ldr	r2, [r2]
	ldr	r1, [r5]
	add	r3, r3, r2
	mla	r1, r10, r1, r3
	mov	r0, #0
	bl	writel
	ldr	r3, [r4]
	ldr	r2, [r8]
	ldr	r1, [r5]
	add	r3, r3, r2
	mla	r1, r10, r1, r3
	mov	r0, r6
	bl	writel
	ldr	r3, .L34+24
	add	r10, r10, #1
	ldr	r3, [r3]
	cmp	r3, r10
	ble	.L7
.L3:
	ldr	r2, [r8]
	ldr	r3, [r4]
	ldr	r0, [r5]
	add	r3, r3, r2
	mla	r0, r10, r0, r3
	bl	readl
	ldr	r3, .L34+52
	ldr	r2, .L34+56
	ldr	r3, [r3]
	ldr	r2, [r2]
	mov	r6, r0
	orr	r3, r3, r2
	tst	r3, r0
	beq	.L5
	ldr	r1, .L34+60
	str	r10, [sp]
	mov	r0, r7
	ldr	r3, .L34+64
	ldr	r2, .L34+68
	ldr	r1, [r1]
	bl	edac_mc_chipset_printk
	ldr	r1, .L34+72
	ldr	r3, [r7]
	mvn	r2, #0
	str	r1, [sp, #24]
	mov	r1, #0
	ldr	r0, .L34+76
	str	r1, [sp, #12]
	str	r1, [sp, #8]
	str	r1, [sp, #4]
	str	r1, [sp]
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	r2, #1
	mov	r3, r1
	ldr	r0, [r0]
	mov	r1, r7
	bl	edac_mc_handle_error
	b	.L5
.L30:
	mov	r0, r1
	bl	readl
	mov	r3, r0
	ldr	r1, .L34+44
	ldr	r2, [r4]
	ldr	r1, [r1]
	ldr	r0, [r5]
	add	r2, r2, r1
	mla	r0, r10, r0, r2
	str	r3, [sp, #36]
	bl	readl
	ldr	r3, .L34+48
	ldr	r2, [r4]
	ldr	r1, [r3]
	mov	r9, r0
	ldr	r0, [r5]
	add	r2, r2, r1
	mla	r0, r10, r0, r2
	bl	readl
	mov	r2, r0
	ldr	r1, .L34+80
	ldr	r3, [sp, #36]
	ldr	r1, [r1]
	mov	r0, r3
	str	r1, [sp, #44]
	str	r2, [sp, #36]
	bl	MCU_EBLRR_ERRBANK_RD
	mov	r3, r0
	mov	r0, r9
	str	r3, [sp, #40]
	bl	MCU_ERCRR_ERRCOL_RD
	mov	ip, r0
	mov	r0, r9
	mov	r9, ip
	bl	MCU_ERCRR_ERRROW_RD
	mov	ip, r0
	ldr	r2, [sp, #36]
	str	ip, [sp, #36]
	mov	r0, r2
	bl	MCU_SBECNT_COUNT
	ldr	r3, [sp, #40]
	ldr	r2, [sp, #36]
	ldr	r1, [sp, #44]
	str	r3, [sp, #4]
	str	r2, [sp, #12]
	ldr	r3, .L34+84
	ldr	r2, .L34+68
	str	r0, [sp, #16]
	str	r9, [sp, #8]
	mov	r0, r7
	str	r10, [sp]
	bl	edac_mc_chipset_printk
	ldr	r0, .L34+72
	ldr	r3, [r7]
	mvn	r1, #0
	str	r0, [sp, #24]
	mov	r0, #0
	ldr	r2, .L34+88
	str	r1, [sp, #16]
	str	r0, [sp, #12]
	str	r0, [sp, #8]
	str	r0, [sp, #4]
	str	r0, [sp]
	ldr	r0, [r2]
	mov	r1, r7
	str	r3, [sp, #20]
	mov	r2, #1
	mov	r3, #0
	bl	edac_mc_handle_error
	ldr	r0, [r4]
	ldr	r3, [fp]
	ldr	r1, [r5]
	add	r0, r0, r3
	mla	r1, r10, r1, r0
	b	.L6
.L7:
	ldr	r6, .L34+92
	ldr	r0, [r4]
	ldr	r3, [r6]
	add	r0, r0, r3
	bl	readl
	subs	r5, r0, #0
	beq	.L1
	ldr	r3, .L34+96
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L31
	ldr	r3, .L34+100
	ldr	r3, [r3]
	tst	r5, r3
	bne	.L32
.L9:
	ldr	r1, [r4]
	ldr	r3, [r6]
	mov	r0, r5
	add	r1, r1, r3
	bl	writel
.L1:
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [sp, #60]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L33
	add	sp, sp, #68
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L31:
	ldr	r2, .L34+80
	ldr	r3, .L34+104
	ldr	r1, [r2]
	mov	r0, r7
	ldr	r2, .L34+68
	bl	edac_mc_chipset_printk
	ldr	r3, .L34+100
	ldr	r3, [r3]
	tst	r5, r3
	beq	.L9
.L32:
	ldr	r3, .L34+80
	mov	r0, r7
	ldr	r1, [r3]
	ldr	r2, .L34+68
	ldr	r3, .L34+108
	bl	edac_mc_chipset_printk
	b	.L9
.L33:
	bl	__stack_chk_fail
.L35:
	.align	2
.L34:
	.word	PCPHPERRINTSTS
	.word	.LC6
	.word	PCPLPERRINTSTS
	.word	MCU_UNCORR_ERR_MASK
	.word	MCU_CTL_ERR_MASK
	.word	MCU_CORR_ERR_MASK
	.word	MCU_MAX_RANK
	.word	MCUESRR0
	.word	MCU_RANK_STRIDE
	.word	MCUEBLRR0
	.word	MCU_ESRR_CERR_MASK
	.word	MCUERCRR0
	.word	MCUSBECNT0
	.word	MCU_ESRR_DEMANDUCERR_MASK
	.word	MCU_ESRR_BACKUCERR_MASK
	.word	KERN_ERR
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	HW_EVENT_ERR_UNCORRECTED
	.word	KERN_WARNING
	.word	.LC3
	.word	HW_EVENT_ERR_CORRECTED
	.word	MCUGESR
	.word	MCU_GESR_ADDRNOMATCH_ERR_MASK
	.word	MCU_GESR_ADDRMULTIMATCH_ERR_MASK
	.word	.LC4
	.word	.LC5
	.size	xgene_edac_mc_check, .-xgene_edac_mc_check
	.comm	PCPLPERRINTSTS,4,4
	.comm	PCPHPERRINTSTS,4,4
	.comm	MCU_UNCORR_ERR_MASK,4,4
	.comm	MCU_RANK_STRIDE,4,4
	.comm	MCU_MAX_RANK,4,4
	.comm	MCU_GESR_ADDRNOMATCH_ERR_MASK,4,4
	.comm	MCU_GESR_ADDRMULTIMATCH_ERR_MASK,4,4
	.comm	MCU_ESRR_DEMANDUCERR_MASK,4,4
	.comm	MCU_ESRR_CERR_MASK,4,4
	.comm	MCU_ESRR_BACKUCERR_MASK,4,4
	.comm	MCU_CTL_ERR_MASK,4,4
	.comm	MCU_CORR_ERR_MASK,4,4
	.comm	MCUSBECNT0,4,4
	.comm	MCUGESR,4,4
	.comm	MCUESRR0,4,4
	.comm	MCUERCRR0,4,4
	.comm	MCUEBLRR0,4,4
	.comm	KERN_WARNING,4,4
	.comm	KERN_ERR,4,4
	.comm	HW_EVENT_ERR_UNCORRECTED,4,4
	.comm	HW_EVENT_ERR_CORRECTED,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
