	.file	"extr_tc-ppc.c_parse_cpu.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"pwrx"
.LC1:
	.string	"pwr2"
.LC2:
	.string	"pwr"
.LC3:
	.string	"601"
.LC4:
	.string	"ppc"
.LC5:
	.string	"ppc32"
.LC6:
	.string	"603"
.LC7:
	.string	"604"
.LC8:
	.string	"403"
.LC9:
	.string	"405"
.LC10:
	.string	"440"
.LC11:
	.string	"7400"
.LC12:
	.string	"7410"
.LC13:
	.string	"7450"
.LC14:
	.string	"7455"
.LC15:
	.string	"e300"
.LC16:
	.string	"altivec"
.LC17:
	.string	"e500"
.LC18:
	.string	"e500x2"
.LC19:
	.string	"spe"
.LC20:
	.string	"ppc64"
.LC21:
	.string	"620"
.LC22:
	.string	"ppc64bridge"
.LC23:
	.string	"booke"
.LC24:
	.string	"booke32"
.LC25:
	.string	"booke64"
.LC26:
	.string	"power4"
.LC27:
	.string	"power5"
.LC28:
	.string	"power6"
.LC29:
	.string	"cell"
.LC30:
	.string	"com"
.LC31:
	.string	"any"
	.text
	.p2align 4
	.type	parse_cpu, @function
parse_cpu:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	lea	rsi, .LC0[rip]
	mov	rbp, rdi
	call	strcmp@PLT
	test	rax, rax
	jne	.L2
.L4:
	mov	eax, DWORD PTR PPC_OPCODE_POWER[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER2[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	lea	rsi, .LC1[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L4
	lea	rsi, .LC2[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L5
	mov	eax, DWORD PTR PPC_OPCODE_POWER[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	lea	rsi, .LC3[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L6
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_601[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	lea	rsi, .LC4[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L7
.L8:
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L7:
	.cfi_restore_state
	lea	rsi, .LC5[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L8
	lea	rsi, .LC6[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L8
	lea	rsi, .LC7[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L8
	lea	rsi, .LC8[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L9
.L10:
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_403[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L9:
	.cfi_restore_state
	lea	rsi, .LC9[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L10
	lea	rsi, .LC10[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L11
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_BOOKE[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	or	eax, DWORD PTR PPC_OPCODE_440[rip]
	or	eax, DWORD PTR PPC_OPCODE_ISEL[rip]
	or	eax, DWORD PTR PPC_OPCODE_RFMCI[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L11:
	.cfi_restore_state
	lea	rsi, .LC11[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L12
.L13:
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_ALTIVEC[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L12:
	.cfi_restore_state
	lea	rsi, .LC12[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L13
	lea	rsi, .LC13[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L13
	lea	rsi, .LC14[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L13
	lea	rsi, .LC15[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L14
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	or	eax, DWORD PTR PPC_OPCODE_E300[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L14:
	.cfi_restore_state
	lea	rsi, .LC16[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L15
	mov	edx, DWORD PTR ppc_cpu[rip]
	mov	eax, DWORD PTR PPC_OPCODE_ALTIVEC[rip]
	test	edx, edx
	jne	.L20
	or	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L15:
	.cfi_restore_state
	lea	rsi, .LC17[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L17
.L18:
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_BOOKE[rip]
	or	eax, DWORD PTR PPC_OPCODE_SPE[rip]
	or	eax, DWORD PTR PPC_OPCODE_ISEL[rip]
	or	eax, DWORD PTR PPC_OPCODE_EFS[rip]
	or	eax, DWORD PTR PPC_OPCODE_BRLOCK[rip]
	or	eax, DWORD PTR PPC_OPCODE_PMR[rip]
	or	eax, DWORD PTR PPC_OPCODE_CACHELCK[rip]
	or	eax, DWORD PTR PPC_OPCODE_RFMCI[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L20:
	.cfi_restore_state
	or	eax, edx
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L17:
	.cfi_restore_state
	lea	rsi, .LC18[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L18
	lea	rsi, .LC19[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L19
	mov	edx, DWORD PTR ppc_cpu[rip]
	mov	eax, DWORD PTR PPC_OPCODE_SPE[rip]
	test	edx, edx
	jne	.L20
	or	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_EFS[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L19:
	.cfi_restore_state
	lea	rsi, .LC20[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L21
.L22:
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L21:
	.cfi_restore_state
	lea	rsi, .LC21[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L22
	lea	rsi, .LC22[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L23
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_64_BRIDGE[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L23:
	.cfi_restore_state
	lea	rsi, .LC23[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L24
.L25:
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_BOOKE[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L24:
	.cfi_restore_state
	lea	rsi, .LC24[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	je	.L25
	lea	rsi, .LC25[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L26
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_BOOKE[rip]
	or	eax, DWORD PTR PPC_OPCODE_BOOKE64[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L26:
	.cfi_restore_state
	lea	rsi, .LC26[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L27
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER4[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L27:
	.cfi_restore_state
	lea	rsi, .LC27[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L28
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER4[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER5[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L28:
	.cfi_restore_state
	lea	rsi, .LC28[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L29
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER4[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER5[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER6[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L29:
	.cfi_restore_state
	lea	rsi, .LC29[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L30
	mov	eax, DWORD PTR PPC_OPCODE_PPC[rip]
	or	eax, DWORD PTR PPC_OPCODE_CLASSIC[rip]
	or	eax, DWORD PTR PPC_OPCODE_64[rip]
	or	eax, DWORD PTR PPC_OPCODE_POWER4[rip]
	or	eax, DWORD PTR PPC_OPCODE_CELL[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L30:
	.cfi_restore_state
	lea	rsi, .LC30[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L31
	mov	eax, DWORD PTR PPC_OPCODE_COMMON[rip]
	or	eax, DWORD PTR PPC_OPCODE_32[rip]
	mov	DWORD PTR ppc_cpu[rip], eax
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	mov	eax, 1
	ret
.L31:
	.cfi_restore_state
	lea	rsi, .LC31[rip]
	mov	rdi, rbp
	call	strcmp@PLT
	test	rax, rax
	jne	.L32
	mov	eax, DWORD PTR PPC_OPCODE_ANY[rip]
	pop	rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	or	DWORD PTR ppc_cpu[rip], eax
	mov	eax, 1
	ret
.L32:
	.cfi_restore_state
	xor	eax, eax
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	parse_cpu, .-parse_cpu
	.comm	ppc_cpu,4,4
	.comm	PPC_OPCODE_SPE,4,4
	.comm	PPC_OPCODE_RFMCI,4,4
	.comm	PPC_OPCODE_PPC,4,4
	.comm	PPC_OPCODE_POWER6,4,4
	.comm	PPC_OPCODE_POWER5,4,4
	.comm	PPC_OPCODE_POWER4,4,4
	.comm	PPC_OPCODE_POWER2,4,4
	.comm	PPC_OPCODE_POWER,4,4
	.comm	PPC_OPCODE_PMR,4,4
	.comm	PPC_OPCODE_ISEL,4,4
	.comm	PPC_OPCODE_EFS,4,4
	.comm	PPC_OPCODE_E300,4,4
	.comm	PPC_OPCODE_COMMON,4,4
	.comm	PPC_OPCODE_CLASSIC,4,4
	.comm	PPC_OPCODE_CELL,4,4
	.comm	PPC_OPCODE_CACHELCK,4,4
	.comm	PPC_OPCODE_BRLOCK,4,4
	.comm	PPC_OPCODE_BOOKE64,4,4
	.comm	PPC_OPCODE_BOOKE,4,4
	.comm	PPC_OPCODE_ANY,4,4
	.comm	PPC_OPCODE_ALTIVEC,4,4
	.comm	PPC_OPCODE_64_BRIDGE,4,4
	.comm	PPC_OPCODE_64,4,4
	.comm	PPC_OPCODE_601,4,4
	.comm	PPC_OPCODE_440,4,4
	.comm	PPC_OPCODE_403,4,4
	.comm	PPC_OPCODE_32,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tc-ppc.c_parse_cpu.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"pwrx\000"
	.align	2
.LC1:
	.ascii	"pwr2\000"
	.align	2
.LC2:
	.ascii	"pwr\000"
	.align	2
.LC3:
	.ascii	"601\000"
	.align	2
.LC4:
	.ascii	"ppc\000"
	.align	2
.LC5:
	.ascii	"ppc32\000"
	.align	2
.LC6:
	.ascii	"603\000"
	.align	2
.LC7:
	.ascii	"604\000"
	.align	2
.LC8:
	.ascii	"403\000"
	.align	2
.LC9:
	.ascii	"405\000"
	.align	2
.LC10:
	.ascii	"440\000"
	.align	2
.LC11:
	.ascii	"7400\000"
	.align	2
.LC12:
	.ascii	"7410\000"
	.align	2
.LC13:
	.ascii	"7450\000"
	.align	2
.LC14:
	.ascii	"7455\000"
	.align	2
.LC15:
	.ascii	"e300\000"
	.align	2
.LC16:
	.ascii	"altivec\000"
	.align	2
.LC17:
	.ascii	"e500\000"
	.align	2
.LC18:
	.ascii	"e500x2\000"
	.align	2
.LC19:
	.ascii	"spe\000"
	.align	2
.LC20:
	.ascii	"ppc64\000"
	.align	2
.LC21:
	.ascii	"620\000"
	.align	2
.LC22:
	.ascii	"ppc64bridge\000"
	.align	2
.LC23:
	.ascii	"booke\000"
	.align	2
.LC24:
	.ascii	"booke32\000"
	.align	2
.LC25:
	.ascii	"booke64\000"
	.align	2
.LC26:
	.ascii	"power4\000"
	.align	2
.LC27:
	.ascii	"power5\000"
	.align	2
.LC28:
	.ascii	"power6\000"
	.align	2
.LC29:
	.ascii	"cell\000"
	.align	2
.LC30:
	.ascii	"com\000"
	.align	2
.LC31:
	.ascii	"any\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	parse_cpu, %function
parse_cpu:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, lr}
	ldr	r1, .L75
	mov	r4, r0
	bl	strcmp
	cmp	r0, #0
	beq	.L2
	mov	r0, r4
	ldr	r1, .L75+4
	bl	strcmp
	cmp	r0, #0
	bne	.L3
.L2:
	ldr	r3, .L75+8
	ldr	r2, .L75+12
	ldr	r1, .L75+16
	ldr	r3, [r3]
	ldr	r2, [r2]
.L67:
	ldr	r1, [r1]
	orr	r3, r3, r2
	ldr	r2, .L75+20
	orr	r3, r3, r1
	mov	r0, #1
	str	r3, [r2]
	pop	{r4, pc}
.L3:
	mov	r0, r4
	ldr	r1, .L75+24
	bl	strcmp
	cmp	r0, #0
	beq	.L74
	mov	r0, r4
	ldr	r1, .L75+28
	bl	strcmp
	cmp	r0, #0
	bne	.L6
	ldr	r3, .L75+32
	ldr	r1, .L75+36
	ldr	r2, .L75+40
.L70:
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r1, .L75+16
.L69:
	ldr	r2, [r2]
	orr	r3, r3, r0
	b	.L67
.L74:
	ldr	r3, .L75+8
.L68:
	ldr	r2, .L75+16
	ldr	r3, [r3]
	ldr	r1, [r2]
	ldr	r2, .L75+20
	orr	r3, r3, r1
	mov	r0, #1
	str	r3, [r2]
	pop	{r4, pc}
.L6:
	mov	r0, r4
	ldr	r1, .L75+44
	bl	strcmp
	cmp	r0, #0
	beq	.L7
	mov	r0, r4
	ldr	r1, .L75+48
	bl	strcmp
	cmp	r0, #0
	beq	.L7
	mov	r0, r4
	ldr	r1, .L75+52
	bl	strcmp
	cmp	r0, #0
	beq	.L7
	mov	r0, r4
	ldr	r1, .L75+56
	bl	strcmp
	cmp	r0, #0
	beq	.L7
	mov	r0, r4
	ldr	r1, .L75+60
	bl	strcmp
	cmp	r0, #0
	beq	.L9
	mov	r0, r4
	ldr	r1, .L75+64
	bl	strcmp
	cmp	r0, #0
	beq	.L9
	mov	r0, r4
	ldr	r1, .L75+68
	bl	strcmp
	cmp	r0, #0
	bne	.L11
	ldr	r1, .L75+72
	ldr	r3, .L75+32
	ldr	r2, .L75+16
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r1, .L75+76
	ldr	ip, [r2]
	orr	r3, r3, r0
	ldr	r2, .L75+80
	ldr	r0, [r1]
	orr	r3, r3, ip
	ldr	r1, .L75+84
	b	.L69
.L7:
	ldr	r3, .L75+32
	ldr	r2, .L75+36
	ldr	r1, .L75+16
	ldr	r3, [r3]
	ldr	r2, [r2]
	b	.L67
.L9:
	ldr	r3, .L75+32
	ldr	r1, .L75+36
	ldr	r2, .L75+88
	b	.L70
.L11:
	mov	r0, r4
	ldr	r1, .L75+92
	bl	strcmp
	cmp	r0, #0
	beq	.L12
	mov	r0, r4
	ldr	r1, .L75+96
	bl	strcmp
	cmp	r0, #0
	beq	.L12
	mov	r0, r4
	ldr	r1, .L75+100
	bl	strcmp
	cmp	r0, #0
	beq	.L12
	mov	r0, r4
	ldr	r1, .L75+104
	bl	strcmp
	cmp	r0, #0
	beq	.L12
	mov	r0, r4
	ldr	r1, .L75+108
	bl	strcmp
	cmp	r0, #0
	bne	.L14
	ldr	r1, .L75+36
	ldr	r3, .L75+32
	ldr	r0, [r1]
	ldr	r2, .L75+16
	ldr	r3, [r3]
	ldr	r1, .L75+112
	b	.L69
.L12:
	ldr	r3, .L75+32
	ldr	r1, .L75+36
	ldr	r2, .L75+116
	b	.L70
.L14:
	mov	r0, r4
	ldr	r1, .L75+120
	bl	strcmp
	cmp	r0, #0
	bne	.L15
	ldr	r1, .L75+20
	ldr	r3, .L75+116
	ldr	r2, [r1]
	ldr	r3, [r3]
	cmp	r2, #0
	bne	.L72
	ldr	r0, .L75+32
	ldr	r2, .L75+36
.L71:
	ldr	r0, [r0]
	ldr	r2, [r2]
	orr	r3, r3, r0
.L72:
	orr	r3, r3, r2
	mov	r0, #1
	str	r3, [r1]
	pop	{r4, pc}
.L15:
	mov	r0, r4
	ldr	r1, .L75+124
	bl	strcmp
	cmp	r0, #0
	beq	.L17
	mov	r0, r4
	ldr	r1, .L75+128
	bl	strcmp
	cmp	r0, #0
	beq	.L17
	mov	r0, r4
	ldr	r1, .L75+132
	bl	strcmp
	cmp	r0, #0
	bne	.L19
	ldr	r1, .L75+20
	ldr	r3, .L75+136
	ldr	r2, [r1]
	ldr	r3, [r3]
	cmp	r2, #0
	bne	.L72
	ldr	r0, .L75+32
	ldr	r2, .L75+140
	b	.L71
.L17:
	ldr	r2, .L75+72
	ldr	r3, .L75+32
	ldr	r1, .L75+136
	ldr	ip, [r2]
	ldr	r3, [r3]
	ldr	r2, .L75+80
	ldr	r0, [r1]
	ldr	r1, .L75+140
	orr	r3, r3, ip
	ldr	ip, [r2]
	ldr	r2, .L75+144
	orr	r3, r3, r0
	ldr	r0, [r1]
	orr	r3, r3, ip
	ldr	r1, .L75+148
	ldr	ip, [r2]
	orr	r3, r3, r0
	ldr	r2, .L75+152
	ldr	r0, [r1]
	orr	r3, r3, ip
	ldr	r1, .L75+84
	b	.L69
.L19:
	mov	r0, r4
	ldr	r1, .L75+156
	bl	strcmp
	cmp	r0, #0
	beq	.L21
	mov	r0, r4
	ldr	r1, .L75+160
	bl	strcmp
	cmp	r0, #0
	beq	.L21
	mov	r0, r4
	ldr	r1, .L75+164
	bl	strcmp
	cmp	r0, #0
	bne	.L23
	ldr	r1, .L75+36
	ldr	r3, .L75+32
	ldr	r0, [r1]
	ldr	r2, .L75+168
	ldr	r3, [r3]
	ldr	r1, .L75+172
	b	.L69
.L21:
	ldr	r3, .L75+32
	ldr	r2, .L75+36
	ldr	r1, .L75+172
	ldr	r3, [r3]
	ldr	r2, [r2]
	b	.L67
.L23:
	mov	r0, r4
	ldr	r1, .L75+176
	bl	strcmp
	cmp	r0, #0
	beq	.L24
	mov	r0, r4
	ldr	r1, .L75+180
	bl	strcmp
	cmp	r0, #0
	beq	.L24
	mov	r0, r4
	ldr	r1, .L75+184
	bl	strcmp
	cmp	r0, #0
	bne	.L26
	ldr	r1, .L75+72
	ldr	r3, .L75+32
	ldr	r0, [r1]
	ldr	r2, .L75+188
	ldr	r3, [r3]
	ldr	r1, .L75+172
	b	.L69
.L24:
	ldr	r3, .L75+32
	ldr	r2, .L75+72
	ldr	r1, .L75+16
	ldr	r3, [r3]
	ldr	r2, [r2]
	b	.L67
.L26:
	mov	r0, r4
	ldr	r1, .L75+192
	bl	strcmp
	cmp	r0, #0
	bne	.L27
	ldr	r1, .L75+36
	ldr	r3, .L75+32
	ldr	r0, [r1]
	ldr	r2, .L75+172
	ldr	r3, [r3]
	ldr	r1, .L75+196
	b	.L69
.L27:
	mov	r0, r4
	ldr	r1, .L75+200
	bl	strcmp
	cmp	r0, #0
	bne	.L28
	ldr	r2, .L75+36
	ldr	r3, .L75+32
	ldr	r1, .L75+172
	ldr	ip, [r2]
	ldr	r3, [r3]
	ldr	r0, [r1]
	ldr	r2, .L75+196
	ldr	r1, .L75+204
	orr	r3, r3, ip
	b	.L69
.L28:
	mov	r0, r4
	ldr	r1, .L75+208
	bl	strcmp
	cmp	r0, #0
	bne	.L29
	ldr	r1, .L75+36
	ldr	r3, .L75+32
	ldr	r2, .L75+172
	ldr	r0, [r1]
	ldr	r3, [r3]
	ldr	r1, .L75+196
	ldr	ip, [r2]
	orr	r3, r3, r0
	ldr	r2, .L75+204
	ldr	r0, [r1]
	orr	r3, r3, ip
	ldr	r1, .L75+212
	b	.L69
.L29:
	mov	r0, r4
	ldr	r1, .L75+216
	bl	strcmp
	cmp	r0, #0
	bne	.L30
	ldr	r2, .L75+36
	ldr	r3, .L75+32
	ldr	r1, .L75+172
	ldr	ip, [r2]
	ldr	r3, [r3]
	ldr	r0, [r1]
	ldr	r2, .L75+196
	ldr	r1, .L75+220
	orr	r3, r3, ip
	b	.L69
.L30:
	mov	r0, r4
	ldr	r1, .L75+224
	bl	strcmp
	cmp	r0, #0
	ldreq	r3, .L75+228
	beq	.L68
.L31:
	ldr	r1, .L75+232
	mov	r0, r4
	bl	strcmp
	cmp	r0, #0
	ldreq	r2, .L75+20
	ldreq	r1, .L75+236
	ldreq	r3, [r2]
	ldreq	r1, [r1]
	moveq	r0, #1
	orreq	r3, r3, r1
	movne	r0, #0
	streq	r3, [r2]
	pop	{r4, pc}
.L76:
	.align	2
.L75:
	.word	.LC0
	.word	.LC1
	.word	PPC_OPCODE_POWER
	.word	PPC_OPCODE_POWER2
	.word	PPC_OPCODE_32
	.word	ppc_cpu
	.word	.LC2
	.word	.LC3
	.word	PPC_OPCODE_PPC
	.word	PPC_OPCODE_CLASSIC
	.word	PPC_OPCODE_601
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	PPC_OPCODE_BOOKE
	.word	PPC_OPCODE_440
	.word	PPC_OPCODE_ISEL
	.word	PPC_OPCODE_RFMCI
	.word	PPC_OPCODE_403
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	PPC_OPCODE_E300
	.word	PPC_OPCODE_ALTIVEC
	.word	.LC16
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	PPC_OPCODE_SPE
	.word	PPC_OPCODE_EFS
	.word	PPC_OPCODE_BRLOCK
	.word	PPC_OPCODE_PMR
	.word	PPC_OPCODE_CACHELCK
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	PPC_OPCODE_64_BRIDGE
	.word	PPC_OPCODE_64
	.word	.LC23
	.word	.LC24
	.word	.LC25
	.word	PPC_OPCODE_BOOKE64
	.word	.LC26
	.word	PPC_OPCODE_POWER4
	.word	.LC27
	.word	PPC_OPCODE_POWER5
	.word	.LC28
	.word	PPC_OPCODE_POWER6
	.word	.LC29
	.word	PPC_OPCODE_CELL
	.word	.LC30
	.word	PPC_OPCODE_COMMON
	.word	.LC31
	.word	PPC_OPCODE_ANY
	.size	parse_cpu, .-parse_cpu
	.comm	ppc_cpu,4,4
	.comm	PPC_OPCODE_SPE,4,4
	.comm	PPC_OPCODE_RFMCI,4,4
	.comm	PPC_OPCODE_PPC,4,4
	.comm	PPC_OPCODE_POWER6,4,4
	.comm	PPC_OPCODE_POWER5,4,4
	.comm	PPC_OPCODE_POWER4,4,4
	.comm	PPC_OPCODE_POWER2,4,4
	.comm	PPC_OPCODE_POWER,4,4
	.comm	PPC_OPCODE_PMR,4,4
	.comm	PPC_OPCODE_ISEL,4,4
	.comm	PPC_OPCODE_EFS,4,4
	.comm	PPC_OPCODE_E300,4,4
	.comm	PPC_OPCODE_COMMON,4,4
	.comm	PPC_OPCODE_CLASSIC,4,4
	.comm	PPC_OPCODE_CELL,4,4
	.comm	PPC_OPCODE_CACHELCK,4,4
	.comm	PPC_OPCODE_BRLOCK,4,4
	.comm	PPC_OPCODE_BOOKE64,4,4
	.comm	PPC_OPCODE_BOOKE,4,4
	.comm	PPC_OPCODE_ANY,4,4
	.comm	PPC_OPCODE_ALTIVEC,4,4
	.comm	PPC_OPCODE_64_BRIDGE,4,4
	.comm	PPC_OPCODE_64,4,4
	.comm	PPC_OPCODE_601,4,4
	.comm	PPC_OPCODE_440,4,4
	.comm	PPC_OPCODE_403,4,4
	.comm	PPC_OPCODE_32,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
