	.file	"extr_dme1737.c_PWM_RR_TO_REG.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	PWM_RR_TO_REG, @function
PWM_RR_TO_REG:
.LFB0:
	.cfi_startproc
	endbr64
	mov	r10, QWORD PTR PWM_RR[rip]
	xor	r9d, r9d
	.p2align 4,,10
	.p2align 3
.L3:
	mov	ecx, DWORD PTR 4[r10+r9*4]
	add	ecx, DWORD PTR [r10+r9*4]
	mov	r11d, r9d
	lea	r8d, 1[rcx]
	mov	ecx, r8d
	shr	ecx, 31
	add	ecx, r8d
	sar	ecx
	movsx	rcx, ecx
	cmp	rcx, rdi
	jl	.L2
	add	r9, 1
	cmp	r9, 7
	jne	.L3
	mov	r11d, 7
.L2:
	mov	eax, edx
	and	eax, 248
	or	eax, r11d
	cmp	esi, 1
	je	.L8
	ret
	.p2align 4,,10
	.p2align 3
.L8:
	and	edx, 143
	sal	r11d, 4
	mov	eax, edx
	or	eax, r11d
	ret
	.cfi_endproc
.LFE0:
	.size	PWM_RR_TO_REG, .-PWM_RR_TO_REG
	.comm	PWM_RR,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_dme1737.c_PWM_RR_TO_REG.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PWM_RR_TO_REG, %function
PWM_RR_TO_REG:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	ip, #0
	ldr	r3, .L9
	push	{r4, lr}
	ldr	lr, [r3]
.L3:
	ldr	r3, [lr]
	ldr	r4, [lr, #4]!
	add	r3, r3, r4
	add	r3, r3, #1
	add	r3, r3, r3, lsr #31
	cmp	r0, r3, asr #1
	bgt	.L2
	add	ip, ip, #1
	cmp	ip, #7
	bne	.L3
.L2:
	cmp	r1, #1
	andeq	r2, r2, #143
	andne	r2, r2, #248
	orreq	r0, r2, ip, lsl #4
	orrne	r0, r2, ip
	pop	{r4, pc}
.L10:
	.align	2
.L9:
	.word	PWM_RR
	.size	PWM_RR_TO_REG, .-PWM_RR_TO_REG
	.comm	PWM_RR,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
