	.file	"extr_adt7475.c_adt7475_update_measure.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	adt7475_update_measure, @function
adt7475_update_measure:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	call	dev_get_drvdata@PLT
	mov	edi, DWORD PTR REG_STATUS2[rip]
	mov	r14, QWORD PTR 64[rax]
	mov	rbp, rax
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	sal	eax, 8
	mov	edi, DWORD PTR REG_STATUS1[rip]
	mov	DWORD PTR 0[rbp], eax
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	or	DWORD PTR 0[rbp], eax
	mov	edi, DWORD PTR REG_EXTEND2[rip]
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	edi, DWORD PTR REG_EXTEND1[rip]
	call	adt7475_read@PLT
	mov	r13d, eax
	test	eax, eax
	js	.L17
	mov	eax, r12d
	mov	r8d, DWORD PTR ADT7475_VOLTAGE_COUNT[rip]
	sal	eax, 8
	or	r13d, eax
	test	r8d, r8d
	jle	.L3
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L5:
	mov	eax, DWORD PTR 4[rbp]
	bt	eax, ebx
	jnc	.L4
	mov	edi, ebx
	call	VOLTAGE_REG@PLT
	mov	edi, eax
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	rdx, QWORD PTR INPUT[rip]
	mov	rax, QWORD PTR 8[rbp]
	lea	ecx, [rbx+rbx]
	sal	r12d, 2
	mov	rsi, QWORD PTR [rax+rdx*8]
	mov	edx, r13d
	sar	edx, cl
	and	edx, 3
	or	r12d, edx
	mov	DWORD PTR [rsi+rbx*4], r12d
.L4:
	add	rbx, 1
	cmp	DWORD PTR ADT7475_VOLTAGE_COUNT[rip], ebx
	jg	.L5
.L3:
	mov	edi, DWORD PTR ADT7475_TEMP_COUNT[rip]
	test	edi, edi
	jle	.L6
	xor	ebx, ebx
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L32:
	mov	rdx, QWORD PTR INPUT[rip]
	mov	rax, QWORD PTR 16[rbp]
	lea	ecx, 10[rbx+rbx]
	sal	r12d, 2
	mov	rsi, QWORD PTR [rax+rdx*8]
	mov	edx, r13d
	sar	edx, cl
	and	edx, 3
	or	r12d, edx
	mov	DWORD PTR [rsi+rbx*4], r12d
	add	rbx, 1
	cmp	DWORD PTR ADT7475_TEMP_COUNT[rip], ebx
	jle	.L6
.L7:
	mov	edi, ebx
	call	TEMP_REG@PLT
	mov	edi, eax
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	jns	.L32
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L17:
	.cfi_restore_state
	mov	r12d, eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L6:
	test	BYTE PTR 4[rbp], 32
	jne	.L33
.L8:
	mov	esi, DWORD PTR ADT7475_TACH_COUNT[rip]
	test	esi, esi
	jle	.L9
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L12:
	mov	edi, ebx
	cmp	rbx, 3
	jne	.L10
	mov	ecx, DWORD PTR 60[rbp]
	test	ecx, ecx
	je	.L11
.L10:
	call	TACH_REG@PLT
	mov	rdi, r14
	mov	esi, eax
	call	adt7475_read_word@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 24[rbp]
	mov	rdx, QWORD PTR INPUT[rip]
	mov	rax, QWORD PTR [rax+rdx*8]
	mov	DWORD PTR [rax+rbx*4], r12d
.L11:
	add	rbx, 1
	cmp	DWORD PTR ADT7475_TACH_COUNT[rip], ebx
	jg	.L12
.L9:
	mov	edx, DWORD PTR ADT7475_PWM_COUNT[rip]
	test	edx, edx
	jle	.L13
	xor	ebx, ebx
	.p2align 4,,10
	.p2align 3
.L16:
	mov	edi, ebx
	cmp	rbx, 1
	jne	.L14
	mov	eax, DWORD PTR 56[rbp]
	test	eax, eax
	je	.L15
.L14:
	call	PWM_REG@PLT
	mov	edi, eax
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	rax, QWORD PTR 32[rbp]
	mov	rdx, QWORD PTR INPUT[rip]
	mov	rax, QWORD PTR [rax+rdx*8]
	mov	DWORD PTR [rax+rbx*4], r12d
.L15:
	add	rbx, 1
	cmp	DWORD PTR ADT7475_PWM_COUNT[rip], ebx
	jg	.L16
.L13:
	xor	r12d, r12d
	cmp	QWORD PTR 48[rbp], 0
	je	.L1
	mov	edi, DWORD PTR REG_VID[rip]
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	and	r12d, 63
	mov	DWORD PTR 40[rbp], r12d
	xor	r12d, r12d
	jmp	.L1
.L33:
	mov	edi, DWORD PTR REG_STATUS4[rip]
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	sal	eax, 24
	or	DWORD PTR 0[rbp], eax
	mov	edi, DWORD PTR REG_EXTEND3[rip]
	call	adt7475_read@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	edi, DWORD PTR REG_VTT[rip]
	call	adt7475_read@PLT
	mov	edx, eax
	test	eax, eax
	js	.L18
	mov	rax, QWORD PTR 8[rbp]
	mov	rcx, QWORD PTR INPUT[rip]
	sal	edx, 2
	mov	rcx, QWORD PTR [rax+rcx*8]
	mov	eax, r12d
	sar	eax, 4
	and	eax, 3
	or	edx, eax
	mov	DWORD PTR 20[rcx], edx
	jmp	.L8
.L18:
	mov	r12d, eax
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	adt7475_update_measure, .-adt7475_update_measure
	.comm	REG_VTT,4,4
	.comm	REG_VID,4,4
	.comm	REG_STATUS4,4,4
	.comm	REG_STATUS2,4,4
	.comm	REG_STATUS1,4,4
	.comm	REG_EXTEND3,4,4
	.comm	REG_EXTEND2,4,4
	.comm	REG_EXTEND1,4,4
	.comm	INPUT,8,8
	.comm	ADT7475_VOLTAGE_COUNT,4,4
	.comm	ADT7475_TEMP_COUNT,4,4
	.comm	ADT7475_TACH_COUNT,4,4
	.comm	ADT7475_PWM_COUNT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_adt7475.c_adt7475_update_measure.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	adt7475_update_measure, %function
adt7475_update_measure:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	bl	dev_get_drvdata
	ldr	r3, .L42
	ldr	r8, [r0, #40]
	mov	r5, r0
	ldr	r0, [r3]
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r3, .L42+4
	lsl	r0, r4, #8
	str	r0, [r5]
	ldr	r0, [r3]
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r0, [r5]
	ldr	r3, .L42+8
	orr	r0, r0, r4
	str	r0, [r5]
	ldr	r0, [r3]
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r3, .L42+12
	ldr	r0, [r3]
	bl	adt7475_read
	cmp	r0, #0
	blt	.L18
	ldr	r9, .L42+16
	orr	r7, r0, r4, lsl #8
	ldr	r3, [r9]
	cmp	r3, #0
	ble	.L3
	mov	r6, #0
	ldr	r10, .L42+20
.L5:
	ldr	r3, [r5, #4]
	asr	r3, r3, r6
	tst	r3, #1
	beq	.L4
	mov	r0, r6
	bl	VOLTAGE_REG
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r2, [r10]
	ldr	r3, [r5, #8]
	lsl	r0, r6, #1
	asr	r0, r7, r0
	ldr	r3, [r3, r2, lsl #2]
	and	r0, r0, #3
	orr	r0, r0, r4, lsl #2
	str	r0, [r3, r6, lsl #2]
.L4:
	ldr	r3, [r9]
	add	r6, r6, #1
	cmp	r3, r6
	bgt	.L5
.L3:
	ldr	r9, .L42+24
	ldr	r3, [r9]
	cmp	r3, #0
	ble	.L6
	mov	r6, #0
	ldr	r10, .L42+20
	b	.L7
.L40:
	ldr	r1, [r10]
	ldr	r2, [r5, #12]
	ldr	r2, [r2, r1, lsl #2]
	str	r3, [r2, r6, lsl #2]
	ldr	r3, [r9]
	add	r6, r6, #1
	cmp	r3, r6
	ble	.L6
.L7:
	mov	r0, r6
	bl	TEMP_REG
	bl	adt7475_read
	lsl	r3, r6, #1
	add	r3, r3, #10
	asr	r3, r7, r3
	and	r3, r3, #3
	subs	r4, r0, #0
	orr	r3, r3, r4, lsl #2
	bge	.L40
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L18:
	mov	r4, r0
	b	.L1
.L6:
	ldr	r3, [r5, #4]
	tst	r3, #32
	bne	.L41
.L8:
	ldr	r7, .L42+28
	ldr	r3, [r7]
	cmp	r3, #0
	ble	.L9
	mov	r6, #0
	ldr	r9, .L42+20
.L12:
	cmp	r6, #3
	bne	.L10
	ldr	r3, [r5, #36]
	cmp	r3, #0
	beq	.L11
.L10:
	mov	r0, r6
	bl	TACH_REG
	mov	r1, r0
	mov	r0, r8
	bl	adt7475_read_word
	subs	r4, r0, #0
	blt	.L1
	ldr	r2, [r9]
	ldr	r3, [r5, #16]
	ldr	r3, [r3, r2, lsl #2]
	str	r4, [r3, r6, lsl #2]
.L11:
	ldr	r3, [r7]
	add	r6, r6, #1
	cmp	r3, r6
	bgt	.L12
.L9:
	ldr	r7, .L42+32
	ldr	r3, [r7]
	cmp	r3, #0
	ble	.L13
	mov	r6, #0
	ldr	r8, .L42+20
.L16:
	cmp	r6, #1
	bne	.L14
	ldr	r3, [r5, #32]
	cmp	r3, #0
	beq	.L15
.L14:
	mov	r0, r6
	bl	PWM_REG
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r2, [r8]
	ldr	r3, [r5, #20]
	ldr	r3, [r3, r2, lsl #2]
	str	r4, [r3, r6, lsl #2]
.L15:
	ldr	r3, [r7]
	add	r6, r6, #1
	cmp	r3, r6
	bgt	.L16
.L13:
	ldr	r4, [r5, #28]
	cmp	r4, #0
	beq	.L1
	ldr	r3, .L42+36
	ldr	r0, [r3]
	bl	adt7475_read
	subs	r4, r0, #0
	andge	r4, r4, #63
	strge	r4, [r5, #24]
	movge	r4, #0
	b	.L1
.L41:
	ldr	r3, .L42+40
	ldr	r0, [r3]
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r3, [r5]
	ldr	r2, .L42+44
	orr	r4, r3, r4, lsl #24
	str	r4, [r5]
	ldr	r0, [r2]
	bl	adt7475_read
	subs	r4, r0, #0
	blt	.L1
	ldr	r3, .L42+48
	ldr	r0, [r3]
	bl	adt7475_read
	cmp	r0, #0
	blt	.L18
	ldr	r3, .L42+20
	ldr	r2, [r5, #8]
	ldr	r1, [r3]
	asr	r3, r4, #4
	ldr	r2, [r2, r1, lsl #2]
	and	r3, r3, #3
	orr	r0, r3, r0, lsl #2
	str	r0, [r2, #20]
	b	.L8
.L43:
	.align	2
.L42:
	.word	REG_STATUS2
	.word	REG_STATUS1
	.word	REG_EXTEND2
	.word	REG_EXTEND1
	.word	ADT7475_VOLTAGE_COUNT
	.word	INPUT
	.word	ADT7475_TEMP_COUNT
	.word	ADT7475_TACH_COUNT
	.word	ADT7475_PWM_COUNT
	.word	REG_VID
	.word	REG_STATUS4
	.word	REG_EXTEND3
	.word	REG_VTT
	.size	adt7475_update_measure, .-adt7475_update_measure
	.comm	REG_VTT,4,4
	.comm	REG_VID,4,4
	.comm	REG_STATUS4,4,4
	.comm	REG_STATUS2,4,4
	.comm	REG_STATUS1,4,4
	.comm	REG_EXTEND3,4,4
	.comm	REG_EXTEND2,4,4
	.comm	REG_EXTEND1,4,4
	.comm	INPUT,4,4
	.comm	ADT7475_VOLTAGE_COUNT,4,4
	.comm	ADT7475_TEMP_COUNT,4,4
	.comm	ADT7475_TACH_COUNT,4,4
	.comm	ADT7475_PWM_COUNT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
