	.file	"extr_aic79xx_core.c_ahd_parse_cfgdata.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"%s: unable to allocate ahd_tmode_tstate.  Failing attach\n"
	.text
	.p2align 4
	.globl	ahd_parse_cfgdata
	.type	ahd_parse_cfgdata, @function
ahd_parse_cfgdata:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	edx, 65
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rsi
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 56
	.cfi_def_cfa_offset 112
	mov	ebx, DWORD PTR [rsi]
	mov	esi, DWORD PTR 4[rsi]
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 40[rsp], rax
	xor	eax, eax
	and	esi, DWORD PTR CFSCSIID[rip]
	and	ebx, DWORD PTR CFMAXTARG[rip]
	mov	DWORD PTR [rdi], esi
	call	ahd_alloc_tstate@PLT
	test	rax, rax
	je	.L2
	test	ebx, ebx
	jle	.L18
	lea	eax, -1[rbx]
	lea	r12, 28[rsp]
	xor	ebx, ebx
	movabs	r13, 8589934594
	mov	QWORD PTR [rsp], rax
	lea	rax, 32[rsp]
	mov	QWORD PTR 8[rsp], rax
	.p2align 4,,10
	.p2align 3
.L17:
	mov	r8, QWORD PTR 8[rsp]
	mov	edx, DWORD PTR 0[rbp]
	mov	ecx, ebx
	mov	esi, 65
	mov	rdi, rbp
	mov	r15d, ebx
	call	ahd_fetch_transinfo@PLT
	mov	ecx, ebx
	mov	r8d, 1
	movabs	rsi, 17179869188
	mov	QWORD PTR 16[rax], rsi
	sal	r8d, cl
	mov	r9d, DWORD PTR 4[rbp]
	mov	esi, r8d
	mov	edi, DWORD PTR 8[rbp]
	not	esi
	mov	edx, r9d
	and	edx, esi
	mov	ecx, esi
	mov	DWORD PTR 4[rbp], edx
	mov	rdx, QWORD PTR 32[rsp]
	mov	r10d, DWORD PTR [rdx]
	and	ecx, r10d
	mov	DWORD PTR [rdx], ecx
	mov	ecx, esi
	and	ecx, edi
	mov	DWORD PTR 8[rbp], ecx
	mov	rcx, QWORD PTR 8[r14]
	lea	rcx, [rcx+rbx*4]
	mov	r11d, DWORD PTR [rcx]
	test	DWORD PTR CFDISC[rip], r11d
	je	.L7
	or	r10d, r8d
	or	r9d, r8d
	or	edi, r8d
	mov	DWORD PTR [rdx], r10d
	mov	DWORD PTR 4[rbp], r9d
	mov	DWORD PTR 8[rbp], edi
.L8:
	mov	DWORD PTR 24[rax], 0
	mov	edi, DWORD PTR [rcx]
	and	edi, DWORD PTR CFXFER[rip]
	cmp	edi, DWORD PTR CFXFER_ASYNC[rip]
	mov	DWORD PTR 28[rax], edi
	jge	.L9
	cmp	edi, DWORD PTR AHD_PERIOD_10MHz[rip]
	jg	.L10
	mov	edi, DWORD PTR MSG_EXT_PPR_DT_REQ[rip]
	mov	DWORD PTR 24[rax], edi
.L10:
	mov	edi, DWORD PTR MAX_OFFSET[rip]
	mov	DWORD PTR 32[rax], edi
.L11:
	mov	edi, DWORD PTR [rcx]
	test	DWORD PTR CFPACKETIZED[rip], edi
	je	.L12
	mov	edi, DWORD PTR MSG_EXT_PPR_RD_STRM[rip]
	or	edi, DWORD PTR MSG_EXT_PPR_WR_FLOW[rip]
	or	edi, DWORD PTR MSG_EXT_PPR_HOLD_MCS[rip]
	or	edi, DWORD PTR MSG_EXT_PPR_IU_REQ[rip]
	or	edi, DWORD PTR 24[rax]
	mov	r8d, DWORD PTR 12[rbp]
	mov	DWORD PTR 24[rax], edi
	test	DWORD PTR AHD_RTI[rip], r8d
	je	.L39
	or	edi, DWORD PTR MSG_EXT_PPR_RTI[rip]
	mov	DWORD PTR 24[rax], edi
.L39:
	mov	edi, DWORD PTR [rcx]
.L12:
	test	DWORD PTR CFQAS[rip], edi
	je	.L14
	mov	edi, DWORD PTR MSG_EXT_PPR_QAS_REQ[rip]
	or	DWORD PTR 24[rax], edi
	mov	edi, DWORD PTR [rcx]
.L14:
	test	DWORD PTR CFWIDEB[rip], edi
	mov	ecx, DWORD PTR MSG_EXT_WDTR_BUS_16_BIT[rip]
	mov	r8d, 65
	mov	rdi, r12
	cmove	ecx, DWORD PTR MSG_EXT_WDTR_BUS_8_BIT[rip]
	mov	DWORD PTR 36[rax], ecx
	and	DWORD PTR 4[rdx], esi
	mov	edx, r15d
	mov	QWORD PTR [rax], r13
	mov	r9d, DWORD PTR ROLE_INITIATOR[rip]
	mov	QWORD PTR 8[rax], r13
	mov	ecx, DWORD PTR CAM_LUN_WILDCARD[rip]
	mov	esi, DWORD PTR 0[rbp]
	call	ahd_compile_devinfo@PLT
	mov	r8d, DWORD PTR TRUE[rip]
	mov	rsi, r12
	mov	rdi, rbp
	mov	edx, DWORD PTR MSG_EXT_WDTR_BUS_8_BIT[rip]
	mov	ecx, DWORD PTR AHD_TRANS_CUR[rip]
	or	ecx, DWORD PTR AHD_TRANS_GOAL[rip]
	call	ahd_set_width@PLT
	mov	eax, DWORD PTR TRUE[rip]
	xor	ecx, ecx
	xor	edx, edx
	sub	rsp, 8
	.cfi_def_cfa_offset 120
	xor	r8d, r8d
	mov	rsi, r12
	mov	rdi, rbp
	push	rax
	.cfi_def_cfa_offset 128
	mov	r9d, DWORD PTR AHD_TRANS_CUR[rip]
	or	r9d, DWORD PTR AHD_TRANS_GOAL[rip]
	call	ahd_set_syncrate@PLT
	pop	rdx
	.cfi_def_cfa_offset 120
	lea	rax, 1[rbx]
	pop	rcx
	.cfi_def_cfa_offset 112
	cmp	rbx, QWORD PTR [rsp]
	je	.L18
	mov	rbx, rax
	jmp	.L17
	.p2align 4,,10
	.p2align 3
.L9:
	mov	edi, DWORD PTR AHD_ASYNC_XFER_PERIOD[rip]
	mov	DWORD PTR 32[rax], 0
	mov	DWORD PTR 28[rax], edi
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L7:
	mov	edi, DWORD PTR CFPACKETIZED[rip]
	not	edi
	and	r11d, edi
	mov	DWORD PTR [rcx], r11d
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L18:
	mov	esi, DWORD PTR AHD_SPCHK_ENB_A[rip]
	mov	ecx, DWORD PTR 16[rbp]
	mov	eax, DWORD PTR 16[r14]
	mov	edx, esi
	or	esi, ecx
	not	edx
	and	edx, ecx
	test	DWORD PTR CFSPARITY[rip], eax
	cmove	esi, edx
	mov	ecx, esi
	mov	esi, DWORD PTR AHD_RESET_BUS_A[rip]
	mov	edx, esi
	or	esi, ecx
	not	edx
	and	edx, ecx
	test	DWORD PTR CFRESETB[rip], eax
	cmovne	edx, esi
	mov	esi, DWORD PTR AHD_EXTENDED_TRANS_A[rip]
	mov	ecx, esi
	or	esi, edx
	not	ecx
	and	edx, ecx
	test	DWORD PTR CFEXTEND[rip], eax
	cmovne	edx, esi
	mov	esi, DWORD PTR AHD_BIOS_ENABLED[rip]
	and	eax, DWORD PTR CFBIOSSTATE[rip]
	mov	ecx, esi
	not	ecx
	and	ecx, edx
	cmp	eax, DWORD PTR CFBS_ENABLED[rip]
	jne	.L21
	or	esi, edx
	mov	ecx, esi
.L21:
	mov	edx, DWORD PTR AHD_STPWLEVEL_A[rip]
	mov	eax, edx
	not	eax
	and	eax, ecx
	mov	DWORD PTR 16[rbp], eax
	mov	eax, DWORD PTR 20[r14]
	and	eax, DWORD PTR CFSTPWLEVEL[rip]
	jne	.L41
.L1:
	mov	rbx, QWORD PTR 40[rsp]
	xor	rbx, QWORD PTR fs:40
	jne	.L42
	add	rsp, 56
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L41:
	.cfi_restore_state
	or	ecx, edx
	xor	eax, eax
	mov	DWORD PTR 16[rbp], ecx
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rdi, rbp
	call	ahd_name@PLT
	lea	rdi, .LC0[rip]
	mov	rsi, rax
	xor	eax, eax
	call	printf@PLT
	mov	eax, DWORD PTR ENOMEM[rip]
	jmp	.L1
.L42:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	ahd_parse_cfgdata, .-ahd_parse_cfgdata
	.comm	ahd_debug,4,4
	.comm	TRUE,4,4
	.comm	ROLE_INITIATOR,4,4
	.comm	MSG_EXT_WDTR_BUS_8_BIT,4,4
	.comm	MSG_EXT_WDTR_BUS_16_BIT,4,4
	.comm	MSG_EXT_PPR_WR_FLOW,4,4
	.comm	MSG_EXT_PPR_RTI,4,4
	.comm	MSG_EXT_PPR_RD_STRM,4,4
	.comm	MSG_EXT_PPR_QAS_REQ,4,4
	.comm	MSG_EXT_PPR_IU_REQ,4,4
	.comm	MSG_EXT_PPR_HOLD_MCS,4,4
	.comm	MSG_EXT_PPR_DT_REQ,4,4
	.comm	MAX_OFFSET,4,4
	.comm	ENOMEM,4,4
	.comm	CFXFER_ASYNC,4,4
	.comm	CFXFER,4,4
	.comm	CFWIDEB,4,4
	.comm	CFSTPWLEVEL,4,4
	.comm	CFSPARITY,4,4
	.comm	CFSCSIID,4,4
	.comm	CFRESETB,4,4
	.comm	CFQAS,4,4
	.comm	CFPACKETIZED,4,4
	.comm	CFMAXTARG,4,4
	.comm	CFEXTEND,4,4
	.comm	CFDISC,4,4
	.comm	CFBS_ENABLED,4,4
	.comm	CFBIOSSTATE,4,4
	.comm	CAM_LUN_WILDCARD,4,4
	.comm	AHD_TRANS_GOAL,4,4
	.comm	AHD_TRANS_CUR,4,4
	.comm	AHD_SYNCRATE_DT,4,4
	.comm	AHD_SYNCRATE_160,4,4
	.comm	AHD_STPWLEVEL_A,4,4
	.comm	AHD_SPCHK_ENB_A,4,4
	.comm	AHD_SHOW_MISC,4,4
	.comm	AHD_RTI,4,4
	.comm	AHD_RESET_BUS_A,4,4
	.comm	AHD_PERIOD_10MHz,4,4
	.comm	AHD_EXTENDED_TRANS_A,4,4
	.comm	AHD_BIOS_ENABLED,4,4
	.comm	AHD_ASYNC_XFER_PERIOD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_aic79xx_core.c_ahd_parse_cfgdata.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"%s: unable to allocate ahd_tmode_tstate.  Failing a"
	.ascii	"ttach\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	ahd_parse_cfgdata
	.syntax unified
	.arm
	.fpu softvfp
	.type	ahd_parse_cfgdata, %function
ahd_parse_cfgdata:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	ip, r1
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r3, .L44
	sub	sp, sp, #44
	ldr	r2, [r3]
	str	r1, [sp, #16]
	ldr	r3, .L44+4
	ldr	r1, [r1, #4]
	ldr	ip, [ip]
	ldr	r3, [r3]
	and	r1, r1, r2
	ldr	r2, .L44+8
	and	r3, ip, r3
	ldr	r2, [r2]
	str	r2, [sp, #36]
	mov	r2,#0
	mov	r2, #65
	str	r1, [r0]
	mov	r4, r0
	mov	r5, r3
	str	r3, [sp, #20]
	bl	ahd_alloc_tstate
	cmp	r0, #0
	beq	.L2
	cmp	r5, #0
	ble	.L17
	mov	r5, #0
	ldr	r6, .L44+12
	ldr	fp, .L44+16
	b	.L3
.L42:
	ldr	r1, .L44+20
	ldr	r1, [r1]
	cmp	r3, r1
	ldrle	r3, .L44+24
	ldrle	r3, [r3]
	strle	r3, [r0, #24]
	ldr	r3, .L44+28
	ldr	r3, [r3]
	str	r3, [r0, #32]
.L11:
	ldr	r1, .L44+32
	ldr	r3, [r2, r7]
	ldr	r1, [r1]
	tst	r3, r1
	beq	.L12
	ldr	r1, .L44+36
	ldr	r3, .L44+40
	ldr	ip, .L44+44
	ldr	r8, [r1]
	ldr	r3, [r3]
	ldr	r1, .L44+48
	ldr	lr, [ip]
	ldr	r1, [r1]
	orr	r3, r3, r8
	ldr	ip, .L44+52
	orr	r3, r3, lr
	orr	r3, r3, r1
	ldr	ip, [ip]
	ldr	r1, [r4, #12]
	ldr	r8, [r0, #24]
	tst	r1, ip
	ldrne	r1, .L44+56
	orr	r3, r3, r8
	ldrne	r8, [r1]
	str	r3, [r0, #24]
	orrne	r3, r8, r3
	strne	r3, [r0, #24]
	ldr	r3, [r2, r7]
.L12:
	ldr	r1, .L44+60
	ldr	r1, [r1]
	tst	r3, r1
	beq	.L14
	ldr	r1, .L44+64
	ldr	r3, [r0, #24]
	ldr	r1, [r1]
	orr	r3, r3, r1
	str	r3, [r0, #24]
	ldr	r3, [r2, r7]
.L14:
	ldr	r2, .L44+68
	mov	r1, #65
	ldr	r2, [r2]
	ldr	r7, .L44+72
	tst	r3, r2
	ldrne	r3, .L44+76
	ldreq	r3, .L44+80
	ldr	r2, [r3]
	mov	r3, #2
	str	r2, [r0, #36]
	ldr	r2, [r10, #4]
	and	r9, r9, r2
	ldr	r2, .L44+84
	str	r9, [r10, #4]
	ldr	r2, [r2]
	str	r3, [r0, #8]
	str	r3, [r0, #12]
	str	r3, [r0]
	str	r3, [r0, #4]
	ldr	r3, .L44+88
	add	r0, sp, #28
	ldr	r3, [r3]
	stm	sp, {r1, r2}
	mov	r2, r5
	ldr	r1, [r4]
	bl	ahd_compile_devinfo
	ldr	r2, [fp]
	ldr	r1, [r6]
	ldr	r3, [r7]
	str	r2, [sp]
	ldr	r2, .L44+80
	orr	r3, r1, r3
	ldr	r2, [r2]
	add	r1, sp, #28
	mov	r0, r4
	bl	ahd_set_width
	mov	r3, #0
	ldr	r0, [r7]
	ldr	r2, [r6]
	ldr	r1, [fp]
	orr	r2, r2, r0
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r2, r3
	str	r1, [sp, #8]
	mov	r0, r4
	add	r1, sp, #28
	bl	ahd_set_syncrate
	ldr	r3, [sp, #20]
	add	r5, r5, #1
	cmp	r3, r5
	beq	.L17
.L3:
	add	r3, sp, #32
	str	r3, [sp]
	mov	r1, #65
	mov	r3, r5
	ldr	r2, [r4]
	mov	r0, r4
	bl	ahd_fetch_transinfo
	mov	r3, #1
	mov	r7, #4
	ldr	r10, [sp, #32]
	ldr	ip, [r4, #4]
	ldr	r2, [sp, #16]
	ldr	lr, [r10]
	ldr	r1, [r4, #8]
	lsl	r3, r3, r5
	ldr	r2, [r2, #8]
	str	r7, [r0, #16]
	str	r7, [r0, #20]
	bic	r7, ip, r3
	str	r7, [r4, #4]
	bic	r9, lr, r3
	bic	r8, r1, r3
	ldr	r7, .L44+92
	str	r9, [r10]
	str	r8, [r4, #8]
	ldr	r8, [r2, r5, lsl #2]
	ldr	r7, [r7]
	mvn	r9, r3
	tst	r8, r7
	orrne	lr, lr, r3
	orrne	ip, ip, r3
	orrne	r3, r1, r3
	mov	r1, #0
	ldreq	r3, .L44+32
	strne	lr, [r10]
	ldreq	r3, [r3]
	strne	r3, [r4, #8]
	biceq	r8, r8, r3
	ldr	r3, .L44+96
	streq	r8, [r2, r5, lsl #2]
	strne	ip, [r4, #4]
	ldr	lr, .L44+100
	lsl	r7, r5, #2
	str	r1, [r0, #24]
	ldr	ip, [r2, r7]
	ldr	r3, [r3]
	ldr	lr, [lr]
	and	r3, r3, ip
	cmp	r3, lr
	str	r3, [r0, #28]
	blt	.L42
	ldr	r3, .L44+104
	str	r1, [r0, #32]
	ldr	r3, [r3]
	str	r3, [r0, #28]
	b	.L11
.L17:
	ldr	r3, .L44+108
	ldr	r2, .L44+112
	ldr	r1, [r3]
	ldr	r3, [sp, #16]
	ldr	r0, [r4, #16]
	ldr	r3, [r3, #12]
	ldr	r2, [r2]
	tst	r3, r1
	bic	r1, r0, r2
	orrne	r1, r0, r2
	ldr	r2, .L44+116
	ldr	r0, .L44+120
	ldr	r2, [r2]
	ldr	r0, [r0]
	tst	r3, r2
	bic	r2, r1, r0
	orrne	r2, r0, r1
	ldr	r0, .L44+124
	ldr	r1, .L44+128
	ldr	r0, [r0]
	ldr	r1, [r1]
	tst	r3, r0
	bic	r0, r2, r1
	orrne	r0, r1, r2
	ldr	r2, .L44+132
	ldr	r1, .L44+136
	ldr	r2, [r2]
	ldr	r1, [r1]
	and	r3, r3, r2
	ldr	r2, .L44+140
	cmp	r3, r1
	ldr	r3, [r2]
	ldr	r2, .L44+144
	bic	r1, r0, r3
	orreq	r1, r3, r0
	ldr	r0, [sp, #16]
	ldr	r2, [r2]
	ldr	r0, [r0, #16]
	ldr	r3, .L44+148
	ands	r0, r0, r2
	movne	r0, #0
	ldr	r3, [r3]
	bic	r2, r1, r3
	orrne	r3, r3, r1
	str	r2, [r4, #16]
	strne	r3, [r4, #16]
.L1:
	ldr	r3, .L44+8
	ldr	r2, [r3]
	ldr	r3, [sp, #36]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L43
	add	sp, sp, #44
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	mov	r0, r4
	bl	ahd_name
	mov	r1, r0
	ldr	r0, .L44+152
	bl	printf
	ldr	r3, .L44+156
	ldr	r0, [r3]
	b	.L1
.L43:
	bl	__stack_chk_fail
.L45:
	.align	2
.L44:
	.word	CFSCSIID
	.word	CFMAXTARG
	.word	.LC1
	.word	AHD_TRANS_CUR
	.word	TRUE
	.word	AHD_PERIOD_10MHz
	.word	MSG_EXT_PPR_DT_REQ
	.word	MAX_OFFSET
	.word	CFPACKETIZED
	.word	MSG_EXT_PPR_WR_FLOW
	.word	MSG_EXT_PPR_RD_STRM
	.word	MSG_EXT_PPR_HOLD_MCS
	.word	MSG_EXT_PPR_IU_REQ
	.word	AHD_RTI
	.word	MSG_EXT_PPR_RTI
	.word	CFQAS
	.word	MSG_EXT_PPR_QAS_REQ
	.word	CFWIDEB
	.word	AHD_TRANS_GOAL
	.word	MSG_EXT_WDTR_BUS_16_BIT
	.word	MSG_EXT_WDTR_BUS_8_BIT
	.word	ROLE_INITIATOR
	.word	CAM_LUN_WILDCARD
	.word	CFDISC
	.word	CFXFER
	.word	CFXFER_ASYNC
	.word	AHD_ASYNC_XFER_PERIOD
	.word	CFSPARITY
	.word	AHD_SPCHK_ENB_A
	.word	CFRESETB
	.word	AHD_RESET_BUS_A
	.word	CFEXTEND
	.word	AHD_EXTENDED_TRANS_A
	.word	CFBIOSSTATE
	.word	CFBS_ENABLED
	.word	AHD_BIOS_ENABLED
	.word	CFSTPWLEVEL
	.word	AHD_STPWLEVEL_A
	.word	.LC0
	.word	ENOMEM
	.size	ahd_parse_cfgdata, .-ahd_parse_cfgdata
	.comm	ahd_debug,4,4
	.comm	TRUE,4,4
	.comm	ROLE_INITIATOR,4,4
	.comm	MSG_EXT_WDTR_BUS_8_BIT,4,4
	.comm	MSG_EXT_WDTR_BUS_16_BIT,4,4
	.comm	MSG_EXT_PPR_WR_FLOW,4,4
	.comm	MSG_EXT_PPR_RTI,4,4
	.comm	MSG_EXT_PPR_RD_STRM,4,4
	.comm	MSG_EXT_PPR_QAS_REQ,4,4
	.comm	MSG_EXT_PPR_IU_REQ,4,4
	.comm	MSG_EXT_PPR_HOLD_MCS,4,4
	.comm	MSG_EXT_PPR_DT_REQ,4,4
	.comm	MAX_OFFSET,4,4
	.comm	ENOMEM,4,4
	.comm	CFXFER_ASYNC,4,4
	.comm	CFXFER,4,4
	.comm	CFWIDEB,4,4
	.comm	CFSTPWLEVEL,4,4
	.comm	CFSPARITY,4,4
	.comm	CFSCSIID,4,4
	.comm	CFRESETB,4,4
	.comm	CFQAS,4,4
	.comm	CFPACKETIZED,4,4
	.comm	CFMAXTARG,4,4
	.comm	CFEXTEND,4,4
	.comm	CFDISC,4,4
	.comm	CFBS_ENABLED,4,4
	.comm	CFBIOSSTATE,4,4
	.comm	CAM_LUN_WILDCARD,4,4
	.comm	AHD_TRANS_GOAL,4,4
	.comm	AHD_TRANS_CUR,4,4
	.comm	AHD_SYNCRATE_DT,4,4
	.comm	AHD_SYNCRATE_160,4,4
	.comm	AHD_STPWLEVEL_A,4,4
	.comm	AHD_SPCHK_ENB_A,4,4
	.comm	AHD_SHOW_MISC,4,4
	.comm	AHD_RTI,4,4
	.comm	AHD_RESET_BUS_A,4,4
	.comm	AHD_PERIOD_10MHz,4,4
	.comm	AHD_EXTENDED_TRANS_A,4,4
	.comm	AHD_BIOS_ENABLED,4,4
	.comm	AHD_ASYNC_XFER_PERIOD,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
