	.file	"extr_bnx2x_link.c_bnx2x_warpcore_set_sgmii_speed.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"set SGMII AUTONEG\n"
.LC1:
	.string	"Speed not supported: 0x%x\n"
.LC2:
	.string	"set SGMII force speed %d\n"
.LC3:
	.string	"  (readback) %x\n"
	.text
	.p2align 4
	.type	bnx2x_warpcore_set_sgmii_speed, @function
bnx2x_warpcore_set_sgmii_speed:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	mov	r14, rdx
	mov	r8d, -24577
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	mov	r13, rsi
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	mov	rbx, rcx
	sub	rsp, 32
	.cfi_def_cfa_offset 80
	mov	r12, QWORD PTR [rsi]
	mov	ecx, DWORD PTR MDIO_WC_REG_RX66_CONTROL[rip]
	mov	rsi, rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	mov	rdi, r12
	call	bnx2x_cl45_read_and_write@PLT
	mov	rsi, r13
	mov	rdi, rbp
	call	bnx2x_warpcore_set_lpi_passthrough@PLT
	mov	ecx, DWORD PTR MDIO_WC_REG_COMBO_IEEE0_MIICTRL[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	test	rbx, rbx
	jne	.L3
	mov	eax, DWORD PTR SPEED_AUTO_NEG[rip]
	cmp	DWORD PTR 0[rbp], eax
	jne	.L4
.L3:
	mov	rsi, rbp
	mov	rdi, r12
	mov	r8d, 4096
	call	bnx2x_cl45_read_or_write@PLT
	mov	edi, DWORD PTR NETIF_MSG_LINK[rip]
	lea	rsi, .LC0[rip]
	xor	eax, eax
	call	DP@PLT
.L5:
	mov	ecx, DWORD PTR MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	mov	rsi, rbp
	mov	rdi, r12
	lea	r8, 16[rsp]
	call	bnx2x_cl45_read@PLT
	mov	r8d, 1
	test	r14, r14
	je	.L21
.L12:
	mov	ecx, DWORD PTR MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	mov	rsi, rbp
	mov	rdi, r12
	mov	DWORD PTR 16[rsp], r8d
	call	bnx2x_cl45_write@PLT
	lea	r8, 20[rsp]
	mov	rsi, rbp
	mov	rdi, r12
	mov	ecx, DWORD PTR MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	call	bnx2x_cl45_read@PLT
	mov	r8d, DWORD PTR 20[rsp]
	mov	rsi, rbp
	mov	rdi, r12
	mov	ecx, DWORD PTR MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	and	r8d, -5
	call	bnx2x_cl45_write@PLT
	mov	r8d, DWORD PTR 20[rsp]
	mov	rsi, rbp
	mov	rdi, r12
	mov	ecx, DWORD PTR MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	or	r8d, 4
	call	bnx2x_cl45_write@PLT
	mov	r8d, DWORD PTR 16[rsp]
	mov	rsi, rbp
	mov	rdi, r12
	mov	ecx, DWORD PTR MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	or	r8d, 16
	call	bnx2x_cl45_write@PLT
.L1:
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L22
	add	rsp, 32
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	pop	rbx
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L21:
	.cfi_restore_state
	mov	r8d, DWORD PTR 16[rsp]
	and	r8d, 65354
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L4:
	lea	rbx, 12[rsp]
	mov	rsi, rbp
	mov	rdi, r12
	mov	r8, rbx
	call	bnx2x_cl45_read@PLT
	mov	r8d, DWORD PTR 12[rsp]
	mov	edx, DWORD PTR 0[rbp]
	and	r8d, 52927
	mov	DWORD PTR 12[rsp], r8d
	cmp	edx, 129
	je	.L6
	cmp	edx, 130
	je	.L7
	cmp	edx, 128
	je	.L23
	mov	edi, DWORD PTR NETIF_MSG_LINK[rip]
	lea	rsi, .LC1[rip]
	xor	eax, eax
	call	DP@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L6:
	or	r8d, 8192
	mov	DWORD PTR 12[rsp], r8d
.L7:
	mov	rax, QWORD PTR DUPLEX_FULL[rip]
	cmp	QWORD PTR 8[rbp], rax
	je	.L24
.L11:
	mov	ecx, DWORD PTR MDIO_WC_REG_COMBO_IEEE0_MIICTRL[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	mov	rsi, rbp
	mov	rdi, r12
	call	bnx2x_cl45_write@PLT
	mov	edx, DWORD PTR 0[rbp]
	mov	edi, DWORD PTR NETIF_MSG_LINK[rip]
	xor	eax, eax
	lea	rsi, .LC2[rip]
	call	DP@PLT
	mov	rsi, rbp
	mov	rdi, r12
	mov	r8, rbx
	mov	ecx, DWORD PTR MDIO_WC_REG_COMBO_IEEE0_MIICTRL[rip]
	mov	edx, DWORD PTR MDIO_WC_DEVAD[rip]
	call	bnx2x_cl45_read@PLT
	mov	edx, DWORD PTR 12[rsp]
	mov	edi, DWORD PTR NETIF_MSG_LINK[rip]
	xor	eax, eax
	lea	rsi, .LC3[rip]
	call	DP@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L24:
	or	r8d, 256
	mov	DWORD PTR 12[rsp], r8d
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L23:
	or	r8d, 64
	mov	DWORD PTR 12[rsp], r8d
	jmp	.L7
.L22:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	bnx2x_warpcore_set_sgmii_speed, .-bnx2x_warpcore_set_sgmii_speed
	.comm	SPEED_AUTO_NEG,4,4
	.comm	NETIF_MSG_LINK,4,4
	.comm	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2,4,4
	.comm	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1,4,4
	.comm	MDIO_WC_REG_RX66_CONTROL,4,4
	.comm	MDIO_WC_REG_COMBO_IEEE0_MIICTRL,4,4
	.comm	MDIO_WC_DEVAD,4,4
	.comm	DUPLEX_FULL,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_bnx2x_link.c_bnx2x_warpcore_set_sgmii_speed.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"set SGMII AUTONEG\012\000"
	.align	2
.LC1:
	.ascii	"Speed not supported: 0x%x\012\000"
	.align	2
.LC2:
	.ascii	"set SGMII force speed %d\012\000"
	.align	2
.LC3:
	.ascii	"  (readback) %x\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bnx2x_warpcore_set_sgmii_speed, %function
bnx2x_warpcore_set_sgmii_speed:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mvn	lr, #24576
	mov	r4, r0
	mov	r7, r1
	mov	r8, r3
	ldr	r6, [r1]
	sub	sp, sp, #24
	ldr	r3, .L24
	ldr	r5, .L24+4
	str	lr, [sp]
	ldr	ip, .L24+8
	mov	r1, r4
	ldr	r3, [r3]
	mov	r9, r2
	mov	r0, r6
	ldr	r2, [r5]
	ldr	ip, [ip]
	str	ip, [sp, #20]
	mov	ip,#0
	bl	bnx2x_cl45_read_and_write
	mov	r1, r7
	mov	r0, r4
	bl	bnx2x_warpcore_set_lpi_passthrough
	cmp	r8, #0
	bne	.L21
	ldr	r3, .L24+12
	ldr	r2, [r4]
	ldr	r3, [r3]
	ldr	r7, .L24+16
	cmp	r2, r3
	ldr	r3, [r7]
	ldr	r2, [r5]
	bne	.L4
.L3:
	mov	r1, #4096
	mov	r0, r6
	str	r1, [sp]
	mov	r1, r4
	bl	bnx2x_cl45_read_or_write
	ldr	r3, .L24+20
	ldr	r1, .L24+24
	ldr	r0, [r3]
	bl	DP
.L5:
	ldr	r7, .L24+28
	add	r2, sp, #12
	ldr	r3, [r7]
	mov	r1, r4
	str	r2, [sp]
	mov	r0, r6
	ldr	r2, [r5]
	bl	bnx2x_cl45_read
	cmp	r9, #0
	movne	ip, #1
	ldreq	ip, .L24+32
	ldreq	r3, [sp, #12]
	ldr	r8, .L24+36
	andeq	ip, ip, r3
	str	ip, [sp]
	mov	r1, r4
	ldr	r3, [r7]
	ldr	r2, [r5]
	mov	r0, r6
	str	ip, [sp, #12]
	bl	bnx2x_cl45_write
	add	r2, sp, #16
	ldr	r3, [r8]
	mov	r1, r4
	str	r2, [sp]
	mov	r0, r6
	ldr	r2, [r5]
	bl	bnx2x_cl45_read
	ldr	r2, [sp, #16]
	ldr	r3, [r8]
	bic	r2, r2, #4
	mov	r1, r4
	str	r2, [sp]
	mov	r0, r6
	ldr	r2, [r5]
	bl	bnx2x_cl45_write
	ldr	r2, [sp, #16]
	ldr	r3, [r8]
	orr	r2, r2, #4
	mov	r1, r4
	str	r2, [sp]
	mov	r0, r6
	ldr	r2, [r5]
	bl	bnx2x_cl45_write
	ldr	ip, [sp, #12]
	ldr	r3, [r7]
	orr	ip, ip, #16
	mov	r1, r4
	mov	r0, r6
	ldr	r2, [r5]
	str	ip, [sp]
	bl	bnx2x_cl45_write
.L1:
	ldr	r3, .L24+8
	ldr	r2, [r3]
	ldr	r3, [sp, #20]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L22
	add	sp, sp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L4:
	add	r8, sp, #8
	mov	r1, r4
	mov	r0, r6
	str	r8, [sp]
	bl	bnx2x_cl45_read
	ldr	r1, [sp, #8]
	ldr	r3, .L24+40
	ldr	r2, [r4]
	and	r3, r3, r1
	cmp	r2, #129
	str	r3, [sp, #8]
	beq	.L6
	cmp	r2, #130
	beq	.L7
	cmp	r2, #128
	beq	.L23
	ldr	r3, .L24+20
	ldr	r1, .L24+44
	ldr	r0, [r3]
	bl	DP
	b	.L1
.L21:
	ldr	r3, .L24+16
	ldr	r2, [r5]
	ldr	r3, [r3]
	b	.L3
.L6:
	orr	r3, r3, #8192
	str	r3, [sp, #8]
.L7:
	ldr	r2, .L24+48
	ldr	r1, [r4, #4]
	ldr	r2, [r2]
	ldr	r10, .L24+20
	cmp	r1, r2
	orreq	r3, r3, #256
	str	r3, [sp]
	streq	r3, [sp, #8]
	mov	r1, r4
	ldr	r3, [r7]
	ldr	r2, [r5]
	mov	r0, r6
	bl	bnx2x_cl45_write
	ldr	r2, [r4]
	ldr	r0, [r10]
	ldr	r1, .L24+52
	bl	DP
	str	r8, [sp]
	mov	r1, r4
	ldr	r2, [r5]
	mov	r0, r6
	ldr	r3, [r7]
	bl	bnx2x_cl45_read
	ldr	r0, [r10]
	ldr	r2, [sp, #8]
	ldr	r1, .L24+56
	bl	DP
	b	.L5
.L23:
	orr	r3, r3, #64
	str	r3, [sp, #8]
	b	.L7
.L22:
	bl	__stack_chk_fail
.L25:
	.align	2
.L24:
	.word	MDIO_WC_REG_RX66_CONTROL
	.word	MDIO_WC_DEVAD
	.word	.LC4
	.word	SPEED_AUTO_NEG
	.word	MDIO_WC_REG_COMBO_IEEE0_MIICTRL
	.word	NETIF_MSG_LINK
	.word	.LC0
	.word	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1
	.word	65354
	.word	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2
	.word	52927
	.word	.LC1
	.word	DUPLEX_FULL
	.word	.LC2
	.word	.LC3
	.size	bnx2x_warpcore_set_sgmii_speed, .-bnx2x_warpcore_set_sgmii_speed
	.comm	SPEED_AUTO_NEG,4,4
	.comm	NETIF_MSG_LINK,4,4
	.comm	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2,4,4
	.comm	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1,4,4
	.comm	MDIO_WC_REG_RX66_CONTROL,4,4
	.comm	MDIO_WC_REG_COMBO_IEEE0_MIICTRL,4,4
	.comm	MDIO_WC_DEVAD,4,4
	.comm	DUPLEX_FULL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
