	.file	"extr_ar9003_phy.c_ar9003_hw_ani_control.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"off"
.LC1:
	.string	"on"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC2:
	.string	"** ch %d: ofdm weak signal: %s=>%s\n"
	.align 8
.LC3:
	.string	"ATH9K_ANI_FIRSTEP_LEVEL: level out of range (%u > %zu)\n"
	.align 8
.LC4:
	.string	"** ch %d: level %d=>%d[def:%d] firstep[level]=%d ini=%d\n"
	.align 8
.LC5:
	.string	"** ch %d: level %d=>%d[def:%d] firstep_low[level]=%d ini=%d\n"
	.align 8
.LC6:
	.string	"ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level out of range (%u > %zu)\n"
	.align 8
.LC7:
	.string	"** ch %d: level %d=>%d[def:%d] cycpwrThr1[level]=%d ini=%d\n"
	.align 8
.LC8:
	.string	"** ch %d: level %d=>%d[def:%d] cycpwrThr1Ext[level]=%d ini=%d\n"
	.section	.rodata.str1.1
.LC9:
	.string	"invalid cmd %u\n"
	.section	.rodata.str1.8
	.align 8
.LC10:
	.string	"ANI parameters: SI=%d, ofdmWS=%s FS=%d MRCcck=%s listenTime=%d ofdmErrs=%d cckErrs=%d\n"
	.section	.rodata.str1.1
.LC11:
	.string	"** ch %d: MRC CCK: %s=>%s\n"
	.text
	.p2align 4
	.type	ar9003_hw_ani_control, @function
ar9003_hw_ani_control:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, esi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movsx	r12, edx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	call	ath9k_hw_common@PLT
	mov	rbx, QWORD PTR 40[rbp]
	mov	r14, rax
	mov	eax, DWORD PTR 0[rbp]
	and	eax, r13d
	add	eax, -128
	cmp	eax, 4
	ja	.L2
	lea	rdx, .L4[rip]
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L4:
	.long	.L8-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.text
	.p2align 4,,10
	.p2align 3
.L5:
	xor	r15d, r15d
	test	r12d, r12d
	mov	edx, DWORD PTR AR_PHY_MRC_CCK_ENABLE[rip]
	mov	rdi, rbp
	setne	r15b
	mov	esi, DWORD PTR AR_PHY_MRC_CCK_CTRL[rip]
	mov	ecx, r15d
	call	REG_RMW_FIELD@PLT
	mov	edx, DWORD PTR AR_PHY_MRC_CCK_MUX_REG[rip]
	mov	ecx, r15d
	mov	rdi, rbp
	mov	esi, DWORD PTR AR_PHY_MRC_CCK_CTRL[rip]
	call	REG_RMW_FIELD@PLT
	mov	eax, DWORD PTR 32[rbx]
	cmp	eax, r15d
	je	.L51
	mov	esi, DWORD PTR ANI[rip]
	movsx	rcx, DWORD PTR [rbx]
	test	r12d, r12d
	je	.L54
	test	eax, eax
	jne	.L34
	lea	r9, .LC1[rip]
	lea	r8, .LC0[rip]
	mov	rdi, r14
	xor	eax, eax
	lea	rdx, .LC11[rip]
	call	ath_dbg@PLT
.L33:
	add	DWORD PTR 8[rbp], 1
	jmp	.L27
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rdi, QWORD PTR firstep_table[rip]
	movsx	r13, r12d
	call	ARRAY_SIZE@PLT
	cmp	rax, r13
	jbe	.L55
	mov	rdx, QWORD PTR firstep_table[rip]
	mov	rcx, QWORD PTR ATH9K_ANI_FIRSTEP_LVL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR AR_PHY_FIND_SIG[rip]
	mov	eax, DWORD PTR [rdx+r13*4]
	sub	eax, DWORD PTR [rdx+rcx*4]
	add	eax, DWORD PTR 48[rbx]
	cmp	DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MIN[rip], eax
	cmovge	eax, DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MIN[rip]
	cmp	DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MAX[rip], eax
	cmovle	eax, DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MAX[rip]
	mov	edx, DWORD PTR AR_PHY_FIND_SIG_FIRSTEP[rip]
	mov	ecx, eax
	mov	r15d, eax
	call	REG_RMW_FIELD@PLT
	mov	rdx, QWORD PTR firstep_table[rip]
	mov	rcx, QWORD PTR ATH9K_ANI_FIRSTEP_LVL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR AR_PHY_FIND_SIG_LOW[rip]
	mov	eax, DWORD PTR [rdx+r13*4]
	sub	eax, DWORD PTR [rdx+rcx*4]
	add	eax, DWORD PTR 52[rbx]
	cmp	DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MIN[rip], eax
	cmovge	eax, DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MIN[rip]
	cmp	DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MAX[rip], eax
	cmovle	eax, DWORD PTR ATH9K_SIG_FIRSTEP_SETTING_MAX[rip]
	mov	edx, DWORD PTR AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW[rip]
	mov	ecx, eax
	mov	r12d, eax
	call	REG_RMW_FIELD@PLT
	mov	r8, QWORD PTR 16[rbx]
	cmp	r8, r13
	je	.L49
	mov	eax, DWORD PTR 48[rbx]
	sub	rsp, 8
	.cfi_def_cfa_offset 72
	movsx	rcx, DWORD PTR [rbx]
	mov	r9, r13
	mov	esi, DWORD PTR ANI[rip]
	lea	rdx, .LC4[rip]
	mov	rdi, r14
	push	rax
	.cfi_def_cfa_offset 80
	xor	eax, eax
	push	r15
	.cfi_def_cfa_offset 88
	push	QWORD PTR ATH9K_ANI_FIRSTEP_LVL[rip]
	.cfi_def_cfa_offset 96
	call	ath_dbg@PLT
	mov	eax, DWORD PTR 52[rbx]
	add	rsp, 24
	.cfi_def_cfa_offset 72
	mov	r8, QWORD PTR 16[rbx]
	movsx	rcx, DWORD PTR [rbx]
	mov	esi, DWORD PTR ANI[rip]
	mov	r9, r13
	mov	rdi, r14
	push	rax
	.cfi_def_cfa_offset 80
	lea	rdx, .LC5[rip]
	xor	eax, eax
	push	r12
	.cfi_def_cfa_offset 88
	push	QWORD PTR ATH9K_ANI_FIRSTEP_LVL[rip]
	.cfi_def_cfa_offset 96
	call	ath_dbg@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 64
	cmp	QWORD PTR 16[rbx], r13
	jb	.L56
	jbe	.L19
	add	DWORD PTR 20[rbp], 1
.L19:
	mov	QWORD PTR 16[rbx], r13
.L49:
	mov	r15d, DWORD PTR 32[rbx]
	mov	r9, QWORD PTR 8[rbx]
	mov	r12, QWORD PTR 24[rbx]
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rdi, QWORD PTR cycpwrThr1_table[rip]
	call	ARRAY_SIZE@PLT
	cmp	rax, r12
	jbe	.L57
	mov	rdx, QWORD PTR cycpwrThr1_table[rip]
	mov	rcx, QWORD PTR ATH9K_ANI_SPUR_IMMUNE_LVL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR AR_PHY_TIMING5[rip]
	mov	eax, DWORD PTR [rdx+r12*4]
	sub	eax, DWORD PTR [rdx+rcx*4]
	add	eax, DWORD PTR 56[rbx]
	cmp	DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MIN[rip], eax
	cmovge	eax, DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MIN[rip]
	cmp	DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MAX[rip], eax
	cmovle	eax, DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MAX[rip]
	mov	edx, DWORD PTR AR_PHY_TIMING5_CYCPWR_THR1[rip]
	mov	ecx, eax
	mov	r15d, eax
	call	REG_RMW_FIELD@PLT
	mov	rdx, QWORD PTR cycpwrThr1_table[rip]
	mov	rcx, QWORD PTR ATH9K_ANI_SPUR_IMMUNE_LVL[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR AR_PHY_EXT_CCA[rip]
	mov	eax, DWORD PTR [rdx+r12*4]
	sub	eax, DWORD PTR [rdx+rcx*4]
	add	eax, DWORD PTR 60[rbx]
	cmp	DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MIN[rip], eax
	cmovge	eax, DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MIN[rip]
	cmp	DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MAX[rip], eax
	cmovle	eax, DWORD PTR ATH9K_SIG_SPUR_IMM_SETTING_MAX[rip]
	mov	edx, DWORD PTR AR_PHY_EXT_CYCPWR_THR1[rip]
	mov	ecx, eax
	mov	r13d, eax
	call	REG_RMW_FIELD@PLT
	mov	r8, QWORD PTR 24[rbx]
	cmp	r8, r12
	je	.L50
	mov	eax, DWORD PTR 56[rbx]
	sub	rsp, 8
	.cfi_def_cfa_offset 72
	movsx	rcx, DWORD PTR [rbx]
	mov	r9, r12
	mov	esi, DWORD PTR ANI[rip]
	lea	rdx, .LC7[rip]
	mov	rdi, r14
	push	rax
	.cfi_def_cfa_offset 80
	xor	eax, eax
	push	r15
	.cfi_def_cfa_offset 88
	push	QWORD PTR ATH9K_ANI_SPUR_IMMUNE_LVL[rip]
	.cfi_def_cfa_offset 96
	call	ath_dbg@PLT
	mov	eax, DWORD PTR 60[rbx]
	add	rsp, 24
	.cfi_def_cfa_offset 72
	mov	r8, QWORD PTR 24[rbx]
	movsx	rcx, DWORD PTR [rbx]
	mov	esi, DWORD PTR ANI[rip]
	mov	r9, r12
	mov	rdi, r14
	push	rax
	.cfi_def_cfa_offset 80
	lea	rdx, .LC8[rip]
	xor	eax, eax
	push	r13
	.cfi_def_cfa_offset 88
	push	QWORD PTR ATH9K_ANI_SPUR_IMMUNE_LVL[rip]
	.cfi_def_cfa_offset 96
	call	ath_dbg@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 64
	cmp	QWORD PTR 24[rbx], r12
	jb	.L58
	jbe	.L23
	add	DWORD PTR 12[rbp], 1
.L23:
	mov	QWORD PTR 24[rbx], r12
.L50:
	mov	r15d, DWORD PTR 32[rbx]
	mov	r13, QWORD PTR 16[rbx]
	mov	r9, QWORD PTR 8[rbx]
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L6:
	mov	edx, DWORD PTR AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW[rip]
	mov	esi, DWORD PTR AR_PHY_SFCORR_LOW[rip]
	mov	rdi, rbp
	test	r12d, r12d
	je	.L9
	call	REG_SET_BIT@PLT
	mov	rax, QWORD PTR 8[rbx]
	cmp	rax, 1
	je	.L59
	movsx	rcx, DWORD PTR [rbx]
	mov	esi, DWORD PTR ANI[rip]
	test	rax, rax
	jne	.L31
	lea	r9, .LC1[rip]
	lea	r8, .LC0[rip]
	mov	rdi, r14
	xor	eax, eax
	lea	rdx, .LC2[rip]
	call	ath_dbg@PLT
.L30:
	add	DWORD PTR 32[rbp], 1
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L7:
	mov	r15d, DWORD PTR 32[rbx]
.L51:
	mov	r13, QWORD PTR 16[rbx]
	mov	r9, QWORD PTR 8[rbx]
	mov	r12, QWORD PTR 24[rbx]
.L14:
	lea	r8, .LC1[rip]
	test	r15d, r15d
	mov	edi, DWORD PTR 36[rbx]
	mov	esi, DWORD PTR 40[rbx]
	lea	rax, .LC0[rip]
	mov	rdx, r8
	mov	ecx, DWORD PTR 44[rbx]
	cmove	rdx, rax
	test	r9, r9
	cmove	r8, rax
.L29:
	push	rdi
	.cfi_def_cfa_offset 72
	mov	r9, r13
	mov	rdi, r14
	xor	eax, eax
	push	rsi
	.cfi_def_cfa_offset 80
	mov	esi, DWORD PTR ANI[rip]
	push	rcx
	.cfi_def_cfa_offset 88
	mov	rcx, r12
	push	rdx
	.cfi_def_cfa_offset 96
	lea	rdx, .LC10[rip]
	call	ath_dbg@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 64
	mov	eax, 1
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
.L2:
	.cfi_restore_state
	mov	esi, DWORD PTR ANI[rip]
	mov	ecx, r13d
	mov	rdi, r14
	xor	eax, eax
	lea	rdx, .LC9[rip]
	call	ath_dbg@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	call	REG_CLR_BIT@PLT
	cmp	QWORD PTR 8[rbx], 0
	je	.L12
	movsx	rcx, DWORD PTR [rbx]
	mov	esi, DWORD PTR ANI[rip]
	mov	rdi, r14
	xor	eax, eax
	lea	r9, .LC0[rip]
	lea	r8, .LC1[rip]
	lea	rdx, .LC2[rip]
	call	ath_dbg@PLT
	add	DWORD PTR 28[rbp], 1
.L13:
	xor	r9d, r9d
	test	r12d, r12d
	mov	r15d, DWORD PTR 32[rbx]
	mov	r13, QWORD PTR 16[rbx]
	setne	r9b
	mov	r12, QWORD PTR 24[rbx]
	mov	QWORD PTR 8[rbx], r9
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L55:
	mov	rdi, QWORD PTR firstep_table[rip]
	call	ARRAY_SIZE@PLT
	mov	rcx, r13
	lea	rdx, .LC3[rip]
	mov	r8, rax
.L52:
	mov	esi, DWORD PTR ANI[rip]
	mov	rdi, r14
	xor	eax, eax
	call	ath_dbg@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xor	eax, eax
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L57:
	.cfi_restore_state
	mov	rdi, QWORD PTR cycpwrThr1_table[rip]
	call	ARRAY_SIZE@PLT
	mov	rcx, r12
	lea	rdx, .LC6[rip]
	mov	r8, rax
	jmp	.L52
	.p2align 4,,10
	.p2align 3
.L54:
	test	eax, eax
	jne	.L37
	lea	r9, .LC0[rip]
	lea	rdx, .LC11[rip]
	mov	rdi, r14
	xor	eax, eax
	mov	r8, r9
	call	ath_dbg@PLT
.L36:
	add	DWORD PTR 4[rbp], 1
.L27:
	mov	r13, QWORD PTR 16[rbx]
	mov	r9, QWORD PTR 8[rbx]
	mov	DWORD PTR 32[rbx], r15d
	mov	r12, QWORD PTR 24[rbx]
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L37:
	lea	r9, .LC0[rip]
	lea	r8, .LC1[rip]
	mov	rdi, r14
	xor	eax, eax
	lea	rdx, .LC11[rip]
	call	ath_dbg@PLT
	jmp	.L36
	.p2align 4,,10
	.p2align 3
.L31:
	lea	r9, .LC1[rip]
	lea	rdx, .LC2[rip]
	mov	rdi, r14
	xor	eax, eax
	mov	r8, r9
	call	ath_dbg@PLT
	jmp	.L30
	.p2align 4,,10
	.p2align 3
.L34:
	lea	r9, .LC1[rip]
	lea	rdx, .LC11[rip]
	mov	rdi, r14
	xor	eax, eax
	mov	r8, r9
	call	ath_dbg@PLT
	jmp	.L33
	.p2align 4,,10
	.p2align 3
.L56:
	add	DWORD PTR 24[rbp], 1
	jmp	.L19
	.p2align 4,,10
	.p2align 3
.L58:
	add	DWORD PTR 16[rbp], 1
	jmp	.L23
	.p2align 4,,10
	.p2align 3
.L12:
	mov	eax, DWORD PTR 32[rbx]
	lea	rdx, .LC0[rip]
	mov	edi, DWORD PTR 36[rbx]
	mov	r8, rdx
	mov	esi, DWORD PTR 40[rbx]
	mov	ecx, DWORD PTR 44[rbx]
	test	eax, eax
	lea	rax, .LC1[rip]
	mov	r13, QWORD PTR 16[rbx]
	mov	r12, QWORD PTR 24[rbx]
	cmovne	rdx, rax
	jmp	.L29
	.p2align 4,,10
	.p2align 3
.L59:
	mov	r9d, DWORD PTR 32[rbx]
	lea	rdx, .LC1[rip]
	lea	rax, .LC0[rip]
	mov	edi, DWORD PTR 36[rbx]
	mov	r8, rdx
	mov	esi, DWORD PTR 40[rbx]
	mov	ecx, DWORD PTR 44[rbx]
	test	r9d, r9d
	mov	r13, QWORD PTR 16[rbx]
	mov	r12, QWORD PTR 24[rbx]
	cmove	rdx, rax
	jmp	.L29
	.cfi_endproc
.LFE0:
	.size	ar9003_hw_ani_control, .-ar9003_hw_ani_control
	.comm	firstep_table,8,8
	.comm	cycpwrThr1_table,8,8
	.comm	ATH9K_SIG_SPUR_IMM_SETTING_MIN,4,4
	.comm	ATH9K_SIG_SPUR_IMM_SETTING_MAX,4,4
	.comm	ATH9K_SIG_FIRSTEP_SETTING_MIN,4,4
	.comm	ATH9K_SIG_FIRSTEP_SETTING_MAX,4,4
	.comm	ATH9K_ANI_SPUR_IMMUNE_LVL,8,8
	.comm	ATH9K_ANI_FIRSTEP_LVL,8,8
	.comm	AR_PHY_TIMING5_CYCPWR_THR1,4,4
	.comm	AR_PHY_TIMING5,4,4
	.comm	AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW,4,4
	.comm	AR_PHY_SFCORR_LOW,4,4
	.comm	AR_PHY_MRC_CCK_MUX_REG,4,4
	.comm	AR_PHY_MRC_CCK_ENABLE,4,4
	.comm	AR_PHY_MRC_CCK_CTRL,4,4
	.comm	AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW,4,4
	.comm	AR_PHY_FIND_SIG_LOW,4,4
	.comm	AR_PHY_FIND_SIG_FIRSTEP,4,4
	.comm	AR_PHY_FIND_SIG,4,4
	.comm	AR_PHY_EXT_CYCPWR_THR1,4,4
	.comm	AR_PHY_EXT_CCA,4,4
	.comm	ANI,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ar9003_phy.c_ar9003_hw_ani_control.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"on\000"
	.align	2
.LC1:
	.ascii	"off\000"
	.align	2
.LC2:
	.ascii	"ATH9K_ANI_FIRSTEP_LEVEL: level out of range (%u > %"
	.ascii	"zu)\012\000"
	.align	2
.LC3:
	.ascii	"** ch %d: level %d=>%d[def:%d] firstep[level]=%d in"
	.ascii	"i=%d\012\000"
	.align	2
.LC4:
	.ascii	"** ch %d: level %d=>%d[def:%d] firstep_low[level]=%"
	.ascii	"d ini=%d\012\000"
	.align	2
.LC5:
	.ascii	"ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level out of range ("
	.ascii	"%u > %zu)\012\000"
	.align	2
.LC6:
	.ascii	"** ch %d: level %d=>%d[def:%d] cycpwrThr1[level]=%d"
	.ascii	" ini=%d\012\000"
	.align	2
.LC7:
	.ascii	"** ch %d: level %d=>%d[def:%d] cycpwrThr1Ext[level]"
	.ascii	"=%d ini=%d\012\000"
	.align	2
.LC8:
	.ascii	"invalid cmd %u\012\000"
	.align	2
.LC9:
	.ascii	"ANI parameters: SI=%d, ofdmWS=%s FS=%d MRCcck=%s li"
	.ascii	"stenTime=%d ofdmErrs=%d cckErrs=%d\012\000"
	.align	2
.LC10:
	.ascii	"** ch %d: ofdm weak signal: %s=>%s\012\000"
	.align	2
.LC11:
	.ascii	"** ch %d: MRC CCK: %s=>%s\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ar9003_hw_ani_control, %function
ar9003_hw_ani_control:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r5, r0
	mov	r8, r1
	sub	sp, sp, #36
	mov	r6, r2
	bl	ath9k_hw_common
	ldr	r2, [r5]
	mov	r7, r0
	and	r2, r2, r8
	sub	r2, r2, #128
	ldr	r4, [r5, #36]
	cmp	r2, #4
	ldrls	pc, [pc, r2, asl #2]
	b	.L2
.L4:
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L5
	.word	.L3
.L3:
	ldr	r8, .L49
	mov	fp, r6
	ldr	r0, [r8]
	bl	ARRAY_SIZE
	cmp	r0, r6
	bls	.L42
	ldr	r9, .L49+4
	ldr	r2, [r8]
	ldr	r1, [r9]
	ldr	r3, [r2, r6, lsl #2]
	ldr	r10, .L49+8
	ldr	r2, [r2, r1, lsl #2]
	ldr	r1, [r4, #32]
	sub	r3, r3, r2
	ldr	r2, [r10]
	add	r3, r3, r1
	cmp	r3, r2
	movlt	r3, r2
	ldr	r2, .L49+12
	ldr	r0, .L49+16
	ldr	r2, [r2]
	ldr	r1, .L49+20
	cmp	r3, r2
	movge	r3, r2
	ldr	r1, [r1]
	ldr	r2, [r0]
	mov	r0, r5
	str	r3, [sp, #28]
	bl	REG_RMW_FIELD
	ldr	r3, [r8]
	ldr	r2, [r9]
	ldr	r8, [r3, r6, lsl #2]
	ldr	r1, [r3, r2, lsl #2]
	ldr	r2, [r4, #36]
	ldr	r3, [r10]
	sub	r8, r8, r1
	add	r8, r8, r2
	cmp	r8, r3
	movlt	r8, r3
	ldr	r2, .L49+12
	ldr	r1, .L49+24
	ldr	r3, [r2]
	ldr	r2, .L49+28
	cmp	r8, r3
	movge	r8, r3
	ldr	r2, [r2]
	mov	r3, r8
	mov	r0, r5
	ldr	r1, [r1]
	bl	REG_RMW_FIELD
	ldr	r2, [r4, #8]
	cmp	r2, r6
	bne	.L18
	ldr	r3, .L49+32
	ldr	r10, [r4, #12]
	ldr	r1, [r3]
	ldr	r8, [r4, #4]
	ldr	r9, [r4, #16]
.L12:
	ldr	r3, .L49+36
	ldr	r2, .L49+40
	cmp	r8, #0
	movne	r8, r3
	moveq	r8, r2
	cmp	r9, #0
	movne	r9, r3
	moveq	r9, r2
	ldr	r0, [r4, #20]
	mov	r3, r10
	str	r0, [sp, #20]
	ldr	r2, [r4, #24]
	mov	r0, r7
	str	r2, [sp, #16]
	ldr	r2, [r4, #28]
	stm	sp, {r8, fp}
	str	r2, [sp, #12]
	str	r9, [sp, #8]
	ldr	r2, .L49+44
	bl	ath_dbg
	mov	r0, #1
.L1:
	add	sp, sp, #36
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
	ldr	r8, .L49+48
	mov	r10, r6
	ldr	r0, [r8]
	bl	ARRAY_SIZE
	cmp	r0, r6
	bls	.L43
	ldr	r9, .L49+52
	ldr	r2, [r8]
	ldr	r1, [r9]
	ldr	r3, [r2, r6, lsl #2]
	ldr	fp, .L49+56
	ldr	r2, [r2, r1, lsl #2]
	ldr	r1, [r4, #40]
	sub	r3, r3, r2
	ldr	r2, [fp]
	add	r3, r3, r1
	cmp	r3, r2
	movlt	r3, r2
	ldr	r2, .L49+60
	ldr	r0, .L49+64
	ldr	r2, [r2]
	ldr	r1, .L49+68
	cmp	r3, r2
	movge	r3, r2
	ldr	r1, [r1]
	ldr	r2, [r0]
	mov	r0, r5
	str	r3, [sp, #28]
	bl	REG_RMW_FIELD
	ldr	r3, [r8]
	ldr	r2, [r9]
	ldr	r8, [r3, r6, lsl #2]
	ldr	r1, [r3, r2, lsl #2]
	ldr	r2, [r4, #44]
	ldr	r3, [fp]
	sub	r8, r8, r1
	add	r8, r8, r2
	cmp	r8, r3
	movlt	r8, r3
	ldr	r2, .L49+60
	ldr	r1, .L49+72
	ldr	r3, [r2]
	ldr	r2, .L49+76
	cmp	r8, r3
	movge	r8, r3
	ldr	r2, [r2]
	mov	r3, r8
	mov	r0, r5
	ldr	r1, [r1]
	bl	REG_RMW_FIELD
	ldr	r2, [r4, #12]
	cmp	r2, r6
	bne	.L22
	ldr	r3, .L49+32
	ldr	r8, [r4, #4]
	ldr	r1, [r3]
	ldr	fp, [r4, #8]
	ldr	r9, [r4, #16]
	b	.L12
.L6:
	ldr	r2, .L49+80
	ldr	r3, .L49+84
	cmp	r6, #0
	ldr	r1, [r2]
	mov	r0, r5
	movne	r8, #1
	moveq	r8, #0
	ldr	r2, [r3]
	beq	.L9
	bl	REG_SET_BIT
.L10:
	ldr	r2, [r4, #4]
	ldr	r3, .L49+32
	cmp	r2, r8
	ldr	r1, [r3]
	str	r3, [sp, #24]
	beq	.L40
	ldr	ip, .L49+36
	ldr	r0, .L49+40
	cmp	r2, #0
	movne	r2, ip
	moveq	r2, r0
	cmp	r6, #0
	ldr	r3, [r4]
	beq	.L44
	stm	sp, {r2, ip}
	mov	r0, r7
	ldr	r2, .L49+88
	bl	ath_dbg
	ldr	r3, [r5, #32]
	add	r3, r3, #1
	str	r3, [r5, #32]
.L31:
	ldr	r3, [sp, #24]
	str	r8, [r4, #4]
	ldr	r1, [r3]
.L40:
	ldr	r10, [r4, #12]
	ldr	fp, [r4, #8]
	ldr	r9, [r4, #16]
	b	.L12
.L5:
	subs	r9, r6, #0
	movne	r9, #1
	ldr	r8, .L49+92
	ldr	r2, .L49+96
	mov	r3, r9
	ldr	r2, [r2]
	ldr	r1, [r8]
	mov	r0, r5
	bl	REG_RMW_FIELD
	ldr	r2, .L49+100
	mov	r3, r9
	mov	r0, r5
	ldr	r1, [r8]
	ldr	r2, [r2]
	bl	REG_RMW_FIELD
	ldr	r3, [r4, #16]
	cmp	r3, r9
	beq	.L45
	ldr	ip, .L49+36
	ldr	r0, .L49+40
	cmp	r3, #0
	ldr	r1, .L49+32
	movne	r2, ip
	moveq	r2, r0
	cmp	r6, #0
	str	r1, [sp, #24]
	ldr	r3, [r4]
	ldr	r1, [r1]
	beq	.L46
	stm	sp, {r2, ip}
	mov	r0, r7
	ldr	r2, .L49+104
	bl	ath_dbg
	ldr	r3, [r5, #8]
	add	r3, r3, #1
	str	r3, [r5, #8]
.L32:
	ldr	r3, [sp, #24]
	ldr	r10, [r4, #12]
	ldr	r1, [r3]
	str	r9, [r4, #16]
	ldmib	r4, {r8, fp}
	b	.L12
.L7:
	ldr	r3, .L49+32
	ldr	r10, [r4, #12]
	ldr	r1, [r3]
	ldr	r9, [r4, #16]
	ldmib	r4, {r8, fp}
	b	.L12
.L9:
	bl	REG_CLR_BIT
	b	.L10
.L45:
	ldr	r3, .L49+32
	ldr	r10, [r4, #12]
	ldr	r1, [r3]
	ldmib	r4, {r8, fp}
	b	.L12
.L42:
	ldr	r3, .L49+32
	ldr	r0, [r8]
	ldr	r4, [r3]
	bl	ARRAY_SIZE
	mov	r1, r4
	str	r0, [sp]
	mov	r3, r6
	mov	r0, r7
	ldr	r2, .L49+108
	bl	ath_dbg
	mov	r0, #0
	b	.L1
.L43:
	ldr	r3, .L49+32
	ldr	r0, [r8]
	ldr	r4, [r3]
	bl	ARRAY_SIZE
	mov	r1, r4
	str	r0, [sp]
	mov	r3, r6
	mov	r0, r7
	ldr	r2, .L49+112
	bl	ath_dbg
	mov	r0, #0
	b	.L1
.L44:
	str	r0, [sp, #4]
	str	r2, [sp]
	mov	r0, r7
	ldr	r2, .L49+88
	bl	ath_dbg
	ldr	r3, [r5, #28]
	add	r3, r3, #1
	str	r3, [r5, #28]
	b	.L31
.L46:
	str	r0, [sp, #4]
	str	r2, [sp]
	mov	r0, r7
	ldr	r2, .L49+104
	bl	ath_dbg
	ldr	r3, [r5, #4]
	add	r3, r3, #1
	str	r3, [r5, #4]
	b	.L32
.L18:
	ldr	ip, [r4, #32]
	ldr	r10, .L49+32
	ldr	r3, [r4]
	ldr	r0, [r9]
	ldr	r1, [r10]
	str	ip, [sp, #16]
	ldr	ip, [sp, #28]
	stm	sp, {r2, r6}
	str	ip, [sp, #12]
	ldr	r2, .L49+116
	str	r0, [sp, #8]
	mov	r0, r7
	str	r10, [sp, #24]
	bl	ath_dbg
	ldr	r1, [r9]
	ldr	r2, [r4, #36]
	ldr	r3, [r4]
	str	r1, [sp, #8]
	str	r2, [sp, #16]
	str	r8, [sp, #12]
	str	r6, [sp, #4]
	ldr	r2, [r4, #8]
	mov	r0, r7
	str	r2, [sp]
	ldr	r1, [r10]
	ldr	r2, .L49+120
	bl	ath_dbg
	ldr	r3, [r4, #8]
	cmp	r3, r6
	bcc	.L47
	ldrhi	r3, [r5, #20]
	addhi	r3, r3, #1
	strhi	r3, [r5, #20]
.L20:
	ldr	r3, [sp, #24]
	ldr	r10, [r4, #12]
	ldr	r1, [r3]
	ldr	r8, [r4, #4]
	ldr	r9, [r4, #16]
	str	r6, [r4, #8]
	b	.L12
.L22:
	ldr	ip, [r4, #40]
	ldr	fp, .L49+32
	ldr	r3, [r4]
	ldr	r0, [r9]
	ldr	r1, [fp]
	str	ip, [sp, #16]
	ldr	ip, [sp, #28]
	stm	sp, {r2, r6}
	str	ip, [sp, #12]
	ldr	r2, .L49+124
	str	r0, [sp, #8]
	mov	r0, r7
	str	fp, [sp, #24]
	bl	ath_dbg
	ldr	r1, [r9]
	ldr	r2, [r4, #44]
	ldr	r3, [r4]
	str	r1, [sp, #8]
	str	r2, [sp, #16]
	str	r8, [sp, #12]
	str	r6, [sp, #4]
	ldr	r2, [r4, #12]
	mov	r0, r7
	str	r2, [sp]
	ldr	r1, [fp]
	ldr	r2, .L49+128
	bl	ath_dbg
	ldr	r3, [r4, #12]
	cmp	r3, r6
	bcc	.L48
	ldrhi	r3, [r5, #12]
	addhi	r3, r3, #1
	strhi	r3, [r5, #12]
.L24:
	ldr	r3, [sp, #24]
	ldr	r9, [r4, #16]
	ldr	r1, [r3]
	str	r6, [r4, #12]
	ldmib	r4, {r8, fp}
	b	.L12
.L48:
	ldr	r3, [r5, #16]
	add	r3, r3, #1
	str	r3, [r5, #16]
	b	.L24
.L47:
	ldr	r3, [r5, #24]
	add	r3, r3, #1
	str	r3, [r5, #24]
	b	.L20
.L2:
	ldr	r2, .L49+32
	mov	r3, r8
	ldr	r1, [r2]
	ldr	r2, .L49+132
	bl	ath_dbg
	mov	r0, #0
	b	.L1
.L50:
	.align	2
.L49:
	.word	firstep_table
	.word	ATH9K_ANI_FIRSTEP_LVL
	.word	ATH9K_SIG_FIRSTEP_SETTING_MIN
	.word	ATH9K_SIG_FIRSTEP_SETTING_MAX
	.word	AR_PHY_FIND_SIG_FIRSTEP
	.word	AR_PHY_FIND_SIG
	.word	AR_PHY_FIND_SIG_LOW
	.word	AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW
	.word	ANI
	.word	.LC0
	.word	.LC1
	.word	.LC9
	.word	cycpwrThr1_table
	.word	ATH9K_ANI_SPUR_IMMUNE_LVL
	.word	ATH9K_SIG_SPUR_IMM_SETTING_MIN
	.word	ATH9K_SIG_SPUR_IMM_SETTING_MAX
	.word	AR_PHY_TIMING5_CYCPWR_THR1
	.word	AR_PHY_TIMING5
	.word	AR_PHY_EXT_CCA
	.word	AR_PHY_EXT_CYCPWR_THR1
	.word	AR_PHY_SFCORR_LOW
	.word	AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW
	.word	.LC10
	.word	AR_PHY_MRC_CCK_CTRL
	.word	AR_PHY_MRC_CCK_ENABLE
	.word	AR_PHY_MRC_CCK_MUX_REG
	.word	.LC11
	.word	.LC2
	.word	.LC5
	.word	.LC3
	.word	.LC4
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.size	ar9003_hw_ani_control, .-ar9003_hw_ani_control
	.comm	firstep_table,4,4
	.comm	cycpwrThr1_table,4,4
	.comm	ATH9K_SIG_SPUR_IMM_SETTING_MIN,4,4
	.comm	ATH9K_SIG_SPUR_IMM_SETTING_MAX,4,4
	.comm	ATH9K_SIG_FIRSTEP_SETTING_MIN,4,4
	.comm	ATH9K_SIG_FIRSTEP_SETTING_MAX,4,4
	.comm	ATH9K_ANI_SPUR_IMMUNE_LVL,4,4
	.comm	ATH9K_ANI_FIRSTEP_LVL,4,4
	.comm	AR_PHY_TIMING5_CYCPWR_THR1,4,4
	.comm	AR_PHY_TIMING5,4,4
	.comm	AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW,4,4
	.comm	AR_PHY_SFCORR_LOW,4,4
	.comm	AR_PHY_MRC_CCK_MUX_REG,4,4
	.comm	AR_PHY_MRC_CCK_ENABLE,4,4
	.comm	AR_PHY_MRC_CCK_CTRL,4,4
	.comm	AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW,4,4
	.comm	AR_PHY_FIND_SIG_LOW,4,4
	.comm	AR_PHY_FIND_SIG_FIRSTEP,4,4
	.comm	AR_PHY_FIND_SIG,4,4
	.comm	AR_PHY_EXT_CYCPWR_THR1,4,4
	.comm	AR_PHY_EXT_CCA,4,4
	.comm	ANI,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
