	.file	"extr_chipsfb.c_chips_hw_init.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	chips_hw_init, @function
chips_hw_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xor	ebx, ebx
	jmp	.L2
	.p2align 4,,10
	.p2align 3
.L3:
	mov	rax, QWORD PTR chips_init_xr[rip]
	lea	rax, [rax+rbx*8]
	add	rbx, 1
	mov	edi, DWORD PTR 4[rax]
	mov	esi, DWORD PTR [rax]
	call	write_xr@PLT
.L2:
	mov	rdi, QWORD PTR chips_init_xr[rip]
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L3
	mov	esi, 962
	mov	edi, 41
	xor	ebx, ebx
	call	outb@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rax, QWORD PTR chips_init_sr[rip]
	lea	rax, [rax+rbx*8]
	add	rbx, 1
	mov	edi, DWORD PTR 4[rax]
	mov	esi, DWORD PTR [rax]
	call	write_sr@PLT
.L4:
	mov	rdi, QWORD PTR chips_init_sr[rip]
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L5
	xor	ebx, ebx
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L7:
	mov	rax, QWORD PTR chips_init_gr[rip]
	lea	rax, [rax+rbx*8]
	add	rbx, 1
	mov	edi, DWORD PTR 4[rax]
	mov	esi, DWORD PTR [rax]
	call	write_gr@PLT
.L6:
	mov	rdi, QWORD PTR chips_init_gr[rip]
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L7
	xor	ebx, ebx
	jmp	.L8
	.p2align 4,,10
	.p2align 3
.L9:
	mov	rax, QWORD PTR chips_init_ar[rip]
	lea	rax, [rax+rbx*8]
	add	rbx, 1
	mov	edi, DWORD PTR 4[rax]
	mov	esi, DWORD PTR [rax]
	call	write_ar@PLT
.L8:
	mov	rdi, QWORD PTR chips_init_ar[rip]
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L9
	xor	ebx, ebx
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rax, QWORD PTR chips_init_cr[rip]
	lea	rax, [rax+rbx*8]
	add	rbx, 1
	mov	edi, DWORD PTR 4[rax]
	mov	esi, DWORD PTR [rax]
	call	write_cr@PLT
.L10:
	mov	rdi, QWORD PTR chips_init_cr[rip]
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L11
	xor	ebx, ebx
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L13:
	mov	rax, QWORD PTR chips_init_fr[rip]
	lea	rax, [rax+rbx*8]
	add	rbx, 1
	mov	edi, DWORD PTR 4[rax]
	mov	esi, DWORD PTR [rax]
	call	write_fr@PLT
.L12:
	mov	rdi, QWORD PTR chips_init_fr[rip]
	call	ARRAY_SIZE@PLT
	cmp	eax, ebx
	jg	.L13
	pop	rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	chips_hw_init, .-chips_hw_init
	.comm	chips_init_xr,8,8
	.comm	chips_init_sr,8,8
	.comm	chips_init_gr,8,8
	.comm	chips_init_fr,8,8
	.comm	chips_init_cr,8,8
	.comm	chips_init_ar,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_chipsfb.c_chips_hw_init.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	chips_hw_init, %function
chips_hw_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r4, #0
	ldr	r5, .L17
	b	.L2
.L3:
	ldr	r3, [r5]
	add	r2, r3, r4, lsl #3
	ldr	r1, [r3, r4, lsl #3]
	ldr	r0, [r2, #4]
	bl	write_xr
	add	r4, r4, #1
.L2:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	cmp	r0, r4
	bgt	.L3
	mov	r0, #41
	ldr	r1, .L17+4
	bl	outb
	mov	r4, #0
	ldr	r5, .L17+8
	b	.L4
.L5:
	ldr	r3, [r5]
	add	r2, r3, r4, lsl #3
	ldr	r1, [r3, r4, lsl #3]
	ldr	r0, [r2, #4]
	bl	write_sr
	add	r4, r4, #1
.L4:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	cmp	r0, r4
	bgt	.L5
	mov	r4, #0
	ldr	r5, .L17+12
	b	.L6
.L7:
	ldr	r3, [r5]
	add	r2, r3, r4, lsl #3
	ldr	r1, [r3, r4, lsl #3]
	ldr	r0, [r2, #4]
	bl	write_gr
	add	r4, r4, #1
.L6:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	cmp	r0, r4
	bgt	.L7
	mov	r4, #0
	ldr	r5, .L17+16
	b	.L8
.L9:
	ldr	r3, [r5]
	add	r2, r3, r4, lsl #3
	ldr	r1, [r3, r4, lsl #3]
	ldr	r0, [r2, #4]
	bl	write_ar
	add	r4, r4, #1
.L8:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	cmp	r0, r4
	bgt	.L9
	mov	r4, #0
	ldr	r5, .L17+20
	b	.L10
.L11:
	ldr	r3, [r5]
	add	r2, r3, r4, lsl #3
	ldr	r1, [r3, r4, lsl #3]
	ldr	r0, [r2, #4]
	bl	write_cr
	add	r4, r4, #1
.L10:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	cmp	r0, r4
	bgt	.L11
	mov	r4, #0
	ldr	r5, .L17+24
.L12:
	ldr	r0, [r5]
	bl	ARRAY_SIZE
	cmp	r0, r4
	pople	{r4, r5, r6, pc}
	ldr	r3, [r5]
	add	r2, r3, r4, lsl #3
	ldr	r1, [r3, r4, lsl #3]
	ldr	r0, [r2, #4]
	bl	write_fr
	add	r4, r4, #1
	b	.L12
.L18:
	.align	2
.L17:
	.word	chips_init_xr
	.word	962
	.word	chips_init_sr
	.word	chips_init_gr
	.word	chips_init_ar
	.word	chips_init_cr
	.word	chips_init_fr
	.size	chips_hw_init, .-chips_hw_init
	.comm	chips_init_xr,4,4
	.comm	chips_init_sr,4,4
	.comm	chips_init_gr,4,4
	.comm	chips_init_fr,4,4
	.comm	chips_init_cr,4,4
	.comm	chips_init_ar,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
