	.file	"extr_df_v1_7.c_df_v1_7_update_medium_grain_clock_gating.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	df_v1_7_update_medium_grain_clock_gating, @function
df_v1_7_update_medium_grain_clock_gating:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	ebx, esi
	mov	esi, 1
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	mov	rax, QWORD PTR 8[rdi]
	call	[QWORD PTR [rax]]
	mov	edx, DWORD PTR mmDF_PIE_AON0_DfGlobalClkGater[rip]
	mov	edi, DWORD PTR DF[rip]
	xor	esi, esi
	test	ebx, ebx
	je	.L3
	mov	eax, DWORD PTR 0[rbp]
	test	DWORD PTR AMD_CG_SUPPORT_DF_MGCG[rip], eax
	jne	.L11
.L3:
	call	RREG32_SOC15@PLT
	mov	r8d, eax
	mov	eax, DWORD PTR DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK[rip]
	not	eax
	and	eax, r8d
	or	eax, DWORD PTR DF_V1_7_MGCG_DISABLE[rip]
.L9:
	mov	edi, DWORD PTR DF[rip]
	mov	edx, DWORD PTR mmDF_PIE_AON0_DfGlobalClkGater[rip]
	xor	esi, esi
	mov	ecx, eax
	call	WREG32_SOC15@PLT
	mov	rax, QWORD PTR 8[rbp]
	mov	rdi, rbp
	xor	esi, esi
	mov	rax, QWORD PTR [rax]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	rax
	.p2align 4,,10
	.p2align 3
.L11:
	.cfi_restore_state
	call	RREG32_SOC15@PLT
	mov	r8d, eax
	mov	eax, DWORD PTR DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK[rip]
	not	eax
	and	eax, r8d
	or	eax, DWORD PTR DF_V1_7_MGCG_ENABLE_15_CYCLE_DELAY[rip]
	jmp	.L9
	.cfi_endproc
.LFE0:
	.size	df_v1_7_update_medium_grain_clock_gating, .-df_v1_7_update_medium_grain_clock_gating
	.comm	mmDF_PIE_AON0_DfGlobalClkGater,4,4
	.comm	DF_V1_7_MGCG_ENABLE_15_CYCLE_DELAY,4,4
	.comm	DF_V1_7_MGCG_DISABLE,4,4
	.comm	DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK,4,4
	.comm	DF,4,4
	.comm	AMD_CG_SUPPORT_DF_MGCG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_df_v1_7.c_df_v1_7_update_medium_grain_clock_gating.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	df_v1_7_update_medium_grain_clock_gating, %function
df_v1_7_update_medium_grain_clock_gating:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r5, r1
	ldr	r3, [r0, #4]
	mov	r1, #1
	ldr	r3, [r3]
	mov	r4, r0
	blx	r3
	cmp	r5, #0
	beq	.L2
	ldr	r3, .L12
	ldr	r2, [r4]
	ldr	r3, [r3]
	ldr	r5, .L12+4
	ldr	r6, .L12+8
	tst	r2, r3
	ldr	r0, [r5]
	ldr	r2, [r6]
	bne	.L11
.L3:
	mov	r1, #0
	bl	RREG32_SOC15
	ldr	r3, .L12+12
	ldr	r2, .L12+16
.L9:
	ldr	r3, [r3]
	ldr	r1, [r2]
	bic	r3, r0, r3
	orr	r3, r3, r1
	ldr	r2, [r6]
	mov	r1, #0
	ldr	r0, [r5]
	bl	WREG32_SOC15
	ldr	r3, [r4, #4]
	mov	r0, r4
	pop	{r4, r5, r6, lr}
	mov	r1, #0
	ldr	r3, [r3]
	bx	r3
.L11:
	mov	r1, #0
	bl	RREG32_SOC15
	ldr	r3, .L12+12
	ldr	r2, .L12+20
	b	.L9
.L2:
	ldr	r5, .L12+4
	ldr	r6, .L12+8
	ldr	r0, [r5]
	ldr	r2, [r6]
	b	.L3
.L13:
	.align	2
.L12:
	.word	AMD_CG_SUPPORT_DF_MGCG
	.word	DF
	.word	mmDF_PIE_AON0_DfGlobalClkGater
	.word	DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK
	.word	DF_V1_7_MGCG_DISABLE
	.word	DF_V1_7_MGCG_ENABLE_15_CYCLE_DELAY
	.size	df_v1_7_update_medium_grain_clock_gating, .-df_v1_7_update_medium_grain_clock_gating
	.comm	mmDF_PIE_AON0_DfGlobalClkGater,4,4
	.comm	DF_V1_7_MGCG_ENABLE_15_CYCLE_DELAY,4,4
	.comm	DF_V1_7_MGCG_DISABLE,4,4
	.comm	DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK,4,4
	.comm	DF,4,4
	.comm	AMD_CG_SUPPORT_DF_MGCG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
