	.file	"extr_ni_tio.c_ni_660x_set_gate.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	ni_660x_set_gate, @function
ni_660x_set_gate:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	r12, rdi
	mov	edi, esi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	CR_CHAN@PLT
	cmp	eax, 129
	je	.L2
	mov	ebp, eax
	jbe	.L23
	lea	eax, -130[rax]
	cmp	eax, 2
	ja	.L14
.L4:
	mov	esi, ebp
	and	esi, 31
.L6:
	mov	rdi, r12
	call	ni_tio_set_gate_raw@PLT
	xor	eax, eax
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L23:
	.cfi_restore_state
	cmp	eax, 128
	je	.L4
.L14:
	xor	ebx, ebx
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L7:
	add	ebx, 1
	cmp	DWORD PTR NI_660X_MAX_RTSI_CHAN[rip], ebx
	jb	.L21
.L9:
	mov	edi, ebx
	call	NI_GPCT_RTSI_GATE_SELECT@PLT
	cmp	eax, ebp
	jne	.L7
	mov	esi, ebp
	and	esi, 31
	cmp	DWORD PTR NI_660X_MAX_RTSI_CHAN[rip], ebx
	jnb	.L6
	.p2align 4,,10
	.p2align 3
.L21:
	xor	ebx, ebx
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L10:
	add	ebx, 1
	cmp	DWORD PTR NI_660X_MAX_GATE_PIN[rip], ebx
	jb	.L11
.L12:
	mov	edi, ebx
	call	NI_GPCT_GATE_PIN_GATE_SELECT@PLT
	cmp	eax, ebp
	jne	.L10
	mov	esi, ebp
	and	esi, 31
	cmp	DWORD PTR NI_660X_MAX_GATE_PIN[rip], ebx
	jnb	.L6
	.p2align 4,,10
	.p2align 3
.L11:
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L2:
	mov	esi, DWORD PTR NI_660X_NEXT_SRC_GATE_SEL[rip]
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	ni_660x_set_gate, .-ni_660x_set_gate
	.comm	NI_660X_NEXT_SRC_GATE_SEL,4,4
	.comm	NI_660X_MAX_RTSI_CHAN,4,4
	.comm	NI_660X_MAX_GATE_PIN,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ni_tio.c_ni_660x_set_gate.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ni_660x_set_gate, %function
ni_660x_set_gate:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r7, r0
	mov	r0, r1
	bl	CR_CHAN
	cmp	r0, #129
	beq	.L2
	mov	r5, r0
	bls	.L23
	sub	r3, r0, #130
	cmp	r3, #2
	bhi	.L14
.L4:
	and	r1, r5, #31
.L6:
	mov	r0, r7
	bl	ni_tio_set_gate_raw
	mov	r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L23:
	cmp	r0, #128
	beq	.L4
.L14:
	mov	r4, #0
	ldr	r6, .L24
	b	.L9
.L7:
	add	r4, r4, #1
	cmp	r3, r4
	bcc	.L21
.L9:
	mov	r0, r4
	bl	NI_GPCT_RTSI_GATE_SELECT
	cmp	r0, r5
	ldr	r3, [r6]
	bne	.L7
	cmp	r3, r4
	and	r1, r5, #31
	bcs	.L6
.L21:
	mov	r4, #0
	ldr	r6, .L24+4
	b	.L12
.L10:
	add	r4, r4, #1
	cmp	r3, r4
	bcc	.L11
.L12:
	mov	r0, r4
	bl	NI_GPCT_GATE_PIN_GATE_SELECT
	cmp	r0, r5
	ldr	r3, [r6]
	bne	.L10
	cmp	r3, r4
	and	r1, r5, #31
	bcs	.L6
.L11:
	ldr	r3, .L24+8
	ldr	r0, [r3]
	rsb	r0, r0, #0
	pop	{r4, r5, r6, r7, r8, pc}
.L2:
	ldr	r3, .L24+12
	ldr	r1, [r3]
	b	.L6
.L25:
	.align	2
.L24:
	.word	NI_660X_MAX_RTSI_CHAN
	.word	NI_660X_MAX_GATE_PIN
	.word	EINVAL
	.word	NI_660X_NEXT_SRC_GATE_SEL
	.size	ni_660x_set_gate, .-ni_660x_set_gate
	.comm	NI_660X_NEXT_SRC_GATE_SEL,4,4
	.comm	NI_660X_MAX_RTSI_CHAN,4,4
	.comm	NI_660X_MAX_GATE_PIN,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
