	.file	"extr_imx6_ssi.c_setup_ssi.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	setup_ssi, @function
setup_ssi:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	esi, DWORD PTR SSI_STCCR[rip]
	mov	rbp, rdi
	call	READ4@PLT
	mov	ecx, DWORD PTR WL3_WL0_S[rip]
	mov	edx, 11
	mov	rdi, rbp
	mov	r8d, eax
	mov	eax, DWORD PTR WL3_WL0_M[rip]
	mov	esi, DWORD PTR STCCR_DIV2[rip]
	sal	edx, cl
	or	esi, DWORD PTR STCCR_PSR[rip]
	sal	eax, cl
	mov	ecx, DWORD PTR DC4_DC0_S[rip]
	not	eax
	and	eax, r8d
	or	eax, edx
	mov	edx, DWORD PTR DC4_DC0_M[rip]
	sal	edx, cl
	not	edx
	and	edx, eax
	mov	eax, edx
	mov	edx, DWORD PTR PM7_PM0_M[rip]
	bts	eax, ecx
	mov	ecx, DWORD PTR PM7_PM0_S[rip]
	sal	edx, cl
	or	edx, esi
	mov	esi, DWORD PTR SSI_STCCR[rip]
	not	edx
	and	edx, eax
	bts	edx, ecx
	call	WRITE4@PLT
	mov	esi, DWORD PTR SSI_SFCSR[rip]
	mov	rdi, rbp
	call	READ4@PLT
	mov	ecx, DWORD PTR SFCSR_TFWM0_S[rip]
	mov	edx, 8
	mov	rdi, rbp
	mov	r8d, eax
	mov	eax, DWORD PTR SFCSR_TFWM0_M[rip]
	mov	esi, DWORD PTR SSI_SFCSR[rip]
	sal	edx, cl
	sal	eax, cl
	not	eax
	and	eax, r8d
	or	edx, eax
	call	WRITE4@PLT
	mov	esi, DWORD PTR SSI_STCR[rip]
	mov	rdi, rbp
	call	READ4@PLT
	or	eax, DWORD PTR STCR_TFEN0[rip]
	mov	esi, DWORD PTR SSI_STCR[rip]
	mov	rdi, rbp
	mov	edx, eax
	mov	eax, DWORD PTR STCR_TFEN1[rip]
	or	eax, DWORD PTR STCR_TSHFD[rip]
	not	eax
	and	eax, edx
	mov	edx, DWORD PTR STCR_TXBIT0[rip]
	or	edx, DWORD PTR STCR_TXDIR[rip]
	or	edx, DWORD PTR STCR_TFDIR[rip]
	or	edx, DWORD PTR STCR_TSCKP[rip]
	or	eax, edx
	mov	edx, DWORD PTR STCR_TFSI[rip]
	or	edx, DWORD PTR STCR_TFSL[rip]
	not	edx
	and	edx, eax
	or	edx, DWORD PTR STCR_TEFS[rip]
	call	WRITE4@PLT
	mov	esi, DWORD PTR SSI_SCR[rip]
	mov	rdi, rbp
	call	READ4@PLT
	mov	ecx, DWORD PTR SCR_I2S_MODE_S[rip]
	mov	edx, DWORD PTR SCR_I2S_MODE_M[rip]
	mov	rdi, rbp
	mov	esi, DWORD PTR SSI_SCR[rip]
	pop	rbp
	.cfi_def_cfa_offset 8
	sal	edx, cl
	not	edx
	and	eax, edx
	mov	edx, DWORD PTR SCR_SSIEN[rip]
	or	edx, DWORD PTR SCR_TE[rip]
	or	edx, DWORD PTR SCR_NET[rip]
	or	edx, DWORD PTR SCR_SYN[rip]
	or	edx, eax
	jmp	WRITE4@PLT
	.cfi_endproc
.LFE0:
	.size	setup_ssi, .-setup_ssi
	.comm	WL3_WL0_S,4,4
	.comm	WL3_WL0_M,4,4
	.comm	STCR_TXDIR,4,4
	.comm	STCR_TXBIT0,4,4
	.comm	STCR_TSHFD,4,4
	.comm	STCR_TSCKP,4,4
	.comm	STCR_TFSL,4,4
	.comm	STCR_TFSI,4,4
	.comm	STCR_TFEN1,4,4
	.comm	STCR_TFEN0,4,4
	.comm	STCR_TFDIR,4,4
	.comm	STCR_TEFS,4,4
	.comm	STCCR_PSR,4,4
	.comm	STCCR_DIV2,4,4
	.comm	SSI_STCR,4,4
	.comm	SSI_STCCR,4,4
	.comm	SSI_SFCSR,4,4
	.comm	SSI_SCR,4,4
	.comm	SFCSR_TFWM0_S,4,4
	.comm	SFCSR_TFWM0_M,4,4
	.comm	SCR_TE,4,4
	.comm	SCR_SYN,4,4
	.comm	SCR_SSIEN,4,4
	.comm	SCR_NET,4,4
	.comm	SCR_I2S_MODE_S,4,4
	.comm	SCR_I2S_MODE_M,4,4
	.comm	PM7_PM0_S,4,4
	.comm	PM7_PM0_M,4,4
	.comm	DC4_DC0_S,4,4
	.comm	DC4_DC0_M,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_imx6_ssi.c_setup_ssi.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	setup_ssi, %function
setup_ssi:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r5, .L4
	mov	r4, r0
	ldr	r1, [r5]
	bl	READ4
	mov	r2, #11
	mov	ip, #1
	ldr	r3, .L4+4
	ldr	r1, .L4+8
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	r6, .L4+12
	bic	r0, r0, r1, lsl r3
	orr	r3, r0, r2, lsl r3
	ldr	r0, .L4+16
	ldr	lr, .L4+20
	ldr	r1, .L4+24
	ldr	r7, [r6]
	ldr	r2, .L4+28
	ldr	r6, [r0]
	ldr	r0, .L4+32
	ldr	lr, [lr]
	ldr	r1, [r1]
	ldr	r2, [r2]
	ldr	r0, [r0]
	bic	r3, r3, r7, lsl lr
	orr	r1, r1, r6
	orr	r3, r3, ip, lsl lr
	orr	r1, r1, r0, lsl r2
	bic	r3, r3, r1
	ldr	r6, .L4+36
	orr	r2, r3, ip, lsl r2
	ldr	r1, [r5]
	mov	r0, r4
	bl	WRITE4
	ldr	r1, [r6]
	mov	r0, r4
	bl	READ4
	mov	r2, #8
	ldr	r3, .L4+40
	ldr	r1, .L4+44
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	r5, .L4+48
	bic	r0, r0, r1, lsl r3
	orr	r2, r0, r2, lsl r3
	ldr	r1, [r6]
	mov	r0, r4
	bl	WRITE4
	ldr	r1, [r5]
	mov	r0, r4
	bl	READ4
	ldr	ip, .L4+52
	ldr	r2, .L4+56
	ldr	lr, [ip]
	ldr	r1, .L4+60
	ldr	r3, .L4+64
	ldr	ip, .L4+68
	ldr	r2, [r2]
	ldr	r6, .L4+72
	ldr	r1, [r1]
	ldr	ip, [ip]
	ldr	r3, [r3]
	ldr	r6, [r6]
	orr	r2, r2, lr
	ldr	lr, .L4+76
	orr	r3, r1, r3
	orr	r2, r2, ip
	ldr	r1, .L4+80
	ldr	ip, .L4+84
	orr	r0, r0, r6
	ldr	r6, [lr]
	ldr	r1, [r1]
	ldr	lr, [ip]
	ldr	ip, .L4+88
	bic	r0, r0, r3
	orr	r3, r2, r6
	orr	r1, r1, lr
	ldr	r2, [ip]
	orr	r3, r3, r0
	bic	r3, r3, r1
	ldr	r6, .L4+92
	orr	r2, r3, r2
	ldr	r1, [r5]
	mov	r0, r4
	bl	WRITE4
	ldr	r1, [r6]
	mov	r0, r4
	bl	READ4
	ldr	r3, .L4+96
	ldr	r1, .L4+100
	ldr	r3, [r3]
	ldr	r1, [r1]
	ldr	lr, .L4+104
	orr	r3, r3, r1
	ldr	ip, .L4+108
	ldr	r2, .L4+112
	ldr	r1, .L4+116
	ldr	lr, [lr]
	ldr	r1, [r1]
	ldr	ip, [ip]
	ldr	r2, [r2]
	orr	r3, r3, lr
	bic	r2, r0, ip, lsl r2
	orr	r3, r3, r1
	mov	r0, r4
	ldr	r1, [r6]
	orr	r2, r3, r2
	pop	{r4, r5, r6, r7, r8, lr}
	b	WRITE4
.L5:
	.align	2
.L4:
	.word	SSI_STCCR
	.word	WL3_WL0_S
	.word	WL3_WL0_M
	.word	DC4_DC0_M
	.word	STCCR_PSR
	.word	DC4_DC0_S
	.word	STCCR_DIV2
	.word	PM7_PM0_S
	.word	PM7_PM0_M
	.word	SSI_SFCSR
	.word	SFCSR_TFWM0_S
	.word	SFCSR_TFWM0_M
	.word	SSI_STCR
	.word	STCR_TXDIR
	.word	STCR_TXBIT0
	.word	STCR_TFEN1
	.word	STCR_TSHFD
	.word	STCR_TFDIR
	.word	STCR_TFEN0
	.word	STCR_TSCKP
	.word	STCR_TFSI
	.word	STCR_TFSL
	.word	STCR_TEFS
	.word	SSI_SCR
	.word	SCR_SSIEN
	.word	SCR_TE
	.word	SCR_NET
	.word	SCR_I2S_MODE_M
	.word	SCR_I2S_MODE_S
	.word	SCR_SYN
	.size	setup_ssi, .-setup_ssi
	.comm	WL3_WL0_S,4,4
	.comm	WL3_WL0_M,4,4
	.comm	STCR_TXDIR,4,4
	.comm	STCR_TXBIT0,4,4
	.comm	STCR_TSHFD,4,4
	.comm	STCR_TSCKP,4,4
	.comm	STCR_TFSL,4,4
	.comm	STCR_TFSI,4,4
	.comm	STCR_TFEN1,4,4
	.comm	STCR_TFEN0,4,4
	.comm	STCR_TFDIR,4,4
	.comm	STCR_TEFS,4,4
	.comm	STCCR_PSR,4,4
	.comm	STCCR_DIV2,4,4
	.comm	SSI_STCR,4,4
	.comm	SSI_STCCR,4,4
	.comm	SSI_SFCSR,4,4
	.comm	SSI_SCR,4,4
	.comm	SFCSR_TFWM0_S,4,4
	.comm	SFCSR_TFWM0_M,4,4
	.comm	SCR_TE,4,4
	.comm	SCR_SYN,4,4
	.comm	SCR_SSIEN,4,4
	.comm	SCR_NET,4,4
	.comm	SCR_I2S_MODE_S,4,4
	.comm	SCR_I2S_MODE_M,4,4
	.comm	PM7_PM0_S,4,4
	.comm	PM7_PM0_M,4,4
	.comm	DC4_DC0_S,4,4
	.comm	DC4_DC0_M,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
