	.file	"extr_acpi.c_basl_fwrite_fadt.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/*\n"
.LC1:
	.string	" * bhyve FADT template\n"
.LC2:
	.string	" */\n"
.LC3:
	.string	"[0004]\t\tSignature : \"FACP\"\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC4:
	.string	"[0004]\t\tTable Length : 0000010C\n"
	.section	.rodata.str1.1
.LC5:
	.string	"[0001]\t\tRevision : 05\n"
.LC6:
	.string	"[0001]\t\tChecksum : 00\n"
.LC7:
	.string	"[0006]\t\tOem ID : \"BHYVE \"\n"
	.section	.rodata.str1.8
	.align 8
.LC8:
	.string	"[0008]\t\tOem Table ID : \"BVFACP  \"\n"
	.align 8
.LC9:
	.string	"[0004]\t\tOem Revision : 00000001\n"
	.align 8
.LC10:
	.string	"[0004]\t\tAsl Compiler ID : \"xxxx\"\n"
	.align 8
.LC11:
	.string	"[0004]\t\tAsl Compiler Revision : 00000000\n"
	.section	.rodata.str1.1
.LC12:
	.string	"\n"
.LC13:
	.string	"[0004]\t\tFACS Address : %08X\n"
.LC14:
	.string	"[0004]\t\tDSDT Address : %08X\n"
.LC15:
	.string	"[0001]\t\tModel : 01\n"
	.section	.rodata.str1.8
	.align 8
.LC16:
	.string	"[0001]\t\tPM Profile : 00 [Unspecified]\n"
	.section	.rodata.str1.1
.LC17:
	.string	"[0002]\t\tSCI Interrupt : %04X\n"
	.section	.rodata.str1.8
	.align 8
.LC18:
	.string	"[0004]\t\tSMI Command Port : %08X\n"
	.align 8
.LC19:
	.string	"[0001]\t\tACPI Enable Value : %02X\n"
	.align 8
.LC20:
	.string	"[0001]\t\tACPI Disable Value : %02X\n"
	.section	.rodata.str1.1
.LC21:
	.string	"[0001]\t\tS4BIOS Command : 00\n"
.LC22:
	.string	"[0001]\t\tP-State Control : 00\n"
	.section	.rodata.str1.8
	.align 8
.LC23:
	.string	"[0004]\t\tPM1A Event Block Address : %08X\n"
	.align 8
.LC24:
	.string	"[0004]\t\tPM1B Event Block Address : 00000000\n"
	.align 8
.LC25:
	.string	"[0004]\t\tPM1A Control Block Address : %08X\n"
	.align 8
.LC26:
	.string	"[0004]\t\tPM1B Control Block Address : 00000000\n"
	.align 8
.LC27:
	.string	"[0004]\t\tPM2 Control Block Address : 00000000\n"
	.align 8
.LC28:
	.string	"[0004]\t\tPM Timer Block Address : %08X\n"
	.align 8
.LC29:
	.string	"[0004]\t\tGPE0 Block Address : 00000000\n"
	.align 8
.LC30:
	.string	"[0004]\t\tGPE1 Block Address : 00000000\n"
	.align 8
.LC31:
	.string	"[0001]\t\tPM1 Event Block Length : 04\n"
	.align 8
.LC32:
	.string	"[0001]\t\tPM1 Control Block Length : 02\n"
	.align 8
.LC33:
	.string	"[0001]\t\tPM2 Control Block Length : 00\n"
	.align 8
.LC34:
	.string	"[0001]\t\tPM Timer Block Length : 04\n"
	.align 8
.LC35:
	.string	"[0001]\t\tGPE0 Block Length : 00\n"
	.align 8
.LC36:
	.string	"[0001]\t\tGPE1 Block Length : 00\n"
	.align 8
.LC37:
	.string	"[0001]\t\tGPE1 Base Offset : 00\n"
	.section	.rodata.str1.1
.LC38:
	.string	"[0001]\t\t_CST Support : 00\n"
.LC39:
	.string	"[0002]\t\tC2 Latency : 0000\n"
.LC40:
	.string	"[0002]\t\tC3 Latency : 0000\n"
	.section	.rodata.str1.8
	.align 8
.LC41:
	.string	"[0002]\t\tCPU Cache Size : 0000\n"
	.align 8
.LC42:
	.string	"[0002]\t\tCache Flush Stride : 0000\n"
	.align 8
.LC43:
	.string	"[0001]\t\tDuty Cycle Offset : 00\n"
	.align 8
.LC44:
	.string	"[0001]\t\tDuty Cycle Width : 00\n"
	.align 8
.LC45:
	.string	"[0001]\t\tRTC Day Alarm Index : 00\n"
	.align 8
.LC46:
	.string	"[0001]\t\tRTC Month Alarm Index : 00\n"
	.align 8
.LC47:
	.string	"[0001]\t\tRTC Century Index : 32\n"
	.align 8
.LC48:
	.string	"[0002]\t\tBoot Flags (decoded below) : 0000\n"
	.align 8
.LC49:
	.string	"\t\t\tLegacy Devices Supported (V2) : 0\n"
	.align 8
.LC50:
	.string	"\t\t\t8042 Present on ports 60/64 (V2) : 0\n"
	.section	.rodata.str1.1
.LC51:
	.string	"\t\t\tVGA Not Present (V4) : 1\n"
	.section	.rodata.str1.8
	.align 8
.LC52:
	.string	"\t\t\tMSI Not Supported (V4) : 0\n"
	.align 8
.LC53:
	.string	"\t\t\tPCIe ASPM Not Supported (V4) : 1\n"
	.align 8
.LC54:
	.string	"\t\t\tCMOS RTC Not Present (V5) : 0\n"
	.section	.rodata.str1.1
.LC55:
	.string	"[0001]\t\tReserved : 00\n"
	.section	.rodata.str1.8
	.align 8
.LC56:
	.string	"[0004]\t\tFlags (decoded below) : 00000000\n"
	.align 8
.LC57:
	.string	"\t\t\tWBINVD instruction is operational (V1) : 1\n"
	.align 8
.LC58:
	.string	"\t\t\tWBINVD flushes all caches (V1) : 0\n"
	.align 8
.LC59:
	.string	"\t\t\tAll CPUs support C1 (V1) : 1\n"
	.align 8
.LC60:
	.string	"\t\t\tC2 works on MP system (V1) : 0\n"
	.align 8
.LC61:
	.string	"\t\t\tControl Method Power Button (V1) : 0\n"
	.align 8
.LC62:
	.string	"\t\t\tControl Method Sleep Button (V1) : 1\n"
	.align 8
.LC63:
	.string	"\t\t\tRTC wake not in fixed reg space (V1) : 0\n"
	.align 8
.LC64:
	.string	"\t\t\tRTC can wake system from S4 (V1) : 0\n"
	.section	.rodata.str1.1
.LC65:
	.string	"\t\t\t32-bit PM Timer (V1) : 1\n"
	.section	.rodata.str1.8
	.align 8
.LC66:
	.string	"\t\t\tDocking Supported (V1) : 0\n"
	.align 8
.LC67:
	.string	"\t\t\tReset Register Supported (V2) : 1\n"
	.section	.rodata.str1.1
.LC68:
	.string	"\t\t\tSealed Case (V3) : 0\n"
	.section	.rodata.str1.8
	.align 8
.LC69:
	.string	"\t\t\tHeadless - No Video (V3) : 1\n"
	.align 8
.LC70:
	.string	"\t\t\tUse native instr after SLP_TYPx (V3) : 0\n"
	.align 8
.LC71:
	.string	"\t\t\tPCIEXP_WAK Bits Supported (V4) : 0\n"
	.align 8
.LC72:
	.string	"\t\t\tUse Platform Timer (V4) : 0\n"
	.align 8
.LC73:
	.string	"\t\t\tRTC_STS valid on S4 wake (V4) : 0\n"
	.align 8
.LC74:
	.string	"\t\t\tRemote Power-on capable (V4) : 0\n"
	.align 8
.LC75:
	.string	"\t\t\tUse APIC Cluster Model (V4) : 0\n"
	.align 8
.LC76:
	.string	"\t\t\tUse APIC Physical Destination Mode (V4) : 1\n"
	.section	.rodata.str1.1
.LC77:
	.string	"\t\t\tHardware Reduced (V5) : 0\n"
	.section	.rodata.str1.8
	.align 8
.LC78:
	.string	"\t\t\tLow Power S0 Idle (V5) : 0\n"
	.align 8
.LC79:
	.string	"[0012]\t\tReset Register : [Generic Address Structure]\n"
	.align 8
.LC80:
	.string	"[0001]\t\tSpace ID : 01 [SystemIO]\n"
	.section	.rodata.str1.1
.LC81:
	.string	"[0001]\t\tBit Width : 08\n"
.LC82:
	.string	"[0001]\t\tBit Offset : 00\n"
	.section	.rodata.str1.8
	.align 8
.LC83:
	.string	"[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n"
	.align 8
.LC84:
	.string	"[0008]\t\tAddress : 0000000000000CF9\n"
	.align 8
.LC85:
	.string	"[0001]\t\tValue to cause reset : 06\n"
	.align 8
.LC86:
	.string	"[0002]\t\tARM Flags (decoded below): 0000\n"
	.section	.rodata.str1.1
.LC87:
	.string	"\t\t\tPSCI Compliant : 0\n"
.LC88:
	.string	"\t\t\tMust use HVC for PSCI : 0\n"
	.section	.rodata.str1.8
	.align 8
.LC89:
	.string	"[0001]\t\tFADT Minor Revision : 01\n"
	.align 8
.LC90:
	.string	"[0008]\t\tFACS Address : 00000000%08X\n"
	.align 8
.LC91:
	.string	"[0008]\t\tDSDT Address : 00000000%08X\n"
	.align 8
.LC92:
	.string	"[0012]\t\tPM1A Event Block : [Generic Address Structure]\n"
	.section	.rodata.str1.1
.LC93:
	.string	"[0001]\t\tBit Width : 20\n"
	.section	.rodata.str1.8
	.align 8
.LC94:
	.string	"[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n"
	.align 8
.LC95:
	.string	"[0008]\t\tAddress : 00000000%08X\n"
	.align 8
.LC96:
	.string	"[0012]\t\tPM1B Event Block : [Generic Address Structure]\n"
	.section	.rodata.str1.1
.LC97:
	.string	"[0001]\t\tBit Width : 00\n"
	.section	.rodata.str1.8
	.align 8
.LC98:
	.string	"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n"
	.align 8
.LC99:
	.string	"[0008]\t\tAddress : 0000000000000000\n"
	.align 8
.LC100:
	.string	"[0012]\t\tPM1A Control Block : [Generic Address Structure]\n"
	.section	.rodata.str1.1
.LC101:
	.string	"[0001]\t\tBit Width : 10\n"
	.section	.rodata.str1.8
	.align 8
.LC102:
	.string	"[0012]\t\tPM1B Control Block : [Generic Address Structure]\n"
	.align 8
.LC103:
	.string	"[0012]\t\tPM2 Control Block : [Generic Address Structure]\n"
	.align 8
.LC104:
	.string	"[0012]\t\tPM Timer Block : [Generic Address Structure]\n"
	.align 8
.LC105:
	.string	"[0001]\t\tEncoded Access Width : 03 [DWord Access:32]\n"
	.align 8
.LC106:
	.string	"[0012]\t\tGPE0 Block : [Generic Address Structure]\n"
	.align 8
.LC107:
	.string	"[0012]\t\tGPE1 Block : [Generic Address Structure]\n"
	.align 8
.LC108:
	.string	"[0012]\t\tSleep Control Register : [Generic Address Structure]\n"
	.align 8
.LC109:
	.string	"[0012]\t\tSleep Status Register : [Generic Address Structure]\n"
	.text
	.p2align 4
	.type	basl_fwrite_fadt, @function
basl_fwrite_fadt:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	lea	rsi, .LC0[rip]
	mov	rbp, rdi
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC1[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC2[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC3[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC4[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC5[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC6[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC7[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC8[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC9[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC10[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC11[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	mov	rdx, QWORD PTR FACS_OFFSET[rip]
	xor	eax, eax
	add	rdx, QWORD PTR basl_acpi_base[rip]
	lea	rsi, .LC13[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	mov	rdx, QWORD PTR DSDT_OFFSET[rip]
	xor	eax, eax
	add	rdx, QWORD PTR basl_acpi_base[rip]
	lea	rsi, .LC14[rip]
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC15[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC16[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR SCI_INT[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC17[rip]
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR SMI_CMD[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC18[rip]
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR BHYVE_ACPI_ENABLE[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC19[rip]
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR BHYVE_ACPI_DISABLE[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC20[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC21[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC22[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR PM1A_EVT_ADDR[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC23[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC24[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR PM1A_CNT_ADDR[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC25[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC26[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC27[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR IO_PMTMR[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC28[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC29[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC30[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC31[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC32[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC33[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC34[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC35[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC36[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC37[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC38[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC39[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC40[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC41[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC42[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC43[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC44[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC45[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC46[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC47[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC48[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC49[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC50[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC51[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC52[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC53[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC54[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC55[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC56[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC57[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC58[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC59[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC60[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC61[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC62[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC63[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC64[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC65[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC66[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC67[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC68[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC69[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC70[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC71[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC72[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC73[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC74[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC75[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC76[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC77[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC78[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC79[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC81[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC83[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC84[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC85[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC86[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC87[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC88[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC89[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	mov	rdx, QWORD PTR FACS_OFFSET[rip]
	xor	eax, eax
	add	rdx, QWORD PTR basl_acpi_base[rip]
	lea	rsi, .LC90[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	mov	rdx, QWORD PTR DSDT_OFFSET[rip]
	xor	eax, eax
	add	rdx, QWORD PTR basl_acpi_base[rip]
	lea	rsi, .LC91[rip]
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC92[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC93[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC94[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR PM1A_EVT_ADDR[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC95[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC96[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC97[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC98[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC100[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC101[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC94[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR PM1A_CNT_ADDR[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC95[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC102[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC97[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC98[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC103[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC81[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC98[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC104[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC93[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC105[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	edx, DWORD PTR IO_PMTMR[rip]
	mov	rdi, rbp
	xor	eax, eax
	lea	rsi, .LC95[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC106[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC97[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC83[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC107[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC97[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC98[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC108[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC81[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC83[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC12[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC109[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	xor	eax, eax
	mov	rdi, rbp
	lea	rsi, .LC80[rip]
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC81[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC82[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC83[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	lea	rsi, .LC99[rip]
	xor	eax, eax
	call	EFPRINTF@PLT
	mov	rdi, rbp
	call	EFFLUSH@PLT
	xor	eax, eax
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	basl_fwrite_fadt, .-basl_fwrite_fadt
	.comm	errno,4,4
	.comm	basl_acpi_base,8,8
	.comm	SMI_CMD,4,4
	.comm	SCI_INT,4,4
	.comm	PM1A_EVT_ADDR,4,4
	.comm	PM1A_CNT_ADDR,4,4
	.comm	IO_PMTMR,4,4
	.comm	FACS_OFFSET,8,8
	.comm	DSDT_OFFSET,8,8
	.comm	BHYVE_ACPI_ENABLE,4,4
	.comm	BHYVE_ACPI_DISABLE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_acpi.c_basl_fwrite_fadt.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"/*\012\000"
	.align	2
.LC1:
	.ascii	" * bhyve FADT template\012\000"
	.align	2
.LC2:
	.ascii	" */\012\000"
	.align	2
.LC3:
	.ascii	"[0004]\011\011Signature : \"FACP\"\012\000"
	.align	2
.LC4:
	.ascii	"[0004]\011\011Table Length : 0000010C\012\000"
	.align	2
.LC5:
	.ascii	"[0001]\011\011Revision : 05\012\000"
	.align	2
.LC6:
	.ascii	"[0001]\011\011Checksum : 00\012\000"
	.align	2
.LC7:
	.ascii	"[0006]\011\011Oem ID : \"BHYVE \"\012\000"
	.align	2
.LC8:
	.ascii	"[0008]\011\011Oem Table ID : \"BVFACP  \"\012\000"
	.align	2
.LC9:
	.ascii	"[0004]\011\011Oem Revision : 00000001\012\000"
	.align	2
.LC10:
	.ascii	"[0004]\011\011Asl Compiler ID : \"xxxx\"\012\000"
	.align	2
.LC11:
	.ascii	"[0004]\011\011Asl Compiler Revision : 00000000\012\000"
	.align	2
.LC12:
	.ascii	"\012\000"
	.align	2
.LC13:
	.ascii	"[0004]\011\011FACS Address : %08X\012\000"
	.align	2
.LC14:
	.ascii	"[0004]\011\011DSDT Address : %08X\012\000"
	.align	2
.LC15:
	.ascii	"[0001]\011\011Model : 01\012\000"
	.align	2
.LC16:
	.ascii	"[0001]\011\011PM Profile : 00 [Unspecified]\012\000"
	.align	2
.LC17:
	.ascii	"[0002]\011\011SCI Interrupt : %04X\012\000"
	.align	2
.LC18:
	.ascii	"[0004]\011\011SMI Command Port : %08X\012\000"
	.align	2
.LC19:
	.ascii	"[0001]\011\011ACPI Enable Value : %02X\012\000"
	.align	2
.LC20:
	.ascii	"[0001]\011\011ACPI Disable Value : %02X\012\000"
	.align	2
.LC21:
	.ascii	"[0001]\011\011S4BIOS Command : 00\012\000"
	.align	2
.LC22:
	.ascii	"[0001]\011\011P-State Control : 00\012\000"
	.align	2
.LC23:
	.ascii	"[0004]\011\011PM1A Event Block Address : %08X\012\000"
	.align	2
.LC24:
	.ascii	"[0004]\011\011PM1B Event Block Address : 00000000\012"
	.ascii	"\000"
	.align	2
.LC25:
	.ascii	"[0004]\011\011PM1A Control Block Address : %08X\012"
	.ascii	"\000"
	.align	2
.LC26:
	.ascii	"[0004]\011\011PM1B Control Block Address : 00000000"
	.ascii	"\012\000"
	.align	2
.LC27:
	.ascii	"[0004]\011\011PM2 Control Block Address : 00000000\012"
	.ascii	"\000"
	.align	2
.LC28:
	.ascii	"[0004]\011\011PM Timer Block Address : %08X\012\000"
	.align	2
.LC29:
	.ascii	"[0004]\011\011GPE0 Block Address : 00000000\012\000"
	.align	2
.LC30:
	.ascii	"[0004]\011\011GPE1 Block Address : 00000000\012\000"
	.align	2
.LC31:
	.ascii	"[0001]\011\011PM1 Event Block Length : 04\012\000"
	.align	2
.LC32:
	.ascii	"[0001]\011\011PM1 Control Block Length : 02\012\000"
	.align	2
.LC33:
	.ascii	"[0001]\011\011PM2 Control Block Length : 00\012\000"
	.align	2
.LC34:
	.ascii	"[0001]\011\011PM Timer Block Length : 04\012\000"
	.align	2
.LC35:
	.ascii	"[0001]\011\011GPE0 Block Length : 00\012\000"
	.align	2
.LC36:
	.ascii	"[0001]\011\011GPE1 Block Length : 00\012\000"
	.align	2
.LC37:
	.ascii	"[0001]\011\011GPE1 Base Offset : 00\012\000"
	.align	2
.LC38:
	.ascii	"[0001]\011\011_CST Support : 00\012\000"
	.align	2
.LC39:
	.ascii	"[0002]\011\011C2 Latency : 0000\012\000"
	.align	2
.LC40:
	.ascii	"[0002]\011\011C3 Latency : 0000\012\000"
	.align	2
.LC41:
	.ascii	"[0002]\011\011CPU Cache Size : 0000\012\000"
	.align	2
.LC42:
	.ascii	"[0002]\011\011Cache Flush Stride : 0000\012\000"
	.align	2
.LC43:
	.ascii	"[0001]\011\011Duty Cycle Offset : 00\012\000"
	.align	2
.LC44:
	.ascii	"[0001]\011\011Duty Cycle Width : 00\012\000"
	.align	2
.LC45:
	.ascii	"[0001]\011\011RTC Day Alarm Index : 00\012\000"
	.align	2
.LC46:
	.ascii	"[0001]\011\011RTC Month Alarm Index : 00\012\000"
	.align	2
.LC47:
	.ascii	"[0001]\011\011RTC Century Index : 32\012\000"
	.align	2
.LC48:
	.ascii	"[0002]\011\011Boot Flags (decoded below) : 0000\012"
	.ascii	"\000"
	.align	2
.LC49:
	.ascii	"\011\011\011Legacy Devices Supported (V2) : 0\012\000"
	.align	2
.LC50:
	.ascii	"\011\011\0118042 Present on ports 60/64 (V2) : 0\012"
	.ascii	"\000"
	.align	2
.LC51:
	.ascii	"\011\011\011VGA Not Present (V4) : 1\012\000"
	.align	2
.LC52:
	.ascii	"\011\011\011MSI Not Supported (V4) : 0\012\000"
	.align	2
.LC53:
	.ascii	"\011\011\011PCIe ASPM Not Supported (V4) : 1\012\000"
	.align	2
.LC54:
	.ascii	"\011\011\011CMOS RTC Not Present (V5) : 0\012\000"
	.align	2
.LC55:
	.ascii	"[0001]\011\011Reserved : 00\012\000"
	.align	2
.LC56:
	.ascii	"[0004]\011\011Flags (decoded below) : 00000000\012\000"
	.align	2
.LC57:
	.ascii	"\011\011\011WBINVD instruction is operational (V1) "
	.ascii	": 1\012\000"
	.align	2
.LC58:
	.ascii	"\011\011\011WBINVD flushes all caches (V1) : 0\012\000"
	.align	2
.LC59:
	.ascii	"\011\011\011All CPUs support C1 (V1) : 1\012\000"
	.align	2
.LC60:
	.ascii	"\011\011\011C2 works on MP system (V1) : 0\012\000"
	.align	2
.LC61:
	.ascii	"\011\011\011Control Method Power Button (V1) : 0\012"
	.ascii	"\000"
	.align	2
.LC62:
	.ascii	"\011\011\011Control Method Sleep Button (V1) : 1\012"
	.ascii	"\000"
	.align	2
.LC63:
	.ascii	"\011\011\011RTC wake not in fixed reg space (V1) : "
	.ascii	"0\012\000"
	.align	2
.LC64:
	.ascii	"\011\011\011RTC can wake system from S4 (V1) : 0\012"
	.ascii	"\000"
	.align	2
.LC65:
	.ascii	"\011\011\01132-bit PM Timer (V1) : 1\012\000"
	.align	2
.LC66:
	.ascii	"\011\011\011Docking Supported (V1) : 0\012\000"
	.align	2
.LC67:
	.ascii	"\011\011\011Reset Register Supported (V2) : 1\012\000"
	.align	2
.LC68:
	.ascii	"\011\011\011Sealed Case (V3) : 0\012\000"
	.align	2
.LC69:
	.ascii	"\011\011\011Headless - No Video (V3) : 1\012\000"
	.align	2
.LC70:
	.ascii	"\011\011\011Use native instr after SLP_TYPx (V3) : "
	.ascii	"0\012\000"
	.align	2
.LC71:
	.ascii	"\011\011\011PCIEXP_WAK Bits Supported (V4) : 0\012\000"
	.align	2
.LC72:
	.ascii	"\011\011\011Use Platform Timer (V4) : 0\012\000"
	.align	2
.LC73:
	.ascii	"\011\011\011RTC_STS valid on S4 wake (V4) : 0\012\000"
	.align	2
.LC74:
	.ascii	"\011\011\011Remote Power-on capable (V4) : 0\012\000"
	.align	2
.LC75:
	.ascii	"\011\011\011Use APIC Cluster Model (V4) : 0\012\000"
	.align	2
.LC76:
	.ascii	"\011\011\011Use APIC Physical Destination Mode (V4)"
	.ascii	" : 1\012\000"
	.align	2
.LC77:
	.ascii	"\011\011\011Hardware Reduced (V5) : 0\012\000"
	.align	2
.LC78:
	.ascii	"\011\011\011Low Power S0 Idle (V5) : 0\012\000"
	.align	2
.LC79:
	.ascii	"[0012]\011\011Reset Register : [Generic Address Str"
	.ascii	"ucture]\012\000"
	.align	2
.LC80:
	.ascii	"[0001]\011\011Space ID : 01 [SystemIO]\012\000"
	.align	2
.LC81:
	.ascii	"[0001]\011\011Bit Width : 08\012\000"
	.align	2
.LC82:
	.ascii	"[0001]\011\011Bit Offset : 00\012\000"
	.align	2
.LC83:
	.ascii	"[0001]\011\011Encoded Access Width : 01 [Byte Acces"
	.ascii	"s:8]\012\000"
	.align	2
.LC84:
	.ascii	"[0008]\011\011Address : 0000000000000CF9\012\000"
	.align	2
.LC85:
	.ascii	"[0001]\011\011Value to cause reset : 06\012\000"
	.align	2
.LC86:
	.ascii	"[0002]\011\011ARM Flags (decoded below): 0000\012\000"
	.align	2
.LC87:
	.ascii	"\011\011\011PSCI Compliant : 0\012\000"
	.align	2
.LC88:
	.ascii	"\011\011\011Must use HVC for PSCI : 0\012\000"
	.align	2
.LC89:
	.ascii	"[0001]\011\011FADT Minor Revision : 01\012\000"
	.align	2
.LC90:
	.ascii	"[0008]\011\011FACS Address : 00000000%08X\012\000"
	.align	2
.LC91:
	.ascii	"[0008]\011\011DSDT Address : 00000000%08X\012\000"
	.align	2
.LC92:
	.ascii	"[0012]\011\011PM1A Event Block : [Generic Address S"
	.ascii	"tructure]\012\000"
	.align	2
.LC93:
	.ascii	"[0001]\011\011Bit Width : 20\012\000"
	.align	2
.LC94:
	.ascii	"[0001]\011\011Encoded Access Width : 02 [Word Acces"
	.ascii	"s:16]\012\000"
	.align	2
.LC95:
	.ascii	"[0008]\011\011Address : 00000000%08X\012\000"
	.align	2
.LC96:
	.ascii	"[0012]\011\011PM1B Event Block : [Generic Address S"
	.ascii	"tructure]\012\000"
	.align	2
.LC97:
	.ascii	"[0001]\011\011Bit Width : 00\012\000"
	.align	2
.LC98:
	.ascii	"[0001]\011\011Encoded Access Width : 00 [Undefined/"
	.ascii	"Legacy]\012\000"
	.align	2
.LC99:
	.ascii	"[0008]\011\011Address : 0000000000000000\012\000"
	.align	2
.LC100:
	.ascii	"[0012]\011\011PM1A Control Block : [Generic Address"
	.ascii	" Structure]\012\000"
	.align	2
.LC101:
	.ascii	"[0001]\011\011Bit Width : 10\012\000"
	.align	2
.LC102:
	.ascii	"[0012]\011\011PM1B Control Block : [Generic Address"
	.ascii	" Structure]\012\000"
	.align	2
.LC103:
	.ascii	"[0012]\011\011PM2 Control Block : [Generic Address "
	.ascii	"Structure]\012\000"
	.align	2
.LC104:
	.ascii	"[0012]\011\011PM Timer Block : [Generic Address Str"
	.ascii	"ucture]\012\000"
	.align	2
.LC105:
	.ascii	"[0001]\011\011Encoded Access Width : 03 [DWord Acce"
	.ascii	"ss:32]\012\000"
	.align	2
.LC106:
	.ascii	"[0012]\011\011GPE0 Block : [Generic Address Structu"
	.ascii	"re]\012\000"
	.align	2
.LC107:
	.ascii	"[0012]\011\011GPE1 Block : [Generic Address Structu"
	.ascii	"re]\012\000"
	.align	2
.LC108:
	.ascii	"[0012]\011\011Sleep Control Register : [Generic Add"
	.ascii	"ress Structure]\012\000"
	.align	2
.LC109:
	.ascii	"[0012]\011\011Sleep Status Register : [Generic Addr"
	.ascii	"ess Structure]\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	basl_fwrite_fadt, %function
basl_fwrite_fadt:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	ldr	r1, .L4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+8
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+12
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+16
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+20
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+24
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+28
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+32
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+36
	ldr	r5, .L4+40
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+44
	bl	EFPRINTF
	ldr	r8, .L4+48
	ldr	r10, .L4+52
	mov	r0, r4
	ldr	r1, .L4+56
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	ldr	r1, [r8]
	ldr	r2, [r10]
	ldr	fp, .L4+60
	add	r2, r1, r2
	mov	r0, r4
	ldr	r1, .L4+64
	bl	EFPRINTF
	ldr	r1, [r8]
	ldr	r2, [fp]
	mov	r0, r4
	add	r2, r1, r2
	ldr	r1, .L4+68
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+72
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+76
	bl	EFPRINTF
	ldr	r2, .L4+80
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, .L4+84
	bl	EFPRINTF
	ldr	r2, .L4+88
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, .L4+92
	bl	EFPRINTF
	ldr	r2, .L4+96
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, .L4+100
	bl	EFPRINTF
	ldr	r2, .L4+104
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, .L4+108
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+112
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+116
	bl	EFPRINTF
	ldr	r3, .L4+120
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, .L4+124
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+128
	bl	EFPRINTF
	ldr	r2, .L4+132
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, .L4+136
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+140
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+144
	bl	EFPRINTF
	ldr	r1, .L4+148
	mov	r0, r4
	ldr	r2, [r1]
	ldr	r1, .L4+152
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+156
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+160
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+164
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+168
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+172
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+176
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+180
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+184
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+188
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+192
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+196
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+200
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+204
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+208
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+212
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+216
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+220
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+224
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+228
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+232
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+236
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+240
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+244
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+248
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+252
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+256
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+260
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+264
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+268
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+272
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+276
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+280
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+284
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+288
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+292
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+296
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+300
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+304
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+308
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+312
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+316
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+320
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+324
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+328
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+332
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+336
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+340
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+344
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+348
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+352
	ldr	r7, .L4+356
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+360
	ldr	r6, .L4+364
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	ldr	r9, .L4+368
	mov	r0, r4
	ldr	r1, .L4+372
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r9
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+376
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+380
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+384
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+388
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+392
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+396
	bl	EFPRINTF
	ldr	r3, [r10]
	ldr	r2, [r8]
	mov	r0, r4
	add	r2, r2, r3
	ldr	r1, .L4+400
	bl	EFPRINTF
	ldr	r3, [fp]
	ldr	r2, [r8]
	mov	r0, r4
	add	r2, r2, r3
	ldr	r1, .L4+404
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+408
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+412
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	ldr	r3, .L4+416
	mov	r0, r4
	mov	r1, r3
	bl	EFPRINTF
	ldr	r3, .L4+120
	mov	r0, r4
	ldr	r2, [r3]
	ldr	r1, .L4+420
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	ldr	fp, .L4+424
	mov	r0, r4
	ldr	r1, .L4+428
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	ldr	r10, .L4+432
	mov	r1, fp
	mov	r0, r4
	ldr	r8, .L4+436
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r10
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+440
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+444
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	ldr	r3, .L4+416
	mov	r0, r4
	mov	r1, r3
	bl	EFPRINTF
	ldr	r2, .L4+132
	mov	r0, r4
	ldr	r2, [r2]
	ldr	r1, .L4+420
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+448
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, fp
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r10
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+452
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+372
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r10
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+456
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+412
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+460
	bl	EFPRINTF
	ldr	r1, .L4+148
	mov	r0, r4
	ldr	r2, [r1]
	ldr	r1, .L4+420
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+464
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, fp
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r9
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+468
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, fp
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r10
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+472
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+372
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r9
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r5
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+476
	bl	EFPRINTF
	mov	r1, r7
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	ldr	r1, .L4+372
	bl	EFPRINTF
	mov	r1, r6
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r9
	mov	r0, r4
	bl	EFPRINTF
	mov	r1, r8
	mov	r0, r4
	bl	EFPRINTF
	mov	r0, r4
	bl	EFFLUSH
	mov	r0, #0
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
	.align	2
.L4:
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC12
	.word	.LC10
	.word	basl_acpi_base
	.word	FACS_OFFSET
	.word	.LC11
	.word	DSDT_OFFSET
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC16
	.word	SCI_INT
	.word	.LC17
	.word	SMI_CMD
	.word	.LC18
	.word	BHYVE_ACPI_ENABLE
	.word	.LC19
	.word	BHYVE_ACPI_DISABLE
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	PM1A_EVT_ADDR
	.word	.LC23
	.word	.LC24
	.word	PM1A_CNT_ADDR
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	IO_PMTMR
	.word	.LC28
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	.LC34
	.word	.LC35
	.word	.LC36
	.word	.LC37
	.word	.LC38
	.word	.LC39
	.word	.LC40
	.word	.LC41
	.word	.LC42
	.word	.LC43
	.word	.LC44
	.word	.LC45
	.word	.LC46
	.word	.LC47
	.word	.LC48
	.word	.LC49
	.word	.LC50
	.word	.LC51
	.word	.LC52
	.word	.LC53
	.word	.LC54
	.word	.LC55
	.word	.LC56
	.word	.LC57
	.word	.LC58
	.word	.LC59
	.word	.LC60
	.word	.LC61
	.word	.LC62
	.word	.LC63
	.word	.LC64
	.word	.LC65
	.word	.LC66
	.word	.LC67
	.word	.LC68
	.word	.LC69
	.word	.LC70
	.word	.LC71
	.word	.LC72
	.word	.LC73
	.word	.LC74
	.word	.LC75
	.word	.LC76
	.word	.LC77
	.word	.LC78
	.word	.LC80
	.word	.LC79
	.word	.LC82
	.word	.LC83
	.word	.LC81
	.word	.LC84
	.word	.LC85
	.word	.LC86
	.word	.LC87
	.word	.LC88
	.word	.LC89
	.word	.LC90
	.word	.LC91
	.word	.LC92
	.word	.LC93
	.word	.LC94
	.word	.LC95
	.word	.LC97
	.word	.LC96
	.word	.LC98
	.word	.LC99
	.word	.LC100
	.word	.LC101
	.word	.LC102
	.word	.LC103
	.word	.LC104
	.word	.LC105
	.word	.LC106
	.word	.LC107
	.word	.LC108
	.word	.LC109
	.size	basl_fwrite_fadt, .-basl_fwrite_fadt
	.comm	errno,4,4
	.comm	basl_acpi_base,4,4
	.comm	SMI_CMD,4,4
	.comm	SCI_INT,4,4
	.comm	PM1A_EVT_ADDR,4,4
	.comm	PM1A_CNT_ADDR,4,4
	.comm	IO_PMTMR,4,4
	.comm	FACS_OFFSET,4,4
	.comm	DSDT_OFFSET,4,4
	.comm	BHYVE_ACPI_ENABLE,4,4
	.comm	BHYVE_ACPI_DISABLE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
