	.file	"extr_cx23885-cards.c_cx23885_gpio_setup.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	cx23885_gpio_setup
	.type	cx23885_gpio_setup, @function
cx23885_gpio_setup:
.LFB0:
	.cfi_startproc
	endbr64
	mov	eax, DWORD PTR [rdi]
	add	eax, -128
	cmp	eax, 24
	ja	.L1
	lea	rdx, .L4[rip]
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	movsx	rax, DWORD PTR [rdx+rax*4]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L4:
	.long	.L16-.L4
	.long	.L15-.L4
	.long	.L14-.L4
	.long	.L13-.L4
	.long	.L13-.L4
	.long	.L3-.L4
	.long	.L3-.L4
	.long	.L9-.L4
	.long	.L12-.L4
	.long	.L7-.L4
	.long	.L20-.L4
	.long	.L10-.L4
	.long	.L7-.L4
	.long	.L9-.L4
	.long	.L8-.L4
	.long	.L8-.L4
	.long	.L8-.L4
	.long	.L6-.L4
	.long	.L8-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.long	.L3-.L4
	.text
	.p2align 4,,10
	.p2align 3
.L7:
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 327680
	call	cx_set@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 5
	call	cx_clear@PLT
	mov	edi, 20
	call	mdelay@PLT
.L20:
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 327685
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx_set@PLT
	.p2align 4,,10
	.p2align 3
.L8:
	.cfi_restore_state
	mov	edx, 1
	mov	esi, DWORD PTR GPIO_9[rip]
	or	esi, DWORD PTR GPIO_6[rip]
	or	esi, DWORD PTR GPIO_5[rip]
	call	cx23885_gpio_enable@PLT
	mov	rdi, rbp
	mov	esi, DWORD PTR GPIO_9[rip]
	or	esi, DWORD PTR GPIO_6[rip]
	or	esi, DWORD PTR GPIO_5[rip]
	call	cx23885_gpio_set@PLT
	mov	esi, DWORD PTR GPIO_9[rip]
	mov	rdi, rbp
	call	cx23885_gpio_clear@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_9[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx23885_gpio_set@PLT
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 262144
	call	cx_set@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 4
	call	cx_clear@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 262148
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx_set@PLT
	.p2align 4,,10
	.p2align 3
.L6:
	.cfi_restore_state
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 65537
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx_set@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 983040
	call	cx_set@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 15
	call	cx_clear@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 983055
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx_set@PLT
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	edx, 1
	mov	esi, DWORD PTR GPIO_0[rip]
	or	esi, DWORD PTR GPIO_1[rip]
	or	esi, DWORD PTR GPIO_2[rip]
	call	cx23885_gpio_enable@PLT
	mov	esi, DWORD PTR GPIO_1[rip]
	mov	rdi, rbp
	or	esi, DWORD PTR GPIO_2[rip]
	call	cx23885_gpio_clear@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_0[rip]
	or	esi, DWORD PTR GPIO_1[rip]
	or	esi, DWORD PTR GPIO_2[rip]
.L21:
	mov	rdi, rbp
	call	cx23885_gpio_set@PLT
	mov	edi, 100
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	mdelay@PLT
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	edx, 1
	mov	esi, DWORD PTR GPIO_14[rip]
	or	esi, DWORD PTR GPIO_13[rip]
	call	mc417_gpio_enable@PLT
	mov	rdi, rbp
	mov	esi, DWORD PTR GPIO_14[rip]
	or	esi, DWORD PTR GPIO_13[rip]
	call	mc417_gpio_clear@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_14[rip]
	mov	rdi, rbp
	call	mc417_gpio_set@PLT
	mov	edi, 100
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	mdelay@PLT
	.p2align 4,,10
	.p2align 3
.L15:
	.cfi_restore_state
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 262144
	call	cx_set@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 196612
	call	cx_clear@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 262148
	call	cx_set@PLT
	mov	edi, DWORD PTR MC417_CTL[rip]
	mov	esi, 55
	call	cx_write@PLT
	mov	edi, DWORD PTR MC417_OEN[rip]
	mov	esi, 4096
	call	cx_write@PLT
	mov	edi, DWORD PTR MC417_RWD[rip]
	mov	esi, 49920
	call	cx_write@PLT
	mov	edi, DWORD PTR GPIO_ISM[rip]
	xor	esi, esi
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx_write@PLT
	.p2align 4,,10
	.p2align 3
.L14:
	.cfi_restore_state
	mov	edx, 1
	mov	esi, DWORD PTR GPIO_0[rip]
	or	esi, DWORD PTR GPIO_1[rip]
	call	cx23885_gpio_enable@PLT
	mov	esi, DWORD PTR GPIO_0[rip]
	mov	rdi, rbp
	or	esi, DWORD PTR GPIO_1[rip]
	call	cx23885_gpio_clear@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_0[rip]
	or	esi, DWORD PTR GPIO_1[rip]
	jmp	.L21
	.p2align 4,,10
	.p2align 3
.L12:
	mov	edx, 1
	mov	esi, DWORD PTR GPIO_15[rip]
	or	esi, DWORD PTR GPIO_14[rip]
	call	mc417_gpio_enable@PLT
	mov	rdi, rbp
	mov	esi, DWORD PTR GPIO_15[rip]
	or	esi, DWORD PTR GPIO_14[rip]
	call	mc417_gpio_clear@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	rdi, rbp
	mov	esi, DWORD PTR GPIO_15[rip]
	or	esi, DWORD PTR GPIO_14[rip]
	call	mc417_gpio_set@PLT
	mov	edi, 100
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_2[rip]
	mov	edx, 1
	mov	rdi, rbp
	call	cx23885_gpio_enable@PLT
	mov	esi, DWORD PTR GPIO_2[rip]
	mov	rdi, rbp
	call	cx23885_gpio_set@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_2[rip]
	mov	rdi, rbp
	call	cx23885_gpio_clear@PLT
	mov	edi, 20
	call	mdelay@PLT
	mov	esi, DWORD PTR GPIO_2[rip]
	mov	rdi, rbp
	call	cx23885_gpio_set@PLT
	mov	edi, 20
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	mdelay@PLT
	.p2align 4,,10
	.p2align 3
.L16:
	.cfi_restore_state
	mov	edi, DWORD PTR MC417_CTL[rip]
	mov	esi, 54
	call	cx_write@PLT
	mov	edi, DWORD PTR MC417_OEN[rip]
	mov	esi, 4096
	call	cx_write@PLT
	mov	edi, DWORD PTR MC417_RWD[rip]
	mov	esi, 2
	call	cx_set@PLT
	mov	edi, 200
	call	mdelay@PLT
	mov	edi, DWORD PTR MC417_RWD[rip]
	mov	esi, 2048
	call	cx_clear@PLT
	mov	edi, 200
	call	mdelay@PLT
	mov	edi, DWORD PTR MC417_RWD[rip]
	mov	esi, 2048
	call	cx_set@PLT
	mov	edi, 200
	pop	rbp
	.cfi_remember_state
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	mdelay@PLT
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 327680
	call	cx_set@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 5
	call	cx_clear@PLT
	mov	edi, 5
	call	msleep@PLT
	mov	edi, DWORD PTR GP0_IO[rip]
	mov	esi, 327685
	pop	rbp
	.cfi_restore 6
	.cfi_def_cfa_offset 8
	jmp	cx_set@PLT
.L1:
	ret
	.cfi_endproc
.LFE0:
	.size	cx23885_gpio_setup, .-cx23885_gpio_setup
	.comm	MC417_RWD,4,4
	.comm	MC417_OEN,4,4
	.comm	MC417_CTL,4,4
	.comm	GPIO_ISM,4,4
	.comm	GPIO_9,4,4
	.comm	GPIO_6,4,4
	.comm	GPIO_5,4,4
	.comm	GPIO_2,4,4
	.comm	GPIO_15,4,4
	.comm	GPIO_14,4,4
	.comm	GPIO_13,4,4
	.comm	GPIO_1,4,4
	.comm	GPIO_0,4,4
	.comm	GP0_IO,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_cx23885-cards.c_cx23885_gpio_setup.c"
	.text
	.align	2
	.global	cx23885_gpio_setup
	.syntax unified
	.arm
	.fpu softvfp
	.type	cx23885_gpio_setup, %function
cx23885_gpio_setup:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, [r0]
	push	{r4, r5, r6, r7, r8, lr}
	sub	r3, r3, #128
	mov	r4, r0
	cmp	r3, #24
	ldrls	pc, [pc, r3, asl #2]
	b	.L1
.L4:
	.word	.L16
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L13
	.word	.L3
	.word	.L3
	.word	.L9
	.word	.L12
	.word	.L7
	.word	.L11
	.word	.L10
	.word	.L7
	.word	.L9
	.word	.L8
	.word	.L8
	.word	.L8
	.word	.L6
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L5
	.word	.L5
	.word	.L3
	.word	.L3
.L8:
	ldr	r5, .L19
	ldr	r7, .L19+4
	ldr	r6, .L19+8
	ldr	r2, [r7]
	ldr	r3, [r5]
	ldr	r1, [r6]
	orr	r3, r3, r2
	orr	r1, r3, r1
	mov	r2, #1
	bl	cx23885_gpio_enable
	ldr	r2, [r7]
	ldr	r3, [r5]
	ldr	r1, [r6]
	orr	r3, r3, r2
	orr	r1, r3, r1
	mov	r0, r4
	bl	cx23885_gpio_set
	ldr	r1, [r5]
	mov	r0, r4
	bl	cx23885_gpio_clear
	mov	r0, #20
	bl	mdelay
	mov	r0, r4
	ldr	r1, [r5]
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx23885_gpio_set
.L3:
	ldr	r4, .L19+12
	mov	r1, #262144
	ldr	r0, [r4]
	bl	cx_set
	mov	r0, #20
	bl	mdelay
	mov	r1, #4
	ldr	r0, [r4]
	bl	cx_clear
	mov	r0, #20
	bl	mdelay
	ldr	r0, [r4]
	ldr	r1, .L19+16
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx_set
.L7:
	ldr	r4, .L19+12
	mov	r1, #327680
	ldr	r0, [r4]
	bl	cx_set
	mov	r0, #20
	bl	mdelay
	mov	r1, #5
	ldr	r0, [r4]
	bl	cx_clear
	mov	r0, #20
	bl	mdelay
	ldr	r0, [r4]
	ldr	r1, .L19+20
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx_set
.L6:
	ldr	r3, .L19+12
	ldr	r1, .L19+24
	ldr	r0, [r3]
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx_set
.L5:
	ldr	r4, .L19+12
	mov	r1, #983040
	ldr	r0, [r4]
	bl	cx_set
	mov	r0, #20
	bl	mdelay
	mov	r1, #15
	ldr	r0, [r4]
	bl	cx_clear
	mov	r0, #20
	bl	mdelay
	ldr	r0, [r4]
	ldr	r1, .L19+28
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx_set
.L13:
	ldr	r6, .L19+32
	ldr	r7, .L19+36
	ldr	r5, .L19+40
	ldr	r2, [r6]
	ldr	r3, [r7]
	ldr	r1, [r5]
	orr	r3, r3, r2
	orr	r1, r3, r1
	mov	r2, #1
	bl	cx23885_gpio_enable
	ldr	r3, [r5]
	ldr	r1, [r6]
	mov	r0, r4
	orr	r1, r1, r3
	bl	cx23885_gpio_clear
	mov	r0, #100
	bl	mdelay
	ldr	r3, [r7]
	ldr	r2, [r6]
	ldr	r1, [r5]
	orr	r3, r3, r2
	mov	r0, r4
	orr	r1, r3, r1
	bl	cx23885_gpio_set
	pop	{r4, r5, r6, r7, r8, lr}
	mov	r0, #100
	b	mdelay
.L9:
	ldr	r5, .L19+44
	ldr	r6, .L19+48
	ldr	r1, [r5]
	ldr	r3, [r6]
	mov	r2, #1
	orr	r1, r1, r3
	bl	mc417_gpio_enable
	ldr	r3, [r6]
	ldr	r1, [r5]
	mov	r0, r4
	orr	r1, r1, r3
	bl	mc417_gpio_clear
	mov	r0, #100
	bl	mdelay
	mov	r0, r4
	ldr	r1, [r5]
	bl	mc417_gpio_set
	pop	{r4, r5, r6, r7, r8, lr}
	mov	r0, #100
	b	mdelay
.L14:
	ldr	r6, .L19+36
	ldr	r5, .L19+32
	ldr	r1, [r6]
	ldr	r3, [r5]
	mov	r2, #1
	orr	r1, r1, r3
	bl	cx23885_gpio_enable
	ldr	r3, [r5]
	ldr	r1, [r6]
	mov	r0, r4
	orr	r1, r1, r3
	bl	cx23885_gpio_clear
	mov	r0, #100
	bl	mdelay
	ldr	r1, [r6]
	ldr	r3, [r5]
	mov	r0, r4
	orr	r1, r1, r3
	bl	cx23885_gpio_set
	pop	{r4, r5, r6, r7, r8, lr}
	mov	r0, #100
	b	mdelay
.L10:
	ldr	r4, .L19+12
	mov	r1, #327680
	ldr	r0, [r4]
	bl	cx_set
	mov	r1, #5
	ldr	r0, [r4]
	bl	cx_clear
	mov	r0, #5
	bl	msleep
	ldr	r0, [r4]
	ldr	r1, .L19+20
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx_set
.L16:
	ldr	r3, .L19+52
	mov	r1, #54
	ldr	r0, [r3]
	bl	cx_write
	ldr	r3, .L19+56
	ldr	r4, .L19+60
	ldr	r0, [r3]
	mov	r1, #4096
	bl	cx_write
	mov	r1, #2
	ldr	r0, [r4]
	bl	cx_set
	mov	r0, #200
	bl	mdelay
	mov	r1, #2048
	ldr	r0, [r4]
	bl	cx_clear
	mov	r0, #200
	bl	mdelay
	ldr	r0, [r4]
	mov	r1, #2048
	bl	cx_set
	pop	{r4, r5, r6, r7, r8, lr}
	mov	r0, #200
	b	mdelay
.L12:
	ldr	r6, .L19+64
	ldr	r5, .L19+44
	ldr	r1, [r6]
	ldr	r3, [r5]
	mov	r2, #1
	orr	r1, r1, r3
	bl	mc417_gpio_enable
	ldr	r3, [r5]
	ldr	r1, [r6]
	mov	r0, r4
	orr	r1, r1, r3
	bl	mc417_gpio_clear
	mov	r0, #100
	bl	mdelay
	ldr	r3, [r5]
	ldr	r1, [r6]
	ldr	r5, .L19+40
	orr	r1, r1, r3
	mov	r0, r4
	bl	mc417_gpio_set
	mov	r0, #100
	bl	mdelay
	mov	r2, #1
	ldr	r1, [r5]
	mov	r0, r4
	bl	cx23885_gpio_enable
	ldr	r1, [r5]
	mov	r0, r4
	bl	cx23885_gpio_set
	mov	r0, #20
	bl	mdelay
	ldr	r1, [r5]
	mov	r0, r4
	bl	cx23885_gpio_clear
	mov	r0, #20
	bl	mdelay
	mov	r0, r4
	ldr	r1, [r5]
	bl	cx23885_gpio_set
	pop	{r4, r5, r6, r7, r8, lr}
	mov	r0, #20
	b	mdelay
.L11:
	ldr	r3, .L19+12
	ldr	r1, .L19+20
	ldr	r0, [r3]
	pop	{r4, r5, r6, r7, r8, lr}
	b	cx_set
.L15:
	ldr	r4, .L19+12
	mov	r1, #262144
	ldr	r0, [r4]
	bl	cx_set
	ldr	r1, .L19+68
	ldr	r0, [r4]
	bl	cx_clear
	mov	r0, #100
	bl	mdelay
	ldr	r0, [r4]
	ldr	r1, .L19+16
	bl	cx_set
	ldr	r3, .L19+52
	mov	r1, #55
	ldr	r0, [r3]
	bl	cx_write
	ldr	r3, .L19+56
	mov	r1, #4096
	ldr	r0, [r3]
	bl	cx_write
	ldr	r3, .L19+60
	mov	r1, #49920
	ldr	r0, [r3]
	bl	cx_write
	pop	{r4, r5, r6, r7, r8, lr}
	ldr	r3, .L19+72
	mov	r1, #0
	ldr	r0, [r3]
	b	cx_write
.L1:
	pop	{r4, r5, r6, r7, r8, pc}
.L20:
	.align	2
.L19:
	.word	GPIO_9
	.word	GPIO_6
	.word	GPIO_5
	.word	GP0_IO
	.word	262148
	.word	327685
	.word	65537
	.word	983055
	.word	GPIO_1
	.word	GPIO_0
	.word	GPIO_2
	.word	GPIO_14
	.word	GPIO_13
	.word	MC417_CTL
	.word	MC417_OEN
	.word	MC417_RWD
	.word	GPIO_15
	.word	196612
	.word	GPIO_ISM
	.size	cx23885_gpio_setup, .-cx23885_gpio_setup
	.comm	MC417_RWD,4,4
	.comm	MC417_OEN,4,4
	.comm	MC417_CTL,4,4
	.comm	GPIO_ISM,4,4
	.comm	GPIO_9,4,4
	.comm	GPIO_6,4,4
	.comm	GPIO_5,4,4
	.comm	GPIO_2,4,4
	.comm	GPIO_15,4,4
	.comm	GPIO_14,4,4
	.comm	GPIO_13,4,4
	.comm	GPIO_1,4,4
	.comm	GPIO_0,4,4
	.comm	GP0_IO,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
