	.file	"extr_gfx_v6_0.c_gfx_v6_0_rlc_init.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"(%d) create RLC c bo failed\n"
	.text
	.p2align 4
	.type	gfx_v6_0_rlc_init, @function
gfx_v6_0_rlc_init:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	mov	rdi, QWORD PTR verde_rlc_save_restore_register_list[rip]
	mov	QWORD PTR 0[rbp], rdi
	call	ARRAY_SIZE@PLT
	mov	rbx, QWORD PTR si_cs_data[rip]
	cmp	QWORD PTR 0[rbp], 0
	mov	DWORD PTR 8[rbp], eax
	mov	QWORD PTR 40[rbp], rbx
	je	.L5
	mov	esi, eax
	mov	rdi, rbp
	call	amdgpu_gfx_rlc_init_sr@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L1
.L5:
	xor	r12d, r12d
	test	rbx, rbx
	je	.L1
	mov	rdi, rbp
	call	gfx_v6_0_get_csb_size@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 56
	lea	r9, 32[rbp]
	mov	rdi, rbp
	mov	DWORD PTR 12[rbp], eax
	mov	edx, DWORD PTR PAGE_SIZE[rip]
	lea	r8, 24[rbp]
	lea	esi, 256[0+rax*4]
	lea	rax, 16[rbp]
	mov	ecx, DWORD PTR AMDGPU_GEM_DOMAIN_VRAM[rip]
	push	rax
	.cfi_def_cfa_offset 64
	call	amdgpu_bo_create_reserved@PLT
	mov	r12d, eax
	pop	rax
	.cfi_def_cfa_offset 56
	pop	rdx
	.cfi_def_cfa_offset 48
	test	r12d, r12d
	jne	.L9
	mov	rax, QWORD PTR 32[rbp]
	mov	rbx, QWORD PTR 16[rbp]
	lea	r13, 256[rax]
	mov	rdi, r13
	call	upper_32_bits@PLT
	mov	edi, eax
	call	cpu_to_le32@PLT
	mov	rdi, r13
	mov	DWORD PTR [rbx], eax
	call	lower_32_bits@PLT
	mov	edi, eax
	call	cpu_to_le32@PLT
	mov	DWORD PTR 4[rbx], eax
	mov	edi, DWORD PTR 12[rbp]
	call	cpu_to_le32@PLT
	lea	rsi, 256[rbx]
	mov	rdi, rbp
	mov	DWORD PTR 8[rbx], eax
	call	gfx_v6_0_get_csb_buffer@PLT
	mov	edi, DWORD PTR 24[rbp]
	call	amdgpu_bo_kunmap@PLT
	mov	edi, DWORD PTR 24[rbp]
	call	amdgpu_bo_unreserve@PLT
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L9:
	.cfi_restore_state
	mov	edi, DWORD PTR 48[rbp]
	mov	edx, r12d
	lea	rsi, .LC0[rip]
	call	dev_warn@PLT
	mov	rdi, rbp
	call	amdgpu_gfx_rlc_fini@PLT
	add	rsp, 8
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	gfx_v6_0_rlc_init, .-gfx_v6_0_rlc_init
	.comm	verde_rlc_save_restore_register_list,8,8
	.comm	si_cs_data,8,8
	.comm	PAGE_SIZE,4,4
	.comm	AMDGPU_GEM_DOMAIN_VRAM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gfx_v6_0.c_gfx_v6_0_rlc_init.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"(%d) create RLC c bo failed\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gfx_v6_0_rlc_init, %function
gfx_v6_0_rlc_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	mov	r4, r0
	ldr	r3, .L10
	sub	sp, sp, #20
	ldr	r0, [r3]
	str	r0, [r4]
	bl	ARRAY_SIZE
	ldr	r2, .L10+4
	ldr	r3, [r4]
	ldr	r6, [r2]
	cmp	r3, #0
	str	r0, [r4, #4]
	str	r6, [r4, #24]
	beq	.L5
	mov	r1, r0
	mov	r0, r4
	bl	amdgpu_gfx_rlc_init_sr
	subs	r5, r0, #0
	bne	.L1
.L5:
	cmp	r6, #0
	moveq	r5, r6
	beq	.L1
	mov	r0, r4
	bl	gfx_v6_0_get_csb_size
	ldr	r3, .L10+8
	ldr	r2, .L10+12
	add	ip, r4, #12
	str	r0, [r4, #8]
	ldr	r3, [r3]
	ldr	r2, [r2]
	add	r1, r0, #64
	str	ip, [sp, #8]
	add	r0, r4, #20
	add	ip, r4, #16
	str	r0, [sp, #4]
	lsl	r1, r1, #2
	mov	r0, r4
	str	ip, [sp]
	bl	amdgpu_bo_create_reserved
	subs	r5, r0, #0
	bne	.L9
	ldr	r6, [r4, #20]
	ldr	r7, [r4, #12]
	add	r6, r6, #256
	mov	r0, r6
	bl	upper_32_bits
	bl	cpu_to_le32
	mov	r3, r0
	mov	r0, r6
	str	r3, [r7]
	bl	lower_32_bits
	bl	cpu_to_le32
	str	r0, [r7, #4]
	ldr	r0, [r4, #8]
	bl	cpu_to_le32
	add	r1, r7, #256
	str	r0, [r7, #8]
	mov	r0, r4
	bl	gfx_v6_0_get_csb_buffer
	ldr	r0, [r4, #16]
	bl	amdgpu_bo_kunmap
	ldr	r0, [r4, #16]
	bl	amdgpu_bo_unreserve
.L1:
	mov	r0, r5
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L9:
	mov	r2, r5
	ldr	r1, .L10+16
	ldr	r0, [r4, #28]
	bl	dev_warn
	mov	r0, r4
	bl	amdgpu_gfx_rlc_fini
	mov	r0, r5
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L11:
	.align	2
.L10:
	.word	verde_rlc_save_restore_register_list
	.word	si_cs_data
	.word	AMDGPU_GEM_DOMAIN_VRAM
	.word	PAGE_SIZE
	.word	.LC0
	.size	gfx_v6_0_rlc_init, .-gfx_v6_0_rlc_init
	.comm	verde_rlc_save_restore_register_list,4,4
	.comm	si_cs_data,4,4
	.comm	PAGE_SIZE,4,4
	.comm	AMDGPU_GEM_DOMAIN_VRAM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
