	.file	"extr_snps_udc_core.c_activate_control_endpoints.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"activate_control_endpoints\n"
	.text
	.p2align 4
	.type	activate_control_endpoints, @function
activate_control_endpoints:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	lea	rsi, .LC0[rip]
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	DBG@PLT
	mov	rax, QWORD PTR UDC_EP0IN_IX[rip]
	mov	r12, QWORD PTR [rbx]
	lea	rax, [rax+rax*4]
	lea	rax, [r12+rax*8]
	mov	rdi, QWORD PTR 24[rax]
	call	readl@PLT
	mov	edi, DWORD PTR UDC_EPCTL_F[rip]
	mov	ebp, eax
	call	AMD_BIT@PLT
	mov	rdx, QWORD PTR UDC_EP0IN_IX[rip]
	mov	r13, QWORD PTR [rbx]
	mov	edi, ebp
	or	edi, eax
	lea	rdx, [rdx+rdx*4]
	lea	rdx, 0[r13+rdx*8]
	mov	rsi, QWORD PTR 24[rdx]
	call	writel@PLT
	mov	rax, QWORD PTR UDC_EP0IN_IX[rip]
	mov	rdx, QWORD PTR [rbx]
	mov	rcx, QWORD PTR UDC_EP0OUT_IX[rip]
	lea	rax, [rax+rax*4]
	lea	rax, [rdx+rax*8]
	lea	rcx, [rcx+rcx*4]
	mov	DWORD PTR [rax], 1
	mov	rdi, QWORD PTR 24[rax]
	mov	DWORD PTR [rdx+rcx*8], 0
	add	rdi, 16
	call	readl@PLT
	mov	edi, eax
	mov	rax, QWORD PTR 24[rbx]
	cmp	rax, QWORD PTR USB_SPEED_FULL[rip]
	je	.L23
	cmp	rax, QWORD PTR USB_SPEED_HIGH[rip]
	je	.L24
.L3:
	mov	rax, QWORD PTR UDC_EP0IN_IX[rip]
	mov	r11, QWORD PTR [rbx]
	lea	rdx, [rax+rax*4]
	lea	rdx, [r11+rdx*8]
	mov	rsi, QWORD PTR 24[rdx]
	add	rsi, 16
	call	writel@PLT
	mov	rax, QWORD PTR UDC_EP0IN_IX[rip]
	mov	rbp, QWORD PTR [rbx]
	lea	rax, [rax+rax*4]
	lea	rax, 0[rbp+rax*8]
	mov	rdi, QWORD PTR 24[rax]
	add	rdi, 12
	call	readl@PLT
	mov	edi, eax
	mov	rax, QWORD PTR 24[rbx]
	cmp	rax, QWORD PTR USB_SPEED_FULL[rip]
	je	.L25
	cmp	rax, QWORD PTR USB_SPEED_HIGH[rip]
	je	.L26
.L5:
	mov	rax, QWORD PTR UDC_EP0IN_IX[rip]
	mov	r9, QWORD PTR [rbx]
	lea	rdx, [rax+rax*4]
	lea	rdx, [r9+rdx*8]
	mov	rsi, QWORD PTR 24[rdx]
	add	rsi, 12
	call	writel@PLT
	mov	rax, QWORD PTR UDC_EP0OUT_IX[rip]
	mov	r10, QWORD PTR [rbx]
	lea	rax, [rax+rax*4]
	lea	rax, [r10+rax*8]
	mov	rdi, QWORD PTR 24[rax]
	add	rdi, 12
	call	readl@PLT
	mov	edi, eax
	mov	rax, QWORD PTR 24[rbx]
	cmp	rax, QWORD PTR USB_SPEED_FULL[rip]
	je	.L27
	cmp	rax, QWORD PTR USB_SPEED_HIGH[rip]
	je	.L28
.L7:
	mov	rax, QWORD PTR UDC_EP0OUT_IX[rip]
	mov	r8, QWORD PTR [rbx]
	lea	rdx, [rax+rax*4]
	lea	rdx, [r8+rdx*8]
	mov	rsi, QWORD PTR 24[rdx]
	add	rsi, 12
	call	writel@PLT
	mov	rax, QWORD PTR 16[rbx]
	mov	rdi, QWORD PTR [rax]
	call	readl@PLT
	mov	edi, eax
	mov	rax, QWORD PTR 24[rbx]
	cmp	rax, QWORD PTR USB_SPEED_FULL[rip]
	je	.L29
	cmp	rax, QWORD PTR USB_SPEED_HIGH[rip]
	je	.L30
.L9:
	mov	rax, QWORD PTR 16[rbx]
	mov	rsi, QWORD PTR [rax]
	call	writel@PLT
	cmp	QWORD PTR use_dma[rip], 0
	jne	.L31
.L10:
	mov	rax, QWORD PTR UDC_EP0IN_IX[rip]
	mov	rdx, QWORD PTR [rbx]
	lea	rax, [rax+rax*4]
	lea	rax, [rdx+rax*8]
	mov	rdi, QWORD PTR 24[rax]
	call	readl@PLT
	mov	edi, DWORD PTR UDC_EPCTL_CNAK[rip]
	mov	ebp, eax
	call	AMD_BIT@PLT
	mov	rdx, QWORD PTR UDC_EP0IN_IX[rip]
	mov	rcx, QWORD PTR [rbx]
	mov	edi, ebp
	or	edi, eax
	lea	rdx, [rdx+rdx*4]
	lea	rdx, [rcx+rdx*8]
	mov	rsi, QWORD PTR 24[rdx]
	call	writel@PLT
	mov	rsi, QWORD PTR UDC_EP0IN_IX[rip]
	mov	rax, QWORD PTR [rbx]
	lea	rdx, [rsi+rsi*4]
	lea	rdi, [rax+rdx*8]
	mov	QWORD PTR 16[rdi], 0
	call	UDC_QUEUE_CNAK@PLT
	mov	rax, QWORD PTR UDC_EP0OUT_IX[rip]
	mov	rsi, QWORD PTR [rbx]
	lea	rax, [rax+rax*4]
	lea	rax, [rsi+rax*8]
	mov	rdi, QWORD PTR 24[rax]
	call	readl@PLT
	mov	edi, DWORD PTR UDC_EPCTL_CNAK[rip]
	mov	ebp, eax
	call	AMD_BIT@PLT
	mov	rdx, QWORD PTR UDC_EP0OUT_IX[rip]
	mov	rdi, QWORD PTR [rbx]
	lea	rdx, [rdx+rdx*4]
	lea	rdx, [rdi+rdx*8]
	mov	edi, ebp
	mov	rsi, QWORD PTR 24[rdx]
	or	edi, eax
	call	writel@PLT
	mov	rsi, QWORD PTR UDC_EP0OUT_IX[rip]
	mov	rax, QWORD PTR [rbx]
	lea	rdx, [rsi+rsi*4]
	lea	rdi, [rax+rdx*8]
	mov	QWORD PTR 16[rdi], 0
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	jmp	UDC_QUEUE_CNAK@PLT
	.p2align 4,,10
	.p2align 3
.L31:
	.cfi_restore_state
	mov	edi, DWORD PTR UDC_DMA_OUT_STS_L[rip]
	call	AMD_BIT@PLT
	mov	r8d, eax
	mov	rax, QWORD PTR UDC_EP0OUT_IX[rip]
	lea	rdx, [rax+rax*4]
	mov	rax, QWORD PTR [rbx]
	lea	rax, [rax+rdx*8]
	mov	rdx, QWORD PTR 32[rax]
	mov	rcx, QWORD PTR 24[rax]
	mov	edi, DWORD PTR 4[rax]
	or	DWORD PTR [rdx], r8d
	lea	rsi, 8[rcx]
	call	writel@PLT
	mov	rax, QWORD PTR UDC_EP0OUT_IX[rip]
	lea	rdx, [rax+rax*4]
	mov	rax, QWORD PTR [rbx]
	lea	rax, [rax+rdx*8]
	mov	rcx, QWORD PTR 24[rax]
	mov	edi, DWORD PTR 8[rax]
	lea	rsi, 4[rcx]
	call	writel@PLT
	lea	rdi, udc_timer[rip]
	call	timer_pending@PLT
	test	rax, rax
	jne	.L32
.L11:
	lea	rdi, udc_pollstall_timer[rip]
	call	timer_pending@PLT
	test	rax, rax
	jne	.L33
.L12:
	mov	rdi, QWORD PTR 8[rbx]
	call	readl@PLT
	mov	edi, DWORD PTR UDC_DEVCTL_MODE[rip]
	mov	r13d, eax
	call	AMD_BIT@PLT
	mov	edi, DWORD PTR UDC_DEVCTL_RDE[rip]
	mov	ebp, eax
	call	AMD_BIT@PLT
	mov	edi, DWORD PTR UDC_DEVCTL_TDE[rip]
	or	ebp, r13d
	mov	r12d, eax
	call	AMD_BIT@PLT
	or	ebp, r12d
	or	ebp, eax
	cmp	QWORD PTR use_dma_bufferfill_mode[rip], 0
	jne	.L34
	cmp	QWORD PTR use_dma_ppb_du[rip], 0
	jne	.L35
.L14:
	mov	rsi, QWORD PTR 8[rbx]
	mov	edi, ebp
	call	writel@PLT
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L29:
	mov	edx, DWORD PTR UDC_CSR_NE_MAX_PKT[rip]
	mov	esi, DWORD PTR UDC_FS_EP0OUT_MAX_PKT_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L27:
	mov	edx, DWORD PTR UDC_EP_MAX_PKT_SIZE[rip]
	mov	esi, DWORD PTR UDC_FS_EP0OUT_MAX_PKT_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L25:
	mov	edx, DWORD PTR UDC_EP_MAX_PKT_SIZE[rip]
	mov	esi, DWORD PTR UDC_FS_EP0IN_MAX_PKT_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L23:
	mov	edx, DWORD PTR UDC_EPIN_BUFF_SIZE[rip]
	mov	esi, DWORD PTR UDC_FS_EPIN0_BUFF_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L35:
	mov	edi, DWORD PTR UDC_DEVCTL_DU[rip]
	call	AMD_BIT@PLT
	or	ebp, eax
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L28:
	mov	edx, DWORD PTR UDC_EP_MAX_PKT_SIZE[rip]
	mov	esi, DWORD PTR UDC_EP0OUT_MAX_PKT_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L30:
	mov	edx, DWORD PTR UDC_CSR_NE_MAX_PKT[rip]
	mov	esi, DWORD PTR UDC_EP0OUT_MAX_PKT_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L24:
	mov	edx, DWORD PTR UDC_EPIN_BUFF_SIZE[rip]
	mov	esi, DWORD PTR UDC_EPIN0_BUFF_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L26:
	mov	edx, DWORD PTR UDC_EP_MAX_PKT_SIZE[rip]
	mov	esi, DWORD PTR UDC_EP0IN_MAX_PKT_SIZE[rip]
	call	AMD_ADDBITS@PLT
	mov	edi, eax
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L34:
	mov	edi, DWORD PTR UDC_DEVCTL_BF[rip]
	call	AMD_BIT@PLT
	mov	rsi, QWORD PTR 8[rbx]
	or	ebp, eax
	mov	edi, ebp
	call	writel@PLT
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L33:
	mov	rax, QWORD PTR jiffies[rip]
	lea	rdi, udc_pollstall_timer[rip]
	lea	rsi, -1[rax]
	call	mod_timer@PLT
	jmp	.L12
	.p2align 4,,10
	.p2align 3
.L32:
	mov	rax, QWORD PTR jiffies[rip]
	lea	rdi, udc_timer[rip]
	mov	QWORD PTR set_rde[rip], 0
	lea	rsi, -1[rax]
	call	mod_timer@PLT
	jmp	.L11
	.cfi_endproc
.LFE0:
	.size	activate_control_endpoints, .-activate_control_endpoints
	.comm	use_dma_ppb_du,8,8
	.comm	use_dma_bufferfill_mode,8,8
	.comm	use_dma,8,8
	.comm	udc_timer,4,4
	.comm	udc_pollstall_timer,4,4
	.comm	set_rde,8,8
	.comm	jiffies,8,8
	.comm	USB_SPEED_HIGH,8,8
	.comm	USB_SPEED_FULL,8,8
	.comm	UDC_FS_EPIN0_BUFF_SIZE,4,4
	.comm	UDC_FS_EP0OUT_MAX_PKT_SIZE,4,4
	.comm	UDC_FS_EP0IN_MAX_PKT_SIZE,4,4
	.comm	UDC_EP_MAX_PKT_SIZE,4,4
	.comm	UDC_EPIN_BUFF_SIZE,4,4
	.comm	UDC_EPIN0_BUFF_SIZE,4,4
	.comm	UDC_EPCTL_F,4,4
	.comm	UDC_EPCTL_CNAK,4,4
	.comm	UDC_EP0OUT_MAX_PKT_SIZE,4,4
	.comm	UDC_EP0OUT_IX,8,8
	.comm	UDC_EP0IN_MAX_PKT_SIZE,4,4
	.comm	UDC_EP0IN_IX,8,8
	.comm	UDC_DMA_OUT_STS_L,4,4
	.comm	UDC_DEVCTL_TDE,4,4
	.comm	UDC_DEVCTL_RDE,4,4
	.comm	UDC_DEVCTL_MODE,4,4
	.comm	UDC_DEVCTL_DU,4,4
	.comm	UDC_DEVCTL_BF,4,4
	.comm	UDC_CSR_NE_MAX_PKT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_snps_udc_core.c_activate_control_endpoints.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"activate_control_endpoints\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	activate_control_endpoints, %function
activate_control_endpoints:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r0
	ldr	r5, .L42
	ldr	r1, .L42+4
	bl	DBG
	ldr	r3, [r5]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r0, [r3, #16]
	bl	readl
	ldr	r3, .L42+8
	mov	r6, r0
	ldr	r0, [r3]
	bl	AMD_BIT
	ldr	r3, [r5]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r1, [r3, #16]
	orr	r0, r6, r0
	bl	writel
	mov	lr, #1
	mov	ip, #0
	ldr	r2, [r5]
	ldr	r6, .L42+12
	ldr	r1, [r4]
	ldr	r3, [r6]
	add	r2, r2, r2, lsl lr
	add	r0, r1, r2, lsl #3
	ldr	r0, [r0, #16]
	add	r3, r3, r3, lsl lr
	lsl	r3, r3, #3
	ldr	r7, .L42+16
	str	lr, [r1, r2, lsl #3]
	add	r0, r0, #16
	str	ip, [r1, r3]
	bl	readl
	ldr	r2, [r4, #12]
	ldr	r1, [r7]
	cmp	r2, r1
	beq	.L29
	ldr	r1, .L42+20
	mov	r3, r0
	ldr	r1, [r1]
	cmp	r2, r1
	beq	.L30
.L3:
	ldr	r2, [r5]
	ldr	r1, [r4]
	add	r2, r2, r2, lsl #1
	add	r2, r1, r2, lsl #3
	ldr	r1, [r2, #16]
	mov	r0, r3
	add	r1, r1, #16
	bl	writel
	ldr	r3, [r5]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r0, [r3, #16]
	add	r0, r0, #12
	bl	readl
	ldr	r2, [r4, #12]
	ldr	r1, [r7]
	mov	r3, r0
	cmp	r2, r1
	beq	.L31
	ldr	r1, .L42+20
	ldr	r1, [r1]
	cmp	r2, r1
	beq	.L32
.L5:
	ldr	r2, [r5]
	ldr	r1, [r4]
	add	r2, r2, r2, lsl #1
	add	r2, r1, r2, lsl #3
	ldr	r1, [r2, #16]
	mov	r0, r3
	add	r1, r1, #12
	bl	writel
	ldr	r3, [r6]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r0, [r3, #16]
	add	r0, r0, #12
	bl	readl
	ldr	r2, [r4, #12]
	ldr	r1, [r7]
	mov	r3, r0
	cmp	r2, r1
	beq	.L33
	ldr	r1, .L42+20
	ldr	r1, [r1]
	cmp	r2, r1
	beq	.L34
.L7:
	ldr	r2, [r6]
	ldr	r1, [r4]
	add	r2, r2, r2, lsl #1
	add	r2, r1, r2, lsl #3
	ldr	r1, [r2, #16]
	mov	r0, r3
	add	r1, r1, #12
	bl	writel
	ldr	r3, [r4, #8]
	ldr	r0, [r3]
	bl	readl
	ldr	r1, [r7]
	ldr	r2, [r4, #12]
	mov	r3, r0
	cmp	r2, r1
	beq	.L35
	ldr	r1, .L42+20
	ldr	r1, [r1]
	cmp	r2, r1
	beq	.L36
.L9:
	ldr	r2, [r4, #8]
	mov	r0, r3
	ldr	r1, [r2]
	bl	writel
	ldr	r3, .L42+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L37
.L10:
	ldr	r3, [r5]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r0, [r3, #16]
	bl	readl
	ldr	r8, .L42+28
	mov	r9, r0
	ldr	r0, [r8]
	bl	AMD_BIT
	mov	r7, #0
	ldr	r3, [r5]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r1, [r3, #16]
	orr	r0, r9, r0
	bl	writel
	ldr	r1, [r5]
	ldr	r0, [r4]
	add	r3, r1, r1, lsl #1
	add	r0, r0, r3, lsl #3
	str	r7, [r0, #12]
	bl	UDC_QUEUE_CNAK
	ldr	r3, [r6]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r0, [r3, #16]
	bl	readl
	mov	r5, r0
	ldr	r0, [r8]
	bl	AMD_BIT
	ldr	r3, [r6]
	ldr	r2, [r4]
	add	r3, r3, r3, lsl #1
	add	r3, r2, r3, lsl #3
	ldr	r1, [r3, #16]
	orr	r0, r5, r0
	bl	writel
	ldr	r1, [r6]
	ldr	r0, [r4]
	add	r3, r1, r1, lsl #1
	add	r0, r0, r3, lsl #3
	str	r7, [r0, #12]
	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
	b	UDC_QUEUE_CNAK
.L37:
	ldr	r3, .L42+32
	ldr	r0, [r3]
	bl	AMD_BIT
	ldr	r2, [r6]
	ldr	r3, [r4]
	add	r2, r2, r2, lsl #1
	add	r3, r3, r2, lsl #3
	ldr	ip, [r3, #20]
	ldr	r1, [r3, #16]
	ldr	r2, [ip]
	add	r1, r1, #8
	orr	r2, r2, r0
	str	r2, [ip]
	ldr	r0, [r3, #4]
	bl	writel
	ldr	r2, [r6]
	ldr	r3, [r4]
	add	r2, r2, r2, lsl #1
	add	r3, r3, r2, lsl #3
	ldr	r1, [r3, #16]
	ldr	r0, [r3, #8]
	add	r1, r1, #4
	bl	writel
	ldr	r0, .L42+36
	bl	timer_pending
	cmp	r0, #0
	bne	.L38
.L11:
	ldr	r0, .L42+40
	bl	timer_pending
	cmp	r0, #0
	bne	.L39
.L12:
	ldr	r0, [r4, #4]
	bl	readl
	ldr	r3, .L42+44
	mov	r9, r0
	ldr	r0, [r3]
	bl	AMD_BIT
	ldr	r3, .L42+48
	mov	r7, r0
	ldr	r0, [r3]
	bl	AMD_BIT
	ldr	r3, .L42+52
	mov	r8, r0
	ldr	r0, [r3]
	bl	AMD_BIT
	ldr	r3, .L42+56
	orr	r7, r7, r9
	ldr	r3, [r3]
	orr	r7, r8, r7
	cmp	r3, #0
	orr	r7, r7, r0
	bne	.L40
	ldr	r3, .L42+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L41
.L14:
	mov	r0, r7
	ldr	r1, [r4, #4]
	bl	writel
	b	.L10
.L35:
	ldr	r3, .L42+64
	ldr	r2, .L42+68
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L9
.L33:
	ldr	r3, .L42+64
	ldr	r2, .L42+72
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L7
.L31:
	ldr	r3, .L42+76
	ldr	r2, .L42+72
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L5
.L29:
	ldr	r3, .L42+80
	ldr	r2, .L42+84
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L3
.L41:
	ldr	r3, .L42+88
	ldr	r0, [r3]
	bl	AMD_BIT
	orr	r7, r7, r0
	b	.L14
.L34:
	ldr	r3, .L42+92
	ldr	r2, .L42+72
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L7
.L36:
	ldr	r3, .L42+92
	ldr	r2, .L42+68
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L9
.L30:
	ldr	r3, .L42+96
	ldr	r2, .L42+84
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L3
.L32:
	ldr	r3, .L42+100
	ldr	r2, .L42+72
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	AMD_ADDBITS
	mov	r3, r0
	b	.L5
.L40:
	ldr	r3, .L42+104
	ldr	r0, [r3]
	bl	AMD_BIT
	orr	r7, r7, r0
	mov	r0, r7
	ldr	r1, [r4, #4]
	bl	writel
	b	.L10
.L39:
	ldr	r3, .L42+108
	ldr	r0, .L42+40
	ldr	r1, [r3]
	sub	r1, r1, #1
	bl	mod_timer
	b	.L12
.L38:
	mov	r2, #0
	ldr	r1, .L42+108
	ldr	r3, .L42+112
	ldr	r1, [r1]
	ldr	r0, .L42+36
	sub	r1, r1, #1
	str	r2, [r3]
	bl	mod_timer
	b	.L11
.L43:
	.align	2
.L42:
	.word	UDC_EP0IN_IX
	.word	.LC0
	.word	UDC_EPCTL_F
	.word	UDC_EP0OUT_IX
	.word	USB_SPEED_FULL
	.word	USB_SPEED_HIGH
	.word	use_dma
	.word	UDC_EPCTL_CNAK
	.word	UDC_DMA_OUT_STS_L
	.word	udc_timer
	.word	udc_pollstall_timer
	.word	UDC_DEVCTL_MODE
	.word	UDC_DEVCTL_RDE
	.word	UDC_DEVCTL_TDE
	.word	use_dma_bufferfill_mode
	.word	use_dma_ppb_du
	.word	UDC_FS_EP0OUT_MAX_PKT_SIZE
	.word	UDC_CSR_NE_MAX_PKT
	.word	UDC_EP_MAX_PKT_SIZE
	.word	UDC_FS_EP0IN_MAX_PKT_SIZE
	.word	UDC_FS_EPIN0_BUFF_SIZE
	.word	UDC_EPIN_BUFF_SIZE
	.word	UDC_DEVCTL_DU
	.word	UDC_EP0OUT_MAX_PKT_SIZE
	.word	UDC_EPIN0_BUFF_SIZE
	.word	UDC_EP0IN_MAX_PKT_SIZE
	.word	UDC_DEVCTL_BF
	.word	jiffies
	.word	set_rde
	.size	activate_control_endpoints, .-activate_control_endpoints
	.comm	use_dma_ppb_du,4,4
	.comm	use_dma_bufferfill_mode,4,4
	.comm	use_dma,4,4
	.comm	udc_timer,4,4
	.comm	udc_pollstall_timer,4,4
	.comm	set_rde,4,4
	.comm	jiffies,4,4
	.comm	USB_SPEED_HIGH,4,4
	.comm	USB_SPEED_FULL,4,4
	.comm	UDC_FS_EPIN0_BUFF_SIZE,4,4
	.comm	UDC_FS_EP0OUT_MAX_PKT_SIZE,4,4
	.comm	UDC_FS_EP0IN_MAX_PKT_SIZE,4,4
	.comm	UDC_EP_MAX_PKT_SIZE,4,4
	.comm	UDC_EPIN_BUFF_SIZE,4,4
	.comm	UDC_EPIN0_BUFF_SIZE,4,4
	.comm	UDC_EPCTL_F,4,4
	.comm	UDC_EPCTL_CNAK,4,4
	.comm	UDC_EP0OUT_MAX_PKT_SIZE,4,4
	.comm	UDC_EP0OUT_IX,4,4
	.comm	UDC_EP0IN_MAX_PKT_SIZE,4,4
	.comm	UDC_EP0IN_IX,4,4
	.comm	UDC_DMA_OUT_STS_L,4,4
	.comm	UDC_DEVCTL_TDE,4,4
	.comm	UDC_DEVCTL_RDE,4,4
	.comm	UDC_DEVCTL_MODE,4,4
	.comm	UDC_DEVCTL_DU,4,4
	.comm	UDC_DEVCTL_BF,4,4
	.comm	UDC_CSR_NE_MAX_PKT,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
