	.file	"extr_me_cmp.c_pix_median_abs16_c.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	pix_median_abs16_c, @function
pix_median_abs16_c:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	mov	r15, rsi
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, rdx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, ecx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, r8d
	sub	rsp, 40
	.cfi_def_cfa_offset 96
	mov	edi, DWORD PTR [rsi]
	sub	edi, DWORD PTR [rdx]
	movsx	rdi, edi
	mov	DWORD PTR 12[rsp], r8d
	call	abs@PLT
	mov	edi, DWORD PTR 4[r15]
	sub	edi, DWORD PTR 4[r14]
	sub	edi, DWORD PTR [r15]
	add	edi, DWORD PTR [r14]
	mov	r12, rax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 8[r15]
	sub	edi, DWORD PTR 8[r14]
	sub	edi, DWORD PTR 4[r15]
	add	edi, DWORD PTR 4[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 12[r15]
	sub	edi, DWORD PTR 12[r14]
	sub	edi, DWORD PTR 8[r15]
	add	edi, DWORD PTR 8[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 16[r15]
	sub	edi, DWORD PTR 16[r14]
	sub	edi, DWORD PTR 12[r15]
	add	edi, DWORD PTR 12[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 20[r15]
	sub	edi, DWORD PTR 20[r14]
	sub	edi, DWORD PTR 16[r15]
	add	edi, DWORD PTR 16[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 24[r15]
	sub	edi, DWORD PTR 24[r14]
	sub	edi, DWORD PTR 20[r15]
	add	edi, DWORD PTR 20[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 28[r15]
	add	r12d, eax
	sub	edi, DWORD PTR 28[r14]
	sub	edi, DWORD PTR 24[r15]
	add	edi, DWORD PTR 24[r14]
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 32[r15]
	sub	edi, DWORD PTR 32[r14]
	sub	edi, DWORD PTR 28[r15]
	add	edi, DWORD PTR 28[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 36[r15]
	sub	edi, DWORD PTR 36[r14]
	sub	edi, DWORD PTR 32[r15]
	add	edi, DWORD PTR 32[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 40[r15]
	sub	edi, DWORD PTR 40[r14]
	sub	edi, DWORD PTR 36[r15]
	add	edi, DWORD PTR 36[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 44[r15]
	sub	edi, DWORD PTR 44[r14]
	sub	edi, DWORD PTR 40[r15]
	add	edi, DWORD PTR 40[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 48[r15]
	sub	edi, DWORD PTR 48[r14]
	sub	edi, DWORD PTR 44[r15]
	add	edi, DWORD PTR 44[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 52[r15]
	sub	edi, DWORD PTR 52[r14]
	add	r12d, eax
	sub	edi, DWORD PTR 48[r15]
	add	edi, DWORD PTR 48[r14]
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 56[r15]
	sub	edi, DWORD PTR 56[r14]
	sub	edi, DWORD PTR 52[r15]
	add	edi, DWORD PTR 52[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	mov	edi, DWORD PTR 60[r15]
	sub	edi, DWORD PTR 60[r14]
	sub	edi, DWORD PTR 56[r15]
	add	edi, DWORD PTR 56[r14]
	add	r12d, eax
	movsx	rdi, edi
	call	abs@PLT
	movsx	rdx, r13d
	add	r12d, eax
	lea	rax, 0[0+rdx*4]
	mov	QWORD PTR [rsp], rax
	add	r15, rax
	add	r14, rax
	cmp	ebx, 1
	jle	.L1
	neg	r13d
	mov	DWORD PTR 8[rsp], 1
	movsx	r13, r13d
	lea	rax, 0[0+r13*4]
	mov	QWORD PTR 16[rsp], rax
	mov	eax, 1
	sub	rax, rdx
	lea	rax, -4[0+rax*4]
	mov	QWORD PTR 24[rsp], rax
	.p2align 4,,10
	.p2align 3
.L4:
	mov	rax, QWORD PTR 16[rsp]
	mov	edi, DWORD PTR [r15]
	mov	r13d, 4
	sub	edi, DWORD PTR [r14]
	sub	edi, DWORD PTR [r15+rax]
	add	edi, DWORD PTR [r14+rax]
	movsx	rdi, edi
	call	abs@PLT
	mov	rbp, QWORD PTR 24[rsp]
	add	r12d, eax
	.p2align 4,,10
	.p2align 3
.L3:
	mov	edi, DWORD PTR 4[r15+rbp]
	mov	esi, DWORD PTR -4[r15+r13]
	sub	edi, DWORD PTR 4[r14+rbp]
	sub	esi, DWORD PTR -4[r14+r13]
	lea	edx, [rdi+rsi]
	sub	edx, DWORD PTR [r15+rbp]
	add	edx, DWORD PTR [r14+rbp]
	movsx	rsi, esi
	mov	ebx, DWORD PTR [r15+r13]
	movsx	rdx, edx
	sub	ebx, DWORD PTR [r14+r13]
	movsx	rdi, edi
	call	mid_pred@PLT
	movsx	rbx, ebx
	add	r13, 4
	add	rbp, 4
	sub	rbx, rax
	mov	rdi, rbx
	call	abs@PLT
	add	r12d, eax
	cmp	r13, 64
	jne	.L3
	mov	rax, QWORD PTR [rsp]
	add	DWORD PTR 8[rsp], 1
	add	r15, rax
	add	r14, rax
	mov	eax, DWORD PTR 8[rsp]
	cmp	DWORD PTR 12[rsp], eax
	jne	.L4
.L1:
	add	rsp, 40
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	pix_median_abs16_c, .-pix_median_abs16_c
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_me_cmp.c_pix_median_abs16_c.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pix_median_abs16_c, %function
pix_median_abs16_c:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	ip, [r1, #4]
	ldr	r5, [r2, #4]
	ldr	lr, [r2, #8]
	ldr	r4, [r1, #8]
	ldr	r6, [r2]
	sub	r4, r4, lr
	ldr	r0, [r1]
	ldr	lr, [r2, #12]
	sub	ip, ip, r5
	ldr	r5, [r1, #12]
	sub	r0, r0, r6
	sub	r5, r5, lr
	ldr	r6, [r1, #16]
	ldr	lr, [r2, #16]
	sub	r9, ip, r0
	sub	r8, r5, r4
	sub	ip, r4, ip
	ldr	r7, [r1, #20]
	sub	lr, r6, lr
	ldr	r4, [r2, #20]
	sub	r5, lr, r5
	sub	r4, r7, r4
	eor	r6, r5, r5, asr #31
	ldr	r7, [r1, #24]
	sub	r6, r6, r5, asr #31
	sub	r5, r4, lr
	ldr	lr, [r2, #24]
	ldr	r10, [r1, #28]
	sub	lr, r7, lr
	ldr	r7, [r2, #28]
	cmp	r9, #0
	ldr	fp, [r1, #32]
	sub	r7, r10, r7
	rsblt	r9, r9, #0
	ldr	r10, [r2, #32]
	cmp	r0, #0
	rsblt	r0, r0, #0
	cmp	ip, #0
	rsblt	ip, ip, #0
	sub	r10, fp, r10
	add	r0, r9, r0
	add	r9, ip, r0
	cmp	r8, #0
	sub	r0, r10, r7
	rsblt	r8, r8, #0
	eor	ip, r0, r0, asr #31
	sub	r4, lr, r4
	ldr	fp, [r1, #36]
	sub	lr, r7, lr
	sub	ip, ip, r0, asr #31
	ldr	r7, [r2, #36]
	add	r0, r8, r9
	ldr	r9, [r1, #40]
	ldr	r8, [r2, #40]
	sub	r7, fp, r7
	sub	r8, r9, r8
	sub	r10, r7, r10
	ldr	r9, [r1, #44]
	add	r0, r6, r0
	sub	r6, r8, r7
	ldr	r7, [r2, #44]
	cmp	r5, #0
	sub	r7, r9, r7
	rsblt	r5, r5, #0
	ldr	r9, [r1, #48]
	add	r0, r5, r0
	sub	r5, r7, r8
	ldr	r8, [r2, #48]
	cmp	r4, #0
	sub	r8, r9, r8
	rsblt	r4, r4, #0
	ldr	r9, [r1, #52]
	add	r0, r4, r0
	sub	r4, r8, r7
	ldr	r7, [r2, #52]
	cmp	lr, #0
	sub	r7, r9, r7
	rsblt	lr, lr, #0
	ldr	r9, [r1, #56]
	add	r0, lr, r0
	sub	lr, r7, r8
	ldr	r8, [r2, #56]
	cmp	r10, #0
	rsblt	r10, r10, #0
	sub	r8, r9, r8
	cmp	r6, #0
	add	r0, ip, r0
	rsblt	r6, r6, #0
	sub	ip, r8, r7
	cmp	r5, #0
	ldr	r7, [r1, #60]
	add	r0, r10, r0
	ldr	r9, [r2, #60]
	rsblt	r5, r5, #0
	add	r0, r6, r0
	cmp	r4, #0
	sub	sp, sp, #20
	rsblt	r4, r4, #0
	add	r5, r5, r0
	cmp	lr, #0
	sub	r7, r7, r9
	sub	r8, r7, r8
	rsblt	lr, lr, #0
	ldr	r0, [sp, #56]
	cmp	ip, #0
	add	r4, r4, r5
	rsblt	ip, ip, #0
	add	lr, lr, r4
	cmp	r8, #0
	rsblt	r8, r8, #0
	add	ip, ip, lr
	add	r1, r1, r3, lsl #2
	add	r10, r2, r3, lsl #2
	cmp	r0, #1
	lsl	r2, r3, #2
	str	r1, [sp, #4]
	add	r8, r8, ip
	str	r2, [sp, #12]
	ble	.L1
	mov	r2, #1
	rsb	r3, r3, r3, lsl #30
	lsl	r7, r3, #2
	str	r2, [sp, #8]
	sub	fp, r7, #4
	add	r9, r1, #60
.L5:
	ldr	r5, [sp, #4]
	ldr	ip, [r9, #-60]
	ldr	r1, [r10]
	ldr	r2, [r5, r7]
	ldr	r0, [r10, r7]
	sub	r1, ip, r1
	sub	r2, r2, r0
	sub	r2, r1, r2
	cmp	r2, #0
	rsblt	r2, r2, #0
	mov	r6, r10
	add	r8, r8, r2
	b	.L4
.L9:
	ldr	r3, [r5]
	ldr	r1, [r6]
	sub	r1, r3, r1
.L4:
	ldr	r4, [r5, #4]!
	ldr	ip, [r6, #4]!
	ldr	lr, [r5, r7]
	ldr	r0, [r6, r7]
	ldr	r2, [r6, fp]
	ldr	r3, [r5, fp]
	sub	r0, lr, r0
	sub	r3, r3, r2
	add	r2, r0, r1
	sub	r2, r2, r3
	sub	r4, r4, ip
	bl	mid_pred
	sub	r4, r4, r0
	cmp	r4, #0
	rsblt	r4, r4, #0
	cmp	r9, r5
	add	r8, r8, r4
	bne	.L9
	ldr	r3, [sp, #8]
	ldr	r2, [sp, #56]
	add	r3, r3, #1
	cmp	r2, r3
	str	r3, [sp, #8]
	ldr	r2, [sp, #4]
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	str	r2, [sp, #4]
	add	r10, r10, r3
	add	r9, r9, r3
	bne	.L5
.L1:
	mov	r0, r8
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	pix_median_abs16_c, .-pix_median_abs16_c
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
