	.file	"extr_nv04_crtc.c_nv_crtc_dpms.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Setting dpms mode %d on CRTC %d\n"
	.text
	.p2align 4
	.type	nv_crtc_dpms, @function
nv_crtc_dpms:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	nouveau_crtc@PLT
	mov	rbp, QWORD PTR 0[rbp]
	mov	rbx, rax
	mov	rdi, rbp
	call	nouveau_drm@PLT
	mov	ecx, DWORD PTR 4[rbx]
	mov	edx, r12d
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	call	NV_DEBUG@PLT
	cmp	DWORD PTR [rbx], r12d
	je	.L1
	mov	DWORD PTR [rbx], r12d
	mov	rdi, rbp
	call	nv_two_heads@PLT
	test	rax, rax
	jne	.L13
.L3:
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR NV_CIO_CRE_RPC1_INDEX[rip]
	mov	rdi, rbp
	call	NVReadVgaCrtc@PLT
	mov	r13d, eax
	and	r13d, 63
	cmp	r12d, 129
	je	.L4
	cmp	r12d, 131
	je	.L5
	cmp	r12d, 128
	je	.L6
	mov	r12d, -128
	xor	r14d, r14d
.L7:
	mov	esi, DWORD PTR 4[rbx]
	mov	rdi, rbp
	mov	edx, 1
	call	NVVgaSeqReset@PLT
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR NV_VIO_SR_CLOCK_INDEX[rip]
	mov	rdi, rbp
	call	NVReadVgaSeq@PLT
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR NV_VIO_SR_CLOCK_INDEX[rip]
	mov	rdi, rbp
	and	eax, -33
	or	r14d, eax
	movzx	ecx, r14b
	call	NVWriteVgaSeq@PLT
	mov	esi, DWORD PTR 4[rbx]
	mov	edx, DWORD PTR NV_CIO_CR_MODE_INDEX[rip]
	mov	rdi, rbp
	call	NVReadVgaCrtc@PLT
	mov	edi, 10
	mov	r14d, eax
	call	mdelay@PLT
	mov	ecx, r14d
	mov	esi, DWORD PTR 4[rbx]
	mov	rdi, rbp
	and	cl, 127
	mov	edx, DWORD PTR NV_CIO_CR_MODE_INDEX[rip]
	or	r12d, ecx
	movzx	ecx, r12b
	call	NVWriteVgaCrtc@PLT
	mov	esi, DWORD PTR 4[rbx]
	mov	rdi, rbp
	xor	edx, edx
	call	NVVgaSeqReset@PLT
	mov	esi, DWORD PTR 4[rbx]
	movzx	ecx, r13b
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	edx, DWORD PTR NV_CIO_CRE_RPC1_INDEX[rip]
	mov	rdi, rbp
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	jmp	NVWriteVgaCrtc@PLT
	.p2align 4,,10
	.p2align 3
.L13:
	.cfi_restore_state
	mov	esi, DWORD PTR 4[rbx]
	mov	rdi, rbp
	call	NVSetOwner@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	or	r13d, -64
	xor	r12d, r12d
	mov	r14d, 32
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L6:
	or	r13d, 64
	mov	r12d, -128
	mov	r14d, 32
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L4:
	or	r13d, -128
	mov	r12d, -128
	mov	r14d, 32
	jmp	.L7
	.cfi_endproc
.LFE0:
	.size	nv_crtc_dpms, .-nv_crtc_dpms
	.comm	NV_VIO_SR_CLOCK_INDEX,4,4
	.comm	NV_CIO_CR_MODE_INDEX,4,4
	.comm	NV_CIO_CRE_RPC1_INDEX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_nv04_crtc.c_nv_crtc_dpms.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Setting dpms mode %d on CRTC %d\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nv_crtc_dpms, %function
nv_crtc_dpms:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #4
	mov	r6, r1
	mov	r5, r0
	bl	nouveau_crtc
	mov	r4, r0
	ldr	r5, [r5]
	mov	r0, r5
	bl	nouveau_drm
	ldr	r3, [r4, #4]
	mov	r2, r6
	ldr	r1, .L14
	bl	NV_DEBUG
	ldr	r3, [r4]
	cmp	r3, r6
	beq	.L1
	mov	r0, r5
	str	r6, [r4]
	bl	nv_two_heads
	cmp	r0, #0
	bne	.L13
.L3:
	ldr	r9, .L14+4
	mov	r0, r5
	ldr	r1, [r4, #4]
	ldr	r2, [r9]
	bl	NVReadVgaCrtc
	cmp	r6, #129
	and	r7, r0, #63
	beq	.L4
	cmp	r6, #131
	beq	.L5
	cmp	r6, #128
	beq	.L6
	mvn	r8, #127
	mov	fp, #0
.L7:
	ldr	r6, .L14+8
	ldr	r1, [r4, #4]
	mov	r2, #1
	mov	r0, r5
	bl	NVVgaSeqReset
	ldr	r2, [r6]
	ldr	r1, [r4, #4]
	mov	r0, r5
	bl	NVReadVgaSeq
	ldr	r10, .L14+12
	and	r0, r0, #223
	orr	r3, r0, fp
	ldr	r2, [r6]
	ldr	r1, [r4, #4]
	mov	r0, r5
	bl	NVWriteVgaSeq
	ldr	r2, [r10]
	ldr	r1, [r4, #4]
	mov	r0, r5
	bl	NVReadVgaCrtc
	mov	r6, r0
	bic	r6, r6, #128
	orr	r6, r8, r6
	mov	r0, #10
	bl	mdelay
	and	r3, r6, #255
	ldr	r2, [r10]
	ldr	r1, [r4, #4]
	mov	r0, r5
	bl	NVWriteVgaCrtc
	ldr	r1, [r4, #4]
	mov	r2, #0
	mov	r0, r5
	bl	NVVgaSeqReset
	mov	r3, r7
	mov	r0, r5
	ldr	r2, [r9]
	ldr	r1, [r4, #4]
	add	sp, sp, #4
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	b	NVWriteVgaCrtc
.L13:
	mov	r0, r5
	ldr	r1, [r4, #4]
	bl	NVSetOwner
	b	.L3
.L1:
	add	sp, sp, #4
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
	mov	r8, #0
	mov	fp, #32
	orr	r7, r7, #192
	b	.L7
.L6:
	mvn	r8, #127
	mov	fp, #32
	orr	r7, r7, #64
	b	.L7
.L4:
	mvn	r8, #127
	mov	fp, #32
	orr	r7, r7, #128
	b	.L7
.L15:
	.align	2
.L14:
	.word	.LC0
	.word	NV_CIO_CRE_RPC1_INDEX
	.word	NV_VIO_SR_CLOCK_INDEX
	.word	NV_CIO_CR_MODE_INDEX
	.size	nv_crtc_dpms, .-nv_crtc_dpms
	.comm	NV_VIO_SR_CLOCK_INDEX,4,4
	.comm	NV_CIO_CR_MODE_INDEX,4,4
	.comm	NV_CIO_CRE_RPC1_INDEX,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
