	.file	"extr_pinctrl-rockchip.c_rockchip_pinconf_set.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	rockchip_pinconf_set, @function
rockchip_pinconf_set:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, esi
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, ecx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	pinctrl_dev_get_drvdata@PLT
	mov	esi, r13d
	mov	rdi, rax
	mov	r14, rax
	call	pin_to_bank@PLT
	test	r12d, r12d
	je	.L2
	mov	rbp, rax
	lea	eax, -1[r12]
	lea	r12, .L5[rip]
	lea	rax, 8[rbx+rax*8]
	mov	QWORD PTR [rsp], rax
.L16:
	mov	rdi, QWORD PTR [rbx]
	call	pinconf_to_config_param@PLT
	mov	rdi, QWORD PTR [rbx]
	mov	r15d, eax
	call	pinconf_to_config_argument@PLT
	mov	r8d, eax
	lea	eax, -128[r15]
	cmp	eax, 7
	ja	.L3
	movsx	rax, DWORD PTR [r12+rax*4]
	add	rax, r12
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L5:
	.long	.L9-.L5
	.long	.L8-.L5
	.long	.L7-.L5
	.long	.L4-.L5
	.long	.L4-.L5
	.long	.L4-.L5
	.long	.L6-.L5
	.long	.L4-.L5
	.text
	.p2align 4,,10
	.p2align 3
.L4:
	mov	rdi, QWORD PTR [r14]
	mov	esi, r15d
	mov	DWORD PTR 8[rsp], r8d
	call	rockchip_pinconf_pull_valid@PLT
	mov	r8d, DWORD PTR 8[rsp]
	test	eax, eax
	je	.L3
	test	r8d, r8d
	je	.L23
	mov	esi, r13d
	mov	edx, r15d
	sub	esi, DWORD PTR 0[rbp]
	mov	rdi, rbp
	call	rockchip_set_pull@PLT
	test	eax, eax
	jne	.L1
	.p2align 4,,10
	.p2align 3
.L11:
	add	rbx, 8
	cmp	QWORD PTR [rsp], rbx
	jne	.L16
.L2:
	xor	eax, eax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L7:
	.cfi_restore_state
	mov	rax, QWORD PTR [r14]
	mov	edx, DWORD PTR 4[rax]
	test	edx, edx
	je	.L3
	mov	esi, r13d
	mov	edx, r8d
	sub	esi, DWORD PTR 0[rbp]
	mov	rdi, rbp
	call	rockchip_set_drive_perpin@PLT
	test	eax, eax
	jns	.L11
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rax, QWORD PTR [r14]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L3
	mov	esi, r13d
	mov	edx, r8d
	sub	esi, DWORD PTR 0[rbp]
	mov	rdi, rbp
	call	rockchip_set_schmitt@PLT
	test	eax, eax
	jns	.L11
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L9:
	lea	rdi, 4[rbp]
	mov	edx, r8d
	mov	esi, r13d
	sub	esi, DWORD PTR 0[rbp]
	mov	QWORD PTR 8[rsp], rdi
	call	rockchip_gpio_set@PLT
	mov	rdi, QWORD PTR 8[rsp]
	mov	esi, r13d
	xor	edx, edx
	sub	esi, DWORD PTR 0[rbp]
	call	_rockchip_pmx_gpio_set_direction@PLT
	test	eax, eax
	je	.L11
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L6:
	mov	esi, r13d
	mov	edx, 134
	sub	esi, DWORD PTR 0[rbp]
	mov	rdi, rbp
	call	rockchip_set_pull@PLT
	test	eax, eax
	je	.L11
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L3:
	mov	eax, DWORD PTR ENOTSUPP[rip]
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	neg	eax
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
.L23:
	.cfi_restore_state
	mov	eax, DWORD PTR EINVAL[rip]
	neg	eax
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	rockchip_pinconf_set, .-rockchip_pinconf_set
	.comm	ENOTSUPP,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pinctrl-rockchip.c_rockchip_pinconf_set.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rockchip_pinconf_set, %function
rockchip_pinconf_set:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r8, r1
	sub	sp, sp, #12
	mov	r9, r3
	mov	r5, r2
	bl	pinctrl_dev_get_drvdata
	mov	r1, r8
	mov	r10, r0
	bl	pin_to_bank
	cmp	r9, #0
	beq	.L2
	mov	r7, r0
	mov	r6, #0
	sub	r5, r5, #4
	add	fp, r0, #4
.L16:
	ldr	r0, [r5, #4]!
	bl	pinconf_to_config_param
	mov	r4, r0
	ldr	r0, [r5]
	bl	pinconf_to_config_argument
	sub	r3, r4, #128
	mov	r2, r0
	cmp	r3, #7
	ldrls	pc, [pc, r3, asl #2]
	b	.L3
.L5:
	.word	.L9
	.word	.L8
	.word	.L7
	.word	.L4
	.word	.L4
	.word	.L4
	.word	.L6
	.word	.L4
.L4:
	str	r0, [sp, #4]
	mov	r1, r4
	ldr	r0, [r10]
	bl	rockchip_pinconf_pull_valid
	cmp	r0, #0
	ldr	r2, [sp, #4]
	beq	.L3
	cmp	r2, #0
	beq	.L28
	mov	r2, r4
	ldr	r1, [r7]
.L26:
	mov	r0, r7
	sub	r1, r8, r1
	bl	rockchip_set_pull
	cmp	r0, #0
	bne	.L1
.L11:
	add	r6, r6, #1
	cmp	r6, r9
	bne	.L16
.L2:
	mov	r0, #0
.L1:
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	ldr	r3, [r10]
	ldr	r3, [r3, #4]
	cmp	r3, #0
	beq	.L3
	ldr	r1, [r7]
	mov	r0, r7
	sub	r1, r8, r1
	bl	rockchip_set_drive_perpin
	cmp	r0, #0
	bge	.L11
	b	.L1
.L9:
	ldr	r1, [r7]
	mov	r0, fp
	sub	r1, r8, r1
	bl	rockchip_gpio_set
	ldr	r1, [r7]
	mov	r2, #0
	mov	r0, fp
	sub	r1, r8, r1
	bl	_rockchip_pmx_gpio_set_direction
	cmp	r0, #0
	beq	.L11
	b	.L1
.L6:
	mov	r2, #134
	ldr	r1, [r7]
	b	.L26
.L8:
	ldr	r3, [r10]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L3
	ldr	r1, [r7]
	mov	r0, r7
	sub	r1, r8, r1
	bl	rockchip_set_schmitt
	cmp	r0, #0
	bge	.L11
	b	.L1
.L3:
	ldr	r3, .L29
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L28:
	ldr	r3, .L29+4
	ldr	r0, [r3]
	rsb	r0, r0, #0
	b	.L1
.L30:
	.align	2
.L29:
	.word	ENOTSUPP
	.word	EINVAL
	.size	rockchip_pinconf_set, .-rockchip_pinconf_set
	.comm	ENOTSUPP,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
