	.file	"extr_main.c_iwl_nic_config.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Radio type=0x%x-0x%x-0x%x\n"
	.text
	.p2align 4
	.type	iwl_nic_config, @function
iwl_nic_config:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	IWL_OP_MODE_GET_DVM@PLT
	mov	rbp, rax
	mov	rax, QWORD PTR 8[rax]
	mov	edi, DWORD PTR [rax]
	call	CSR_HW_REV_STEP@PLT
	mov	ecx, DWORD PTR CSR_HW_IF_CONFIG_REG_POS_MAC_STEP[rip]
	sal	eax, cl
	mov	ebx, eax
	mov	rax, QWORD PTR 8[rbp]
	mov	edi, DWORD PTR [rax]
	call	CSR_HW_REV_DASH@PLT
	mov	ecx, DWORD PTR CSR_HW_IF_CONFIG_REG_POS_MAC_DASH[rip]
	mov	rdi, QWORD PTR 8[rbp]
	mov	esi, DWORD PTR CSR_HW_IF_CONFIG_REG[rip]
	mov	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH[rip]
	sal	eax, cl
	or	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP[rip]
	or	eax, ebx
	mov	ecx, eax
	call	iwl_trans_set_bits_mask@PLT
	mov	rsi, QWORD PTR 16[rbp]
	mov	edx, DWORD PTR [rsi]
	cmp	edx, DWORD PTR EEPROM_RF_CONFIG_TYPE_MAX[rip]
	jg	.L2
	mov	ecx, DWORD PTR CSR_HW_IF_CONFIG_REG_POS_PHY_STEP[rip]
	mov	eax, DWORD PTR 4[rsi]
	mov	rdi, QWORD PTR 8[rbp]
	sal	eax, cl
	mov	ecx, DWORD PTR CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE[rip]
	sal	edx, cl
	mov	ecx, DWORD PTR CSR_HW_IF_CONFIG_REG_POS_PHY_DASH[rip]
	or	eax, edx
	mov	edx, DWORD PTR 8[rsi]
	mov	esi, DWORD PTR CSR_HW_IF_CONFIG_REG[rip]
	sal	edx, cl
	mov	ecx, edx
	mov	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE[rip]
	or	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP[rip]
	or	ecx, eax
	or	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH[rip]
	call	iwl_trans_set_bits_mask@PLT
	mov	rax, QWORD PTR 16[rbp]
	lea	rsi, .LC0[rip]
	mov	rdi, rbp
	mov	ecx, DWORD PTR 4[rax]
	mov	r8d, DWORD PTR 8[rax]
	mov	edx, DWORD PTR [rax]
	call	IWL_INFO@PLT
.L3:
	mov	rdi, QWORD PTR 8[rbp]
	mov	esi, DWORD PTR CSR_HW_IF_CONFIG_REG[rip]
	mov	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI[rip]
	or	edx, DWORD PTR CSR_HW_IF_CONFIG_REG_BIT_MAC_SI[rip]
	call	iwl_set_bit@PLT
	mov	edx, DWORD PTR APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS[rip]
	mov	rdi, QWORD PTR 8[rbp]
	mov	esi, DWORD PTR APMG_PS_CTRL_REG[rip]
	mov	ecx, edx
	not	ecx
	call	iwl_set_bits_mask_prph@PLT
	mov	rax, QWORD PTR 0[rbp]
	mov	rax, QWORD PTR [rax]
	test	rax, rax
	je	.L1
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	rdi, rbp
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	jmp	rax
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	edi, 1
	call	WARN_ON@PLT
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L1:
	add	rsp, 8
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	iwl_nic_config, .-iwl_nic_config
	.comm	EEPROM_RF_CONFIG_TYPE_MAX,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_PHY_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_PHY_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_MAC_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_MAC_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI,4,4
	.comm	CSR_HW_IF_CONFIG_REG_BIT_MAC_SI,4,4
	.comm	CSR_HW_IF_CONFIG_REG,4,4
	.comm	APMG_PS_CTRL_REG,4,4
	.comm	APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_main.c_iwl_nic_config.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Radio type=0x%x-0x%x-0x%x\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	iwl_nic_config, %function
iwl_nic_config:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, lr}
	sub	sp, sp, #12
	bl	IWL_OP_MODE_GET_DVM
	ldr	r3, .L7
	ldr	r2, .L7+4
	ldr	r8, [r0, #4]
	ldr	r6, [r2]
	ldr	r7, .L7+8
	ldr	r2, [r3]
	mov	r4, r0
	ldr	r0, [r8]
	orr	r6, r6, r2
	ldr	r9, [r7]
	bl	CSR_HW_REV_STEP
	mov	r5, r0
	ldr	r3, .L7+12
	ldr	r2, [r4, #4]
	ldr	r3, [r3]
	ldr	r0, [r2]
	lsl	r5, r5, r3
	bl	CSR_HW_REV_DASH
	mov	ip, r0
	ldr	r3, .L7+16
	mov	r1, r9
	ldr	r3, [r3]
	mov	r2, r6
	orr	r3, r5, ip, lsl r3
	mov	r0, r8
	bl	iwl_trans_set_bits_mask
	ldr	r0, [r4, #8]
	ldr	r3, .L7+20
	ldr	r1, [r0]
	ldr	r3, [r3]
	cmp	r1, r3
	bgt	.L2
	ldr	r2, .L7+24
	ldr	r3, .L7+28
	ldr	lr, [r2]
	ldr	r3, [r3]
	lsl	r1, r1, lr
	ldr	ip, .L7+32
	ldr	r2, .L7+36
	ldmib	r0, {r5, lr}
	ldr	r0, .L7+40
	orr	r1, r1, r5, lsl r3
	ldr	r3, .L7+44
	ldr	ip, [ip]
	ldr	r2, [r2]
	ldr	r0, [r0]
	ldr	r3, [r3]
	orr	r2, ip, r2
	orr	r3, r1, lr, lsl r3
	orr	r2, r2, r0
	ldr	r1, [r7]
	ldr	r0, [r4, #4]
	bl	iwl_trans_set_bits_mask
	ldr	r0, [r4, #8]
	ldr	r1, .L7+48
	ldm	r0, {r2, r3}
	ldr	r0, [r0, #8]
	str	r0, [sp]
	mov	r0, r4
	bl	IWL_INFO
.L3:
	ldr	r2, .L7+52
	ldr	r3, .L7+56
	ldr	r2, [r2]
	ldr	r3, [r3]
	ldr	r1, [r7]
	orr	r2, r2, r3
	ldr	r0, [r4, #4]
	bl	iwl_set_bit
	ldr	r2, .L7+60
	ldr	r3, .L7+64
	ldr	r2, [r2]
	ldr	r1, [r3]
	ldr	r0, [r4, #4]
	mvn	r3, r2
	bl	iwl_set_bits_mask_prph
	ldr	r3, [r4]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L1
	mov	r0, r4
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, lr}
	bx	r3
.L2:
	mov	r0, #1
	bl	WARN_ON
	b	.L3
.L1:
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, pc}
.L8:
	.align	2
.L7:
	.word	CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP
	.word	CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH
	.word	CSR_HW_IF_CONFIG_REG
	.word	CSR_HW_IF_CONFIG_REG_POS_MAC_STEP
	.word	CSR_HW_IF_CONFIG_REG_POS_MAC_DASH
	.word	EEPROM_RF_CONFIG_TYPE_MAX
	.word	CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE
	.word	CSR_HW_IF_CONFIG_REG_POS_PHY_STEP
	.word	CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE
	.word	CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP
	.word	CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH
	.word	CSR_HW_IF_CONFIG_REG_POS_PHY_DASH
	.word	.LC0
	.word	CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI
	.word	CSR_HW_IF_CONFIG_REG_BIT_MAC_SI
	.word	APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS
	.word	APMG_PS_CTRL_REG
	.size	iwl_nic_config, .-iwl_nic_config
	.comm	EEPROM_RF_CONFIG_TYPE_MAX,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_PHY_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_PHY_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_MAC_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_POS_MAC_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP,4,4
	.comm	CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH,4,4
	.comm	CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI,4,4
	.comm	CSR_HW_IF_CONFIG_REG_BIT_MAC_SI,4,4
	.comm	CSR_HW_IF_CONFIG_REG,4,4
	.comm	APMG_PS_CTRL_REG,4,4
	.comm	APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
