	.file	"extr_gpio.c_pinmux_direction.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	pinmux_direction, @function
pinmux_direction:
.LFB0:
	.cfi_startproc
	endbr64
	push	r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	push	r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	push	r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	mov	r12d, DWORD PTR EINVAL[rip]
	push	rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	neg	r12d
	push	rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	test	rdi, rdi
	je	.L1
	mov	r14d, edx
	mov	rdx, QWORD PTR [rdi]
	mov	eax, esi
	mov	rbx, rdi
	mov	ebp, esi
	lea	r13, 0[0+rax*4]
	mov	edx, DWORD PTR [rdx+rax*4]
	and	edx, DWORD PTR PINMUX_FLAG_TYPE[rip]
	cmp	edx, 131
	jle	.L18
	cmp	edx, 132
	jne	.L1
.L5:
	mov	ecx, DWORD PTR GPIO_CFG_DRYRUN[rip]
	mov	edx, r14d
	mov	esi, ebp
	mov	rdi, rbx
	call	pinmux_config_gpio@PLT
	test	rax, rax
	je	.L19
.L1:
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	mov	eax, r12d
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L18:
	.cfi_restore_state
	cmp	edx, 127
	jle	.L1
	mov	ecx, DWORD PTR GPIO_CFG_FREE[rip]
	call	pinmux_config_gpio@PLT
	jmp	.L5
	.p2align 4,,10
	.p2align 3
.L19:
	mov	ecx, DWORD PTR GPIO_CFG_REQ[rip]
	mov	edx, r14d
	mov	esi, ebp
	mov	rdi, rbx
	call	pinmux_config_gpio@PLT
	test	rax, rax
	jne	.L20
.L6:
.L2:
	endbr64
	mov	edx, DWORD PTR PINMUX_FLAG_TYPE[rip]
	add	r13, QWORD PTR [rbx]
	xor	r12d, r12d
	mov	eax, r12d
	not	edx
	and	edx, DWORD PTR 0[r13]
	or	edx, r14d
	mov	DWORD PTR 0[r13], edx
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbp
	.cfi_def_cfa_offset 32
	pop	r12
	.cfi_def_cfa_offset 24
	pop	r13
	.cfi_def_cfa_offset 16
	pop	r14
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L20:
	.cfi_restore_state
	xor	eax, eax
	call	BUG@PLT
	jmp	.L6
	.cfi_endproc
.LFE0:
	.size	pinmux_direction, .-pinmux_direction
	.comm	PINMUX_FLAG_TYPE,4,4
	.comm	GPIO_CFG_REQ,4,4
	.comm	GPIO_CFG_FREE,4,4
	.comm	GPIO_CFG_DRYRUN,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_gpio.c_pinmux_direction.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pinmux_direction, %function
pinmux_direction:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r3, .L21
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r6, [r3]
	subs	r5, r0, #0
	rsb	r6, r6, #0
	beq	.L1
	ldr	r3, [r5]
	ldr	r8, .L21+4
	mov	r7, r2
	ldr	r3, [r3, r1, lsl #2]
	ldr	r2, [r8]
	mov	r4, r1
	and	r2, r2, r3
	cmp	r2, #131
	ble	.L18
	cmp	r2, #132
	bne	.L1
.L5:
	ldr	r3, .L21+8
	mov	r2, r7
	mov	r1, r4
	mov	r0, r5
	ldr	r3, [r3]
	bl	pinmux_config_gpio
	cmp	r0, #0
	beq	.L19
.L1:
	mov	r0, r6
	pop	{r4, r5, r6, r7, r8, pc}
.L18:
	cmp	r2, #127
	ble	.L1
	ldr	r3, .L21+12
	ldr	r3, [r3]
	bl	pinmux_config_gpio
	b	.L5
.L19:
	ldr	r3, .L21+16
	mov	r2, r7
	mov	r1, r4
	mov	r0, r5
	ldr	r3, [r3]
	bl	pinmux_config_gpio
	cmp	r0, #0
	bne	.L20
.L6:
.L2:
	mov	r6, #0
	ldr	r3, [r5]
	ldr	r1, [r8]
	ldr	r2, [r3, r4, lsl #2]
	mov	r0, r6
	bic	r2, r2, r1
	orr	r7, r2, r7
	str	r7, [r3, r4, lsl #2]
	pop	{r4, r5, r6, r7, r8, pc}
.L20:
	bl	BUG
	b	.L6
.L22:
	.align	2
.L21:
	.word	EINVAL
	.word	PINMUX_FLAG_TYPE
	.word	GPIO_CFG_DRYRUN
	.word	GPIO_CFG_FREE
	.word	GPIO_CFG_REQ
	.size	pinmux_direction, .-pinmux_direction
	.comm	PINMUX_FLAG_TYPE,4,4
	.comm	GPIO_CFG_REQ,4,4
	.comm	GPIO_CFG_FREE,4,4
	.comm	GPIO_CFG_DRYRUN,4,4
	.comm	EINVAL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
