	.file	"extr_sli4.c_sli_cmd_reg_fcfi.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	sli_cmd_reg_fcfi
	.type	sli_cmd_reg_fcfi, @function
sli_cmd_reg_fcfi:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	mov	r13, rcx
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	mov	r12, r9
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	mov	rbp, r8
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	mov	rbx, rsi
	xor	esi, esi
	mov	rdi, rbx
	sub	rsp, 8
	.cfi_def_cfa_offset 48
	call	ocs_memset@PLT
	mov	eax, DWORD PTR SLI4_MBOX_COMMAND_REG_FCFI[rip]
	mov	edi, DWORD PTR SLI4_CMD_REG_FCFI_NUM_RQ_CFG[rip]
	mov	QWORD PTR 40[rbx], r13
	mov	DWORD PTR 48[rbx], eax
	test	edi, edi
	jle	.L2
	mov	rdx, QWORD PTR 16[rbx]
	mov	rcx, rbp
	xor	eax, eax
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L17:
	cmp	eax, 1
	jne	.L7
	mov	esi, DWORD PTR 36[rbp]
	mov	DWORD PTR 32[rbx], esi
	.p2align 4,,10
	.p2align 3
.L7:
	mov	esi, DWORD PTR 12[rcx]
	add	eax, 1
	add	rcx, 20
	add	rdx, 16
	mov	DWORD PTR -4[rdx], esi
	mov	esi, DWORD PTR -12[rcx]
	mov	DWORD PTR -8[rdx], esi
	mov	esi, DWORD PTR -16[rcx]
	mov	DWORD PTR -12[rdx], esi
	mov	esi, DWORD PTR -20[rcx]
	mov	DWORD PTR -16[rdx], esi
	cmp	eax, edi
	je	.L2
.L9:
	cmp	eax, 2
	je	.L3
	jg	.L4
	test	eax, eax
	jne	.L17
	mov	esi, DWORD PTR 16[rbp]
	mov	DWORD PTR 36[rbx], esi
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L4:
	cmp	eax, 3
	jne	.L7
	mov	esi, DWORD PTR 76[rbp]
	mov	DWORD PTR 24[rbx], esi
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L3:
	mov	esi, DWORD PTR 56[rbp]
	mov	DWORD PTR 28[rbx], esi
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L2:
	test	r12, r12
	je	.L10
	mov	eax, DWORD PTR TRUE[rip]
	mov	QWORD PTR [rbx], r12
	mov	DWORD PTR 8[rbx], eax
.L10:
	add	rsp, 8
	.cfi_def_cfa_offset 40
	mov	eax, 56
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	sli_cmd_reg_fcfi, .-sli_cmd_reg_fcfi
	.comm	TRUE,4,4
	.comm	SLI4_MBOX_COMMAND_REG_FCFI,4,4
	.comm	SLI4_CMD_REG_FCFI_NUM_RQ_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_sli4.c_sli_cmd_reg_fcfi.c"
	.text
	.align	2
	.global	sli_cmd_reg_fcfi
	.syntax unified
	.arm
	.fpu softvfp
	.type	sli_cmd_reg_fcfi, %function
sli_cmd_reg_fcfi:
	@ args = 8, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	mov	r4, r1
	mov	r7, r3
	mov	r0, r1
	mov	r1, #0
	ldr	r6, [sp, #24]
	ldr	r5, [sp, #28]
	bl	ocs_memset
	ldr	r2, .L17
	ldr	r3, .L17+4
	ldr	lr, [r2]
	ldr	r3, [r3]
	cmp	lr, #0
	str	r7, [r4, #28]
	str	r3, [r4, #32]
	ble	.L2
	mov	r0, r6
	mov	r2, #0
	ldr	r3, [r4, #8]
.L9:
	cmp	r2, #3
	ldrls	pc, [pc, r2, asl #2]
	b	.L3
.L5:
	.word	.L8
	.word	.L7
	.word	.L6
	.word	.L4
.L4:
	ldr	r1, [r6, #76]
	str	r1, [r4, #12]
.L3:
	ldr	r1, [r0, #12]
	add	r2, r2, #1
	str	r1, [r3, #12]
	ldr	ip, [r0, #8]
	cmp	r2, lr
	str	ip, [r3, #8]
	ldr	ip, [r0, #4]
	str	ip, [r3, #4]
	ldr	ip, [r0], #20
	str	ip, [r3], #16
	bne	.L9
.L2:
	cmp	r5, #0
	ldrne	r3, .L17+8
	mov	r0, #36
	ldrne	r3, [r3]
	strne	r5, [r4]
	strne	r3, [r4, #4]
	pop	{r4, r5, r6, r7, r8, pc}
.L7:
	ldr	r1, [r6, #36]
	str	r1, [r4, #20]
	b	.L3
.L8:
	ldr	r1, [r6, #16]
	str	r1, [r4, #24]
	b	.L3
.L6:
	ldr	r1, [r6, #56]
	str	r1, [r4, #16]
	b	.L3
.L18:
	.align	2
.L17:
	.word	SLI4_CMD_REG_FCFI_NUM_RQ_CFG
	.word	SLI4_MBOX_COMMAND_REG_FCFI
	.word	TRUE
	.size	sli_cmd_reg_fcfi, .-sli_cmd_reg_fcfi
	.comm	TRUE,4,4
	.comm	SLI4_MBOX_COMMAND_REG_FCFI,4,4
	.comm	SLI4_CMD_REG_FCFI_NUM_RQ_CFG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
