	.file	"extr_dwc-xlgmac-hw.c_xlgmac_write_rss_reg.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	xlgmac_write_rss_reg, @function
xlgmac_write_rss_reg:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14d, ecx
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, edx
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, esi
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	call	mutex_lock@PLT
	mov	ebx, DWORD PTR MAC_RSSAR_OB_LEN[rip]
	mov	r15d, DWORD PTR MAC_RSSAR_OB_POS[rip]
	mov	rdi, QWORD PTR MAC_RSSAR[rip]
	add	rdi, QWORD PTR 8[rbp]
	call	readl@PLT
	mov	edx, ebx
	mov	esi, r15d
	mov	edi, eax
	call	XLGMAC_GET_REG_BITS@PLT
	test	eax, eax
	je	.L2
.L10:
	mov	r12d, DWORD PTR EBUSY[rip]
	neg	r12d
.L3:
	mov	rdi, rbp
	call	mutex_unlock@PLT
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	rsi, QWORD PTR MAC_RSSDR[rip]
	mov	edi, r14d
	add	rsi, QWORD PTR 8[rbp]
	mov	ebx, 1000
	call	writel@PLT
	mov	rdi, QWORD PTR MAC_RSSAR[rip]
	add	rdi, QWORD PTR 8[rbp]
	call	readl@PLT
	mov	edx, DWORD PTR MAC_RSSAR_RSSIA_LEN[rip]
	mov	esi, DWORD PTR MAC_RSSAR_RSSIA_POS[rip]
	mov	ecx, r13d
	mov	edi, eax
	call	XLGMAC_SET_REG_BITS@PLT
	mov	edx, DWORD PTR MAC_RSSAR_ADDRT_LEN[rip]
	mov	esi, DWORD PTR MAC_RSSAR_ADDRT_POS[rip]
	mov	ecx, r12d
	mov	edi, eax
	call	XLGMAC_SET_REG_BITS@PLT
	mov	edx, DWORD PTR MAC_RSSAR_CT_LEN[rip]
	mov	esi, DWORD PTR MAC_RSSAR_CT_POS[rip]
	xor	ecx, ecx
	mov	edi, eax
	call	XLGMAC_SET_REG_BITS@PLT
	mov	edx, DWORD PTR MAC_RSSAR_OB_LEN[rip]
	mov	esi, DWORD PTR MAC_RSSAR_OB_POS[rip]
	mov	ecx, 1
	mov	edi, eax
	call	XLGMAC_SET_REG_BITS@PLT
	mov	rsi, QWORD PTR MAC_RSSAR[rip]
	add	rsi, QWORD PTR 8[rbp]
	mov	edi, eax
	call	writel@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L12:
	mov	esi, 1500
	mov	edi, 1000
	call	usleep_range@PLT
	sub	ebx, 1
	je	.L10
.L4:
	mov	r12d, DWORD PTR MAC_RSSAR_OB_POS[rip]
	mov	r13d, DWORD PTR MAC_RSSAR_OB_LEN[rip]
	mov	rdi, QWORD PTR MAC_RSSAR[rip]
	add	rdi, QWORD PTR 8[rbp]
	call	readl@PLT
	mov	esi, r12d
	mov	edx, r13d
	mov	edi, eax
	call	XLGMAC_GET_REG_BITS@PLT
	mov	r12d, eax
	test	eax, eax
	jne	.L12
	jmp	.L3
	.cfi_endproc
.LFE0:
	.size	xlgmac_write_rss_reg, .-xlgmac_write_rss_reg
	.comm	MAC_RSSDR,8,8
	.comm	MAC_RSSAR_RSSIA_POS,4,4
	.comm	MAC_RSSAR_RSSIA_LEN,4,4
	.comm	MAC_RSSAR_OB_POS,4,4
	.comm	MAC_RSSAR_OB_LEN,4,4
	.comm	MAC_RSSAR_CT_POS,4,4
	.comm	MAC_RSSAR_CT_LEN,4,4
	.comm	MAC_RSSAR_ADDRT_POS,4,4
	.comm	MAC_RSSAR_ADDRT_LEN,4,4
	.comm	MAC_RSSAR,8,8
	.comm	EBUSY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_dwc-xlgmac-hw.c_xlgmac_write_rss_reg.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	xlgmac_write_rss_reg, %function
xlgmac_write_rss_reg:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r6, r0
	ldr	r7, .L13
	mov	r10, r1
	mov	fp, r2
	mov	r5, r3
	bl	mutex_lock
	ldr	r3, [r7]
	ldr	r0, [r6, #4]
	ldr	r9, .L13+4
	ldr	r8, .L13+8
	add	r0, r0, r3
	bl	readl
	ldr	r2, [r9]
	ldr	r1, [r8]
	bl	XLGMAC_GET_REG_BITS
	subs	r4, r0, #0
	beq	.L2
.L10:
	ldr	r3, .L13+12
	ldr	r4, [r3]
	rsb	r4, r4, #0
.L3:
	mov	r0, r6
	bl	mutex_unlock
	mov	r0, r4
	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2:
	ldr	r3, .L13+16
	ldr	r1, [r6, #4]
	ldr	r3, [r3]
	mov	r0, r5
	add	r1, r1, r3
	bl	writel
	ldr	r3, [r7]
	ldr	r0, [r6, #4]
	mov	r5, #1000
	add	r0, r0, r3
	bl	readl
	ldr	r2, .L13+20
	ldr	r1, .L13+24
	mov	r3, fp
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	XLGMAC_SET_REG_BITS
	ldr	r2, .L13+28
	ldr	r1, .L13+32
	mov	r3, r10
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	XLGMAC_SET_REG_BITS
	ldr	r2, .L13+36
	ldr	r1, .L13+40
	mov	r3, r4
	ldr	r2, [r2]
	ldr	r1, [r1]
	bl	XLGMAC_SET_REG_BITS
	ldr	r1, [r8]
	mov	r3, #1
	ldr	r2, [r9]
	bl	XLGMAC_SET_REG_BITS
	ldr	r1, [r6, #4]
	ldr	r3, [r7]
	ldr	r10, .L13+44
	add	r1, r1, r3
	bl	writel
	b	.L4
.L12:
	mov	r1, r10
	mov	r0, #1000
	bl	usleep_range
	subs	r5, r5, #1
	beq	.L10
.L4:
	ldr	r3, [r7]
	ldr	r0, [r6, #4]
	add	r0, r0, r3
	bl	readl
	ldr	r2, [r9]
	ldr	r1, [r8]
	bl	XLGMAC_GET_REG_BITS
	subs	r4, r0, #0
	bne	.L12
	b	.L3
.L14:
	.align	2
.L13:
	.word	MAC_RSSAR
	.word	MAC_RSSAR_OB_LEN
	.word	MAC_RSSAR_OB_POS
	.word	EBUSY
	.word	MAC_RSSDR
	.word	MAC_RSSAR_RSSIA_LEN
	.word	MAC_RSSAR_RSSIA_POS
	.word	MAC_RSSAR_ADDRT_LEN
	.word	MAC_RSSAR_ADDRT_POS
	.word	MAC_RSSAR_CT_LEN
	.word	MAC_RSSAR_CT_POS
	.word	1500
	.size	xlgmac_write_rss_reg, .-xlgmac_write_rss_reg
	.comm	MAC_RSSDR,4,4
	.comm	MAC_RSSAR_RSSIA_POS,4,4
	.comm	MAC_RSSAR_RSSIA_LEN,4,4
	.comm	MAC_RSSAR_OB_POS,4,4
	.comm	MAC_RSSAR_OB_LEN,4,4
	.comm	MAC_RSSAR_CT_POS,4,4
	.comm	MAC_RSSAR_CT_LEN,4,4
	.comm	MAC_RSSAR_ADDRT_POS,4,4
	.comm	MAC_RSSAR_ADDRT_LEN,4,4
	.comm	MAC_RSSAR,4,4
	.comm	EBUSY,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
