	.file	"extr_iphase.c_reset_sar.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	reset_sar, @function
reset_sar:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 280
	.cfi_def_cfa_offset 320
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 264[rsp], rax
	xor	eax, eax
	mov	r12, rsp
	lea	r13, 256[rsp]
	call	INPH_IA_DEV@PLT
	mov	rbx, r12
	mov	rbp, rax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L11:
	add	rbx, 4
	cmp	rbx, r13
	je	.L10
.L3:
	mov	edi, DWORD PTR 0[rbp]
	mov	esi, ebx
	mov	rdx, rbx
	sub	esi, r12d
	call	pci_read_config_dword@PLT
	cmp	DWORD PTR PCIBIOS_SUCCESSFUL[rip], eax
	je	.L11
.L1:
	mov	rcx, QWORD PTR 264[rsp]
	xor	rcx, QWORD PTR fs:40
	jne	.L12
	add	rsp, 280
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L10:
	.cfi_restore_state
	mov	rsi, QWORD PTR IPHASE5575_EXT_RESET[rip]
	xor	edi, edi
	add	rsi, QWORD PTR 8[rbp]
	xor	ebx, ebx
	call	writel@PLT
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L14:
	add	rbx, 1
	cmp	rbx, 64
	je	.L13
.L4:
	mov	edx, DWORD PTR [r12+rbx*4]
	mov	edi, DWORD PTR 0[rbp]
	lea	esi, 0[0+rbx*4]
	call	pci_write_config_dword@PLT
	cmp	DWORD PTR PCIBIOS_SUCCESSFUL[rip], eax
	je	.L14
	jmp	.L1
.L13:
	mov	edi, 5
	call	udelay@PLT
	xor	eax, eax
	jmp	.L1
.L12:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	reset_sar, .-reset_sar
	.comm	PCIBIOS_SUCCESSFUL,4,4
	.comm	IPHASE5575_EXT_RESET,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_iphase.c_reset_sar.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset_sar, %function
reset_sar:
	@ args = 0, pretend = 0, frame = 264
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r3, .L15
	sub	sp, sp, #264
	ldr	r3, [r3]
	str	r3, [sp, #260]
	mov	r3,#0
	bl	INPH_IA_DEV
	add	r8, sp, #4
	mov	r6, r0
	mov	r5, r8
	mov	r4, #0
	ldr	r7, .L15+4
	b	.L3
.L11:
	add	r4, r4, #4
	cmp	r4, #256
	add	r5, r5, #4
	beq	.L10
.L3:
	mov	r2, r5
	mov	r1, r4
	ldr	r0, [r6]
	bl	pci_read_config_dword
	ldr	r3, [r7]
	cmp	r3, r0
	beq	.L11
.L1:
	ldr	r3, .L15
	ldr	r2, [r3]
	ldr	r3, [sp, #260]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L12
	add	sp, sp, #264
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L10:
	ldr	r3, .L15+8
	ldr	r1, [r6, #4]
	ldr	r3, [r3]
	mov	r0, #0
	add	r1, r1, r3
	add	r5, r8, #252
	bl	writel
	mov	r4, sp
	rsb	r8, r8, #4
	b	.L4
.L14:
	cmp	r4, r5
	beq	.L13
.L4:
	add	r1, r8, r4
	ldr	r0, [r6]
	ldr	r2, [r4, #4]!
	bl	pci_write_config_dword
	ldr	r3, [r7]
	cmp	r3, r0
	beq	.L14
	b	.L1
.L13:
	mov	r0, #5
	bl	udelay
	mov	r0, #0
	b	.L1
.L12:
	bl	__stack_chk_fail
.L16:
	.align	2
.L15:
	.word	.LC0
	.word	PCIBIOS_SUCCESSFUL
	.word	IPHASE5575_EXT_RESET
	.size	reset_sar, .-reset_sar
	.comm	PCIBIOS_SUCCESSFUL,4,4
	.comm	IPHASE5575_EXT_RESET,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
