	.file	"extr_intel_pm.c_valleyview_init_gt_powersave.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"DDR speed: %d MHz\n"
.LC1:
	.string	"max GPU freq: %d MHz (%u)\n"
.LC2:
	.string	"RPe GPU freq: %d MHz (%u)\n"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC3:
	.string	"RP1(Guar Freq) GPU freq: %d MHz (%u)\n"
	.section	.rodata.str1.1
.LC4:
	.string	"min GPU freq: %d MHz (%u)\n"
	.text
	.p2align 4
	.type	valleyview_init_gt_powersave, @function
valleyview_init_gt_powersave:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	valleyview_setup_pctx@PLT
	mov	edi, DWORD PTR VLV_IOSF_SB_PUNIT[rip]
	call	BIT@PLT
	mov	edi, DWORD PTR VLV_IOSF_SB_NC[rip]
	mov	ebx, eax
	call	BIT@PLT
	mov	edi, DWORD PTR VLV_IOSF_SB_CCK[rip]
	or	ebx, eax
	call	BIT@PLT
	mov	rdi, rbp
	or	ebx, eax
	mov	esi, ebx
	call	vlv_iosf_sb_get@PLT
	mov	rdi, rbp
	call	vlv_init_gpll_ref_freq@PLT
	mov	esi, DWORD PTR PUNIT_REG_GPU_FREQ_STS[rip]
	mov	rdi, rbp
	call	vlv_punit_read@PLT
	sar	eax, 6
	and	eax, 3
	cmp	eax, 2
	je	.L2
	cmp	eax, 3
	je	.L3
	mov	DWORD PTR 0[rbp], 800
	mov	esi, 800
.L4:
	lea	rdi, .LC0[rip]
	xor	eax, eax
	call	DRM_DEBUG_DRIVER@PLT
	mov	rdi, rbp
	call	valleyview_rps_max_freq@PLT
	mov	rdi, rbp
	mov	DWORD PTR 16[rbp], eax
	mov	esi, eax
	mov	r12d, eax
	mov	DWORD PTR 20[rbp], eax
	call	intel_gpu_freq@PLT
	mov	edx, r12d
	lea	rdi, .LC1[rip]
	mov	esi, eax
	xor	eax, eax
	call	DRM_DEBUG_DRIVER@PLT
	mov	rdi, rbp
	call	valleyview_rps_rpe_freq@PLT
	mov	rdi, rbp
	mov	DWORD PTR 12[rbp], eax
	mov	esi, eax
	mov	r12d, eax
	call	intel_gpu_freq@PLT
	mov	edx, r12d
	lea	rdi, .LC2[rip]
	mov	esi, eax
	xor	eax, eax
	call	DRM_DEBUG_DRIVER@PLT
	mov	rdi, rbp
	call	valleyview_rps_guar_freq@PLT
	mov	rdi, rbp
	mov	DWORD PTR 8[rbp], eax
	mov	esi, eax
	mov	r12d, eax
	call	intel_gpu_freq@PLT
	mov	edx, r12d
	lea	rdi, .LC3[rip]
	mov	esi, eax
	xor	eax, eax
	call	DRM_DEBUG_DRIVER@PLT
	mov	rdi, rbp
	call	valleyview_rps_min_freq@PLT
	mov	rdi, rbp
	mov	DWORD PTR 4[rbp], eax
	mov	esi, eax
	mov	r12d, eax
	call	intel_gpu_freq@PLT
	mov	edx, r12d
	lea	rdi, .LC4[rip]
	mov	esi, eax
	xor	eax, eax
	call	DRM_DEBUG_DRIVER@PLT
	mov	edi, DWORD PTR VLV_IOSF_SB_PUNIT[rip]
	call	BIT@PLT
	mov	edi, DWORD PTR VLV_IOSF_SB_NC[rip]
	mov	ebx, eax
	call	BIT@PLT
	mov	edi, DWORD PTR VLV_IOSF_SB_CCK[rip]
	or	ebx, eax
	call	BIT@PLT
	mov	rdi, rbp
	or	ebx, eax
	mov	esi, ebx
	pop	rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	vlv_iosf_sb_put@PLT
	.p2align 4,,10
	.p2align 3
.L2:
	.cfi_restore_state
	mov	DWORD PTR 0[rbp], 1066
	mov	esi, 1066
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L3:
	mov	DWORD PTR 0[rbp], 1333
	mov	esi, 1333
	jmp	.L4
	.cfi_endproc
.LFE0:
	.size	valleyview_init_gt_powersave, .-valleyview_init_gt_powersave
	.comm	VLV_IOSF_SB_PUNIT,4,4
	.comm	VLV_IOSF_SB_NC,4,4
	.comm	VLV_IOSF_SB_CCK,4,4
	.comm	PUNIT_REG_GPU_FREQ_STS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_intel_pm.c_valleyview_init_gt_powersave.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"DDR speed: %d MHz\012\000"
	.align	2
.LC1:
	.ascii	"max GPU freq: %d MHz (%u)\012\000"
	.align	2
.LC2:
	.ascii	"RPe GPU freq: %d MHz (%u)\012\000"
	.align	2
.LC3:
	.ascii	"RP1(Guar Freq) GPU freq: %d MHz (%u)\012\000"
	.align	2
.LC4:
	.ascii	"min GPU freq: %d MHz (%u)\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	valleyview_init_gt_powersave, %function
valleyview_init_gt_powersave:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r8, .L7
	mov	r4, r0
	bl	valleyview_setup_pctx
	ldr	r0, [r8]
	bl	BIT
	ldr	r7, .L7+4
	mov	r5, r0
	ldr	r0, [r7]
	bl	BIT
	ldr	r6, .L7+8
	orr	r5, r5, r0
	ldr	r0, [r6]
	bl	BIT
	orr	r1, r5, r0
	mov	r0, r4
	bl	vlv_iosf_sb_get
	mov	r0, r4
	bl	vlv_init_gpll_ref_freq
	ldr	r3, .L7+12
	mov	r0, r4
	ldr	r1, [r3]
	bl	vlv_punit_read
	asr	r0, r0, #6
	and	r0, r0, #3
	cmp	r0, #2
	beq	.L2
	cmp	r0, #3
	movne	r1, #800
	strne	r1, [r4]
	ldreq	r3, .L7+16
	moveq	r1, r3
	streq	r3, [r4]
.L4:
	ldr	r0, .L7+20
	bl	DRM_DEBUG_DRIVER
	mov	r0, r4
	bl	valleyview_rps_max_freq
	mov	r1, r0
	mov	r0, r4
	str	r1, [r4, #16]
	str	r1, [r4, #20]
	bl	intel_gpu_freq
	ldr	r2, [r4, #16]
	mov	r1, r0
	ldr	r0, .L7+24
	bl	DRM_DEBUG_DRIVER
	mov	r0, r4
	bl	valleyview_rps_rpe_freq
	mov	r1, r0
	mov	r0, r4
	str	r1, [r4, #12]
	bl	intel_gpu_freq
	ldr	r2, [r4, #12]
	mov	r1, r0
	ldr	r0, .L7+28
	bl	DRM_DEBUG_DRIVER
	mov	r0, r4
	bl	valleyview_rps_guar_freq
	mov	r1, r0
	mov	r0, r4
	str	r1, [r4, #8]
	bl	intel_gpu_freq
	ldr	r2, [r4, #8]
	mov	r1, r0
	ldr	r0, .L7+32
	bl	DRM_DEBUG_DRIVER
	mov	r0, r4
	bl	valleyview_rps_min_freq
	mov	r1, r0
	mov	r0, r4
	str	r1, [r4, #4]
	bl	intel_gpu_freq
	ldr	r2, [r4, #4]
	mov	r1, r0
	ldr	r0, .L7+36
	bl	DRM_DEBUG_DRIVER
	ldr	r0, [r8]
	bl	BIT
	mov	r5, r0
	ldr	r0, [r7]
	bl	BIT
	mov	r1, r0
	ldr	r0, [r6]
	orr	r5, r5, r1
	bl	BIT
	mov	r1, r0
	mov	r0, r4
	orr	r1, r5, r1
	pop	{r4, r5, r6, r7, r8, lr}
	b	vlv_iosf_sb_put
.L2:
	ldr	r1, .L7+40
	str	r1, [r4]
	b	.L4
.L8:
	.align	2
.L7:
	.word	VLV_IOSF_SB_PUNIT
	.word	VLV_IOSF_SB_NC
	.word	VLV_IOSF_SB_CCK
	.word	PUNIT_REG_GPU_FREQ_STS
	.word	1333
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	1066
	.size	valleyview_init_gt_powersave, .-valleyview_init_gt_powersave
	.comm	VLV_IOSF_SB_PUNIT,4,4
	.comm	VLV_IOSF_SB_NC,4,4
	.comm	VLV_IOSF_SB_CCK,4,4
	.comm	PUNIT_REG_GPU_FREQ_STS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
