	.file	"extr_hevc_mc_uniw_msa.c_hevc_hz_uniwgt_8t_48w_msa.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	hevc_hz_uniwgt_8t_48w_msa, @function
hevc_hz_uniwgt_8t_48w_msa:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	lea	rax, -12[rdi]
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, r8
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movsx	rbp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movsx	rbx, ecx
	sub	rsp, 152
	.cfi_def_cfa_offset 208
	movzx	r13d, WORD PTR 208[rsp]
	mov	r12d, DWORD PTR 224[rsp]
	mov	QWORD PTR 96[rsp], rdx
	mov	QWORD PTR 88[rsp], rax
	mov	edi, r13d
	call	__msa_fill_w@PLT
	mov	edi, r12d
	mov	DWORD PTR 132[rsp], eax
	call	__msa_fill_w@PLT
	mov	edi, r13d
	sal	edi, 7
	mov	DWORD PTR 136[rsp], eax
	call	__msa_fill_h@PLT
	mov	edi, DWORD PTR 216[rsp]
	mov	r15d, eax
	call	__msa_fill_h@PLT
	lea	edi, -6[r12]
	mov	r13d, eax
	call	__msa_fill_h@PLT
	mov	edi, r15d
	mov	esi, eax
	call	__msa_srar_h@PLT
	mov	edi, r13d
	mov	esi, eax
	call	__msa_adds_s_h@PLT
	mov	rdi, r14
	mov	DWORD PTR 140[rsp], eax
	call	LD_SH@PLT
	sub	rsp, 8
	.cfi_def_cfa_offset 216
	xor	r9d, r9d
	xor	esi, esi
	push	0
	.cfi_def_cfa_offset 224
	mov	edi, eax
	mov	r8d, 3
	mov	ecx, 2
	push	0
	.cfi_def_cfa_offset 232
	mov	edx, 1
	push	0
	.cfi_def_cfa_offset 240
	call	SPLATI_H4_SH@PLT
	mov	rdi, QWORD PTR ff_hevc_mask_arr[rip]
	add	rsp, 32
	.cfi_def_cfa_offset 208
	call	LD_SB@PLT
	mov	DWORD PTR 128[rsp], 64
	mov	r15, rax
	lea	rax, 2[rax]
	mov	QWORD PTR 8[rsp], rax
	lea	rax, 4[r15]
	mov	QWORD PTR 16[rsp], rax
	lea	rax, 6[r15]
	mov	QWORD PTR 24[rsp], rax
	lea	rax, 8[r15]
	mov	QWORD PTR 56[rsp], rax
	lea	rax, 10[r15]
	mov	QWORD PTR 64[rsp], rax
	lea	rax, 12[r15]
	mov	QWORD PTR 72[rsp], rax
	lea	rax, 14[r15]
	mov	QWORD PTR 80[rsp], rax
	lea	rax, 0[0+rbp*4]
	mov	QWORD PTR 112[rsp], rax
	lea	rax, 0[0+rbx*4]
	mov	QWORD PTR 120[rsp], rax
	mov	QWORD PTR 32[rsp], r15
	.p2align 4,,10
	.p2align 3
.L2:
	mov	rbx, QWORD PTR 88[rsp]
	xor	ebp, ebp
	xor	r12d, r12d
	xor	r14d, r14d
	mov	r8, r14
	mov	rcx, rbp
	mov	rdx, r12
	mov	esi, 16
	mov	rdi, rbx
	call	LD_SB3@PLT
	lea	rdi, 160[rbx]
	call	LD_SB@PLT
	mov	rdx, r14
	mov	rsi, rbp
	mov	rdi, r12
	mov	r10, rax
	mov	rax, QWORD PTR 112[rsp]
	mov	rcx, r10
	mov	QWORD PTR 104[rsp], r10
	add	rbx, rax
	mov	QWORD PTR 88[rsp], rbx
	call	XORI_B4_128_SB@PLT
	push	0
	.cfi_def_cfa_offset 216
	mov	rsi, r12
	mov	rdi, r12
	push	0
	.cfi_def_cfa_offset 224
	push	0
	.cfi_def_cfa_offset 232
	push	0
	.cfi_def_cfa_offset 240
	mov	r13, QWORD PTR 48[rsp]
	mov	r15, QWORD PTR 40[rsp]
	mov	rbx, QWORD PTR 64[rsp]
	mov	r9, QWORD PTR 56[rsp]
	mov	r8, r13
	mov	rcx, r15
	mov	rdx, rbx
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	mov	rsi, rbp
	mov	rdi, r12
	push	0
	.cfi_def_cfa_offset 216
	push	0
	.cfi_def_cfa_offset 224
	push	0
	.cfi_def_cfa_offset 232
	push	0
	.cfi_def_cfa_offset 240
	mov	r8, QWORD PTR 104[rsp]
	mov	rcx, QWORD PTR 96[rsp]
	mov	rdx, QWORD PTR 88[rsp]
	mov	r9, QWORD PTR 112[rsp]
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	mov	r8, r13
	mov	rcx, r15
	push	0
	.cfi_def_cfa_offset 216
	mov	rdx, rbx
	mov	rsi, rbp
	mov	rdi, rbp
	push	0
	.cfi_def_cfa_offset 224
	push	0
	.cfi_def_cfa_offset 232
	push	0
	.cfi_def_cfa_offset 240
	mov	r9, QWORD PTR 56[rsp]
	mov	QWORD PTR 48[rsp], r13
	xor	r13d, r13d
	mov	QWORD PTR 40[rsp], r15
	xor	r15d, r15d
	mov	QWORD PTR 64[rsp], rbx
	xor	ebx, ebx
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	xor	r11d, r11d
	mov	rsi, r14
	push	0
	.cfi_def_cfa_offset 216
	mov	rdi, rbp
	push	r11
	.cfi_def_cfa_offset 224
	push	0
	.cfi_def_cfa_offset 232
	push	r15
	.cfi_def_cfa_offset 240
	mov	r9, QWORD PTR 112[rsp]
	mov	r8, QWORD PTR 104[rsp]
	mov	rcx, QWORD PTR 96[rsp]
	mov	rdx, QWORD PTR 88[rsp]
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	mov	r9d, ebp
	mov	r8d, ebx
	push	r13
	.cfi_def_cfa_offset 216
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	push	r12
	.cfi_def_cfa_offset 224
	xor	edi, edi
	call	HEVC_FILT_8TAP_SH@PLT
	mov	r9d, ebp
	mov	r8d, ebx
	xor	ecx, ecx
	mov	DWORD PTR 60[rsp], eax
	xor	edx, edx
	xor	edi, edi
	xor	esi, esi
	push	r13
	.cfi_def_cfa_offset 232
	push	r12
	.cfi_def_cfa_offset 240
	call	HEVC_FILT_8TAP_SH@PLT
	mov	r9d, ebp
	mov	r8d, ebx
	xor	ecx, ecx
	mov	DWORD PTR 80[rsp], eax
	add	rsp, 32
	.cfi_def_cfa_offset 208
	xor	edx, edx
	xor	esi, esi
	push	r13
	.cfi_def_cfa_offset 216
	xor	edi, edi
	push	r12
	.cfi_def_cfa_offset 224
	call	HEVC_FILT_8TAP_SH@PLT
	xor	r11d, r11d
	mov	r9d, ebp
	mov	r8d, ebx
	mov	DWORD PTR 68[rsp], eax
	mov	rdx, r11
	xor	ecx, ecx
	xor	esi, esi
	push	r13
	.cfi_def_cfa_offset 232
	mov	rdi, r15
	push	r12
	.cfi_def_cfa_offset 240
	call	HEVC_FILT_8TAP_SH@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	mov	rsi, r14
	mov	rdi, r14
	push	0
	.cfi_def_cfa_offset 216
	mov	r15d, eax
	push	0
	.cfi_def_cfa_offset 224
	push	0
	.cfi_def_cfa_offset 232
	push	0
	.cfi_def_cfa_offset 240
	mov	r9, QWORD PTR 56[rsp]
	mov	r8, QWORD PTR 48[rsp]
	mov	rcx, QWORD PTR 40[rsp]
	mov	rdx, QWORD PTR 64[rsp]
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	push	0
	.cfi_def_cfa_offset 216
	push	0
	.cfi_def_cfa_offset 224
	push	0
	.cfi_def_cfa_offset 232
	push	0
	.cfi_def_cfa_offset 240
	mov	r10, QWORD PTR 136[rsp]
	mov	r9, QWORD PTR 56[rsp]
	mov	r8, QWORD PTR 48[rsp]
	mov	rcx, QWORD PTR 40[rsp]
	mov	rdx, QWORD PTR 64[rsp]
	mov	rsi, r10
	mov	rdi, r10
	call	VSHF_B4_SB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	mov	r9d, ebp
	mov	r8d, ebx
	push	r13
	.cfi_def_cfa_offset 216
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	push	r12
	.cfi_def_cfa_offset 224
	xor	edi, edi
	call	HEVC_FILT_8TAP_SH@PLT
	push	r13
	.cfi_def_cfa_offset 232
	mov	r9d, ebp
	mov	r8d, ebx
	push	r12
	.cfi_def_cfa_offset 240
	xor	ecx, ecx
	xor	edx, edx
	xor	esi, esi
	xor	edi, edi
	mov	r14d, eax
	call	HEVC_FILT_8TAP_SH@PLT
	add	rsp, 24
	.cfi_def_cfa_offset 216
	mov	ecx, r15d
	push	r15
	.cfi_def_cfa_offset 224
	mov	esi, DWORD PTR 68[rsp]
	mov	ebx, eax
	push	rsi
	.cfi_def_cfa_offset 232
	mov	edi, DWORD PTR 72[rsp]
	mov	edx, esi
	push	rdi
	.cfi_def_cfa_offset 240
	mov	eax, DWORD PTR 76[rsp]
	push	rax
	.cfi_def_cfa_offset 248
	mov	ebp, DWORD PTR 176[rsp]
	push	rbp
	.cfi_def_cfa_offset 256
	mov	r12d, DWORD PTR 188[rsp]
	mov	r13d, DWORD PTR 180[rsp]
	mov	r9d, r12d
	mov	DWORD PTR 100[rsp], esi
	mov	r8d, r13d
	mov	esi, edi
	mov	DWORD PTR 96[rsp], edi
	mov	edi, eax
	mov	DWORD PTR 92[rsp], eax
	call	HEVC_UNIW_RND_CLIP4_MAX_SATU_H@PLT
	add	rsp, 40
	.cfi_def_cfa_offset 216
	mov	r8d, ebp
	mov	ecx, r12d
	push	rbx
	.cfi_def_cfa_offset 224
	mov	edx, r13d
	mov	esi, ebx
	xor	ebp, ebp
	xor	r13d, r13d
	xor	r12d, r12d
	mov	r9d, r14d
	mov	edi, r14d
	call	HEVC_UNIW_RND_CLIP2_MAX_SATU_H@PLT
	mov	DWORD PTR [rsp], ebp
	mov	r8d, ebx
	mov	r9d, r14d
	push	r13
	.cfi_def_cfa_offset 232
	mov	edx, r15d
	push	r12
	.cfi_def_cfa_offset 240
	mov	ecx, DWORD PTR 84[rsp]
	mov	esi, DWORD PTR 76[rsp]
	mov	edi, DWORD PTR 80[rsp]
	call	PCKEV_B3_UB@PLT
	add	rsp, 32
	.cfi_def_cfa_offset 208
	mov	esi, r13d
	mov	edi, r12d
	mov	rbx, QWORD PTR 96[rsp]
	mov	ecx, 16
	mov	rdx, rbx
	call	ST_UB2@PLT
	lea	rsi, 128[rbx]
	mov	edi, ebp
	call	ST_UB@PLT
	mov	rax, QWORD PTR 120[rsp]
	add	rbx, rax
	sub	DWORD PTR 128[rsp], 1
	mov	QWORD PTR 96[rsp], rbx
	jne	.L2
	add	rsp, 152
	.cfi_def_cfa_offset 56
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE0:
	.size	hevc_hz_uniwgt_8t_48w_msa, .-hevc_hz_uniwgt_8t_48w_msa
	.comm	ff_hevc_mask_arr,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hevc_mc_uniw_msa.c_hevc_hz_uniwgt_8t_48w_msa.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	hevc_hz_uniwgt_8t_48w_msa, %function
hevc_hz_uniwgt_8t_48w_msa:
	@ args = 20, pretend = 0, frame = 72
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	sub	sp, sp, #108
	ldrh	r6, [sp, #152]
	sub	r0, r0, #12
	str	r0, [sp, #44]
	mov	r0, r6
	str	r2, [sp, #88]
	mov	r5, r1
	mov	r4, r3
	ldr	r7, [sp, #160]
	bl	__msa_fill_w
	mov	r3, r0
	mov	r0, r7
	str	r3, [sp, #60]
	bl	__msa_fill_w
	mov	r3, r0
	lsl	r0, r6, #7
	str	r3, [sp, #64]
	bl	__msa_fill_h
	mov	r8, r0
	ldr	r0, [sp, #156]
	bl	__msa_fill_h
	mov	r6, r0
	sub	r0, r7, #6
	bl	__msa_fill_h
	mov	r1, r0
	mov	r0, r8
	bl	__msa_srar_h
	mov	r1, r0
	mov	r0, r6
	bl	__msa_adds_s_h
	mov	r3, r0
	ldr	r0, [sp, #144]
	mov	r6, #0
	str	r3, [sp, #68]
	bl	LD_SH
	mov	r3, #3
	mov	r1, r6
	mov	r2, #1
	str	r3, [sp]
	str	r6, [sp, #16]
	mov	r3, #2
	str	r6, [sp, #12]
	str	r6, [sp, #8]
	str	r6, [sp, #4]
	bl	SPLATI_H4_SH
	mov	r2, #64
	ldr	r3, .L6
	str	r2, [sp, #56]
	ldr	r0, [r3]
	bl	LD_SB
	lsl	r3, r5, #2
	str	r3, [sp, #96]
	lsl	r3, r4, #2
	str	r3, [sp, #100]
	add	r3, r0, #2
	str	r3, [sp, #32]
	add	r3, r0, #4
	str	r3, [sp, #36]
	add	r3, r0, #6
	str	r3, [sp, #40]
	add	r3, r0, #8
	str	r3, [sp, #72]
	add	r3, r0, #10
	str	r3, [sp, #76]
	add	r3, r0, #12
	str	r3, [sp, #80]
	add	r3, r0, #14
	str	r0, [sp, #52]
	str	r3, [sp, #84]
.L2:
	mov	r8, #0
	ldr	r6, [sp, #44]
	mov	r3, r8
	mov	r2, r8
	mov	r1, #16
	mov	r0, r6
	str	r8, [sp]
	bl	LD_SB3
	add	r0, r6, #160
	str	r6, [sp, #44]
	bl	LD_SB
	mov	fp, r8
	mov	r7, r8
	mov	r10, r8
	mov	r9, r8
	mov	r3, r0
	mov	r2, r8
	mov	r1, r8
	str	r0, [sp, #92]
	mov	r0, r8
	bl	XORI_B4_128_SB
	ldr	ip, [sp, #36]
	ldr	r2, [sp, #40]
	mov	r1, r8
	str	ip, [sp]
	mov	r0, r8
	ldr	r3, [sp, #32]
	str	r2, [sp, #4]
	str	r8, [sp, #20]
	ldr	r2, [sp, #52]
	str	r8, [sp, #16]
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B4_SB
	ldr	lr, [sp, #84]
	ldr	r5, [sp, #80]
	mov	r1, r8
	str	lr, [sp, #4]
	mov	r0, r8
	ldr	r3, [sp, #76]
	ldr	r2, [sp, #72]
	str	r5, [sp]
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B4_SB
	ldr	ip, [sp, #36]
	ldr	r0, [sp, #40]
	str	ip, [sp]
	mov	r1, r8
	ldr	r3, [sp, #32]
	ldr	r2, [sp, #52]
	str	r0, [sp, #4]
	str	r8, [sp, #20]
	mov	r0, r8
	str	r8, [sp, #16]
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B4_SB
	ldr	lr, [sp, #84]
	mov	r1, r8
	str	lr, [sp, #4]
	ldr	lr, [sp, #80]
	mov	r0, r8
	str	lr, [sp]
	ldr	r3, [sp, #76]
	ldr	r2, [sp, #72]
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	bl	VSHF_B4_SB
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stm	sp, {r7, r9, r10, fp}
	bl	HEVC_FILT_8TAP_SH
	mov	ip, r0
	mov	r3, r8
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stm	sp, {r7, r9, r10, fp}
	str	ip, [sp, #48]
	bl	HEVC_FILT_8TAP_SH
	mov	r3, r8
	mov	r4, r0
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stm	sp, {r7, r9, r10, fp}
	bl	HEVC_FILT_8TAP_SH
	mov	r3, r8
	mov	r6, r0
	mov	r2, r8
	mov	r1, r8
	mov	r0, r8
	stm	sp, {r7, r9, r10, fp}
	bl	HEVC_FILT_8TAP_SH
	ldr	ip, [sp, #36]
	mov	r5, r0
	mov	r1, r8
	ldr	lr, [sp, #40]
	mov	r0, r8
	str	r8, [sp, #20]
	str	r8, [sp, #16]
	str	r8, [sp, #12]
	str	r8, [sp, #8]
	ldr	r8, [sp, #52]
	str	ip, [sp]
	mov	r2, r8
	ldr	r3, [sp, #32]
	str	lr, [sp, #4]
	bl	VSHF_B4_SB
	ldr	lr, [sp, #40]
	ldr	r0, [sp, #36]
	ldr	r1, [sp, #92]
	str	lr, [sp, #4]
	mov	r2, r8
	ldr	r3, [sp, #32]
	str	r0, [sp]
	str	fp, [sp, #20]
	mov	r0, r1
	str	fp, [sp, #16]
	str	fp, [sp, #12]
	str	fp, [sp, #8]
	bl	VSHF_B4_SB
	mov	r3, fp
	mov	r2, fp
	mov	r1, fp
	stm	sp, {r7, r9, r10, fp}
	mov	r0, fp
	bl	HEVC_FILT_8TAP_SH
	mov	r3, fp
	mov	r8, r0
	mov	r2, fp
	mov	r1, fp
	stm	sp, {r7, r9, r10, fp}
	mov	r0, fp
	bl	HEVC_FILT_8TAP_SH
	mov	r7, r0
	ldr	lr, [sp, #60]
	ldr	r2, [sp, #64]
	ldr	r1, [sp, #68]
	ldr	r0, [sp, #48]
	str	lr, [sp]
	mov	r3, r5
	str	r4, [sp, #16]
	str	r2, [sp, #8]
	str	r1, [sp, #4]
	mov	r2, r6
	mov	r1, r4
	str	r5, [sp, #24]
	str	r6, [sp, #20]
	str	r0, [sp, #12]
	bl	HEVC_UNIW_RND_CLIP4_MAX_SATU_H
	ldr	ip, [sp, #64]
	mov	r1, r7
	str	ip, [sp]
	ldr	r3, [sp, #68]
	ldr	r2, [sp, #60]
	mov	r0, r8
	str	r7, [sp, #8]
	str	r8, [sp, #4]
	bl	HEVC_UNIW_RND_CLIP2_MAX_SATU_H
	mov	r3, r6
	mov	r2, r5
	mov	r0, r4
	ldr	r1, [sp, #48]
	stm	sp, {r7, r8}
	str	fp, [sp, #16]
	str	fp, [sp, #12]
	str	fp, [sp, #8]
	bl	PCKEV_B3_UB
	ldr	r4, [sp, #88]
	mov	r3, #16
	mov	r2, r4
	mov	r1, fp
	mov	r0, fp
	bl	ST_UB2
	mov	r0, fp
	add	r1, r4, #128
	bl	ST_UB
	ldr	r2, [sp, #56]
	ldr	r3, [sp, #44]
	subs	r2, r2, #1
	str	r2, [sp, #56]
	ldr	r2, [sp, #96]
	add	r3, r3, r2
	str	r3, [sp, #44]
	ldr	r3, [sp, #100]
	add	r3, r4, r3
	str	r3, [sp, #88]
	bne	.L2
	add	sp, sp, #108
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	.align	2
.L6:
	.word	ff_hevc_mask_arr
	.size	hevc_hz_uniwgt_8t_48w_msa, .-hevc_hz_uniwgt_8t_48w_msa
	.comm	ff_hevc_mask_arr,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
