	.file	"extr_lag_mp.c_mlx5_lag_fib_route_event.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"Multipath offload require two ports of the same HCA\n"
	.text
	.p2align 4
	.type	mlx5_lag_fib_route_event, @function
mlx5_lag_fib_route_event:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	mov	r12, rdi
	push	rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	mov	rbp, rdx
	push	rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	sub	rsp, 16
	.cfi_def_cfa_offset 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 8[rsp], rax
	xor	eax, eax
	cmp	QWORD PTR FIB_EVENT_ENTRY_DEL[rip], rsi
	je	.L20
	mov	rdi, rdx
	call	fib_info_num_path@PLT
	cmp	eax, 1
	je	.L21
	cmp	eax, 2
	je	.L22
.L1:
	mov	rax, QWORD PTR 8[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L23
	add	rsp, 16
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	pop	rbx
	.cfi_def_cfa_offset 24
	pop	rbp
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L20:
	.cfi_restore_state
	cmp	QWORD PTR 16[rdi], rdx
	jne	.L1
	mov	QWORD PTR 16[rdi], 0
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L22:
	xor	esi, esi
	mov	rdi, rbp
	call	fib_info_nh@PLT
	mov	esi, 1
	mov	rdi, rbp
	mov	rbx, rax
	call	fib_info_nh@PLT
	mov	rdx, QWORD PTR 8[r12]
	mov	rcx, QWORD PTR [rbx]
	mov	rsi, QWORD PTR [rdx]
	mov	rdi, QWORD PTR 16[rdx]
	cmp	rcx, rsi
	je	.L7
.L8:
	cmp	rcx, rdi
	jne	.L10
	cmp	rsi, QWORD PTR [rax]
	jne	.L10
.L9:
	cmp	QWORD PTR 16[r12], 0
	je	.L24
.L12:
	xor	esi, esi
	mov	rdi, r12
	call	mlx5_lag_set_port_affinity@PLT
	mov	QWORD PTR 16[r12], rbp
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L10:
	mov	edi, DWORD PTR 8[rdx]
	lea	rsi, .LC0[rip]
	call	mlx5_core_warn@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L21:
	mov	rdi, r12
	call	__mlx5_lag_is_active@PLT
	test	rax, rax
	je	.L1
	xor	esi, esi
	mov	rdi, rbp
	call	fib_info_nh@PLT
	mov	rdi, r12
	mov	rsi, QWORD PTR [rax]
	call	mlx5_lag_dev_get_netdev_idx@PLT
	mov	rdi, r12
	lea	esi, 1[rax]
	call	mlx5_lag_set_port_affinity@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L7:
	cmp	QWORD PTR [rax], rdi
	jne	.L8
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L24:
	mov	rdi, r12
	call	__mlx5_lag_is_active@PLT
	test	rax, rax
	jne	.L12
	mov	eax, DWORD PTR [r12]
	mov	edx, DWORD PTR MLX5_LAG_FLAG_MULTIPATH[rip]
	lea	rsi, 4[rsp]
	mov	rdi, r12
	mov	DWORD PTR 4[rsp], eax
	call	mlx5_activate_lag@PLT
	jmp	.L12
.L23:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	mlx5_lag_fib_route_event, .-mlx5_lag_fib_route_event
	.comm	MLX5_LAG_FLAG_MULTIPATH,4,4
	.comm	FIB_EVENT_ENTRY_DEL,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_lag_mp.c_mlx5_lag_fib_route_event.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"Multipath offload require two ports of the same HCA"
	.ascii	"\012\000"
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mlx5_lag_fib_route_event, %function
mlx5_lag_fib_route_event:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	ldr	r3, .L25
	sub	sp, sp, #8
	ldr	r3, [r3]
	mov	r5, r0
	cmp	r3, r1
	ldr	r3, .L25+4
	mov	r4, r2
	ldr	r3, [r3]
	str	r3, [sp, #4]
	mov	r3,#0
	beq	.L20
	mov	r0, r2
	bl	fib_info_num_path
	cmp	r0, #1
	beq	.L21
	cmp	r0, #2
	beq	.L22
.L1:
	ldr	r3, .L25+4
	ldr	r2, [r3]
	ldr	r3, [sp, #4]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L23
	add	sp, sp, #8
	@ sp needed
	pop	{r4, r5, r6, pc}
.L20:
	ldr	r3, [r0, #8]
	cmp	r3, r2
	moveq	r3, #0
	streq	r3, [r0, #8]
	b	.L1
.L22:
	mov	r1, #0
	mov	r0, r4
	bl	fib_info_nh
	mov	r6, r0
	mov	r1, #1
	mov	r0, r4
	bl	fib_info_nh
	ldr	r3, [r5, #4]
	ldr	r2, [r6]
	ldr	r1, [r3]
	ldr	ip, [r3, #8]
	cmp	r2, r1
	beq	.L7
.L8:
	cmp	r2, ip
	bne	.L10
	ldr	r2, [r0]
	cmp	r1, r2
	bne	.L10
.L9:
	ldr	r3, [r5, #8]
	cmp	r3, #0
	beq	.L24
.L12:
	mov	r1, #0
	mov	r0, r5
	bl	mlx5_lag_set_port_affinity
	str	r4, [r5, #8]
	b	.L1
.L10:
	ldr	r0, [r3, #4]
	ldr	r1, .L25+8
	bl	mlx5_core_warn
	b	.L1
.L21:
	mov	r0, r5
	bl	__mlx5_lag_is_active
	cmp	r0, #0
	beq	.L1
	mov	r0, r4
	mov	r1, #0
	bl	fib_info_nh
	mov	r3, r0
	mov	r0, r5
	ldr	r1, [r3]
	bl	mlx5_lag_dev_get_netdev_idx
	mov	r1, r0
	mov	r0, r5
	add	r1, r1, #1
	bl	mlx5_lag_set_port_affinity
	b	.L1
.L7:
	ldr	lr, [r0]
	cmp	lr, ip
	bne	.L8
	b	.L9
.L24:
	mov	r0, r5
	bl	__mlx5_lag_is_active
	cmp	r0, #0
	bne	.L12
	ldr	r2, .L25+12
	ldr	r3, [r5]
	mov	r1, sp
	mov	r0, r5
	ldr	r2, [r2]
	str	r3, [sp]
	bl	mlx5_activate_lag
	b	.L12
.L23:
	bl	__stack_chk_fail
.L26:
	.align	2
.L25:
	.word	FIB_EVENT_ENTRY_DEL
	.word	.LC1
	.word	.LC0
	.word	MLX5_LAG_FLAG_MULTIPATH
	.size	mlx5_lag_fib_route_event, .-mlx5_lag_fib_route_event
	.comm	MLX5_LAG_FLAG_MULTIPATH,4,4
	.comm	FIB_EVENT_ENTRY_DEL,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
