	.file	"extr_pcibr_dma.c_pcibr_dmamap_ate32.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	pcibr_dmamap_ate32, @function
pcibr_dmamap_ate32:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, r8d
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12, rdx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	ebp, esi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	rax, QWORD PTR 8[rdi]
	mov	DWORD PTR 12[rsp], ecx
	mov	rbx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR 8[rax]
	mov	rax, QWORD PTR [rax]
	mov	edi, DWORD PTR [rax]
	call	PCI_SLOT@PLT
	mov	rdi, rbx
	mov	r15, rax
	mov	eax, DWORD PTR PCI32_ATE_V[rip]
	mov	DWORD PTR 8[rsp], eax
	call	IS_PIC_SOFT@PLT
	test	rax, rax
	je	.L5
	mov	rdi, rbx
	call	IS_PCIX@PLT
	test	rax, rax
	jne	.L8
.L5:
	mov	rsi, r12
	mov	edi, ebp
	call	MINIMAL_ATE_FLAG@PLT
	test	eax, eax
	je	.L3
	lea	rdi, -1[r12]
	call	IOPG@PLT
	lea	r14d, 1[rax]
.L7:
	mov	esi, r14d
	mov	rdi, rbx
	call	pcibr_ate_alloc@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L8
	mov	eax, DWORD PTR 8[rsp]
	mov	rdi, rbx
	or	eax, DWORD PTR 12[rsp]
	mov	DWORD PTR 8[rsp], eax
	call	IS_PCIX@PLT
	test	rax, rax
	je	.L9
	mov	esi, DWORD PTR PCI32_ATE_PREF[rip]
	not	esi
	and	DWORD PTR 8[rsp], esi
.L9:
	xor	edi, edi
	cmp	DWORD PTR SN_DMA_ADDR_PHYS[rip], r13d
	sete	dil
	call	SN_DMA_ADDRTYPE@PLT
	test	rax, rax
	jne	.L38
.L10:
	mov	edi, ebp
	call	IOPGOFF@PLT
	mov	rdi, rbx
	sub	ebp, eax
	mov	DWORD PTR 12[rsp], eax
	or	ebp, DWORD PTR 8[rsp]
	call	IS_PIC_SOFT@PLT
	test	rax, rax
	je	.L12
	mov	ecx, DWORD PTR PIC_ATE_TARGETID_SHFT[rip]
	mov	eax, DWORD PTR [rbx]
	sal	eax, cl
	or	ebp, eax
.L12:
	test	DWORD PTR SN_DMA_MSI[rip], r13d
	jne	.L39
.L13:
	mov	edx, r14d
	mov	esi, r12d
	mov	ecx, ebp
	mov	rdi, rbx
	call	ate_write@PLT
	mov	rax, QWORD PTR 8[rbx]
	mov	edx, DWORD PTR 12[rsp]
	imul	r12d, DWORD PTR IOPGSIZE[rip]
	add	edx, DWORD PTR PCI32_MAPPED_BASE[rip]
	mov	eax, DWORD PTR -4[rax+r15*4]
	add	r12d, edx
	test	DWORD PTR PCIBR_DEV_SWAP_DIR[rip], eax
	je	.L1
	mov	edi, r12d
	call	ATE_SWAP_ON@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L8:
	xor	r12d, r12d
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	mov	eax, DWORD PTR IOPGSIZE[rip]
	sub	eax, 1
	cdqe
	lea	rdi, -1[r12+rax]
	call	IOPG@PLT
	lea	r14d, 1[rax]
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L39:
	mov	rdi, rbx
	or	ebp, DWORD PTR PCI32_ATE_MSI[rip]
	call	IS_TIOCP_SOFT@PLT
	test	rax, rax
	je	.L13
	or	ebp, DWORD PTR PCI32_ATE_PIO[rip]
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L38:
	mov	rdi, rbx
	call	IS_PIC_SOFT@PLT
	mov	edi, ebp
	test	rax, rax
	je	.L11
	call	PHYS_TO_DMA@PLT
	mov	ebp, eax
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L11:
	call	PHYS_TO_TIODMA@PLT
	mov	ebp, eax
	jmp	.L10
	.cfi_endproc
.LFE0:
	.size	pcibr_dmamap_ate32, .-pcibr_dmamap_ate32
	.comm	SN_DMA_MSI,4,4
	.comm	SN_DMA_ADDR_PHYS,4,4
	.comm	PIC_ATE_TARGETID_SHFT,4,4
	.comm	PCIBR_DEV_SWAP_DIR,4,4
	.comm	PCI32_MAPPED_BASE,4,4
	.comm	PCI32_ATE_V,4,4
	.comm	PCI32_ATE_PREF,4,4
	.comm	PCI32_ATE_PIO,4,4
	.comm	PCI32_ATE_MSI,4,4
	.comm	IOPGSIZE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_pcibr_dma.c_pcibr_dmamap_ate32.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pcibr_dmamap_ate32, %function
pcibr_dmamap_ate32:
	@ args = 4, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	ip, [r0, #4]
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r4, r1
	ldr	r1, [ip, #4]
	mov	r5, r2
	ldr	r2, [r1]
	ldr	r6, [ip, #8]
	ldr	r0, [r2]
	mov	r9, r3
	bl	PCI_SLOT
	ldr	r3, .L40
	mov	r7, r0
	mov	r0, r6
	ldr	r10, [r3]
	bl	IS_PIC_SOFT
	cmp	r0, #0
	beq	.L5
	mov	r0, r6
	bl	IS_PCIX
	cmp	r0, #0
	bne	.L8
.L5:
	mov	r1, r5
	mov	r0, r4
	bl	MINIMAL_ATE_FLAG
	cmp	r0, #0
	beq	.L3
	sub	r0, r5, #1
	bl	IOPG
	add	r8, r0, #1
.L7:
	mov	r1, r8
	mov	r0, r6
	bl	pcibr_ate_alloc
	subs	r5, r0, #0
	blt	.L8
	mov	r0, r6
	bl	IS_PCIX
	cmp	r0, #0
	ldrne	r3, .L40+4
	orr	r9, r10, r9
	ldrne	r3, [r3]
	bicne	r9, r9, r3
	ldr	r3, .L40+8
	ldr	r0, [r3]
	ldr	r3, [sp, #32]
	sub	r0, r0, r3
	clz	r0, r0
	lsr	r0, r0, #5
	bl	SN_DMA_ADDRTYPE
	cmp	r0, #0
	bne	.L38
.L10:
	mov	r0, r4
	bl	IOPGOFF
	sub	r4, r4, r0
	mov	r10, r0
	mov	r0, r6
	bl	IS_PIC_SOFT
	cmp	r0, #0
	ldrne	r3, .L40+12
	ldrne	r2, [r6]
	ldrne	r3, [r3]
	orr	r4, r4, r9
	orrne	r4, r4, r2, lsl r3
	ldr	r3, .L40+16
	ldr	r2, [sp, #32]
	ldr	r3, [r3]
	tst	r2, r3
	bne	.L39
.L13:
	mov	r3, r4
	mov	r2, r8
	mov	r1, r5
	mov	r0, r6
	bl	ate_write
	ldr	r0, .L40+20
	ldr	r2, [r6, #4]
	ldr	r3, .L40+24
	ldr	r1, .L40+28
	sub	r7, r7, #1
	ldr	r4, [r0]
	ldr	r2, [r2, r7, lsl #2]
	ldr	r3, [r3]
	ldr	r0, [r1]
	add	r4, r10, r4
	tst	r2, r3
	mla	r4, r0, r5, r4
	beq	.L1
	mov	r0, r4
	bl	ATE_SWAP_ON
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L8:
	mov	r4, #0
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L3:
	ldr	r3, .L40+28
	ldr	r0, [r3]
	sub	r0, r0, #2
	add	r0, r0, r5
	bl	IOPG
	add	r8, r0, #1
	b	.L7
.L39:
	ldr	r3, .L40+32
	mov	r0, r6
	ldr	r3, [r3]
	orr	r4, r4, r3
	bl	IS_TIOCP_SOFT
	cmp	r0, #0
	ldrne	r3, .L40+36
	ldrne	r3, [r3]
	orrne	r4, r4, r3
	b	.L13
.L38:
	mov	r0, r6
	bl	IS_PIC_SOFT
	cmp	r0, #0
	mov	r0, r4
	beq	.L11
	bl	PHYS_TO_DMA
	mov	r4, r0
	b	.L10
.L11:
	bl	PHYS_TO_TIODMA
	mov	r4, r0
	b	.L10
.L41:
	.align	2
.L40:
	.word	PCI32_ATE_V
	.word	PCI32_ATE_PREF
	.word	SN_DMA_ADDR_PHYS
	.word	PIC_ATE_TARGETID_SHFT
	.word	SN_DMA_MSI
	.word	PCI32_MAPPED_BASE
	.word	PCIBR_DEV_SWAP_DIR
	.word	IOPGSIZE
	.word	PCI32_ATE_MSI
	.word	PCI32_ATE_PIO
	.size	pcibr_dmamap_ate32, .-pcibr_dmamap_ate32
	.comm	SN_DMA_MSI,4,4
	.comm	SN_DMA_ADDR_PHYS,4,4
	.comm	PIC_ATE_TARGETID_SHFT,4,4
	.comm	PCIBR_DEV_SWAP_DIR,4,4
	.comm	PCI32_MAPPED_BASE,4,4
	.comm	PCI32_ATE_V,4,4
	.comm	PCI32_ATE_PREF,4,4
	.comm	PCI32_ATE_PIO,4,4
	.comm	PCI32_ATE_MSI,4,4
	.comm	IOPGSIZE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
