	.file	"extr_rtl_dm.c__rtl92e_dm_check_fsync.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"RSSI %d TimeInterval %d MultipleTimeInterval %d\n"
	.align 8
.LC1:
	.string	"RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n"
	.text
	.p2align 4
	.type	_rtl92e_dm_check_fsync, @function
_rtl92e_dm_check_fsync:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	rtllib_priv@PLT
	mov	edi, DWORD PTR COMP_HALDM[rip]
	lea	rsi, .LC0[rip]
	mov	rbx, rax
	mov	rax, QWORD PTR 32[rax]
	mov	ecx, DWORD PTR 48[rax]
	mov	edx, DWORD PTR 52[rax]
	mov	r8d, DWORD PTR 44[rax]
	call	RT_TRACE@PLT
	mov	rax, QWORD PTR 32[rbx]
	mov	edi, DWORD PTR COMP_HALDM[rip]
	lea	rsi, .LC1[rip]
	mov	edx, DWORD PTR 40[rax]
	mov	ecx, DWORD PTR 36[rax]
	mov	r8d, DWORD PTR 32[rax]
	call	RT_TRACE@PLT
	mov	rax, QWORD PTR 32[rbx]
	mov	rsi, QWORD PTR RTLLIB_LINKED[rip]
	cmp	QWORD PTR [rax], rsi
	mov	edx, DWORD PTR 16[rax]
	je	.L31
.L3:
	cmp	edx, 128
	je	.L11
	cmp	edx, 129
	je	.L32
	cmp	QWORD PTR 24[rbx], 0
	je	.L33
.L13:
	mov	rsi, QWORD PTR RTLLIB_LINKED[rip]
	cmp	QWORD PTR [rax], rsi
	je	.L34
.L14:
	cmp	QWORD PTR reg_c38_State.1972[rip], 0
	jne	.L35
.L21:
	mov	rax, QWORD PTR reset_cnt.1973[rip]
	cmp	QWORD PTR 16[rbx], rax
	je	.L1
	mov	edx, DWORD PTR 8[rbx]
	mov	esi, DWORD PTR rOFDM0_RxDetector3[rip]
	mov	rdi, rbp
	call	rtl92e_writeb@PLT
	mov	rax, QWORD PTR 16[rbx]
	mov	QWORD PTR reg_c38_State.1972[rip], 0
	mov	QWORD PTR reset_cnt.1973[rip], rax
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L33:
	.cfi_restore_state
	mov	rax, QWORD PTR reg_c38_State.1972[rip]
.L8:
	test	rax, rax
	jne	.L20
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L32:
	.cfi_restore_state
	mov	rdi, rbp
	call	_rtl92e_dm_end_hw_fsync@PLT
	mov	rax, QWORD PTR 32[rbx]
	cmp	QWORD PTR 24[rbx], 0
	mov	DWORD PTR 16[rax], 130
	jne	.L13
	jmp	.L33
	.p2align 4,,10
	.p2align 3
.L31:
	mov	rcx, QWORD PTR 24[rax]
	mov	rsi, QWORD PTR HT_IOT_PEER_BROADCOM[rip]
	cmp	QWORD PTR [rcx], rsi
	jne	.L3
	cmp	QWORD PTR 8[rax], 0
	jne	.L4
	cmp	edx, 128
	je	.L5
	cmp	edx, 130
	je	.L26
.L6:
	cmp	QWORD PTR 24[rbx], 0
	mov	rax, QWORD PTR reg_c38_State.1972[rip]
	je	.L8
	cmp	rax, 2
	je	.L21
	mov	esi, DWORD PTR rOFDM0_RxDetector3[rip]
	mov	edx, 149
	mov	rdi, rbp
	call	rtl92e_writeb@PLT
	mov	QWORD PTR reg_c38_State.1972[rip], 2
	jmp	.L10
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rdi, rbp
	call	_rtl92e_dm_end_sw_fsync@PLT
	mov	rax, QWORD PTR 32[rbx]
	cmp	QWORD PTR 24[rbx], 0
	mov	DWORD PTR 16[rax], 130
	jne	.L13
	jmp	.L33
	.p2align 4,,10
	.p2align 3
.L34:
	mov	rdx, QWORD PTR [rbx]
	mov	rax, QWORD PTR RegC38_TH[rip]
	cmp	rdx, rax
	jg	.L15
	cmp	QWORD PTR reg_c38_State.1972[rip], 1
	je	.L21
	mov	esi, DWORD PTR rOFDM0_RxDetector3[rip]
	mov	edx, 144
	mov	rdi, rbp
	call	rtl92e_writeb@PLT
	mov	QWORD PTR reg_c38_State.1972[rip], 1
.L10:
	cmp	QWORD PTR 24[rbx], 0
	jne	.L21
.L20:
	mov	edx, DWORD PTR 8[rbx]
	mov	esi, DWORD PTR rOFDM0_RxDetector3[rip]
	mov	rdi, rbp
	call	rtl92e_writeb@PLT
	mov	QWORD PTR reg_c38_State.1972[rip], 0
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	rbp
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L35:
	.cfi_restore_state
	mov	edx, DWORD PTR 8[rbx]
	mov	esi, DWORD PTR rOFDM0_RxDetector3[rip]
	mov	rdi, rbp
	call	rtl92e_writeb@PLT
	cmp	QWORD PTR 24[rbx], 0
	mov	QWORD PTR reg_c38_State.1972[rip], 0
	jne	.L21
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L15:
	add	rax, 4
	cmp	rdx, rax
	jle	.L21
	jmp	.L14
	.p2align 4,,10
	.p2align 3
.L4:
	cmp	edx, 129
	je	.L7
	cmp	edx, 130
	jne	.L6
.L27:
	mov	rdi, rbp
	call	_rtl92e_dm_start_sw_fsync@PLT
	mov	rax, QWORD PTR 32[rbx]
	mov	DWORD PTR 16[rax], 128
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rdi, rbp
	call	_rtl92e_dm_end_sw_fsync@PLT
.L26:
	mov	rdi, rbp
	call	_rtl92e_dm_start_hw_fsync@PLT
	mov	rax, QWORD PTR 32[rbx]
	mov	DWORD PTR 16[rax], 129
	jmp	.L6
	.p2align 4,,10
	.p2align 3
.L7:
	mov	rdi, rbp
	call	_rtl92e_dm_end_hw_fsync@PLT
	jmp	.L27
	.cfi_endproc
.LFE0:
	.size	_rtl92e_dm_check_fsync, .-_rtl92e_dm_check_fsync
	.local	reset_cnt.1973
	.comm	reset_cnt.1973,8,8
	.local	reg_c38_State.1972
	.comm	reg_c38_State.1972,8,8
	.comm	rOFDM0_RxDetector3,4,4
	.comm	RegC38_TH,8,8
	.comm	RegC38_NonFsync_Other_AP,8,8
	.comm	RegC38_Fsync_AP_BCM,8,8
	.comm	RegC38_Default,8,8
	.comm	RTLLIB_LINKED,8,8
	.comm	HT_IOT_PEER_BROADCOM,8,8
	.comm	COMP_HALDM,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_rtl_dm.c__rtl92e_dm_check_fsync.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"RSSI %d TimeInterval %d MultipleTimeInterval %d\012"
	.ascii	"\000"
	.align	2
.LC1:
	.ascii	"RateBitmap 0x%x FirstDiffRateThreshold %d SecondDif"
	.ascii	"fRateThreshold %d\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	_rtl92e_dm_check_fsync, %function
_rtl92e_dm_check_fsync:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, lr}
	sub	sp, sp, #12
	mov	r5, r0
	bl	rtllib_priv
	mov	r4, r0
	ldr	r1, [r0, #16]
	ldr	r6, .L52
	ldr	r3, [r1, #32]
	ldr	r2, [r1, #36]
	ldr	r1, [r1, #28]
	str	r1, [sp]
	ldr	r0, [r6]
	ldr	r1, .L52+4
	bl	RT_TRACE
	ldr	r1, [r4, #16]
	ldr	r0, [r6]
	ldr	r3, [r1, #20]
	ldr	r2, [r1, #24]
	ldr	r1, [r1, #16]
	ldr	r6, .L52+8
	str	r1, [sp]
	ldr	r1, .L52+12
	bl	RT_TRACE
	ldr	r3, [r4, #16]
	ldr	r2, [r6]
	ldr	r1, [r3]
	cmp	r1, r2
	ldrne	r2, [r3, #8]
	beq	.L47
.L3:
	cmp	r2, #128
	beq	.L11
	cmp	r2, #129
	beq	.L48
	ldr	r2, [r4, #12]
	cmp	r2, #0
	beq	.L49
.L13:
	ldr	r2, [r3]
	ldr	r3, [r6]
	cmp	r2, r3
	ldrne	r6, .L52+16
	beq	.L50
.L45:
	ldr	r3, [r6]
	cmp	r3, #0
	bne	.L51
.L21:
	ldr	r2, [r4, #8]
	ldr	r3, [r6, #4]
	cmp	r2, r3
	beq	.L1
	ldr	r3, .L52+20
	ldr	r2, [r4, #4]
	ldr	r1, [r3]
	mov	r0, r5
	bl	rtl92e_writeb
	mov	r2, #0
	ldr	r3, [r4, #8]
	stm	r6, {r2, r3}
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L49:
	ldr	r6, .L52+16
	ldr	r3, [r6]
.L8:
	cmp	r3, #0
	ldrne	r7, .L52+20
	bne	.L20
.L1:
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L48:
	mov	r0, r5
	bl	_rtl92e_dm_end_hw_fsync
	mov	r2, #130
	ldr	r3, [r4, #16]
	str	r2, [r3, #8]
	ldr	r2, [r4, #12]
	cmp	r2, #0
	bne	.L13
	b	.L49
.L47:
	ldr	r1, [r3, #12]
	ldr	r2, .L52+24
	ldr	r0, [r1]
	ldr	r1, [r2]
	ldr	r2, [r3, #8]
	cmp	r0, r1
	bne	.L3
	ldr	r3, [r3, #4]
	cmp	r3, #0
	bne	.L4
	cmp	r2, #128
	beq	.L5
	cmp	r2, #130
	beq	.L41
.L6:
	ldr	r3, [r4, #12]
	ldr	r6, .L52+16
	cmp	r3, #0
	ldr	r3, [r6]
	beq	.L8
	cmp	r3, #2
	beq	.L21
	ldr	r7, .L52+20
	mov	r2, #149
	mov	r0, r5
	ldr	r1, [r7]
	bl	rtl92e_writeb
	mov	r3, #2
	str	r3, [r6]
	b	.L10
.L11:
	mov	r0, r5
	bl	_rtl92e_dm_end_sw_fsync
	mov	r2, #130
	ldr	r3, [r4, #16]
	str	r2, [r3, #8]
	ldr	r2, [r4, #12]
	cmp	r2, #0
	bne	.L13
	b	.L49
.L50:
	ldr	r3, .L52+28
	ldr	r2, [r4]
	ldr	r3, [r3]
	cmp	r2, r3
	bgt	.L15
	ldr	r6, .L52+16
	ldr	r3, [r6]
	cmp	r3, #1
	beq	.L21
	ldr	r7, .L52+20
	mov	r2, #144
	mov	r0, r5
	ldr	r1, [r7]
	bl	rtl92e_writeb
	mov	r3, #1
	str	r3, [r6]
.L10:
	ldr	r3, [r4, #12]
	cmp	r3, #0
	bne	.L21
.L20:
	mov	r0, r5
	ldr	r2, [r4, #4]
	ldr	r1, [r7]
	bl	rtl92e_writeb
	mov	r3, #0
	str	r3, [r6]
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, pc}
.L51:
	ldr	r3, .L52+20
	mov	r0, r5
	ldr	r1, [r3]
	ldr	r2, [r4, #4]
	bl	rtl92e_writeb
	mov	r3, #0
	str	r3, [r6]
	ldr	r3, [r4, #12]
	cmp	r3, #0
	bne	.L21
	b	.L1
.L15:
	add	r3, r3, #4
	cmp	r2, r3
	ldr	r6, .L52+16
	bgt	.L45
	b	.L21
.L4:
	cmp	r2, #129
	beq	.L7
	cmp	r2, #130
	bne	.L6
.L42:
	mov	r0, r5
	bl	_rtl92e_dm_start_sw_fsync
	mov	r2, #128
	ldr	r3, [r4, #16]
	str	r2, [r3, #8]
	b	.L6
.L5:
	mov	r0, r5
	bl	_rtl92e_dm_end_sw_fsync
.L41:
	mov	r0, r5
	bl	_rtl92e_dm_start_hw_fsync
	mov	r2, #129
	ldr	r3, [r4, #16]
	str	r2, [r3, #8]
	b	.L6
.L7:
	mov	r0, r5
	bl	_rtl92e_dm_end_hw_fsync
	b	.L42
.L53:
	.align	2
.L52:
	.word	COMP_HALDM
	.word	.LC0
	.word	RTLLIB_LINKED
	.word	.LC1
	.word	.LANCHOR0
	.word	rOFDM0_RxDetector3
	.word	HT_IOT_PEER_BROADCOM
	.word	RegC38_TH
	.size	_rtl92e_dm_check_fsync, .-_rtl92e_dm_check_fsync
	.comm	rOFDM0_RxDetector3,4,4
	.comm	RegC38_TH,4,4
	.comm	RegC38_NonFsync_Other_AP,4,4
	.comm	RegC38_Fsync_AP_BCM,4,4
	.comm	RegC38_Default,4,4
	.comm	RTLLIB_LINKED,4,4
	.comm	HT_IOT_PEER_BROADCOM,4,4
	.comm	COMP_HALDM,4,4
	.bss
	.align	2
	.set	.LANCHOR0,. + 0
	.type	reg_c38_State.4256, %object
	.size	reg_c38_State.4256, 4
reg_c38_State.4256:
	.space	4
	.type	reset_cnt.4257, %object
	.size	reset_cnt.4257, 4
reset_cnt.4257:
	.space	4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
