	.file	"extr_tc-score.c_do_ldst_insn.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"register same as write-back base"
	.align 8
.LC1:
	.string	"pre-indexed expression expected"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"missing ]"
	.section	.rodata.str1.8
	.align 8
.LC3:
	.string	"invalid constant: %d bit expression not in range %d..%d"
	.text
	.p2align 4
	.type	do_ldst_insn, @function
do_ldst_insn:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	push	rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	sub	rsp, 24
	.cfi_def_cfa_offset 64
	mov	QWORD PTR 8[rsp], rdi
	lea	rbp, 8[rsp]
	call	skip_whitespace@PLT
	mov	edx, DWORD PTR REG_TYPE_SCORE[rip]
	mov	esi, 20
	mov	rdi, rbp
	call	reg_required_here@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	rdi, rbp
	mov	ebx, eax
	call	skip_past_comma@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	rdi, QWORD PTR 8[rsp]
	cmp	BYTE PTR [rdi], 91
	je	.L59
	mov	rax, QWORD PTR BAD_ARGS[rip]
	mov	QWORD PTR inst[rip+8], rax
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	pop	rbx
	.cfi_def_cfa_offset 32
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L59:
	.cfi_restore_state
	add	rdi, 1
	mov	QWORD PTR 8[rsp], rdi
	call	skip_whitespace@PLT
	mov	edx, DWORD PTR REG_TYPE_SCORE[rip]
	mov	esi, 15
	mov	rdi, rbp
	call	reg_required_here@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	mov	r12d, eax
	je	.L1
	mov	rdi, QWORD PTR 8[rsp]
	call	skip_whitespace@PLT
	mov	r13, QWORD PTR 8[rsp]
	cmp	BYTE PTR 0[r13], 93
	jne	.L6
	lea	rdi, 1[r13]
	mov	QWORD PTR 8[rsp], rdi
	cmp	BYTE PTR 1[r13], 43
	je	.L60
	call	end_of_line@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	edi, DWORD PTR inst[rip]
	mov	edx, DWORD PTR OPC_PSEUDOLDST_MASK[rip]
	mov	esi, edi
	mov	eax, edx
	and	esi, edx
	mov	rdx, QWORD PTR score_ldst_insns[rip]
	not	eax
	lea	ecx, [rsi+rsi*2]
	add	ecx, DWORD PTR LDST_NOUPDATE[rip]
	and	eax, edi
	movsx	rcx, ecx
	or	eax, DWORD PTR [rdx+rcx*4]
	cmp	esi, DWORD PTR INSN_LBU[rip]
	mov	DWORD PTR inst[rip], eax
	je	.L61
	cmp	esi, DWORD PTR INSN_LH[rip]
	je	.L62
	cmp	esi, DWORD PTR INSN_LW[rip]
	je	.L63
	cmp	DWORD PTR INSN_SB[rip], esi
	je	.L64
	cmp	DWORD PTR INSN_SH[rip], esi
	je	.L65
	cmp	DWORD PTR INSN_SW[rip], esi
	je	.L66
	mov	DWORD PTR inst[rip+16], 32768
.L18:
	cmp	DWORD PTR INSN_SB[rip], esi
	je	.L14
	cmp	DWORD PTR INSN_SH[rip], esi
	je	.L14
	cmp	DWORD PTR INSN_SW[rip], esi
	jne	.L1
	.p2align 4,,10
	.p2align 3
.L14:
	test	eax, 17301504
	jne	.L1
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	shr	eax, 11
	shr	edx, 12
	and	eax, 240
	and	edx, 3840
	or	eax, edx
	or	eax, DWORD PTR inst[rip+16]
	or	ah, 32
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L6:
	mov	rdi, rbp
	call	skip_past_comma@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L67
	mov	rsi, rbp
	lea	rdi, inst[rip+32]
	call	my_get_expression@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	rdi, QWORD PTR 8[rsp]
	call	skip_whitespace@PLT
	mov	rax, QWORD PTR 8[rsp]
	lea	rdi, 1[rax]
	mov	QWORD PTR 8[rsp], rdi
	cmp	BYTE PTR [rax], 93
	je	.L22
	lea	rdi, .LC2[rip]
	call	_@PLT
	mov	QWORD PTR inst[rip+8], rax
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L60:
	add	r13, 2
	mov	rdi, rbp
	mov	QWORD PTR 8[rsp], r13
	call	skip_past_comma@PLT
	cdqe
	cmp	rax, QWORD PTR SUCCESS[rip]
	je	.L68
	xor	edi, edi
	call	SET_INSN_ERROR@PLT
	mov	rdi, QWORD PTR 8[rsp]
	call	end_of_line@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	esi, DWORD PTR _SIMM12[rip]
	mov	edi, DWORD PTR inst[rip+40]
	xor	edx, edx
	call	validate_immediate@PLT
	mov	esi, DWORD PTR inst[rip]
	mov	rdx, QWORD PTR score_ldst_insns[rip]
	mov	r8d, eax
	mov	eax, DWORD PTR OPC_PSEUDOLDST_MASK[rip]
	mov	ecx, esi
	and	ecx, eax
	not	eax
	lea	ecx, 1[rcx+rcx*2]
	and	eax, esi
	movsx	rcx, ecx
	or	eax, DWORD PTR [rdx+rcx*4]
	mov	rcx, QWORD PTR _SIMM12[rip]
	mov	edx, 1
	sal	rcx, 4
	add	rcx, QWORD PTR score_df_range[rip]
	mov	ecx, DWORD PTR [rcx]
	mov	DWORD PTR inst[rip+16], 32768
	sal	edx, cl
	sub	edx, 1
	and	edx, r8d
	sal	edx, 3
	or	eax, edx
	mov	DWORD PTR inst[rip], eax
	jmp	.L1
.L22:
	call	skip_whitespace@PLT
	mov	rdi, QWORD PTR 8[rsp]
	cmp	BYTE PTR [rdi], 43
	jne	.L49
	add	rdi, 1
	mov	ebp, 1
	mov	QWORD PTR 8[rsp], rdi
	cmp	ebx, r12d
	je	.L69
.L23:
	call	end_of_line@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	rax, QWORD PTR O_constant[rip]
	cmp	QWORD PTR inst[rip+32], rax
	je	.L70
	mov	QWORD PTR inst[rip+24], 0
	jmp	.L1
.L67:
	lea	rdi, .LC1[rip]
	call	_@PLT
	mov	QWORD PTR inst[rip+8], rax
	jmp	.L1
.L61:
	mov	edx, DWORD PTR INSN16_LBU[rip]
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L14
.L49:
	xor	ebp, ebp
	jmp	.L23
.L68:
	mov	rdx, QWORD PTR _SIMM12[rip]
	mov	esi, 3
	mov	rdi, rbp
	call	exp_ldst_offset@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	rdi, QWORD PTR 8[rsp]
	call	end_of_line@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	je	.L1
	mov	eax, DWORD PTR OPC_PSEUDOLDST_MASK[rip]
	mov	ecx, DWORD PTR inst[rip]
	mov	edx, eax
	and	edx, ecx
	cmp	ebx, r12d
	jne	.L9
	cmp	DWORD PTR INSN_LH[rip], edx
	je	.L24
	cmp	DWORD PTR INSN_LHU[rip], edx
	je	.L24
	cmp	DWORD PTR INSN_LW[rip], edx
	je	.L24
	cmp	DWORD PTR INSN_LB[rip], edx
	je	.L24
	cmp	DWORD PTR INSN_LBU[rip], edx
	je	.L24
.L9:
	not	eax
	lea	edx, [rdx+rdx*2]
	add	edx, DWORD PTR LDST_POST[rip]
	and	eax, ecx
	mov	rcx, QWORD PTR score_ldst_insns[rip]
	movsx	rdx, edx
	or	eax, DWORD PTR [rcx+rdx*4]
	mov	edx, eax
	mov	DWORD PTR inst[rip], eax
	and	edx, 1040187399
	cmp	edx, 234881024
	jne	.L1
	mov	ecx, eax
	sar	ecx, 15
	test	cl, 24
	jne	.L1
	mov	edx, eax
	sar	edx, 3
	and	edx, 4095
	cmp	edx, 4
	jne	.L1
	mov	edx, eax
	sal	ecx, 4
	shr	edx, 12
	and	ecx, 112
	and	edx, 3840
	or	edx, ecx
	mov	ecx, edx
	or	ecx, 8202
	test	eax, 16777216
	je	.L12
	mov	ecx, edx
	or	ecx, 8330
.L12:
	mov	DWORD PTR inst[rip+16], ecx
	mov	DWORD PTR inst[rip+20], 2
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L62:
	mov	edx, DWORD PTR INSN16_LH[rip]
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L14
.L63:
	mov	edx, DWORD PTR INSN16_LW[rip]
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L14
.L70:
	cmp	ebp, 1
	mov	ebx, DWORD PTR _SIMM15[rip]
	cmove	ebx, DWORD PTR _SIMM12[rip]
	cmp	BYTE PTR 1[r13], 48
	je	.L71
.L28:
	mov	edi, DWORD PTR inst[rip+40]
	xor	edx, edx
	mov	esi, ebx
	call	validate_immediate@PLT
	cmp	eax, DWORD PTR FAIL[rip]
	mov	edx, eax
	je	.L72
	mov	eax, ebx
	mov	esi, DWORD PTR inst[rip]
	sal	rax, 4
	add	rax, QWORD PTR score_df_range[rip]
	mov	ecx, DWORD PTR [rax]
	mov	eax, 1
	sal	eax, cl
	mov	ecx, esi
	sub	eax, 1
	and	edx, eax
	mov	eax, DWORD PTR OPC_PSEUDOLDST_MASK[rip]
	and	ecx, eax
	not	eax
	lea	ecx, [rcx+rcx*2]
	and	eax, esi
	mov	rsi, QWORD PTR score_ldst_insns[rip]
	add	ecx, ebp
	movsx	rcx, ecx
	or	eax, DWORD PTR [rsi+rcx*4]
	lea	ecx, 0[0+rdx*8]
	or	ecx, eax
	or	eax, edx
	cmp	ebp, 1
	cmove	eax, ecx
	mov	edx, eax
	mov	DWORD PTR inst[rip], eax
	and	edx, 1040187392
	cmp	edx, 536870912
	je	.L73
	cmp	edx, 671088640
	je	.L74
	mov	ecx, eax
	and	ecx, 1040187399
	cmp	ecx, 100663300
	je	.L75
	cmp	edx, 570425344
	je	.L76
	cmp	edx, 704643072
	je	.L77
	cmp	edx, 738197504
	je	.L78
	cmp	edx, 771751936
	je	.L79
.L35:
	mov	DWORD PTR inst[rip+16], 32768
	jmp	.L1
.L69:
	mov	eax, DWORD PTR inst[rip]
	and	eax, DWORD PTR OPC_PSEUDOLDST_MASK[rip]
	cmp	DWORD PTR INSN_LH[rip], eax
	je	.L24
	cmp	DWORD PTR INSN_LHU[rip], eax
	je	.L24
	cmp	DWORD PTR INSN_LW[rip], eax
	je	.L24
	cmp	DWORD PTR INSN_LB[rip], eax
	je	.L24
	cmp	DWORD PTR INSN_LBU[rip], eax
	jne	.L23
.L24:
	lea	rdi, .LC0[rip]
	call	_@PLT
	mov	QWORD PTR inst[rip+8], rax
	jmp	.L1
.L64:
	mov	edx, DWORD PTR INSN16_SB[rip]
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L18
.L65:
	mov	edx, DWORD PTR INSN16_SH[rip]
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L18
.L72:
	mov	rdx, QWORD PTR score_df_range[rip]
	mov	eax, ebx
	cmp	ebx, 29
	jbe	.L55
	lea	eax, -24[rbx]
.L55:
	sal	rax, 4
	lea	rdi, .LC3[rip]
	add	rax, rdx
	mov	rdx, QWORD PTR 8[rax]
	mov	r12d, DWORD PTR [rax]
	mov	ebx, DWORD PTR 4[rdx]
	mov	r13d, DWORD PTR [rdx]
	call	_@PLT
	mov	rdi, QWORD PTR err_msg[rip]
	mov	edx, r12d
	mov	rsi, rax
	mov	r8d, ebx
	mov	ecx, r13d
	call	sprintf@PLT
	mov	rax, QWORD PTR err_msg[rip]
	mov	QWORD PTR inst[rip+8], rax
	jmp	.L1
.L71:
	cmp	BYTE PTR 2[r13], 120
	jne	.L28
	cmp	DWORD PTR _SIMM16_LA[rip], ebx
	je	.L28
	cmp	DWORD PTR _VALUE_HI16[rip], ebx
	je	.L28
	cmp	DWORD PTR _VALUE_LO16[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM16[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM15[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM14[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM4[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM5[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM8[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM5_RSHIFT_1[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM5_RSHIFT_2[rip], ebx
	je	.L28
	cmp	DWORD PTR _SIMM14_NEG[rip], ebx
	je	.L28
	cmp	DWORD PTR _IMM10_RSHIFT_2[rip], ebx
	je	.L28
	add	ebx, 24
	jmp	.L28
.L66:
	mov	edx, DWORD PTR INSN16_SW[rip]
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L18
.L73:
	test	eax, 17301504
	jne	.L35
	mov	edx, eax
	sar	edx, 15
	test	eax, 32767
	je	.L57
	and	edx, 15
	cmp	edx, 2
	jne	.L35
	test	eax, 32643
	jne	.L35
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	add	eax, eax
	shr	edx, 12
	and	eax, 65528
	and	edx, 3840
	or	eax, edx
	or	ah, 112
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L74:
	test	eax, 17301504
	jne	.L35
	mov	edx, eax
	sar	edx, 15
	test	eax, 32767
	je	.L57
	and	edx, 15
	cmp	edx, 2
	jne	.L35
	test	eax, 32643
	jne	.L35
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	add	eax, eax
	shr	edx, 12
	and	eax, 65528
	and	edx, 3840
	or	eax, edx
	or	eax, 28676
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L57:
	mov	DWORD PTR inst[rip+20], 2
	shr	eax, 12
	and	eax, 3840
	mov	ecx, eax
	mov	eax, edx
	sal	eax, 4
	movzx	eax, al
	or	eax, ecx
	or	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L75:
	mov	ecx, eax
	sar	ecx, 15
	test	cl, 24
	jne	.L35
	mov	edx, eax
	sar	edx, 3
	and	edx, 4095
	cmp	edx, 4092
	jne	.L35
	mov	edx, eax
	sal	ecx, 4
	shr	edx, 12
	and	ecx, 112
	and	edx, 3840
	or	edx, ecx
	test	eax, 16777216
	je	.L40
	mov	DWORD PTR inst[rip+20], 2
	or	edx, 8334
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L1
.L76:
	test	eax, 17301504
	jne	.L35
	mov	edx, eax
	sar	edx, 15
	test	eax, 32767
	je	.L57
	and	edx, 15
	cmp	edx, 2
	jne	.L35
	test	eax, 32705
	jne	.L35
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	sal	eax, 2
	shr	edx, 12
	and	eax, 131064
	and	edx, 3840
	or	eax, edx
	or	eax, 28673
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L78:
	test	eax, 17301504
	jne	.L35
	mov	edx, eax
	sar	edx, 15
	test	eax, 32767
	je	.L57
	and	edx, 15
	cmp	edx, 2
	jne	.L35
	test	eax, 32736
	jne	.L35
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	sal	eax, 3
	shr	edx, 12
	and	eax, 262136
	and	edx, 3840
	or	eax, edx
	or	eax, 28675
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L77:
	test	eax, 17301504
	jne	.L35
	mov	edx, eax
	sar	edx, 15
	test	eax, 32767
	je	.L57
	and	edx, 15
	cmp	edx, 2
	jne	.L35
	test	eax, 32705
	jne	.L35
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	sal	eax, 2
	shr	edx, 12
	and	eax, 131064
	and	edx, 3840
	or	eax, edx
	or	eax, 28677
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L79:
	test	eax, 17301504
	jne	.L35
	mov	edx, eax
	sar	edx, 15
	test	eax, 32767
	je	.L57
	and	edx, 15
	cmp	edx, 2
	jne	.L35
	test	eax, 32736
	jne	.L35
	mov	DWORD PTR inst[rip+20], 2
	mov	edx, eax
	sal	eax, 3
	shr	edx, 12
	and	eax, 262136
	and	edx, 3840
	or	eax, edx
	or	eax, 28679
	mov	DWORD PTR inst[rip+16], eax
	jmp	.L1
.L40:
	mov	DWORD PTR inst[rip+20], 2
	or	edx, 8206
	mov	DWORD PTR inst[rip+16], edx
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	do_ldst_insn, .-do_ldst_insn
	.comm	score_ldst_insns,8,8
	.comm	score_df_range,8,8
	.comm	inst,48,32
	.comm	err_msg,8,8
	.comm	_VALUE_LO16,4,4
	.comm	_VALUE_HI16,4,4
	.comm	_SIMM16_LA,4,4
	.comm	_SIMM15,4,4
	.comm	_SIMM14_NEG,4,4
	.comm	_SIMM12,8,8
	.comm	_IMM8,4,4
	.comm	_IMM5_RSHIFT_2,4,4
	.comm	_IMM5_RSHIFT_1,4,4
	.comm	_IMM5,4,4
	.comm	_IMM4,4,4
	.comm	_IMM16,4,4
	.comm	_IMM15,4,4
	.comm	_IMM14,4,4
	.comm	_IMM10_RSHIFT_2,4,4
	.comm	SUCCESS,8,8
	.comm	REG_TYPE_SCORE,4,4
	.comm	O_constant,8,8
	.comm	OPC_PSEUDOLDST_MASK,4,4
	.comm	LDST_POST,4,4
	.comm	LDST_NOUPDATE,4,4
	.comm	INSN_SW,4,4
	.comm	INSN_SH,4,4
	.comm	INSN_SB,4,4
	.comm	INSN_LW,4,4
	.comm	INSN_LHU,4,4
	.comm	INSN_LH,4,4
	.comm	INSN_LBU,4,4
	.comm	INSN_LB,4,4
	.comm	INSN16_SW,4,4
	.comm	INSN16_SH,4,4
	.comm	INSN16_SB,4,4
	.comm	INSN16_LW,4,4
	.comm	INSN16_LH,4,4
	.comm	INSN16_LBU,4,4
	.comm	FAIL,8,8
	.comm	BAD_ARGS,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_tc-score.c_do_ldst_insn.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"register same as write-back base\000"
	.align	2
.LC1:
	.ascii	"pre-indexed expression expected\000"
	.align	2
.LC2:
	.ascii	"missing ]\000"
	.align	2
.LC3:
	.ascii	"invalid constant: %d bit expression not in range %d"
	.ascii	"..%d\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	do_ldst_insn, %function
do_ldst_insn:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, lr}
	ldr	r6, .L77
	sub	sp, sp, #16
	str	r0, [sp, #12]
	bl	skip_whitespace
	mov	r1, #20
	ldr	r2, [r6]
	add	r0, sp, #12
	bl	reg_required_here
	ldr	r5, .L77+4
	ldr	r3, [r5]
	cmp	r3, r0
	beq	.L1
	mov	r4, r0
	add	r0, sp, #12
	bl	skip_past_comma
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r0, [sp, #12]
	ldrb	r3, [r0]	@ zero_extendqisi2
	cmp	r3, #91
	beq	.L58
	ldr	r2, .L77+8
	ldr	r3, .L77+12
	ldr	r2, [r2]
	str	r2, [r3, #4]
.L1:
	add	sp, sp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, r8, pc}
.L58:
	add	r0, r0, #1
	str	r0, [sp, #12]
	bl	skip_whitespace
	ldr	r2, [r6]
	mov	r1, #15
	add	r0, sp, #12
	bl	reg_required_here
	ldr	r3, [r5]
	mov	r6, r0
	cmp	r3, r0
	beq	.L1
	ldr	r0, [sp, #12]
	bl	skip_whitespace
	ldr	r7, [sp, #12]
	ldrb	r3, [r7]	@ zero_extendqisi2
	cmp	r3, #93
	bne	.L6
	add	r0, r7, #1
	str	r0, [sp, #12]
	ldrb	r3, [r7, #1]	@ zero_extendqisi2
	cmp	r3, #43
	beq	.L59
	bl	end_of_line
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r8, .L77+12
	ldr	r2, .L77+16
	ldr	r3, [r8]
	ldr	r0, [r2]
	ldr	ip, .L77+20
	ldr	r1, .L77+24
	and	r2, r3, r0
	ldr	lr, [ip]
	ldr	ip, [r1]
	add	r1, r2, r2, lsl #1
	add	r1, r1, lr
	ldr	ip, [ip, r1, lsl #2]
	ldr	r1, .L77+28
	bic	r3, r3, r0
	ldr	r1, [r1]
	orr	r3, r3, ip
	cmp	r2, r1
	str	r3, [r8]
	beq	.L60
	ldr	r1, .L77+32
	ldr	r1, [r1]
	cmp	r2, r1
	beq	.L61
	ldr	r1, .L77+36
	ldr	r1, [r1]
	cmp	r2, r1
	beq	.L62
	ldr	r1, .L77+40
	ldr	r0, [r1]
	cmp	r0, r2
	beq	.L63
	ldr	r0, .L77+44
	ldr	r0, [r0]
	cmp	r0, r2
	beq	.L64
	ldr	r0, .L77+48
	ldr	r0, [r0]
	cmp	r0, r2
	movne	r0, #32768
	ldreq	r0, .L77+52
	ldreq	r0, [r0]
	str	r0, [r8, #8]
.L18:
	ldr	r1, [r1]
	cmp	r1, r2
	beq	.L14
	ldr	r1, .L77+44
	ldr	r1, [r1]
	cmp	r1, r2
	beq	.L14
	ldr	r1, .L77+48
	ldr	r1, [r1]
	cmp	r1, r2
	bne	.L1
.L14:
	tst	r3, #17301504
	bne	.L1
	mov	r0, #2
	lsr	r1, r3, #11
	lsr	r2, r3, #12
	and	r3, r2, #3840
	and	r2, r1, #240
	ldr	r1, [r8, #8]
	orr	r3, r3, r2
	orr	r3, r3, r1
	orr	r3, r3, #8192
	str	r3, [r8, #8]
	str	r0, [r8, #12]
	b	.L1
.L6:
	add	r0, sp, #12
	bl	skip_past_comma
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L65
	ldr	r0, .L77+56
	add	r1, sp, #12
	bl	my_get_expression
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r0, [sp, #12]
	bl	skip_whitespace
	ldr	r3, [sp, #12]
	add	r0, r3, #1
	str	r0, [sp, #12]
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #93
	beq	.L22
	ldr	r0, .L77+60
	bl	_
	ldr	r3, .L77+12
	str	r0, [r3, #4]
	b	.L1
.L59:
	add	r7, r7, #2
	add	r0, sp, #12
	str	r7, [sp, #12]
	bl	skip_past_comma
	ldr	r3, .L77+64
	ldr	r3, [r3]
	cmp	r0, r3
	beq	.L66
	mov	r0, #0
	bl	SET_INSN_ERROR
	ldr	r0, [sp, #12]
	bl	end_of_line
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r4, .L77+12
	ldr	r5, .L77+68
	mov	r2, #0
	ldr	r1, [r5]
	ldr	r0, [r4, #24]
	bl	validate_immediate
	mvn	r2, #0
	mov	lr, #32768
	ldr	r1, .L77+72
	ldr	r3, .L77+16
	ldr	r6, [r5]
	ldr	r1, [r1]
	ldr	ip, [r3]
	ldr	r1, [r1, r6, lsl #3]
	ldr	r3, [r4]
	ldr	r5, .L77+24
	bic	r1, r0, r2, lsl r1
	and	r2, r3, ip
	ldr	r5, [r5]
	add	r2, r2, r2, lsl #1
	add	r2, r2, #1
	ldr	r2, [r5, r2, lsl #2]
	bic	r3, r3, ip
	orr	r3, r3, r2
	orr	r3, r3, r1, lsl #3
	str	r3, [r4]
	str	lr, [r4, #8]
	b	.L1
.L22:
	bl	skip_whitespace
	ldr	r0, [sp, #12]
	ldrb	r3, [r0]	@ zero_extendqisi2
	cmp	r3, #43
	bne	.L49
	add	r0, r0, #1
	cmp	r4, r6
	str	r0, [sp, #12]
	beq	.L67
.L51:
	mov	r6, #1
.L23:
	bl	end_of_line
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r8, .L77+12
	ldr	r3, .L77+76
	ldr	r2, [r8, #20]
	ldr	r3, [r3]
	cmp	r2, r3
	movne	r3, #0
	strne	r3, [r8, #16]
	bne	.L1
	cmp	r6, #1
	ldreq	r3, .L77+68
	ldrne	r3, .L77+80
	ldr	r4, [r3]
	ldrb	r3, [r7, #1]	@ zero_extendqisi2
	cmp	r3, #48
	beq	.L68
.L28:
	mov	r2, #0
	mov	r1, r4
	ldr	r0, [r8, #24]
	bl	validate_immediate
	ldr	r3, [r5]
	cmp	r3, r0
	beq	.L69
	mvn	ip, #0
	ldr	r2, .L77+16
	ldr	r3, [r8]
	ldr	r1, [r2]
	ldr	lr, .L77+24
	ldr	r5, .L77+72
	and	r2, r3, r1
	ldr	lr, [lr]
	ldr	r5, [r5]
	add	r2, r2, r2, lsl #1
	add	r2, r2, r6
	ldr	lr, [lr, r2, lsl #2]
	ldr	r2, [r5, r4, lsl #3]
	bic	r3, r3, r1
	orr	r3, r3, lr
	cmp	r6, #1
	bic	r0, r0, ip, lsl r2
	orreq	r3, r3, r0, lsl #3
	orrne	r3, r3, r0
	and	r2, r3, #1040187392
	cmp	r2, #536870912
	str	r3, [r8]
	beq	.L70
	cmp	r2, #671088640
	beq	.L71
	ldr	r1, .L77+84
	ldr	r0, .L77+88
	and	r1, r1, r3
	cmp	r1, r0
	beq	.L72
	cmp	r2, #570425344
	beq	.L73
	cmp	r2, #704643072
	beq	.L74
	cmp	r2, #738197504
	beq	.L75
	cmp	r2, #771751936
	beq	.L76
.L35:
	mov	r3, #32768
	str	r3, [r8, #8]
	b	.L1
.L65:
	ldr	r0, .L77+92
	bl	_
	ldr	r3, .L77+12
	str	r0, [r3, #4]
	b	.L1
.L60:
	ldr	r2, .L77+96
	ldr	r2, [r2]
	str	r2, [r8, #8]
	b	.L14
.L49:
	mov	r6, #0
	b	.L23
.L66:
	ldr	r3, .L77+68
	mov	r1, #3
	ldr	r2, [r3]
	add	r0, sp, #12
	bl	exp_ldst_offset
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r0, [sp, #12]
	bl	end_of_line
	ldr	r3, [r5]
	cmp	r0, r3
	beq	.L1
	ldr	r2, .L77+16
	ldr	r8, .L77+12
	ldr	r1, [r2]
	ldr	r3, [r8]
	cmp	r4, r6
	and	r2, r1, r3
	bne	.L9
	ldr	r0, .L77+32
	ldr	r0, [r0]
	cmp	r0, r2
	beq	.L24
	ldr	r0, .L77+100
	ldr	r0, [r0]
	cmp	r0, r2
	beq	.L24
	ldr	r0, .L77+36
	ldr	r0, [r0]
	cmp	r0, r2
	beq	.L24
	ldr	r0, .L77+104
	ldr	r0, [r0]
	cmp	r0, r2
	beq	.L24
	ldr	r0, .L77+28
	ldr	r0, [r0]
	cmp	r0, r2
	beq	.L24
.L9:
	ldr	ip, .L77+108
	ldr	r0, .L77+24
	ldr	ip, [ip]
	ldr	r0, [r0]
	add	r2, r2, r2, lsl #1
	add	r2, r2, ip
	ldr	r2, [r0, r2, lsl #2]
	bic	r3, r3, r1
	ldr	r1, .L77+84
	orr	r2, r3, r2
	and	r3, r2, r1
	cmp	r3, #234881024
	str	r2, [r8]
	bne	.L1
	asr	r3, r2, #15
	tst	r3, #24
	bne	.L1
	ldr	r1, .L77+112
	and	r1, r1, r2, asr #3
	cmp	r1, #4
	bne	.L1
	tst	r2, #16777216
	lsl	r1, r3, #4
	lsr	r3, r2, #12
	mov	r2, #2
	and	r1, r1, #112
	and	r3, r3, #3840
	orr	r3, r3, r1
	orrne	r3, r3, #8320
	orreq	r3, r3, #8192
	orr	r3, r3, #10
	str	r3, [r8, #8]
	str	r2, [r8, #12]
	b	.L1
.L61:
	ldr	r2, .L77+116
	ldr	r2, [r2]
	str	r2, [r8, #8]
	b	.L14
.L62:
	ldr	r2, .L77+120
	ldr	r2, [r2]
	str	r2, [r8, #8]
	b	.L14
.L67:
	ldr	r8, .L77+12
	ldr	r1, .L77+16
	ldr	r2, .L77+32
	ldr	r3, [r8]
	ldr	r1, [r1]
	ldr	r2, [r2]
	and	r3, r3, r1
	cmp	r2, r3
	beq	.L24
	ldr	r2, .L77+100
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L24
	ldr	r2, .L77+36
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L24
	ldr	r2, .L77+104
	ldr	r2, [r2]
	cmp	r2, r3
	beq	.L24
	ldr	r2, .L77+28
	ldr	r2, [r2]
	cmp	r2, r3
	bne	.L51
.L24:
	ldr	r0, .L77+124
	bl	_
	str	r0, [r8, #4]
	b	.L1
.L63:
	ldr	r0, .L77+128
	ldr	r0, [r0]
	str	r0, [r8, #8]
	b	.L18
.L64:
	ldr	r0, .L77+132
	ldr	r0, [r0]
	str	r0, [r8, #8]
	b	.L18
.L69:
	ldr	r5, .L77+136
	cmp	r4, #29
	ldr	r0, .L77+140
	ldr	r6, [r5]
	bhi	.L30
	bl	_
	ldr	r3, .L77+72
	mov	r1, r0
	ldr	r2, [r3]
	mov	r0, r6
	add	r3, r2, r4, lsl #3
	ldr	r3, [r3, #4]
	ldr	ip, [r3, #4]
	str	ip, [sp]
	ldr	r2, [r2, r4, lsl #3]
	ldr	r3, [r3]
	bl	sprintf
.L31:
	ldr	r3, [r5]
	str	r3, [r8, #4]
	b	.L1
.L68:
	ldrb	r3, [r7, #2]	@ zero_extendqisi2
	cmp	r3, #120
	bne	.L28
	ldr	r3, .L77+144
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+148
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+152
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+156
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+160
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+164
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+168
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+172
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+176
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+180
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+184
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+188
	ldr	r3, [r3]
	cmp	r3, r4
	beq	.L28
	ldr	r3, .L77+192
	ldr	r3, [r3]
	cmp	r3, r4
	addne	r4, r4, #24
	b	.L28
.L70:
	tst	r3, #17301504
	bne	.L35
	lsl	r2, r3, #17
	lsr	r2, r2, #17
	cmp	r2, #0
	asr	r2, r3, #15
	beq	.L55
	and	r2, r2, #15
	cmp	r2, #2
	bne	.L35
	ldr	r1, .L77+196
	and	r1, r1, r3
	cmp	r1, #0
	bne	.L35
	ldr	r1, .L77+200
	lsl	r0, r3, #1
	lsr	r3, r3, #12
	and	r1, r1, r0
	and	r3, r3, #3840
	orr	r3, r3, r1
	orr	r3, r3, #28672
	str	r2, [r8, #12]
	str	r3, [r8, #8]
	b	.L1
.L71:
	tst	r3, #17301504
	bne	.L35
	lsl	r2, r3, #17
	lsr	r2, r2, #17
	cmp	r2, #0
	asr	r2, r3, #15
	beq	.L55
	and	r2, r2, #15
	cmp	r2, #2
	bne	.L35
	ldr	r1, .L77+196
	and	r1, r1, r3
	cmp	r1, #0
	bne	.L35
	ldr	r1, .L77+200
	lsl	r0, r3, #1
	lsr	r3, r3, #12
	and	r1, r1, r0
	and	r3, r3, #3840
	orr	r3, r3, r1
	orr	r3, r3, #28672
	orr	r3, r3, #4
	str	r2, [r8, #12]
	str	r3, [r8, #8]
	b	.L1
.L30:
	bl	_
	ldr	r3, .L77+72
	add	r4, r4, #536870912
	ldr	r2, [r3]
	sub	r4, r4, #24
	add	r3, r2, r4, lsl #3
	ldr	r3, [r3, #4]
	mov	r1, r0
	ldr	ip, [r3, #4]
	mov	r0, r6
	str	ip, [sp]
	ldr	r2, [r2, r4, lsl #3]
	ldr	r3, [r3]
	bl	sprintf
	b	.L31
.L72:
	asr	r2, r3, #15
	tst	r2, #24
	bne	.L35
	ldr	r1, .L77+112
	ldr	r0, .L77+204
	and	r1, r1, r3, asr #3
	cmp	r1, r0
	bne	.L35
	lsl	r1, r2, #4
	lsr	r2, r3, #12
	tst	r3, #16777216
	and	r3, r2, #3840
	mov	r2, #2
	and	r1, r1, #112
	orr	r3, r3, r1
	orrne	r3, r3, #8320
	orreq	r3, r3, #8192
	orr	r3, r3, #14
	str	r3, [r8, #8]
	str	r2, [r8, #12]
	b	.L1
.L55:
	mov	r0, #2
	lsr	r3, r3, #12
	lsl	r2, r2, #4
	and	r1, r3, #3840
	and	r3, r2, #255
	ldr	r2, [r8, #8]
	orr	r3, r1, r3
	orr	r3, r3, r2
	str	r3, [r8, #8]
	str	r0, [r8, #12]
	b	.L1
.L73:
	tst	r3, #17301504
	bne	.L35
	lsl	r2, r3, #17
	lsr	r2, r2, #17
	cmp	r2, #0
	asr	r1, r3, #15
	beq	.L56
	and	r1, r1, #15
	cmp	r1, #2
	bne	.L35
	ldr	r2, .L77+208
	and	r2, r2, r3
	cmp	r2, #0
	bne	.L35
	ldr	r0, .L77+212
	lsr	r2, r3, #12
	and	r0, r0, r3, lsl #2
	and	r3, r2, #3840
	orr	r3, r3, r0
	orr	r3, r3, #28672
	orr	r3, r3, #1
	str	r1, [r8, #12]
	str	r3, [r8, #8]
	b	.L1
.L75:
	tst	r3, #17301504
	bne	.L35
	lsl	r2, r3, #17
	lsr	r2, r2, #17
	cmp	r2, #0
	asr	r2, r3, #15
	beq	.L55
	and	r2, r2, #15
	cmp	r2, #2
	bne	.L35
	ldr	r2, .L77+216
	and	r2, r2, r3
	cmp	r2, #0
	bne	.L35
	mov	r0, #2
	ldr	r1, .L77+220
	lsr	r2, r3, #12
	and	r1, r1, r3, lsl #3
	and	r3, r2, #3840
	orr	r3, r3, r1
	orr	r3, r3, #28672
	orr	r3, r3, #3
	str	r3, [r8, #8]
	str	r0, [r8, #12]
	b	.L1
.L74:
	tst	r3, #17301504
	bne	.L35
	lsl	r2, r3, #17
	lsr	r2, r2, #17
	cmp	r2, #0
	asr	r1, r3, #15
	beq	.L56
	and	r1, r1, #15
	cmp	r1, #2
	bne	.L35
	ldr	r2, .L77+208
	and	r2, r2, r3
	cmp	r2, #0
	bne	.L35
	ldr	r0, .L77+212
	lsr	r2, r3, #12
	and	r0, r0, r3, lsl #2
	and	r3, r2, #3840
	orr	r3, r3, r0
	orr	r3, r3, #28672
	orr	r3, r3, #5
	str	r1, [r8, #12]
	str	r3, [r8, #8]
	b	.L1
.L56:
	mov	r0, #2
	lsr	r3, r3, #12
	lsl	r1, r1, #4
	and	r2, r3, #3840
	and	r3, r1, #255
	ldr	r1, [r8, #8]
	orr	r3, r2, r3
	orr	r3, r3, r1
	str	r3, [r8, #8]
	str	r0, [r8, #12]
	b	.L1
.L76:
	tst	r3, #17301504
	bne	.L35
	lsl	r2, r3, #17
	lsr	r2, r2, #17
	cmp	r2, #0
	asr	r2, r3, #15
	beq	.L55
	and	r2, r2, #15
	cmp	r2, #2
	bne	.L35
	ldr	r2, .L77+216
	and	r2, r2, r3
	cmp	r2, #0
	bne	.L35
	mov	r0, #2
	ldr	r1, .L77+220
	lsr	r2, r3, #12
	and	r1, r1, r3, lsl #3
	and	r3, r2, #3840
	orr	r3, r3, r1
	orr	r3, r3, #28672
	orr	r3, r3, #7
	str	r3, [r8, #8]
	str	r0, [r8, #12]
	b	.L1
.L78:
	.align	2
.L77:
	.word	REG_TYPE_SCORE
	.word	FAIL
	.word	BAD_ARGS
	.word	inst
	.word	OPC_PSEUDOLDST_MASK
	.word	LDST_NOUPDATE
	.word	score_ldst_insns
	.word	INSN_LBU
	.word	INSN_LH
	.word	INSN_LW
	.word	INSN_SB
	.word	INSN_SH
	.word	INSN_SW
	.word	INSN16_SW
	.word	inst+20
	.word	.LC2
	.word	SUCCESS
	.word	_SIMM12
	.word	score_df_range
	.word	O_constant
	.word	_SIMM15
	.word	1040187399
	.word	100663300
	.word	.LC1
	.word	INSN16_LBU
	.word	INSN_LHU
	.word	INSN_LB
	.word	LDST_POST
	.word	4095
	.word	INSN16_LH
	.word	INSN16_LW
	.word	.LC0
	.word	INSN16_SB
	.word	INSN16_SH
	.word	err_msg
	.word	.LC3
	.word	_SIMM16_LA
	.word	_VALUE_HI16
	.word	_VALUE_LO16
	.word	_IMM16
	.word	_IMM15
	.word	_IMM14
	.word	_IMM4
	.word	_IMM5
	.word	_IMM8
	.word	_IMM5_RSHIFT_1
	.word	_IMM5_RSHIFT_2
	.word	_SIMM14_NEG
	.word	_IMM10_RSHIFT_2
	.word	32643
	.word	65528
	.word	4092
	.word	32705
	.word	131064
	.word	32736
	.word	262136
	.size	do_ldst_insn, .-do_ldst_insn
	.comm	score_ldst_insns,4,4
	.comm	score_df_range,4,4
	.comm	inst,28,4
	.comm	err_msg,4,4
	.comm	_VALUE_LO16,4,4
	.comm	_VALUE_HI16,4,4
	.comm	_SIMM16_LA,4,4
	.comm	_SIMM15,4,4
	.comm	_SIMM14_NEG,4,4
	.comm	_SIMM12,4,4
	.comm	_IMM8,4,4
	.comm	_IMM5_RSHIFT_2,4,4
	.comm	_IMM5_RSHIFT_1,4,4
	.comm	_IMM5,4,4
	.comm	_IMM4,4,4
	.comm	_IMM16,4,4
	.comm	_IMM15,4,4
	.comm	_IMM14,4,4
	.comm	_IMM10_RSHIFT_2,4,4
	.comm	SUCCESS,4,4
	.comm	REG_TYPE_SCORE,4,4
	.comm	O_constant,4,4
	.comm	OPC_PSEUDOLDST_MASK,4,4
	.comm	LDST_POST,4,4
	.comm	LDST_NOUPDATE,4,4
	.comm	INSN_SW,4,4
	.comm	INSN_SH,4,4
	.comm	INSN_SB,4,4
	.comm	INSN_LW,4,4
	.comm	INSN_LHU,4,4
	.comm	INSN_LH,4,4
	.comm	INSN_LBU,4,4
	.comm	INSN_LB,4,4
	.comm	INSN16_SW,4,4
	.comm	INSN16_SH,4,4
	.comm	INSN16_SB,4,4
	.comm	INSN16_LW,4,4
	.comm	INSN16_LH,4,4
	.comm	INSN16_LBU,4,4
	.comm	FAIL,4,4
	.comm	BAD_ARGS,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
