	.file	"extr_hw.c_viafb_setmode.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	viafb_setmode
	.type	viafb_setmode, @function
viafb_setmode:
.LFB0:
	.cfi_startproc
	endbr64
	push	r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	push	r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	push	rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	sub	rsp, 32
	.cfi_def_cfa_offset 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR 24[rsp], rax
	xor	eax, eax
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR [rax]
	mov	ebp, DWORD PTR [rax]
	or	ebp, DWORD PTR 4[rax]
	xor	eax, eax
	call	device_screen_off@PLT
	xor	eax, eax
	call	device_off@PLT
	mov	esi, DWORD PTR VIA_STATE_OFF[rip]
	mov	edi, ebp
	call	via_set_state@PLT
	xor	eax, eax
	call	hw_init@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR 8[rax]
	mov	rdx, QWORD PTR [rax]
	cmp	rdx, QWORD PTR UNICHROME_CLE266[rip]
	mov	rax, QWORD PTR viafbinfo[rip]
	je	.L3
	cmp	rdx, QWORD PTR UNICHROME_K400[rip]
	je	.L3
.L4:
	mov	edi, DWORD PTR 12[rax]
	call	via_set_primary_pitch@PLT
	cmp	QWORD PTR viafb_dual_fb[rip], 0
	je	.L6
	mov	rax, QWORD PTR viafbinfo1[rip]
	mov	edi, DWORD PTR 12[rax]
.L7:
	call	via_set_secondary_pitch@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	edi, DWORD PTR 40[rax]
	call	via_set_primary_color_depth@PLT
	cmp	QWORD PTR viafb_dual_fb[rip], 0
	je	.L8
	mov	rax, QWORD PTR viaparinfo1[rip]
	mov	edi, DWORD PTR [rax]
.L9:
	call	via_set_secondary_color_depth@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rsi, QWORD PTR IGA1[rip]
	mov	rax, QWORD PTR [rax]
	mov	edi, DWORD PTR [rax]
	call	via_set_source@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rsi, QWORD PTR IGA2[rip]
	mov	rax, QWORD PTR [rax]
	mov	edi, DWORD PTR 4[rax]
	call	via_set_source@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR [rax]
	mov	edi, DWORD PTR 4[rax]
	mov	eax, 0
	test	edi, edi
	je	.L10
	call	enable_second_display_channel@PLT
.L11:
	cmp	QWORD PTR viafb_dual_fb[rip], 0
	je	.L12
	mov	rax, QWORD PTR viafbinfo1[rip]
	xor	r13d, r13d
	xor	r12d, r12d
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR 8[rax]
	mov	QWORD PTR 12[rsp], rdx
	mov	DWORD PTR 20[rsp], eax
.L13:
	cmp	QWORD PTR viafb_CRT_ON[rip], 0
	mov	rax, QWORD PTR viaparinfo[rip]
	je	.L14
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR VIA_CRT[rip]
	test	DWORD PTR 4[rax], edx
	jne	.L49
.L15:
	test	DWORD PTR [rax], edx
	mov	rcx, QWORD PTR IGA1[rip]
	mov	rdi, QWORD PTR viafbinfo[rip]
	cmove	rcx, QWORD PTR IGA2[rip]
	xor	edx, edx
	xor	esi, esi
	call	viafb_fill_crtc_timing@PLT
.L16:
	mov	rax, QWORD PTR viafbinfo[rip]
	test	BYTE PTR [rax], 7
	jne	.L19
.L47:
	mov	rax, QWORD PTR viaparinfo[rip]
.L14:
	cmp	QWORD PTR viafb_DVI_ON[rip], 0
	je	.L20
	mov	rdx, QWORD PTR [rax]
	mov	rcx, QWORD PTR IGA2[rip]
	cmp	QWORD PTR 8[rdx], rcx
	jne	.L21
	cmp	QWORD PTR viafb_SAMM_ON[rip], 0
	jne	.L50
.L21:
	mov	rax, QWORD PTR 32[rax]
	mov	rdi, QWORD PTR viafbinfo[rip]
	xor	edx, edx
	xor	esi, esi
	mov	rcx, QWORD PTR [rax]
	call	viafb_dvi_set_mode@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
.L20:
	cmp	QWORD PTR viafb_LCD_ON[rip], 0
	mov	r8, QWORD PTR 8[rax]
	je	.L22
	mov	rcx, QWORD PTR 24[rax]
	add	r8, 12
	cmp	QWORD PTR viafb_SAMM_ON[rip], 0
	mov	rax, QWORD PTR [rcx]
	jne	.L51
.L23:
	cmp	QWORD PTR IGA1[rip], rax
	jne	.L24
	mov	rax, QWORD PTR LCD_CENTERING[rip]
	mov	QWORD PTR 8[rcx], rax
.L24:
	mov	rdi, QWORD PTR viafbinfo[rip]
	xor	edx, edx
	xor	esi, esi
	call	viafb_lcd_set_mode@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	r8, QWORD PTR 8[rax]
.L22:
	cmp	QWORD PTR viafb_LCD2_ON[rip], 0
	je	.L25
	mov	rcx, QWORD PTR 16[rax]
	add	r8, 8
	cmp	QWORD PTR viafb_SAMM_ON[rip], 0
	mov	rax, QWORD PTR [rcx]
	jne	.L52
.L26:
	cmp	QWORD PTR IGA1[rip], rax
	jne	.L27
	mov	rax, QWORD PTR LCD_CENTERING[rip]
	mov	QWORD PTR 8[rcx], rax
.L27:
	mov	rdi, QWORD PTR viafbinfo[rip]
	xor	edx, edx
	xor	esi, esi
	call	viafb_lcd_set_mode@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	r8, QWORD PTR 8[rax]
.L25:
	mov	rax, QWORD PTR UNICHROME_CX700[rip]
	cmp	QWORD PTR [r8], rax
	je	.L53
.L28:
	mov	esi, DWORD PTR viafb_hotplug[rip]
	test	esi, esi
	jne	.L29
	mov	rax, QWORD PTR viafbinfo[rip]
	cmp	QWORD PTR viafb_DVI_ON[rip], 0
	mov	edx, DWORD PTR [rax]
	mov	DWORD PTR viafb_hotplug_Xres[rip], edx
	mov	edx, DWORD PTR 4[rax]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR viafb_hotplug_Yres[rip], edx
	mov	DWORD PTR viafb_hotplug_bpp[rip], eax
	mov	eax, DWORD PTR viafb_refresh[rip]
	mov	DWORD PTR viafb_hotplug_refresh[rip], eax
	je	.L30
	mov	eax, DWORD PTR DVI_Device[rip]
	mov	DWORD PTR viafb_DeviceStatus[rip], eax
.L29:
	xor	eax, eax
	call	device_on@PLT
	cmp	QWORD PTR viafb_SAMM_ON[rip], 0
	mov	rdi, QWORD PTR viafbinfo[rip]
	jne	.L31
	call	get_sync@PLT
	mov	edi, ebp
	mov	esi, eax
	call	via_set_sync_polarity@PLT
.L32:
	mov	edi, DWORD PTR VIA_STATE_ON[rip]
	call	[QWORD PTR clock[rip+48]]
	mov	edi, DWORD PTR VIA_CLKSRC_X1[rip]
	mov	esi, 1
	call	[QWORD PTR clock[rip+40]]
	mov	edi, DWORD PTR VIA_CLKSRC_X1[rip]
	mov	esi, 1
	call	[QWORD PTR clock[rip+32]]
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR [rax]
	mov	ecx, DWORD PTR [rax]
	test	ecx, ecx
	je	.L33
	mov	edi, DWORD PTR VIA_STATE_ON[rip]
	call	[QWORD PTR clock[rip+24]]
	mov	edi, DWORD PTR VIA_STATE_ON[rip]
	call	[QWORD PTR clock[rip+16]]
.L34:
	mov	rdx, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR clock[rip+8]
	mov	rdx, QWORD PTR [rdx]
	mov	edx, DWORD PTR 4[rdx]
	test	edx, edx
	je	.L35
	mov	edi, DWORD PTR VIA_STATE_ON[rip]
	call	rax
	mov	edi, DWORD PTR VIA_STATE_ON[rip]
	call	[QWORD PTR clock[rip]]
.L36:
	mov	esi, DWORD PTR VIA_STATE_ON[rip]
	mov	edi, ebp
	call	via_set_state@PLT
	xor	eax, eax
	call	device_screen_on@PLT
	mov	rax, QWORD PTR 24[rsp]
	xor	rax, QWORD PTR fs:40
	jne	.L54
	add	rsp, 32
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	mov	eax, 1
	pop	rbp
	.cfi_def_cfa_offset 24
	pop	r12
	.cfi_def_cfa_offset 16
	pop	r13
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L3:
	.cfi_restore_state
	cmp	DWORD PTR [rax], 1024
	jne	.L4
	cmp	DWORD PTR 4[rax], 768
	jne	.L4
	mov	rdx, QWORD PTR res_patch_table[rip]
	mov	r8d, DWORD PTR [rdx]
	test	r8d, r8d
	jle	.L4
	xor	r12d, r12d
	.p2align 4,,10
	.p2align 3
.L5:
	mov	rax, r12
	add	r12, 1
	sal	rax, 4
	add	rax, QWORD PTR 8[rdx]
	mov	edx, DWORD PTR 8[rax]
	mov	ecx, DWORD PTR 4[rax]
	mov	edi, DWORD PTR 12[rax]
	mov	esi, DWORD PTR [rax]
	call	viafb_write_reg_mask@PLT
	mov	rdx, QWORD PTR res_patch_table[rip]
	cmp	DWORD PTR [rdx], r12d
	jg	.L5
	mov	rax, QWORD PTR viafbinfo[rip]
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L12:
	xor	r13d, r13d
	xor	r12d, r12d
	cmp	QWORD PTR viafb_SAMM_ON[rip], 0
	je	.L13
	mov	edx, DWORD PTR viafb_refresh1[rip]
	mov	esi, DWORD PTR viafb_second_yres[rip]
	mov	edi, DWORD PTR viafb_second_xres[rip]
	call	viafb_get_best_mode@PLT
	lea	rdi, 12[rsp]
	mov	esi, eax
	call	viafb_fill_var_timing_info@PLT
	mov	rax, QWORD PTR viafbinfo[rip]
	mov	r12d, DWORD PTR [rax]
	mov	r13d, DWORD PTR 4[rax]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR 20[rsp], eax
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L8:
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	edi, DWORD PTR 40[rax]
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L6:
	mov	rax, QWORD PTR viafbinfo[rip]
	mov	edi, DWORD PTR 12[rax]
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L10:
	call	disable_second_display_channel@PLT
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L35:
	mov	edi, DWORD PTR VIA_STATE_OFF[rip]
	call	rax
	mov	edi, DWORD PTR VIA_STATE_OFF[rip]
	call	[QWORD PTR clock[rip]]
	jmp	.L36
	.p2align 4,,10
	.p2align 3
.L33:
	mov	edi, DWORD PTR VIA_STATE_OFF[rip]
	call	[QWORD PTR clock[rip+24]]
	mov	edi, DWORD PTR VIA_STATE_OFF[rip]
	call	[QWORD PTR clock[rip+16]]
	jmp	.L34
	.p2align 4,,10
	.p2align 3
.L31:
	call	get_sync@PLT
	mov	esi, eax
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR [rax]
	mov	edi, DWORD PTR [rax]
	call	via_set_sync_polarity@PLT
	lea	rdi, 12[rsp]
	call	get_sync@PLT
	mov	esi, eax
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	rax, QWORD PTR [rax]
	mov	edi, DWORD PTR 4[rax]
	call	via_set_sync_polarity@PLT
	jmp	.L32
	.p2align 4,,10
	.p2align 3
.L49:
	cmp	QWORD PTR viafb_SAMM_ON[rip], 0
	je	.L15
	mov	rcx, QWORD PTR IGA2[rip]
	lea	rdi, 12[rsp]
	mov	edx, r13d
	mov	esi, r12d
	call	viafb_fill_crtc_timing@PLT
	jmp	.L16
	.p2align 4,,10
	.p2align 3
.L30:
	mov	eax, DWORD PTR CRT_Device[rip]
	mov	DWORD PTR viafb_DeviceStatus[rip], eax
	jmp	.L29
	.p2align 4,,10
	.p2align 3
.L51:
	cmp	QWORD PTR IGA2[rip], rax
	jne	.L23
	lea	rdi, 12[rsp]
	mov	edx, r13d
	mov	esi, r12d
	call	viafb_lcd_set_mode@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	r8, QWORD PTR 8[rax]
	jmp	.L22
	.p2align 4,,10
	.p2align 3
.L52:
	cmp	QWORD PTR IGA2[rip], rax
	jne	.L26
	lea	rdi, 12[rsp]
	mov	edx, r13d
	mov	esi, r12d
	call	viafb_lcd_set_mode@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	mov	r8, QWORD PTR 8[rax]
	jmp	.L25
	.p2align 4,,10
	.p2align 3
.L53:
	mov	rax, QWORD PTR viafb_LCD_ON[rip]
	or	rax, QWORD PTR viafb_DVI_ON[rip]
	je	.L28
	xor	eax, eax
	call	set_display_channel@PLT
	jmp	.L28
	.p2align 4,,10
	.p2align 3
.L50:
	lea	rdi, 12[rsp]
	mov	edx, r13d
	mov	esi, r12d
	call	viafb_dvi_set_mode@PLT
	mov	rax, QWORD PTR viaparinfo[rip]
	jmp	.L20
	.p2align 4,,10
	.p2align 3
.L19:
	xor	eax, eax
	call	viafb_unlock_crt@PLT
	mov	esi, DWORD PTR CR02[rip]
	mov	edi, DWORD PTR VIACR[rip]
	call	viafb_read_reg@PLT
	mov	esi, DWORD PTR VIACR[rip]
	mov	edi, DWORD PTR CR02[rip]
	lea	rdx, -1[rax]
	call	viafb_write_reg@PLT
	xor	eax, eax
	call	viafb_lock_crt@PLT
	jmp	.L47
.L54:
	call	__stack_chk_fail@PLT
	.cfi_endproc
.LFE0:
	.size	viafb_setmode, .-viafb_setmode
	.comm	viaparinfo1,8,8
	.comm	viaparinfo,8,8
	.comm	viafbinfo1,8,8
	.comm	viafbinfo,8,8
	.comm	viafb_second_yres,4,4
	.comm	viafb_second_xres,4,4
	.comm	viafb_refresh1,4,4
	.comm	viafb_refresh,4,4
	.comm	viafb_hotplug_refresh,4,4
	.comm	viafb_hotplug_bpp,4,4
	.comm	viafb_hotplug_Yres,4,4
	.comm	viafb_hotplug_Xres,4,4
	.comm	viafb_hotplug,4,4
	.comm	viafb_dual_fb,8,8
	.comm	viafb_SAMM_ON,8,8
	.comm	viafb_LCD_ON,8,8
	.comm	viafb_LCD2_ON,8,8
	.comm	viafb_DeviceStatus,4,4
	.comm	viafb_DVI_ON,8,8
	.comm	viafb_CRT_ON,8,8
	.comm	res_patch_table,8,8
	.comm	clock,56,32
	.comm	VIA_STATE_ON,4,4
	.comm	VIA_STATE_OFF,4,4
	.comm	VIA_CRT,4,4
	.comm	VIA_CLKSRC_X1,4,4
	.comm	VIACR,4,4
	.comm	UNICHROME_K400,8,8
	.comm	UNICHROME_CX700,8,8
	.comm	UNICHROME_CLE266,8,8
	.comm	LCD_CENTERING,8,8
	.comm	IGA2,8,8
	.comm	IGA1,8,8
	.comm	DVI_Device,4,4
	.comm	CRT_Device,4,4
	.comm	CR02,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_hw.c_viafb_setmode.c"
	.text
	.section	.rodata.cst4,"aM",%progbits,4
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	viafb_setmode
	.syntax unified
	.arm
	.fpu softvfp
	.type	viafb_setmode, %function
viafb_setmode:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	ldr	r4, .L81
	ldr	r2, .L81+4
	ldr	r3, [r4]
	ldr	r8, .L81+8
	ldr	r3, [r3]
	sub	sp, sp, #36
	ldm	r3, {r3, r6}
	orr	r6, r6, r3
	ldr	r2, [r2]
	str	r2, [sp, #28]
	mov	r2,#0
	bl	device_screen_off
	bl	device_off
	ldr	r1, [r8]
	mov	r0, r6
	bl	via_set_state
	bl	hw_init
	ldr	r3, [r4]
	ldr	r2, .L81+12
	ldr	r3, [r3, #4]
	ldr	r2, [r2]
	ldr	r3, [r3]
	cmp	r3, r2
	beq	.L73
	ldr	r2, .L81+16
	ldr	r5, .L81+20
	ldr	r2, [r2]
	cmp	r3, r2
	ldr	r3, [r5]
	beq	.L3
.L4:
	ldr	r7, .L81+24
	ldr	r0, [r3, #12]
	bl	via_set_primary_pitch
	ldr	r3, [r7]
	ldr	r9, .L81+28
	cmp	r3, #0
	ldrne	r3, .L81+32
	ldreq	r3, [r5]
	ldrne	r3, [r3]
	ldr	r0, [r3, #12]
	bl	via_set_secondary_pitch
	ldr	r3, [r4]
	ldr	r0, [r3, #20]
	bl	via_set_primary_color_depth
	ldr	r3, [r7]
	cmp	r3, #0
	ldrne	r3, .L81+36
	ldreq	r3, [r4]
	ldrne	r3, [r3]
	ldreq	r0, [r3, #20]
	ldrne	r0, [r3]
	bl	via_set_secondary_color_depth
	ldr	r3, [r4]
	ldr	r2, .L81+40
	ldr	r3, [r3]
	ldr	r1, [r2]
	ldr	r0, [r3]
	bl	via_set_source
	ldr	r3, [r4]
	ldr	r1, [r9]
	ldr	r3, [r3]
	ldr	r0, [r3, #4]
	bl	via_set_source
	ldr	r3, [r4]
	ldr	r3, [r3]
	ldr	r3, [r3, #4]
	cmp	r3, #0
	beq	.L10
	bl	enable_second_display_channel
.L11:
	ldr	r3, [r7]
	cmp	r3, #0
	beq	.L12
	mov	r1, #0
	ldr	r2, .L81+32
	add	r3, sp, #16
	ldr	r2, [r2]
	str	r1, [sp, #12]
	str	r1, [sp, #8]
	ldm	r2, {r0, r1, r2}
	stm	r3, {r0, r1, r2}
	ldr	r7, .L81+44
.L13:
	ldr	r3, .L81+48
	ldr	r1, [r4]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L14
	ldr	r2, [r1]
	ldr	r3, .L81+52
	ldr	r1, [r2, #4]
	ldr	r3, [r3]
	tst	r3, r1
	bne	.L74
.L15:
	ldr	r2, [r2]
	ldr	r0, [r5]
	tst	r3, r2
	mov	r2, #0
	ldrne	r3, .L81+40
	mov	r1, r2
	ldrne	r3, [r3]
	ldreq	r3, [r9]
	bl	viafb_fill_crtc_timing
.L16:
	ldr	r3, [r5]
	ldr	r3, [r3]
	tst	r3, #7
	bne	.L19
.L71:
	ldr	r1, [r4]
.L14:
	ldr	r10, .L81+56
	ldr	r3, [r10]
	cmp	r3, #0
	beq	.L20
	ldr	r3, [r1]
	ldr	r2, [r9]
	ldr	r3, [r3, #8]
	cmp	r3, r2
	bne	.L21
	ldr	r2, [r7]
	cmp	r2, #0
	bne	.L75
.L21:
	mov	r2, #0
	ldr	r3, [r1, #16]
	ldr	r0, [r5]
	mov	r1, r2
	ldr	r3, [r3]
	bl	viafb_dvi_set_mode
	ldr	r1, [r4]
.L20:
	ldr	fp, .L81+60
	ldr	r2, [r1, #4]
	ldr	r3, [fp]
	cmp	r3, #0
	beq	.L22
	ldr	r0, [r7]
	ldr	r3, [r1, #12]
	cmp	r0, #0
	add	r1, r2, #8
	ldr	r2, [r3]
	beq	.L23
	ldr	r0, [r9]
	cmp	r0, r2
	beq	.L76
.L23:
	ldr	r0, .L81+40
	ldr	r0, [r0]
	cmp	r0, r2
	ldreq	r2, .L81+64
	ldreq	r2, [r2]
	streq	r2, [r3, #4]
	mov	r2, #0
	str	r1, [sp]
	ldr	r0, [r5]
	mov	r1, r2
	bl	viafb_lcd_set_mode
	ldr	r1, [r4]
	ldr	r2, [r1, #4]
.L22:
	ldr	r3, .L81+68
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L25
	ldr	r0, [r7]
	ldr	r3, [r1, #8]
	cmp	r0, #0
	add	r1, r2, #4
	ldr	r2, [r3]
	beq	.L26
	ldr	r0, [r9]
	cmp	r0, r2
	beq	.L77
.L26:
	ldr	r0, .L81+40
	ldr	r0, [r0]
	cmp	r0, r2
	ldreq	r2, .L81+64
	ldreq	r2, [r2]
	streq	r2, [r3, #4]
	mov	r2, #0
	str	r1, [sp]
	ldr	r0, [r5]
	mov	r1, r2
	bl	viafb_lcd_set_mode
	ldr	r3, [r4]
	ldr	r2, [r3, #4]
.L25:
	ldr	r3, .L81+72
	ldr	r2, [r2]
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L78
.L28:
	ldr	r3, .L81+76
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L29
	ldr	r3, [r5]
	ldr	r1, [r10]
	ldr	lr, [r3]
	ldr	ip, [r3, #4]
	ldr	r0, [r3, #8]
	ldr	r2, .L81+80
	ldr	r3, .L81+84
	cmp	r1, #0
	ldr	r1, .L81+88
	ldr	r2, [r2]
	str	ip, [r3]
	ldr	r3, .L81+92
	str	lr, [r1]
	ldr	r1, .L81+96
	str	r2, [r3]
	ldrne	r2, .L81+100
	ldreq	r2, .L81+104
	str	r0, [r1]
	ldr	r3, .L81+108
	ldr	r2, [r2]
	str	r2, [r3]
.L29:
	bl	device_on
	ldr	r3, [r7]
	cmp	r3, #0
	bne	.L31
	ldr	r0, [r5]
	bl	get_sync
	mov	r1, r0
	mov	r0, r6
	bl	via_set_sync_polarity
.L32:
	ldr	r5, .L81+112
	ldr	r7, .L81+116
	ldr	r9, .L81+120
	ldr	r3, [r5, #24]
	ldr	r0, [r7]
	blx	r3
	mov	r1, #1
	ldr	r3, [r5, #20]
	ldr	r0, [r9]
	blx	r3
	ldr	r3, [r5, #16]
	mov	r1, #1
	ldr	r0, [r9]
	blx	r3
	ldr	r3, [r4]
	ldr	r3, [r3]
	ldr	r3, [r3]
	cmp	r3, #0
	ldr	r3, [r5, #12]
	beq	.L33
	ldr	r0, [r7]
	blx	r3
	ldr	r3, [r5, #8]
	ldr	r0, [r7]
	blx	r3
.L34:
	ldr	r2, [r4]
	ldr	r3, [r5, #4]
	ldr	r2, [r2]
	ldr	r2, [r2, #4]
	cmp	r2, #0
	beq	.L35
	ldr	r0, [r7]
	blx	r3
	ldr	r3, [r5]
	ldr	r0, [r7]
	blx	r3
.L36:
	ldr	r1, [r7]
	mov	r0, r6
	bl	via_set_state
	bl	device_screen_on
	ldr	r3, .L81+4
	ldr	r2, [r3]
	ldr	r3, [sp, #28]
	eors	r2, r3, r2
	mov	r3, #0
	bne	.L79
	mov	r0, #1
	add	sp, sp, #36
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L73:
	ldr	r5, .L81+20
	ldr	r3, [r5]
.L3:
	ldr	r2, [r3]
	cmp	r2, #1024
	bne	.L4
	ldr	r2, [r3, #4]
	cmp	r2, #768
	bne	.L4
	ldr	r9, .L81+124
	ldr	r2, [r9]
	ldr	r1, [r2]
	cmp	r1, #0
	ble	.L4
	mov	r7, #0
.L5:
	ldr	r3, [r2, #4]
	add	r0, r3, r7, lsl #4
	ldr	r1, [r3, r7, lsl #4]
	ldr	r2, [r0, #8]
	ldr	r3, [r0, #4]
	ldr	r0, [r0, #12]
	bl	viafb_write_reg_mask
	ldr	r2, [r9]
	add	r7, r7, #1
	ldr	r3, [r2]
	cmp	r3, r7
	bgt	.L5
	ldr	r3, [r5]
	b	.L4
.L12:
	ldr	r7, .L81+44
	ldr	r3, [r7]
	cmp	r3, #0
	str	r3, [sp, #8]
	bne	.L80
	ldr	r3, [sp, #8]
	str	r3, [sp, #12]
	b	.L13
.L10:
	bl	disable_second_display_channel
	b	.L11
.L35:
	ldr	r0, [r8]
	blx	r3
	ldr	r3, [r5]
	ldr	r0, [r8]
	blx	r3
	b	.L36
.L33:
	ldr	r0, [r8]
	blx	r3
	ldr	r3, [r5, #8]
	ldr	r0, [r8]
	blx	r3
	b	.L34
.L31:
	ldr	r3, [r4]
	ldr	r0, [r5]
	ldr	r3, [r3]
	ldr	r5, [r3]
	bl	get_sync
	mov	r1, r0
	mov	r0, r5
	bl	via_set_sync_polarity
	ldr	r3, [r4]
	add	r0, sp, #16
	ldr	r3, [r3]
	ldr	r5, [r3, #4]
	bl	get_sync
	mov	r1, r0
	mov	r0, r5
	bl	via_set_sync_polarity
	b	.L32
.L74:
	ldr	r1, [r7]
	cmp	r1, #0
	beq	.L15
	ldr	r3, [r9]
	ldr	r2, [sp, #12]
	ldr	r1, [sp, #8]
	add	r0, sp, #16
	bl	viafb_fill_crtc_timing
	b	.L16
.L78:
	ldr	r2, [fp]
	ldr	r3, [r10]
	orrs	r3, r2, r3
	beq	.L28
	bl	set_display_channel
	b	.L28
.L80:
	ldr	r3, .L81+128
	ldr	r2, .L81+132
	ldr	r1, .L81+136
	ldr	r2, [r2]
	ldr	r0, [r3]
	ldr	r1, [r1]
	bl	viafb_get_best_mode
	mov	r1, r0
	add	r0, sp, #16
	bl	viafb_fill_var_timing_info
	ldr	r3, [r5]
	ldr	r1, [r3]
	ldr	r2, [r3, #8]
	ldr	r3, [r3, #4]
	str	r1, [sp, #8]
	str	r3, [sp, #12]
	str	r2, [sp, #24]
	b	.L13
.L75:
	ldr	r1, [sp, #8]
	ldr	r2, [sp, #12]
	add	r0, sp, #16
	bl	viafb_dvi_set_mode
	ldr	r1, [r4]
	b	.L20
.L77:
	ldr	r2, [sp, #12]
	str	r1, [sp]
	add	r0, sp, #16
	ldr	r1, [sp, #8]
	bl	viafb_lcd_set_mode
	ldr	r3, [r4]
	ldr	r2, [r3, #4]
	b	.L25
.L76:
	ldr	r2, [sp, #12]
	str	r1, [sp]
	add	r0, sp, #16
	ldr	r1, [sp, #8]
	bl	viafb_lcd_set_mode
	ldr	r1, [r4]
	ldr	r2, [r1, #4]
	b	.L22
.L19:
	bl	viafb_unlock_crt
	ldr	r3, .L81+140
	ldr	r2, .L81+144
	ldr	fp, [r3]
	ldr	r10, [r2]
	mov	r0, fp
	mov	r1, r10
	bl	viafb_read_reg
	mov	r2, r0
	mov	r1, fp
	sub	r2, r2, #1
	mov	r0, r10
	bl	viafb_write_reg
	bl	viafb_lock_crt
	b	.L71
.L79:
	bl	__stack_chk_fail
.L82:
	.align	2
.L81:
	.word	viaparinfo
	.word	.LC0
	.word	VIA_STATE_OFF
	.word	UNICHROME_CLE266
	.word	UNICHROME_K400
	.word	viafbinfo
	.word	viafb_dual_fb
	.word	IGA2
	.word	viafbinfo1
	.word	viaparinfo1
	.word	IGA1
	.word	viafb_SAMM_ON
	.word	viafb_CRT_ON
	.word	VIA_CRT
	.word	viafb_DVI_ON
	.word	viafb_LCD_ON
	.word	LCD_CENTERING
	.word	viafb_LCD2_ON
	.word	UNICHROME_CX700
	.word	viafb_hotplug
	.word	viafb_refresh
	.word	viafb_hotplug_Yres
	.word	viafb_hotplug_Xres
	.word	viafb_hotplug_refresh
	.word	viafb_hotplug_bpp
	.word	DVI_Device
	.word	CRT_Device
	.word	viafb_DeviceStatus
	.word	clock
	.word	VIA_STATE_ON
	.word	VIA_CLKSRC_X1
	.word	res_patch_table
	.word	viafb_second_xres
	.word	viafb_refresh1
	.word	viafb_second_yres
	.word	VIACR
	.word	CR02
	.size	viafb_setmode, .-viafb_setmode
	.comm	viaparinfo1,4,4
	.comm	viaparinfo,4,4
	.comm	viafbinfo1,4,4
	.comm	viafbinfo,4,4
	.comm	viafb_second_yres,4,4
	.comm	viafb_second_xres,4,4
	.comm	viafb_refresh1,4,4
	.comm	viafb_refresh,4,4
	.comm	viafb_hotplug_refresh,4,4
	.comm	viafb_hotplug_bpp,4,4
	.comm	viafb_hotplug_Yres,4,4
	.comm	viafb_hotplug_Xres,4,4
	.comm	viafb_hotplug,4,4
	.comm	viafb_dual_fb,4,4
	.comm	viafb_SAMM_ON,4,4
	.comm	viafb_LCD_ON,4,4
	.comm	viafb_LCD2_ON,4,4
	.comm	viafb_DeviceStatus,4,4
	.comm	viafb_DVI_ON,4,4
	.comm	viafb_CRT_ON,4,4
	.comm	res_patch_table,4,4
	.comm	clock,28,4
	.comm	VIA_STATE_ON,4,4
	.comm	VIA_STATE_OFF,4,4
	.comm	VIA_CRT,4,4
	.comm	VIA_CLKSRC_X1,4,4
	.comm	VIACR,4,4
	.comm	UNICHROME_K400,4,4
	.comm	UNICHROME_CX700,4,4
	.comm	UNICHROME_CLE266,4,4
	.comm	LCD_CENTERING,4,4
	.comm	IGA2,4,4
	.comm	IGA1,4,4
	.comm	DVI_Device,4,4
	.comm	CRT_Device,4,4
	.comm	CR02,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
