	.file	"extr_proc.c_cpu_dcache_inval_range.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.globl	cpu_dcache_inval_range
	.type	cpu_dcache_inval_range, @function
cpu_dcache_inval_range:
.LFB0:
	.cfi_startproc
	endbr64
	mov	rdx, QWORD PTR DCACHE[rip]
	mov	rax, QWORD PTR L1_cache_info[rip]
	mov	rax, QWORD PTR [rax+rdx*8]
	cmp	rdi, rsi
	jnb	.L1
	.p2align 4,,10
	.p2align 3
.L3:
#APP
# 27 "data/linux/arch/nds32/mm/extr_proc.c_cpu_dcache_inval_range.c" 1
	
	cctl rdi, L1D_VA_INVAL
# 0 "" 2
#NO_APP
	add	rdi, rax
	cmp	rsi, rdi
	ja	.L3
.L1:
	ret
	.cfi_endproc
.LFE0:
	.size	cpu_dcache_inval_range, .-cpu_dcache_inval_range
	.comm	L1_cache_info,8,8
	.comm	DCACHE,8,8
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_proc.c_cpu_dcache_inval_range.c"
	.text
	.align	2
	.global	cpu_dcache_inval_range
	.syntax unified
	.arm
	.fpu softvfp
	.type	cpu_dcache_inval_range, %function
cpu_dcache_inval_range:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r2, .L6
	ldr	r3, .L6+4
	ldr	r2, [r2]
	ldr	r3, [r3]
	cmp	r0, r1
	ldr	r3, [r3, r2, lsl #2]
	bxcs	lr
.L3:
	.syntax divided
@ 27 "data/linux/arch/nds32/mm/extr_proc.c_cpu_dcache_inval_range.c" 1
	
	cctl r0, L1D_VA_INVAL
@ 0 "" 2
	.arm
	.syntax unified
	add	r0, r0, r3
	cmp	r1, r0
	bhi	.L3
	bx	lr
.L7:
	.align	2
.L6:
	.word	DCACHE
	.word	L1_cache_info
	.size	cpu_dcache_inval_range, .-cpu_dcache_inval_range
	.comm	L1_cache_info,4,4
	.comm	DCACHE,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
