	.file	"extr_ag71xx_ar7240.c_ar7240_probe.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC0:
	.string	"%s: unknown phy id '%04x:%04x'\n"
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"AR7240/AR9330 built-in switch"
.LC2:
	.string	"AR934X built-in switch"
	.section	.rodata.str1.8
	.align 8
.LC3:
	.string	"%s: invalid PHY interface mode\n"
	.align 8
.LC4:
	.string	"%s: unsupported chip, ctrl=%08x\n"
	.section	.rodata.str1.1
.LC5:
	.string	"%s: Found an %s\n"
	.text
	.p2align 4
	.type	ar7240_probe, @function
ar7240_probe:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 64
	call	ag71xx_get_pdata@PLT
	mov	rbp, QWORD PTR 8[rbx]
	mov	edx, DWORD PTR MII_PHYSID1[rip]
	xor	esi, esi
	mov	r13, rax
	mov	rdi, rbp
	call	ar7240sw_phy_read@PLT
	mov	edx, DWORD PTR MII_PHYSID2[rip]
	xor	esi, esi
	mov	rdi, rbp
	mov	r12, rax
	call	ar7240sw_phy_read@PLT
	cmp	QWORD PTR AR7240_PHY_ID1[rip], r12
	mov	r14, rax
	je	.L22
.L2:
	cmp	QWORD PTR AR934X_PHY_ID1[rip], r12
	jne	.L4
	cmp	QWORD PTR AR934X_PHY_ID2[rip], r14
	jne	.L4
.L3:
	mov	esi, DWORD PTR GFP_KERNEL[rip]
	mov	edi, 80
	call	kzalloc@PLT
	mov	r12, rax
	test	rax, rax
	je	.L1
	mov	QWORD PTR 72[rax], rbp
	mov	rax, QWORD PTR 8[r13]
	mov	rdi, rbp
	lea	r15, 24[r12]
	mov	esi, DWORD PTR AR7240_REG_MASK_CTRL[rip]
	mov	QWORD PTR 64[r12], rax
	call	ar7240sw_reg_read@PLT
	mov	ecx, DWORD PTR AR7240_MASK_CTRL_VERSION_S[rip]
	mov	rdi, r12
	mov	r14d, eax
	sar	eax, cl
	and	eax, DWORD PTR AR7240_MASK_CTRL_VERSION_M[rip]
	mov	DWORD PTR [r12], eax
	call	sw_is_ar7240@PLT
	test	rax, rax
	je	.L6
	lea	rax, .LC1[rip]
	mov	QWORD PTR 24[r12], rax
	mov	rax, QWORD PTR AR7240_NUM_PORTS[rip]
	sub	rax, 1
	mov	QWORD PTR 56[r12], rax
.L7:
	mov	eax, DWORD PTR AR7240_PORT_CPU[rip]
	mov	esi, DWORD PTR [rbx]
	mov	rdi, r15
	mov	DWORD PTR 48[r12], eax
	mov	eax, DWORD PTR AR7240_MAX_VLANS[rip]
	mov	DWORD PTR 32[r12], eax
	lea	rax, ar7240_ops[rip]
	mov	QWORD PTR 40[r12], rax
	call	register_switch@PLT
	test	rax, rax
	js	.L12
	mov	r13, QWORD PTR 24[r12]
	mov	rdi, rbp
	call	dev_name@PLT
	lea	rdi, .LC5[rip]
	mov	esi, eax
	mov	rdx, r13
	call	pr_info@PLT
	mov	eax, DWORD PTR AR7240_MAX_VLANS[rip]
	test	eax, eax
	jle	.L14
	mov	rdx, QWORD PTR 8[r12]
	xor	eax, eax
	.p2align 4,,10
	.p2align 3
.L15:
	mov	DWORD PTR [rdx+rax*4], eax
	add	rax, 1
	cmp	DWORD PTR AR7240_MAX_VLANS[rip], eax
	jg	.L15
.L14:
	mov	rbx, QWORD PTR 16[r12]
	mov	rdi, r12
	call	ar7240sw_port_mask_all@PLT
	mov	DWORD PTR [rbx], eax
.L1:
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	rax, r12
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L4:
	.cfi_restore_state
	mov	rdi, rbp
	call	dev_name@PLT
	mov	rdx, r12
	mov	rcx, r14
	lea	rdi, .LC0[rip]
	mov	esi, eax
	xor	eax, eax
	xor	r12d, r12d
	call	pr_err@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L22:
	cmp	QWORD PTR AR7240_PHY_ID2[rip], rax
	jne	.L2
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L6:
	mov	rdi, r12
	call	sw_is_ar934x@PLT
	test	rax, rax
	je	.L8
	lea	rax, .LC2[rip]
	mov	QWORD PTR 24[r12], rax
	mov	rax, QWORD PTR 0[r13]
	cmp	rax, QWORD PTR PHY_INTERFACE_MODE_GMII[rip]
	je	.L23
	cmp	rax, QWORD PTR PHY_INTERFACE_MODE_MII[rip]
	jne	.L11
	mov	edx, DWORD PTR AR934X_OPER_MODE0_PHY_MII_EN[rip]
	mov	esi, DWORD PTR AR934X_REG_OPER_MODE0[rip]
	mov	rdi, rbp
	call	ar7240sw_reg_set@PLT
.L10:
	mov	rax, QWORD PTR 64[r12]
	cmp	QWORD PTR [rax], 0
	jne	.L24
	mov	rax, QWORD PTR AR7240_NUM_PORTS[rip]
	mov	QWORD PTR 56[r12], rax
	jmp	.L7
	.p2align 4,,10
	.p2align 3
.L11:
	mov	rdi, rbp
	call	dev_name@PLT
	lea	rdi, .LC3[rip]
	mov	esi, eax
	xor	eax, eax
	call	pr_err@PLT
.L12:
	mov	rdi, r12
	xor	r12d, r12d
	call	kfree@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L24:
	mov	edx, DWORD PTR AR934X_REG_OPER_MODE1_PHY4_MII_EN[rip]
	mov	esi, DWORD PTR AR934X_REG_OPER_MODE1[rip]
	mov	rdi, rbp
	call	ar7240sw_reg_set@PLT
	mov	rax, QWORD PTR AR7240_NUM_PORTS[rip]
	sub	rax, 1
	mov	QWORD PTR 56[r12], rax
	jmp	.L7
.L23:
	mov	edx, DWORD PTR AR934X_OPER_MODE0_MAC_GMII_EN[rip]
	mov	esi, DWORD PTR AR934X_REG_OPER_MODE0[rip]
	mov	rdi, rbp
	call	ar7240sw_reg_set@PLT
	jmp	.L10
.L8:
	mov	rdi, rbp
	call	dev_name@PLT
	mov	edx, r14d
	lea	rdi, .LC4[rip]
	mov	esi, eax
	xor	eax, eax
	call	pr_err@PLT
	jmp	.L12
	.cfi_endproc
.LFE0:
	.size	ar7240_probe, .-ar7240_probe
	.comm	ar7240_ops,4,4
	.comm	PHY_INTERFACE_MODE_MII,8,8
	.comm	PHY_INTERFACE_MODE_GMII,8,8
	.comm	MII_PHYSID2,4,4
	.comm	MII_PHYSID1,4,4
	.comm	GFP_KERNEL,4,4
	.comm	AR934X_REG_OPER_MODE1_PHY4_MII_EN,4,4
	.comm	AR934X_REG_OPER_MODE1,4,4
	.comm	AR934X_REG_OPER_MODE0,4,4
	.comm	AR934X_PHY_ID2,8,8
	.comm	AR934X_PHY_ID1,8,8
	.comm	AR934X_OPER_MODE0_PHY_MII_EN,4,4
	.comm	AR934X_OPER_MODE0_MAC_GMII_EN,4,4
	.comm	AR7240_REG_MASK_CTRL,4,4
	.comm	AR7240_PORT_CPU,4,4
	.comm	AR7240_PHY_ID2,8,8
	.comm	AR7240_PHY_ID1,8,8
	.comm	AR7240_NUM_PORTS,8,8
	.comm	AR7240_MAX_VLANS,4,4
	.comm	AR7240_MASK_CTRL_VERSION_S,4,4
	.comm	AR7240_MASK_CTRL_VERSION_M,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_ag71xx_ar7240.c_ar7240_probe.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"%s: unknown phy id '%04x:%04x'\012\000"
	.align	2
.LC1:
	.ascii	"AR7240/AR9330 built-in switch\000"
	.align	2
.LC2:
	.ascii	"AR934X built-in switch\000"
	.align	2
.LC3:
	.ascii	"%s: invalid PHY interface mode\012\000"
	.align	2
.LC4:
	.ascii	"%s: unsupported chip, ctrl=%08x\012\000"
	.align	2
.LC5:
	.ascii	"%s: Found an %s\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ar7240_probe, %function
ar7240_probe:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, lr}
	mov	r6, r0
	bl	ag71xx_get_pdata
	ldr	r5, [r6, #4]
	ldr	r3, .L25
	mov	r1, #0
	ldr	r2, [r3]
	mov	r8, r0
	mov	r0, r5
	bl	ar7240sw_phy_read
	ldr	r3, .L25+4
	mov	r4, r0
	ldr	r2, [r3]
	mov	r0, r5
	mov	r1, #0
	bl	ar7240sw_phy_read
	ldr	r2, .L25+8
	mov	r7, r0
	ldr	r3, [r2]
	cmp	r3, r4
	beq	.L23
.L2:
	ldr	r3, .L25+12
	ldr	r3, [r3]
	cmp	r3, r4
	bne	.L4
	ldr	r3, .L25+16
	ldr	r3, [r3]
	cmp	r3, r7
	bne	.L4
.L3:
	ldr	r3, .L25+20
	mov	r0, #40
	ldr	r1, [r3]
	bl	kzalloc
	subs	r4, r0, #0
	beq	.L1
	ldr	r2, [r8, #4]
	ldr	r3, .L25+24
	str	r2, [r4, #32]
	ldr	r1, [r3]
	mov	r0, r5
	str	r5, [r4, #36]
	bl	ar7240sw_reg_read
	mov	r9, r4
	ldr	r2, .L25+28
	ldr	r3, .L25+32
	ldr	r2, [r2]
	ldr	r3, [r3]
	mov	r7, r0
	and	r3, r3, r0, asr r2
	str	r3, [r9], #12
	mov	r0, r4
	bl	sw_is_ar7240
	cmp	r0, #0
	beq	.L6
	ldr	r3, .L25+36
	ldr	r2, .L25+40
	ldr	r3, [r3]
	str	r2, [r4, #12]
	sub	r3, r3, #1
	str	r3, [r4, #28]
.L7:
	ldr	r3, .L25+44
	ldr	r7, .L25+48
	ldr	r3, [r3]
	ldr	r1, [r6]
	ldr	r2, [r7]
	str	r3, [r4, #24]
	ldr	r3, .L25+52
	mov	r0, r9
	str	r2, [r4, #16]
	str	r3, [r4, #20]
	bl	register_switch
	cmp	r0, #0
	blt	.L12
	mov	r0, r5
	bl	dev_name
	ldr	r2, [r4, #12]
	mov	r1, r0
	ldr	r0, .L25+56
	bl	pr_info
	ldr	r3, [r7]
	cmp	r3, #0
	ble	.L14
	mov	r3, #0
	ldr	r2, [r4, #4]
	sub	r2, r2, #4
.L15:
	str	r3, [r2, #4]!
	ldr	r1, [r7]
	add	r3, r3, #1
	cmp	r1, r3
	bgt	.L15
.L14:
	mov	r0, r4
	ldr	r5, [r4, #8]
	bl	ar7240sw_port_mask_all
	str	r0, [r5]
.L1:
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L4:
	mov	r0, r5
	bl	dev_name
	mov	r2, r4
	mov	r4, #0
	mov	r1, r0
	mov	r3, r7
	ldr	r0, .L25+60
	bl	pr_err
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L23:
	ldr	r3, .L25+64
	ldr	r3, [r3]
	cmp	r3, r0
	bne	.L2
	b	.L3
.L6:
	mov	r0, r4
	bl	sw_is_ar934x
	cmp	r0, #0
	beq	.L8
	ldr	r2, .L25+68
	ldr	r3, [r8]
	ldr	r1, [r2]
	ldr	r2, .L25+72
	cmp	r3, r1
	str	r2, [r4, #12]
	ldreq	r2, .L25+76
	beq	.L21
	ldr	r2, .L25+80
	ldr	r2, [r2]
	cmp	r3, r2
	bne	.L11
	ldr	r2, .L25+84
.L21:
	ldr	r3, .L25+88
	mov	r0, r5
	ldr	r1, [r3]
	ldr	r2, [r2]
	bl	ar7240sw_reg_set
	ldr	r3, [r4, #32]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L25+36
	ldr	r3, [r3]
	str	r3, [r4, #28]
	b	.L7
.L11:
	mov	r0, r5
	bl	dev_name
	mov	r1, r0
	ldr	r0, .L25+92
	bl	pr_err
.L12:
	mov	r0, r4
	mov	r4, #0
	bl	kfree
	mov	r0, r4
	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
.L24:
	ldr	r3, .L25+96
	ldr	r2, .L25+100
	ldr	r1, [r3]
	mov	r0, r5
	ldr	r2, [r2]
	bl	ar7240sw_reg_set
	ldr	r3, .L25+36
	ldr	r3, [r3]
	sub	r3, r3, #1
	str	r3, [r4, #28]
	b	.L7
.L8:
	mov	r0, r5
	bl	dev_name
	mov	r2, r7
	mov	r1, r0
	ldr	r0, .L25+104
	bl	pr_err
	b	.L12
.L26:
	.align	2
.L25:
	.word	MII_PHYSID1
	.word	MII_PHYSID2
	.word	AR7240_PHY_ID1
	.word	AR934X_PHY_ID1
	.word	AR934X_PHY_ID2
	.word	GFP_KERNEL
	.word	AR7240_REG_MASK_CTRL
	.word	AR7240_MASK_CTRL_VERSION_S
	.word	AR7240_MASK_CTRL_VERSION_M
	.word	AR7240_NUM_PORTS
	.word	.LC1
	.word	AR7240_PORT_CPU
	.word	AR7240_MAX_VLANS
	.word	ar7240_ops
	.word	.LC5
	.word	.LC0
	.word	AR7240_PHY_ID2
	.word	PHY_INTERFACE_MODE_GMII
	.word	.LC2
	.word	AR934X_OPER_MODE0_MAC_GMII_EN
	.word	PHY_INTERFACE_MODE_MII
	.word	AR934X_OPER_MODE0_PHY_MII_EN
	.word	AR934X_REG_OPER_MODE0
	.word	.LC3
	.word	AR934X_REG_OPER_MODE1
	.word	AR934X_REG_OPER_MODE1_PHY4_MII_EN
	.word	.LC4
	.size	ar7240_probe, .-ar7240_probe
	.comm	ar7240_ops,4,4
	.comm	PHY_INTERFACE_MODE_MII,4,4
	.comm	PHY_INTERFACE_MODE_GMII,4,4
	.comm	MII_PHYSID2,4,4
	.comm	MII_PHYSID1,4,4
	.comm	GFP_KERNEL,4,4
	.comm	AR934X_REG_OPER_MODE1_PHY4_MII_EN,4,4
	.comm	AR934X_REG_OPER_MODE1,4,4
	.comm	AR934X_REG_OPER_MODE0,4,4
	.comm	AR934X_PHY_ID2,4,4
	.comm	AR934X_PHY_ID1,4,4
	.comm	AR934X_OPER_MODE0_PHY_MII_EN,4,4
	.comm	AR934X_OPER_MODE0_MAC_GMII_EN,4,4
	.comm	AR7240_REG_MASK_CTRL,4,4
	.comm	AR7240_PORT_CPU,4,4
	.comm	AR7240_PHY_ID2,4,4
	.comm	AR7240_PHY_ID1,4,4
	.comm	AR7240_NUM_PORTS,4,4
	.comm	AR7240_MAX_VLANS,4,4
	.comm	AR7240_MASK_CTRL_VERSION_S,4,4
	.comm	AR7240_MASK_CTRL_VERSION_M,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
