	.file	"extr_mvpp2_main.c_mvpp2_egress_enable.c"
	.intel_syntax noprefix
	.text
	.p2align 4
	.type	mvpp2_egress_enable, @function
mvpp2_egress_enable:
.LFB0:
	.cfi_startproc
	endbr64
	push	r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	push	rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	mov	rbx, rdi
	sub	rsp, 8
	.cfi_def_cfa_offset 32
	call	mvpp2_egress_port@PLT
	mov	edx, eax
	mov	eax, DWORD PTR [rbx]
	test	eax, eax
	jle	.L5
	mov	r8, QWORD PTR 8[rbx]
	lea	edi, -1[rax]
	xor	ecx, ecx
	xor	r12d, r12d
	mov	r9d, 1
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L6:
	mov	rcx, rsi
.L4:
	mov	rsi, QWORD PTR [r8+rcx*8]
	cmp	QWORD PTR [rsi], 0
	je	.L3
	mov	esi, r9d
	sal	esi, cl
	or	r12d, esi
.L3:
	lea	rsi, 1[rcx]
	cmp	rcx, rdi
	jne	.L6
.L2:
	mov	edi, DWORD PTR 4[rbx]
	mov	esi, DWORD PTR MVPP2_TXP_SCHED_PORT_INDEX_REG[rip]
	call	mvpp2_write@PLT
	mov	edi, DWORD PTR 4[rbx]
	mov	esi, DWORD PTR MVPP2_TXP_SCHED_Q_CMD_REG[rip]
	add	rsp, 8
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	mov	edx, r12d
	pop	rbx
	.cfi_def_cfa_offset 16
	pop	r12
	.cfi_def_cfa_offset 8
	jmp	mvpp2_write@PLT
	.p2align 4,,10
	.p2align 3
.L5:
	.cfi_restore_state
	xor	r12d, r12d
	jmp	.L2
	.cfi_endproc
.LFE0:
	.size	mvpp2_egress_enable, .-mvpp2_egress_enable
	.comm	MVPP2_TXP_SCHED_Q_CMD_REG,4,4
	.comm	MVPP2_TXP_SCHED_PORT_INDEX_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_mvpp2_main.c_mvpp2_egress_enable.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mvpp2_egress_enable, %function
mvpp2_egress_enable:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, lr}
	mov	r5, r0
	bl	mvpp2_egress_port
	ldr	lr, [r5]
	mov	r2, r0
	cmp	lr, #0
	ble	.L5
	mov	r1, #0
	mov	r6, #1
	mov	r4, r1
	ldr	r3, [r5, #8]
	sub	r3, r3, #4
	add	lr, r3, lr, lsl #2
.L4:
	ldr	ip, [r3, #4]!
	ldr	ip, [ip]
	cmp	ip, #0
	orrne	r4, r4, r6, lsl r1
	cmp	r3, lr
	add	r1, r1, #1
	bne	.L4
.L2:
	ldr	r3, .L12
	ldr	r0, [r5, #4]
	ldr	r1, [r3]
	bl	mvpp2_write
	ldr	r3, .L12+4
	mov	r2, r4
	ldr	r0, [r5, #4]
	ldr	r1, [r3]
	pop	{r4, r5, r6, lr}
	b	mvpp2_write
.L5:
	mov	r4, #0
	b	.L2
.L13:
	.align	2
.L12:
	.word	MVPP2_TXP_SCHED_PORT_INDEX_REG
	.word	MVPP2_TXP_SCHED_Q_CMD_REG
	.size	mvpp2_egress_enable, .-mvpp2_egress_enable
	.comm	MVPP2_TXP_SCHED_Q_CMD_REG,4,4
	.comm	MVPP2_TXP_SCHED_PORT_INDEX_REG,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
