	.file	"extr_main.c_wlcore_irq_locked.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"IRQ work"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"HW watchdog interrupt received! starting recovery."
	.align 8
.LC2:
	.string	"SW watchdog interrupt received! starting recovery."
	.section	.rodata.str1.1
.LC3:
	.string	"WL1271_ACX_INTR_DATA"
.LC4:
	.string	"WL1271_ACX_INTR_EVENT_A"
.LC5:
	.string	"WL1271_ACX_INTR_EVENT_B"
.LC6:
	.string	"WL1271_ACX_INTR_INIT_COMPLETE"
.LC7:
	.string	"WL1271_ACX_INTR_HW_AVAILABLE"
	.text
	.p2align 4
	.type	wlcore_irq_locked, @function
wlcore_irq_locked:
.LFB0:
	.cfi_startproc
	endbr64
.L3:
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	lea	rsi, .LC0[rip]
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, 1
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rdi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	mov	eax, DWORD PTR [rdi]
	mov	edi, DWORD PTR DEBUG_IRQ[rip]
	test	DWORD PTR WL12XX_PLATFORM_QUIRK_EDGE_IRQ[rip], eax
	cmove	r13d, DWORD PTR WL1271_IRQ_MAX_LOOPS[rip]
	call	wl1271_debug@PLT
	mov	rax, QWORD PTR WLCORE_STATE_ON[rip]
	xor	edi, edi
	cmp	QWORD PTR 8[rbp], rax
	setne	dil
	xor	r12d, r12d
	call	unlikely@PLT
	test	rax, rax
	je	.L42
.L1:
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L42:
	.cfi_restore_state
	mov	rdi, rbp
	call	wl1271_ps_elp_wakeup@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	test	r13d, r13d
	je	.L4
	lea	r14, 32[rbp]
	lea	r15, 28[rbp]
	.p2align 4,,10
	.p2align 3
.L14:
	mov	edi, DWORD PTR WL1271_FLAG_IRQ_RUNNING[rip]
	mov	rsi, r14
	call	clear_bit@PLT
	xor	eax, eax
	call	smp_mb__after_clear_bit@PLT
	mov	edx, DWORD PTR 48[rbp]
	mov	rsi, QWORD PTR 40[rbp]
	mov	rdi, rbp
	call	wlcore_fw_status@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	mov	rdi, rbp
	call	wlcore_hw_tx_immediate_compl@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	edi, DWORD PTR [rax]
	call	le32_to_cpu@PLT
	and	eax, DWORD PTR WLCORE_ALL_INTR_MASK[rip]
	mov	ebx, eax
	jne	.L43
.L4:
	mov	rdi, rbp
	call	wl1271_ps_elp_sleep@PLT
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L43:
	mov	edi, DWORD PTR WL1271_ACX_INTR_WATCHDOG[rip]
	and	edi, eax
	call	unlikely@PLT
	test	rax, rax
	jne	.L44
	mov	edi, DWORD PTR WL1271_ACX_SW_INTR_WATCHDOG[rip]
	and	edi, ebx
	call	unlikely@PLT
	test	rax, rax
	jne	.L45
	mov	edi, DWORD PTR WL1271_ACX_INTR_DATA[rip]
	and	edi, ebx
	call	likely@PLT
	test	rax, rax
	jne	.L46
.L7:
	test	DWORD PTR WL1271_ACX_INTR_EVENT_A[rip], ebx
	jne	.L47
.L10:
	test	DWORD PTR WL1271_ACX_INTR_EVENT_B[rip], ebx
	jne	.L48
.L11:
	test	DWORD PTR WL1271_ACX_INTR_INIT_COMPLETE[rip], ebx
	jne	.L49
.L12:
	test	DWORD PTR WL1271_ACX_INTR_HW_AVAILABLE[rip], ebx
	jne	.L50
.L13:
	sub	r13d, 1
	jne	.L14
	jmp	.L4
	.p2align 4,,10
	.p2align 3
.L46:
	mov	edi, DWORD PTR DEBUG_IRQ[rip]
	lea	rsi, .LC3[rip]
	call	wl1271_debug@PLT
	mov	rsi, QWORD PTR 40[rbp]
	mov	rdi, rbp
	call	wlcore_rx@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	xor	esi, esi
	mov	rdi, r15
	call	spin_lock_irqsave@PLT
	mov	edi, DWORD PTR WL1271_FLAG_FW_TX_BUSY[rip]
	mov	rsi, r14
	call	test_bit@PLT
	test	eax, eax
	jne	.L8
	mov	rdi, rbp
	call	wl1271_tx_total_queue_count@PLT
	test	rax, rax
	jg	.L51
.L8:
	xor	esi, esi
	mov	rdi, r15
	call	spin_unlock_irqrestore@PLT
.L9:
	mov	rdi, rbp
	call	wlcore_hw_tx_delayed_compl@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	lea	rdi, 24[rbp]
	call	skb_queue_len@PLT
	lea	rdi, 20[rbp]
	mov	DWORD PTR 12[rsp], eax
	call	skb_queue_len@PLT
	add	eax, DWORD PTR 12[rsp]
	cmp	DWORD PTR WL1271_DEFERRED_QUEUE_LIMIT[rip], eax
	jnb	.L7
	mov	rdi, rbp
	call	wl1271_flush_deferred_work@PLT
	test	DWORD PTR WL1271_ACX_INTR_EVENT_A[rip], ebx
	je	.L10
	.p2align 4,,10
	.p2align 3
.L47:
	mov	edi, DWORD PTR DEBUG_IRQ[rip]
	lea	rsi, .LC4[rip]
	call	wl1271_debug@PLT
	xor	esi, esi
	mov	rdi, rbp
	call	wl1271_event_handle@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	test	DWORD PTR WL1271_ACX_INTR_EVENT_B[rip], ebx
	je	.L11
.L48:
	mov	edi, DWORD PTR DEBUG_IRQ[rip]
	lea	rsi, .LC5[rip]
	call	wl1271_debug@PLT
	mov	esi, 1
	mov	rdi, rbp
	call	wl1271_event_handle@PLT
	mov	r12d, eax
	test	eax, eax
	js	.L1
	test	DWORD PTR WL1271_ACX_INTR_INIT_COMPLETE[rip], ebx
	je	.L12
.L49:
	mov	edi, DWORD PTR DEBUG_IRQ[rip]
	lea	rsi, .LC6[rip]
	call	wl1271_debug@PLT
	test	DWORD PTR WL1271_ACX_INTR_HW_AVAILABLE[rip], ebx
	je	.L13
.L50:
	mov	edi, DWORD PTR DEBUG_IRQ[rip]
	lea	rsi, .LC7[rip]
	call	wl1271_debug@PLT
	jmp	.L13
	.p2align 4,,10
	.p2align 3
.L51:
	xor	esi, esi
	mov	rdi, r15
	call	spin_unlock_irqrestore@PLT
	mov	rdi, rbp
	call	wlcore_tx_work_locked@PLT
	mov	r12d, eax
	test	eax, eax
	jns	.L9
	jmp	.L1
	.p2align 4,,10
	.p2align 3
.L44:
	lea	rdi, .LC1[rip]
	call	wl1271_error@PLT
	mov	r12d, DWORD PTR EIO[rip]
	mov	DWORD PTR 16[rbp], 1
	neg	r12d
	jmp	.L1
.L45:
	lea	rdi, .LC2[rip]
	call	wl1271_error@PLT
	mov	r12d, DWORD PTR EIO[rip]
	mov	DWORD PTR 16[rbp], 1
	neg	r12d
	jmp	.L1
	.cfi_endproc
.LFE0:
	.size	wlcore_irq_locked, .-wlcore_irq_locked
	.comm	WLCORE_STATE_ON,8,8
	.comm	WLCORE_ALL_INTR_MASK,4,4
	.comm	WL12XX_PLATFORM_QUIRK_EDGE_IRQ,4,4
	.comm	WL1271_IRQ_MAX_LOOPS,4,4
	.comm	WL1271_FLAG_IRQ_RUNNING,4,4
	.comm	WL1271_FLAG_FW_TX_BUSY,4,4
	.comm	WL1271_DEFERRED_QUEUE_LIMIT,4,4
	.comm	WL1271_ACX_SW_INTR_WATCHDOG,4,4
	.comm	WL1271_ACX_INTR_WATCHDOG,4,4
	.comm	WL1271_ACX_INTR_INIT_COMPLETE,4,4
	.comm	WL1271_ACX_INTR_HW_AVAILABLE,4,4
	.comm	WL1271_ACX_INTR_EVENT_B,4,4
	.comm	WL1271_ACX_INTR_EVENT_A,4,4
	.comm	WL1271_ACX_INTR_DATA,4,4
	.comm	EIO,4,4
	.comm	DEBUG_IRQ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_main.c_wlcore_irq_locked.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"IRQ work\000"
	.align	2
.LC1:
	.ascii	"HW watchdog interrupt received! starting recovery.\000"
	.align	2
.LC2:
	.ascii	"SW watchdog interrupt received! starting recovery.\000"
	.align	2
.LC3:
	.ascii	"WL1271_ACX_INTR_DATA\000"
	.align	2
.LC4:
	.ascii	"WL1271_ACX_INTR_EVENT_A\000"
	.align	2
.LC5:
	.ascii	"WL1271_ACX_INTR_EVENT_B\000"
	.align	2
.LC6:
	.ascii	"WL1271_ACX_INTR_INIT_COMPLETE\000"
	.align	2
.LC7:
	.ascii	"WL1271_ACX_INTR_HW_AVAILABLE\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	wlcore_irq_locked, %function
wlcore_irq_locked:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
.L3:
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r0
	ldr	r3, .L59
	ldr	r2, [r0]
	ldr	r3, [r3]
	ldr	r1, .L59+4
	ldr	r8, .L59+8
	tst	r2, r3
	ldr	r7, [r1]
	sub	sp, sp, #12
	ldr	r1, .L59+12
	ldr	r0, [r8]
	movne	r7, #1
	bl	wl1271_debug
	ldr	r3, .L59+16
	ldr	r0, [r4, #4]
	ldr	r3, [r3]
	subs	r0, r0, r3
	movne	r0, #1
	bl	unlikely
	cmp	r0, #0
	movne	r5, #0
	beq	.L49
.L1:
	mov	r0, r5
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L49:
	mov	r0, r4
	bl	wl1271_ps_elp_wakeup
	subs	r5, r0, #0
	blt	.L1
	cmp	r7, #0
	beq	.L4
	ldr	r10, .L59+20
	ldr	fp, .L59+24
	add	r9, r4, #24
.L14:
	mov	r1, r9
	ldr	r0, [r10]
	bl	clear_bit
	bl	smp_mb__after_clear_bit
	mov	r0, r4
	ldr	r2, [r4, #32]
	ldr	r1, [r4, #28]
	bl	wlcore_fw_status
	subs	r5, r0, #0
	blt	.L1
	mov	r0, r4
	bl	wlcore_hw_tx_immediate_compl
	ldr	r3, [r4, #28]
	ldr	r0, [r3]
	bl	le32_to_cpu
	ldr	r3, [fp]
	ands	r6, r0, r3
	bne	.L50
.L4:
	mov	r0, r4
	bl	wl1271_ps_elp_sleep
	mov	r0, r5
	add	sp, sp, #12
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L50:
	ldr	r3, .L59+28
	ldr	r0, [r3]
	and	r0, r0, r6
	bl	unlikely
	cmp	r0, #0
	bne	.L51
	ldr	r3, .L59+32
	ldr	r0, [r3]
	and	r0, r0, r6
	bl	unlikely
	cmp	r0, #0
	bne	.L52
	ldr	r3, .L59+36
	ldr	r0, [r3]
	and	r0, r0, r6
	bl	likely
	cmp	r0, #0
	bne	.L53
.L7:
	ldr	r3, .L59+40
	ldr	r3, [r3]
	tst	r6, r3
	bne	.L54
.L10:
	ldr	r3, .L59+44
	ldr	r3, [r3]
	tst	r6, r3
	bne	.L55
.L11:
	ldr	r3, .L59+48
	ldr	r3, [r3]
	tst	r6, r3
	bne	.L56
.L12:
	ldr	r3, .L59+52
	ldr	r3, [r3]
	tst	r6, r3
	bne	.L57
.L13:
	subs	r7, r7, #1
	bne	.L14
	b	.L4
.L53:
	ldr	r1, .L59+56
	ldr	r0, [r8]
	bl	wl1271_debug
	mov	r0, r4
	ldr	r1, [r4, #28]
	bl	wlcore_rx
	subs	r5, r0, #0
	blt	.L1
	add	r5, r4, #20
	mov	r1, #0
	mov	r0, r5
	bl	spin_lock_irqsave
	ldr	r3, .L59+60
	mov	r1, r9
	ldr	r0, [r3]
	bl	test_bit
	cmp	r0, #0
	bne	.L8
	mov	r0, r4
	bl	wl1271_tx_total_queue_count
	cmp	r0, #0
	bgt	.L58
.L8:
	mov	r0, r5
	mov	r1, #0
	bl	spin_unlock_irqrestore
.L9:
	mov	r0, r4
	bl	wlcore_hw_tx_delayed_compl
	subs	r5, r0, #0
	blt	.L1
	add	r0, r4, #16
	bl	skb_queue_len
	mov	r3, r0
	add	r0, r4, #12
	str	r3, [sp, #4]
	bl	skb_queue_len
	ldr	r2, .L59+64
	ldr	r3, [sp, #4]
	ldr	r2, [r2]
	add	r3, r3, r0
	cmp	r2, r3
	bcs	.L7
	mov	r0, r4
	bl	wl1271_flush_deferred_work
	ldr	r3, .L59+40
	ldr	r3, [r3]
	tst	r6, r3
	beq	.L10
.L54:
	ldr	r1, .L59+68
	ldr	r0, [r8]
	bl	wl1271_debug
	mov	r1, #0
	mov	r0, r4
	bl	wl1271_event_handle
	subs	r5, r0, #0
	blt	.L1
	ldr	r3, .L59+44
	ldr	r3, [r3]
	tst	r6, r3
	beq	.L11
.L55:
	ldr	r1, .L59+72
	ldr	r0, [r8]
	bl	wl1271_debug
	mov	r1, #1
	mov	r0, r4
	bl	wl1271_event_handle
	subs	r5, r0, #0
	blt	.L1
	ldr	r3, .L59+48
	ldr	r3, [r3]
	tst	r6, r3
	beq	.L12
.L56:
	ldr	r1, .L59+76
	ldr	r0, [r8]
	bl	wl1271_debug
	ldr	r3, .L59+52
	ldr	r3, [r3]
	tst	r6, r3
	beq	.L13
.L57:
	ldr	r1, .L59+80
	ldr	r0, [r8]
	bl	wl1271_debug
	b	.L13
.L58:
	mov	r0, r5
	mov	r1, #0
	bl	spin_unlock_irqrestore
	mov	r0, r4
	bl	wlcore_tx_work_locked
	subs	r5, r0, #0
	bge	.L9
	b	.L1
.L51:
	ldr	r0, .L59+84
.L47:
	bl	wl1271_error
	mov	r2, #1
	ldr	r3, .L59+88
	str	r2, [r4, #8]
	ldr	r5, [r3]
	rsb	r5, r5, #0
	b	.L1
.L52:
	ldr	r0, .L59+92
	b	.L47
.L60:
	.align	2
.L59:
	.word	WL12XX_PLATFORM_QUIRK_EDGE_IRQ
	.word	WL1271_IRQ_MAX_LOOPS
	.word	DEBUG_IRQ
	.word	.LC0
	.word	WLCORE_STATE_ON
	.word	WL1271_FLAG_IRQ_RUNNING
	.word	WLCORE_ALL_INTR_MASK
	.word	WL1271_ACX_INTR_WATCHDOG
	.word	WL1271_ACX_SW_INTR_WATCHDOG
	.word	WL1271_ACX_INTR_DATA
	.word	WL1271_ACX_INTR_EVENT_A
	.word	WL1271_ACX_INTR_EVENT_B
	.word	WL1271_ACX_INTR_INIT_COMPLETE
	.word	WL1271_ACX_INTR_HW_AVAILABLE
	.word	.LC3
	.word	WL1271_FLAG_FW_TX_BUSY
	.word	WL1271_DEFERRED_QUEUE_LIMIT
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC1
	.word	EIO
	.word	.LC2
	.size	wlcore_irq_locked, .-wlcore_irq_locked
	.comm	WLCORE_STATE_ON,4,4
	.comm	WLCORE_ALL_INTR_MASK,4,4
	.comm	WL12XX_PLATFORM_QUIRK_EDGE_IRQ,4,4
	.comm	WL1271_IRQ_MAX_LOOPS,4,4
	.comm	WL1271_FLAG_IRQ_RUNNING,4,4
	.comm	WL1271_FLAG_FW_TX_BUSY,4,4
	.comm	WL1271_DEFERRED_QUEUE_LIMIT,4,4
	.comm	WL1271_ACX_SW_INTR_WATCHDOG,4,4
	.comm	WL1271_ACX_INTR_WATCHDOG,4,4
	.comm	WL1271_ACX_INTR_INIT_COMPLETE,4,4
	.comm	WL1271_ACX_INTR_HW_AVAILABLE,4,4
	.comm	WL1271_ACX_INTR_EVENT_B,4,4
	.comm	WL1271_ACX_INTR_EVENT_A,4,4
	.comm	WL1271_ACX_INTR_DATA,4,4
	.comm	EIO,4,4
	.comm	DEBUG_IRQ,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
