	.file	"extr_vfpdouble.c_vfp_double_normaliseround.c"
	.intel_syntax noprefix
	.text
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"pack: in"
	.section	.rodata.str1.8,"aMS",@progbits,1
	.align 8
.LC1:
	.string	"VFP: rounding increment = 0x%08llx\n"
	.section	.rodata.str1.1
.LC2:
	.string	"pack: final"
	.section	.rodata.str1.8
	.align 8
.LC3:
	.string	"VFP: %s: d(d%d)=%016llx exceptions=%08x\n"
	.text
	.p2align 4
	.globl	vfp_double_normaliseround
	.type	vfp_double_normaliseround, @function
vfp_double_normaliseround:
.LFB0:
	.cfi_startproc
	endbr64
	push	r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	push	r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	mov	r14, r8
	push	r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	mov	r13d, edi
	lea	rdi, .LC0[rip]
	push	r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	mov	r12d, ecx
	push	rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	mov	rbp, rsi
	push	rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	mov	ebx, edx
	sub	rsp, 24
	.cfi_def_cfa_offset 80
	call	vfp_double_dump@PLT
	mov	r15d, DWORD PTR 0[rbp]
	mov	r8d, DWORD PTR 4[rbp]
	cmp	r15d, 2047
	je	.L39
	test	r8d, r8d
	jne	.L4
	mov	DWORD PTR 0[rbp], 0
.L3:
	mov	rsi, rbp
	lea	rdi, .LC2[rip]
	call	vfp_double_dump@PLT
	mov	rdi, rbp
	call	vfp_double_pack@PLT
	mov	r8d, r12d
	mov	edx, r13d
	mov	rsi, r14
	mov	ebp, eax
	mov	ecx, eax
	lea	rdi, .LC3[rip]
	xor	eax, eax
	call	pr_debug@PLT
	mov	esi, r13d
	mov	edi, ebp
	call	vfp_put_double@PLT
	add	rsp, 24
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	mov	eax, r12d
	pop	rbx
	.cfi_def_cfa_offset 48
	pop	rbp
	.cfi_def_cfa_offset 40
	pop	r12
	.cfi_def_cfa_offset 32
	pop	r13
	.cfi_def_cfa_offset 24
	pop	r14
	.cfi_def_cfa_offset 16
	pop	r15
	.cfi_def_cfa_offset 8
	ret
	.p2align 4,,10
	.p2align 3
.L39:
	.cfi_restore_state
	test	r12d, r12d
	jne	.L3
	test	r8d, r8d
	je	.L3
.L4:
	mov	edi, r8d
	mov	ecx, 32
	mov	DWORD PTR 8[rsp], r8d
	sar	edi, cl
	call	fls@PLT
	mov	ecx, 32
	mov	r8d, DWORD PTR 8[rsp]
	sub	ecx, eax
	cmp	ecx, 32
	je	.L40
.L5:
	test	ecx, ecx
	jne	.L41
	mov	DWORD PTR 8[rsp], 0
	test	r15d, r15d
	js	.L42
.L7:
	and	ebx, DWORD PTR FPSCR_RMODE_MASK[rip]
	cmp	DWORD PTR FPSCR_ROUND_NEAREST[rip], ebx
	je	.L43
.L8:
	cmp	DWORD PTR FPSCR_ROUND_TOZERO[rip], ebx
	je	.L36
	cmp	DWORD PTR FPSCR_ROUND_PLUSINF[rip], ebx
	sete	dl
	cmp	QWORD PTR 8[rbp], 0
	setne	al
	cmp	dl, al
	je	.L36
	mov	eax, DWORD PTR VFP_DOUBLE_LOW_BITS[rip]
	mov	ebx, 1
	lea	ecx, 1[rax]
	sal	rbx, cl
	sub	ebx, 1
.L9:
	xor	eax, eax
	mov	esi, ebx
	lea	rdi, .LC1[rip]
	mov	DWORD PTR 12[rsp], r8d
	call	pr_debug@PLT
	test	ebx, ebx
	mov	r8d, DWORD PTR 12[rsp]
	jns	.L37
	mov	eax, r8d
	and	r8d, 1
	add	r15d, 1
	sar	ebx
	sar	eax
	or	r8d, eax
.L37:
	lea	edx, [r8+rbx]
.L11:
	mov	eax, DWORD PTR VFP_DOUBLE_LOW_BITS[rip]
	lea	ecx, 1[rax]
	mov	eax, 1
	sal	eax, cl
	sub	eax, 1
	test	eax, r8d
	je	.L14
	or	r12d, DWORD PTR FPSCR_IXC[rip]
.L14:
	cmp	r15d, 2045
	jle	.L15
	mov	ecx, DWORD PTR FPSCR_OFC[rip]
	or	ecx, DWORD PTR FPSCR_IXC[rip]
	mov	edx, 2047
	movabs	rax, -4294965251
	or	r12d, ecx
	test	ebx, ebx
	cmovne	rax, rdx
	mov	QWORD PTR 0[rbp], rax
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L41:
	sub	r15d, ecx
	mov	DWORD PTR 8[rsp], 0
	sal	r8d, cl
	test	r15d, r15d
	jns	.L7
.L42:
	mov	esi, r15d
	mov	edi, r8d
	neg	esi
	call	vfp_shiftright64jamming@PLT
	movsx	rdx, eax
	mov	eax, DWORD PTR VFP_DOUBLE_LOW_BITS[rip]
	mov	r8, rdx
	lea	ecx, 1[rax]
	mov	rax, -1
	sal	rax, cl
	not	rax
	test	rax, rdx
	setne	al
	xor	r15d, r15d
	and	ebx, DWORD PTR FPSCR_RMODE_MASK[rip]
	cmp	DWORD PTR FPSCR_ROUND_NEAREST[rip], ebx
	movzx	eax, al
	mov	DWORD PTR 8[rsp], eax
	jne	.L8
.L43:
	mov	ecx, DWORD PTR VFP_DOUBLE_LOW_BITS[rip]
	mov	ebx, 1
	movsx	rax, r8d
	sal	rbx, cl
	add	ecx, 1
	shr	rax, cl
	and	eax, 1
	cmp	rax, 1
	sbb	ebx, 0
	jmp	.L9
	.p2align 4,,10
	.p2align 3
.L36:
	xor	esi, esi
	lea	rdi, .LC1[rip]
	xor	eax, eax
	mov	DWORD PTR 12[rsp], r8d
	call	pr_debug@PLT
	mov	r8d, DWORD PTR 12[rsp]
	xor	ebx, ebx
	mov	edx, r8d
	jmp	.L11
	.p2align 4,,10
	.p2align 3
.L15:
	mov	eax, edx
	sar	eax, cl
	xor	ecx, ecx
	test	eax, eax
	je	.L17
	test	r15d, r15d
	mov	eax, r15d
	setne	cl
.L17:
	mov	esi, edx
	shr	esi, 31
	or	cl, sil
	jne	.L18
	mov	ecx, DWORD PTR 8[rsp]
	test	ecx, ecx
	je	.L18
	or	r12d, DWORD PTR FPSCR_UFC[rip]
.L18:
	sar	edx
	mov	DWORD PTR 0[rbp], eax
	mov	DWORD PTR 4[rbp], edx
	jmp	.L3
	.p2align 4,,10
	.p2align 3
.L40:
	mov	edi, r8d
	call	fls@PLT
	mov	ecx, 64
	mov	r8d, DWORD PTR 8[rsp]
	sub	ecx, eax
	jmp	.L5
	.cfi_endproc
.LFE0:
	.size	vfp_double_normaliseround, .-vfp_double_normaliseround
	.comm	VFP_DOUBLE_LOW_BITS,4,4
	.comm	FPSCR_UFC,4,4
	.comm	FPSCR_ROUND_TOZERO,4,4
	.comm	FPSCR_ROUND_PLUSINF,4,4
	.comm	FPSCR_ROUND_NEAREST,4,4
	.comm	FPSCR_RMODE_MASK,4,4
	.comm	FPSCR_OFC,4,4
	.comm	FPSCR_IXC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"extr_vfpdouble.c_vfp_double_normaliseround.c"
	.text
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"pack: in\000"
	.align	2
.LC1:
	.ascii	"VFP: rounding increment = 0x%08llx\012\000"
	.align	2
.LC2:
	.ascii	"pack: final\000"
	.align	2
.LC3:
	.ascii	"VFP: %s: d(d%d)=%016llx exceptions=%08x\012\000"
	.text
	.align	2
	.global	vfp_double_normaliseround
	.syntax unified
	.arm
	.fpu softvfp
	.type	vfp_double_normaliseround, %function
vfp_double_normaliseround:
	@ args = 4, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	mov	r4, r1
	mov	r6, r0
	sub	sp, sp, #20
	ldr	r0, .L39
	mov	r7, r3
	mov	fp, r2
	bl	vfp_double_dump
	ldr	r8, [r4]
	ldr	r3, .L39+4
	ldr	r5, [r4, #4]
	cmp	r8, r3
	beq	.L35
	cmp	r5, #0
	streq	r5, [r4]
	bne	.L4
.L3:
	mov	r1, r4
	ldr	r0, .L39+8
	bl	vfp_double_dump
	mov	r0, r4
	bl	vfp_double_pack
	mov	r4, r0
	mov	r3, r0
	mov	r2, r6
	ldr	r1, [sp, #56]
	str	r7, [sp]
	ldr	r0, .L39+12
	bl	pr_debug
	mov	r1, r6
	mov	r0, r4
	bl	vfp_put_double
	mov	r0, r7
	add	sp, sp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L35:
	clz	r3, r5
	cmp	r7, #0
	lsr	r3, r3, #5
	movne	r3, #1
	cmp	r3, #0
	bne	.L3
.L4:
	mov	r0, #32
	asr	r0, r5, r0
	bl	fls
	cmp	r0, #0
	rsb	r0, r0, #32
	beq	.L36
.L5:
	cmp	r0, #0
	subne	r8, r8, r0
	lslne	r5, r5, r0
	cmp	r8, #0
	blt	.L37
	mov	r10, #0
	ldr	r9, .L39+16
.L7:
	ldr	r2, .L39+20
	ldr	r3, .L39+24
	ldr	r2, [r2]
	ldr	r3, [r3]
	and	r2, r2, fp
	cmp	r3, r2
	beq	.L38
	ldr	r3, .L39+28
	ldr	r3, [r3]
	cmp	r3, r2
	beq	.L32
	ldr	r1, .L39+32
	ldr	r3, [r4, #8]
	ldr	fp, [r1]
	subs	r3, r3, #0
	sub	r2, fp, r2
	clz	r2, r2
	movne	r3, #1
	lsr	r2, r2, #5
	cmp	r2, r3
	beq	.L32
	mvn	fp, #0
	ldr	r1, [r9]
	add	r1, r1, #1
	mvn	fp, fp, lsl r1
.L9:
	mov	r1, fp
	ldr	r0, .L39+36
	bl	pr_debug
	cmp	fp, #0
	andlt	r3, r5, #1
	asrlt	fp, fp, #1
	orrlt	r5, r3, r5, asr #1
	addlt	r8, r8, #1
	add	r2, r5, fp
.L11:
	mvn	r1, #0
	ldr	r3, [r9]
	add	r3, r3, #1
	bics	r1, r5, r1, lsl r3
	ldrne	r1, .L39+40
	ldrne	r1, [r1]
	orrne	r7, r7, r1
	ldr	r1, .L39+44
	cmp	r8, r1
	ble	.L15
	ldr	r3, .L39+48
	ldr	r2, .L39+40
	ldr	r3, [r3]
	ldr	r2, [r2]
	cmp	fp, #0
	orr	r3, r3, r2
	orr	r7, r3, r7
	mvneq	r3, #0
	movne	r3, #0
	ldrne	r2, .L39+4
	stmeq	r4, {r1, r3}
	stmne	r4, {r2, r3}
	b	.L3
.L32:
	mov	r1, #0
	ldr	r0, .L39+36
	bl	pr_debug
	mov	fp, #0
	mov	r2, r5
	b	.L11
.L15:
	asrs	r3, r2, r3
	moveq	r1, r3
	beq	.L17
	subs	r1, r8, #0
	movne	r1, #1
	mov	r3, r8
.L17:
	orr	r1, r1, r2, lsr #31
	eor	r1, r1, #1
	tst	r1, r10
	ldrne	r1, .L39+52
	asr	r2, r2, #1
	ldrne	r1, [r1]
	str	r2, [r4, #4]
	orrne	r7, r7, r1
	str	r3, [r4]
	b	.L3
.L38:
	mov	r0, r5
	ldr	lr, [r9]
	asr	r1, r5, #31
	add	ip, lr, #1
	rsb	fp, lr, #31
	lsr	ip, r5, ip
	orr	ip, ip, r1, lsl fp
	mov	r3, #0
	mov	fp, #1
	str	r0, [sp, #8]
	str	r1, [sp, #12]
	ldr	r1, [sp, #12]
	sub	r0, lr, #31
	orr	ip, ip, r1, lsr r0
	and	r2, ip, #1
	orrs	r3, r2, r3
	lsl	fp, fp, lr
	subeq	fp, fp, #1
	b	.L9
.L37:
	rsb	r1, r8, #0
	mov	r0, r5
	bl	vfp_shiftright64jamming
	mvn	r2, #0
	ldr	r9, .L39+16
	asr	r1, r0, #31
	ldr	r8, [r9]
	mov	r5, r0
	add	ip, r8, #1
	sub	lr, r8, #31
	lsl	r3, r2, ip
	orr	r3, r3, r2, lsl lr
	rsb	lr, r8, #31
	orr	r3, r3, r2, lsr lr
	bic	r3, r1, r3
	bic	r2, r0, r2, lsl ip
	orrs	r3, r2, r3
	movne	r10, #1
	moveq	r10, #0
	mov	r8, #0
	b	.L7
.L36:
	mov	r0, r5
	bl	fls
	rsb	r0, r0, #64
	b	.L5
.L40:
	.align	2
.L39:
	.word	.LC0
	.word	2047
	.word	.LC2
	.word	.LC3
	.word	VFP_DOUBLE_LOW_BITS
	.word	FPSCR_RMODE_MASK
	.word	FPSCR_ROUND_NEAREST
	.word	FPSCR_ROUND_TOZERO
	.word	FPSCR_ROUND_PLUSINF
	.word	.LC1
	.word	FPSCR_IXC
	.word	2045
	.word	FPSCR_OFC
	.word	FPSCR_UFC
	.size	vfp_double_normaliseround, .-vfp_double_normaliseround
	.comm	VFP_DOUBLE_LOW_BITS,4,4
	.comm	FPSCR_UFC,4,4
	.comm	FPSCR_ROUND_TOZERO,4,4
	.comm	FPSCR_ROUND_PLUSINF,4,4
	.comm	FPSCR_ROUND_NEAREST,4,4
	.comm	FPSCR_RMODE_MASK,4,4
	.comm	FPSCR_OFC,4,4
	.comm	FPSCR_IXC,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
