From: eugene@mpce.mq.edu.au
Subject: Re: WP-PCF, Linux, RISC?
Organization: Macquarie University, Australia.
Lines: 18
NNTP-Posting-Host: macadam.mpce.mq.edu.au
Originator: eugene@macadam.mpce.mq.edu.au

In article <C5o1yq.M34@csie.nctu.edu.tw> ghhwang@csie.nctu.edu.tw (ghhwang) writes:
>
>Dear friend,
>  The RISC means "reduced instruction set computer". The RISC usually has 
>small instruction set so as to reduce the circuit complex and can increase 
>the clock rate to have a high performance. You can read some books about
>computer architecture for more information about RISC.

hmm... not that I am an authority on RISC ;-) but I clearly remember
reading that the instruction set on RISC CPUs is rather large.
The difference is in addressing modes - RISC instruction sets are not
as orthogonal is CISC.

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