Network latency can have a significant impact on the performance of transactional storage systems, particularly in wide area or geo-distributed deployments. To reduce latency, systems typically rely on a cache to service read-requests closer to the client. However, caches are not effective for write-heavy workloads, which have to be processed by the storage system in order to maintain serializability. This paper presents a new technique, called optimistic abort, which reduces network latency for high-contention, write-heavy workloads by identifying transactions that will abort as early as possible, and aborting them before they reach the store. We have implemented optimistic abort in a system called Gotthard, which leverages recent advances in network data plane programmability to execute transaction processing logic directly in network devices. Gotthard examines network traffic to observe and log transaction requests. If Gotthard suspects that a transaction is likely to be aborted at the store, it aborts the transaction early by re-writing the packet header, and routing the packets back to the client. Gotthard significantly reduces the overall latency and improves the throughput for high-contention workloads.
* Data plane programming languages. Gotthard is written in P4 @cite_14 , although there are several other projects have proposed domain-specific languages for data plane programming. Notable examples including Huawei's POF @cite_7 and Xilinx's PX @cite_62 . We chose to focus on P4 because there is a growing community of active users, and it is relatively more mature than the other choices. However, the ideas for implementing Gotthard should generalize to other languages.
@cite_14 @cite_7 @cite_62
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The P4 language is an emerging domain-specific language for describing the data plane processing at a network device. P4 has been mapped to a wide range of forwarding devices including NPUs, programmable NICs and FPGAs, except for General Purpose Graphics Processing Unit (GPGPU) which is a salient parallel architecture for processing network flows. In this work, we design a heterogeneous architecture with both CPU and GPU as a P4 programming target, and present a toolset to map a P4 program onto the proposed architecture. Our evaluation reveals that a P4 program can render promising performance on such architecture by parallelizing its "match+action" engine with the GPGPU accelerator. The experiment results show that the auto-configured GPU kernels achieve scalable lookup and classification speeds: the prototype system can reach up to 580 Gbps for IP lookups (64-byte packets) and 60 million classifications per second for 4k firewall rules, respectively. This paper presents P4FPGA, a new tool for developing and evaluating data plane applications. P4FPGA is an open-source compiler and runtime. The compiler extends the P4.org reference compiler with a custom backend that generates FPGA code. P4FPGA supports different architecture configurations, depending on the needs of the particular application. We have benchmarked several representative P4 programs, and our experiments show that code generated by P4FPGA runs at line-rate at all packet sizes with latencies comparable to commercial ASICs. By combining high-level programming abstractions offered by P4 with a flexible and powerful hardware target, P4FPGA allows developers to rapidly prototype and deploy new data plane applications. We present the design and implementation of p4v, a practical tool for verifying data planes described using the P4 programming language. The design of p4v is based on classic verification techniques but adds several key innovations including a novel mechanism for incorporating assumptions about the control plane and domain-specific optimizations which are needed to scale to large programs. We present case studies showing that p4v verifies important properties and finds bugs in real-world programs. We conduct experiments to quantify the scalability of p4v on a wide range of additional examples. We show that with just a few hundred lines of control-plane annotations, p4v is able to verify critical safety properties for switch.p4, a program that implements the functionality of on a modern data center switch, in under three minutes. Our discussion of the motivation for extensible languages rests on a basic premise, namely that there exist diverse programming language requirements which are becoming continually more diverse, and that it is of critical importance that each user in the spectrum of users be supplied with a language facility appropriate to his problem area. That is, there are, in fact, "scientific" problems, "data processing" problems," information retrieval" problems, "symbol manipulation" problems, "system programming" problems, and so on and each problem area has its particular and peculiar units of data, unit transactions, and preferred ways of writing. For example, the kinds of unit data and unit transactions include integers which are to be added, floating point numbers to be multiplied, "infinite" precision rational numbers to be divided, strings to be concatenated, records into which a field is to be inserted, files to be sorted, matrices to be inverted, equations to be simplified, sets to be unioned, and so on. A part of our premise is that it is not enough to have a language which is formally sufficient to host the particular data and unit transactions some user has in mind. Rather, it is of critical importance that the kinds of data and unit transactions which he wants to think of as primitive be available, effectively as primitives, in his language facility.