The problem of parallel thread mapping is studied for the case of discrete orthogonal @math -simplices. The possibility of a @math time recursive block-space map @math is analyzed from the point of view of parallel space efficiency and potential performance improvement. The @math -simplex and @math -simplex are analyzed as special cases, where constant time maps are found, providing a potential improvement of up to @math and @math more efficient than a bounding-box approach, respectively. For the general case it is shown that finding an efficient recursive parallel space for an @math -simplex depends of the choice of two parameters, for which some insights are provided which can lead to a volume that matches the @math -simplex for @math , making parallel space approximately @math times more efficient than a bounding-box.
Ries contributed with a parallel GPU method for the triangular matrix inversion @cite_2 . The authors identified that the parallel space indeed can be improved by using a (REC) of the grid, based on a strategy. The approach takes @math time by doing a balanced partition of the structure, from the orthogonal point to the diagonal.
@cite_2
2101779504 2061781302 2113197522 2077712265
Dense matrix inversion is a basic procedure in many linear algebra algorithms. A computationally arduous step in most dense matrix inversion methods is the inversion of triangular matrices as produced by factorization methods such as LU decomposition. In this paper, we demonstrate how triangular matrix inversion (TMI) can be accelerated considerably by using commercial Graphics Processing Units (GPU) in a standard PC. Our implementation is based on a divide and conquer type recursive TMI algorithm, efficiently adapted to the GPU architecture. Our implementation obtains a speedup of 34x versus a CPU-based LAPACK reference routine, and runs at up to 54 gigaflops s on a GTX 280 in double precision. Limitations of the algorithm are discussed, and strategies to cope with them are introduced. In addition, we show how inversion of an L- and U-matrix can be performed concurrently on a GTX 295 based dual-GPU system at up to 90 gigaflops s. The goal of this paper is to present an efficient implementation of an explicit matrix inversion of general square matrices on multicore computer architecture. The inversion procedure is split into four steps: 1) computing the LU factorization, 2) inverting the upper triangular U factor, 3) solving a linear system, whose solution yields inverse of the original matrix and 4) applying backward column pivoting on the inverted matrix. Using a tile data layout, which represents the matrix in the system memory with an optimized cache-aware format, the computation of the four steps is decomposed into computational tasks. A directed acyclic graph is generated on the fly which represents the program data flow. Its nodes represent tasks and edges the data dependencies between them. Previous implementations of matrix inversions, available in the state-of-the-art numerical libraries, are suffer from unnecessary synchronization points, which are non-existent in our implementation in order to fully exploit the parallelism of the underlying hardware. Our algorithmic approach allows to remove these bottlenecks and to execute the tasks with loose synchronization. A runtime environment system called QUARK is necessary to dynamically schedule our numerical kernels on the available processing units. The reported results from our LU-based matrix inversion implementation significantly outperform the state-of-the-art numerical libraries such as LAPACK (5x), MKL (5x) and ScaLAPACK (2.5x) on a contemporary AMD platform with four sockets and the total of 48 cores for a matrix of size 24000. A power consumption analysis shows that our high performance implementation is also energy efficient and substantially consumes less power than its competitors. This study explores the use of the graphics processing units (GPUs) for performing the two-dimensional discrete wavelet transform (DWT) of images. The study of fast wavelet transforms has been driven both by the enormous volumes of data produced by modern cameras and by the need for real-time processing of these data. With the emergence of general computing on GPUs, many time-consuming applications have started to reap the associated benefits. In the implementation of a GPU-based DWT, two approaches are used according to the published works, which are the row-column (RC) approach and the block-based (BB) approach. Most state-of-the-art techniques are based on the RC approach, which utilises the parallelism between different rows and columns; few works are based on the BB approach, which explores the parallelism between different blocks of the image. Although easy to implement, resource usage of the RC approach is usually related to the image size. Another shortcoming of the RC approach lies in the fact, according to the author's analysis, that more global memory access is required. The authors thus select the BB approach in this study. Experiment results show that the proposed BB approach outperforms the RC approach, being 99× faster than a native CPU implementation for 4096 × 4096 images. In this work, we analyze the behavior of several parallel algorithms developed to compute the two-dimensional discrete wavelet transform using both OpenMP over a multicore platform and CUDA over a GPU. The proposed parallel algorithms are based on both regular filter-bank convolution and lifting transform with small implementations changes focused on both the memory requirements reduction and the complexity reduction. We compare our implementations against sequential CPU algorithms and other recently proposed algorithms like the SMDWT algorithm over different CPUs and the Wippig&Klauer algorithm over a GTX280 GPU. Finally, we analyze their behavior when algorithms are adapted to each architecture. Significant execution times improvements are achieved on both multicore platforms and GPUs. Depending on the multicore platform used, we achieve speed-ups of 1.9 and 3.4 using two and four processes, respectively, when compared to the sequential CPU algorithm, or we obtain speed-ups of 7.1 and 8.9 using eight and ten processes. Regarding GPUs, the GPU convolution algorithm using the GPU shared memory obtains speed-ups up to 20 when compared to the CPU sequential algorithm.