Extreme Ultraviolet (EUV) photolithography is seen as the key enabler for increasing transistor density in the next decade. In EUV lithography, 13.5 nm EUV light is illuminated through a reticle, holding a pattern to be printed, onto a silicon wafer. This process is performed about 100 times per wafer, at a rate of over a hundred wafers an hour. During this process, a certain percentage of the light energy is converted into heat in the wafer. In turn, this heat causes the wafer to deform which increases the overlay error, and as a result, reduces the manufacturing yield. To alleviate this, we propose a firm real-time control system that uses a wafer heat feed-forward model to compensate for the wafer deformation. The model calculates the expected wafer deformation, and then, compensates for that by adjusting the light projection and or the wafer movement. However, the model computational demands are very high. As a result, it needs to be executed on dedicated HW that can perform computations quickly. To this end, we deploy Graphics Processing Units (GPUs) to accelerate the calculations. In order to fit the computations within the required time budgets, we combine in a novel manner multiple techniques, such as compression and mixed-precision arithmetic, with recent advancements in GPUs to build a GPU-based real-time control system. A proof-of-concept implementation using NVIDIA P100 GPUs is able to deliver decompression throughput of 33 GB s and a sustained 198 GFLOP s per GPU for mixed-precision dense matrix-vector multiplication.
The past decade witnessed an increase in the interest of using General Purpose GPU (GPGPU) computing in embedded, real-time, and industrial systems @cite_2 @cite_0 @cite_9 @cite_10 @cite_16 @cite_5 @cite_3 . @cite_2 , Elliot and Anderson discussed the applications that can benefit from GPUs and the constraints on using them. @cite_0 @cite_10 , discussed the potential of GPUs in embedded and industrial systems and the issues facing their adoption.
@cite_9 @cite_3 @cite_0 @cite_2 @cite_5 @cite_16 @cite_10
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We present the design, analysis, and real-time implementation of a distributed computation particle filter on a graphic processing unit (GPU) architecture that is especially suited for fast real-time control applications. The proposed filter architecture is composed of a number of local subfilters that can share limited information among each other via an arbitrarily chosen abstract connected communication topology. We develop a detailed implementation procedure for GPU architectures focusing on distributed resampling as a crucial step in our approach, and describe alternative methods in the literature. We analyze the role of the most important parameters such as the number of exchanged particles and the effect of the particle exchange topology. The significant speedup and increase in performance obtained with our framework with respect to both available GPU solutions and standard sequential CPU methods enable particle filter implementations in fast real-time feedback control systems. This is illustrated via experimental and simulation results using a real-time visual servoing problem of a robotic arm capable of running in closed loop with an update rate of 100 Hz, while performing particle filter calculations that involve over one million particles. The Graphics Processing Unit (GPU) is becoming a very powerful platform to accelerate graphics and dataparallel compute-intensive applications. It gives a high performance and at the same time it has a low power consumption. This combination is of high performance and low power consumption is useful when it comes to building an embedded system. In this paper we are looking at the possibility to use a combination of CPU and GPU to provide performance metrics that are required in an embedded system. In particular we look at requirements inherent in the process and power industries where we believe that the GPU has the potential to be a useful and natural element in future embedded system architectures. Graphics processing units (GPUs) are becoming increasingly important in today's platforms as their increased generality allows for them to be used as powerful coprocessors. In this paper, we explore possible applications for GPUs in real-time systems, discuss the limitations and constraints imposed by current GPU technology, and present a summary of our research addressing many such constraints. In the present work, fault detection in industrial automation processes is investigated. A fault detection method for observable process variables is extended for application cases, where the observations of process variables are noisy. The principle of this method consists in building a probability distribution model and evaluating the likelihood of observations under that model. The probability distribution model is based on a hybrid automaton which takes into account several system modes, i.e. phases with continuous system behaviour. Transitions between the modes are attributed to discrete control events such as on off signals. The discrete event system composed of system modes and transitions is modeled as finite state machine. Continuous process behaviour in the particular system modes is modeled with stochastic state space models, which incorporate neural networks. Fault detection is accomplished by evaluation of the underlying probability distribution model with a particle filter. In doing so both the hybrid system model and a linear observation model for noisy observations are taken into account. Experimental results show superior fault detection performance compared to the baseline method for observable process variables. The runtime of the proposed fault detection method has been significantly reduced by parallel implementation on a GPU. In this work in progress paper we present parts of our ongoing work on using the Graphical Processing Unit (GPU) in the context of Embedded Systems. As a first step we are investigating the possibility to move functions from a Digital Signal Processor (DSP) to a GPU. If it is possible to make such a migration then it would simplify the hardware designs for some embedded systems by removing external hardware and also remove a potential life cycle issue with obsolete components. We are currently designing a test system to be able to compare performance between a legacy control system used today in industry, based on a CPU DSP combination, to a new design with a CPU GPU combination. In this setting the pre-filtering of sampled data, previously done in the DSP, is moved to the GPU.