Energy Optimization of Racetrack Memory Based SIMON Block Cipher
Spin based memory devices are gaining importance due to multiple advantages like, zero standby power, high write endurance and fast read, write operations. Besides storage, Spin Torque Transfer (STT) based Magnetic Tunnel Junctions (MTJs) and Racetrack Memories (RMs) are also being investigated for logic applications, especially in the context of in memory computing and neuromorphic architectures. Despite multiple innovations at technology device and circuit level, spin based circuits suffer from poor energy efficiency, due to the high energy consumption of write operations. In this paper, we propose design optimizations to reduce the number of write operations in RM based logic circuits, and therefore, achieve overall gain in energy performance. We performed in depth study of the cutting edge cryptographic primitive, block cipher SIMON, using experimentally validated Verilog A models of MTJ and RM. For this benchmark, simulations demonstrate 4.65x reduction in computation energy, 2.66x improvement in computation delay and 1.71x reduction in transistor count compared to its base implementation using RM.
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)