Lumos+ Rapid, pre RTL design space exploration on accelerator rich heterogeneous architectures with reconfigurable logic
We propose Lumos+ an analytical framework for power and performance modeling of accelerator rich heterogeneous architectures. As accelerators proliferate, the search space becomes too expensive for brute force search. We describe a novel and highly accurate genetic search algorithm. We then use Lumos+ to explore the tradeoffs between using fixed function accelerators and reconfigurable logic blocks, while accounting for diverse workload characteristics, hardware overheads, and system constraints, and show that reconfigurable logic can improve power and performance while improving overall system flexibility and the ability to adapt to diverse and changing workloads.
2016 IEEE 34th International Conference on Computer Design (ICCD)