A Performance Case Study on Memristive Computing in Memory Versus Von Neumann Architecture
Summary form only given. The Von Neumann bottleneck originates from the low bandwidth between processing and memory. One paradigm that could ease the bottleneck is Computing in Memory (CiM) where the same elements store logic values and perform logical operations on them in the same physical location. Here, presented are implementations of the K means clustering algorithm on a Memristive Logic Array based CiM implementation and a Machine Learning specific Transport Triggered Architecture (TTA) processor implemented on 28nm FDSOI technology and operating at 0.35V. While running K means, the Memristive CiM is 5,7 times faster and uses 2,3 times less energy than the TTA processor. However, the average power consumption of the MLA is 2,5 times the power of the TTA.
2016 Data Compression Conference (DCC)