A low power carry cut back approximate adder with fixed point implementation and floating point precision
This paper introduces an approximate adder architecture based on a digital quasi feedback technique called Carry CutBack in which high significance stages can cut the carry propagation chain at lower significance positions. This lightweight approach prevents activation of the critical path, improving energy efficiency while guaranteeing low worst case relative error. It offers a degree of freedom which allows to dissociate precision and dynamic range in fixed point implementation. A design methodology is presented along with results and a comparative study. For a worst case accuracy of 98 energy savings up to 44% and power delay area reductions up to 62 are demonstrated compared to low power conventional designs.
2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)