\mu RNG: A 300 950 mV, 323 Gbps/W All Digital Full Entropy True Random Number Generator in 14 nm FinFET CMOS
This paper describes mRNG, an ultra lightweight all digital full entropy true random number generator (TRNG) fabricated in 14 nm high k/metal gate FinFET CMOS, targeted for on die generation of cryptographic keys in energy constrained IoT and wearable platforms. The mRNG combines the entropy of multiple independent sources to generate an output bitstream that is indistinguishable from an ideal unbiased entropy source. Three independent self calibrating all digital entropy sources, coupled with XOR feedback shift register based correlation suppressors and an in line compact Barak Impagliazzo Wigderson (BIW) extractor enable ultra low energy consumption of 3 pJ/full entropy bit with a dense layout occupying 1008 mm2, while achieving: (i) 162.5 Mbps full entropy throughput at 1.3 GHz operation, with total power consumption of 1.5 mW and leakage power component of 90 mW, measured at 0.75 V, 25degC, (ii) mutually uncorrelated raw bitstreams from the three entropy sources with phi coefficient cross correlation ;0.003, (iii) extracted full entropy bitstream that passes all 16 NIST RNG tests with measured Shannon entropy up to 0.9999999995, and lower bound min entropy H 0.99, (iv) hysteresis free extracted output for lags 1 1000, with ACF ~0 within 95% confidence bounds of a Gaussian distribution (m 0, s2 0.002) (v) wide operating supply voltage range of 300 950 mV with throughput scaling to 225 Mbps at 950 mV and robust subthreshold voltage performance of 400 Kbps, 4 mW, measured at 300 mV, 25degC, (vi) peak energy efficiency of 323 Gbps/W at near threshold voltage of 400 mV, with full entropy throughput of 8.6 Mbps, total power consumption of 27 mW, (vii) 6.5x reduction in gate count and 5.4x lower energy consumption compared to conventional AES based entropy extractors.
IEEE Journal of Solid State Circuits