Coding techniques for failure recovery in a distributive modular memory organization
This paper considers various coding techniques which could be applied to a memory organization to achieve detection and correction of failures. In this discussion, we define a fault as a malfunction of a systems component and a failure as a manifestation of a fault. Notice that a single fault can result in multiple failures. Thus, techniques such as error-detecting and correction codes, when used alone, are limited in that they operate on failures---not faults.
Failure Analysis of Memory Organization for Utilization in a Self-Repair Memory System
Traditional approaches to memory reliability have been limited to complete redundancy or coding techniques. Redundancy frequently proves too expensive (introducing additional systems faults) and the traditional memory coding techniques have been limited to those areas of memory where a single fault results in a single failure (e.g., a broken core in a magnetic memory) as distinguished from an address decoder fault. To take an integrated approach to this problem, using a variety of coding and modularization techniques on each of the memory subsystems, it is necessary to determine the types of faults and failures caused by these faults that could occur in the system. This paper presents the results of a failure analysis study of typical 2D, 2?D, and 3D memory organizations. Two-way memories are also considered. This study demonstrates that a 2D memory, utilizing a switching array for memory access, is less susceptible to eatastrophic failures than other organizations considered. A memory organization capable of distributing the failures, in a manner permitting correction by linear codes, was adopted. Other techniques for automatic replacement of fault units are also considered.
The Logic Organizer and Diagnosis Programs
Abstract : The first part of the report is a user's manual for those wishing to use the system of programs for the diagnosis of sequential switching circuits. The second part is a programmer's manual. Detailed descriptions of the individual sub-routines, including calling sequences and peculiarities are given. This system of programs was developed as a tool in the experimental study of self-diagnosis in electronic digital computers. The system consists of two programs--the organizer (5000 instructions) and the sequential circuit analyzer (10,000 instructions) with about 1500 instructions in common. The organizer is a program for arranging the logic in levels and identifying any feedback loops not identified in the input. The sequential circuit analyzer is a program for producing the testing procedure for any given sequential circuit. The organizer prepares the input for the analyzer. The entire system is written in machine language for the CDC 1604 computer and uses the Illinois system subroutines for input-output. (Author)