The Comparative Study to Enhance Board Level Reliability Performance of Wafer Level Package At 0.25 mm Pitch Using Micro-Ball Drop and Electroplated Solder Technology
In this study, the board level reliability of WLP at 0.25mm pitch has been evaluated by employing board level reliability test following JEDEC include thermal cycling, drop shock and cyclic 4-point bend tests to verify the performance of shrunk bump size. The WLP test vehicle has been designed with 4-layer stack up structure, 4.0 × 4.0 mm die size and 15 × 15 ball array. The shrunk bumps of test vehicles were formed by using micro-ball drop and electroplated lead free solder bumping process after UBM plating completed. The shrunk bump size in WLP at 0.25mm ball pitch will enhance the risk of board level solder joint fatigue due to lower standoff height and smaller diameter of solder joint (higher bump stress concentration). In this work, we also evaluated different 4-layer WLP stack up structures for key design parameters including polyimide, RDL and UBM layers to reduce solder joint stress and thus enhance BLR performance All the study legs passed drop test with the 1st fail >100 drops and passed 200K times cyclic bend test without any failure. The TCT performance of micro-ball drop bumped legs showed better results with 1st fail passed 500X cycles. The drop, bend test and TCT performance are improved by new bump stack-up designs.
Studying the Effect of Stackup Structure of Large Die Size Fan-In Wafer Level Package at 0.35 mm Pitch With Varying Ball Alloy to Enhance Board Level Reliability Performance
In this study a four-layer fan-in wafer level package (WLP) structure (two passivation layers, one redistribution metal layer (RDL) and one under bump metallurgy layer (UBM) with die size 8 × 8 mm2 and ball pitch 0.35 mm is used for board level reliability (BLR) evaluation. The solder joint stress during BLR tests are highly related to the structure and solder ball alloy used in WLP bumping process based on simulation input. In this work, we evaluated different WLP structures with different stackup thickness including passivation layers, RDL layer, UBM layer and different solder ball alloy to reduce solder joint stress and thus enhance BLR performance. Besides, the impact of different die thickness post wafer grinding process was also included. All the different WLP structures have been evaluated by employing board level reliability test following JEDEC include thermal cycling test, drop test and cyclic 4-point bend test. From this work, an improved fan-in WLP stackup structure was demonstrated to pass board level TCT 500 cycles (include both corner chain balls/non-corner chain balls), drop test 150 times and cyclic bend test 200,000 cycles without any failure for 8× 8 mm2 die size at 0.35 mm pitch with doped SAC405 alloy.
ANALYSIS OF BOLT′S ANCHORING QUALITY BASED ON WAVELET NEURAL NETWORK
The dynamic response of bolt achieved by impact-echo method can be effected easily by some factors.It′s difficult to classify bolt′s anchoring quality according to the dynamic response of bolt.In this paper,a new analytical method of bolt′s dynamic response is put forward.The new analytical method combing with advantages of wavelet analysis and artificial neural network is presented.Firstly,the dynamic response of bolt by numerical simulation software FLAC3D is obtained.Secondlyt,he features are extracted from the dynamic response of bolt by wavelet analysis.Thirdlyt,hese features are fed into the artificial neural network for training.Finallyt,his artificial neural network to classify the bolt′s anchoring quality intelligent according to the dynamic response of bolt is employed.In order to validate this new analytical method,some practical signals of bolt′s dynamic response are used for the test.The results indicate that the new analytical method is practicable.