A 7000-gate microprocessor on SOS&#8212;PULCE
An n-channel MOS LSI microprocessor integrating 20 000 transistors on a chip has been realized on a sapphire substrate utilizing the Coplanar-II process. It contains ALU, shifters, and 44 registers which are combined to three 16-bit buses. By utilizing three types of threshold voltage for load transistors, 28-percent reduction in power dissipation is achieved. The minimum cycle time is 200 ns. By using the Coplanar-II process, anomalous leakage currents due to parasitic transistors at the sides of island are suppressed. It is found that the silicon-on-sapphire (SOS) version operates 2.3 times faster than the bulk-silicon version, which is mainly explained by the parasitic capacitance ratio. Parallel-plate approximation in calculating a wiring capacitance results in an underestimate by a factor of 60 compared with taking the two-dimensional effect into account. It is verified that a) the observed yield of a very large SOS chip is higher than the value predicted from a randomly distributed defects model, and b) the yield-sensitive active area of an SOS is so small that it can compensate for the yield degradation due to the very large defects density on an SOS wafer.
Cross‐sectional electron microscopy of silicon on sapphire
Cross sections of (100)Si/(012)sapphire were examined by transmission electron microscopy. The foil plane was (011)Si and contained the [100]Si growth direction. The number of faults (i.e., microtwins and isolated stacking faults) per cm measured in the [022]Si direction, FD, decreases with increasing distance d from the silicon/substrate growth interface according to the equations FD= (3.1×107)/d0.63 (440⩽d⩽2400 A), and FD= (1.3×1011)/d1.7 (2400?d?4.3×104 A). Misfit dislocations were not observed, and no evidence for the presence of an Al‐bearing phase was seen in the proximity of the interface.
DESIGN CONCEPT OF THE SOIL IMPROVEMENT FOR ROAD CONSTRUCION ON SOFT CLAY
This paper presents an innovative use of soil-cement mixing method using jet grouting technique to improve the bearing capacity of subbase foundation for road construction in Thailand. The construction sequences and the basic design example of jet grouting for embankment works on soft clay are also given in this paper. The design concept and method of analysis of jet grouting work using finite element technique, results of finite element analysis, the installation adopted and effectiveness of soil improvement system are given and discussed. It was found that the total settlement is reduced by the jet grouting. A case history at Pak Phanang Diversion Dam project, Nakornsrithamarat, Thailand is presented describing the engineering design and construction aspects of a successful project, which demonstrated the advantage of soil-cement mixing method over conventional pile driving for this site.