The hetrojunction amorphous n+(a-Si)/n-i-p(a-SiC)/i-n+(a-Si) phototransistor with high gain (&#8764;40) and high speed (&#8764;10&#181;s)
In this report, a hetrojunction amorphous Si-SiC barrier transistor (a-HJBT) was successfully fabricated which revealed high gain (∼40) and high speed (∼10µs). The homojunction amorphous silicon bulk barrier phototransistor has been reported to be a high gain (∼12) and high speed (∼30µs) photosensing device. In this report, a significant improvement has been achieved by making a hetrojunction structure between the emitter and the base by a structure of n<sup>+</sup>(Si)/n-i-δp<sup>+</sup>(SiC) which is in contact with the i-n<sup>+</sup>(Si) collector layers. The structure was successfully made by plasma enhanced chemical vapor deposition (PECVD) on a glass substrate.
Amorphous silicon bulk barrier phototransistor with Schottky barrier emitter
An amorphous silicon indium tin oxide/n+‐i‐δ( p+)i/Al Schottky barrier phototransistor was fabricated on a glass substrate, where δ( p+) is the thin (200 A) p+ base. The operation of the transistor is similar to that of an n+‐i‐δ( p+)i‐n+ amorphous silicon bulk barrier phototransistor. Photogenerated holes are accumulated at the thin base region (barrier valley) and induce a large number of electrons injected from the Schottky barrier due to the hole induced barrier lowering. Varying the emitter and collector i‐layer thickness produced different current gains in which a maximum value of 5.6 is obtained for the 300‐A emitter i‐layer/p+/3000‐A collector i‐layer structure under an input red light intensity of 7.5 mW/cm2.
Rectification at n-n GaAs:(Ga,Al)As heterojunctions
n-n Ga0.7Al0.3As: GaAs heterojunction structures have been grown by l.p.e., with 1 × 1015 cm-3 net carriers in the ternary. N/W profiling across the heterojunction shows an accumulation region on the GaAs side and a depletion region on the (Ga, Al)As side. I/V characteristics at room temperature show significant rectification.