Investigation of Ni-based silicide formation by different dynamic surface annealing approaches
Sub-melt millisecond anneal (MSA) is one of major anneal techniques for forming ultra-shallow and highly activated junctions. Besides post-implant anneal for source/drain and source/drain extensions, MSA has also attracted increased interests in nickel-silicide formation recently. During the silicidation process, desired Ni diffusion in forming silicides is competing with un-wanted Ni diffusion along defects paths. The latter will cause higher junction leakage and/or source/drain leakage. Since the activation energy for the un-wanted diffusion is lower, higher process temperature with shorter duration is beneficial for minimizing the un-wanted diffusion. Furthermore, MSA allows high process temperature to be used for silicide formation, which can re-activate some dopants, such as arsenic and phosphors. These dopants are easily deactivated during lower temperature thermal processes post source/drain formation such as silicide block film deposition; therefore, transistor performance can be improved by using MSA for silicidation processes. In this work, dynamic surface annealing (DSA), which is one form of MSA techniques, was applied to form Ni-based silicides. The impacts of different combinations of soak RTA and DSA for thermal steps before and after selective nickel/NiSi strip were examined. One step DSA has been demonstrated effective reduction of Nickel piping by e-beam inspection count, improved NiSi resistance and junction leakage w/o device performance degradation.
The determination of annealing program for NiSi formation
The objective of this research was to form a uniform NiSi layer on MOSFET devices. It has been widely recognized that two-step rapid thermal processing (RTP) is much more effective than one-step RTP in controlling the silicide thickness, and reverse narrow poly line effect. In addition to verifying the number of RTP process steps, soak annealing and spike annealing were intensively investigated to find the most beneficial annealing program. In this paper, we present the progress we made with soak and spike anneals, as well as the effects of implementing them in either RTP1 or RTP2 step in NiSi formation. The results indicate that if a soak anneal was adopted for RTP1 step, the phase transformation is more gentle than a spike anneal, which leads to fewer e-beam inspection defects, better surface roughness, and superior device performance. If a spike anneal was applied as RTP2 step, it would result in much fewer bright voltage contrast (BVC) defects by e-beam inspection on NMOS, compared to a soak anneal. This would suppress the structure defect found in the NMOS NiSi layer, and greatly alleviate the N+/P-well junction leakage degradation issue
Study of nickel silicide contact on Si/Si1-xGex
The properties of nickel silicide formed by depositing nickel on Si/p/sup +/-Si/sub 1-x/Ge/sub x/ layer are compared with that of nickel germanosilicide on p/sup +/-Si/sub 1-x/Ge/sub x/ layer formed by depositing Ni directly on p/sup +/-Si/sub 1-x/Ge/sub x/ layer without silicon consuming layer. After thermal annealing, nickel silicide on Si/p/sup +/-Si/sub 1-x/Ge/sub x/ layer shows lower sheet resistance and specific contact resistivity than that of nickel germanosilicide on p/sup +/-Si/sub 1-x/Ge/sub x/ layer. In addition, small junction leakage current is also observed for nickel silicide on a Si/p/sup +/-Si/sub 1-x/Ge/sub x//n-Si diode. In summary, with a Si consuming layer on top of the Si/sub 1-x/Ge/sub x/, the nickel silicide contact formed demonstrated improved electrical and materials characteristics as compared with the nickel germanosilicide contact which was formed directly on the Si/sub 1-x/Ge/sub x/ layer.