Metal Gate Recessed Access Device (RAD) for DRAM Scaling
A functional DRAM with higher data retention characteristics than a planar access device has been demonstrated, using a metal gate recessed access device (RAD). Chemical vapor deposition (CVD) and atomic layer deposition (ALD) were used to deposit titanium nitride (TiN) and tantalum nitride (TaN), respectively. CVD TiN and ALD TaN-CVD TiN laminate gate stacks were integrated with a RAD module. ALD TaN-CVD TiN laminate gates showed enhanced drive current (IDS), higher transconductance (GM), higher mobility (¿EFF) and reduced off current (IOFF) characteristics compared to CVD TiN gates. Device characteristics and reliability data for both the planar devices and RADs are presented. The ALD TaN-CVD TiN laminate metal gate RAD showed much improved data retention characteristics compared to a conventional planar device with a poly silicon gate. The optimum thickness of ALD TaN in the laminate stack is discussed.
Roles of Residual Stress in Dynamic Refresh Failure of a Buried-Recessed-Channel-Array Transistor (B-CAT) in DRAM
We clarify the role of metal gates (e.g., TiN) on the degradation of the state-of-the-art buried-channel-array transistor (B-CAT) in dynamic random access memory (DRAM) chips. Unless the thermal budget during the processing step for integration is well controlled, residual stress caused by grain growth of the metal gate can result in a dynamic refresh failure of B-CAT through the negative shift in threshold voltage (-ΔVth). A hole trapping model is proposed to explain this phenomenon. Uncontrolled grain growth of the metal gate increases the residual stress level on SiO2, and, consequently, it breaks the strained Si-O-Si bonds, which can serve as precursor sites for incoming holes. Residual stress in the three-dimensional transistor architecture, therefore, must be well controlled to improve the reliability of commercial DRAM chips.
Physical techniques for silicon layer analysis
Abstract This paper reviews the application of physical techniques (SIMS, RBS, XPS, AES, XRD, Raman and FTIR spectroscopies and AFM) for the characterisation of layers, structures and processes in Si technology. The principles of the techniques are given, and their use for the analysis of Si related structures and processes is discussed. Structural features related to the device and system performances are considered. These include features related to amorphous, polycrystalline and single crystal layers, as grain size and crystal orientation, disorder, defects, strain, composition,…, as well as the quality and nature of surfaces and interfaces in Si related layers (Si, SiGe and ternary related alloys, SiC, dielectric layers, silicides…). Examples taken from the current research in these areas are presented.