Laser scanning of MOS IC's reveals internal logic states nondestructively
A laser scanning system has been used to observe the internal logic pattern in a MOS LSI device in a nondestructive manner. The laser scanner has also been used to selectively change logic states deep within the device. Pictures of the logic patterns revealed by the scanner are discussed.
Progress report, January 1 to June 30, 1975
This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Both in-house and contract efforts are included. The emphasis is on silicon device technologies. Principal accomplishments during this reporting period included (1) completion and analysis of an interlaboratory evaluation of standard reference wafers for resistivity measurement by the four-probe method, (2) analysis of the effect of finite contact size on sheet resistance as measured with a van der Pauw structure, (3) calculation of errors introduced in measuring line width with typical microscope systems, (4) development of procedures for predicting the magnitude of electron beam induced current in silicon device structures, (5) application of the optical flying-spot scanner to observation of hot spots and nonlinearities in UHF power transistors and of logic patterns in an MOS shift register, and (6) determination of a more accurate electrical method, based on peak junction temperature measurement, to establish safe operating area curves for medium power transistors. Also reported are the results of work on spreading resistance measurements, ionization of dopant impurities in silicon, Rutherford backscattering measurements. X-ray photoelectron spectroscopy, ion microprobe mass analysis, tests for determining the surface quality of sapphire substrates, reevaluation of Irvin's curves, mathematical models of dopant profiles, deep depletion measurements of dopant profiles and epitaxial layer thickness, bias-temperature stress tests on MOS capacitors, a high voltage capacitance-voltage method for measuring characteristics of thick insulator films, ion implantation parameters, methods for determining integrity of passivation overcoats, optical imaging and calibration standards for photomask metrology, line-width measurements, charge-coupled device test structures, a test pattern for silicon-onsapphire MOS device technologies, a nondestructive acoustic emission test for beam-lead bonds, pull and shear tests for wire bonds, leak detection by helium mass spectrometry, correlation of moisture infusion in semiconductor packages with leak size and device reliability, an automated scanning low-energy electron probe, electron beam induced damage in silicon device structures, and thermal resistance measurements on Darlington transistors. Supplementary data concerning staff, publications, workshops and symposia, standards committee activities, and technical services are also included as appendices. A sixth appendix summarizes the results of an assessment of the impact of automation of integrated circuit processing and assembly on future measurement requirements in the industry.
Optical Scanning Techniques for Semiconductor Device Screening and Identification of Surface and Junction Phenomena
The electrical response of semiconductor devices to light can be used to study various device phenomena and to identify the causes of anomalous device behavior. To implement such a study, a flying spot scanner has been constructed. This instrument deflects a light beam into a raster pattern and focuses it on the device under test. The light source is a helium-neon laser. Sinusoidal sweeps are used for simplicity. The electrical output from the device is amplified and intensity modulates the electron beam of a cathode-ray tube. By synchronizing the CRT beam deflection with the light spot on the sample, an image of the device electrical output is traced on the CRT. The resolution is about 5 ? (0.0002"), referred to the surface under study. Interpretation of the image yields the desired device information. The system is constructed from equipment ordinarily available in an experimental laboratory. The scanner has been used principally for tests on photodevices, but results show that it should also be very useful for nondestructive testing of transistors and integrated circuits. Device phenomena, which have been identified and studied, include localized surface and junction breakdown, channeling, and uniformity of avalanche multiplication in silicon avalanche photodiodes. The information obtained has allowed us to prepare improved devices by relating these observations to device fabrication steps. Both discrete devices and their arrays on a single wafer have been analyzed.