Laser scanning of MOS IC's reveals internal logic states nondestructively
A laser scanning system has been used to observe the internal logic pattern in a MOS LSI device in a nondestructive manner. The laser scanner has also been used to selectively change logic states deep within the device. Pictures of the logic patterns revealed by the scanner are discussed.
Novel failure analysis techniques using photon probing with a scanning optical microscope
Three new failure analysis techniques for integrated circuits (ICs) have been developed using localized photon probing with a scanning optical microscope (SOM). The first two are light-induced voltage alteration (LIVA) imaging techniques that (1) localize open-circuited and damaged junctions and (2) image transistor logic states. The third technique uses the SOM to control logic states optically from the IC backside. LIVA images are produced by monitoring the voltage fluctuations of a constant current power supply as a laser beam is scanned over the IC. High selectivity for localizing defects has been demonstrated using the LIVA approach. Logic state mapping results, similar to previous work using biased optical beam induced current (OBIC) and laser probing approaches, have also been produced using LIVA. Application of the two LIVA based techniques to backside failure analysis has been demonstrated using an infrared laser source. Optical logic state control is based upon earlier work examining transistor response to photon injection. The physics of each method and their applications for failure analysis are described.<<ETX>>
Bevel RIE application to reduce defectivity in copper BEOL processing
Bevel etch used during wafer fabrication for semiconductor devices is discussed. In this case, the bevel etch process was utilized in middle of the line processing (MOL) to reduce back end of line (BEOL) defectivity. Tungsten and titanium nitride films, from the formation of contacts to the transistors, extend into the bevel region of the wafer and have been shown to initiate arcing. This can spread foreign material defects on the front side of the wafer in various BEOL post processing steps including subsequent reactive ion etching, SEM metrology and film depositions. The bevel etch tool confines a plasma etch to the outer edge of the front side of the wafer (which can be individually adjusted) and can remove dielectric, organic and Ti/TiN/W films using a fluorine based chemistry.