Temperature control with a thermoelectric cooler (TEC) during laser decapsulation of plastic packages
Ablation was carried out on high voltage Schottky rectifiers at 25°C and −5°C (with a thermoelectric cooler or TEC), at 1.0 W and 3.9 W of laser power. In-situ measurement of the reverse current was conducted and correlated to the device junction temperature. It was found that the usage of a TEC increases the number of laser scans to reach the set current compliance of 100 µA after exposing the die, for ablation at 3.9 W, although eventual damage to the device is still unavoidable. The incorporation of a TEC below the sample is also demonstrated to be effective in reducing the device junction temperature during laser ablation.
Laser decapsulation of plastic packages for failure analysis: Process control and artefact investigations
Laser ablation is a recent pre-decapsulation technique, which is used for sample preparation in failure analysis. This process works with speed and accuracy. These are key parameters for getting successful observation and defect localization. This can be used to have a precise opening on the die. However, this technique can create thermal stresses to the device. In order to minimize this stress, we have investigated methods for controlling the thermal effect of the laser on the component. This paper presents the experimental setup and the study of an electrical artefact that influences the interpretation of our thermal data.
A method of investigating fine shorting whiskers within a leadframe molded package
A potential method to investigate fine whiskers which cause electric shorts between adjacent leads in a plastic molded leadframe is discussed. This technique uses mechanical milling and excimer laser etching to expose the fine whiskers within a packaged module. The combination of these two processes enables us to expose the fine whiskers without changing the position or composition. Subsequent material analyses can then be applied, and the process step by which the whisker was introduced can be determined. This method has also been applied in analyzing various soldering levels of a hybrid integrated circuit (IC).