Influence of temperature control limits on passively cooled computing system performance
Passively-cooled electronic systems such as tablet computers and cell phones commonly are thermally limited by the allowable touch temperature of their surfaces. These systems typically cannot cool maximum processor power in steady state and simultaneously meet surface temperature restrictions. The primary surface temperature control method for thin mobile devices is to limit power, typically resulting in lower computing performance. Improved thermal designs allow higher power dissipation and therefore increased computing performance. Thermal and mechanical design engineers typically operate in terms of temperature for a given power, and this is not usually translated to computing performance. It can be difficult to justify a better thermal design if it is not quantified in its utility to the user. This paper quantifies the tradeoffs between thermal solution performance/temperature control limits and computing performance for two tablet computers and one cell phone that all use the same type of SoC processor.
Package level thermal analysis of backside power delivery network (BS-PDN) configurations
This paper presents a thermal modeling analysis of the impact of the introduction of a backside power delivery network (BS-PDN) and assesses the trade-off between the beneficial and detrimental thermal consequences of this BS-PDN. In the BS-PDN concept, the power delivery network is moved to the backside of the chip, which enables enhanced system performance, increased chip-area utilization and reduced fine metal pitch BEOL complexity. The connectivity between the backside metals of the PDN and the transistors is provided by means of micro or nano through-Si vias, which requires an extreme thinning of the Si substrate. The potential self-heating issue due to this substrate thinning is the main thermal concern for the backside PDN concept. This paper focuses on the thermal modeling study for a TSV-last BS-PDN concept, for which the TSVs through the Si substrate are processed in the last step, after the processing of the front-end and power rails. A unit cell thermal finite element model of the via-last BS-PDN test case is used with size dependent thermal properties, derived from dedicated nanoscale Monte Carlo simulations. The simulation studies assess the thermal impact of the Si substrate thickness, the backside metals, and the density of the µTSVs.
Skin cooling and other challenges in future mobile form factor computing devices
In this paper, we describe several of the cooling challenges in the notebook space as well as outline techniques for evaluating the benefit of new thermal technologies. Some of the challenges described in this paper include thermodynamic limits (total heat within the system), skin temperatures, and component temperatures other than the microprocessor. Specifically, in this paper we will describe a new technology for better cooling skins called laminar wall jets. This technology is useful in reducing bottom skin temperatures of notebooks by up to 20%.