The Characteristics of New n-Type Polycrystalline Silicon Thin-Film Transistors Employing Alternating Magnetic-Field-Enhanced Rapid Thermal Annealing
We fabricated a new top-gate n-type depletion-mode polycrystalline silicon (poly-Si) thin-film transistor (TFT) employing alternating magnetic-field-enhanced rapid thermal annealing. An n+ amorphous silicon (n+ a-Si) layer was deposited to improve the contact resistance between the active Si and source/drain (S/D) metal. The proposed process was almost compatible with the widely used hydrogenated amorphous silicon (a-Si:H) TFT fabrication process. This new process offers better uniformity when compared to the conventional laser-crystallized poly-Si TFT process, because it involves nonlaser crystallization. The poly-Si TFT exhibited a threshold voltage (VTH) of -7.99 V at a drain bias of 0.1 V, a field-effect mobility of 7.14 cm2/V ldr s, a subthreshold swing (S) of 0.68 V/dec, and an ON/OFF current ratio of 107. The diffused phosphorous ions (P+ ions) in the channel reduced the VTH and increased the S value.
P‐26: Thermally Annealed Asymmetric‐Offset Polycrystalline Thin Film Transistor with Low Leakage
We have designed and fabricated a new top gate asymmetric offset structured n‐type depletion mode poly‐Si TFT of which the leakage current was considerably reduced due to successful suppression of electric field near the drain region caused by the asymmetric offset structure. The TFT was fabricated on the glass substrate by employing alternating magnetic field enhanced rapid thermal annealing (AMFERTA). The a‐Si and n+ a‐Si layers were deposited successively, and did not use any other ion doping methods. The asymmetric offset structure could be made without additional processes or masks. This new structure suppressed the leakage current to about 86% of non‐offset structured AMFERTA poly‐Si TFT without considerable sacrifice of on current. This suppression method of leakage current can be helpful to remain the good image quality and save the power consumption of AMOLED panels.
Electrical Characteristics of High-Mobility Fine-Grain Poly-Si TFTs from Laser Irradiated Sputter-Deposited Si Film
Electrical characteristics of n-channel fine-grain polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated from a sputter-deposited Si film irradiated with laser light have been measured. The fine-grain poly-Si TFTs have attained a high mobility of 383 cm2/V·s despite a small grain size from 40 nm to several hundred nanometers. The high-mobility fine-grain poly-Si TFTs feature decreases in mobility with gate voltage and decreases in drain current with temperature in a manner similar to single-crystal MOSFETs. They also show a low carrier trap state density Nst at grain boundaries of 5.6×1011 cm-2. High mobility in the poly-Si TFTs is due to a low Nst.