A matched expansion probe card for high temperature LSI testing
This paper describes the fabrication process and mechanical properties of a novel probe card were described. To match the thermal expansion between the probe card and a silicon wafer in wafer-level burn-in test, a Pyrex glass substrate with feedthrough connections was used to support the probes. To make the slantwise probe contactors, spray coating was used to form a uniform photoresist film on a deeply-wet-etched silicon wafer. The fabricated probe card has 13185 p/sup +/ silicon probe contactors at a pitch of 150 /spl mu/m on an area of 44.0 mm /spl times/ 45.7 mm. The rigidity of the probes is approximately 91.45 N/m. The planarity of the probe tips is within /spl plusmn/ 1 /spl mu/m from the base level.
An integrated electroless nickel plating process for fabrication of CMOS-MEMS probe chip
This study designs a CMOS-MEMS probe chip and fabricates it using the [email protected] CMOS process of the Taiwan Semiconductor Manufacturing Company (TSMC). The post-CMOS procedure is a Micro-electromechanical system (MEMS) technology that involves steps such as lithography, electroless nickel (EN) plating, grinding and dry etching. The probe chip has a through-silicon-via (TSV) package structure combination with the multi-layer interconnections within CMOS processes, which simplifies the wiring layout and improves the connectivity between the probe heads and external devices. In addition, passive components or circuits are inherently integrated with CMOS chips to increase the frequency bandwidth and measurement quality. Finite element analysis is used to design the probe shape and the LIGA-like thick photoresist process using EN plating techniques is used to fabricate the probes. The Ni-P alloy is applied to the probe to thicken and strengthen the cantilever part of the probe. The different deposition areas for several types of cantilever probes on the same chip fabricated by EN plating using different growth rates result in unequal probe heights. Therefore, polishing each plated layer of the probe is a necessary step to guarantee the co-planar surfaces. Finally, the probe structures are suspended using dry etching (RIE, ICP-RIE) and the probe cantilevers have no warp.
A wafer-level burn-in technology using the contactor controlled thermal expansion
A new wafer-level burn-in (WLBI) technology is reported in this paper. By this, firm contacts on 2,756 bond pads provided on a 6" diameter wafer are made in a temperature range from room to 125/spl deg/C. In order to establish the contacts, a polyimide membrane with nickel bumps (ASMAT/sup (R/) manufactured by Nitto Denko Corp.) is used The polyimide membrane is fixed on a ring of ceramic having a thermal expansion coefficient similar to the silicon substrate so the entire membrane tracks the silicon during thermal changes. The other feature is the use of localized pressure-sensitive conductive rubber (PCR/sup TM/ manufactured by Japan Synthetic Rubber Co. Ltd.) establishing connections between the bumps provided on the polyimide membrane and the wiring substrate. The atmospheric pressure in the space between the bumps and the wafer is decreased in order to apply a uniform pressure in-between. By this, problems such as the thermal expansion difference and the thermal shrinkage of polyimide membrane are solved simultaneously. In addition to these, problems of the deviations of bump heights (/spl plusmn/3 /spl mu/m) and the warp of the wiring substrate (/spl plusmn/6 /spl mu/m) are solved by the use of localized pressure sensitive conductive rubber. This leads to a realization of a cost effective and reliable WLBI.