A simple Flash memory cell model for transient circuit simulation
A simple Flash memory cell model for circuit simulation is presented. The proposed model gives an excellent fitting of dc and transient data and does not require additional simulation time comparing with that of a MOSFET transistor. Effective control-gate voltage method and ideal current-mirror technique are introduced to calculate floating-gate voltage. These allow macro modeling of a Flash memory cell in a circuit simulator.
Bias and W/L dependence of capacitive coupling coefficients in floating gate memory cells
In this paper, a complete study of capacitive coupling coefficients dependence on bias and W/L will be presented, including a review on classic methods to extract their value from electrical characterization. Capacitive coupling ratios have been usually adopted to model floating gate (FG) memory cells, in particular to deduce the value of FG potential. Now they re determined by means of a new model (recently proposed in the literature), starting from a new procedure to evaluate the FG potential. Results obtained with the new model will be compared to classic values. Particularly, their bias dependence (during write/read/erase of Flash memory cells) will be deeply investigated, thus demonstrating the limits of considering them constants, as is usually done. by analyzing their W/L dependence, we will deduce useful information on the effects of scaling and the role played by fringing capacitances. The most important methods reported in the literature to estimate the control gate and drain capacitive coupling ratios will be accurately reviewed, thus showing that such procedures are often cumbersome and inaccurate. It is worth noting that for the first time, /spl alpha//sub B/ and /spl alpha//sub S/ will be studied in detail.
New approach to vision-based BGA package inspection
Ball grid array (BGA) techniques have developed very fast due to the advantages of more I/O ports, small size, and so on. In this paper, a vision-based algorithm for BGA package inspection is proposed to accurately estimate center and diameters of solder-balls of BGA packages, so that defects of BGA packages, such as missing or extra balls, oversize or undersize balls, over-height or under-height balls, and pitch can be detected for ensuring the quality of BGA packages.