Improving Three-Dimensional Semiconductor Modeling through Layout and Process Flow Analysis
Constructive Solid Geometry (CSG) is a solid modeling technique widely used for the design of semiconductor devices. With the simulation domain subdivision algorithm presented in this paper, the minimal number of solid modeling operations is required in order to build a three-dimensional (3D) device structure. The algorithm is based on a drawing method which combines information on photolithographic masks into a color raster. In this way, solid modeling operations are performed only once on regions having the same color.
Multi-Dimensional TCAD: The PROMPT/DESSIS Approach
Designing new semiconductor devices for very large scale integrated circuits (VLSI) requires intensive use of process and device simulation tools to reduce development costs. However, valid device simulation results can only be achieved when a high geometrical modeling precision has been reached during the process simulation phase. Accurate finite element simulators embedded in a multi-dimensional process simulation environment help to fulfill this quality requirement. Since general-purpose three-dimensional (3D) process simulators are not yet available, a modern design environment combines solid modeling techniques with one-dimensional (1D) and two-dimensional (2D) finite element simulators. In this article we present a consistent and integrated process simulation environment that eases the characterization and optimization of semiconductor devices. The straightforward modeling in all three dimensions of an EEPROM cell illustrates the presented approach.
Fully Integrated Bidirectional CMOS-MEMS Flow Sensor With Low Power Pulse Operation
Leveraging More-than-Moore technology, we demonstrate an integrated CMOS MEMS flow sensor via a very compact system on chip (SoC) that can sense the bidirectional N2 gas flow. Our SoC features a very low-noise instrumentation amplifier that is implemented on a CMOS wafer and serves as a readout integrated circuit for a thermoresistive micro-calorimetric flow sensor which is fabricated on a MEMS wafer. A compact heterogeneous integration is achieved by combining the two wafers via the proprietary InvenSense AlN process. The measured sensitivity of our CMOS MEMS flow sensor is 98 mV/sccm which is three times better than the state-of-the-art counterpart. The flow range measured by our SoC is from −26 to 26 m/s (from −50 to 50 sccm). Moreover, the pulsed heater operation makes this proposed SoC flow sensor a very low power (<9 mW) and, thus, a promising candidate for the Internet-of-Things applications in smart home/green buildings.