Effect of sleeve length on deformation properties of grouted splices
Tests on 12 grouted splices were performed to investigate their deformation properties under tensile loading. Test variables included diameter and type of spliced bars and the size of splicing sleeves. Finite element method based models of the splices were built, verified and used to investigate the effect of sleeve length on the deformation properties of the grouted splices. The sleeve length significantly affected the failure modes and further affected the splices’ deformation properties. A recommendation was proposed to maximize deformation properties of a specific splice by using a critical sleeve length associated with failure mode of bar fracture.
Analysis of spiral reinforcement in grouted pipe splice connectors
Tensile resistance of a grouted splice connector depends on the interaction between reinforcement bars, sleeve and grout. Results for 21 grouted splice connectors which were tested until failure under an increasing axial load are presented in the paper. Each splice connector consisted of a steel pipe, steel spiral with vertical bars, and cement grout. The effects of spiral pitch distance of 15, 25 and 35 mm on the bond stress to slip relationship were evaluated. The best performance of grouted pipe splice connectors was obtained at the spiral pitch distance of 15mm, combined with the use of four vertical bars as shear keys.
Ultrathin Wafer Pre-Assembly and Assembly Process Technologies: A Review
Ultrathin silicon wafer technology is reviewed in terms of the semiconductor applications, critical challenges, and wafer pre-assembly and assembly process technologies and their underlying mechanisms. Mechanical backgrinding has been the standard process for wafer thinning in the semiconductor industry owing to its low cost and productivity. As the thickness requirement of wafers is reduced to below 100 μm, many challenges are being faced due to wafer/die bow, mechanical strength, wafer handling, total thickness variation (TTV), dicing, and packaging assembly. Various ultrathin wafer processing and assembly technologies have been developed to address these challenges. These include wafer carrier systems to handle ultrathin wafers; backgrinding subsurface damage and surface roughness reduction, and post-grinding treatment to increase wafer/die strength; improved wafer carrier flatness and backgrinding auto-TTV control to improve TTV; wafer dicing technologies to reduce die sidewall damage to increase die strength; and assembly methods for die pick-up, die transfer, die attachment, and wire bonding. Where applicable, current process issues and limitations, and future work needed are highlighted.