The use of the direct impact Hopkinson pressure bar technique to describe thermally activated and viscous regimes of metallic materials
The influence of strain rate over domains involving the thermal activation and the viscous drag behaviour of the dislocations is discussed. While it is recognized that the Koslky–Hopkinson technique or split Hopkinson pressure bar technique can generate data up to the upper strain-rate limit of the thermal-activated regime, it is necessary to use a direct impact Hopkinson pressure bar technique to access the viscous regime. Data generated with this technique are presented for a series of metals, including steel, nickel, copper and tungsten alloys. The motivation to generate such data is provided through three industrial applications.
Constitutive Equations of Yield Stress Sensitivity to Strain Rate of Metals: A Comparative Study
Several constitutive equations have proposed to model the strain rate sensitivity of metals to strain rate. This paper presents a comparative of six equations reported in the open literature. All equations are used to fit the yield stress of three copper materials and one steel material at two different temperatures. A specific cost function and an optimization problem are defined. The authors recommend the use of the Cowper-Symonds equation or a modified-Eyring equation as both of them fit well the experimental data while using only three material constants. A modified flow stress Johnson-Cook equation is then proposed for metallic materials.
Design of a low power viterbi decoder for wireless communication applications
In this paper, a novel low-power Viterbi decoder with soft decision is proposed. For the branch metric of the Viterbi decoder, our design employs a soft-decision method to improve its correction capability. In order to find the survivor path efficiently, we modify the classical Viterbi decoding algorithm into a new one. This new algorithm is similar to the register-exchange method with lower latency, but using RAM instead of register banks for recording the output bit-stream of the survivor path. Hence, our design can provide a low-power design. Finally, the chip of this design consumes about 28.6K gates using TSMC 0.18 μm CMOS technology. The power consumption of our chip is about 19.5mW at 100MHz.