Study of the packaging effect on blocking voltage of power devices during durability test
We investigated why the blocking voltages of a power device are lowered during a durability test through a device simulation called Technology Computer Aided Design (TCAD) and measurements using the optical beam induced current (OBIC) method. We found that the spread of the depletion layer caused by the bonding wire is what decreased the blocking voltage.
An analytic approach for optimal field ring spacing of a diode under punchthrough operation
The use of floating field limiting ring (FFRL) reduces the surface field due to junction curvature effect, and the breakdown voltage in planar devices can be increased. In this paper, a new analytic method is developed based on the combination of plane junction in the bulk and cylindrical junction at the surface. From these analysis, optimal space between main diffusion and FFLR can be obtained. The influences of concentration and width of lightly doped collector region and base diffusion junction depth are also investigated. The results are in good agreement with the two-dimensional numerical ones.
Shielding region effects on a trench gate IGBT
In this paper we introduced the shielding region concept in order to relieve the electric field concentrated on the trench bottom corner. The shielded trench gate insulated gate bipolar transistor (IGBT) is a trench gate IGBT with a P+shielding region located in the bottom of a trench gate. By simulation results, we verified that a shielding region reduced the electric fields not only in the gate oxide but also in the P-base region. Compared with conventional trench gate IGBT, about 33% increment of forward breakdown voltages are achieved, but little forward voltage drop, which causes on-state loss to be increased by about 0.06V in the shielded trench gate IGBT.