Device-mismatch-insensitive current divider
In this paper, a new iterative process for current division is presented and a circuit implementing the process proposed. In this process, each iteration consists of two phases and each phase involves only one signal sampling. By means of this process, the accuracy of the current division is made insensitive to the device mismatch. The circuit implementing the process is simple and the step of adjustment per iteration is variable, so that an accurate adjustment can quickly be reached after a few iterations. Also, in this circuit, the effect of the switching noise is reduced by applying a simple and effective technique.
Very accurate current divider
This letter presents a new current divider principle based on CMOS dynamic current sources. The proposed method is characterised by very accurate current division without any matching requirements or component trimmings. Among the different applications of this new principle, the D/A conversion field is probably the most important.
Novel CMOS pipelined A/D convertor architecture using current mirrors
A novel current source-based CMOS pipelined A/D convertor architecture is presented. Compared to previous switched-capacitor realisations, the proposed architecture offers significant advantages in terms of power consumption, accuracy, simplicity and silicon area.