Watermark induced High Density Via failures in sub micron CMOS fabrication
High via resistance was detected in the high density via structure in our 0.15 mum BEOL (Back-End-Of-Line) yield monitoring test vehicle. A localized insulating layer was found on top of plug in test vehicle causing high via resistance. The failure was attributed to watermark induced contaminants on top of the W plug. It was shown that the failure could be avoided by eliminating watermark formation on the wafer in the post CMP cleaning process.
Failure rate and yield-limiting tungsten plug corrosion diagnosis using characterization test vehicles
Electrical microprobe and Passive Voltage Contrast (PVC) techniques were used to investigate incompletely filled contacts and vias on our 0.20 um FEOL (Front-End-Of-Line) characterization and process qualification vehicles. The failure mechanism of unfilled tungsten plugs was attributed to electrochemical corrosion during the post-metal etch solvent strip. This tungsten plug corrosion led to high contact and via failure rates, failure of the yield impact prediction model, electromigration test failure, and 3% to 6% yield loss at final test. Several detailed experiments were performed towards identifying and resolving this corrosion plug failure mechanism. It was found that modification of the Tungsten CMP buff significantly reduced the failure rate and led to increased probe yield with improved manufacturability.
Handbook of Concrete Engineering
Handbook of concrete engineering , Handbook of concrete engineering , مرکز فناوری اطلاعات و اطلاع رسانی کشاورزی