Phase and delay in corporate-fed arrays
The distribution of phase and delay in corporate-fed phased arrays is examined. RMS phase errors versus scan angle are shown for digital phasers. The phaser bits should all be located at each element. The delayer bits can be also, but delayer loss, dispersion, temperature sensitivity, and size mitigate against using so many delayers. Alternative topologies, where delay bits are distributed in the corporate feed, are examined.
Tradeoffs in the placement of time delay in a large, wideband antenna array
Time delay units are needed in large, wideband arrays that scan to angles far from boresight. The time delay consists of many different sizes of transmission line lengths that incrementally increase the signal path length. This paper shows the trade-offs between cost and performance in the placement of the time delay in a corporate feed.
A comparison of methods for randomizing phase quantization errors in phased arrays
Beamsteering for phased arrays normally employs electronically switchable digital phase shifters. These can only approximate to the desired phase distribution across the array, and if a straightforward rounding off is used, a periodic phase error arises which causes a pointing deviation of the main beam and introduces a parasitic sidelobe. Various methods have been given in the literature for randomizing the phase errors to reduce these problems. Here a general formula is derived to evaluate the parasitic sidelobe level for different methods. The various methods are compared with reference to 1) the parasitic sidelobe level, 2) the variances of the field pattern and the pointing direction, 3) gain reduction, and 4) any extra array hardware requirements and beamsteering unit resources.