A ug 2 00 5 The ATLAS Pixel Detector
The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical modules, arranged in three barrels concentric wi th the beam line and centered on the interaction point and three dis ks on either side for the forward region. The position of the Pixel Detector near the interaction point requires excellent radiation hardness, mechanical and the rmal robustness and good long-term stability, all combined witha low material budget. The detector layout, results from production modules and the status of assembly are presented.
MCC: The Module Controller Chip for the ATLAS pixel detector
In this article we describe the architecture of the Module Controller Chip for the ATLAS Pixel Detector. The project started in 1997 with the definition of the system specifications. A first fully-working rad-soft prototype was designed in 1998, while a radiation hard version was submitted in 2000. The 1998 version was used to build pixel detector modules. Results from those modules and from the simulated performance in ATLAS are reported. In the article we also describe the hardware/software tools developed to test the MCC performance at the LHC event rate.
The ATLAS Pixel Detector electronics
Abstract The ATLAS Pixel Detector readout electronics has been designed to extract the signal of the passage of ionizing particle from over 45 000 diodes that form the ATLAS Pixel Detector module and to cope with both the very high data rate expected in the LHC environment and the trigger requirements in the ATLAS detector. The on-detector electronics must supply early data sparsification and reduction as well as local memory and derandomizing buffers. The readout functionality has been distributed over a two-level readout architecture. A description of the module readout architecture and an overview of the prototype results are reported.