A high speed 16 kbit ECL RAM
A 16384 /spl times/ 1 bit ECL RAM (emitter coupled logic random access memory) with an access time of 15 ns and a power dissipation of 700 mW has been developed. The high packing density and performance were achieved by using a p-n-p load cell, a novel ECL circuit, and U-groove isolation. The test results proved that a p-n-p load cell is very effective in producing a fast high-density bipolar RAM having a capacity of over 64 Kbits.
An isolation technology for high performance bipolar memories &#8212; IOP-II
An isolation technology for high performance bipolar memories has been developed. This process is called IOP-II (Isolation with Oxide and Poly-silicon), which uses steep silicon U-groove for isolation instead of conventional IOP's V-groove. In order to investigate the applicability of this technology, a conventional 1 K-bit ECL RAM is scaled down at ratios of 0.8, 0.7 and 0.6 using IOP-II. They show good isolation characteristics and improved access times of 5.8ns, 4.8ns and 4.4ns, respectively, while that of conventional one is 7.4ns. IOP-II has made it possible to develop a high speed and density 16 K-bit RAM with 15ns access time. A 3-µm wide and 5-µm deep isolation is used. One bit memory cell size is 750µm and minimum emitter size 1.5×3µm2.
Perspective of scaled bipolar devices
To predict the performance of future bipolar VLSIs, practical 2-dimensional device simulator has been developed, in which bandgap narrowing and Auger recombination at high impurity concentration are taken into consideration, and in which the conductivity modulation caused by excess minority carriers is modelled analytically. Procedure for optimizing the vertical transistor structures is described in terms of breakdown voltage. Relation between base impurity concentration and base width to give a necessary breakdown voltage is obtained from the numerical analysis including statistical doping fluctuations. According to the simulation of ECL circuit with 3V power supply, less than 100pS per gate is achievable when the device is scaled down to 0.5µm emitter stripe width and 0.056µm base width. It is concluded that the performance of submicron bipolar devices is enough competitive with that of GaAs MESFET devices.