Simulations of consecutive diffusion process
Process simulation based on virtual reality can comprehensively present the real process on the computer. It can play an important role in the development and manufacturing field of diffusion furnace. This paper researches the establishment of consecutive diffusion process and the key techniques of process simulation. In the process of creating process simulation, V code would be created to control motion of each part. A simulation that reflects on the real process could be acquired with this research. This process simulation not only shortens the development time of diffusion furnace, but also makes designer have a perspective to the defects of product in the design process. It promotes the effective of design, and reduces changes in later period of design.
Optimization of diffusion furnace loading based on substrate and recipe selection
Traditional furnace batching in semiconductor manufacturing considers trade offs between wait-to-batch time and processing time to determine cycle reductions afforded by batching. An interesting aspect of this problem is the creation of potential batching opportunities through the appropriate insertion of substrates at the start of the line. In this paper we present a Mixed Integer Programming model as a decision support tool to provide substrate selection recommendations based on wafer start requirements with the objective of maximizing batching opportunities in the diffusion furnace, with consequent reductions in the furnace loading. Our MIP model takes into account the exclusivity requirements and aid the substrate material and recipe selection process for weekly starts in the Fab. We have achieved a 10% improvement in the overall furnace loading.
Minimizing total weighted tardiness on a single batch process machine with incompatible job families
The diffusion step in semiconductor wafer fabrication is very time consuming, compared to other steps in the process, and performance in this area has a significant impact on overall factory performance. Diffusion furnaces are able to process multiple lots of similar wafers at a time, and are therefore appropriately modeled as batch processing machines with incompatible job families. Due to the importance of on-time delivery in semiconductor manufacturing, we focus on minimizing the total weighted tardiness in this environment. The resulting problem is NP-Hard, and we decompose it into two sequential decision problems: assigning lots to batches followed by sequencing the batches. We develop several heuristics for these subproblems and test their performance.