Improvement of preferred orientation of NiAl/CrMn underlayers deposited on prebaked tape substrates
It was observed that the coercivity of CoCrPt films deposited on a polyimide tape was much lower than the coercivity deposited on a rigid glass substrate under identical conditions. X-ray diffraction showed that the desirable (112) and (110) texture of the NiAl/CrMn underlayers on the tape substrate was severely degraded during the deposition process. This resulted in the destruction of (10.0) growth texture of CoCrPt films and a significant reduction of magnetic coercivity. However, degassing of the tape substrate under vacuum before deposition significantly enhanced the magnetic properties. The coercivity of the film reached 170 kA/m which is near that achieved on a glass substrate. Auger analysis also revealed that oxygen was present in the NiAl/CrMn underlayers deposited without degassing the tape substrate.
Magnetron sputtering of cocr/cr and cocata/cr on flexible substrates
In this paper a new method is developed to deposit magnetic films on flexible substrates. The magnetron sputter process commonly used in hard disk technology is adapted to the specific needs of flexible substrates. By using a higher sputter pressure and no substrate heating the problem of substrate stress or deformation is solved. The influence of all major sputter parameters is discussed in this article. All samples mere characterized by magnetic measurements [hysteresis curve (H/sub c/, M/sub r/, M/sub s/), remanence and /spl delta/M measurements], and by XRD and AFM.
Design of a low power viterbi decoder for wireless communication applications
In this paper, a novel low-power Viterbi decoder with soft decision is proposed. For the branch metric of the Viterbi decoder, our design employs a soft-decision method to improve its correction capability. In order to find the survivor path efficiently, we modify the classical Viterbi decoding algorithm into a new one. This new algorithm is similar to the register-exchange method with lower latency, but using RAM instead of register banks for recording the output bit-stream of the survivor path. Hence, our design can provide a low-power design. Finally, the chip of this design consumes about 28.6K gates using TSMC 0.18 μm CMOS technology. The power consumption of our chip is about 19.5mW at 100MHz.