Quasistatic Bubble Propagation in 1.5 μm Period Ion-Implanted Tracks for 64 Mbit Magnetic Bubble Memory Devices
Ion-implanted tracks with a 1.5 μm period for use in 64 Mbit magnetic bubble memory devices have been fabricated and operated. The bubble material used was (BiSmLu)3 (FeAl)5O12 garnet film, supporting 0.45 μm bubbles. The resist mask patterns for implantation were formed using a 1/10 reduction projection aligner, using rectangular patterns on a reticle. The bubble propagation tracks were fabricated by double deuterium implantation and annealed at 400°C for 30 minutes, with an SiO2 layer deposited on the garnet surface to stabilize the implanted layer. An operating bias field margin in excess of 7% was stably obtained in quasistatic bubble propagation. This shows that the ion-implanted devices have great potential for use in 64 Mbit magnetic bubble memory devices.
Ion-implanted and permalloy hybrid magnetic bubble memory devices
Hybrid bubble memory devices have been proposed and operated with the memory density of 4 Mbit/cm2. In the hybrid bubble memory devices, minor loops are composed of ion-implanted tracks with 4-µm period, and major lines and functional parts including block-replicate and swap gates are composed of Permalloy tracks with a longer period of 12 µm. Passive junctions between ion-implanted and Permalloy tracks have been developed, introducing the tapered ion-implantation technique. Improving the characteristics of the functional parts composed of Permalloy tracks, the hybrid bubble memory devices with block-replicate and swap gates have been operated, and the feasibility of the devices has been confirmed. In addition, the possibility of higher memory density has been shown.
Passive swap gate designs for contiguous disk bubble devices
The designs of two novel passive swap gates for contiguous disk devices are described. The data swap is activated by temporary reversal of the drive field rotation direction. Two buffer loops with four merge gates are Combined to form a synchronous swap (true swap) gate. This approach resolves the data overlapping problem and allows flexibility for the matching of the data paths. The structure is sufficiently simple so that it can be used for block swap operation. However, to swap the complete data on the major loop section this arrangement requires two sets of reverse-forward field rotations. For an asychronous block swap operation, a single buffer loop with three merge gates (per swap gate) can be used. Only one set of reverse-forward rotations is required to achieve a complete swap. In this case, the block of data that transfers out is shifted by a fixed bit length.