The Comparative Study to Enhance Board Level Reliability Performance of Wafer Level Package At 0.25 mm Pitch Using Micro-Ball Drop and Electroplated Solder Technology
In this study, the board level reliability of WLP at 0.25mm pitch has been evaluated by employing board level reliability test following JEDEC include thermal cycling, drop shock and cyclic 4-point bend tests to verify the performance of shrunk bump size. The WLP test vehicle has been designed with 4-layer stack up structure, 4.0 × 4.0 mm die size and 15 × 15 ball array. The shrunk bumps of test vehicles were formed by using micro-ball drop and electroplated lead free solder bumping process after UBM plating completed. The shrunk bump size in WLP at 0.25mm ball pitch will enhance the risk of board level solder joint fatigue due to lower standoff height and smaller diameter of solder joint (higher bump stress concentration). In this work, we also evaluated different 4-layer WLP stack up structures for key design parameters including polyimide, RDL and UBM layers to reduce solder joint stress and thus enhance BLR performance All the study legs passed drop test with the 1st fail >100 drops and passed 200K times cyclic bend test without any failure. The TCT performance of micro-ball drop bumped legs showed better results with 1st fail passed 500X cycles. The drop, bend test and TCT performance are improved by new bump stack-up designs.
Studying the Effect of Stackup Structure of Large Die Size Fan-In Wafer Level Package at 0.35 mm Pitch With Varying Ball Alloy to Enhance Board Level Reliability Performance
In this study a four-layer fan-in wafer level package (WLP) structure (two passivation layers, one redistribution metal layer (RDL) and one under bump metallurgy layer (UBM) with die size 8 × 8 mm2 and ball pitch 0.35 mm is used for board level reliability (BLR) evaluation. The solder joint stress during BLR tests are highly related to the structure and solder ball alloy used in WLP bumping process based on simulation input. In this work, we evaluated different WLP structures with different stackup thickness including passivation layers, RDL layer, UBM layer and different solder ball alloy to reduce solder joint stress and thus enhance BLR performance. Besides, the impact of different die thickness post wafer grinding process was also included. All the different WLP structures have been evaluated by employing board level reliability test following JEDEC include thermal cycling test, drop test and cyclic 4-point bend test. From this work, an improved fan-in WLP stackup structure was demonstrated to pass board level TCT 500 cycles (include both corner chain balls/non-corner chain balls), drop test 150 times and cyclic bend test 200,000 cycles without any failure for 8× 8 mm2 die size at 0.35 mm pitch with doped SAC405 alloy.
Reliability evaluation and structure design optimization of Wafer Level Chip Scale Packaging (WLCSP)
In this study a WLCSP structure in microelectronic application is considered. In the current development of WLCSP solder post is used to bridge the die and solder bump to release part of the stress concentration caused by mismatch of Thermal Expansion Coefficient (CTE). Thermal cycle reliability analysis on solder joints with 3D finite element simulation is firstly carried out. The stress/creep strain distribution and evolution are analyzed and the fatigue lives of solder joints are estimated. Finite element model is also verified and the fatigue property of currently used solder is determined with JEDEC thermal cycle reliability test. Structure design optimization is thereafter performed to improve the reliability of WLCSP. Parametric studies on the geometry structures are carried out, such as die thickness, solder post height and solder bump diameter, etc. The results show that solder post does great help to improve the solder bumpspsila reliability, the height of which plays an important role in controlling the fatigue life of the package. Higher post helps to release the stress concentration and therefore extend the fatigue life of solder bumps. In addition, die thickness plays the most important role in affecting fatigue life of solder joints. The thinner the die, the better the reliability of WLCSP is. Other parameters, such as the diameter of the solder bump, only have tiny effect on the solder joints reliability of WLCSP.