A low-power third-order ΔΣ modulator using a single operational amplifier
An architecture for low-power ΔΣ modulators suitable for high-resolution portable sensor systems is presented. The circuit uses a single operational amplifier to achieve a third-order noise shaping. The two-stage op-amp employs a boosting technique that increases by 5 the slew-rate. The circuit, simulated at the transistor level using a conventional 0.18-µm CMOS technology, obtains a peak SNDR of 88 dB over an input signal bandwidth of 100 kHz. The simulated power consumption is 125 µW with a 1.5-V supply voltage. The achieved Figure of Merit (FoM) is 31 fJ/conversion-level.
Noise-shaped multbit D/A convertor employing unit elements
By appropriately selecting the elements used to form each output sample of a multibit digital-to-analogue convertor, the spectrum of the error caused by element mismatch can be noise-shaped. Simulations indicate that first-order, second-order and bandpass noise-shaping are all possible. The technique enables the use of multibit feedback in delta-sigma A/D and D/A convertors.
An empirical study of high-order single-bit delta-sigma modulators
Computer simulations are used to determine the stability limits of single-bit delta-sigma modulators up to order 8. It is found that none of the existing criteria for stability are adequate for design. Plots of the maximum signal-to-noise ratio (SNR) achievable with a given modulator order and oversampling ratio (OSR) are presented. These graphs can be used to determine the modulator order and OSR required to achieve a given SNR or to check the tightness of (as yet unavailable) theoretical bounds. >