The Universal Space Transponder: A next generation software defined radio
The Universal Space Transponder (UST) is a next generation transponder developed at the Jet Propulsion Laboratory to meet a large variety of telecom, navigation, and radio science needs for future deep-space and near-Earth missions. This paper details the UST software defined radio design and describes how the combination of a modular hardware architecture and in-flight reprogrammability enables a new level of flexibility and expandability for a space transponder. The UST uses common power and digital processing assemblies that can be integrated with a variety of RF modules and is capable of simultaneous, multiband operations with data rates up to 37.5 Mbps RX and 300 Mbps TX. This allows a single radio to support all the direct-to-Earth and relay communication requirements for even complex mission scenarios, reducing the total cost, mass, and power. The discussion includes a description of the current UST engineering models that have been built and tested, as well as details about the next generation capabilities supported by UST, including advanced link coding and modulation, radiometric techniques, and in-radio protocol handling. Details are also presented on RF modules and digital processing in development for radio science and astronomy purposes, including a bistatic radar receiver and broadband planetary emissions receiver. These will demonstrate the ability to integrate low-cost science instruments into the UST architecture, further expanding the versatility of the UST.
Multiuser Receiver Architectures for Space Modems
The research described in this publication was carried out by the Jet Propulsion Laboratory, California Institute of Technology, under a contract with the National Aeronautics and Space Administration. © 2014 California Institute of Technology. U.S. Government sponsorship acknowledged. abstract. — In this article, we develop multiuser modem architectures suitable for augmentation of existing software-defined flight radios with important near-term enhancements to relay telecom services as well as support for missions requiring entry, descent, and landing (EDL). EDL support for missions like Mars Exploration Rover (MER), Phoenix, Mars Science Laboratory (MSL), and Mars 2020 obtains strong visibility within JPL and NASA headquarters. As part of an agency-wide commitment to support EDL, funding has been made available on past missions to prepare multiple Deep Space Network (DSN) ground station sites, non-DSN ground stations (Greenbank 100-m), and to prioritize in situ coverage from multiple orbiters. Multiuser operations open up new possibilities for simultaneous support of multiple surface landers that are in close proximity such that these surface elements simultaneously appear in the same coverage circle of a single relay orbiter. Simultaneous multiuser support is an important service type for many future surface mission paradigms. In this article, designs for field-programmable gate array (FPGA) implementation of multiuser modems are presented. A fixed-point model of the most promising architecture for space applications is presented as well as simulated performance results based on a fixed-point design that is suitable for FPGA implementation.
An All-Digital, High Data-Rate Parallel Receiver
The all-digital, high data-rate parallel receiver that is currently being developed jointly by the Jet Propulsion Laboratory (JPL) and Goddard Space Flight Center (GSFC) is presented. The role of JPL has been to analyze and simulate the receiver architecture and subsystems. Implementation of the receiver using fieldprogrammable gate arrays (FPGAs) and subsequent application-specific integrated circuit (ASIC) design take place at GSFC. The parallel receiver architecture that is currently being implemented differs from the original multirate filter-bank-based parallel architecture that was first developed by JPL. This alternate parallel receiver (APRX) is essentially a frequency-domain implementation of detection filtering and symbol-timing correction and is significantly easier to implement than the original version of the parallel receiver (PRX). It is shown that the APRX is equivalent to both the PRX and the conventional serial receiver in terms of performance. Results on the effect of analog antialiasing filter bandwidth and analog-to-digital sampling offset on the receiver performance are presented, along with discussion and results of the frequency-domain digital data-transition tracking-loop simulation.