Bias Stress Induced Conduction Mechanism Evolution in Silica Based Inter-Metal Dielectrics
The real-time conduction mechanism evolution during bias stress of three silica based inter-metal dielectrics in Cu damascene structures was investigated. Capacitance measurements at 1 MHz and I-V measurements were intermittently inserted into the process of bias stress to monitor the conduction mechanism evolution with time. All experiments show that the capacitance is constant and the I-V curve slope decreases with bias stress and converges to the half of the initial value. Based on these findings, we conclude that the conduction mechanism changes from a normal Frenkel-Poole emission to an "abnormal" Frenkel-Poole emission with bias stress
Time-Dependent Dielectric-Constant Increase Reliability Issue for Low Dielectric-Constant Materials
The stability of low dielectric-constant (low-k) materials during electric-field stress was studied. The dielectric constants (k-values) were found to increase sharply under bias-temperature stress. This time-dependent dielectric-constant increase (TDDI) was estimated for a practical operating condition by extrapolation. The extrapolated TDDI lifetimes and k-value increases for tested materials (k = 2.3-3.2) ranged from 30 days to 1,000 years and from 0 to 23%, respectively. Considering the estimated TDDI, new criteria for reliable low-k materials are proposed. The criteria were used successfully to identify those low-k materials that show high stability during electric-field stress.
Effect of electrode microstructure on leakage current in lead-lanthanum-zirconate-titanate multilayer capacitors
Lead–lanthanum–zirconate–titanate (PLZT) multilayer capacitors involving platinum bottom electrodes have been fabricated on a silicon nitride/silicon (SiN/Si) substrate system. Leakage current characteristics show strong dependence on the processing temperature of the bottom electrode. A drop in leakage current by five orders of magnitude has been observed for capacitor with platinum electrode deposited at room temperature. Scanning tunneling microscopy (STM) studies reveal significant differences in the microstructure of platinum films deposited at different substrate temperatures. Based on STM results, a correlation between the microstructure of the bottom electrode, space layer at PLZT/Pt interface, and the nucleation of PLZT has been suggested to explain this new observation.