Device-mismatch-insensitive current divider
In this paper, a new iterative process for current division is presented and a circuit implementing the process proposed. In this process, each iteration consists of two phases and each phase involves only one signal sampling. By means of this process, the accuracy of the current division is made insensitive to the device mismatch. The circuit implementing the process is simple and the step of adjustment per iteration is variable, so that an accurate adjustment can quickly be reached after a few iterations. Also, in this circuit, the effect of the switching noise is reduced by applying a simple and effective technique.
Very accurate current divider
This letter presents a new current divider principle based on CMOS dynamic current sources. The proposed method is characterised by very accurate current division without any matching requirements or component trimmings. Among the different applications of this new principle, the D/A conversion field is probably the most important.
Very low charge injection switched-current memory cell
A new switched-current memory cell is proposed which achieves very low charge injection errors. The technique virtually eliminates the signal-dependent error, leaving only an offset which is cancelled using either dummy switches or a fully differential configuration. The improved memory cell was designed using a standard 3.3 V, 0.8 /spl mu/m CMOS digital process. Simulation results demonstrate that the signal-dependent charge injection error is lowered by as much as two orders of magnitude.