Multi-phase-driven split-word-line ferroelectric memory without plate line
A working methodology bypasses the conventional cell plate line (PL), mitigating its disadvantages. The methodology utilizes split word lines (SWLs), driven by multi-phased voltage signals. In this scheme there is no need for PL and additional elements, and fabrication is simple and compatible with downscaling of cell area.
A NOVEL SCHEME OF CROSS BITLINES FOR FeRAM ARRAY
ABSTRACT Distinguished from conventional FeRAM array that has one dimension of bitlines distribution, novel cross bitlines scheme of FeRAM array proposed achieves two dimensions of bitlines distribution and two-dimension access for data in memory array. The drive for memory array can be achieved by more small drivers placed around the memory array in the scheme proposed, which will realize lower total power consumption from all the drivers of memory array. Four cells are accessed at the same time when both a row control-line and a column control-line are activated. The tradeoff among low power consumption, low disturbance to unaccessed cells and high access efficiency can be achieved in the scheme proposed. The scheme can be realized at the device level by multi-level interconnection process and plug structure because of lines placed crosswise, which needs superior fabrication methods and technology.
Adrenocorticotropin insensitivity syndromes.
I. Introduction II. Familial Glucocorticoid Deficiency A. Clinical presentation B. Investigation C. Treatment D. Pathogenesis III. Triple A Syndrome A. Clinical features B. Treatment C. Pathogenesis D. Mapping of triple A syndrome gene E. Candidate genes IV. Acquired ACTH Resistance V. Conclusions