The Integration of Cultural Considerations in EU Law and Policies
Drawing on a series of EC policy areas that possess a cultural component, this book offers an encompassing and in-depth analysis of the integration of cultural considerations in EC law and action, assessing the impact of Article 151(4) EC in the process.
Conceptualising the European Union’s Competence in Copyright – What Can the EU Do?
The EU Treaties do not grant the EU a specific competence to intervene in the field of copyright. The competence of the EU to act in the field of copyright has so far been primarily based on the need to build an internal market. The problem of attaching the harmonisation of copyright to internal-market needs, however, is that the concept of “internal market” does not give normative guidance regarding the substantive content of EU action. This article aims to conceptualise the competence of the EU in copyright lawmaking. For that purpose, it analyses the EU’s legal basis for action and suggests that certain factors can influence the exercise of its competence. These factors contribute to a clarification of the division of powers between the EU and the Member States, and provide a better definition of how the EU should proceed in its actions. As a result of these factors, the normative guidance absent from the main competence norms can be provided, and a few limits can also be imposed upon EU action.
Design of a low power viterbi decoder for wireless communication applications
In this paper, a novel low-power Viterbi decoder with soft decision is proposed. For the branch metric of the Viterbi decoder, our design employs a soft-decision method to improve its correction capability. In order to find the survivor path efficiently, we modify the classical Viterbi decoding algorithm into a new one. This new algorithm is similar to the register-exchange method with lower latency, but using RAM instead of register banks for recording the output bit-stream of the survivor path. Hence, our design can provide a low-power design. Finally, the chip of this design consumes about 28.6K gates using TSMC 0.18 μm CMOS technology. The power consumption of our chip is about 19.5mW at 100MHz.