DIFFERENT TYPES OF MULTILEVEL INVERTER TOPOLOGIES A TECHNICAL
This paper presents a review and analysis of multilevel inverter topologies. Multilevel inverters are most widely used for medium voltage high power converter like fans, pumps and material transport drives. In this active area, different inverter topologies, circuits, advantages and drawbacks are discussed. Multilevel Inverter topologies such as diode clamped, flyingcapacitor, cascaded H bridge, hybrid H bridge, new hybrid H bridge and new cascaded multilevel inverter have been discussed in the literature. In this work a new idea is developed to increase the level with less number of switches. It is concluded that the topologies are closely related to each particular application, depending on their unique features and limitations like power or voltage level, performance, reliability, costs and other technical specifications. I .INTRODUCTION Numerous industrial applications have began to require higher power apparatus in recent years. Some medium voltage motor drives and utility applications require medium voltage and MW power level. For a medium voltage grid, it is troublesome to connect one power semiconductor switch directly. The application of ac variable frequency speed regulations are widely popularized high power and medium voltage inverter has recently become a research focus so far as known there are many problems in conventional two level inverter in the high power application. Multilevel inverter have been gained more attention for high power application in recent years which can operate at high switching frequencies while producing lower order harmonic components[1] [6] A multilevel inverter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel inverter system for a high power application [7] [12] There are several topologies such as neutral point clamped inverter, flying capacitor based multilevel, cascaded H bridge multilevel inverter, hybrid H bridge multilevel inverter and new hybrid H bridge multilevel inverter [13] [15] Figure 1 shoes the various multilevel inverter topologies. This paper discusses the operation of different topologies for multilevel inverter which can produce multilevel; under this condition neutral point clamped multilevel inverter is presented, which has a simple structure and good performance .This topology effectively reduce the higher input dc voltage that each device must withstand. The main disadvantage still exists in this topology, which restricts the use of it to the high power range of operation [16] [20] The first topology introduced is the series H bridge design [21] [22] from this several configurations have been obtained. This topology consists of series power conversion cells which form the cascaded Hbridge multilevel inverter and power levels may be scaled easily. An apparent disadvantage of this topology is the large number of isolated voltage required to supply each cell. By using H bridge power conversion cells several topologies are developed and their advantages and disadvantages are discussed. The proposed topology for multilevel inverter has a high number of steps associated with a low number of power switches. In addition for producing all levels at the output voltage, a procedure for calculating the required dc voltage source is proposed. Figure 1.Types of Multilevel Inverter Topologies II.DIODECLAMPED MULTI LEVEL INVERTER: A three phase six level diode clamped inverter is shown in figure.2. Each of the three phases of the inverter shares a common dc bus, which has been subdivided by five capacitors into six levels. The voltage across each capacitor is Vdc and the voltage stress across each switching device is limited to Vdc through the clamping diodes. This involves the (n 1) main dc link capacitors and also S (2n 2) clamping diodes, where n number of levels. For DCMLI requires a large number of clamping devices as 2n 2. Each phase has five complementary switch pairs such that turning on, one of the switches of the pair require that the other complementary switch be turned off. The complementary switch pairs for phase leg a are (Sa1, Sa'1) (Sa2, Sa'2) (Sa3, Sa'3) (Sa4, Sa'4) and (Sa5, Sa'5) The figure.3 shows the line voltage waveform of a fifteen level diode clamped multilevel inverter. The main advantages are the entire phases share a common dc bus, which minimizes the capacitance requirements of the converter. For this reason, a back to back topology is not possible and can be practically used for a highvoltage back to back inter connection or an adjustable speed drive. The capacitors can be precharged as a group and efficiency is high for fundamental frequency switching. The main draw backs are real power flow is difficult for a single inverter because the intermediate dc levels will tend to overcharge or discharge without precise monitoring and control. The number of clamping diodes required is quadratically related to the number Murugesan et al. International Journal of Advanced Engineering Technology E ISSN 0976 3945 Int J Adv Engg Tech/Vol. VII/Issue I/Jan. March.,2016/149 155 of levels, which can be cumbersome for units with a high number of levels [23] [30] Figure 2. Three phase diode clamped multilevel inverter Figure 3. Line voltage waveform of diode clamped multilevel inverter III.FLYING CAPACITOR BASED MULTILEVEL INVERTER: The FCMLI requires a large number of capacitors to clamp the device (switch) voltage to one capacitor voltage level provided all the capacitors are of equal value, an n level inverter will require a total number of (n 1)(n 2)/2 clamping capacitors per phase leg in addition to (n 1) main dc bus capacitors. Figure.4 shows the three phase six level flying capacitor based multilevel inverter. Let us consider the group of capacitors in a single clamping leg as one equivalent capacitor, which is also applicable for 'n' level inverter. If the voltage of the main dc link capacitor is Vdc, the voltage of inner most capacitor, the inner most two devices is Vdc/ (n 1) The voltage of the inner most capacitor will be Vdc/ (n 1) Vdc/ (n 1) 2Vdc/ (n 1) and so on. Each next clamping capacitor will have the voltage increment of Vdc/ (n 1) from its immediate inner one voltage levels. The arrangements of the flying capacitors in the FCMLI structure assures that the voltage stress across each main device is same and is equal to Vdc/ (n 1) for an 'n' level inverter. The advantages of this topology are phase redundancies are available for balancing the voltage levels of the capacitors, real and reactive power flow controlled. Figure 4. Three phase Flying Capacitor based Multilevel Inverter The large number of capacitors enables the inverter to ride through short duration outages and deep voltage sags. The main draw back of this topology is complicated to track the voltage levels for all of the capacitors. Also the pre charging of all the capacitors to the same voltage level and startup are complex. Switching utilization and efficiency are poor for real power transmission. The large numbers of capacitors are more expensive and bulky than clamping diodes in multilevel diode clamped converters. Packaging is also difficult in inverters with a high number of levels [31] [40] The figure.5 shows the line voltage waveform of a fifteen level diode clamped multilevel inverter. Figure 5. Line voltage waveform of flying capacitor based multilevel inverter IV.CASCADED H BRIDGE MULTILEVEL INVERTER: The general structure of the cascaded multilevel inverter for single phase is shown in figure 6. Each of the separate voltage source (Vdc1, Vdc2, Vdc3) connected in cascade with other sources via a special H bridge circuit associated with it. Each of the circuit consists of four active switching elements that can make the output voltage source in positive or negative polarity; or it can be simply zero volts depending on the switching condition of the switches in the circuit. A conventional multilevel power inverter topology employs multiple/link voltage of equal magnitudes. It is fairly easy to generalize the number of distinct levels. [41][55] Figure 6.Topology for Cascaded H Bridge Multilevel