Construction of Optimum Composite Field Architecture for Compact High Throughput AES S Boxes
In this work, we derive three novel composite field arithmetic (CFA) Advanced Encryption Standard (AES) S boxes of the field GF((22)2)2) The best construction is selected after a sequence of algorithmic and architectural optimization processes. Furthermore, for each composite field constructions, there exists eight possible isomorphic mappings. Therefore, after the exploitation of a new common subexpression elimination algorithm, the isomorphic mapping that results in the minimal implementation area cost is chosen. High throughput hardware implementations of our proposed CFA AES S boxes are reported towards the end of this paper. Through the exploitation of both algebraic normal form and seven stages fine grained pipelining, our best case achieves a throughput 3.49 Gbps on a Cyclone II EP2C5T144C6 field programmable gate array.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems