26277514
Evaluation of an object-caching coprocessor design for object-oriented systems
Object-oriented systems exhibit a very high rate of object creation, but most of the objects are short-lived. As a result, memory management overhead is significant. The paper evaluates an application-specific coprocessor architecture to speed up object creation and memory reclamation in object-oriented systems. The architecture supports a bit-vector approach to dynamic storage allocation and liberation. Newly created objects reside in a cache which is reference counted. The paper presents measurements of the performance of this coprocessor design. Simulation results show that 50% to 70% of objects die before they age out of the cache, greatly reducing the number of references to main memory. Overall, more than 60% of memory traffic is saved by the proposed scheme, and the interval between main-memory garbage collections is extended by more than 60%.<<ETX>>
12198410
Scalable hardware-algorithm for mark-sweep garbage collection
The memory-intensive nature of object-oriented languages such as C++ and Java has created the need for high-performance dynamic memory management. Object-oriented applications often generate higher memory intensity in the heap region. Thus, a high-performance memory manager is needed to cope with such applications. As today's VLSI technology advances, it becomes increasingly attractive to map software algorithms such as malloc(), free() and garbage collection into hardware. This paper presents a hardware design of a sweeping function (for mark-and-sweep garbage collection) that fully utilizes the advantages of combinational logic. In our scheme, the bit sweep can detect and sweep the garbage in a constant time. Bit-map marking in software can improve the cache performance and reduce number of page faults; however, it often requires several instructions to perform a single mark. In our scheme, only one hardware instruction is required per mark. Moreover, since the complexity of the sweeping phase is often higher than the marking phase, the garbage collection time may be substantially improved. The hardware complexity of the proposed scheme (bit-sweeper) is O(n), where n represents the size of the bit map.
1021056
A performance perspective on the Active Memory System
Abstract One major problem of using Java in real-time and embedded devices is the non-deterministic turnaround time of dynamic memory management systems (memory allocation and garbage collection). For the allocation, the non-determinism is often contributed by the time to perform searching, splitting, and coalescing. For the garbage collection, the turnaround time is usually determined by the size of the heap, the number of live objects, the number of object collected, and the amount of garbage collected. Even with the current state-of-the-art garbage collectors (generational and incremental schemes), they may or may not guarantee the worst-case latency. Moreover, such schemes often prolong overall garbage collection time. In this paper, the performance analysis of the proposed Active Memory Module (AMM) for embedded systems is presented. Unlike the software counterparts, the AMM can perform a memory allocation in a predictable and bounded fashion (14 cycles). Moreover, it can also yield a bounded sweeping time regardless of the number of live objects or heap size. By utilizing the proposed system, the overall speedup can be as high as 23% compared to the garbage collection system of the JDK 1.2.2 running in classic mode.
18001825
Architectural support for dynamic memory management
Recent advances in software engineering, such as graphical user interfaces and object-oriented programming, have caused applications to become more memory intensive. These applications tend to allocate dynamic memory prolifically. Moreover, automatic dynamic memory reclamation (garbage collection, GC) has become a popular feature in modern programming languages. As a result, the time consumed by dynamic storage management can be up to one-third of the program execution time. This illustrates the need for a high-performance memory management scheme. This paper presents a top-level design and evaluation of the proposed instruction extensions to facilitate heap management.
39527990
FPGA-based reconfigurable computing
9645285
Using scratchpad to exploit object locality in Java
Performance of modern computers is tied closely to the effective use of cache because of the continually increasing speed discrepancy between processors and main memory. We demonstrate that generational garbage collection employed by a system with cache and scratchpad memory can take advantage of the locality of small short-lived objects in Java and reduce memory traffic by as much as 20% when compared to a cache-only configuration. Converting half of the cache to scratchpad can be more effective at reducing memory traffic than doubling or even quadrupling the size of the cache for several of the applications in SPECjvm98.
38826941
Effect of Count Estimation in Finding Frequent Itemsets over Online Transactional Data Streams
A data stream is a massive unbounded sequence of data elements continuously generated at a rapid rate. Due to this reason, most algorithms for data streams sacrifice the correctness of their results for fast processing time. The processing time is greatly influenced by the amount of information that should be maintained. This issue becomes more serious in finding frequent itemsets or frequency counting over an online transactional data stream since there can be a large number of itemsets to be monitored. We have proposed a method called theestDec method for finding frequent itemsets over an online data stream. In order to reduce the number of monitored itemsets in this method, monitoring the count of an itemset is delayed until its support is large enough to become a frequent itemset in the near future. For this purpose, the count of an itemset should be estimated. Consequently, how to estimate the count of an itemset is a critical issue in minimizing memory usage as well as processing time. In this paper, the effects of various count estimation methods for finding frequent itemsets are analyzed in terms of mining accuracy, memory usage and processing time.
13312657
Feedback vertex sets in star graphs
In a graph G = (V, E), a subset F ⊂ V(G) is a feedback vertex set of G if the subgraph induced by V(G) \ F is acyclic. In this paper, we propose an algorithm for finding a small feedback vertex set of a star graph. Indeed, our algorithm can derive an upper bound to the size of the feedback vertex set for star graphs. Also by applying the properties of regular graphs, a lower bound can easily be achieved for star graphs.
35558441
Using Interface Refinement to Integrate Formal Verification into the Design Cycle
We present a practical compositional interface refinement methodology which helps to integrate formal verification with the design process. One of the main verification challenges is to keep up with the changes to the specifications as the design evolves, and in particular, the transformations to the interfaces between the components. Interface changes are usually incremental, and therefore, the verification efforts after each change should also be incremental in order to be scalable. This paper presents a compositional interface refinement methodology which addresses all of these issues.
29352440
Induced matchings in asteroidal triple-free graphs
An induced matching M of a graph G is a set of pairwise nonadjacent edges such that no two edges of M are joined by an edge in G. The problem of finding a maximum induced matching is known to be NP-hard even for bipartite graphs of maximum degree four. In this paper, we study the maximum induced matching problem on classes of graphs related to AT-free graphs. We first define a wider class of graphs called the line-asteroidal triple-free (LAT-free) graphs which contains AT-free graphs as a subclass. By examining the square of line graph of LAT-free graphs, we give a characterization of them and apply this for showing that the maximum induced matching problem and a generalization, called the maximum δ-separated matching problem, on LAT-free graphs can be solved in polynomial time. In fact, our result can be extended to the classes of graphs with bounded asteroidal index. Next, we propose a linear-time algorithm for finding a maximum induced matching in a bipartite permutation (bipartite AT-free) graph using the greedy approach. Moreover, we show that using the same technique the minimum chain subgraph cover problem on bipartite permutation graphs can be solved with the same time complexity.
34576803
Multi-modal gray-level histogram modeling and decomposition
Abstract In this paper, we present a novel multi-modal histogram thresholding method in which no a priori knowledge about the number of clusters to be extracted is needed. The proposed method combines regularization and statistical approaches. By converting the approaching histogram thresholding problem to the mixture Gaussian density modeling problem, threshold values can be estimated precisely according to the parameters belonging to each contiguous cluster. Computational complexity has been greatly reduced since our method does not employ conventional iterative parameter refinement. Instead, an optimal parameter estimation interval was defined before the estimation procedure. This predefined optimal estimation interval reduces time consumption while other histogram decomposition based methods search all feature space to locate an estimation interval for each candidate cluster. Experimental results with both simulated data and real images demonstrate the robustness of our method.