11259233
The design and analysis of a quantitative simulator for dynamic memory management
The use of object-oriented programming in software development allows software systems to be more robust and more maintainable. At the same time, the development time and expense are also reduced. To achieve these benefits, object-oriented applications use dynamic memory management (DMM) to create generic objects that can be reused. Consequently, these applications are often highly dynamic memory intensive. For the last three decades, several DMM schemes have been proposed. Such schemes include first fit, best fit. segregated fit, and buddy systems. Because the performance (e.g., speed, memory utilization, etc.) of each scheme differs, it becomes a difficult choice in selecting the most suitable approach for an application and what parameters (e.g., block size. etc.) should be adopted. 
 
In this paper, a DMM simulation tool and its usage are presented. This tool receives DMM traces of C/C++ or Java programs and performs simulation according to the scheme (first fit, best fit, buddy system, and segregated fit) defined by the user. Techniques required to obtain memory traces are presented. At the end of each simulation run, a variety of performance metrics are reported to the users. By using this tool, software engineers can evaluate system performance and decide which algorithm is the most suitable. Moreover, hardware engineers can perform a system analysis before hardware (e.g., modified buddy system, first fit, etc.) is fabricated.
18001825
Architectural support for dynamic memory management
Recent advances in software engineering, such as graphical user interfaces and object-oriented programming, have caused applications to become more memory intensive. These applications tend to allocate dynamic memory prolifically. Moreover, automatic dynamic memory reclamation (garbage collection, GC) has become a popular feature in modern programming languages. As a result, the time consumed by dynamic storage management can be up to one-third of the program execution time. This illustrates the need for a high-performance memory management scheme. This paper presents a top-level design and evaluation of the proposed instruction extensions to facilitate heap management.
1021056
A performance perspective on the Active Memory System
Abstract One major problem of using Java in real-time and embedded devices is the non-deterministic turnaround time of dynamic memory management systems (memory allocation and garbage collection). For the allocation, the non-determinism is often contributed by the time to perform searching, splitting, and coalescing. For the garbage collection, the turnaround time is usually determined by the size of the heap, the number of live objects, the number of object collected, and the amount of garbage collected. Even with the current state-of-the-art garbage collectors (generational and incremental schemes), they may or may not guarantee the worst-case latency. Moreover, such schemes often prolong overall garbage collection time. In this paper, the performance analysis of the proposed Active Memory Module (AMM) for embedded systems is presented. Unlike the software counterparts, the AMM can perform a memory allocation in a predictable and bounded fashion (14 cycles). Moreover, it can also yield a bounded sweeping time regardless of the number of live objects or heap size. By utilizing the proposed system, the overall speedup can be as high as 23% compared to the garbage collection system of the JDK 1.2.2 running in classic mode.
39527990
FPGA-based reconfigurable computing
46189070
Optimal use of timing resources: a crucial step in test program generation
A modified timing set priority strategy and a lookahead register-replacement algorithm is presented for automatic test program generation. These methodologies are introduced to satisfy the testing requirements in complex VLSI chips, and are made possible by the increasing timing flexibility of modern ATE (automatic test equipment). It is shown that by applying optimization algorithms in allocating timing resources and a published timing set determination algorithm, that testing capability of modern ATE can be greatly extended. Further enhancements to these approaches are contingent on further improvements from ATE manufacturers in the number and flexibility of timing resources. However, the development of test programs will be greatly aided by this enhanced hardware.<<ETX>>
12416012
An efficient data structure for dynamic memory management
Abstract Advances in software engineering, such as graphical user interface and object-oriented programming, have caused applications to become more memory intensive. The growing popularity of these applications increases the importance of high-performance dynamic memory management. This paper introduces a new data structure intended to increase the efficiency of implementations of common dynamic memory allocation and deallocation algorithms, including First Fit . The data structure, called the Common List , establishes a relationship between the allocated and free list. This strategy increases significantly the deallocation performance. Simulation results based on the traces from publicly available software applications are presented.
16368228
Color pattern recognition by quaternion correlation
It is popular to use the conventional correlation for pattern recognition. But when using the conventional correlation, the pattern should be the gray-level pattern. In this paper, we discuss how to use discrete quaternion correlation (DQCR) for the application of color pattern recognition. With the algorithm introduced here, we can detect the objects that have the same shape, color, and brightness as the reference pattern. Besides, we can also detect (a) the objects with the same shape, color, but different brightness, (b) the objects with the same shape, brightness, but different color, and (c) the objects just have the same shape as the reference. Our algorithm can classify the objects into 5 classes due to whether their shape, brightness, and color match those of the reference pattern. Besides, with our algorithm, the difference of the brightness and color can also be calculated at the same time.
14086063
A modular eigen subspace scheme for high-dimensional data classification
In this paper, a novel filter-based greedy modular subspace (GMS) technique is proposed to improve the accuracy of high-dimensional data classification. The proposed approach initially divides the whole set of high-dimensional features into several arbitrary number of highly correlated subgroups by performing a greedy correlation matrix reordering transformation for each class. These GMS can be treated as not only a preprocess of GMS filter-based classifiers but also a unique feature extractor to generate a particular feature subspaces for each different class presented in high-dimensional data. The similarity measures are next calculated by projecting the samples into different modular feature subspaces. Finally, a GMS filter-based architecture based on the mean absolute errors criterion is adopted to build a non-linear multi-class classifier. The proposed GMS filter-based classification scheme is developed to find non-linear boundaries of different classes for high-dimensional data. It not only significantly improves the classification accuracy but also dramatically reduces the computational complexity of feature extraction compared with the conventional principal components analysis. Experimental results demonstrate that the proposed GMS feature extraction method suits the GMS filter-based classifier best as a classification preprocess. It significantly improves the precision of high-dimensional data classification.
17161223
Speculative incoherent cache protocols
Multiprocessing and multithreading are becoming ubiquitous even on single chips. With increasing cache sizes, coherence misses in such systems will account for a larger fraction of all cache misses. As communication latencies increase, this larger fraction of coherence misses will cause significant and increased performance losses. Tuning coherence protocols for specific communication patterns and applications can reduce communication latencies. However, these optimizations increase a protocol's design complexity, making the protocol difficult to verify. A competing approach requires parallel programmers to tune applications to work well with simpler protocols. Speculative execution has successfully improved performance in various scenarios. We propose a new type of load speculation, called coherence decoupling. Coherence decoupling is a microarchitectural mechanism that implements separate protocols for speculative use and for the eventual verification of values. The technique reduces the effect of long communication latencies while mitigating the burdens on the coherence protocol designer and the parallel programmer
38166516
A Sufficient Condition for Quasi-Claw-Free Hamiltonian Graphs
There are several well-known and important hamiltonian results for claw-free graphs but only a few are concerned with quasi-claw-free graphs. In this note, we provide a new sufficient condition for quasi-claw-free hamiltonian graphs.
9862925
Powers of Asteroidal Triple-free Graphs with Applications
An asteroidal triple is an independent set of three vertices in a graph such that every two of them are joined by a path avoiding the closed neighborhood of the third. Graphs without asteroidal triples are called AT-free graphs. In this paper, we show that every AT-free graph admits a vertex ordering that we call a 2-cocomparability ordering. The new suggested ordering generalizes the cocomparability ordering achievable for cocomparability graphs. According to the property of this ordering, we show that every proper power G (k ≥ 2) of an AT-free graph G is a cocomparability graph. Moreover, we demonstrate that our results can be exploited for algorithmic purposes on AT-free graphs.