18311049
Testing of concurrent programs after specification changes
This paper describes a specification-based regression testing technique that can be applied for revalidating concurrent programs after specification changes. This kind of regression testing technique requires sequencing constraints which specify the precedence relations among synchronization events. In our method, the sequencing constraints are extracted automatically from Message Sequence Charts (MSCs) that are considered to be partial and nondeterministic specifications. We show how to identify the sequencing constraints affected by the modifications of a specification rather than creating new sequencing constraints from scratch to reduce the cost of regression testing. We also describe how to determine whether the affected sequencing constraints are satisfied by the program being tested.
9037240
Empirical evaluation of a fuzzy logic-based software quality prediction model
Software inspection, due to its repeated success on industrial applications, has now become an industry standard practice. Recently, researchers began analyzing inspection data to obtain insights on how software processes can be improved. For example, project managers need to identify potentially error-prone software components so that limited project resource may be optimally allocated. This paper proposes an automated and fuzzy logic-based approach to satisfy such a need. Fuzzy logic offers significant advantages over other approaches due to its ability to naturally represent qualitative aspect of inspection data and apply flexible inference rules. In order to empirically evaluate the effectiveness of our approach, we have analyzed published inspection data and the ones collected from two separate inspection experiments which we had conducted. χ2 analysis is applied to statistically demonstrate validity of the proposed quality prediction model.
12216769
Change impact analysis for a class hierarchy
Modified programs are required to be retested to determine whether changes have been made correctly and to investigate whether those cause any adverse effect on the program behavior. Then, the key issue is the extent of the retesting tasks. To save time and efforts, retesting should be done on only the parts that might be affected by changes. Change impact analysis is the activity which identifies the parts to be retested. Object-oriented paradigm is based on several concepts such as encapsulation, inheritance, polymorphism, and dynamic binding. Although these features contribute to the reusability and extensibility of systems, they produce complex dependencies between classes and attributes, which make it difficult to identify the affected components by changes. We propose an approach for analyzing change impact in a class hierarchy. Our approach is based on the class firewall method, but aims to reduce the retesting effort significantly by taking a member function as a test unit. We deal with the impacts of changes associated with various object-oriented features as well as types of changes which can occur at the level of a data member a member function, a class, and an inheritance relation.
31388642
Modeling and Testing Agent Systems Based on Statecharts
This paper presents a testing method for an agent system against its specification described with Statecharts. Here, an agent system means an implementation of an agent application. Its testing method generates test sequences from the specification and checks whether the agent system behaves in accordance with the specification by executing the test sequences. For specification-based testing, we have extended Statecharts in order to describe the behavior of an agent system according to the concept of Agent UML. Then, we propose an approach to generating test sequences from the extended Statecharts. Our approach makes effective use of partial order methods for considering representative sequences of equivalent classes divided from all possible sequences. Therefore, we can efficiently manage a large number of possible sequences caused by the agents’ autonomy. As a result, we can reduce the number of test sequences and the number of executions to be tested.
42278030
Hybrid knowledge-based architecture for building an intelligent nondestructive signal inspection system
The paper deals with the methods of implementing an intelligent inspection system for monitoring the health of any device or material using a nondestructive signal. A hybrid knowledge representation and processing architecture is proposed as a solution to problems encountered in the processes of the nondestructive inspection. In the proposed system, to modularize knowledge elicitation and to make knowledge processing reliable, the task of inspection is delegated to two subsystems each of which has a proper knowledge processing scheme to match the properties of its own task. The front-end subsystem which detects the signal patterns (events) for any harmful flaw is built by integrating a fuzzified syntactic pattern recognition concept and a neural network concept. The back-end subsystem which evaluates the characteristics of the events is based upon object-oriented rule base system concepts. The methods of integrating the approaches in the proposed architecture are also proposed in the paper. The proposed architecture is verified by developing and evaluating a prototype which automatically interprets eddy current Lissajous signals to inspect the state of tubes used in nuclear power plants.
15507852
Testing of concurrent programs based on message sequence charts
Most prior work on specification-based testing of concurrent programs have postulated an equivalence relation between specifications and programs. However the equivalence relation, which requires a specification and a program to encompass the same set of synchronization sequences, is not well-suited for resting concurrent programs against partial and nondeterministic specifications. We present a new specification-based approach to testing concurrent programs against Message Sequence Charts (MSCs) with partial and nondeterministic semantics. New conformance relations, named behavioral conformance and nondeterminacy conformance, are defined and the details of the proposed testing methodology based on the conformance relations are given. The effectiveness of our testing approach is investigated using a telephone switching system example.
14599334
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more time-consuming as design complexity increases. To accelerate functional simulation, hardware acceleration is used to offload calculation-intensive tasks from the software simulator. Hardware accelerated simulation dramatically reduces the simulation time. However, the communication overhead between the software simulator and hardware accelerator is becoming a new critical bottleneck. We reduce the communication overhead by exploiting burst data transfer and parallelism, which are obtained by splitting testbench and moving a part of testbench into hardware accelerator. Our experiments demonstrated that the proposed method reduces the communication overhead by a factor of about 40 compared to conventional hardware accelerated simulation while maintaining the cycle accuracy and compatibility with the original testbench.
17804982
Signal Scheduling Driven Circuit Partitioning for Multiple FPGAs with Time-multiplexed Interconnection
FPGA-based logic emulator with large gate capacity generally comprises a large number of FPGAs. However, gate utilization of FPGAs and speed of emulation are limited by the number of signal pins among FPGAs and the interconnection architecture of the logic emulator. The time-multiplexing of interconnection wires is required for multi-FPGA system incorporating several stateof-the-art FPGAs. This paper proposes a circuit partitioning algorithm called SCATOMi(SCheduling driven Algorithm for TOMi) for multi-FPGA system incorporating four to eight FPGAs where FPGAs are interconnected through TOMi(Time-multiplexed, Off-chip, Multicasting interconnection). SCATOMi improves the performance of TOMi architecture by limiting the number of inter-FPGA signal transfers on the critical path and considering the scheduling of inter-FPGA signal transfers. The performance of the partitioning result of SCATOMi is 5.5 times faster than traditional partitioning algorithms. Experiments on architecture comparison show that, by adopting the proposed TOMi interconnection architecture along with SCATOMi, the pin count is reduced to 15.2%-81.3% while the critical path delay is reduced to 46.1%-67.6% compared to traditional architectures including mesh, crossbar and VirtualWire architecture.
15346879
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing instances to be located and signals to be routed in 3-D space. Wire resource prediction is important for fast and accurate interconnection planning in 3-D FPGA. In this paper, we extend the existing analytic model shown in [13] with a new parameter for our 3-D FPGA which has cluster-based logic blocks. The proposed wire resource prediction model is applied to our 3-D FPGA using a Xilinx Virtex2 slice [18] and our 3-D routing architecture. We validate the effectiveness of the extended model by comparing the required number of channel wires predicted by the extended analytic equation with that of the placed and routed results using 3-D placement and routing algorithm designed for our 3-D FPGA for a number of benchmark circuits. The extended 3-D wire resource prediction model predicts the required channel capacity with an average of 11.1% error for 17 large circuits from LGSynth93 and ISPD2001 Verilog benchmarks.
13194172
ActorNet: an actor platform for wireless sensor networks
We present actorNet, a mobile agent platform for wireless sensor networks (WSNs). WSNs are well-suited to multiagent systems: agent autonomy reduces the need for communication, saving precious energy. Mobile agents are also an intuitive technique for remotely reprogramming sensors deployed in the field. However, implementing agent programs directly on a WSN is complicated by the many limitations of sensor nodes, including limited memory, slow processors, low bandwidth and finite energy. ActorNet eases development by providing an abstract environment for lightweight concurrent object-oriented mobile code on WSNs. As such, it enables a wide range of new dynamic applications, including fully customizable queries and aggregation functions, in-network interactive debugging and high-level concurrent programming on the inherently parallel sensor network platform. Moreover, actorNet cleanly integrates all of these features into a fine-tuned, multi-threaded embedded Scheme interpreter that supports compact, maintainable programs---a significant advantage over primitive stack-based virtual machines.
5951770
MetaCore: an application specific DSP development system
This paper describes the MetaCore system which is an ASIP (Application-Specific Instruction set Processor) development system targeted for DSP applications. The goal of MetaCore system is to offer an efficient design methodology meeting specifications given as a combination of performance, cost and design turnaround time.
MetaCore system consists of two major design stages: design exploration and design generation. In the design exploration stage, MetaCore system accepts a set of benchmark programs and a formal specification of ISA (Instruction Set Architecture), and estimates the hardware cost and performance for each hardware configuration being explored. Once a hardware configuration is chosen, the system helps generate a VLSI processor design in the form of HDL along with the application program development tools such as C compiler, assembler and instruction set simulator.