1746806
Identifying Expressions of Opinion in Context
While traditional information extraction systems have been built to answer questions about facts, subjective information extraction systems will answer questions about feelings and opinions. A crucial step towards this goal is identifying the words and phrases that express opinions in text. Indeed, although much previous work has relied on the identification of opinion expressions for a variety of sentiment-based NLP tasks, none has focused directly on this important supporting task. Moreover, none of the proposed methods for identification of opinion expressions has been evaluated at the task that they were designed to perform. We present an approach for identifying opinion expressions that uses conditional random fields and we evaluate the approach at the expression-level using a standard sentiment corpus. Our approach achieves expression-level performance within 5% of the human interannotator agreement.
12101738
OpinionFinder: A System for Subjectivity Analysis
OpinionFinder is a system that performs subjectivity analysis, automatically identifying when opinions, sentiments, speculations, and other private states are present in text. Specifically, OpinionFinder aims to identify subjective sentences and to mark various aspects of the subjectivity in these sentences, including the source (holder) of the subjectivity and words that are included in phrases expressing positive or negative sentiments.
34093275
Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design
The delay of memory access is one of the major bottlenecks in embedded systems' performance. In software compilation, it is known that there are high variations in memory access delay depending on the ways of storing/retrieving the variables in code to/from the memories. In this paper, we propose effective storage assignment techniques for variables to maximize the use of memory bandwidth. Specifically, we study the problem of DRAM memory layout for storing the nonarray variables in code to achieve a maximum utilization of page and/or burst modes for the memory accesses. The contributions of our work are, for each page and burst modes: 1) we prove that the problem is NP-hard and 2) we propose an exact formulation of the problem and efficient memory layout algorithms, called Solve-MLP for the page mode and Solve-MLB for the burst mode. From experiments with a set of benchmark programs, we confirm that our proposed techniques use on average 28.2% and 10.1% more page accesses and 82.9% and 107% more burst accesses than those by the order of first use and the technique of Panda et al. in Proc. Int. Conf. Computer-Aided Design, 1997, and Panda et al. in ACM Trans. Design Automation Electron. Syst., 1997, respectively.
41031857
Address code optimization using code scheduling for digital signal processors
We propose an effective address code generation algorithm for digital signal processor (DSP) to minimize the number of addressing instructions. Unlike previous works in which code scheduling and offset (address) assignment are performed sequentially without any interaction between them, our work tightly couples code scheduling with offset assignment to exploit scheduling on optimizing addressing instructions more effectively. We accomplish this by proposing a new code scheduling algorithm that leads to an efficient sequence of variable accesses, minimizing addressing instructions. Experimental results with benchmark DSP programs show average improvements of 23.7% and 47.1% in the address code size and a naive storage assignment algorithm, respectively.
4649924
WAF: wireless-adaptive fair scheduling for multimedia stream in time division multiplexed packet cellular systems
Cellular systems are designed to support voice service over the wireless channel but nowadays data-only networks such as cdma2000 1x EV-DO and high speed downlink packet access (HSDPA) are being deployed in the midst of evolution to the next generation wireless networks. Such systems become important because data services are essential in future wireless networks that are supposed to adopt the concept of all-IP to support integrated services. To increase the data transmission rate at downlink in cdma2000 1x EV-DO and HSDPA, the base station (BS) uses only a channel multiplexed by time division, not by code division. These systems use proportional fair scheduling to maximize throughput. While it is useful for non real time traffic, it does not provide appropriate QoS for real time services such as voice and video. Therefore we need to incorporate the multimedia QoS requirements into the design of a new scheduling algorithm. Our proposed wireless-adaptive fair scheduling (WAF) tries to allocate time slots with fair share according to the stream requirements considering the varying channel conditions to achieve good throughput. The simulation results show that our scheme can guarantee fair service and increase throughput by up to 41% compared to the purely fair (PF) scheduling scheme.
14946468
Address assignment in DSP code generation - an integrated approach
One of the important issues in embedded system design is to optimize program code for the microprocessor to be stored in ROM. In this paper, we propose an integrated approach to the DSP address-code generation problem for minimizing the number of addressing instructions. Unlike previous works, in which code scheduling and offset assignment are performed sequentially without any interaction between them, our work tightly couples offset assignment problem with code scheduling to exploit scheduling on minimizing addressing instructions more effectively. We accomplish this by developing a fast but accurate two-phase assignment procedure which, for a sequence of code schedules, finds a sequence of memory layouts with minimum addressing instructions. Experimental results with benchmark DSP programs show improvements an average of 5.8% in the whole code size over the existing methods.
1609683
Web-Based Energy Exploration Tool for Embedded Systems
We describe a Web-based energy estimation tool for embedded systems. An interesting feature of this tool is that it performs real-time cycle-accurate energy measurements on a hardware prototype of the processor. The authors describe the various steps involved in using the tool and present case studies to illustrate its utility.