7385007
On the sectional area of convex polytopes
A function j : %3 -+ ‘R is unimodal if it increases to a maximum value and then decreases. It is strictly unimodal if the increase and decrease are strict. To be precise, ~ is strictly unimodal iff for all reals z < y, the value o = min{~(z), j(y)} is either the global minimum or maximum of ~ or v < ~(z) for all z G (z, y). Unimodality is important for the design of efficient search algorithms because it permits prune-and-search strategies. E.g., Chazelle and Dobkin [2] showed that the perpendicular distance from a line 1 to an n-vertex convex polygon Q is bimodal. From this, unimodal functions can be constructed and the farthest point from t can be computed in O(log n) time. Unimodality can also simplify proofs. It was shown in 1973 that if A(z) is the length of the intersection of a convex polygon Q with the vertical line through Z, then A(x) is a strictly unimodal function [4]. We note that this generalizes to higher dimensions: the area in 7?3 (or volume in 7?~) of the intersection of a convex polytope K and a hyperplane h(z) = {(x,23, ..., Zd) I VZi G ‘R} is a strictly unimodal function A(x). (If the plane is defined by rotation instead of translation, then there are convex polytopes for which sectional area is not unimodal.) Prune-andsearch can be used to compute the intersection with maximum area (volume) in time proportional to the size of K, if K is stored with its complete facial lattice. For %33 our algorithm has an application to shape matching: Given convex polygons P and Q and a direction in which to translate P, one can find the translation
38367030
Partitions of complete geometric graphs into plane trees
Consider the following question: does every complete geometric graph K"2"n have a partition of its edge set into n plane spanning trees? We approach this problem from three directions. First, we study the case of convex geometric graphs. It is well known that the complete convex graph K"2"n has a partition into n plane spanning trees. We characterise all such partitions. Second, we give a sufficient condition, which generalises the convex case, for a complete geometric graph to have a partition into plane spanning trees. Finally, we consider a relaxation of the problem in which the trees of the partition are not necessarily spanning. We prove that every complete geometric graph K"n can be partitioned into at most n-n/12 plane trees. This is the best known bound even for partitions into plane subgraphs.
24680353
Facility Location Constrained to a Polygonal Domain
We develop efficient algorithms for locating an obnoxious facility in a simple polygonal region and for locating a desirable facility in a simple polygonal region. Many realistic facility location problems require the facilities to be constrained to lie in a simple polygonal region. Given a set S of m demand points and a simple polygon R of n vertices, we first show how to compute the location of an obnoxious facility constrained to lie in R, in O((m + n) logm + mlog n) time. We then show how to compute the location of a desirable facility constrained to lie in R, also in O((m + n) logm + mlog n) time. Both running times are an improvement over the known algorithms in the literature. Finally, our results generalize to the setting where the facility is constrained to lie within a set of simple polygons as opposed to a single polygon at a slight increase in complexity.
1566102
On simplifying dot maps
Dot maps--drawings of point sets--are a well known cartographic method to visualize density functions over an area. We study the problem of simplifying a given dot map: given a set P of points in the plane, we want to compute a smaller set Q of points whose distribution approximates the distribution of the original set P.We formalize this using the concept of e-approximations, and we give efficient algorithms for computing the approximation error of a set Q of m points with respect to a set P of n points (with m ≤ n) for certain families of ranges, namely unit squares, arbitrary squares, and arbitrary rectangles.If the family R of ranges is the family of all possible unit squares, then we compute the approximation error of Q with respect to P in O(n log n) time. If R is the family of all possible rectangles, we present an O(mn log n) time algorithm. If R is the family of all possible squares, then we present a simple O(m2n + n log n) algorithm and an O(n2 √n log n) time algorithm which is more efficient in the worst case.Finally, we develop heuristics to compute good approximations, and we evaluate our heuristics experimentally.
5595756
Bounds for Frequency Estimation of Packet Streams
We consider the problem of approximating the frequency of frequently occurring elements in a stream of length n using only a memory of size m n. This models the process of gathering statistics on Internet packet streaming using a memory that is small relative to the number of classes (e.g. IP addresses) of packets. We show that when some data item a occurs αn times in a stream of length n, the FREQUENT algorithm of Demaine et al. [4], can approximate a’s frequency with an error of no more than (1−α)n/m. We also give a lower-bound of (1−α)n/(m+1) on the accuracy of any deterministic packet counting algorithm, which implies the FREQUENT algorithm is nearly optimal. Finally, we show that randomized algorithms can not be significantly more accurate since there is a lower bound of (1−α)Ω(n/m) on the expected accuracy of any randomized packet counting algorithm.
45018692
The Grid Placement Problem
We consider the problem of placing a regular grid over a set of points in order to minimize (or maximize) the number of grid cells not containing any points. We give an O(n log n) time and O(n) space algorithm for this problem. As part of this algorithm we develop a new data structure for solving a problem on intervals that is interesting in its own right and may have other applications.
2521753
A circuit level implementation of an adaptive issue queue for power-aware microprocessors
Increasing power dissipation has become a major constraint for future performance gains in the design of microproces sors In this paper we present the circuit design of an issue queue for a superscalar processor that leverages transmis sion gate insertion to provide dynamic low cost con gura bility of size and speed A novel circuit structure dynami cally gathers statistics of issue queue activity over intervals of instruction execution These statistics are then used to change the size of an issue queue organization on the y to improve issue queue energy and performance When applied to a xed full size issue queue structure the result is up to a reduction in energy dissipation The complexity of the additional circuitry to achieve this result is almost neg ligible Furthermore self timed techniques embedded in the adaptive scheme can provide a decrease in cycle time of the CAM array read of the issue queue when we change the adaptive issue queue size from entries largest possible to entries smallest possible in our design
36006642
Compositional Model-Based Design
42931174
Heuristic Rule-Based Program Transformations for Enhanced Vectorization
14558888
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue queue for a superscalar processor that leverages transmission gate insertion to provide dynamic low-cost configurability of size and speed. A novel circuit structure dynamically gathers statistics of issue queue activity over intervals of instruction execution. These statistics are then used to change the size of an issue queue organization on-the-fly to improve issue queue energy and performance. When applied to a fixed, full-size issue queue structure, the result is up to a 70% reduction in energy dissipation. The complexity of the additional circuitry to achieve this result is almost negligible. Furthermore, self-timed techniques embedded in the adaptive scheme can provide a 56% decrease in cycle time of the CAM array read of the issue queue when we change the adaptive issue queue size from 32 entries (largest possible) to 8 entries (smallest possible in our design).
9029444
Workload-driven floorplanning for MIPS optimization
An approach to early floorplanning in which optimization of a CPU chip floorplan is done in the context of a program benchmark (workload) is presented. The methodology integrates workload-driven cycles-per-instruction estimation into the traditional cycle-time evaluation process implied by an (early) floorplanning tool. This effectively adds an extra dimension to the floorplanning optimization cost function and search space, allowing superior MIPS-tuning of the VLSI chip.<<ETX>>