108271361
Concepts for the readout of time projection chambers
While the use of CCD’s for the readout of TPC’s offers a reliable and ever more of the digitization concept. The problem of precision of currently available FADC’s is discussed together with two proposals for a solution.
23063408
Use of Triple Modular Redundancy (TMR) technology in FPGAs for the reduction of faults due to radiation in the readout of the ATLAS monitored drift tube (MDT) chambers
The Triple Modular Redundancy (TMR) technology allows protection of the functionality of FPGAs against single event upsets (SEUs). Each logic block is implemented three times with a 2-out-of-3 voter at the output. Thus, the correct logical value is available even if there is an upset bit in one location. We applied TMR to the configuration code of a Virtex-II-2000 FPGA, which serves as the on-chamber readout processor of the ATLAS monitored drift tubes (MDTs). We describe the code implementation, results of performance measurements and discuss several limitations of the method. Finally, we present a supplementary technology called “scrubbing”. It permanently checks the configuration memory while the FPGA is operating, and corrects upset configuration bits when necessary.
50340039
Observation of a Narrow Resonance at 10.02-GeV in e+ e- Annihilations
Abstract The ϒ′ state has been observed as a narrow resonance at M ( ϒ ′) = 10.02 ± 0.02 GeV in e + e − annihilations, using a NaI and lead-glass detector in the DORIS storage ring at DESY. The ratio Г ee Г had /Г tot of electronic, hadronic, and total widths has been measured to be 0.32 ± 0.13 keV. The parameters of the Г particle have also been determined to be/ M (Г)
67778447
A fast readout using switched current techniques for a DEPFET-pixel vertex detector at TESLA
Abstract A fully depleted silicon detector with a first amplifying transistor integrated in every pixel (DEPFET) is a promising proposal for the pixel-based vertex detector at TESLA. The DEPFET offers good spatial resolution, an excellent signal-to-noise ratio and low power consumption in a row-wise operation mode. A readout concept for a DEPFET pixel array matching the requirements at TESLA is described. In order to meet the operation specifications at TESLA ( 50 MHz row rate), a readout architecture based on current mode techniques (Switched Current) is presented. It contains stand alone zero suppression offering a triggerless operation. The core of the readout chip, a fast operating current memory cell, is discussed in detail. The results of a first prototype chip, CURO I (CUrrent ReadOut), show that the requirements for TESLA are achievable.
118357728
Thin n-in-p pixel sensors and the SLID-ICV vertical integration technology for the ATLAS upgrade at the HL-LHC
Abstract This R&D activity is focused on the development of new modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The performance after irradiation of n-in-p pixel sensors of different active thicknesses is studied, together with an investigation of a novel interconnection technique offered by the Fraunhofer Institute EMFT in Munich, the Solid–Liquid-InterDiffusion (SLID), which is an alternative to the standard solder bump-bonding. The pixel modules are based on thin n-in-p sensors, with an active thickness of 75 μ m or 150 μ m , produced at the MPI Semiconductor Laboratory (MPI HLL) and on 100 μ m thick sensors with active edges, fabricated at VTT, Finland. Hit efficiencies are derived from beam test data for thin devices irradiated up to a fluence of 4 × 10 15 n eq / cm 2 . For the active edge devices, the charge collection properties of the edge pixels before irradiation are discussed in detail, with respect to the inner ones, using measurements with radioactive sources. Beyond the active edge sensors, an additional ingredient needed to design four side buttable modules is the possibility of moving the wire bonding area from the chip surface facing the sensor to the backside, avoiding the implementation of the cantilever extruding beyond the sensor area. The feasibility of this process is under investigation with the FE-I3 SLID modules, where Inter Chip Vias are etched, employing an EMFT technology, with a cross section of 3 μ m × 10 μ m , at the positions of the original wire bonding pads.
108877301
Design and test of pixel sensors for operation in severe radiation environments
Abstract The inner detectors of LHC experiments will contain pixel detectors covering an area of several square meters. In addition they are facing the harsh radiation environment of the LHC. A first prototype sensor has been designed according to the requirements of the ATLAS experiment, produced and successfully tested with static measurements. Irradiation tests have also been performed with excellent results. The sensor is an n + n-device in order to allow partial depleted operation after bulk inversion and a guard ring scheme keeping the entire detector surface close to the electronic chip on ground potential. Further, a bias structure is introduced providing testability of the sensors prior to bump bonding and flip chipping.
121719013
Electrical characteristics of silicon pixel detectors
Prototype sensors for the ATLAS silicon pixel detector have been electrically characterized. The current and voltage characteristics, charge-collection efficiencies, and resolutions have been examined. Devices were fabricated on oxygenated and standard detector-grade silicon wafers. Results from prototypes which examine p-stop and standard and moderated p-spray isolation are presented for a variety of geometrical options. Some of the comparisons relate unirradiated sensors with those that have received fluences relevant to LHC operation.
110917125
Radiation hard strip detectors for large-scale silicon trackers
Abstract Major challenges in building silicon strip detectors for future high luminosity experiments are the high radiation level and the huge number of sensors required for the construction of the precision layers of the complete tracking system. Single-sided p + n strip detectors for ATLAS SCT designed and fabricated at the MPI Semiconductor Laboratory have been exposed to 3×10 14 /cm 2 24 GeV protons. The major features of the design, including the biasing technique using implanted resistors, are discussed and results are presented. The technology was transferred to CiS, Germany, a company capable of the desired large-scale production. Results of this industrially fabricated sensors look very promising and show the expected radiation hardness.