12241370
A software product line process simulator
Organizations are moving towards the use of software product line approaches to build product families. Cases have shown that software product line approaches can reduce time-to-market (TTM), costs, and resource usage. However, those benefits are not guaranteed in all situations, as they are affected by many factors including the number of available resources, market demands, reuse rates, and product line adoption and evolution strategies. Before initiating a software product line, an organization needs to evaluate available process options in order to see which ones best fit its goals. The aim of this research is to help this decision-making process by providing practical approaches and tools. In this article, a process evaluation approach is proposed, a process meta-model is introduced, and a product line process simulator is presented. The approach contains three steps: process definition, simulation, and evaluation. The process meta-model is used for defining software product line processes. The simulator can predict the development costs, schedule, and resource usage rates for a selected software product line process at a high level. The simulator uses DEVSJAVA as the modeling and simulation formalism and COPLOMO as the cost model. An example is also given and some simulation results are discussed. Copyright © 2006 John Wiley & Sons, Ltd.
8362551
Using simulation to facilitate the study of software product line evolution
A product line approach is a disciplined methodology for strategic reuse of source code, requirement specifications, software architectures, design models, components, test cases, and the processes for using the aforementioned artifacts. Software process simulation modeling is a valuable tool for enabling decision making for a wide variety of purposes, ranging from adoption and strategic management to process improvement and planning. In this paper, discrete event simulation is used to provide a framework for the simulation of software product line engineering. We have created an environment that facilitates strategic management and long-term forecasting with respect to software product line development and evolution.
37515092
Structure-oriented dependability evaluation of fault-tolerant protocols
Abstract Fault-tolerant protocols are special software components used to maintain correct communication and computing in highly dependable distributed systems. Before being put into use, the correctness or dependability of a fault-tolerant protocol must be ensured. Based on a deterministic test strategy with imperfect error correction, we propose and investigate a quantified reliability model for fault-tolerant protocols. The parameters of the model can be estimated from the frequencies of the failures attributable to a single design error and from the times between the failures attributable to different design errors observed during testing.
10148394
Generating C Code from LOGS Specifications
This paper introduces a tool that automatically translates a concrete form of specifications into C code linked with BSPlib. The translation tool is rigorously developed with important safety properties proved. A Logs specification for Bulk-Synchronous Parallelism is a relation of an initial state, a final state and some intermediate states. Nondeterminism and parallelism correspond to disjunction and conjunction respectively. Various advanced specification commands can be derived from the basic ones. The translator checks syntax, freedom of communication interference, type consistency and communication dependencies before generating the target code. Static analysis (including both static checkings and translation) is presented in abstract interpretation. It is shown that a few laws are complete for transforming any specification into a normal form. These laws are satisfied by the abstract functions. We demonstrate the actual effects of the abstract functions by applying them on the normal form. The approach has been implemented using an object-oriented language.
8484723
Effective test metrics for test strategy evolution
How to measure a test process is a required competence for an effective software test manager. Effective test process measurement is essential for designing, evaluating and managing a cost-effective test strategy. Although some existing research has proposed many metrics for these purposes, most of those metrics are ignored or used individually. This paper summarizes a test process measurement pilot project of the IBM Electronic Commerce Development (ECD) test teams, and analyzes the effectiveness of using a "metric set" of complementary metrics for cost, time, and quality to measure the quality of test process based on the results of our project. Details are given for a "fictitious" project in order to explain the detailed considerations that go into adopting a cost-effective metric strategy. Further discussions about implementation problems, test wisdom learned in the project, and cost-effectiveness of the measurement activities and metrics are also presented. We conclude with suggestions for extensions of the work into the area of real-time, in-phase, in-process metrics.
14759214
Real-coded ECGA for economic dispatch
In this paper, we propose a new approach that consists of the extended compact genetic algorithm (ECGA) and split-on-demand (SoD), an adaptive discretization technique, to economic dispatch (ED) problems with nonsmooth cost functions. ECGA is designed for handling problems with decision variables of the discrete type, while the decision variables of ED problems are oftentimes real numbers. Thus, in order to employ ECGA to tackle ED problems, SoD is utilized for discretizing the continuous decision variables and works as the interface between ECGA and the ED problem. Furthermore, ED problems in practice are usually hard for traditional mathematical programming methodologies because of the equality and inequality constraints. Hence, in addition to integrating ECGA and SoD, in this study, we devise a repair operator specifically for making the infeasible solutions to satisfy the equality constraint. To examine the performance and effectiveness, we apply the proposed framework to two different-sized ED problems with nonsmooth cost function considering the valve-point effects. The experimental results are compared to those obtained by various evolutionary algorithms and demonstrate that handling ED problems with the proposed framework is a promising research direction.
10324421
Advanced techniques for RTL debugging
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) source. This process is helpful in locating errors but does little to help designers reason about the how and why. Designers usually have to build a mental image of how data is propagated and used over the simulation run. As designs get more and more complex, there is a need to facilitate this reasoning process, and automate the debugging. In this paper, we present innovative debug techniques to address this shortage in adequate facilities for reasoning about behavior, and debugging errors. Our approach delivers significant technology advances in RTL debugging; it is the first comprehensive and methodical approach of its kind that extracts, analyzes, traces, explores, and queries a design's multi-cycle temporal behavior. We show how our automatic tracing scheme can shorten debugging time by orders of magnitude for unfamiliar designs. We also demonstrate how the advanced debug techniques reduce the number of regression iterations.