Locating hot carrier injection in n-type DeMOS transistors by Charge Pumping and 2D device simulations
The hot carrier degradation behaviour of a drain extended MOS device is presented in this paper. It is shown that upon reverse bias stress interface states (Dit) are created in the channel as well as in the spacer region, the latter being the dominant mechanism. Combining hot carrier and charge pumping experiments and 2D device simulations, the origin and location of degradation can be determined. Hot electron injection is localised well into the spacer, leading to a degradation in on-resistance (Ron). Only 10 % of these injected electrons form interface states. For low Vgs, injection (and degradation) is highest, and a smaller amount of hole injection at the poly edge shows up. For high Vgs or longer stress times, the electron injection shifts further into the spacer reducing the degradation effect.