On Reassembly Delay in Packet Switching Networks
Abstract The purpose of this paper is to develop an algorithm to compute the reassembly delay of a multi-packet message in a packet switching network. The network is assumed to employ virtual circuits subject to window flow control. A direct consequence of this algorithm is an expression for the mean message delay in such a network. The heart of the algorithm is the computation of the probability distribution for the location of the trailing packet of a packet pair. Two exact methods, based upon the convolution algorithm and the mean value analysis, are developed for product-form queueing networks. Heuristics were developed in order to render the algorithm computationally feasible, and to extend it to non product-form networks. Simulations are employed to validate the results in all cases.