Time Resolved Imaging: From logical states to events, a new and efficient pattern matching method for VLSI analysis
Time Resolved Imaging (TRI) allows real time imaging of transitions in CMOS gates even for very deep submicron technologies at low power supply voltage. Anyway, the measured timing information differs from waveform measurement where logical states are easily extracted. We first introduce logical event with a 1 value when we have transition from one logical state to its complement (0-1 or 1-0) or 0 value when there is no change between 2 vectors. Events can be extracted from TRI database and then used for a very accurate and efficient pattern matching method. In this paper, we demonstrate how we move from logical state to events and the extreme accuracy of pattern matching. Results are shown on 45 nm CMOS technology.