Side-channel Masking with Pseudo-Random Generator
High-order masking countermeasures against side-channel attacks usually require plenty of randomness during their execution. For security against t probes, the classical ISW countermeasure requires \(\mathcal{O}(t^2 s)\) random bits, where s is the circuit size. However running a True Random Number Generator (TRNG) can be costly in practice and become a bottleneck on embedded devices. In [IKL+13] the authors introduced the notion of robust pseudo-random number generator (PRG), which must remain secure even against an adversary who can probe at most t wires. They showed that when embedding a robust PRG within a private circuit, the number of random bits can be reduced to \(\mathcal{\tilde{O}}(t^{4})\), that is independent of the circuit size s (up to a logarithmic factor). Using bipartite expander graphs, this can be further reduced to \(\mathcal{\tilde{O}}(t^{3+\varepsilon })\); however the resulting construction is impractical.