A comparison of early stage hot carrier degradation behaviour in 5 and 3 V sub-micron low doped drain metal oxide semiconductor field effect transistors
Abstract This paper reports the early stage of dc hot carrier degradation behaviour of n-channel low doped drain metal oxide semiconductor field effect transistors in a range of deep sub-micron technologies. A deviation from the normally observed power-law expression tn at short time scales is revealed. In addition, under VG=VD condition, anomalous behaviour characterised by a saturation in the transconductance degradation prior to the power-law regime is observed. The factors contributing to the damage evolution are analysed by extraction of the parasitic source–drain series resistance and the effective mobility. Depending on the voltage rating of the technology, the relative contributions of these two underlying causes, at various times, to the total degradation are different. For the 5 V technologies, both the series resistance and the mobility play significant roles, with the early stage dominated by an increase in series resistance. On the other hand, the series resistance has a negligible influence relative to the mobility on the degradation mechanism of the 3 V technologies.