An SEU resilient, SET filterable and cost effective latch in presence of PVT variations
Abstract This paper presents a single event upset (SEU) resilient, single event transient (SET) filterable and cost effective latch (referred to as RFEL) using 45 nm CMOS commercial technology. By means of triple mutual feedback CMOS structures, one of which is an input-split Schmitt trigger, and two of which are Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset regardless of the energy of a striking particle. The latch filters a much wider spectrum of single event transient on account of hysteresis property of the embedded input-split Schmitt trigger, and temporal redundancy in the grouped inputs of the Muller C-element at output stage. The latch performs with lower overheads regarding area, power, and delay than most of the single event upset and single event transient simultaneously tolerated latches as well. Simulation results show that the area-power-delay-pulse product of the latch is 65.58% saving on average, and Monte Carlo simulation results demonstrate the equivalent or even less sensitivity of the latch to process, and temperature variations, compared with the previous radiation hardened latches.