An a VLSI driving circuit for memristor based STDP
The main goal in realizing a VLSI (analog VLSI) systems able to mimic functionalities of biological neural networks is pointed to the reproduction of realistic synapses. Indeed, because of the relative high synapse/neuron ratio, especially in the case of extremely dense networks (i.e. reproduction of a real scenario) synapses represent a considerable limitation in terms of waste of silicon area and power consumption as well. Thanks to advancement made in the implementation of memristor, the interest in bio inspired neural network design has been renewed. Memristors have tunable resistance which depends on its past state; this is analogous to the operating mode of biological synapses. In this paper, we present the circuit implementation of a simple memristor based neural network. Here, we propose a driving circuit model that not requires specific shape input pulses to change the memristor conductance (i.e. synaptic strength) but it can be driven by arbitrary shaped input pulses. Moreover, this prototype circuit offers the chance of emulating the standard STDP behavior allowing "controlled" changes for the synaptic weights. Some preliminary experimental results are reported to validate the proposed driving circuit.
2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)