3 D ANALYSIS OF A COPPER FLIP CHIP INTERCONNECTION USING FIB SEM SLICE AND VIEW
Recently, flip chip assembly has become mainstream for fine pitch interconnection in large scale integration packages. Gold studs and copper pillars with solder caps are two types of bumps in common use.[1] Gold stud bumps are commonly used for interconnecting dice with peripheral layouts. Gold gold bonding has the advantage of a low process temperature, and gold solder with adhesive has good wettability of the joint without flux. The use of copper pillar with a solder cap has the advantage of gang fine pitch bumping by wafer plating. Increases in the number of bumps, narrowing of pitch, and cost pressures have driven the adoption of copper pillar/ solder cap bumping in high performance mobile devices. Copper pillar bumps on the die are interconnected to the copper pad on the substrate in a solder reflow process. The use of thermal compression bonding (TCB) and preapplied underfill for fine pitch interconnection is growing due to its precise alignment of bump and pad and the minimization of global stress on the assembly. Concerns with the technology, however, include entrapment of adhesive components and voids in the joint due to solder shrinkage.