SDSoC: A Higher level Programming Environment for Zynq SoC and Ultrascale+ MPSoC
Zynq 7000 All Programmable SoC and the new Zynq Ultrascale+ MPSoC provide proven alternatives to traditional domain specific application SoCs and enable extensive system level differentiation, integration and flexibility through hardware, software and I/O programmability. The SDSoC Development Environment is a heterogeneous design environment for implementing embedded systems using the Zynq SoC and MPSoC. It enables the broader community of embedded software developers to leverage the power of hardware and software programmable devices, entirely from a higher level of abstraction. The SDSoC environment provides a greatly simplified embedded C/C+ application programming experience including an easy to use Eclipse IDE and a comprehensive development platform. SDSoC includes a full system optimizing C/C+ compiler, system level profiling and hardware/software event tracing, automated software acceleration in programming logic, automated generation of SW HW connectivity, and integration with libraries to speed programing. The SDSoC compiler transforms programs into complete hardware/software systems based on user specified target platform and functions within the program to compile into programmable hardware logic. Hardware accelerators communicate with the CPU and external memory through an automatically generated, application specific data motion network comprised of DMAs, interconnects and other standard IP blocks. The SDSoC Environment also provides flows for customer and 3rd party developers to enable their platforms and integrate RTL IPs as C callable libraries. It builds upon customer proven design tools from Xilinx including Vivado Design Suite, Vivado High level Synthesis and SDK. In this presentation, we will introduce the motivation and basic concepts behind SDSoC, describe its capabilities and the user flow, and provide a brief demonstration of the tool using an example.
FPGA