A variable FPGA based generic QAM transmitter with scalable mixed time and frequency domain signal processing
The flexibility of Field Programmable Gate Arrays (FPGAs) as well as their parallel processing capabilities make them a good choice for digital signal processing in communication systems. However, today, further improvements in performance hang in mid air as we run into the frequency wall and FPGA based devices are clocked below 1 GHz. New methodologies which can cater performance optimization within the frequency wall limitation become highly essential. In this context, efficient modulation techniques like Quadrature Amplitude Modulation (QAM) and mixed time and frequency domain approach have been utilized in this paper to employ a generic scalable FPGA based QAM transmitter with the filter parallelization being executed in mixed domain. The system developed in this paper achieves a throughput of 4 Gb/s for QAM 16 format with a clock frequency as low as 62.5 MHz, thereby, paves down a promising methodology for applications where having higher clock frequencies is a hard limit.
2016 39th International Conference on Telecommunications and Signal Processing (TSP)