Massively Concurrent Red Black Trees with Hardware Transactional Memory
Hardware Transactional Memory (HTM) is nowadays available in several commercial and HPC targeted processors and in the future it will likely be available on systems that can accommodate a very large number of threads. Thus, it is essential for the research community to target on evaluating HTM on as many cores as possible in order to understand the virtues and limitations that come with it. In this paper we utilize HTM to parallelize accesses on a classic data structure, a red black tree. With minimal programming effort, we implement a red black tree by enclosing each operation in a single HTM transaction and evaluate it on two servers equipped with Intel Haswell EP and IBM Power8 processors, supporting a large number of hardware threads, namely 56 and 160 respectively. Our evaluation reveals that applying HTM in such a simplistic manner allows scalability for up to a limited number of hardware threads. To fully utilize the underlying hardware we apply different optimizations on each platform.
2016 24th Euromicro International Conference on Parallel, Distributed, and Network Based Processing (PDP)