A Study on the Programming Structures for RRAM Based FPGA Architectures
Field Programmable Gate Arrays (FPGAs) can benefit non volatility and high performance by exploiting Resistive Random Access Memories (RRAMs) In RRAM based FPGAs, the memories do not only replace the SRAMs and store configurations, but they can also replace the transmission gates and propagate datapath signals. The high performance achievable by RRAM based FPGAs comes from the fact that the on resistance of the memory devices RLRS is smaller than the equivalent resistance of a transmission gate. Efficient programming structures for RRAMs should provide high current density with a small area footprint, to obtain a low RLRS. In this paper, we first examine the efficiency of the widely used 2Transistor/1RRAM (2T1R) programming structure and identify four major limitations of the 2T1R structure. To overcome these limitations, we propose a 2Transmission Gates/1RRAM (2TG1R) and a 4Transistor/ 1RRAM (4T1R) programming structures. We perform both theoretical analysis and electrical simulations on the evaluated programming structures. 4T1R programming structure is the best in terms of current density with 1.4 x and 1.1 x as compared to 2T1R and 2TG1R counterparts, respectively. We also investigate the effect of boosting the programming voltage Vprog of the programming structures. Experimental results show that boosting Vprog for all the programming structures improves driving current of the evaluated programming structures by 3 x and area efficiency by 1.7 x on average.
IEEE Transactions on Circuits and Systems I: Regular Papers