Development of Experimental Methodology for Improved Local Variability Assessment in Advanced CMOS Devices
Microelectronic systems and their applications are everywhere in the current human civilization, from the simplest gadget in our everyday life to fiction like space probes which let us see wonderful pictures of other worlds within the Solar System and beyond. The semiconductor industry has become, since its inception in the 1960s, one of the largest and growing industries with approximately a 350 billion dollars market.The central device of microelectronics is the transistor, which has experienced enormous improvements in the last half century, boosted by the economic and human investments to follow the so called "Moore's law" which states that the number of transistors in a chip doubles every two years. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has become the preferred transistor in the industry for digital applications. With the miniaturization of the transistor, a major challenge is to deal with transistor Variability, as its impact becomes more and more important with decreasing size. Two identically fabricated transistors may present highly different characteristics; when this Variability is systematic in nature, we can often find a way to eliminate it using fabrication means or model it very accurately; nevertheless, Statistical Variability is the other major component of Local Variability which is more complicated to deal with; in fact, Statistical Variability is random in nature, as it results from de granular nature of matter and also from the difficulty of control atom per atom placement in an industrial level. Then, it becomes necessary to precisely characterize and model Local Statistical Variability for Variability aware design to better predict circuit fails from simple standard circuits to final products.The purpose of this project is to go further in the characterization means of MOSFET Local Variability by revisiting existing test structures, and to develop methods of analysis to extract the maximum of relevant information about transistor Variability sources and impact from experiments conducted on improved test structures. One important merit for the Variability characterization methods developed in this project is to enable an accurate statistical modeling of Local Variations and their impact throughout the design space; to meet the goal, the methods developed must provide statistical parameters with well established confidence, and be suited for implementation on statistical models within the circuit design flow.To achieve this objective, this work is a common project of STMicroelectronics and IMEP LAHC laboratory, which benefit from access to 28 nm silicon technology home design test structures and state of the art characterization facilities.The project is primarily focused on local variability (in micrometer scale and below) whether of systematic or statistical nature. Nevertheless, some aspects of Intrawafer and Systematic Variations are studied when it is necessary to discriminate Local Variability from other effects.