Wafer Map Defect Detection and Recognition Using Joint Local and Nonlocal Linear Discriminant Analysis
In semiconductor manufacturing processes, defect detection and recognition in wafer maps have received increasing attention from semiconductor industry. The various defect patterns in wafer maps provide crucial information for assisting engineers in recognizing the root causes of the fabrication problems and solving them eventually. This paper develops a manifold learning based wafer map defect detection and recognition system. In this system, a joint local and nonlocal linear discriminant analysis (JLNDA) is proposed to discover intrinsic manifold information that provides the discriminant characteristics of the defect patterns. An unsupervised version of JLNDA (called local and nonlocal preserving projection) is further developed to provide a monitoring chart for defect detection of wafer maps. A JLNDA based Fisher discriminant is further put forward for online defect recognition without the modeling procedure of recognizers. Comparisons with other regular methods, principal component analysis, local preserving projection, linear discriminant analysis (LDA) and local LDA, illustrate the superiority of JLNDA in wafer map defect recognition. The effectiveness of the proposed system has been verified by experimental results from a real world data set of wafer maps (WM 811K)
IEEE Transactions on Semiconductor Manufacturing