A new low voltage level shifted FVF current mirror with enhanced bandwidth and output resistance
ABSTRACT This paper proposes a new high performance level shifted flipped voltage follower (LSFVF) based low voltage current mirror (CM) The proposed CM utilises the low supply voltage and low input resistance characteristics of a flipped voltage follower (FVF) CM. In the proposed CM, level shifting configuration is used to obtain a wide operating current range and resistive compensation technique is employed to increase the operating bandwidth. The peaking in frequency response is reduced by using an additional large MOSFET. Moreover, a very high output resistance (in G range) along with low current transfer error is achieved through super cascode configuration for a wide current range (0 440 uA) Small signal analysis is carried out to show the improvements achieved at each step. The proposed CM is simulated by Mentor Graphics Eldospice in TSMC 0.18 um CMOS, BSIM3 and Level 53 technology. In the proposed CM, a bandwidth of 6.1799 GHz, 1% settling time of 0.719 ns, input and output resistances of 21.43 and 1.14 G, respectively, are obtained with a single supply voltage of 1 V. The layout of the proposed CM has been designed and post layout simulation results have been shown. The post layout simulation results for Monte Carlo and temperature analysis have also been included to show the reliability of the CM against the variations in process parameters and temperature changes.