Hardware implementation of fast traffic sign recognition for intelligent vehicle system
In intelligent vehicle systems, the traffic sign recognition (TSR) has become very important because of the rapid increase in demand of intelligent transportation system (ITS) However, most of them were implemented by expensive systems due to the high complex computation for processing the real time segmentation and recognition process. In this paper, the preprocessing with the red region extraction in the RGB color space has been applied to improve TSR performance. To implement proposed architecture, we adopt the Xilinx Virtex 7 V2000T Field Programmable Gate Array (FPGA) with a fully pipelined structure. Experimental results show that the implemented preprocessing block use 1,212 lookup table (LUT) and 11.14 KB sized internal memory. The proposed architecture enables a real time TSR processing with pipelining for a full HD (FHD) video (2 Mega pixels) at 60 frames per second.
2016 International SoC Design Conference (ISOCC)