FPGA based parallel implementation of morphological filters
This paper presents a parallel algorithm and its hardware architecture for implementing 2 D gray scale morphological operations namely dilation and erosion using rectangular flat top structuring elements. The proposed architecture supports parallel extension whereby throughput and processing frame rate is enhanced. The architecture is fully generic and runtime programmable with respect to image size and structuring elements size respectively. The main advantage of the architecture is its low latency, lower internal memory requirements, higher processing frame rate and throughput which makes it more amenable to real time applications. Additionally, it makes use of stream processing which eliminates the need for buffering image data, whereby memory overhead is minimized. The architecture has been synthesized using Xilinx Design Suite 14.2 ISE and prototyped on Virtex 5 FPGA Board and verified using xilinx ISIM Simulator. The proposed architecture has been tested for images of varied gray scale geometric dimension and the results shows satisfactory performance.
2016 International Conference on Microelectronics, Computing and Communications (MicroCom)