30791016
Extending the Limits of Sequentially Phased Reasoning
Verification via abstraction is the topic of concluding correctness of a complicated program from correctness of an abstraction of this program. Principles for sequentially phased reasoning are examples of verification via abstraction. They use permutation equivalences to abstract concurrent programs which logically work in phases to considerably simpler variants which perform these phases sequentially. It is shown in this paper that there are classes of concurrent programs, such as self-stabilizing ones, which logically work in phases but cannot be abstracted to a sequentialized version using permutation equivalence. A new class of so-called Ω-equivalences is defined which generalizes permutation equivalence and stutter equivalence. It is proved that both equivalences are indeed special cases of Ω-equivalences. A verification strategy based on Ω-equivalences is formulated and compared with existing approaches for sequentially phased reasoning. The strategy is applied to a self-stabilizing coloring program that can neither be abstracted by permutation nor by stutter equivalences to a sequentialized version.
17738680
Hierarchical Automata as Model for Statecharts
Statecharts are a very rich graphical specification formalism supported by the commercial tool Statemate. Statecharts comprises powerful concepts such as interlevel transitions, multiple-source/multiple-target transitions, priority amongst transitions and simultaneous execution of maximal non-conflicting sets of transitions. Every add-on tool which is supposed to be linked with the Statemate tool have to deal with the rather involved semantics of these concepts. We propose extended hierarchical automata as an intermediate format to facilitate the linking of new tools to the Statemate environment, whose main idea is to devise a simple formalism with a more restricted syntax than statecharts which nevertheless allows to capture the richer formalism. We define the format, give operational semantics to it, and translate statecharts to it.
1155385
Implementing statecharts in PROMELA/SPIN
We translate statecharts into PROMELA, the input language of the SPIN verification system, using extended hierarchical automata as an intermediate format. We discuss two possible frameworks for this translation, leading to either sequential or parallel code. We show that in this context the sequential code can be verified more efficiently than the parallel code. We conclude with a discussion of an application of the resulting translator to a well-known case study, which demonstrates the feasibility of linear temporal logic model checking of statecharts.
6090717
From Testing Theory to Test Driver Implementation
In this article we describe the theoretical foundations for the VVT-RT test system (Verification, Validation and Test for Reactive Real-Time Systems) which supports automated test generation, test execution and test evaluation for reactive systems. VVT-RT constructs and evaluates tests based on formal CSP specifications [6], making use of their representation as labelled transition systems generated by the CSP model checker FDR [3]. The present article provides a sound formal basis for the development and verification of high-quality test tools: Since, due to the high degree of automation offered by VVT-RT, human interaction becomes superfluous during critical phases of the test process, the trustworthiness of the test tool is an issue of great importance. The VVT-RT system will therefore be formally verified so that it can be certified for testing safety-critical systems. The present article represents the starting point of this verification suite, where the basic strategies for test generation and test evaluation used by the system are formally described and verified. VVT-RT has been designed to support automation of both untimed and real-time tests. The present article describes the underlying theory for the untimed case. Exploiting these results, the concepts and high-level algorithms used for the automation of real-time tests are described in a second report which is currently prepared [14]. At present, VVT-RT is applied for hardware-in-the-loop tests of railway and tramway control computers.
33236770
Formal Verification of Stabilizing Systems
This paper links too formerly rather disjoint areas: formal verification and stabilization. Stabilization is a vitally emerging paradigm in fault tolerant distributed computing; formal verification investigates mathematically rigorous techniques to reason about systems.
6836947
Deductive verification of stabilizing systems
31386871
A Study of Singularity Formation in the Kelvin-Helmholtz Instability with Surface Tension
The possibility of singularity formation in vortex sheets acted on by surface tension is considered. In the evolution of a nearly flat vortex sheet with viscosity and surface tension neglected, Kelvin-Helmholtz instability has been shown to lead to the development of curvature singularities on the sheet. This is not unexpected, as the linearized equations of motion for this flow exhibit short-wavelength instability: infinitesimal perturbations grow at an infinite rate. Since the inclusion of surface tension stabilizes (on linear theory) the high-wavenumber modes, it has been presumed that it also suppresses the formation of singularities. The possibility of singularity formation is examined by generalizing Moore's approximation for vortex sheets to include the presence of surface tension. For the approximate theory, traveling wave solutions that develop singularities on the interface in finite time are found. Computations of the traveling wave solution are provided to reveal other features, and comparisons between these solutions and previously computed solutions of the full equations are made.
37254437
Exact Solutions for the Evolution of a Bubble in Stokes Flow: A Cauchy Transform Approach
A Cauchy transform approach to the problem of determining the free surface evolution of a single bubble in Stokes flow is developed. A number of exact solutions to a class of problems have been derived in the literature using conformal mapping theory, and these solutions are retrieved and further generalized using the new formulation. Certain quantities which are conserved by the dynamics are also identified, the existence of which had not previously been pointed out. A principal purpose of this paper is to use the new formulation to understand when it is possible to externally specify the evolution of the bubble area in such classes of exact solution. It is found to be possible only for certain types of far-field boundary conditions.
15409109
Untwist your brain - Efficient debugging and diagnosis of complex assertions
Assertions are recognized in the industry to be a major improvement in functional RTL verification flows. Today's standard assertion languages, such as SVA [1] and PSL [2], are very expressive, capable of describing sophisticated temporal design behavior at different abstraction levels. Nevertheless, most assertion users stick to writing simple assertions because of the intricacy and effort required to debug complex assertions - one of the major bottlenecks in assertion based verification. We present debugging and diagnosis techniques that automatically identify those parts of an assertion that cause the assertion to fail for a given design and that provide additional automation to efficiently identify the root cause of the failure. These techniques enable major effort savings when working with complex assertions, allowing engineers to use the full capabilities of assertion languages. This enables further productivity and quality improvements in functional verification by lifting mainstream assertion usage to higher abstraction levels such as efficient capture and verification of high-level design features, operations, and transactions. Advanced debugging automation is key for this progress - solving a problem that many designers and verification engineers face in their daily work.
14822655
Translation Validation
15882359
Deciding Equality Formulas by Small Domains Instantiations
We introduce an efficient decision procedure for the theory of equality based on finite instantiations. When using the finite instantiations method, it is a common practice to take a range of [1..n] (where n is the number of input non-Boolean variables) as the range for all non-Boolean variables, resulting in a state-space of nn. Although various attempts to minimize this range were made, typically they either required various restrictions on the investigated formulas or were not very effective. In many cases, the nn state-space cannot be handled by BDD-based tools within a reasonable amount of time. In this paper we show that significantly smaller domains can be algorithmically found, by analyzing the structure of the formula. We also show an upper bound for the state-space based on this analysis. This method enabled us to verify formulas containing hundreds of integer and floating point variables.