14170978
Improving Data Access Performance with Server Push Architecture
Data prefetching, where data is fetched before CPU demands for it, has been considered as an effective solution to mask data access latency. However, the current client-initiated prefetching strategies do not work well for applications with complex, non-contiguous data access patterns. While technology advances continue to enlarge the gap between computing and data access performance, trading computing power for data access delay has become a natural choice. We propose a server-based data-push approach. In this server-push architecture, a dedicated server named data push server (DPS) initiates and proactively pushes data closer to the client in time. We present the DPS architecture and study the issues such as what data to fetch, when to fetch, how to push, and data access modeling.
12297104
CoStore: a reliable and highly available storage system using clusters
The CoStore cluster architecture is proposed to construct a reliable and highly available storage system. A prototype CoStore was implemented and its performance was measured with the cluster being mirrored in various network environments. The preliminary results demonstrate that there is little impact on performance if the cluster is mirrored in efficient campus network environments with high bandwidth and low latency. As a result the CoStore architecture considerably reinforces a storage system's preparedness for disaster recovery without sacrificing performance.
43007315
The impact of smart disks and spatial reuse property on RAID-5 storage systems
RAID storage systems using SCSI and traditional disk drives cannot meet the growing demand of new I/O intensive applications. New technologies such as smart disks and SSA are being proposed to improve the performance, scalability, and reliability of RAID systems. The objective of this work is to investigate the impact of smart disks and SSA's spatial reuse property on the performance of RAID-5 storage systems. In order to perform this work, we have enhanced CMU's RAIDframe simulator so that it accurately models the overhead of current SCSI and SSA protocols, and we have created smart disk models which include on-drive XOR logic and on-drive caches. We observe that neither smart disks alone nor spatial reuse property alone has much impact on RAID system performance. However, if smart disks and spatial reuse property are properly used in combination, RAID-5 system performance and scalability can be further enhanced. In particular, we propose a parity caching approach to improve the performance of small writes.
61649411
Parallel I/O prefetching using MPI file caching and I/O signatures
Parallel I/O prefetching is considered to be effective in improving I/O performance. However, the effectiveness depends on determining patterns among future I/O accesses swiftly and fetching data in time, which is difficult to achieve in general. In this study, we propose an I/O signature-based prefetching strategy. The idea is to use a predetermined I/O signature of an application to guide prefetching. To put this idea to work, we first derived a classification of patterns and introduced a simple and effective signature notation to represent patterns. We then developed a toolkit to trace and generate I/O signatures automatically. Finally, we designed and implemented a thread-based client-side collective prefetching cache layer for MPI-IO library to support prefetching. A prefetching thread reads I/O signatures of an application and adjusts them by observing I/O accesses at runtime. Experimental results show that the proposed prefetching method improves I/O performance significantly for applications with complex patterns.
14925300
A Taxonomy of Data Prefetching Mechanisms
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been proposed in the last few years to reduce data access latency by taking advantage of multi-core architectures. In this paper, we propose a taxonomy that classifies various design concerns in developing a prefetching strategy. We discuss various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi-core processors.
417212
Taxonomy of Data Prefetching for Multicore Processors
Data prefetching is an effective data access latency hiding technique to mask the CPU stall caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been developed for single-core processors. Recent developments in processor technology have brought multicore processors into mainstream. While some of the single-core prefetching techniques are directly applicable to multicore processors, numerous novel strategies have been proposed in the past few years to take advantage of multiple cores. This paper aims to provide a comprehensive review of the state-of-the-art prefetching techniques, and proposes a taxonomy that classifies various design concerns in developing a prefetching strategy, especially for multicore processors. We compare various existing methods through analysis as well.
7318403
Numerical solutions of coupled Burgers equations with time- and space-fractional derivatives
In this paper, by introducing the fractional derivative in the sense of Caputo, the Adomian decomposition method is directly extended to study the coupled Burgers equations with time- and space-fractional derivatives. As a result, the realistic numerical solutions are obtained in a form of rapidly convergent series with easily computable components. The figures show the effectiveness and good accuracy of the proposed method.
14066096
ADM-Padé technique for the nonlinear lattice equations
ADM-Pade technique is a combination of Adomian decomposition method (ADM) and Pade approximants. We solve two nonlinear lattice equations using the technique which gives the approximate solution with higher accuracy and faster convergence rate than using ADM alone. Bell-shaped solitary solution of Belov-Chaltikian (BC) lattice and kink-shaped solitary solution of the nonlinear self-dual network equations (SDNEs) are presented. Comparisons are made between approximate solutions and exact solutions to illustrate the validity and the great potential of the technique.
37352290
Comparison of Two Fitness Functions for GA-Based Path-Oriented Test Data Generation
Automatic path-oriented test data generation is not only a crucial problem but also a hot issue in the research area of software testing today. As a robust metaheuritstic search method in complex spaces, genetic algorithm (GA) has been used to path-oriented test data generation since 1992 and outperforms other approaches. A fitness function based on branch distance (BDBFF) and another based on normalized extended Hamming distance (SIMILARITY) are both applied in GA-based path-oriented test data generation. To compare performance of these two fitness functions, a triangle classification program was chosen as the example. Experimental results show that BDBFF-based approach can generate path-oriented test data more effectively and efficiently than SIMILARITY- based approach does.
46139740
Automatic Path-Oriented Test Data Generation Using a Multi-population Genetic Algorithm
Automatic path-oriented test data generation is an undecidable problem and genetic algorithm (GA) has been used to test data generation since 1992. In favor of MATLAB, a multi-population genetic algorithm (MPGA) was implemented, which selects individuals for free migration based on their fitness values. Applying MPGA to generating path-oriented test data generation is a new and meaningful attempt. After depicting how to transform path-oriented test data generation into an optimization problem, basic process flow of path-oriented test data generation using GA was presented. Using a triangle classifier as program under test, experimental results show that MPGA based approach can generate path-oriented test data more effectively and efficiently than simple GA based approach does.
206370432
An accurate sampling-based method for approximating geometry
We present a sampling-based method for approximating the boundary of a geometry defined by various geometric operations. Based on a novel adaptive sampling condition, we first construct volumetric grids such that an error-minimizing point can be found in each cell to capture all the geometric objects inside the cell. We then construct a polygonal model from the grid. We guarantee the boundary approximation has the same topology as the exact surfaces, and the maximum approximation error from the exact surfaces is bounded by a user specified tolerance. Our method is robust and easy to implement. We have applied it in various applications such as remeshing of polygonal models, Boolean operations, and offsetting operations. We report experimental results on a variety of CAD models.