15267488
Data access history cache and associated data prefetching mechanisms
Data prefetching is an effective way to bridge the increasing performance gap between processor and memory. As computing power is increasing much faster than memory performance, we suggest that it is time to have a dedicated cache to store data access histories and to serve prefetching to mask data access latency effectively. We thus propose a new cache structure, named Data Access History Cache (DAHC), and study its associated prefetching mechanisms. The DAHC behaves as a cache for recent reference information instead of as a traditional cache for instructions or data. Theoretically, it is capable of supporting many well known history-based prefetching algorithms, especially adaptive and aggressive approaches. We have carried out simulation experiments to validate DAHC design and DAHC-based data prefetching methodologies and to demonstrate performance gains. The DAHC provides a practical approach to reaping data prefetching benefits and its associated prefetching mechanisms are proven more effective than traditional approaches.
43007315
The impact of smart disks and spatial reuse property on RAID-5 storage systems
RAID storage systems using SCSI and traditional disk drives cannot meet the growing demand of new I/O intensive applications. New technologies such as smart disks and SSA are being proposed to improve the performance, scalability, and reliability of RAID systems. The objective of this work is to investigate the impact of smart disks and SSA's spatial reuse property on the performance of RAID-5 storage systems. In order to perform this work, we have enhanced CMU's RAIDframe simulator so that it accurately models the overhead of current SCSI and SSA protocols, and we have created smart disk models which include on-drive XOR logic and on-drive caches. We observe that neither smart disks alone nor spatial reuse property alone has much impact on RAID system performance. However, if smart disks and spatial reuse property are properly used in combination, RAID-5 system performance and scalability can be further enhanced. In particular, we propose a parity caching approach to improve the performance of small writes.
12297104
CoStore: a reliable and highly available storage system using clusters
The CoStore cluster architecture is proposed to construct a reliable and highly available storage system. A prototype CoStore was implemented and its performance was measured with the cluster being mirrored in various network environments. The preliminary results demonstrate that there is little impact on performance if the cluster is mirrored in efficient campus network environments with high bandwidth and low latency. As a result the CoStore architecture considerably reinforces a storage system's preparedness for disaster recovery without sacrificing performance.
14925300
A Taxonomy of Data Prefetching Mechanisms
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been proposed in the last few years to reduce data access latency by taking advantage of multi-core architectures. In this paper, we propose a taxonomy that classifies various design concerns in developing a prefetching strategy. We discuss various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi-core processors.
61649411
Parallel I/O prefetching using MPI file caching and I/O signatures
Parallel I/O prefetching is considered to be effective in improving I/O performance. However, the effectiveness depends on determining patterns among future I/O accesses swiftly and fetching data in time, which is difficult to achieve in general. In this study, we propose an I/O signature-based prefetching strategy. The idea is to use a predetermined I/O signature of an application to guide prefetching. To put this idea to work, we first derived a classification of patterns and introduced a simple and effective signature notation to represent patterns. We then developed a toolkit to trace and generate I/O signatures automatically. Finally, we designed and implemented a thread-based client-side collective prefetching cache layer for MPI-IO library to support prefetching. A prefetching thread reads I/O signatures of an application and adjusts them by observing I/O accesses at runtime. Experimental results show that the proposed prefetching method improves I/O performance significantly for applications with complex patterns.
417212
Taxonomy of Data Prefetching for Multicore Processors
Data prefetching is an effective data access latency hiding technique to mask the CPU stall caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been developed for single-core processors. Recent developments in processor technology have brought multicore processors into mainstream. While some of the single-core prefetching techniques are directly applicable to multicore processors, numerous novel strategies have been proposed in the past few years to take advantage of multiple cores. This paper aims to provide a comprehensive review of the state-of-the-art prefetching techniques, and proposes a taxonomy that classifies various design concerns in developing a prefetching strategy, especially for multicore processors. We compare various existing methods through analysis as well.
16724396
Weighted Rough Graph and Its Application
Rough graph is the graph that can be used to research uncertainty problems, and it is a new research tool to analyze the rough characteristic of the system according to Tong He and Kaiquan Shi. This paper makes further research on rough graph, and gives the definitions of class connection of rough graph and some subgraphs of rough graph. Furthermore, this paper presents the definition of weighted rough graph by enduing the edges of rough graph with weight attribute, and gives the algorithm of exploring the class optimal tree in weighted rough graph, which generalizes the classical Kruskal algorithm of exploring the optimal tree. Finally, the application in relationship analysis shows the effectiveness of the algorithm
37352290
Comparison of Two Fitness Functions for GA-Based Path-Oriented Test Data Generation
Automatic path-oriented test data generation is not only a crucial problem but also a hot issue in the research area of software testing today. As a robust metaheuritstic search method in complex spaces, genetic algorithm (GA) has been used to path-oriented test data generation since 1992 and outperforms other approaches. A fitness function based on branch distance (BDBFF) and another based on normalized extended Hamming distance (SIMILARITY) are both applied in GA-based path-oriented test data generation. To compare performance of these two fitness functions, a triangle classification program was chosen as the example. Experimental results show that BDBFF-based approach can generate path-oriented test data more effectively and efficiently than SIMILARITY- based approach does.
9130265
Wireless drive and control of a swimming microrobot
A swimming microrobot actuated by two FMP (ferromagnetic polymer) fins was developed. The robot could be driven by external magnetic field wirelessly. Fabrication process and performance of the FMP actuators were presented. Working principle and scaling effect of the robot were analyzed. Experimental results demonstrated that the microrobot could swim under the water, and the speed and direction could be controlled.
46139740
Automatic Path-Oriented Test Data Generation Using a Multi-population Genetic Algorithm
Automatic path-oriented test data generation is an undecidable problem and genetic algorithm (GA) has been used to test data generation since 1992. In favor of MATLAB, a multi-population genetic algorithm (MPGA) was implemented, which selects individuals for free migration based on their fitness values. Applying MPGA to generating path-oriented test data generation is a new and meaningful attempt. After depicting how to transform path-oriented test data generation into an optimization problem, basic process flow of path-oriented test data generation using GA was presented. Using a triangle classifier as program under test, experimental results show that MPGA based approach can generate path-oriented test data more effectively and efficiently than simple GA based approach does.
135957559
Accelerated Publication: A resist for electric imprint lithography
An electrically curable resist has been developed that can make electric imprint lithography (EIL) a reality. The resist is composed of a diaryliodonium salt photo acid generator and a cycloaliphatic epoxy monomer. Its polymerization takes place when an electric potential is applied between a conductive imprint mold and a substrate which sandwich the resist. A proof-of-concept pattern transfer by EIL with a micron-scale resolution has been demonstrated.