14925300
A Taxonomy of Data Prefetching Mechanisms
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been proposed in the last few years to reduce data access latency by taking advantage of multi-core architectures. In this paper, we propose a taxonomy that classifies various design concerns in developing a prefetching strategy. We discuss various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi-core processors.
61649411
Parallel I/O prefetching using MPI file caching and I/O signatures
Parallel I/O prefetching is considered to be effective in improving I/O performance. However, the effectiveness depends on determining patterns among future I/O accesses swiftly and fetching data in time, which is difficult to achieve in general. In this study, we propose an I/O signature-based prefetching strategy. The idea is to use a predetermined I/O signature of an application to guide prefetching. To put this idea to work, we first derived a classification of patterns and introduced a simple and effective signature notation to represent patterns. We then developed a toolkit to trace and generate I/O signatures automatically. Finally, we designed and implemented a thread-based client-side collective prefetching cache layer for MPI-IO library to support prefetching. A prefetching thread reads I/O signatures of an application and adjusts them by observing I/O accesses at runtime. Experimental results show that the proposed prefetching method improves I/O performance significantly for applications with complex patterns.
17242205
On the (co)girth of a connected matroid
This article studies the girth and cogirth problems for a connected matroid. The problem of finding the cogirth of a graphic matroid has been intensively studied, but studies on the equivalent problem for a vector matroid or a general matroid have been rarely reported. Based on the duality and connectivity of a matroid, we prove properties associated with the girth and cogirth of a matroid whose contraction or restriction is disconnected. Then, we devise algorithms that find the cogirth of a matroid M from the matroids associated with the direct sum components of the restriction of M. As a result, the problem of finding the (co)girth of a matroid can be decomposed into a set of smaller sub-problems, which helps alleviate the computation. Finally, we implement and demonstrate the application of our algorithms to vector matroids.
5789716
Reevaluating Amdahl's law in the multicore era
Microprocessor architecture has entered the multicore era. Recently, Hill and Marty presented a pessimistic view of multicore scalability. Their analysis was based on Amdahl's law (i.e. fixed-workload condition) and challenged readers to develop better models. In this study, we analyze multicore scalability under fixed-time and memory-bound conditions and from the data access (memory wall) perspective. We use the same hardware cost model of multicore chips used by Hill and Marty, but achieve very different and more optimistic performance models. These models show that there is no inherent, immovable upper bound on the scalability of multicore architectures. These results complement existing studies and demonstrate that multicore architectures are capable of extensive scalability.
15212853
Core-aware memory access scheduling schemes
Multi-core processors have changed the conventional hardware structure and require a rethinking of system scheduling and resource management to utilize them efficiently. However, current multi-core systems are still using conventional single-core memory scheduling. In this study, we investigate and evaluate traditional memory access scheduling techniques, and propose a core-aware memory scheduling for multi-core environments. Since memory requests from the same source exhibit better locality, it is reasonable to schedule the requests by taking the source of the requests into consideration. Motivated from this principle of locality, we propose two core-aware policies based on traditional bank-first and row-first schemes. Simulation results show that the core-aware policies can effectively improve the performance. Compared with the bank-first and row-first policies, the proposed core-aware policies reduce the execution time of certain NAS Parallel Benchmarks by up to 20% in running the benchmarks separately, and by 11% in running them concurrently.
417212
Taxonomy of Data Prefetching for Multicore Processors
Data prefetching is an effective data access latency hiding technique to mask the CPU stall caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been developed for single-core processors. Recent developments in processor technology have brought multicore processors into mainstream. While some of the single-core prefetching techniques are directly applicable to multicore processors, numerous novel strategies have been proposed in the past few years to take advantage of multiple cores. This paper aims to provide a comprehensive review of the state-of-the-art prefetching techniques, and proposes a taxonomy that classifies various design concerns in developing a prefetching strategy, especially for multicore processors. We compare various existing methods through analysis as well.
37797167
A wide dynamic range CMOS image sensor with pulse-frequency-modulation and in-pixel amplification
This paper briefly examines the pros and cons of CMOS pulse-frequency-modulation (PFM) digital pixel sensors. A pulse-frequency-modulation digital pixel sensor with in-pixel amplification is proposed to improve the resolution of the pixel sensor at low illumination. The proposed PFM digital pixel sensor offers the characteristics of a reduced integration time when the level of illumination is low with the fill factor comparable to that of PFM digital pixel sensors without in-pixel amplification. The proposed digital image sensor has been designed in [email protected] 1.8V CMOS technology and validated using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results demonstrate that the dynamic range of the proposed PFM digital pixel sensor with in-pixel amplification is 20dB larger as compared with that of PFM digital pixel sensors without in-pixel amplification. The increased dynamic range is obtained in the low illumination condition where PFM digital pixel sensors without in-pixel amplification cease the operation due to the low photo current.
46139740
Automatic Path-Oriented Test Data Generation Using a Multi-population Genetic Algorithm
Automatic path-oriented test data generation is an undecidable problem and genetic algorithm (GA) has been used to test data generation since 1992. In favor of MATLAB, a multi-population genetic algorithm (MPGA) was implemented, which selects individuals for free migration based on their fitness values. Applying MPGA to generating path-oriented test data generation is a new and meaningful attempt. After depicting how to transform path-oriented test data generation into an optimization problem, basic process flow of path-oriented test data generation using GA was presented. Using a triangle classifier as program under test, experimental results show that MPGA based approach can generate path-oriented test data more effectively and efficiently than simple GA based approach does.
34540225
A Region-Based Image Enhancement Algorithm with the Grossberg Network
In order to enhance the contrast of an image, histogram equalization is wildly used. With global histogram equalization (GHE), the image is enhanced as a whole, and this may induce some areas to be overenhanced or blurred. Although local histogram equalization (LHE) acts adaptively to overcome this problem, it brings noise and artifacts to image. In this paper, a region-based enhancement algorithm is proposed, in which Grossberg network is employed to generate histogram and extract regions. Simulation results show that the image is obviously improved with the advantage of both GHE and LHE.
37352290
Comparison of Two Fitness Functions for GA-Based Path-Oriented Test Data Generation
Automatic path-oriented test data generation is not only a crucial problem but also a hot issue in the research area of software testing today. As a robust metaheuritstic search method in complex spaces, genetic algorithm (GA) has been used to path-oriented test data generation since 1992 and outperforms other approaches. A fitness function based on branch distance (BDBFF) and another based on normalized extended Hamming distance (SIMILARITY) are both applied in GA-based path-oriented test data generation. To compare performance of these two fitness functions, a triangle classification program was chosen as the example. Experimental results show that BDBFF-based approach can generate path-oriented test data more effectively and efficiently than SIMILARITY- based approach does.
41322043
New exact travelling wave solutions for the shallow long wave approximate equations
Based upon a generally projective Riccati equation method, which is a direct and unified algebraic method for constructing more general form travelling wave solutions of nonlinear partial differential equations and implemented in a computer algebraic system, we consider the shallow long wave approximate equations. New and more general form solutions are obtained, including kink-shaped solitons, bell-shaped solitons, singular solitons and periodic solutions. The properties of the new formal solitary wave solutions are shown by some figures.