17176468
Status report on the LOC ASIC
Based on a commercially available 0.25 μm Silicon on Sapphire CMOS technology, we are developing the LOC ASIC for high speed serial data transmission in the front-end electronics systems of the ATLAS upgrade for the SLHC 1 . Evaluation of this technology for applications in the SLHC, based on a dedicated test chip, has been performed with irradiation tests in gamma (Co-60) and in 230 MeV proton beams. Test results indicate that this may be a candidate technology of ASIC developments for the SLHC. More thorough evaluation tests will be carried out under another R&D program supported through the Advanced Detector Research (ADR) from the Department of Energy. Characterization tests on the first prototype serializer, LOC1, have been carried out in lab. Based on the lessons learned from this chip, we propose a new architecture design of the second prototype, LOC2, aiming for a serial data rate in the range of 5 Gbps. Simulation on key components of LOC2 are being carried out and the results we have so far are presented in this note. LOC2 is scheduled to be submitted for fabrication in the first half of 2009.
111231338
Update on the high speed serializer ASIC development for ATLAS Liquid Argon calorimeter upgrade
We have been developing a serializer application-specific integrated circuit (ASIC) based on a commercial 0.25-μm silicon-on-sapphire (SOS) CMOS technology for the ATLAS liquid argon calorimeter front-end electronics upgrade. The first prototype, a 5 Gbps 16:1 serializer has been designed, fabricated, and tested in lab environment and in a 200 MeV proton beam. The test results indicate that the first prototype meets the design goals. The second prototype, a double-lane, 8 Gbps per lane serializer is under development. The post-layout simulation indicates that 8 Gbps is achievable. In this paper we present the design and the test results of the first prototype and the design and status of the second prototype.
15092713
A serializer ASIC for high speed data transmission in cryogenic and HiRel environment
A high speed 16:1 serializer ASIC has been developed using a commercial 0.25 μm silicon-on-sapphire CMOS technology. At room temperature the ASIC operates from 4.0 to 5.7 Gbps with power consumption of 463 mW. The total jitter is 62 ps at the bit error rate of 10−12 at 5 Gbps. A 200-MeV proton beam test indicates that the ASIC is suitable for high energy physics applications. A liquid nitrogen temperature test indicates that the ASIC may be used at cryogenic temperature applications. The reliability of the serializer at liquid nitrogen temperature is to be studied. A 6-lane serializer array with 10 Gbps/lane with redundancy capability is under development.
122670904
The design of 8-Gbps VCSEL drivers for ATLAS liquid Argon calorimeter upgrade
We present designs and preliminary test results of LOCld1 and LOCld4, VCSEL drivers in a commercial 0.25-mu m m Silicon-on-Sapphire (SoS) CMOS process for ATLAS liquid Argon calorimeter upgrade. Active shunt peaking, multiple-stage amplification and higher voltage supply are used to achieve the data rate of 8 Gbps. LOCld1 is a single channel VCSEL driver with a differential output, while LOCld4 has four channels with single-ended open-drain outputs. Both drivers have tunable modulation and peaking strength. Bias current for VCSEL is also embedded.
109713979
Link model simulation and power penalty specification of the versatile link systems
This paper presents simulation and experimental studies of optical power penalties on the Versatile Link, a common R&D project on high-speed optical link for SLHC experiments. The 10 Gigabit Ethernet (10GbE) link model is examined and conservative link power penalties are predicted. We conduct parameter sensitivity analyses and find that the transmitter characteristics affect the link power penalties most. Power penalty differences of multi-mode and single-mode commerical transceiver modules over different fiber lengths are tested to be within the simulation limits. The optical power budgets are then proposed for different Versatile Link variants.
14992394
An Optical Demo-Link for ATLAS Inner Detector Readout Upgrade
The GOL ASIC is a serializer chip developed by CERN based on a 0.25 μm CMOS technology [1]. The GOL operates with two data rates: 800 Mbps and 1.6 Gbps. This ASIC has been evaluated with radiation tolerance requirement for the ATLAS Inner Detector upgrade for the SLHC 1 . A demo-link has been designed and constructed to read out silicon detectors in the test staves through fiber optics. Through this demo-link we plan to study system issues in a giga-bit optical link. This concept will be extended to future serializer ASICs like the GBTx and the LOC when they become available. Experience gained from these demolinks will help us design and build a reliable optical readout system for new ATLAS Inner Detector readout.
119264713
Measuring Di-Higgs Physics via the $t \bar t hh \to t \bar t b \bar bb\bar b$ Channel
The measurement of di-Higgs physics can provide crucial information on electroweak phase transition in the early Universe and significant clues on new physics coupling with the Higgs field directly. This measurement has been suggested to be pursued mainly via the $pp \to hh$ production. In this letter, we propose a new strategy to do that, i.e., via the $pp \to t \bar t hh $ production. Because of its positive correlation with the rescaled tri-Higgs coupling $\frac{\lambda}{\lambda_{\rm SM}}$ (in comparison to a negative one for the $pp \to hh$ production) in the neighborhood of $\frac{\lambda}{\lambda_{\rm SM}} \sim 1$, the $pp \to t\bar t hh$ production complements the $pp \to hh$ one in measuring di-Higgs physics, particularly for $\frac{\lambda}{\lambda_{\rm SM}}>1$, at both the High Luminosity LHC (HL-LHC) and a next-generation $pp$-collider. As an illustration, we work on the process $pp\to t\bar thh \to t\bar t b\bar b b\bar b$. We show that a statistical significance of $> 2.0 \sigma$ at the HL-LHC, comparable to that of the $pp \to hh \to b\bar b \gamma\gamma$ channel, and a statistical significance of $\sim 5 \sigma$ at a 100 TeV $pp$-collider, with 3000 fb$^{-1}$ of data, are achievable in searching for the di-Higgs production with $\frac{\lambda}{\lambda_{\rm SM}} = 1$.
118915813
Supersymmetric Pati–Salam models from intersecting D6-branes: a road to the Standard Model
Abstract We provide a systematic construction of three-family N = 1 supersymmetric Pati–Salam models from Type IIA orientifolds on T 6 / ( Z 2 × Z 2 ) with intersecting D6-branes. All the gauge symmetry factors SU ( 4 ) C × SU ( 2 ) L × SU ( 2 ) R arise from the stacks of D6-branes with U ( n ) gauge symmetries, while the “hidden sector” is specified by USp ( n ) branes, parallel with the orientifold planes or their Z 2 images. The Pati–Salam gauge symmetry can be broken down to the SU ( 3 ) C × SU ( 2 ) L × U ( 1 ) B − L × U ( 1 ) I 3 R via D6-brane splittings, and further down to the Standard Model via D- and F-flatness preserving Higgs mechanism from massless open string states in a N = 2 subsector. The models also possess at least two confining hidden gauge sectors, where gaugino condensation can in turn trigger supersymmetry breaking and (some) moduli stabilization. The systematic search yields 11 inequivalent models: 8 models with less than 9 Standard Model Higgs doublet-pairs and 1 model with only 2 Standard Model Higgs doublet-pairs, 2 models possess at the string scale the gauge coupling unification of SU ( 2 ) L and SU ( 2 ) R , and all the models possess additional exotic matters. We also make preliminary comments on phenomenological implications of these models.
118316245
Exotic Higgs Decay h to 2a at the International Linear Collider: a Snowmass White Paper
A Higgs factory like the International Linear Collider (ILC) can play a significant role in searching for exotic decays of Higgs bosons. As an illustration, we investigate the ILC sensitivity for the decay topology $h\to a_1 a_1 \to \tau\bar \tau\tau \bar \tau$ in the Next-to-Minimal-Supersymmetric-Standard-Model (NMSSM). Here $h$ can be either Standard-Model-like or non-standard, and $a_{1}$ is the lightest CP-odd Higgs boson. We also compare results to expectations for this channel at the LHC.
118634638
Flavor transition mechanisms of propagating astrophysical neutrinos: A model independent parametrization
One of the important goals for future neutrino telescopes is to identify the flavors of astrophysical neutrinos and therefore determine the flavor ratio. The flavor ratio of astrophysical neutrinos observed on the Earth depends on both the initial flavor ratio at the source and flavor transitions taking place during propagations of these neutrinos. We propose a model independent parametrization for describing the above flavor transitions. A few flavor transition models are employed to test our parametrization. The observational test for flavor transition mechanisms through our parametrization is discussed.
119209516
Polarized view of the top asymmetry
Recent experimental results from the CDF collaboration which study the top forward-backward asymmetry have strengthened the case that new physics is playing a role in $t\overline{t}$ production. Here, we propose a set of measurements, built from the charged lepton kinematics in semileptonic and fully leptonic $t\overline{t}$ events, designed to further probe the underlying causes of this asymmetry both at the Tevatron and at the LHC. Using a set of conservative reference models, we find that measurements of the charged lepton asymmetry, top polarization, and $t\overline{t}$ spin correlation can establish the existence of new physics and distinguish between competing models both at the Tevatron and the LHC. At the Tevatron, discrimination between models is possible at the $3\ensuremath{\sigma}$ level. At the LHC, we demonstrate that a top forward-backward asymmetry can be established at $\ensuremath{\gtrsim}3\ensuremath{\sigma}$ in the first $\ensuremath{\sim}5\text{ }\text{ }{\mathrm{fb}}^{\ensuremath{-}1}$ of data and show how competing explanations can be further disentangled.