2698498
An Approach for Adaptive DRAM Temperature and Power Management
High-performance DRAMs are providing increasing memory access bandwidth to processors, which is leading to high power consumption and operating temperature in DRAM chips. In this paper, we propose a customized low-power technique for high-performance DRAM systems to improve DRAM page hit rate by buffering write operations that may incur page misses. This approach reduces DRAM system power consumption and temperature without any performance penalty. We combine the throughput-aware page-hit-aware write buffer (TAP) with low-power-state-based techniques for further power and temperature reduction, namely, TAP-low. Our experiments show that a system with TAP-low could reduce the total DRAM power consumption by up to 68.6% (19.9% on average). The steady-state temperature can be reduced by as much as 7.84°C and 2.55°C on average across eight representative workloads.
16272826
Analyzing the impact of on-chip network traffic on program phases for CMPs
It is known that the execution of programs exhibits repetitive phases; in other words, the execution of programs can be partitioned into segments of execution, during which the application exhibits unique architectural properties. This property has been used for various optimization goals. In addition, phase information is utilized to reduce the run time of the architectural simulation. Conventionally, an application is examined in an architecture-independent manner (such as the number of times a basic block is executed) to extract information about the phases and then only the representative execution intervals are executed to analyze architectural choices. We claim that such approaches are becoming inadequate in the many-core era as application execution is not dominated by the instructions only, but instead the communication structure of the application is becoming as important as the instruction behavior. Hence, we propose to utilize communication behavior to determine the phases of an application. Our results reveal that the inclusion of the communication information can increase the accuracy of the phase detection significantly. Specifically, for SPLASH2 and MineBench applications, the average (geometric mean) CPI error rate with the instruction-based phase detection is 11.01%, while our phase detection scheme has an average error rate of 3.41% when compared to the simulations that run the applications to completion.
17718771
Balancing Trust and Incentive in Peer-to-Peer Collaborative System
In order to maximize resource utilization as well as providing trust management in P2P computing environments, we propose a novel framework - Trust-Incentive Service Management (TIM). Having child model, club model, bid model and trust model, TIM is constructed based on role based price strategy. In this mechanism, providers set the price according to demand and supply, and consumers maximize the surplus upon budget and deadline. A weighted voting scheme is also proposed to secure the P2P system by declining the join request from malicious peers. TIM is scalable and efficient in that: (1) it is completely distributed without a central server; (2) it dynamically manages the price and service by integrating valuables of pricing, trust, and incentive. A TIM prototype has been successfully implemented in a real P2P system, CROWN. We evaluate the proposed approach through comprehensive experiments and achieve improved results in service allocation efficiency, system completion time, and aggregated resource utilization.
7672026
A power and temperature aware DRAM architecture
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temperature in DRAM chips. As a result, temperature management has become a real and pressing issue in high performance DRAM systems. Traditional low power techniques are not suitable for high performance DRAM systems with high bandwidth. In this paper, we propose and evaluate a customized DRAM low power technique based on page hit aware write buffer (PHA-WB). Our proposed approach reduces DRAM system power consumption and temperature without any performance penalty. Our experiments show that a system with a 64-entry PHA-WB could reduce the total DRAM power consumption by up to 22.0% (9.6% on average). The peak and average temperature reductions are 6.1degC and 2.1degC, respectively.
6412815
Automated task distribution in multicore network processors using statistical analysis
Chip multiprocessor designs are the most common types of architectures seen in Network Processors. As the Network Processors are used to implement increasingly complicated applications, task distribution among the cores is becoming an important problem. In this paper, we propose a new task allocation scheme for such architectures. This scheme relies on the inherent modular nature of the networking applications and intelligently distributes modules among different execution cores. Additionally, we selectively replicate modules to parallelize execution of tasks having longer processing time. We have developed a technique that uses the probability distribution of the execution times of different modules in the networking applications. The proposed schemes result in resource utilization of up to 95%, 89%, and 84% on average for the processors with 2, 4, and 8 cores, respectively. The schemes are highly scalable and can improve the throughput by 6.72 times for 8 core processors, aggregated over four representative applications. The combination of selective replication of modules and variation-aware task allocation result in up to 12.5% (9.9% on average) performance improvement as compared to a scheme based on just mean processing time.
7761771
Access control in peer-to-peer collaborative systems
As an emerging model of communication and computation, peer-to-peer networking represents a fully distributed, cooperative network design, and has recently gained significant acceptance. Peer groups share the properties of peer-to-peer overlay network, including full decentralization, symmetric abilities, and dynamism, which make security problems more complicated. In this paper, we propose a fine-grained and attribute-based access control framework for peer-to-peer systems. This design employs a novel policy model, which extends role-based trust management language RT to satisfy security requirements of peer groups. Intend for a pure decentralized model without centralized server, our framework presents distributed delegation authorization mechanism, which could avoid single point of failure. We also introduce our implementation experience.
24687403
A synthesis scheme for simultaneous scheduling, binding, partitioning and placement with resources operating at multiple voltages
One promising technique to reduce power consumption is to power a chip with multiple supply voltages. However, as noticed by M.C. Johnson and K. Roy (see ACM Trans. Design Auto. Electronic Syst., vol.2, p.227-48, 1997), multiple voltage designs can cause a number of serious layout problems. We have shown that the layout problems can be partially solved by the addition of a partitioning step into the synthesis flow. A more subtle solution to solve the layout problems requires placement also to be included in the design flow. We present a synthesis scheme, following a simulated annealing engine, to minimize power consumption and area with resources operating at multiple voltages under timing constraints. The scheme simultaneously considers many correlated factors, such as scheduling, binding, partitioning and placement, to reduce power consumption due to both functional units and interconnections between and among them. Experiments with a number of DSP benchmarks show that the proposed algorithm can achieve significant reduction in power and area.
20139173
Muscle-driven modeling of wrinkles for 3D facial expressions
Facial expression animation considering wrinkle formation is an aspiring goal and a challenging task. This paper presents a new geometric wrinkle model that is defined according to facial muscle anatomy for efficient simulation of dynamic wrinkles within expressions. Our method is applied to an anatomy-based face model with a multi-layer structure of skin, muscles, and skull. The location and orientation of the wrinkles are automatically determined based on muscle contraction and its influence on the skin. Corresponding to two types of facial muscles, the geometric wrinkle model governs evolution of wrinkle amplitude in the local deformed face regions. It provides intuitive parameters for easy control over wrinkle characteristics by taking into account the properties of real wrinkles. Results show that this method enables realistic wrinkles synchronized with facial movements to be dynamically simulated and rendered at an interactive rate.
17199895
An Active Storage System for High Performance Computing
Traditionally, active storage devices execute custom application code on large amounts of data by utilizing the unused processing power of the storage nodes. For computation-intensive applications, the performance might be quite low due to insufficient processing power on the storage devices. In this paper we present a reconfigurable computing solution that can provide flexible, high-performance processing capabilities for the storage nodes. We have made a change over the existing active storage framework for object-based storage device by off loading computation-intensive request-driven services to a reconfigurable hardware accelerator. In the experiment, we use two applications (AES encryption and FFT) as the case studies, and the results show that the reconfigurable computing-based system can dramatically increase the performance comparing with the traditional software-based active storage systems.
42884670
Eulerian path methods for multiple sequence alignment
With the rapid increase in the size of genome sequence databases, the multiple sequence alignment problem is increasingly important and often requires the alignment of a large number of sequences. Beginning in 1975, many heuristic algorithms have been created to improve the speed of computation and the quality of alignment. We introduce a novel approach that is fundamentally distinct from all currently available methods. Our motivation comes from the Eulerian method for fragment assembly in DNA sequence determination, that transforms all the DNA sequencing fragments into a de Bruijn graph and then reduces sequence assembly to a Eulerian path problem.
18767986
Applying Hypothetical Queries to E-Commerce Systems to Support Reservation and Personal Preferences
Online travel continues to be one of the most successful e-commerce categories on the Internet. As increasing number of people book online, existing e-ticket systems can not satisfy customers' growing demand. Customers complain about most of the current e-ticket systems for the lack of "reservation" functionality. They also complain that these systems are not "intelligent" enough as a traditional travel agent who can deal with more complicated personal preferences. In this paper, we propose a transaction model for e-commerce system to support reservation functionality while balancing the benefits and risks of both customers and airlines. We introduce the theory of hypothetical query to avoid unnecessary transactions and rollbacks on underlying database. Hypothetical queries can be generated automatically and transformed into relational algebra queries which can be optimized with conventional techniques. We extend the lazy approach for evaluating hypothetical queries with integrity constraints to deal with customers' personal preferences. We also provide the "watch" and "remind" mechanism to help customers to purchase their most desirable tickets. Although we have chosen ticket booking system as our target application, the framework presented in this paper is also applicable to other e-commerce systems.