17498280
A Hardware Approach for Reducing Interpretation Overhead
Abstract—An interpreter reads instructions of the source executable and perform each corresponding operation in turn on a software-maintained version of the old ISA’s state. Interpretation has emerged as an important tool with real world applications. Interpretation is always adopted to support instruction set emulation and handle the non-hotspot code in a two-stage dynamic binary translation strategy. An important consideration of an interpreter is the runtime overhead. We investigate that repeated re-decode operations are the bottleneck of interpretation overhead. We propose interpreted code cache (Pcache), a hardware assist, to save the information of the decoded instruction for reuse. We analyze and model Pcache performance via a real interpretation system. Results from SPEC2000 integer benchmarks show that Pcache could significantly reduce re-decode operations and the overhead of interpretation. We demonstrate that the hardware Pcache is a highly effective approach, and the extra overhead is neglectable compared to the performance gains.
21499977
Predicate Analysis Based on Path Information
Predicated execution leads new challenges to traditional optimizers. Limited by predicate representations, current predicate analysis methods could only perform locally or have low efficiency. A new representation based on path information is proposed in this paper, based on which a global predicate relation query system is constructed. Experiment results indicate that precise and efficient global predicate analysis could be achieved with this system and the performance of optimized codes can also be improved.
11178688
Dynamically utilizing computation accelerators for extensible processors in a software approach
In recent years, it is increasingly common to see using application specific instruction set processors (ASIPs) in embedded system designs. These ASIPs can offer the ability of customizing hardware computation accelerators for an application domain. Along with instruction set extensions (ISEs), the customized accelerators can significantly improve the performance of embedded processors, which has already been exemplified in previous research work and industrial products. However, these accelerators in ASIPs can only accelerate the applications that are compiled with ISEs. Those applications compiled without ISEs can not benefit from the hardware accelerators at all. In this paper, we propose using software dynamic binary translation to overcome this problem, i.e. dynamically utilizing the accelerators. Unlike a static approach, dynamically utilizing accelerator poses many new problems. This paper comprehensively explores the techniques and design choices for solving these problems, and demonstrates the effectiveness by the results of experiments.
17173257
DBTIM: An Advanced Hardware Assisted Full Virtualization Architecture
Previous full virtualization techniques are implemented in software without any hardware assist. In this paper, for the first time, we propose an advanced hardware assisted full virtualization architecture-Dynamic Binary Translation in DIMM (DBTIM). We integrate a reconfigurable dynamic binary translation chip into a DIMM. DBTIM could be inserted to the mainboard as a normal DIMM, hence easily making the host CPU virtualizable. We also implement a DBTIM prototype on FPGA. Furthermore, we propose an EDBTIM technique-Enhanced Dynamic Binary Translator in Memory, which integrates dynamic binary translator and memory on one SDRAM chip. We analyze our new approaches and compare them with other modern virtualization techniques. We demonstrate that the new techniques in this paper could provide full virtualization to all kinds of CPU architectures, including x86, with better virtualization capability, better software and hardware compatibility, better performance and lower overheads.
15513401
A Novel Hardware Assisted Full Virtualization Technique
Virtual machine technology is rapidly emerging as an important component of future computer systems. Full virtualization with dynamic binary translation outperforms paravirtualization and hardware assisted virtualization in x86 CPU virtualization. Previous full virtualization techniques are implemented in software without any hardware assist. In this paper, for the first time, we propose a novel hardware assisted full virtualization technique-dynamic binary translation in DIMM (DBTIM). We integrate a reconfigurable dynamic binary translation chip into a DIMM. DBTIM could be inserted to the mainboard as a normal DIMM, hence easily making the host CPU virtualizable. We also implement a DBTIM prototype on FPGA. We analyze our new approach and compare it with other modern virtualization techniques. We demonstrate that the new technique in this paper could provide full virtualization to all kinds of CPU architectures, including x86, with better virtualization capability, better software and hardware compatibility, better performance and lower overheads.
15979714
A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design
The floating-point multiply-add fused (MAF) unit sets a new trend in the processor design to speed up floatingpoint performance in scientific and multimedia applications. This paper proposes a new architecture for the MAF unit that supports multiple IEEE precisions multiply-add operation (AtimesB+C) with Single Instruction Multiple Data (SIMD) feature. The proposed MAF unit can perform either one double-precision or two parallel single-precision operations using about 18% more hardware than a conventional double-precision MAF unit and with 9% increase in delay. To accommodate the simultaneous computation of two single-precision MAF operations, several basic modules of double-precision MAF unit are redesigned. They are either segmented by precision mode dependent multiplexers or attached by the duplicated hardware. The proposed MAF unit can be fully pipelined and the experimental results show that it is suitable for processors with floatingpoint unit (FPU).
6228733
Shape Analysis and Spatio-Temporal Tracking of Mesoscale Eddies in Miami Isopycnic Coordinate Ocean Model
Detection and analysis of ocean surface phenomena have so far relied on manual analysis of long sequences of satellite images or images produced from the mathematical models. In this paper a technique for the three-dimensional shape analysis and spato-temporall tracking of mesoscale eddies from MICOM dataset is presented. Mesoscale eddies play a strong role in carrying heat poleward. The shape analysis of eddies provides a volumetric estimation which can be further used to determine the heat trapped in eddies. Eddies are detected and the region of swirling currents around the detected center is segmented. Segmented eddies are stacked to generate 3D visualization. A 3D skeleton is obtained with the centroids of all the layers in the segmented eddy and represented parametrically. Coefficients of the parametric representation are used for motion tracking of eddies.
19415028
Unified model in identity subspace for face recognition
Human faces have two important characteristics: (1) They are similar objects and the specific, variations of each face are similar to each other; (2) They are nearly bilateral symmetric. Exploiting the two important properties, we build a unified model in identity subspace (UMIS) as a novel technique for face recognition from only one example image per person. An identity subspace spanned by bilateral symmetric bases, which compactly encodes identity information. is presented. The unified model, trained on an obtained training set with multiple samples per class from a known people groupA, can be generalized well to facial images of unknown individuals, and can be used to recognize facial images from an unknown people groupB with only one sample per subject. Extensive experimental results on two public databases (the Yale database and the Bern database) and our own database (the ICT-JDL database) demonstrate that the UMIS approach is significantly effective and robust for face recognition.
6802677
A surface-based approach for classification of 3D neuroanatomic structures
We present a new framework for 3D surface object classification that combines a powerful shape description method with suitable pattern classification techniques. Spherical harmonic parameterization and normalization techniques are used to describe a surface shape and derive a dual high dimensional landmark representation. A point distribution model is applied to reduce the dimensionality. Fisher's linear discriminants and support vector machines are used for classification. Several feature selection schemes are proposed for learning better classifiers. After showing the effectiveness of this framework using simulated shape data, we apply it to real hippocampal data in schizophrenia and perform extensive experimental studies by examining different combinations of techniques. We achieve best leave-one-out cross-validation accuracies of 93% (whole set, N = 56) and 90% (right-handed males, N = 39), respectively, which are competitive with the best results in previous studies using different techniques on similar types of data. Furthermore, to help medical diagnosis in practice, we employ a threshold-free receiver operating characteristic (ROC) approach as an alternative evaluation of classification results as well as propose a new method for visualizing discriminative patterns.
18590624
Fourier method for large-scale surface modeling and registration
Spherical harmonic (SPHARM) description is a powerful Fourier shape modeling method for processing arbitrarily shaped but simply connected 3D objects. As a highly promising method, SPHARM has been widely used in several domains including medical imaging. However, its primary use has been focused on modeling small or moderately-sized surfaces that are relatively smooth, due to challenges related to its applicability, robustness and scalability. This paper presents an enhanced SPHARM framework that addresses these issues and show that the use of SPHARM can expand into broader areas. In particular, we present a simple and efficient Fourier expansion method on the sphere that enables large scale modeling, and propose a new SPHARM registration method that aims to preserve the important homological properties between 3D models. Although SPHARM is a global descriptor, our experimental results show that the proposed SPHARM framework can accurately describe complicated graphics models and highly convoluted 3D surfaces and the proposed registration method allows for effective alignment and registration of these 3D models for further processing or analysis. These methods greatly enable the potential of applying SPHARM to broader areas such as computer graphics, medical imaging, CAD/CAM, bioinformatics, and other related geometric modeling and processing fields.
14826038
A Spatio-Temporal Modeling Method for Shape Representation
The spherical harmonic (SPHARM) description is a powerful surface modeling technique that can model arbitrarily shaped but simply connected three dimensional (3D) objects. Because SPHARM based 3D models can derive functional information analysis and classify different pathological symptoms, it has been used in many applications in biomedical image computing. There is an urgent requirement for efficient spatio-temporal shape modeling to represent the dynamic anatomical structures in many applications (e.g., medical image analysis, geospatial information systems). In this paper we propose a novel real spherical harmonics based spatio-temporal shape modeling method to efficiently and flexibly represent the shapes sequence of anatomical structures in medical images. Our method works well on the simply connected 3D objects and the effectiveness of our approach is demonstrated through theoretic and experimental exploration of a set of medical image applications. Furthermore, an evaluation criterion for spatio-temporal shape modeling efficiency is proposed and the comparison results showed the good performance of our method.