16724396
Weighted Rough Graph and Its Application
Rough graph is the graph that can be used to research uncertainty problems, and it is a new research tool to analyze the rough characteristic of the system according to Tong He and Kaiquan Shi. This paper makes further research on rough graph, and gives the definitions of class connection of rough graph and some subgraphs of rough graph. Furthermore, this paper presents the definition of weighted rough graph by enduing the edges of rough graph with weight attribute, and gives the algorithm of exploring the class optimal tree in weighted rough graph, which generalizes the classical Kruskal algorithm of exploring the optimal tree. Finally, the application in relationship analysis shows the effectiveness of the algorithm
20327796
An effective algorithm of motif finding problem
Identification of the short DNA sequence motif, which serves as binding targets for transcription factors, is a fundamental problem in both computer science and molecular biology. Especially, finding the subtle motifs with variable gaps is more challenging. In this paper, a new algorithm is presented, which explores some new strategies. Based on a neighbourhood set concept, a new probability matrix is defined, which can capture the target motifs effectively. An iterative restart strategy is used, by which we can use several similar motifs' information to detect the real motif to demonstrate the effectiveness of our algorithm. We test it on several kinds of data and compare it with some other current representation algorithms. Simulation shows that the algorithm can effectively detect the subtle motifs.
20054988
Elastic Algorithm: A New Path Planning Algorithm About Auto-navigation in 3D Virtual Scene
Elastic Algorithm proposed in this paper is a new and fast path planning algorithm to solve the problem of auto-navigation in 3D virtual scene. First, with a grid model based representation of virtual environments, different obstacles are assigned different color in the projection map of scene and their encasing boxes are stored to provide local path. Then, Elastic Algorithm is designed to optimize the basic path. It can be applied to complex condition and moving object, and has high stability and efficiency in solving the path planning problem.
38431053
An Optimization Method Based on Chaotic Immune Evolutionary Algorithm
Immune Evolutionary Algorithm (IEA) is proposed on the shortages of evolution algorithm and biological immune mechanism. According to the characteristics of chaos, a novel Chaotic Immune Evolutionary Algorithm (CIEA) is presented which introduces chaos to IEA. The algorithm has the merits of chaos, immunity and evolutionary algorithm. It can ensure the ability of global search and local search and enhance the performances of the algorithm. At last, we analyze the efficiency of the algorithm with two typical optimization problems. The analysis result shows that CIEA converges quickly and effectively avoids the inherent problem that the evolution algorithm traps in immature convergence, so CIEA is an effective way to solve complex optimization problem.
43007315
The impact of smart disks and spatial reuse property on RAID-5 storage systems
RAID storage systems using SCSI and traditional disk drives cannot meet the growing demand of new I/O intensive applications. New technologies such as smart disks and SSA are being proposed to improve the performance, scalability, and reliability of RAID systems. The objective of this work is to investigate the impact of smart disks and SSA's spatial reuse property on the performance of RAID-5 storage systems. In order to perform this work, we have enhanced CMU's RAIDframe simulator so that it accurately models the overhead of current SCSI and SSA protocols, and we have created smart disk models which include on-drive XOR logic and on-drive caches. We observe that neither smart disks alone nor spatial reuse property alone has much impact on RAID system performance. However, if smart disks and spatial reuse property are properly used in combination, RAID-5 system performance and scalability can be further enhanced. In particular, we propose a parity caching approach to improve the performance of small writes.
11827610
A Runtime System for Dynamic DAG Programming
A runtime system is described here for dynamic DAG execution. A large D A G whihc represents an application program can be executed on a parallel system without consuming large amount of memory space. A DAG scheduling algorithm has been parallelized to scale to large systems. Inaccurate estimation of task execution time and comm unication time can be tolerated. Implementation of this parallel incremental system demonstrates the feasibility of this approach. Preliminary results show that it is superior to other approaches.
1674566
Server-Based Data Push Architecture for Multi-Processor Environments
Data access delay is a major bottleneck in utilizing current high-end computing (HEC) machines. Prefetching, where data is fetched before CPU demands for it, has been considered as an effective solution to masking data access delay. However, current client-initiated prefetching strategies, where a computing processor initiates prefetching instructions, have many limitations. They do not work well for applications with complex, non-contiguous data access patterns. While technology advances continue to increase the gap between computing and data access performance, trading computing power for reducing data access delay has become a natural choice. In this paper, we present a server-based data-push approach and discuss its associated implementation mechanisms. In the server-push architecture, a dedicated server called Data Push Server (DPS) initiates and proactively pushes data closer to the client in time. Issues, such as what data to fetch, when to fetch, and how to push are studied. The SimpleScalar simulator is modified with a dedicated prefetching engine that pushes data for another processor to test DPS based prefetching. Simulation results show that L1 Cache miss rate can be reduced by up to 97% (71% on average) over a superscalar processor for SPEC CPU2000 benchmarks that have high cache miss rates.