14517815
Implementing Atomic Section by Using Hybrid Concurrent Control
Atomic section is an important language feather in multi- thread synchronizing. So far, it can only be implemented by using pessimistic or optimistic concurrent control singly. This paper introduces a flexible hybrid concurrent control system which could harmonize the two modes of concurrent control. Accordingly, a new atomic section is proposed as language level support to open an interface for both manual and compiler-assisted optimization.
11971991
Formal Reasoning about Concurrent Assembly Code with Reentrant Locks
This paper focuses on the problem of reasoning about concurrent assembly code with reentrant locks. Our verification technique is based on concurrent separation logic (CSL). In CSL, locks are treated as non-reentrant locks and each lock is associated with a resource invariant, the lock-protected resources are obtained and released through acquiring and releasing the lock respectively. In order to accommodate for reentrancy, we introduce some additional notions into our specification language to describe reentrant level for each acquiring and releasing lock operation. Keeping track of the reentrant level for each lock in the pre- and post- conditions enables the program logic to ensure that resources are not reacquired upon reentrancy, thus resources owned by a thread are prevented from reintroducing in the postcondition. Our framework is fully mechanized. Its soundness has been verified using the Coq proof assistant. We demonstrate the usage of our framework through giving a safety proof of a simple program.
8620934
Certifying Concurrent Programs Using Transactional Memory
Transactional memory (TM) is a new promising concurrency-control mechanism that can avoid many of the pitfalls of the traditional lock-based techniques. TM systems handle data races between threads automatically so that programmers do not have to reason about the interaction of threads manually. TM provides a programming model that may make the development of multi-threaded programs easier. Much work has been done to explore the various implementation strategies of TM systems and to achieve better performance, but little has been done on how to formally reason about programs using TM and how to make sure that such reasoning is sound. In this paper, we focus on the semantics of transactional memory and present a proof-carrying code (PCC) system for reasoning about programs using TM. We formalize our reasoning with respect to the TM semantics, prove its soundness, and use examples to demonstrate its effectiveness.
15870104
Homomorphism Resolving of XPath Trees Based on Automata
As a query language for navigating XML trees and selecting a set of element nodes, XPath is ubiquitous in XML applications. One important issue of XPath queries is containment checking, which is known as a co-NP complete. The homomorphism relationship between two XPath trees, which is a PTIME problem, is a sufficient but not necessary condition for the containment relationship. We propose a new tree structure to depict XPath based on the level of the tree node and adopt a method of sharing the prefixes of multi-trees to construct incrementally the most effective automata, named XTHC (XPath Trees Homomorphism Checker). XTHC takes an XPath tree and produces the result of checking homomorphism relationship between an arbitrary tree in multi-trees and the input tree, thereinto the input tree is transformed into events which force the automata to run. Moreover, we consider and narrow the discrepancy between homomorphism relationship and containment relationship as possible as we can.
15507709
Data-Layout Optimization Using Reuse Distance Distribution
As the ever-increasing gap between the speed of processor and the speed of memory has become the cause of one of primary bottlenecks of computer systems, modern architecture systems use cache to solve this problem, whose utility heavily depends on program data locality. This paper introduces a platform independent data-layout optimization framework to improve program data locality. This framework uses a variable relation model based on variables’ reuse distance distribution to quantitate the relation of variables and accordingly assigns variables which are often accessed together in one group. At the same time this framework introduces a dynamic array regrouping method to group dynamic arrays assigned in a group. Experiments show that this data-layout optimization framework can effectively improve program data locality and program performance.
18773440
An Agent-based Simulation Study for Exploring Organizational Adaptation
Agile enterprises with different organizational structures manifest different organizational behaviors when responding to environmental changes. In this paper, we use a computational model to examine organizational adaptation on four dimensions: Agility, Robustness, Resilience, and Survivability. We analyze the dynamics of organizational adaptation by a simulation study on the interaction between tasks and organization in a sales enterprise. The `what if' analyses in different scenarios show that more flexible communication between employees and less hierarchy level with the suitable centralization can improve organizational adaptation. The developed simulation model supports the exploration of the parametric space that defines alternative organizing processes for the optimal strategy given the specified environmental dynamics.
2899555
Scalable Video Transmission over the IEEE 802.11e Networks Using Cross-Layer Rate Control
This paper presents a novel cross-layer rate control scheme for optimizing 3D wavelet scalable video transmission over the IEEE 802.11e wireless local area networks. The proposed scheme consists of a macro and a micro rate control schemes residing at the application layer and the network sublayer respectively. The macro rate control uses bandwidth estimation to achieve optimal bit allocation with minimum distortion. The micro rate control employs an adaptive mapping of packets using video classifications. This prioritizes appropriately the video traffic to maximize the transmission protection to the important video packets. The performance is investigated by simulations showing advantages of our cross-layer design.
373663
A Multi-Level Constraint-Based Controller for the Dynamo98 Robot Soccer Team
Constraint Nets provide a semantic model for modeling hybrid dynamic systems. Controllers are embedded constraint solvers that solve constraints in real-time. A controller for our new softbot soccer team, UBC Dynamo98, has been modeled in Constraint Nets, and implemented in Java, using the Java Beans architecture. An evolutionary algorithm is designed and implemented to adjust the weights of constraints in the controller. The paper demonstrates that the formal Constraint Net approach is a practical tool for designing and implementing controllers for robots in multi-agent real-time environments.
2385031
Semi-Supervised Multi-Task Regression
Labeled data are needed for many machine learning applications but the amount available in some applications is scarce. Semi-supervised learning and multi-task learning are two of the approaches that have been proposed to alleviate this problem. In this paper, we seek to integrate these two approaches for regression applications. We first propose a new supervised multi-task regression method called SMTR, which is based on Gaussian processes (GP) with the assumption that the kernel parameters for all tasks share a common prior. We then incorporate unlabeled data into SMTR by changing the kernel function of the GP prior to a data-dependent kernel function, resulting in a semi-supervised extension of SMTR, called SSMTR. Moreover, we incorporate pairwise information into SSMTR to further boost the learning performance for applications in which such information is available. Experiments conducted on two commonly used data sets for multi-task regression demonstrate the effectiveness of our methods.
10896727
Firefly: illuminating future network-on-chip with nanophotonics
Future many-core processors will require high-performance yet energy-efficient on-chip networks to provide a communication substrate for the increasing number of cores. Recent advances in silicon nanophotonics create new opportunities for on-chip networks. To efficiently exploit the benefits of nanophotonics, we propose Firefly - a hybrid, hierarchical network architecture. Firefly consists of clusters of nodes that are connected using conventional, electrical signaling while the inter-cluster communication is done using nanophotonics - exploiting the benefits of electrical signaling for short, local communication while nanophotonics is used only for global communication to realize an efficient on-chip network. Crossbar architecture is used for inter-cluster communication. However, to avoid global arbitration, the crossbar is partitioned into multiple, logical crossbars and their arbitration is localized. Our evaluations show that Firefly improves the performance by up to 57% compared to an all-electrical concentrated mesh (CMESH) topology on adversarial traffic patterns and up to 54% compared to an all-optical crossbar (OP XBAR) on traffic patterns with locality. If the energy-delay-product is compared, Firefly improves the efficiency of the on-chip network by up to 51% and 38% compared to CMESH and OP XBAR, respectively.