47335045
Design and test of prototype boards for the L1 calorimeter trigger upgrade at the D0 experiment
This paper presents the development and test of some of the electronic boards that have been designed for the upgrade of the L1 calorimeter trigger at the D0 experiment. The analog to digital converter and filter board (ADF) digitizes 32 calorimeter channels, applies digital filtering, and sends data to the next processing stage via 2 Gb/s links. The board is designed for sustained operation at 7.57 MHz with an end-to-end latency of less than ~1 mus. In order to test the high-speed output links of the ADF board, we made a tester that comprises a custom made Channel Link receiver card. To connect a prototype ADF board to the D0 detector without disturbing the existing trigger system, we designed a splitter board that duplicates the analog signals from eight calorimeter channels. The serial command link distribution card (SCLD) is designed to accurately distribute synchronization signals to the 80 ADF boards of the final system. We made single channel versions of the ADF and SCLD boards. These cards run in a simple desktop PC environment and are helpful for tests and collaborative work. We describe the hardware, firmware and software aspects of the various developments and show the operation of the different boards. We present performance measurements made on the prototype ADF board, and explain how we defined the production model of this board
195869396
Results from an ATM-based event builder demonstrator
ATM switching fabrics are good candidates to implement high performance parallel event builders for the future data acquisition systems of the LHC experiments. We are studying their feasibility through simulations and implementation of event builder demonstrators. The impact of the event builder characteristic traffic pattern on the switch has been studied and methods to avoid congestion in the switch have been proposed. Event building algorithms and data acquisition protocols have been developed. Measurements made with a demonstrator and comparisons with simulation studies are presented. The scalability of the measurements is discussed.
53769716
On the integration of high performance ATM-based event builders
A first demonstrator has shown encouraging results for the use of Asynchronous Transfer Mode (ATM) switching networks in the implementation of high performance parallel event builders. Our present goal is to show that the integration of event builders, including the implementation of the source and destination functions and the bandwidth adaptation to the switching network, can be realized with commercially available products and that good performance can be achieved. We shall review some critical issues, present results from performance measurements and analyse the overheads.
55013324
Micromegas detector developments for Dark Matter directional detection with MIMAC
The aim of the MIMAC project is to detect non-baryonic Dark Matter with a directional TPC using a high precision Micromegas readout plane. We will describe in detail the recent developments done with bulk Micromegas detectors as well as the characterisation measurements performed in an Argon(95%)-Isobutane(5%) mixture. Track measurements with alpha particles will be shown.
118645473
The topological second-level trigger of the H.E.S.S. phase 2 telescope
H.E.S.S is an array of atmospheric Cherenkov telescopes dedicated to GeV-TeV γ-ray astronomy. The original array has been in operation since the beginning of 2004. It is composed of four 12-meter diameter telescopes. The installation of a fifth 28-meter diameter telescope is being completed. This telescope will operate both in stereoscopic mode and in monoscopic mode i.e. without a coincident detection on the smaller telescopes. A second-level trigger system is needed to supress spurious triggers of the 28-meter telescope when operated in monoscopic mode. This paper gives the motivation and principle of the second-level trigger. The principle of operation is illustrated by an example algorithm. The hardware implementation of the second level trigger system of H.E.S.S. phase 2 is described and its expected performances are then evaluated.
19547951
A review of technologies for the transport of digital data in recent physics experiments
This paper describes past and present techniques and technologies for the transport of digital data in recent physics experiments. After an overview of the typical requirements for modern data acquisition systems in the field of large scale experimental physics, we detail the successes and failures observed over the last 20 years of evolution of high-speed point-to-point link technology, networking standards and products. Modtextern data transport technology is presented along with several applications to experiments under construction. Advanced techniques, emerging technologies and trends in the field of high-speed digital data transport are outlined in the perspective of future experiments.
119605019
H1 FORWARD PROTON SPECTROMETER UPGRADE WITH SILICON PIXELS DETECTORS
Abstract The H1 experiment is already equipped with a four roman pots Forward Proton Spectrometer (FPS), using scintillating fibers. The H1 CPPM group has made a proposal to upgrade the FPS by adding silicon pixels detectors in the 90 m roman pot.
27426193
MCC: The Module Controller Chip for the ATLAS pixel detector
In this article we describe the architecture of the Module Controller Chip for the ATLAS Pixel Detector. The project started in 1997 with the definition of the system specifications. A first fully-working rad-soft prototype was designed in 1998, while a radiation hard version was submitted in 2000. The 1998 version was used to build pixel detector modules. Results from those modules and from the simulated performance in ATLAS are reported. In the article we also describe the hardware/software tools developed to test the MCC performance at the LHC event rate.
108645383
The ATLAS Silicon Pixel Sensors
Abstract Prototype sensors for the ATLAS silicon pixel detector have been developed. The design of the sensors is guided by the need to operate them in the severe LHC radiation environment at up to several hundred volts while maintaining a good signal-to-noise ratio, small cell size, and minimal multiple scattering. The ability to be operated under full bias for electrical characterization prior to attachment of the readout integrated circuit electronics is also desired.