1263625
On the Data Consumption Benefits of Accepting Increased Uncertainty
38643151
Learning from Each Other
Since its inception, the field of machine learning has seen the advent of several learning paradigms, designed to frame the issues central to the learning activity, provide effective learning methods, and investigate the power and limitations inherent to the process of successful learning. In this article, we propose a formalization that underlies the key concepts of many such paradigms and discuss their relevance to scientific discovery, with the aim of assessing what scientists can expect from machines designed to assist them in their quest for the discovery of valid laws. We illustrate the formalization on several variations of a card game, and highlight the differences that paradigms impose on learners, as well as the assumptions they make on the nature of the learning process. We then use the formalization to describe a multi-agent interaction protocol, that has been inspired by these paradigms and that has been validated recently on some groups of agents. Finally, we propose extensions to this protocol.
2402100
Input-Dependence in Function-Learning
In the standard literature on inductive inference, a learner sees as input the course of values of the function to be learned. In the present work, it is investigated how reasonable this choice is and how sensitive the model is with respect to variations like the overgraph or undergraph of the function. Several implications and separations are shown and for the basic notions, a complete picture is obtained. Furthermore, relations to oracles, additional information and teams are explored.
37212285
Quantification over names and modalities
39139980
On Sufficient Conditions for Learnability of Logic Programs from Positive Data
Shinohara, Arimura, and Krishna Rao have shown learnability in the limit of minimal models of classes of logic programs from positive only data. In most cases, these results involve logic programs in which the "size" of the head yields a bound on the size of the body literals. However, when local variables are present, such a bound on body literal size cannot directly be ensured. The above authors achieve such a restriction using technical notions like mode and linear inequalities. The present paper develops a conceptually clean framework where the behavior of local variables is controlled by nonlocal ones. It is shown that for certain classes of logic programs, learnablity from positive data is equivalent to limiting identification of bounds for the number of clauses and the number of local variables. This reduces the learning problem finding two integers. This cleaner framework generalizes all the known results and establishes learnability of new classes.
7592429
On the Convergence of Incremental Knowledge Base Construction
Ripple Down Rules is a practical methodology to build knowledge-based systems, which has proved successful in a wide range of commercial applications. However, little work has been done on its theoretical foundations. In this paper, we formalise the key features of the method. We present the process of building a correct knowledge base as a discovery scenario involving a user, an expert, and a system. The user provides data for classification. The expert helps the system to build its knowledge base incrementally, using the output of the latter in response to the last datum provided by the user. In case the system’s output is not satisfactory, the expert guides the system to improve its future performance while not affecting its ability to properly classify past data. We examine under which conditions the sequence of knowledge bases constructed by the system eventually converges to a knowledge base that faithfully represents the target classification function. Our results are in accordance with the observed behaviour of real-life systems.
45438780
SystemCmantic: A high level Modelling and Co-Design Framework
A process and an apparatus for producing a neodymium-iron alloy by electrolytic reduction of neodymium fluoride in a bath of molten electrolyte, consisting essentially of 35-76% by weight of neodymium fluoride, 20-60% by weight of lithium fluoride, up to 40% by weight of barium fluoride and up to 20% by weight of calcium fluoride, conducted between one or more iron cathode and one or more carbon anode. The apparatus comprises an electrowinning cell of refractory materials coated inside with a lining resistive to the bath, the carbon anode of constant transverse cross-sectional shape over its length, immersed into the electrolyte bath at its free end, the iron cathode of constant transverse cross-sectional shape over its length, immersed into the electrolytic bath at its free end, a receiver placed on the bottom of the cell for collecting the produced neodymium-iron alloy in a liquid state on the tip of the iron cathode, siphoning means for withdrawing the molten alloy pooled in the receiver out of the cell, and feeding means for feeding the ever wearing iron cathode into the electrolyte bath so as to apply the direct current to the iron cathode with a predetermined current density.
30324632
Neural Network Based Algorithm for Radiation Dose Evaluation in Heterogeneous Environments
An efficient and accurate algorithm for radiation dose evaluation is presented in this paper. Such computations are useful in the radiotherapic treatment planning of tumors. The originality of our approach is to use a neural network which has been trained with several homogeneous environments to deduce the doses in any kind of environment (possibly heterogeneous). Our algorithm is compared in several representative contexts to a reference simulation code in the domain.
18182574
SoftExplorer: Estimation, Characterization, and Optimization of the Power and Energy Consumption at the Algorithmic Level
We present SoftExplorer, a tool to estimate and analyze the power and energy consumption of an algorithm from the C program. The consumption of every loop is analyzed, and the influence of the data mapping is characterized. Several models of processor are available, from the simple RISC ARM7 to the very complex VLIW DSP TI-C67. Cache misses, pipeline stalls, and internal / external memory accesses are taken into account. We show how to analyze and optimize the power and energy consumption, and how to choose a processor and its operating frequency, for a MPEG-1 decoder. We also explain how to find the best data mapping for a DSP application.
7274427
Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT
In modern VLSI circuits, power consumption has become a design criteria as well as speed and silicon area or gate count. To guide the designer implementing complex applications with real time constraint on dedicated circuits, we present a High Level Synthesis methodology that provides a Register Transfer Level description of an ASIC, from a behavioral description of an algorithm; this complete methodology uses basic techniques such as selection, assignment or scheduling specified for power optimization, associated with a new approach based on data format optimization. Actually, instead of the usual 32-bit floating-point format, it is power efficient to use a fixed-point format provided overflow and computation noise problems are solved. The application of our method on an usual DSP example (the DWT) shows a power reduction of more than 60%.
60978385
Power Consumption Characterization and Modeling of Embedded Memories in XILINX VIRTEX 400E FPGA
To increase their flexibility, latest FPGA devices integrate processors, arithmetics elements and memories; but these programmable circuits have a significant power consuming, which grows up at each process generation. Then it is necessary to develop reliable high-level power consumption models in order to estimate and reduce the power budget as soon as possible in the design flow. Among the FPGA modeling methods, none has integrated the embedded memory yet. We propose here a power model of embedded memory for the Xilinx Virtex 400E based on physical measurements combined with algorithmic and architectural parameters. This simple model is validated in comparison to Xilinx's estimation tool XPOWER and an example of memory architecture design illustrates the interest of such an approach.