7481401
Noise-tolerant dynamic circuit design
Noise in deep submicron technology combined with the move towards dynamic circuit techniques for higher performance have raised concerns about reliability and energy efficiency of VLSI systems in the deep submicron era. To address this problem, a new noise-tolerant dynamic circuit technique is presented. In addition, the average noise threshold energy (ANTE) and the energy normalized ANTE metrics are proposed for quantifying the noise immunity and energy efficiency, respectively, of circuit techniques. Simulation results in 0.35 micron CMOS for NAND gate designs indicate that the proposed technique improves the ANTE and energy normalized ANTE by 2.54X and 2.25X over the conventional domino circuit. The improvement in energy normalized ANTE is 1.22X higher than the existing noise-tolerance techniques. A full adder design based on the proposed technique improves the ANTE and energy normalized ANTE by 3.7X and 1.95X over the conventional dynamic circuit. In comparison, the static circuit improves ANTE by 2.2X but degrades the energy normalized ANTE by 11%. In addition, the proposed technique has a smaller area overhead (69%) as compared to the static circuit whose area overhead is 98%.
16336079
Low-power MIMO signal processing
In this paper, we present a new adaptive error-cancellation (AEC) technique, denoted as multi-input-multi-output (MIMO)-AEC, for the design of low-power MIMO signal processing systems. The MIMO-AEC technique builds on the previously proposed AEC technique by employing an algorithm transformation denoted as MIMO decorrelating (MIMO-DECOR) transform. MIMO-DECOR reduces complexity by exploiting correlations inherent in MIMO systems, thereby improving the energy efficiency of AEC. The proposed MIMO-AEC enables energy minimization of MIMO systems by correcting transient/soft errors that arise in very large scale integration signal processing implementations due to inherent process nonidealities and/or aggressive low-power design styles, such as voltage overscaling. We employ the MIMO-AEC in the design of a low-power Gigabit Ethernet 1000Base-T device. Simulation results indicate 69.1%-64.2% energy savings over optimally voltage-scaled present-day systems with no loss in algorithmic performance.
17317140
A Reconfigurable High Availability Infrastructure in Cluster for Grid
The paper presents the implementation and analysis of a service-based reconfigurable High Availability infrastructure of cluster system for Grid. Based on service notion, the High Availability infrastructure is constructed for mission critical applications on Grid. The application high availability service is responsible for registered applications’ high availability. The Service Manager is in charge of monitoring all services via heartbeat and automatically recovering from failure to assure service high availability. To improve flexibility and dependability, a dynamic reconfiguration mechanism is designed so that the configurations can be changed without interrupting application’s running. A dependability modeling and simulation tool is deployed in the reconfiguration procedure. Dependability parameters can be inputted into the simulation tool. With the objects and sub-model library in the tool, corresponding global model will be constructed and statistic result for different recovery strategies is given. The configuration of application can be adjusted based on these statistic results.
6110501
A backoff copying scheme for contention resolution in wireless sensor networks
This paper aims at improving the throughput and fairness of the wireless sensor networks (WSN). Due to the disproportionate larger number of packets accumulated in the sensors that are closer to the base station, it's necessary to have a better contention resolution scheme to improve the throughput and fairness in WSN. In this paper, we propose a new mechanism named BCCR (Backoff Copying for Contention Resolution), which is targeted to a system-wide proportional fairness in WSN. The new method is designed particularly for a many-to-one data collection tree structure, employing a mechanism that translates a fairness model into contention resolution. In BCCR, the size of the backoff window is dynamically adjusted to the channel allocation rate of the flow sent by the sensors. And the backoff algorithm does not focus on each node, but focus on each region which is divided according to the traffic flow contention. In every contention region, sensor nodes will share the same backoff window by a copying scheme. With extensive simulations and testbed experiments, we show that BCCR can achieve the expected fairness and throughput increase over the traditional CSMA, especially when the network is congested.
8890864
Improving Error Tolerance for Multithreaded Register Files
Chip multithreaded computing is exposed to the dual challenges of increasing system complexity and error sensitivity. It is critical to develop effective solutions that achieve better error tolerance without inducing performance degradation. In this paper, we propose a new error-tolerant memory design based on a unique computing phenomenon referred to as the dynamic multithreading redundancy (DMR). The proposed technique exploits the interplay between the concurrent threads for runtime error control. We also present two DMR enhancements, immediate write-back and self-recovery, to address the error accumulation effect. A multithreaded register file was implemented to demonstrate the proposed DMR technique. Simulation results on the SPEC CPU2000 benchmarks demonstrate significant overhead reduction in performance and energy efficiency related to error recovery. In addition, the proposed technique features good scalability with respect to the instruction-level and thread-level parallelism for next-generation processor design, where the soft error problem is expected to get worse due to technology scaling and architecture-affecting trends.
2723209
An energy-efficient skew compensation technique for high-speed skew-sensitive signaling
Presented in this paper is an energy-efficient skew compensation technique referred to as the resistance-based distributed clock deskew (RDSK) technique. In comparison with the existing clock deskew techniques, the proposed RDSK technique achieves significant power reduction while maintaining effective in skew management. Furthermore, the proposed RDSK provides a better scalability for future technology scaling. Simulation results of an on-chip interconnect communication system with distributed receivers designed in a 0.10 /spl mu/m CMOS process demonstrate 20%-51% power reduction over the existing techniques. The proposed RDSK is an essential element of our adaptive timing framework where circuit performance can be adjusted adaptively in response to time-varying disturbances and uncertainties.
10157835
New Message Differences for Collision Attacks on MD4 and MD5
In 2005, collision resistance of several hash functions was broken by Wang et al. The strategy of determining message differences is the most important part of collision attacks against hash functions. So far, many researchers have tried to analyze Wang et al.'s method and proposed improved collision attacks. Although several researches proposed improved attacks, all improved results so far were based on the same message differences proposed by Wang et al. In this paper, we propose new message differences for collision attacks on MD4 and MD5. Our message differences of MD4 can generate a collision with complexity of less than two MD4 computations, which is faster than the original Wang et al.'s attack, and moreover, than the all previous attacks. This is the first result that improves the complexity of collision attack by using different message differences from Wang et al.'s. Regarding MD5, so far, no other message difference from Wang et al.'s is known. Therefore, study for constructing method of other message differences on MD5 should be interesting. Our message differences of MD5 generates a collision with complexity of 242 MD5 computations, which is slower than the latest best attack. However, since our attack needs only 1 bit difference, it has some advantages in terms of message freedom of collision messages.