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Free Souls, Chapter 32 | The Writer Sits Down
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Free Souls, Chapter 32
Posted on 16 February 2014	by kat3kets1gog
“And then, whap! the E-string breaks and knocks his hat right off! It was hilarious!” A knot of students, mostly members of the day’s orchestra, had congregated near the nearly-depleted punchbowl and Joel, one of Werner’s violin-playing colleagues, was sharing a story about the German’s early days at the Conservatory.
“Oh, no!” Sandy couldn’t help saying. “It could’ve hit him in the eye! He could’ve been seriously hurt!” The thought filled her with horror.
“Oh, not Werner,” Joel said. “He’s too lucky.”
“That hat deserved to be knocked a good one, it was so stupid-looking,” said someone else.
“Oh, hell, it sure was,” said a violist, laughing. “We thought after that he’d stop wearing it, but he just said, ‘Ach, nein, it ist mine protekshun’!”
“When did he stop wearing it?” asked Danny.
“Don’t remember. Was it after we filled it with shaving cream just before he had to perform in class?”
“Men,” she thought to herself. “They can be so cruel to each other!” Though the female music students were just as bad. And come to think about it, they pulled some pretty rude tricks on each other up in Studio, and yes, all right, she had participated, too.
So she was unprepared when two hands stole softly upon her waist and she was drawn back against his breast. “Werner!” she breathed, as a jolt of electricity flashed through her. For a moment the faces of the students, now laughing at her, grew dim. What was happening? He had done this kind of thing before, but it had never affected her like this.
“Liebling,” he said, turning her so he could look in her face, “where were you? You left me to the wolves, you did!”
“And you slew every one of them,” she returned happily. The other people may as well not have been there.
“But what have you been doing while die arme Hand was being shaken off the bone? Amusing yourself and forgetting all about me?”
“She’s been taking a poll on how great your performance was,” said Joel. “And the only choices were– ”
“ –Amazing, Stupendous, and Far-Freaking-Out-of-This-World,” concluded Danny.
“Ja?” The eyebrow went up. “And the results of this poll were?”
She looked up at him. She felt as light-headedly foolish as a ten-weeks’ kitten, as a four-year-old child, as the village idiot, and she did not care. “Everyone says– you’re a genius.”
“So sagen sie? Und Du, Kleinchen, was sagst Du?”
“I say– you are a genius.”
He hugged her to his side while his fellow-students male and female laughed again. Then the oboe, a young man with a drooping mustache and reddish hair permed into a puffball Afro, said, “What say we blow this joint and head over to the Quarter Rest? Werner, are you coming now, or do we need to tell the bartender to hold your usual for you?”
“Don’t be too long,” called out another, “or we’ll drink it for you and let you pay the tab!”
“Nein, nein, meine Freunde. I am sorry to miss your company on this occasion, but I am not joining you tonight. Zandra and I have plans.” He gave her a conspiratorial wink.
“No! No!” the group protested.
“Sandy, tell him he has to come!”
“You’re coming, too, right?”
“Werner, you can’t skip out on us like this! No!”
Then, “Andreas! Where’s Andreas?”
“Hey, Andreas, tell your roomie he has to come to the Quarter Rest so we can down a few schooners in his honor!”
Andreas and Werner exchanged a knowing glance and both nodded. “Nein,” said the cellist, “I cannot convince him to come. I am not coming either. I, too, have plans. Until very late,” he added meaningfully.
“Killjoys!”
“Well, come around later, after dinner,” said Danny. “We’ll be there till closing or until we drink the house dry– whichever comes last!”
“Nein,” said Werner, giving Sandy a squeeze that sent her heart sailing into her head. “We will be busy later.”
Whatever he meant by that, her enchanted will refused to consider. She might have to make a decision. And just now she did not want to make decisions, she just wanted this new sensation to keep flowing through her. Was it the lingering effect of the music? Was it him and the power he had revealed on that stage? Was it something happening in herself? She didn’t care. To feel it was enough, to feel it was her only desire, and she hoped it would never, never end.
A few minutes later she and Werner were walking back to his apartment, his violin in his right hand, her hand in his left. She had been trying to tell him how his playing had affected her, how it seemed to affect everyone else, but each time words failed and all she could say was, “It was wonderful. Simply wonderful.”
For awhile they fell into companionable silence. Then Sandy spoke up and said, “There was just one thing I don’t understand.”
“So, Kleinchen, you understand all the mysteries of Bach and Berlioz and Weinberg? All but one?”
She gave him a playful punch. “No, silly, I just don’t understand the mystery of you. You said you dedicated the encore piece . . . the Wieniawski . . . to me . . . ”
He stopped still and she stopped with him.
“But I don’t remember ever hearing it before.”
“Do you not? I am sure I have played it for you, and you told me you liked it very much.” He sounded a little hurt.
“Oh, no, Werner, no!” she said, placing her hands on his lapels in appeal. “No, I believe you! It was probably just me, distracted over some project I had due. I– I think, yes, it must have been familiar. That’s why it struck me with such force. And now,” she said happily, looking up in his face, “I’ll always think of it with you playing it for me, on the day when you, when you–! Oh, Werner, you are so beautiful!”
He caught her hands in his and kissed them. Then he said, “Ach, Zandra, we must not do so here. What will the neighbors say? Let us go home. Did I not say I had a surprise for you?”
She wondered what it might be. A thousand possibilities passed through her brain and a thousand were dismissed. Whatever it was, she was sure she would love it.
They arrived at his building. He unlocked the entry and let her into the hall. They walked up the four flights of steps to the third floor. She waited for him to unlock the apartment door. He opened it, and they stepped in.
The late afternoon sun streamed in between the slats of the blinds on the west-facing windows. By its light she could see two things:
The large, smelly beanbag chair was gone.
And in its place, pushed up against the wall with real end tables flanking it, was–
A genuine sofa.
No, not quite a sofa. A futon on a frame, with a paisley India-print bedspread bunched up and thrown over the back at one end. Why was it a surprise for her? Again she wanted to say, “I don’t understand,” but she didn’t want to hurt him again.
“That beanbag, I know you did not like it. I could see your nose wrinkle up when we sat in it. Now it is gone. This sofa, it is a futon, the excellent invention of our Japanese friends.” He stopped suddenly, perhaps thinking that might strike her American spirit the wrong way, coming from a German.
Sandy hurried to his rescue. “That’s all right,” she said. “Japan is our friend now. Like West Germany.”
“Like West Germany,” he repeated with a strange significance. “Danke. So!” he went on with his usual quick cheer, “This excellent futon, it is very versatile. It is a sofa, it is a bed. This one only has a metal frame,” he admitted, “but it will keep the inhabitants of the house off the floor!”
True, but why should he acquire such a thing, and at such a time? Immediately after graduation she was going home for a couple of weeks, then leaving for Boston before the end of June. He wouldn’t even be in the United States past the end of August, unless his visa status changed. And if he landed a place in an orchestra this summer he would be leaving Mt. Athens before that. How much use could either of them get out of it?
“Do you like your surprise?” he was asking.
“Yes . . . I’m . . . very surprised. Overwhelmed. It’s . . . lovely.”
“I am happy. I thought you would like it.”
Examining the futon more closely, she saw that the tan cover had a slight discoloration on the seat, a vague blotch darkening the fabric. That at least explained how he could afford it on his limited budget. It was shop-worn, maybe a return, and cleaning hadn’t removed the stain. So he’d gotten a good deal on it. But even with that, the purchase went against everything she knew of his thrifty habits. He only spent money when the object was important to him.
Wait a minute, she thought. “He knows our lease is up at the house the middle of June. Will he ask me to stay here in Mt. Athens, so we . . . so we can be together awhile longer? And the futon will give me a place to sleep without . . . without sharing his bed in his bedroom?” The idea touched her.
But still, the time was coming when a piece of furniture like this would have to be left behind, or moved. No, not left behind. Werner would not be willing to waste the money he spent on it. It was something he’d want to keep permanently, to go for when he was establishing a household. When he was planning to get–
Her hand went to her mouth to stifle a sob of joy.
When he was planning to get married.


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SEGRO owns commercial and industrial properties in the UK, France, Czech Republic, Poland, Italy, the Netherlands, Belgium, Spain and Germany.[6] The Company's portfolio (including joint venture assets) was valued at £5.9bn at 31 December 2016.[1]
^ a b c d "Annual Report 2016" (PDF). Segro. Retrieved 23 April 2017.
Retrieved from "https://en.wikipedia.org/w/index.php?title=Segro&oldid=795756287"
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Hindu Pantheon-Vishnu Avatars | Faint Silhouettes
Analysis and Conclusions: Incarnations of Lord Vishnu
The incarnations of Lord Vishnu: The ten incarnations of Lord Vishnu might have evolved over a period of time. The current list is Matsya, Kurma, Varaha, Narasimha, Trivikrama, Parashurama, Rama, Krishna, Buddha and Kalki. Instead of Buddha some Vaishnavas in South India have Haladhara (Balarama?).
The number it self is not unique because there are many more incarnations as in Bhagavata Mahapurana, Book 1, Chapter 3. We discuss all of them as follows:
The four Kumaras who maintained celibacy
The divine Boar lifting the sunken earth from the ocean in order to proceed with the work of creation
Sons of Dharma’s better half, Nara and Narayana who are respectively Arjuna and Krishna
Kapila who was the tutor of Asuri
As son of Atri
Akuti or Yajna whose son is Yama
Reshabhadeva
10. Following a deluge he took the form of fish, rescued Vaivaswatha Manu by placing him on a boat shaped earth. Vaivaswatha means son of Sun god.
11. Kurma or tortoise which supported the mount Mandara on its back when gods and demons churned the ocean
12. Dhanvantari emerged from ocean with a jar of nectar, he is god of medicine
13. He is an enchanting woman who gave nectars to god and prevented the demons from sharing it.
15. Vamana-Trivikrama-UAP
17. Vyasa, son of Satyawati
19. Balarama, brother of Krishna
We have an Egyptian counterpart for this:
The four sons of Horus, who were the mortuary deities formed a tetrad, p.76 of [5] may map to the four Kumaras.
The picture of a god lifting a globe from water on p.17 in [5] and the god Nun lifting a globe from the waters of creation on p.117 of [5] may map to the divine Boar lifting the sunken earth from the ocean in order to proceed with the work of creation. According to [5] the globe represents the Sun, but the analogy stands if we imagine it to be earth, that is allusions to ‘water’ and ‘creation’. We have an alternative comparison for this boar avatar of Vishnu. Seth took the form of a huge boar and appeared before Re, while Re was looking into the eyes Horus during the battle. Seth also injured the eye of Horus. From the viewpoint of Seth worshippers he can be worshipped as a boar; his opponent Horus can be mapped to Hiranyaksha, meaning the ‘one with a golden eye’. The epithet ‘one with golden eye’ also has an Egyptian counterpart, which is the ‘eye of Horus’, that is considered to be sacred. Or alternatively, Osiris can be Hiranyaksha: ‘one with the golden eye’; incidentally, Lord Ranganatha of Srirangam, India has golden eyes. We have compared Ranganatha to Osiris earlier.
What is interesting here is that Arjuna and Krishna are the sons of the wife of Dharma. The question is why are they not sons of Dharma? We guess they must have been born after his death, in which case this perfectly matches the Osiris story: Horus is the son of Osiris, born after his death to his wife Isis. We have mapped Horus to the human Arjuna who is Nara and also to Lord Krishna who is Narayana in our earlier articles. We have also mapped Osiris to Dharma, both being lords of the netherworld.
Geb, father of Osiris corresponds to this as Osiris is mapped to Yama in [7].
The word Reshep in Egyptian mythology resembles Reshabhadeva
Geb in Egyptian mythology is the earth god, he maps to Pruthu the emperor from whom the earth got its name Prithvi.
10. Nun, who represents the element water in Egyptian mythology, lifts the boat from the water of creation, see picture on p.117 in [5]. The boat contained the Sun god along with seven deities [5]. This is similar to Vishnu in the form of fish lifting the Sun god’s son on a boat shaped earth, from deluge. Ashby compares Nun with Nara-Narayana on p. 527 in [4].
11. The picture on p.107 of [5] contains god Hapy in dual form representing the Upper and the Lower Egypt, the symbols of which are respectively the vulture and the snake. The action looks like churning. It may be symbolic of two distinct groups churning, the followers of Seth and Horus respectively. Alternatively the Egyptian scarab looks like the Kurma.
12. The Egyptian goddess Bastet, holding the ointment jar may map to Dhanvantari. Alternatively the milk of the goddess Isis of Egypt is believed to have healing powers.
13. Isis is the enchanting Egyptian goddess who is considered as Aphrodite by the Greeks.
14. We have already compared the Egyptian god Bes to Narasimha in an earlier article. Also Tefnut, the Egyptian lion headed goddess may map to this.
15. We have compared Seth to Trivikrama in an earlier article on Mahabali.
16. We will be comparing Parashurama to Horus of Egyptian mythology in a later article on Gudimallam.
17. We map Horus to Vyasa. This is justified as follows: the other name of Vyasa that is ‘Krishnadwaipayana’, means ‘a dark complexioned person born on an island’. Horus was dark and born in a swamp [1]. Vyasa’s mother Satyavati had two peculiar attributes: she was emanating perfume from her body and was a virgin after delivery, both are the attributes of goddess Isis of Egypt who was the mother of Horus. Further, Satyavati means ‘true of speech’ which is also an attribute of Isis. Also, Parashara, the father of Vyasa, merged into the world of wolves after death [66], while Osiris who was the father of Horus, was worshipped as a wolf in Asyut [65].
18. Rama is compared to Osiris in a future article, though the mapping is not that significant.
19. Balarama is compared to Seth, since he supported Duryodhana who is mapped to Seth, and he is the brother of Krishna who is mapped to Horus.
20. Horus is compared to Krishna, as discussed in an earlier article in the context of killing Narakasura.
21. Osiris, was worshipped as a tree, as was Buddha.
Thus we could map a significant number of Vishnu’s avatars to Egyptian gods.
It may be noted that the mapping of these Egyptian gods to their Indian counterparts might have preceded their grouping under Lord Vishnu. Therefore, one may find a pair of adversaries in the Egyptian mapping to two of the avatars of Vishnu. This problem is natural when two or more gods are amalgamated into one. In fact, such a process of amalgamation may lead to the invention of reconciliatory stories, as we will be showing one such story in a different article.
Egyptian mythology also has grouped sets of ten gods namely:Nun, Atum, Shu, Tefnut, Geb, Nut, Osiris, Isis, Seth, Nephthys and Horus, where Nun is not counted. Eight of them (shown in bold) are there in the mapping shown above.
Even the choice of ten in Hindu mythology looks quite varied as illustrated by the following two examples:
The Vishnu idol in Banavasi, in its ‘Prabhavali’ (arch of the idol), has only the first four of the ten incarnations of Vishnu listed above, namely: Matsya, Kurma, Varaha and Narasimha. The next six are saints in Padmasana posture.
The Vishnu idol of Galaganatha temple, Karnataka, India has the first six incarnations namely: Matsya, Kurma, Varaha, Narasimha, Trivikrama and Parashurama, while the other four are saints in Padmasana posture.
[65] http://en.wikipedia.org/wiki/Asyut
[66] http://en.wikipedia.org/wiki/Parashara
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Patent US7835393 - System and method for converting multichannel time division multiplexed data ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA system and method are provided for converting multichannel serial data streams into packets. The method accepts a plurality of serial data streams in a corresponding plurality of channels. In a time domain multiplexed (TDM) fashion, groups with an undetermined number of data bits are packed from each...http://www.google.com/patents/US7835393?utm_source=gb-gplus-sharePatent US7835393 - System and method for converting multichannel time division multiplexed data into packetsAdvanced Patent SearchPublication numberUS7835393 B2Publication typeGrantApplication numberUS 12/015,130Publication dateNov 16, 2010Filing dateJan 16, 2008Priority dateJan 16, 2008Fee statusPaidAlso published asUS8571062, US20090180494Publication number015130, 12015130, US 7835393 B2, US 7835393B2, US-B2-7835393, US7835393 B2, US7835393B2InventorsXingen (James) Ren, Ravi SubrahmanyanOriginal AssigneeApplied Micro Circuits CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (8), Referenced by (2), Classifications (6), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetSystem and method for converting multichannel time division multiplexed data into packets
US 7835393 B2Abstract
A system and method are provided for converting multichannel serial data streams into packets. The method accepts a plurality of serial data streams in a corresponding plurality of channels. In a time domain multiplexed (TDM) fashion, groups with an undetermined number of data bits are packed from each data stream, into an associated channel segment queue, where each segment includes a predetermined number of bits. In a TDM fashion, segments are loaded into an associated channel payload queue, where each payload includes a predetermined number of segments. Once a payload is filled, an associated pointer is created in a pointer queue. The method selects a pointer from the pointer queue, creates a packet from the payload associated with the selected pointer, and transmits the packet via a packet interface. The packet overhead may include information stored in the pointer, a packet header, or a cyclic redundancy check (CRC) checksum.
1. In a data communication interface, a method for converting multichannel serial data streams into packets, the method comprising:
accepting a plurality of serial data streams in a corresponding plurality of channels;
in a time domain multiplexed (TDM) fashion, packing groups with an undetermined number of data bits, from each data stream, into an associated channel segment queue, where each segment includes a predetermined number of bits;
in a TDM fashion, loading segments into an associated channel payload queue, where each payload includes a predetermined number of segments;
in response to filling a payload, creating an associated pointer in a pointer queue;
selecting a pointer from the pointer queue;
using the payload associated with the selected pointer, creating a packet; and,
transmitting the packet via a packet interface.
2. The method of claim 1 wherein creating the packet includes creating packet overhead with information selected from a group consisting of information stored in the pointer, a packet header, and a cyclic redundancy check (CRC) checksum.
3. The method of claim 1 wherein accepting the plurality of serial data streams includes:
accepting a Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH) frame; and,
demapping the frame into a plurality of TDM data steams.
4. The method of claim 3 wherein demapping the frame into the plurality of TDM data streams includes forming a plurality of TDM data streams with an associated plurality of TDM channel clocks;
wherein loading segments into the associated channel payload queue includes writing segments in accordance with the corresponding TDM channel clocks; and,
wherein creating the packet using the payload associated with the selected pointer includes reading the payload in accordance with a packet interface clock.
5. The method of claim 1 wherein accepting the plurality of serial data streams includes accepting the plurality of serial data streams on channels having a corresponding plurality of data rates; and,
wherein creating the packet includes creating packets for each channel at a rate responsive to the corresponding channel data rate, and greater than the combined plurality of channel data rates.
6. The method of claim 1 wherein packing groups from each data stream into the associated channel segment queue includes forming channel segment queues, each having a width of greater than 1 segment; and,
wherein loading segments into the associated channel payload queue includes forming channel payload queues, each having a width of greater than 1 payload.
7. The method of claim 1 wherein loading segments into the associated channel payload queue includes loading, segments into a first-in first-out (FIFO) memory; and,
wherein creating the associated pointer in the pointer queue includes storing information in the pointer selected from a group consisting of a FIFO address of the associated payload, the channel of the payload, and channel alarms.
8. The method of claim 1 wherein selecting the pointer from the pointer queue includes using criteria chosen from a group consisting of:
pointer position in the pointer queue;
channel payload queues having a threshold number of payloads;
the channel payload queue having the largest number of payloads; and,
pre-defined channel numbers.
9. The method of claim 1 wherein loading segments into the associated channel payload queue includes loading segments using a round robin polling process.
10. A data communication system for converting multichannel serial data streams into packets, the system comprising:
a data packer hardware module with channel segment queues, having an input to accept a plurality of serial data streams in a corresponding plurality of channels, the data packer module packing groups with an undetermined number of data bits in a time domain multiplexed (TDM) fashion from each data stream into an associated channel segment queue, and supplying segments from each channel segment queue at an output, where each segment includes a predetermined number of bits;
a multichannel first-in first-out (FIFO) with channel payload queues, having an input to accept segments from the data packer module in a TDM fashion and loading segments into associated channel payload queues, and having an output to supply payloads from each channel payload queue, where each payload includes a predetermined number of segments;
a pointer queue having an input to accept pointers with payload information in response to filling an associated payload in the multichannel FIFO, and having an output to supply pointers;
a pointer selector having an output to select a pointer from the pointer queue; and,
a packet interface module having an input to accept the payload from the multichannel FIFO associated with the selected pointer, creating a packet from the accepted payload, and transmitting the packet via a packet interface.
11. The system of claim 10 wherein the packet interface module has a pointer input connected to output of the pointer queue, the packet interface module creating the packet with packet overhead from information stored in a pointer associated with the packet payload.
12. The system of claim 10 wherein the packet interface module has a packet header input, the packet interface module creating the packet with packet overhead information selected from a group consisting of a packet header and a cyclic redundancy check (CRC) checksum.
13. The system of claim 10 wherein the data packer module includes a demapper having an input to accept a Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH) frame and an output to supply the plurality of serial data streams as a plurality of TDM data streams demapped from the frame.
14. The system of claim 13 wherein the demapper forms a plurality of TDM data streams with an associated plurality of TDM channel clocks;
wherein the multichannel FIFO writes segments into the channel segments queues in accordance with the corresponding TDM channel clocks; and,
wherein the packet interface module creates the packet by reading the payload from the multichannel FIFO in accordance with a packet interface clock.
15. The system of claim 10 wherein the data packer module accepts the plurality of serial data streams on channels having a corresponding plurality of data rates; and,
wherein the packet interface module creates packets for each channel at a rate responsive to the corresponding channel data rate, and greater than the combined plurality of channel data rates.
16. The system of claim 10 wherein each data packer module channel segment queue has a width of greater than 1 segment; and,
wherein each multichannel FIFO channel payload queue has a width of greater than 1 payload.
17. The system of claim 10 wherein pointer queue accepts pointers with information selected from a group consisting of a FIFO address of the associated payload, the channel of the payload, and channel alarms.
18. The system of claim 10 wherein the pointer selector selects the pointer from the pointer queue using criteria chosen from a group consisting of random selection, pointer position in the pointer queue, a threshold number of payloads in an associated channel payload queue, the largest number of payloads in an associated channel payload queue, and predefined channel numbers.
19. The system of claim 10 wherein data packer module supplies segments from the channel segment queues using a round robin polling process. Description
This invention generally relates to digital communication systems and, more particularly, to a system and method for converting multichannel serial data streams into packet network communications.
Conventionally, voice has been carried over Time Division Multiplexed (TDM) networks, such as E1/T1/E3/T3 and SDH/SONET networks. The emergence of packet data communications, such as Internet Protocol (IP) networks, has led to the convergence of TDM traffic into the IP networks. Packet networks, which were initially designed to carry time-insensitive data traffic, are not designed to address the concerns of real-time services like voice and video, which are conventionally carried over TDM networks.
Digital transport networks evolved as isolated links connecting analog switching systems for analog Public Switched Telephone Networks (PSTNs). Originally, digitized voice channels were multiplexed onto serial streams, framed, and line coded with completely unsynchronized clocks. Digital communications evolved to Plesiochronous Digital Hierarchy (PDH), which permits clock rates of interfacing streams to vary from a nominal value with a given tolerance. The variance is resolved by elastic stores and, in higher multiplexing rates, by bit stuffing. There are three closely related standards for digital trunks of primary rate, E1-E3 (Asia and Europe), the T1-T3 (North America), and J1-J3 (Japan). In a PDH transmission chain, a plurality of lower level digital signals are bit-wise, or bit and byte-wise time division multiplexed together to form a higher level signal, with the bit rate of the higher level signal being greater than the sum of the rates of the tributary signals to account for overhead functions in the higher rate signal, such as framing, parity, error detection, alarms, maintenance, and timing adjustment.
The bits of each lower level digital signal are written into an input buffer (one buffer per input tributary), with the write frequency equal to the incoming tributary instantaneous bit rate. The tributary bits are then read, according to a local system clock, and multiplexed by bit-interleaving or byte-interleaving. To take care of deviation in the rates between different tributaries and the multiplex signal, certain bit positions within the output multiplex frame (justification or stuffing opportunity bits) can carry either tributary or dummy bits. The justification decision (i.e., if the stuffing opportunity bit should carry information or be a dummy) is made frame-by-frame on the basis of a buffer threshold mechanism. Therefore, the actual number of tributary bits in the output multiplex frame varies dynamically and the transmission capacity gets adapted to the actual bit rate of the incoming tributary.
In a TDM format, data is transported in small chunks at a regular rate. The data stream is at a more or less uniform rate, with only small perturbations, which occur due to rate adaptation mechanisms within the network, or due to impairments in the network. Within such a network transport, applications must maintain the uniformity of the data rate to within tight specifications, which is generally done using a phase conditioning circuit in the transmit path. Such a phase conditioning circuit works by storing data in a buffer and playing it out to a mapper at a regulated rate. In order to maintain low latency requirements, the buffer is small (of the order of several bytes).
Since PDH networks work on independent clocking mechanisms, the differences in clock rates result in buffer slips, whose effect is negligible in voice conversations, but detrimental to data and video traffic. To address this problem, network architectures (SDH/SONET) have been adopted where all the network elements are synchronized and running at the same average frequency. Transient variations are accommodated by a mechanism called pointer adjustments.
In SONET, the base signal is referred to as Synchronous Transport Signal level-1 (STS-1), which operates at 51.84 Mb/s. Higher-level signals are integer multiples of STS-1, creating the family of STS-N signals, for N=1, 3, 12, 48, 192, & 768. An STS-N signal is composed of N byte-interleaved STS-1 signals. The optical counterpart for each STS-N signal is designated as OC-N (Optical Carrier level-N). TDM traffic is mapped onto an SPE (SONET) or a virtual container (SDH), which in turn is associated with Path Overhead (POH) to form an Administrative Unit in SDH. The pointer mechanism is used to take care of the asynchronous phase of the SONET/SDH traffic and also to compensate for frequency offsets between transmission systems.
FIG. 1 depicts a single channel device for converting a TDM stream into packets (prior art). The TDM data are available as a bit-serial data stream. This data stream can be an incoming data stream (e.g., a DS-1 or E-1 stream of data), or it can be demapped from a multiplexed format. Here, a demapper is not shown. The data stream may also be desynchronized from the mapped structure. In this case, there may be a �smooth� clock accompanying the data stream at the rate of the data. If the data are only demapped and not desynchronized, the data may be carried by the clock of the multiplexed format, with gaps to accommodate the different rate.
The bit serial stream is packed into bytes by data packer 100, which are put into a byte FIFO 102. When a sufficient number of bytes are accumulated to form a packet payload, the payload is transmitted by the packet interface logic 104, which also adds a suitable header to the data to form the entire packet. The header information may include cycle redundancy check (CRC) checksum information. Alternately, the packet interface logic 104 may calculate the CRC as the packet is transmitted. In the system of FIG. 1, it is possible to transmit the packet immediately after a payload full of bytes is accumulated.
FIG. 2 depicts a system for packing a multichannel stream of TDM data into a packet format (prior art). The TDM stream containing many channels is demapped by demapper 200 into individual bit-streams. Each stream is then packed into bytes by a corresponding packer 202 and the bytes are put into byte FIFOs 204, one per channel. Each FIFO 204 is typically larger than just one packet-payload. A scheduler 206 is then used to poll each FIFO to see if it has accumulated a packet-payload worth of bytes. Typically, a round-robin scheme may be used to poll the channels. If the FIFO for a channel has enough bytes when it is polled, control is passed to the packet interface logic 208, which adds a header and transmits the packet. The next channel is then polled.
The scheme of FIG. 2 works because the overall available bandwidth on the packet interface is much larger than the bandwidth of any one TDM stream, and is also larger than the combined bandwidth of all the TDM streams being packed. In fact, the bandwidth on the packet interface is typically greater than the combined bandwidth of all the TDM streams being packetized, plus the bandwidth needed for any overhead that is added to the payloads to form the packet. Therefore, despite the pauses associated with the polling routine, overall, the round robin scheme is able to keep up with the accumulation of packet-payloads from the various TDM streams.
A multichannel TDM stream (e.g., an STS-3 or STS-12 SONET stream containing many DS-1s and/or E-1s) may contain an arbitrary distribution of rates in the different channels. The rates of the different channels are generally not known a-priori. Therefore, it is not possible to set up a polling schedule which favors higher-speed channels or chooses channels in some other manner. It is therefore common to pick a straightforward round-robin scheme. Alternately stated, if a stream carries higher-rate data, it should be given more polling chances. However, a system such as the one shown in FIG. 2 cannot poll a higher-rate channel more often unless the rates in the various channels are precisely known beforehand.
As a result, some of the timing information inherently contained in the TDM streams may be lost in the process of packetizing. For example, if a first channel is only 1 byte short of a packet payload worth of data when it is polled, the scheduler can go on to the next channel, and will only service the first channel when it comes back around to it in rotation. Depending on the number of channels and the specific polling scheme, this process imposes a �waiting-time� on the packet transmission. This waiting time depends on the interaction between the polling schedule and the TDM rates. This waiting time can result in a phenomenon similar to waiting time jitter, or more generally, phase deviation. As used herein, the term jitter refers to phase-deviation at all frequencies. Jitter is a problem commonly associated with the bit-stuffing mechanisms for mappers, but in this scenario the magnitude of the jitter is greater as compared to bit-stuffing, because of the multi-byte packets. The timing of each TDM stream is impaired by this process.
It would be advantageous if a system could packetize multichannel serial data streams or TDM streams while better preserving the timing of the various streams.
As noted above, the conventional method for converting a data stream (e.g., a DS-1 or E-1 channel) into packet format packs the data into a payload and then transmits it as a packet. When a TDM data stream (e.g., multiple DS-1s or E-1s in a SONET payload) is converted into packets and transmitted, as is done in circuit-emulation, the method of packing the data can result in loss of timing information. For data termination applications, this loss of timing information is not important. But for timing-sensitive applications, it is important to retain as much of the timing information as possible for eventual recovery. This present invention describes a method for converting multichannel TDM data into packets, better preserving the timing information individually for each channel.
Accordingly, a method is provided for converting multichannel serial data streams into packets in a data communication interface. The method accepts a plurality of serial data streams in a corresponding plurality of channels. In a TDM fashion, groups with an undetermined number of data bits are packed from each data stream, into an associated channel segment queue, where each segment includes a predetermined number of bits. For example, a segment may be a byte. In a TDM fashion, segments are loaded into an associated channel payload queue, where each payload includes a predetermined number of segments. Once a payload is filled, an associated pointer is created in a pointer queue. The method selects a pointer from the pointer queue, creates a packet from the payload associated with the selected pointer, and transmits the packet via a packet interface. Typically, the packet includes overhead, which may be information stored in the pointer, a packet header, and/or a cyclic redundancy check (CRC) checksum.
More explicitly, the segments may be loaded into a first-in first-out (FIFO) memory, and the pointers may include information such as the FIFO address of the associated payload, the channel of the payload, and channel alarms. Advantageously, if the plurality of serial data streams is accepted on channels having a corresponding plurality of data rates, then packets can be created for each channel at a rate responsive to the corresponding channel data rate.
Additional details of the above-described method and a data communication system for converting multichannel serial data streams into packets are provided below.
FIG. 1 depicts a single channel device for converting a TDM stream into packets (prior art).
FIG. 2 depicts a system for packing a multichannel stream of TDM data into a packet format (prior art).
FIG. 3 is a schematic block diagram depicting a data communication system for converting multichannel serial data streams into packets.
FIG. 4 is a schematic block diagram depicting a TDM variation of the system of FIG. 3.
FIG. 5 is a diagram depicting a multichannel TDM data stream (prior art).
FIG. 6 is a schematic block diagram depicting a second variation of the system of FIG. 3.
FIG. 7 is a schematic block diagram depicting a jitter attenuator for converting serial data streams into a multichannel TDM stream.
FIG. 8 is a flowchart illustrating a method for converting multichannel serial data streams into packets in a data communication interface.
Various embodiments are now described with reference to the drawings. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more aspects. It may be evident, however, that such embodiment(s) may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to facilitate describing these embodiments.
As used in this application, the terms �processor�, �processing device�, �component,� �module,� �system,� and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components can reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network such as the Internet with other systems by way of the signal).
Various embodiments will be presented in terms of systems that may include a number of components, modules, and the like. It is to be understood and appreciated that the various systems may include additional components, modules, etc. and/or may not include all of the components, modules etc. discussed in connection with the figures. A combination of these approaches may also be used.
The various illustrative logical blocks, modules, and circuits that have been described may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The methods or algorithms described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. A storage medium may be coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in the node, or elsewhere. In the alternative, the processor and the storage medium may reside as discrete components in the node, or elsewhere in an access network.
FIG. 3 is a schematic block diagram depicting a data communication system for converting multichannel serial data streams into packets. The system 300 comprises a data packer module 302 with channel segment queues. Shown are channel segment queues 304 a through 304 n, where n is not limited to any particular number. The data packer module 302 has an input to accept a plurality of serial data streams on lines 306 a through 306 n in a corresponding plurality of channels A through n. The data packer module 302 packs groups with an undetermined number of data bits in a time domain multiplexed (TDM) fashion from each data stream into an associated channel segment queue. That is, only one data stream is serviced in any particular time interval. A �group� is the collection of a non-predetermined number of valid data bits accepted in a predetermined number of clock cycles. A data stream or channel does not necessarily supply a regular or consistent number of valid data bits in a predetermined period of time. The data packer module 302 supplies segments from each channel segment queue at an output on line 308, where each segment includes a predetermined number of bits.
For example, a segment may be a unit of one byte or two bytes. Typically, the data packer module channel segment queues 304 a through 304 n each have a width of greater than 1 segment. That is, each channel segment queue can �hold� more than 1 segment.
In one aspect, the data packer module 302 supplies segments from the channel segment queues 304 a through 304 n using a round robin polling process (see FIG. 6). Alternately, the data packer module supplies segments triggered in response to the channel segment queues being filled or partially filled to a threshold level.
A multichannel first-in first-out (FIFO) 310 includes channel payload queues 312 a through 312 n, having an input on line 308 to accept segments from the data packer module 302 in a TDM fashion. The FIFO 310 loads segments into associated channel payload queues 312. The FIFO 310 has an output on line 314 to supply payloads from each channel payload queue 312, where each payload includes a predetermined number of segments. Typically, the multichannel FIFO channel payload queues 312 a through 312 n each have a width of greater than 1 payload. The FIFO 310 has an output on line 315 to supply pointer information, so that pointers may be created, which are associated with the stored payloads.
A pointer queue 316 has an input on line 318 to accept pointers with payload information in response to filling an associated payload in the multichannel FIFO 310. The pointers may include information such as the FIFO address of the associated payload, the channel of the payload, and channel alarms. The pointer queue 316 has an output to supply pointers on line 320. A pointer selector 322 has an output on line 324 to select a pointer from the pointer queue 316. Various criteria may be used for selecting a pointer from the pointer queue 316. A pointer may be randomly selected or selected based upon the pointer position in the pointer queue. Or, a specific channel number may be given priority by selecting pointers from that channel when they are available. For example, the pointer at the head of the queue may be selected. As another alternative, a pointer may be selected based upon the fact that a threshold number of payloads exist in an associated channel payload queue. As another example, a pointer may be selected with the largest number of payloads in an associated channel payload queue.
A packet interface module 326 has an input on line 314 to accept the payload from the multichannel FIFO 310, associated with the selected pointer. The packet interface module 326 creates a packet from the payload accepted on line 314, and transmits the packet via a packet interface on line 328. For example, the packet interface on line 328 may be a SPI4.2 interface. However, other packet protocols are known in the art and the system is not limited to any particular protocol.
In one aspect, the packet interface module 326 accepts the selected pointer on line 320, and the pointer information is used by the packet interface module to access and load the appropriate payload from FIFO 310. Alternately but not shown, some other mechanism or module may accept the pointer information on line 320. This alternate mechanism then accesses the appropriate payload from FIFO 310, and directs the accessed payload to packet interface module 326 for packetization. In another aspect, the packet interface module 326 has a pointer input connected to output of the pointer queue 316 on line 320, as shown, and the packet interface module 326 creates a packet with packet overhead using information stored in a pointer associated with the packet payload.
In a different aspect, the packet interface module 326 has a packet header input on line 330. Then, the packet interface module 326 creates the packet with packet overhead information such a packet header or a cyclic redundancy check (CRC) checksum, as supplied on line 330. As another alternative, the packet header or CRC may be generated by the packet interface module.
FIG. 4 is a schematic block diagram depicting a TDM variation of the system of FIG. 3. In this aspect, the data packer module 302 includes a demapper 400 having an input on line 402 to accept a Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH) frame, and an output on lines 306 a through 306 n to supply the plurality of serial data streams as a plurality of TDM data streams demapped from the frame.
In one aspect, the demapper forms a plurality of TDM data streams on lines 306 a through 306 n with an associated plurality of TDM channel clocks. That is, each TDM stream may possibly have a different clock. In other aspects, multiple SONET streams may be accepted, each carrying some TDM channels with their own clock rates. The multichannel FIFO 310 writes segments into the channel segments queues 312 a through 312 n in accordance with the corresponding TDM channel clocks. However, the packet interface module 326 creates the packet by reading the payload from the multichannel FIFO 310 in accordance with a packet interface clock on line 404.
Generally, the packet interface module 326 transmits packets on line 328 at a data rate greater than the combined plurality of channel data rates. Referencing either FIG. 3 or FIG. 4, in some aspects the data packer module 302 accepts the plurality of serial data streams associated with lines 306 a through 306 n on channels having a corresponding plurality of data rates. The packet interface module 326 creates packets for each channel at a rate responsive to the corresponding channel data rate. For example, the channel associated with line 306 b may have a data rate that is greater than the data rate of the channel associated with line 306 a. In this example, the packet interface module 326 generally supplies packets associated with channel B at a proportionally greater rate than the data rate of channel A packets.
Although the system shown in FIGS. 3 and 4 has been defined in terms of hardware circuitry, it should be understood that some elements of the system may be enabled as microprocessor instructions stored in memory and executed by a microprocessor or logic-coded state machine.
FIG. 5 is a diagram depicting a multichannel TDM data stream (prior art). The system shown in FIGS. 3 and 4 can be better appreciated with an understanding of the format of a multichannel TDM data stream. Shown are a TDM data stream with channels A, B, and C. The TDM interface includes at least the following parts: a clock, a data bus, and a channel address. As is shown, the channel address and data are synchronized, and change together on clock edges. In this example, the bus first carries data for channel A, then for channel B. There is then a dead period of 2 cycles during which the bus does not carry any valid data. In this example, the periods of invalid data are indicated by an invalid address. The clock cycle after the dead periods carries data for channel C. Therefore, in any clock cycle, only data for one channel is carried in the TDM stream.
Returning to FIG. 4, a multichannel TDM stream is first demapped and packed using a multichannel packer or data packer module 302. The multichannel packer may be enabled in a random access memory (RAM), to keep track of remaining bits from the incoming TDM stream. The RAM can be thought of as an M1xN1 array where M1 is the number of channels and N1 is the depth of each channel-storage in bits. In one implementation, N1 is 15 bits. Since the TDM data carries data from a single channel in any one clock cycle, that channel number is used as the row index M1. A transformation may be applied to the channel number to go from the normally sparse range of channel addresses to a continuous range of addresses to make efficient use of the RAM. If the incoming data from the demapper 400 is a full segment (e.g., a byte), then that byte is written into the packer RAM and a byte's worth of data is taken out from the packer and written into the multichannel FIFO 310 that follows the packer. If the data coming from the demapper 400 has some bits (less than a byte), that information is tracked and added to the existing count of bits. When the count of bits reaches a byte, then that packed byte is read out from the packer RAM and written into the multichannel FIFO.
The data packer module 302 is followed by a RAM-based structure which implements a multichannel FIFO 310. The FIFO may be implemented as a circular buffer. The FIFO RAM can be thought of as an M2xN2 array where M2 is the number of channels and N2 is the depth of each FIFO in bytes. Since the TDM data carries data from a single channel in any one clock cycle, that channel number is used as the row index M2. Generally, M2=M1, though that is not necessary. A transformation may be applied to the channel number to go from the normally sparse range of channel addresses to a continuous range of addresses to make efficient use of the RAM. As discussed above, in any clock cycle, a particular channel is processed, and a packed byte is either available or not available for that channel. If a byte is available, it is written into the row (one of M2) represented by that channel address.
The RAM width N2 is a multiple of the packet payload size in bytes. In one aspect, the channel payload queues in the FIFO 310 are 4 payloads wide. Typically, the channel payload queues are at least 2 payloads wide, but may be wider without loss of timing information. The additional storage can be used to increase the latency if needed. The width of the channel payload queues also depends on the speed of the packet bus compared to the speed of the TDM bus. In the clock cycle in which a byte is written into the FIFO from the packer side, a determination is also made as to whether at least one payload worth of data is available in that FIFO. Alternately, a holdoff threshold can be set. For example, a channel payload queue may be checked to determine if 2 or more payloads worth of data are available for that channel in the FIFO. If the threshold is met, then some packet pointer information is written into a packet pointer queue 316 in that same clock cycle. The packet pointer information may include the channel number and position of the packet payload in the FIFO, as well as status information, including alarms for that TDM channel. The write position in the channel payload queue is then incremented for the next packet payload. Then, in the next clock cycle, the next channel is processed.
The packet interface module 326 may be used to determine if there is an entry in the channel payload queue, or if a holdoff value is set, whether there are sufficient entries available in the queue. The packet interface module 326 then reads the packet pointer information from the queue. In this aspect, the packet interface module 326 acts as the pointer selector 322. In a simple implementation, the first packet pointer in the pointer queue is selected. The first pointer contains information to determine the position of the associated payload in the FIFO 310. A packet worth of data (i.e., a payload) is read from that channel address in the FIFO. After adding a header, the packet is transmitted. The packet interface module then reads the next address from the channel payload queue and processes that channel.
Since only one TDM channel is processed in a clock cycle, only one channel can complete in the packer, and only one channel can reach the threshold of having sufficient payloads in the FIFO. In one aspect, as soon as any given channel reaches a threshold, its packet pointer information is written into the pointer queue 316. Therefore, by transmitting packets in the order in which they are written into the pointer queue, channels are automatically processed in the order in which they complete�reaching the threshold of having a packet-payload worth of data. In this aspect, channels automatically get packet transmission chances in the exact proportion of their data rate relative to other channels. A faster channel will complete more packet-payloads faster, and will therefore get more transmission chances relative to a slower channel. The relative rates of the channels are therefore maintained and are not convolved with the timing of a polling scheme as in the conventional implementation of FIG. 2. As a result, the system of FIG. 4 maintains the timing of the original TDM streams in the transmission order of the packets.
Another benefit of the system of FIG. 4 is that port bandwidth utilization is automatically monitored by the number of entries in the channel payload queue. If a channel payload queue overflows, the implication can be drawn that the packet bandwidth cannot keep up with the aggregate line TDM rate. Also, by dynamically adjusting the channel payload queue holdoff threshold, more or fewer entries can be stored in the payload FIFO, which allows instantaneous adjustments to be made to the transmitted packet bandwidth. This holdoff adjustment mechanism is useful as a packet bandwidth management tool at the system level.
FIG. 6 is a schematic block diagram depicting a second variation of the system of FIG. 3. The system 300 of FIG. 6 is useful in the case of serial data streams that are not necessarily TDM data, but which have been demapped from a higher-order structure. As shown, the serial data streams 306 a through 306 n may be packed into the multichannel FIFO 310 using a polling scheme. For example, a round robin polling scheme may be used. In this case, there will be some waiting time jitter introduced by the polling scheme. However, since the number of channels is usually low due to limitations on the number of line interfaces supported on a device, that waiting time is likely to be small. In addition, the waiting time is also reduced in this case because the round-robin polling in the case of FIG. 6 is at the byte-level, as compared to the packet-level round-robin shown in FIG. 2.
FIG. 7 is a schematic block diagram depicting a jitter attenuator for converting serial data streams into a multichannel TDM stream. In this aspect, multiple streams on lines 700 a through 700 n can be packed into a multichannel TDM stream on line 402 using a jitter attenuator. The jitter attenuator need not necessarily use conventional bit-asynchronous mapping, as alternate mapping schemes with different waiting time jitter characteristics may be used. This system may advantageously be used to improve the timing of an incoming TDM stream. Even if the incoming TDM stream is perfectly timed, it can be mapped into the TDM stream on line 402 with, at most, up to one bit time of waiting time jitter. The data, in TDM format, can then be processed using the system depicted in FIG. 4.
Generally, the systems depicted in FIGS. 3, 4, and 6 have the advantage of automatically handling the timing-domain crossover from the TDM clock domain to the packet-interface clock domain. From the data writing perspective, the multichannel FIFO and pointer queue operate in the TDM clock domain. From the data reading perspective, the multichannel FIFO and the pointer queue operate in the packet-interface clock domain. By defining a holdoff threshold of greater than 1 payload in the FIFO, it is guaranteed that the payload being read from the packet side is not the same as the one being written from the TDM side. This issue is important because the two clock domains are asynchronous and there is otherwise no guarantee that the address being processed from the packet side is not the same as the one being written to from the TDM side. This present invention, therefore, automatically manages the clock domain crossing.
It is not necessary to read the channel payload queues in the FIFO in the order in which the payloads are written in. In some cases, it may be advantageous to randomize the order of transmission, or impose some other order. Although such an alternate ordering scheme may not maintain the timing as well as a scheme where packets are sent in the order in which they accumulate in the FIFO, there may be other advantages to such an ordering.
FIG. 8 is a flowchart illustrating a method for converting multichannel serial data streams into packets in a data communication interface. Although the method is depicted as a sequence of numbered steps for clarity, the numbering does not necessarily dictate the order of the steps. It should be understood that some of these steps may be skipped, performed in parallel, or performed without the requirement of maintaining a strict order of sequence. The method starts at Step 800.
Step 802 accepts a plurality of serial data streams in a corresponding plurality of channels. Step 804 packs groups with an undetermined number of data bits in a TDM fashion, from each data stream, into an associated channel segment queue, where each segment includes a predetermined number of bits. In a TDM fashion, Step 806 loads segments into an associated channel payload queue, where each payload includes a predetermined number of segments. In response to filling a payload, Step 808 creates an associated pointer in a pointer queue. Step 810 selects a pointer from the pointer queue. Using the payload associated with the selected pointer, Step 812 creates a packet. In one aspect, creating the packet in Step 812 includes creating packet overhead with information such as information stored in the pointer, a packet header, or a CRC checksum. Step 814 transmits the packet via a packet interface.
In one aspect, accepting the plurality of serial data streams in Step 802 includes substeps. Step 802 a accepts SONET/SDH frame. Step 802 b demaps the frame into a plurality of TDM data steams. Further, the TDM data streams formed in Step 802 b may each have an associated (and different) TDM channel clock. Then, loading segments into the associated channel payload queue (Step 806) includes writing segments in accordance with the corresponding TDM channel clocks. However, when the packet is created in Step 812, the payload is read in accordance with a packet interface clock.
In another aspect, Step 802 accepts the plurality of serial data streams on channels having a corresponding plurality of data rates. Then, creating the packet in Step 812 includes creating packets for each channel at a rate responsive to the corresponding channel data rate, and greater than the combined plurality of channel data rates.
In a different aspect, packing groups from each data stream into the associated channel segment queue (Step 804) includes forming channel segment queues, each having a width of greater than 1 segment. Likewise, loading segments into the associated channel payload queue in Step 806 includes forming channel payload queues, each having a width of greater than 1 payload. In one variation Step 806 loads segments into the associated channel payload queue using a round robin polling process.
In one aspect, Step 806 loads segments into a FIFO memory. Then, creating the associated pointer in the pointer queue (Step 808) includes storing information in the pointer such as the FIFO address of the associated payload, the channel of the payload, and channel alarms.
In another aspect, selecting the pointer from the pointer queue in Step 810 includes using criteria such as pointer position in the pointer queue, channel payload queues having a threshold number of payloads, random selection, the channel payload queue having the largest number of payloads, and predefined channel number.
A system and method are presented for converting multichannel serial data streams into packets. Examples of particular circuit blocks and logical steps have been given to illustrate the invention. However, the invention is not limited to merely these examples. Other variations and embodiments of the invention will occur to those skilled in the art.
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How to edit your photos using Adobe Photoshop... | Life Realities
How to edit your photos using Adobe Photoshop...
Do have your own camera? Nor do you have a bunch files of photos which needs to be edited? Well, I’ll help you out to beautify your photos. I just happened to learn photo editing on my own due to eagerness and strong desire to simply manipulate those blurry photos and quite so dark. Even if you don’t have a Nikon camera nor those expensive cameras which produces quality pictures you can still have those great photo shots all you have to do is edit it using the Adobe Photoshop or some other softwares that manipulates photo editing.
But I myself is using this one due to the amazing features that you can only found in this software. Anyway, here is some of the few steps you can use to beautify your photo shots.
NOTE: This is my way of editing pictures you can adopt it or not. It depends on your side. What I’m doing here is trying to help you out to have a great photos out of those low lens cameras.
* Open the Adobe Photoshop (any version)
* After doing so, you’ll probably see the working environment of the Adobe Photoshop. Click the FILE button on the upper left portion. Then, click OPEN. Choose the directory were your pictures resides and choose the photo(s) you want to edit.
* You now see the photo on your monitor inside the Adobe Photoshop. Click the IMAGE button on the upper left portion of the screen. Then, click ADJUSTMENT and drag the cursor to the right then click CURVES.
* A new popup window of CURVES will appear. You may now adjust it by pointing the cursor inside the popup window and drag it. Just be careful in dragging it ’cause you might drag it over that will result to bad effects. Then click OK.
* This will help you manipulate the darker tomes of the photo.
* After doing so, click the FILTER button then click SHARPEN and drag the cursor to the right then click SMART SHARPEN.
* A new popup window of SMART SHARPEN will appear. You may now adjust the sharpness of the photo by pointing the cursor to the AMOUNT button then click OK.
* Thats it! That was just some of the basic photo editing I usually adopt.
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Details about 5 Lady Fern Athyrium filix -femina PREMIUM NATIVE WOODLAND FERNS BARE ROOT
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text:
Patent US6678062 - Automated system with improved height sensing - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsAn automated system includes improved height sensing. In one aspect, a on-head camera performs the dual functions of fiducial imaging and height sensing using an auxiliary off-axis light source and triangulation. In another aspect, an on-head height sensor is positioned to measure height at a location...http://www.google.com/patents/US6678062?utm_source=gb-gplus-sharePatent US6678062 - Automated system with improved height sensingAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS6678062 B2Publication typeGrantApplication numberUS 10/021,288Publication dateJan 13, 2004Filing dateDec 7, 2001Priority dateDec 8, 2000Fee statusPaidAlso published asUS20020078580, WO2002046713A2, WO2002046713A3Publication number021288, 10021288, US 6678062 B2, US 6678062B2, US-B2-6678062, US6678062 B2, US6678062B2InventorsPaul R. Haugen, David Fishbaine, Eric P. Rudd, David M. Kranz, Carl E. Haugen, Adam ReinhardtOriginal AssigneeCyberoptics CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (41), Referenced by (25), Classifications (10), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetAutomated system with improved height sensing
US 6678062 B2Abstract
An automated system includes improved height sensing. In one aspect, a on-head camera performs the dual functions of fiducial imaging and height sensing using an auxiliary off-axis light source and triangulation. In another aspect, an on-head height sensor is positioned to measure height at a location that is not beneath any nozzles. The sensor provides height information at a plurality of locations over the board, and a height map of the board is created. In yet another aspect of the invention, the above features are combined to provide an on-head camera that images fiducials and measures height at a plurality of locations such that a height map is created.
This application claims priority to prior provisional application No. 60/254,247 filed Dec. 8, 2000 entitled DISTANCE TO BOARD SENSOR AND METHOD FOR CONTOURING THE SURFACE OF A PC BOARD; and to prior provisional application No. 60/275,281 filed Mar. 13, 2001 entitled LASER TRIANGULATION RANGE WHICH USES COMMON CCD AS IS USED BY MAIN CAMERA.
The present invention relates generally to a system for obtaining distance to target information in automated assembly and/or inspection machines.
An automated system includes improved height sensing. In one aspect, an on-head camera performs the dual functions of fiducial imaging and height sensing using an auxiliary off-axis light source and triangulation. In another aspect, an on-head height sensor is positioned to measure height at a location that is not beneath any nozzles. The sensor provides height information at a plurality of locations over the board, and a height map of the board is created. In yet another aspect of the invention, the above features are combined to provide an on-head camera that images fiducials and measures height at a plurality of locations such that a height map is created.
Although embodiments of the present invention will be described with respect to a pick and place machine, those skilled in the art will recognize that embodiments of the present invention are applicable to a number of other assembly or inspection machines. Further, although the pick and place machine described herein utilizes a placement head that moves relative to the circuit board, such relative motion expressly includes machines that cause the board to move or both the board and the head to move as well.
An automated machine, specifically, a pick and place machine, shown generally at 201 in FIG. 1, includes conveyor system 202 for transporting a printed circuit board 203 into a working area. Pick and place machine 201 includes an x and y motor drive assembly at 204 for moving vacuum head 206 independently in the x and y directions. Attached to head 206 are multiple vacuum nozzles 208, 210, 212 for releasably holding one or more components. Head 206 picks up each of the three components at trays (not shown) and while head 206 is transporting the components to printed circuit board 203, sensor 200 senses the x,y and theta orientation of the components. Since sensor 200 is positioned on head 206, it is considered an on-head sensor and senses the x,y and theta orientation of the components while head 206 transports the components to board 203. FIG. 1 also illustrates camera 209 located on head 206. Generally, a camera positioned on a placement head is used to image reference marks or “fiducials” located on the circuit board in order to provide location information to machine 201. As will be described in more detail below, some embodiments of the invention provide an additional light source for operation in conjunction with camera 209 to allow camera 209 to provide height information relative to the distance between placement head 206 and board 203.
FIG. 4, is a diagrammatic view of camera 209 adapted to operate as both a height sensor and fiducial imaging device. As described with respect to FIGS. 2 and 3, camera 209 operates in conjunction with angled light source 412 to sense height. Source 412 can be any suitable source for generating a beam of light. Source 412 may include structured or unstructured light, and may include LED's, and/or white light. In accordance with an embodiment of the invention, camera 209 not only senses range, but also senses fiducials using general purpose illuminators 430. Preferably, illuminators 430 are Light Emitting Diodes (LED's). Camera 209, source 412 and illuminators 430 are coupled to controller 432. Controller 432 selects which illumination source to use, and which function camera 209 will perform. Thus, when height is to be sensed, source 412 is energized, illuminators 430 are de-energized and the image acquired by camera 209 is used to determine height. When a fiducial is to be imaged, source 412 is de-energized and illuminators 430 are energized, and the image(s) acquired by camera 209 are used in accordance with known techniques to determine fiducial location. Preferably, controller 432 sequences the acquisition of images such that one image is formed using off-axis illuminator 412, and another image is formed using illuminators 430. Alternately, controller 432 can energize both source 412 and illuminators 430 such that an image is acquired while both are energized so long as the return signals are differentiable (e.g. different wavelengths, intensities, locations). In one embodiment, the images are acquired in rapid succession as described in U.S. patent application Ser. No. 09/522,519, filed Mar. 10, 2000, entitled “INSPECTION SYSTEM WITH VIBRATION RESISTANT VIDEO CAPTURE”, which application is herein incorporated by reference.
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- Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services


text:
T Brinks Fishing: Bassmaster Classic Day 1
My fantasy fishing pics were pretty good....if you take Russ Lane out of the picture. It looks like he came back with nothing. I'm really pulling for Brandon Palaniuk, who is currently in 11th. I hope he makes the move up, but my prediction is another KVD win and 2nd for Aaron Martens.