ITEM 1. BUSINESS
Zycad Corporation-Registered Trademark- (the "Company")(1) designs, manufactures and markets a broad array of high performance tools and services for design verification of electronic systems and components. Zycad's products, include hardware and software simulation acceleration tools, emulation/rapid prototyping systems, partitioning software and, recently introduced, high-density field programmable gate arrays (FPGAs) and related desktop foundry design tools, that enable electronic designers to verify their designs prior to production. This process of verification throughout the design cycle ensures that a design produces a final delivered product that meets the customer's requirements. The high-density FPGAs also provide designers with an alternative to using ASICs (Application Specific Integrated Circuit) for their more complex, higher-density designs.
Zycad's business emphasis is on providing both the highest performance simulation and emulation verification product offerings in the EDA (Electronic Design Automation) market and the highest density FPGAs to the ASIC designer for both design verification and programmable component use. All development activities are focused on bringing these technologies together to solve the customer's high-end complex verification problems.
Customers benefit from Zycad's solutions by:
- - GETTING TO MARKET FASTER at the lowest possible cost.
- - IMPROVING PRODUCT QUALITY through more comprehensive verification.
- - REDUCING RISK and MANAGING COMPLEXITY through the effective application of advanced verification tools, methodologies and services.
Zycad Corporation, founded in 1981, designs, develops, and markets products and services that provide design verification, rapid prototyping, test analysis and programmable silicon components to customers designing high-performance, electronic systems. These allow customers to quickly logic simulate, fault simulate, emulate, or rapidly prototype their designs. Logic simulation is used to verify accuracy, completeness, and quality of designs before building hardware. Fault simulation is used to verify the quality and completeness of tests developed for the design once it is manufactured. Emulation is the ability to replicate the operation of a portion of a design by programming a series of FPGAs to behave like the target circuit. Rapid prototyping also uses FPGAs, but takes a more flexible approach to replicating behavior of a system by allowing other system components, like processors, memory, and software, to be included in the emulation environment.
Zycad's corporate offices, product development operations and its GateField division are located in Fremont, California. The services operations, which provide consulting, engineering and design management services is located in Rockaway, New Jersey. Sales and support offices are located throughout the United States, Europe, Japan and Asia.
- -------------------------- (1) As used herein, the term "Company" includes Zycad Corporation and its wholly-owned subsidiaries listed in Exhibit 21.1 hereto, unless the context requires otherwise.
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STRATEGY
ZYCAD'S STRATEGY IS TO PROVIDE HIGH PERFORMANCE VERIFICATION SOLUTIONS TO DEVELOPERS OF COMPLEX ELECTRONIC PRODUCTS AND TO PROVIDE HIGH-DENSITY FPGAS AS AN ALTERNATIVE TO USING CUSTOM OR SEMI-CUSTOM ASICS IN END-USER PRODUCTS
In the development of today's electronic systems, the market pressures of creating increasingly more complex products, in constantly decreasing time frames, forces design engineers to seek improved methods of development. The primary challenge during the mid to late 1990's will be how to integrate all the components of a system so that it works right the first time and meets the customers' expectations - the two greatest concerns among system designers. The available tools have solved many of the problems of getting the individual components of the system to work right the first time, but fall short in solving the problem for an entire system. In particular, challenges for system developers include:
- Design complexity that increases dramatically each year.
- This complexity then permeates the design cycle, making traditional end-of-process methods of verification obsolete.
- This complexity also increases the risk that designs will fail to meet customer expectations for performance, functionality, ruggedness, and other issues of quality.
Zycad will continue to provide high performance, verification solutions to address the problem of complexity by enabling developers to verify their complex electronic systems prior to productization. Verification has the goal of minimizing downstream problems and risks (i.e., avoiding the expensive and time- consuming process of redesign should a final design not work or the manufactured product does not meet customer requirements). As with all development strategies, the ultimate objective is to produce the best product, at the lowest cost, as early as possible.
MARKET
Companies who market electronic products must overcome the shorter product life cycles, and yet increasing design complexity for these products. System architects, system engineers, hardware and software design engineers, and test engineers in all electronic industries confront a similar set of problems in evolving new products from concept to physical reality. This has made the product development cycle more difficult to control and manage.
Increasing complexity of electronic system and circuit design is a key trend which will continue to require companies to make extensive changes to their organizations and design methodologies over the next few years. Recent market surveys from Dataquest Inc. show that approximately 50% of new electronic design starts will comprise gate complexity of more than 50,000 gates, and more than half of those will be greater than 100,000-gate designs. Within our customer base, some design sizes already reach beyond one million gates.
With this growth in electronic systems design size and complexity comes an increasing need to know whether the system will work as intended before fabrication. The problem of redesigning a product or coping with widespread field failures can be catastrophic. In addition, being late to market can cause dire consequences for products and the companies developing them. Designers are challenged with bringing increasingly advanced, higher quality products to market faster in order to remain competitive.
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Zycad's customers include:
- SEMICONDUCTOR MANUFACTURERS with architecture compatibility, fast time-to-volume and high quality requirements. - MILITARY/AEROSPACE COMPANIES with the need to integrate increasingly complex avionics in reduced budget and schedule environments. - TELECOMMUNICATIONS EQUIPMENT MANUFACTURERS with zero fault tolerance requirements and reduced market windows. - MULTI-MEDIA COMPANIES that need to make real-time subjective measurements of their designs in order to fine-tune their products before submitting to manufacturing. - COMPUTER VENDORS with rapidly shortening product life cycles, requiring a predictable development process and efficient system integration.
ASIC/FPGA
Characteristics of today's $7 billion ASIC market include non-recurring engineering costs in the several hundred thousands of dollars to incorporate electronic designs into ASICs for complex designs, lead times of 16 weeks or more from completion of design verification to receiving the ASIC and 65% of design starts result in unit volume of less than 1,000 units. Where product life cycles are short, waiting 16 weeks can have a dramatic influence on time to market and profitability results, and if the ASIC doesn't meet the component or system requirements, even further costs, delays, and profit consequences.
An alternative is using reprogrammable FPGAs. Where design corrections are needed, designers simply reprogram the part and proceed with the verification process until satisfied. Then, instead of waiting 16 or more weeks, the FPGA is included in the final system and shipped to customers. When increasing volume justifies it, the design can then be mapped to an ASIC for unit cost savings. But, this can be done while the product is generating revenues and profits.
Today's FPGA vendors cannot meet the density requirements of designs greater than 12,000 to 15,000 gates on a single FPGA. Furthermore, because their tools are not sufficiently compatible with "Top Down" design tools used by ASIC designers, use of these FPGAs requires additional effort and time to complete the design and get the product to market, exactly the opposite of what is needed.
The Company's GateField 100,000 gate family of FPGAs, together with its "Top Down" methodology compatible software tools, provide a desktop foundry system that allows ASIC designers to easily work within their current design environment to verify their design and get their product to market more quickly.
ZYCAD'S PRODUCTS
Zycad products provide high-performance solutions for concurrent verification of complex electronic system designs. These products include Paradigm XP simulation accelerators, Paradigm RP rapid prototyping/emulation systems and the Desktop Foundry system of GateField FPGAs and Desktop Foundry Tools. These verification products are enhanced by the Zycad Service Division's consulting and engineering services business.
Zycad's products and services are complementary. Figure 1 shows the tasks that a typical design engineer must take to develop a product, and the areas in which Zycad's products are used. The segments defined as dark blocks with white letters are those that Zycad products can accelerate. The figure demonstrates that all the products are needed and can be an important part in the verification of a complex electronic system.
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[FLOW CHART]
Fig. 1: Designing a Complex Product Requires Regular Verification with Zycad's Products
Each block in Figure 1 above represents the process of designing an electronic product. The tasks occur in time from left to right. Block 1 shows requirements definition and Block 2 shows high-level system analysis. Once the system analysis is complete the process splits into parallel hardware and software tasks.
On the software track, Block 3b, the software code is constructed at a high level, then divided into different processes for further development. On the hardware side, Block 3a, a behavioral or RTL description is created and, then synthesized into gates. The gate structure, the real building blocks of a system, is developed and simulated on the Paradigm XP, Block 4a, until the designer is satisfied with the results. At that point, the design can be defined at the physical implementation level, Block 5a, in order to prepare for manufacturing. During this process, fault simulation can be run on the Paradigm XP, Block 5, in order to grade the tests that will be used to verify the finished product. Before sending off the ASICs to be manufactured, it is wise to test them along with the software and other system components on the Paradigm RP, Block 5b, in order to ensure compatibility. Now, when the chips come back, it is easy to perform a final hardware/software integration and productization, Block 6, before shipping to customers.
Zycad and its products are unique in many ways, which helps the company maintain a strong technical lead in the industry. A few of these features include:
PERFORMANCE - A criteria for all development at Zycad is that the products provide at least an order of magnitude performance improvement over other methods available in the marketplace. This performance is critical to both simulation and emulation applications required for system verification.
ARCHITECTURE - The Company's hardware products' advantage over software-based simulators on traditional workstations is achieved by building products that have a much different architecture. Zycad's development emphasis is on developing high performance simulation and emulation/rapid prototyping products, not general purpose machines as the workstations manufacturers are designing. With this main focus, Zycad employs specialized techniques, technology and architectures that produce systems that provide an order, to orders of magnitude greater performance over workstations.
AN EDA COMPANY THAT DESIGNS HARDWARE - Zycad is an EDA company that actually uses its own tools and methodologies to design its hardware. We are our own end user and, therefore, have the opportunity to debug our tools and services in a real world environment before taking them to our customers. Our Services business is dramatically enhanced by the on-going real world experience that our engineers obtain through the development of our products.
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Specifically, Zycad incorporates these features into its main product lines:
PARADIGM XP SIMULATION ACCELERATOR
The Paradigm XP family is the world's leading line of structural logic and fault simulation accelerators that meet the verification challenges of complex ASIC and large system designs. They range in price from approximately $50,000 for an entry-level model with 256,000 gate capacity to several hundred thousand dollars for expansion to multi-million gate capacity. The Paradigm XP provides powerful features that address ASIC, integrated circuit, and system logic and fault verification problems including modular compilation and hardware assisted toggle test.
Transparent interfaces are provided to popular simulation environments and to VHDL via third party tools. This allows the Paradigm XP product line to transparently integrate into these environments, making it easy for the design engineer to access the XP accelerators in their design environment. Interfaces include:
- - QuickSim II-TM- - VHDL System (Mentor Graphics-TM-) Simulator-TM-(Synopsys-Registered Trademark-) - ViewSim-TM- (Viewlogic) - - Verilog-Registered Trademark- (Cadence) - MDE-Registered - - VantageSpreadSheet-TM- (Viewlogic) Trademark-/C-MDE-TM-(LSI Logic) - - VLSI Link (Compass)
Libraries are always a main concern with our customers. In order to ease the creation of accurate libraries, Zycad has developed automated tools that will accept multiple sources for library translation.
The Paradigm XP is available in three basic system configurations. The Paradigm XP 2001 Desktop Accelerator is a single-board, entry-level system that supports up to 256,000 gates for logic simulation and 64,000 gates for fault simulation. The Paradigm XP 2004 Design Team Accelerator is a four-board, office environment system expandable to one million gates for logic and 256,000 gates for fault simulation. And the Paradigm XP 2016 System Design Accelerator is a 16-board configuration which offers capacity expansion to 16 million gates for logic simulation and four million gates for fault simulation.
LIGHTSPEED SIMULATION SERVER
The Company has recently announced its next generation accelerator, LightSpeed, which is expected to be 10 to 40 times faster than the Paradigm XP and will be available to beta customers in June 1996, with production quantities in Q3 1996.
PARADIGM RP RAPID PROTOTYPING SYSTEM
The Paradigm RP, starting at below $100,000, was the industry's first low-cost rapid prototyping system, and is currently offered as a series of application- specific rapid prototyping solutions. It became part of Zycad's product line with the acquisition of InCA, Ltd. and its VA-II product in September of 1993. The first Paradigm RP systems are geared to digital signal processor (DSP) based design, and speed DSP time-to-market cycles by enabling developers to emulate and rapid prototype complex DSP-based designs before committing them to silicon.
The Paradigm RP provides the performance and flexibility required for the near- real-time testing of DSP designs with complexities up to 120,000 gates and with clock rates exceeding 10MHz. The system is based on a 30,000 gate module containing high speed, electrically reprogrammable FPGAs.
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An intuitive yet powerful graphical user environment, Concept Silicon, allows the importing, partitioning, and mapping of designs to the system's emulation hardware. Concept Silcon supports both standard Paradigm RP emulation hardware and user-defined prototype hardware.
The partitioning software within the Concept Silicon promotes fast concept-to- production by taking a netlist from a computer-aided engineering (CAE) system and automatically partitioning it across multiple FPGAs, thereby providing device programming data and a manufacturing database for printed circuit board (PCB) design. The partitioner software is designed to minimize the connectivity between FPGAs while optimizing high gate utilization, thus achieving an emulated system on a par with a production board.
By incorporating the GateField family of 100K gate FPGAs into its RP product offering, the Company expects to significantly improve its capacity and value to rapid prototyping customers.
GATEFIELD FPGAs
The GateField GF100K series of field-programmable FPGAs use a unique architecture and switch technology to provide a device that is comparable to a gate array in capacity and usable density, while offering all the advantages of non-volatility and field re-programmability. The revolutionary Sea-of-Tiles-TM- architecture coupled with GateField's Desktop Foundry software, provides the ASIC designer with unparalleled gate capacity and automation.
With the wide acceptance of top-down design methodologies, the average size of ASIC designs is approaching 30K gates and countinues to grow. CMOS gate arrays are the dominant ASIC technology. They are highly integrated, flexible, and well supported by EDA tools. But they also have high initial costs, slow turnaround time and require zero design defects. Current FPGA products avoid these drawbacks, but do not provide the high gate density, the flexibility, nor the support for top-down design methodologies needed for ASIC design.
ZYCAD'S SERVICES DIVISION
Zycad's Services Division offers consulting, engineering and process management services with an emphasis on complex system design verification methodologies. The services engineering staff leverage Zycad products to achieve customers' goals of increasing design productivity, reducing development costs and improving product quality.
Consulting services are comprised of assessment/recommendation and implementation planning. These services include:
- DESIGN AND VERIFICATION METHODOLOGY CONSULTING. Zycad recommends design methodologies and verification tools (e.g. simulation, emulation, rapid prototyping) for determining the completeness of a system design in the shortest time frame with minimal cost.
- FAULT SIMULATION AND TEST GENERATION CONSULTING. Customers leverage Zycad's expertise in fault simulating highly complex circuits. Zycad recommends optimal fault grading and vector generation methodologies to help customers meet strict quality requirements.
Zycad's engineering services include both packaged and custom engineering services executed by expert design, test and software engineers to enhance customer development teams and/or increase design environment productivity. These services include:
- FAULT GRADING AND TEST VECTOR GENERATION -- Perform fault vector grading and increase fault coverage by developing additional vectors.
- SYSTEM SIMULATION -- Perform complex system simulations to help customers debug functional designs.
- ASIC DESIGN -- Develop ASICs from customer specifications.
- RAPID PROTOTYPING -- Develop FPGA-based rapid prototypes of customer-specific systems within the context of additional system entities, including processors, memories, and software.
- MODEL DEVELOPMENT -- Develop behavioral/specification models using VHDL and/or Verilog.
Process management services involve managing a critical segment of a customer's design and/or verification process. This can include managing the modeling, system simulation, rapid prototyping, fault grading, and/or test generation activities on a project.
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PRODUCT DEVELOPMENT
Zycad is regularly engaged in ongoing research and development to further enhance and improve its family of high-performance design verification products. The Company will introduce its next generation simulation accelerator, LightSpeed, in June 1996 and will also introduce several other FPGA products ranging in densities from 23K up to 100K. In fiscal year 1995, the Company expensed $11,263,000 on research and development, compared to $11,172,000 in 1994 and $9,339,000 in 1993.
MARKETING & SALES
Zycad markets its products directly, through a worldwide product and service sales organization. The Company has direct sales offices in North America, Europe, Japan, Korea, and Taiwan. To complement its direct organization, the Company also has international distributors in the Far East, Israel and Europe.
The Company highlights the economic benefits that can be gained from use of its high performance verification products and services. In addition, demonstration of the products' capacity and speed to individual potential customers through the use of benchmark comparisons against software alternatives is an important element of the selling cycle. The Company's applications engineers, consulting engineers, and sales force are involved in the sales process in order to provide pre-sale technical assistance, technical credibility, and continuity with post- sale installation and servicing. The Company's general policy is to sell and not to lease its products; however, leasing arrangements are available for customers who prefer that option.
The rate at which orders are received by the Company may vary from month to month. In addition, customers' lead times for placing purchase orders have varied substantially. For these reasons, the Company's backlog as of any particular date may not be indicative of its actual sales for any succeeding period.
The Company offers a maintenance agreement to its customers under which its applications engineers provide diagnostic, repair or replacement and maintenance service.
Zycad will market its GateField FPGA products both directly through its worldwide sales organization, as well as through manufacturing representatives. In addition, the manufacturer of the GateField FPGAs, Rohm Co. LTD. located in Kyoto Japan, will also market and sell the GF100K series of FPGAs and the Desktop Foundry design software tools in Japan on a non-exclusive basis. Rohm has strong marketing and sales presence in Japan through its seven design centers and its direct sales force of 350 people. This partnership provides Zycad the opportunity to quickly penetrate the Japanese market, which according to the market research from Dataquest, constitutes 36 percent of the world's gate array market.
For Export Sales Information for the three years ended December 31, 1995, see Note 10 to the Company's Consolidated Financial Statements in the Company's Annual Report to its stockholders for the year ended December 31, 1995, which Note has been incorporated herein by reference in Item 8.
COMPETITION
The EDA market is a dynamic market characterized by advancing technologies in both hardware and software. The advancing technologies frequently result in new product introductions, increased product capabilities and relative product improvements in price/performance ratios. The Company recognizes that rapid technological changes could impair its competitive position.
Indirect competition for the Company's system verification products consists primarily of software simulators that run on general purpose workstations. Software simulators currently hold a large share of the logic simulation market. However, the Company's strategy is to leverage this large installed base of software simulators through selling accelerators as a complementary point tool into the large installed base of EDA vendors whose customers require increased simulation performance.
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Direct competition to the Paradigm XP comes from one other company with a hardware-assisted simulator, IKOS Systems, Inc. Zycad believes that the combined features, speed, and capacity of its current and future products offer competitive performance and functionality advantages over Ikos. Competition in the emulation/rapid prototyping arena, versus the Paradigm RP, comes mainly from Quickturn Design Systems, Inc., although their products are mostly targeted at the small number of customers that need very large capacities. The Paradigm RP, on the other hand, is targeted at the many telecom, audio, and multi-media companies that may not have huge circuits to prototype, but need a machine that can provide a real-time test of their product. There are other companies that recently have bought products they intend to market in the emulation/system rapid prototyping arena, including Synopsys and Mentor Graphics.
Indirect competition for the Company's services, comes primarily from customers accomplishing the activity with their own personnel. The Company's strategy is to demonstrate our expertise to accomplish the objectives more rapidly and extensively than less experienced individuals might achieve.
Direct competition for the Company's services comes from other EDA vendors including Cadence Design Systems, Inc. and Mentor Graphics. The EDA vendors services are primarily focused on the tools they provide. Zycad offers a significant advantage through its ability to work with many tools and its experience in real hardware design. The Company's focus on the contribution of the systems engineering process to systems integration success is not addressed by the EDA vendors.
Management believes that its superior products, consulting services, and customer support will enable the Company to compete effectively in the EDA market based on the breadth, quality, features, performance and price of its product offerings and the neutrality, flexibility, and technological prowess of its services offerings.
The FPGA market is a fast growing and dynamic market with several large established vendors including Xilinx, Altera and Actel. These companies offer broad product lines but have not yet been very successful in providing high-density FPGA solutions to gate array designers. Their penetration into this market has been limited, both by their lack of high gate count devices, and by the mismatch between the top down design methodologies used by gate array designers and the design tools required to use their FPGAs effectively. The revolutionary flash switch technology utilitied by the GF100K family provides a 7X size advantage over switches used by SRAM-based devices offered by the market leaders in higher gate count devices. This switch technology is used in a Sea-of-Tiles architecture to create devices that have a 2X-4X density advantage over the competitive offerings. Unlike competing devices the Sea-of-Tiles architecture has been designed specifically to work seamlessly in the top down design flow used by today's ASIC designers. The GateField devices offer the gate array designer not only high density but also allow the designer to remain within his established design environment.
PATENTS AND TRADEMARKS
Due to the rapid pace of technological advance, the Company believes that, while the protection of proprietary information is important, it must continue to develop and market new products to remain competitive. The Company protects its proprietary product information through issuance of patents, use of employee nondisclosure agreements and by limiting access to sensitive information. On July 2, 1985, United States Patent No. 4,527,249 was issued to the Company for a "Concurrent Fault Simulation for Logic Designs", and on April 5, 1988, United States Patent No. 4,736,338 was issued to the Company for a "Programmable Look Up System". These patents are effective for a period of 17 years from the issue date and the Company believes that these patents are an important factor in the protection of its proprietary information. On May 17, 1989, the Company signed a Patent Cross License Agreement with IKOS Systems, Inc., under which both companies granted to each other a perpetual non-exclusive license for logic or fault simulation products utilizing inventions covered by its respective patents issued through May 1, 1994.
On October 10, 1995, United States Patent No. 5.457,653 was isssued to the Company for a "Technique To Prevent Deprogramming A Floating Gate Transistor Used To Directly Switch A Large Electrical Signal". This is the first patent issued for the GateField FPGA technology and several more patent applications are on file and are pending at this time.
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The Company has obtained federal trademark registration for its trademark "Zycad Corporation" from the United States Patent and Trademark Office.
EMPLOYEES
At December 31, 1995, the Company had 219 employees. The employees are not represented by a labor organization, and the Company considers its relations with its employees to be good.
MANUFACTURING
The Company's accelerator and rapid prototyping hardware products utilize a technology which has significant impact upon its manufacturing activities. The efficient use of full custom IC's dramatically reduces both assembly and test time. In addition, custom IC's tend to operate more reliably than a functionally equivalent printed circuit board due to a number of factors including the reduction of solder points and external contacts.
Product configurations include standard computer components such as a controller, CPU and main memory which are selected from various independent suppliers on the basis of cost, reliability and performance properties. These standard components are connected utilizing proprietary bus structures and controlled using operating systems with proprietary extensions as they interact with the Company's custom IC-based, application-specific subsystems.
The Company contracts out certain manufacturing steps, including printed circuit fabrication and assembly, circuit board wiring, cabinet fabrication and assembly, sheet metal fabrication and painting, and performs final assembly, configuration, testing and quality control procedures itself. Circuit boards are wired by automated equipment on computerized instructions generated on the Company's own CAE system, which is used extensively in order design and test phases. Manufacturing efficiency is enhanced by testing each circuit board on the Company's test equipment. After final assembly and configuration, each simulation system undergoes additional "burn in" testing.
The company's FPGA products are manufactured by Rohm CO. LTD, located in Kyoto, Japan under a manufacturing and development partnership agreement. GateField and Rohm have built a strong working alliance that dates back to October 1993. ROHM is widely recognized for its expertise in large scale integration (LSI) manufacturing and as one of the pioneers in flash technology. As part of the agreement, the company has secured guaranteed wafer capacity sufficient to meet the expected product needs for the foreseeable future. Packaging for the Gatefield parts is done by third-party companies located in the Philippines and in Korea. The company performs wafer sort and final test at its facilities in Fremont California, but, as volume dictates these activities may be moved off shore.
Currently, Zycad has sufficient capacity to meet its present manufacturing requirements through 1996 and the foreseeable future.
ITEM 2.
ITEM 2. PROPERTIES
The Company occupies approximately 61,000 square feet of office space in Fremont, California for its headquarters, manufacturing, and engineering operations. The total lease payments remaining amount to approximately $2.3 million. The lease expires July 31, 1999. The Company's Service Division in New Jersey, occupies approximately 25,000 square feet of office space. Total lease payments remaining through February, 1998 amount to approximately $1.8 million. For additional information, see Note 6 of "Notes to Consolidated Financial Statements" included in the Company's 1995 Annual Report to Stockholders.
The Company leases sales and support office space in seven domestic locations, three European locations, one Taiwanese, one Korean and one Japanese location on a short-term or intermediate-term basis.
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ITEM 3.
ITEM 3. LEGAL PROCEEDINGS None.
ITEM 4:
ITEM 4: SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
A special meeting of the stockholders was held on December 18, 1995 for the purpose of voting on the following proposals with the following votes cast:
EXECUTIVE OFFICERS OF THE REGISTRANT
Set forth below is information regarding executive officers of the Company:
Dr. Smith was named President, Chief Executive Officer and a Director of Zycad Corporation in June 1990. He had been an industry consultant after leaving his post as Chairman and CEO of Edgecore Technology, Inc., after its September 1989 acquisition by Arix Corporation. Previously, Dr. Smith had served as President and CEO and a director of CAE Systems, which was sold to Tektronix in March 1985, and prior to that, he was Vice President, Marketing for Computervision. Dr. Smith holds a Ph.D. in business administration from St. Louis University, an M.B.A. from Michigan State and a B.S. from the U.S. Military Academy at West Point.
Mr. Cassidy joined the Company in July 1990 from Sharebase Corporation, where he served as Executive Vice President, Operations and CFO. Before joining Sharebase in October 1987, he held a similar position at NCA Corporation, a supplier of computer software for manufacturing resource planning. He holds a B.S. in Accounting from the University of Dayton.
Mr. Klint joined the Company in December 1984 as Director of Contracts, was named Corporate Secretary in June 1986, and was promoted to Vice President and General Counsel in November 1987. Mr. Klint holds a J.D. degree from William Mitchel College of Law and a B.A. degree from Gustavus Adolphus College.
Mr. Olson joined the Company in 1982 and, except for a 2 year separation from 1986 to 1988, has been employed at the Company since that time. He has served in his current position since January 1995 and prior to January 1995 held several management positions including, Vice President
Mr. Sandfort joined the Company in September 1995 after serving ten years at LSI Logic, his most recent position being Executive Vice President for Geographic Markets. He also held other senior management positions at LSI including General Manager, Germany; Vice President Marketing, Sales and Engineering LSI Europe; and President, LSI Europe.
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Worldwide Sales -GateField Division, Vice President and General Manager - ViP Division and Director of Sales - Western area.
There are no family relationships among the officers listed, and there are no arrangements or understandings pursuant to which any of them were elected as officers.
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PART II
ITEM 5.
ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS
The information under the heading "Stock Listing" on page 17 of the Company's 1995 Annual Report to Stockholders is incorporated herein by reference.
ITEM 6.
ITEM 6. SELECTED FINANCIAL DATA
The information under the heading "Selected Financial Data" on page 1 of the Company's 1995 Annual Report to Stockholders is incorporated herein by reference.
Item 7.
Item 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS
The information under the heading "Management's Discussion and Analysis of Financial Condition and Results of Operations" on pages 4 and 5 of the Company's 1995 Annual Report to Stockholders is incorporated herein by reference.
Item 8.
Item 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA
The Independent Auditors' Report, the consolidated financial statements and the notes to consolidated financial statements on pages 6 to 15 of the Company's 1995 Annual Report to Stockholders are incorporated herein by reference.
Item 9.
Item 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE
Not applicable.
(THE REMAINDER OF THIS PAGE IS INTENTIONALLY LEFT BLANK)
PART III
ITEM 10.
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT
DIRECTORS
Set forth below is information regarding the Directors of the Company, including information furnished by them as to their principal occupation for the last five years, certain other directorships held by them, and their ages as of March 29, 1996:
Except as set forth below, each of the nominees has been engaged in his principal occupation set forth above during the past five years. There is no family relationship between any of the directors and executive officers of the Company.
Dr. Smith was named President, Chief Executive Officer and director of the Company in June 1990. He had been an Independent industry consultant from October 1989 to June 1990 after leaving his post as Chairman and Chief Executive Officer of Edgecore Technology, Inc., a computer manufacturer, after it was acquired by Arix Corporation in September 1989. Previously, Dr. Smith had been President and Chief Executive Officer and a director of CAE Systems, Inc.
Mr. Cassidy was appointed a director of the Company in November 1991. He has held the position of Executive Vice President and Chief Financial Officer of Zycad Corporation since July 1990. From October 1987 to July 1990, he was Executive Vice President, Operations and Chief Financial Officer for Sharebase Corporation, a relational data base system supplier.
Dr. Fiebiger was appointed a director of the Company in February 1994. Dr., Fiebiger has been a Consultant for the semiconductor industry since serving as President and Chief Operating Officer of VLSI Technology, Inc., a manufacturer of semiconductors, from February 1988 to August 1993. Previous positions include President and CEO of Thomson-Mostek and Senior Vice President and Assistant General Manager of Motorola's Worldwide Semiconductor Sector. Dr. Fiebiger is also a member of the board of directors of Mentor Graphics Corporation, Cooper & Chyan Technology, Inc., and Chairman and Managing Director, Thunderbird Technology, Inc.
Mr. Huberman was appointed a director of the Company in September 1990. He has served as President of the Huberman Consulting Group, a technology consulting firm, since 1990. Prior to that, he served as Vice president of Consultants International from 1981 to 1988 and as President from 1988
to 1990. Mr. Huberman is currently a member of the Chief of Naval Operations' Executive Panel. From 1988 to mid-1990, he also served as the first chairman of the Technical Advisory Panel to the U.S. Space Command. Mr. Huberman is also a member of the board of directors of Silicon Valley Research, Inc.
Mr. Sandfort was appointed a director of the Company in September 1995. He held the position of Executive Vice President for Geographic Markets at LSI Logic, where he had worldwide responsibilities for Sales, Marketing, and Engineering in Asia, Canada, Europe and the U.S.A. During his ten years at LSI, he was also employed in a variety of other senior management positions including General Manager, Germany; Vice President Marketing, Sales and Engineering LSI Europe; and President, LSI Europe.
COMPLIANCE WITH SECTION 16(A) OF THE EXCHANGE ACT
Section 16(a) of the Securities Exchange Act of 1934 requires the Company's officers and directors, and persons who own more than ten percent of a registered class of the Company's equity securities, to file reports of ownership on Form 3 and changes in ownership on Form 4 or 5 with the SEC. Such officers, directors and ten-percent stockholders are also required by SEC rules to furnish the Company with copies of all Section 16(a) forms that they file.
Based solely on its review of the copies of such forms received by it, or representations from certain reporting persons that no Forms 5 were required for such persons, the Company believes that, during the last fiscal year, all Section 16(a) filing requirements applicable to its officers, directors, and ten-percent stockholders were complied with.
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ITEM 11.
ITEM 11. EXECUTIVE COMPENSATION
EXECUTIVE COMPENSATION
The following table shows, as to the Chief Executive Officer and each of the three other executive officers, information concerning compensation paid for services to the Company in all capacities during the fiscal year ended December 31, 1995 as well as the Company's two previous fiscal years (if such person was the Chief Executive Officer or an executive officer, as the case may be, during any part of such fiscal year).
SUMMARY COMPENSATION TABLE
(1) Messrs. Smith, Cassidy and Klint are paid bonuses based on the Company's profitability. Mr. Olson is paid incentive compensation based on the Accelerator Division revenues and gross profit margin. Mr. Sandfort had a one-time guaranteed bonus of $15,000. (2) Represents $44,048 in cost of living adjustments for California housing. (3) Includes $10,000 contributed by the Company to a cafeteria benefit plan and $2,310 contributed by the Company to a 401K plan and $3,030 for term life insurance premium reimbursement. (4) Represents $25,937 in cost of living adjustments for California housing and $38,975 in tax gross up rembursement payments for 1993 and 1994. (5) Includes $10,000 contributed by the Company to a cafeteria benefit plan and $2,310 contributed by the Company to a 401 (K) plan, and $7,680 for term life insurance premium reimbursement. (6) Represents $25,732 in cost of living adjustments for California housing. (7) Represents Company contributions to defined benefit plans. (8) Mr. Olson became an Executive Officer in June 1995. His annual base salary in 1995 was $150,000. (9) Mr. Sandfort hire date was September 6, 1995 and his annual base salary is $240,000. He was actually paid $80,000 in salary in 1995.
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OPTION GRANTS TO EXECUTIVE OFFICERS
The following table sets forth further information regarding individual grants of stock options pursuant to the 1993 Stock Option Plan during 1995 to each of the executive officers named in the Summary Compensation Table above.
Note: All option shave an exercise price equal to the fair market value of the Company's common stock on the date of grant.
(1) All 20,000 options are time based with vesting over 4 years with annual vesting for the first two years and monthly vesting thereafter.
(2) Options for 90,000 shares are time based with annual vesting over 3 years. Options for 60,000 shares are performance based with vesting upon achievement of certain performance goals.
(3) Options for 240,000 shares are time based with vesting over 4 years with annual vesting for the first two years and monthly vesting thereafter. Options for 160,000 shares are performance based with vesting upon achievement of certain performance goals.
OPTIONS EXERCISED AND HELD
The following table shows, as to the individuals named in the Summary Compensation Table above, information concern in stock options exercised during the fiscal year ended December 31, 1995 and options held at fiscal year end.
AGGREGATED OPTION EXERCISES IN LAST FISCAL YEAR AND FISCAL YEAR END OPTION VALUES
(1) Market value of underlying securities, based on the last sale price of the Companies Common Stock on the National Association of Securities Dealers, Inc. Automated Quotation ("NASDAQ") National Market System on the date of exercise, minus the exercise price.
(2) Market value of underlying securities, based on the last sale price of the Company's Common Stock on the NASDAQ National Market System on December 29, 1995 ($8.38 per share), minus the exercise price.
DIRECTOR COMPENSATION
Members of the Board of Directors who are not employees of the Company receive a retainer of $2,500 per quarter plus a fee of $1,000 for attendance at each Board and Board Committee meetings and are reimbursed for their expenses in attending meetings of the Board of Directors. On September 10, 1990, Mr. Huberman received warrants from the Company entitling him to purchase 50,000 shares of the Company's Common Stock at an exercise price of $1.00 per share, the then market value. In August 1993 Mr. Huberman received warrants from the Company entitling him to purchase 30,000 shares of the Company's Common Stock at an exercise price of $2.06 per share. In February 1994 Dr. Fiebiger received warrants from the Company entitling him to purchase 50,000 shares of the Company's Common Stock at an exercise price of $3.63 per share. Both of these warrants are exercisable for 10,000 shares on each anniversary date.
All warrants expire six years after their respective issue dates or 90 days after resignation from the Board of Directors, whichever occurs first.
REPORT OF THE COMPENSATION COMMITTEE OF THE BOARD OF DIRECTORS
The Compensation Committee of the Board of Directors is comprised of two non-employee directors of the Board of Directors. No member of the Committee is a former or current officer or employee of the Company.
The Compensation Committee is responsible for setting and administering the policies governing annual compensation of executive officers, including the annual management incentive plans and the Company's stock option plans. In addition, The Committee reviews compensation levels of executive officers and evaluates their performance.
It is the compensation policy of the Committee that a substantial portion of the annual compensation opportunities of each executive officer be contingent upon the performance of the Company. The Committee also believes that employee equity ownership is highly motivating, provides a major incentive to employees in building stockholder value and serves to align the interests of employees with stockholders.
The salaries for executive officers generally are based on a review of salaries for comparable positions among competing companies, and are adjusted annually to take into account cost of living increases, merit increases and adjustments deemed necessary to continue to attract and retain highly qualified executive officers.
Under the Company's annual incentive plan, incentive compensation is paid based on the performance of the Company as a whole. Bonuses for Messrs. Smith, Cassidy and Klint are paid based on attainment of Company profitability goals and incentive compensation for Mr. Olson is paid based on attainment of Accelerator Division revenues and gross profit margin. Mr. Sandfort's bonus is based on revenue and expense goals for the Gatefield Division. Annual incentive compensation at targeted levels of performance represents approximately 50% of total cash compensation for the CEO and 25% to 45% for the executive officers. The targeted amounts of incentive compensation are established in the Company's annual operating plan, which is approved by the Board annually.
The Company's performance is measured for purposes of compensation decisions under the annual incentive plan against goals established by the Committee in consultation with management prior to the fiscal year based on the Company's annual operating plan.
The financial goals for fiscal 1995 which related to Company revenue and net profit before tax were partially achieved. No bonuses were paid to Messrs. Smith and Cassidy for 1995 performance. Mr. Sandfort was guaranteed a one time bonus of $15,000 for Fourth Quarter 1995. Mr. Olson was paid incentive compensation of $93,400 related to revenue and gross profit attainment in 1995. In 1995 stock options for 20,000 shares, 150,000 shares and 400,000 shares were granted to Messrs. Klint, Olson and Sandfort, respectively.
James Fiebiger Chairman, Compensation Committee
Benjamin Huberman Member, Compensation Committee
COMPENSATION COMMITTEE INTERLOCKS AND INSIDER PARTICIPATION
The Compensation Committee currently consists of outside directors James Fiebiger and Benjamin Huberman. None of these individuals was at any time during the fiscal year ended December 31, 1995 or at any other time an officer or employee of the Company.
During fiscal year ended December 31, 1995 the Company paid Mr.. Benjamin Huberman, a member of the Board of Directors, $80,000 in consulting fees. Mr. Huberman has worked closely with the Company in developing and marketing the Company's consulting services. Management believes that this arrangement is at least as favorable as could be negotiated with outside consultants.
During fiscal year ending December 31, 1995 the Company paid Dr. James Fiebiger, a member of the Board of Directors, consulting fees in the amount of $77,788. Dr. Fiebiger's consulting services were rendered for product development, strategic planning and marketing consulting services for Field Programmable Gate Array Products developed by the Company's GateField Division. Management believes that this arrangement is at least as favorable as could be negotiated with outside consultants.
No executive officer of the Company serves as a member of the board of directors or compensation committee of any entity which has one or more executive officers serving as a member of the Company's Board of Directors or Compensation Committee.
COMPANY STOCK PRICE PERFORMANCE
The following graph shows a five-year comparison of cumulative total stockholder returns (on a dividend reinvestment basis) for the Company's Common Stock, NASDAQ Stock Market (U.S.) and Hambrecht and Quist ("H&Q") Technology Index. Note that the historic stock price performance is not necessarily indicative of future stock price performance.
ZYCAD CORPORATION
COMPARISON OF FIVE-YEAR CUMULATIVE TOTAL RETURN
Assumes $100 invested on December 31, 1990 in the Company's Common Stock, NASDAQ Stock Market (U.S.) and Hambrecht and Quist Technology Index.
*Total return assumes reinvestment of dividends.
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ITEM 12.
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT
SHARE OWNERSHIP
The following persons or entities were known to the Company to be the beneficial owners of more than 5% of the Company's Common Stock.
SECURITY OWNERSHIP OF MANAGEMENT
The following table sets forth certain information regarding ownership of the Company's Common Stock as of March 29, 1995, by each director, by each of the executive officers, and all executive officers named in the summary Compensation Table and directors of the Company as a group.
SHARES OF COMMON STOCK BENEFICIALLY OWNED
*Less than (1) percent.
(1) Represents 300,000 shares subject to options held by Mr. Cassidy that are exercisable within 60 days of the Record Date.
(2) Includes 20,000 shares subject to warrants held by Dr. Fiebiger that are exercisable within 60 days of the Recorded Date.
(3) Includes 70,000 shares subject to warrants held by Mr. Huberman that are exercisable within 60 days of the Record Date.
(4) Includes 6,042 shares subject to options held by Mr. Klint that are exercisable within 60 days of the Recorded Date.
(5) Includes 4,896 shares subject to options held by Mr. Olson that are exercisable within 60 days of the record date.
(6) Includes 400,938 share subject to options and warrants held by five persons that are exercisable within 60 days of the Record Date.
ITEM 13.
ITEM 13. CERTAIN TRANSACTIONS
CERTAIN TRANSACTIONS
The following table sets forth information with respect to all executive officers of the Company who had indebtedness in excess of $60,000 outstanding during the past fiscal year.
These Loans were paid in full in August and September, 1995. These loans were made in connection with the purchase and financing of real property by Dr. Smith and in connection with the exercise of stock options by Dr. Smith. Both loans are documented with full recourse Promissory Notes signed by Dr. Smith. These loans are secured by certain real property including Dr. Smith's personal residence; as well as 1,200,000 shares of Common Stock of the Company owned by Dr. Smith of which 900,000 shares were issued pursuant to the exercise of his stock options and 300,000 shares were previously purchased by him in the open market.
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PART IV
- -------------------------------------------------------------------------------- ITEM 14.
ITEM 14. EXHIBITS, FINANCIAL STATEMENT SCHEDULES, AND REPORTS ON FORM 8-K - --------------------------------------------------------------------------------
(a) 1. Financial Statements
Independent Auditors' Report (page 15 of the Company's 1995 Annual Report to Stockholders).
Consolidated Balance Sheets as of December 31, 1995 and 1994 (page 6 of the Company's 1995 Annual Report to Stockholders).
Consolidated Statements of Operations for Years Ended December 31, 1995, 1994 and 1993 (page 7 of the Company's 1995 Annual Report to Stockholders).
Consolidated Statements of Stockholders' Equity for Years Ended December 31, 1995, 1994 and 1993 (page 8 of the Company's 1995 Annual Report to Stockholders).
Consolidated Statements of Cash Flows for Years Ended December 31, 1995, 1994 and 1993 (page 9 of the Company's 1995 Annual Report to Stockholders).
Notes to Consolidated Financial Statements (pages 10 to 14 of the Company's 1995 Annual Report to Stockholders).
2. The following financial statement schedules is included herein: Schedule II: Valuation and Qualifying Accounts and Reserves
All other schedules are omitted because they are not required, inapplicable or the information is otherwise included.
3. Exhibits:
EXHIBIT NUMBER DESCRIPTION
3.1 Certificate of Incorporation of the Company, as amended (incorporated by reference to Exhibit 3.1 to the Company's Annual Report on Form 10-K for the year ended December 31, 1987).
3.2 Bylaws of the Company, as amended (incorporated by reference to Exhibit 3.2 to the Company's Annual Report on Form 10-K for the year ended December 31, 1988).
3.3 Amendment to the Certificate of Incorporation of the Company
10.1 * 1984 Stock Option Plan as amended (incorporated by reference to Exhibit 10.2 of the Company's Annual Report on Form 10-K for the year ended December 31, 1987).
10.2 Patent Agreement dated October 28, 1985 with Control Data Corporation (incorporated by reference to Exhibit 10.12 to the Company's Annual Report on Form 10-K for the year ended December 31, 1985).
10.3 Employee Stock Purchase Plan (incorporated by reference to Exhibit 10.12 to the Company's Annual Report on Form 10-K for the year ended December 31, 1986).
10.4 Warrant Certificate for the purchase of 15,000 shares of Common Stock executed with Douglas E. Johnson and John A. Fahlberg (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1989).
10.5 Patent Cross License Agreement dated May 17, 1989 with IKOS Systems, Inc. (incorporated by reference 10.25 to the Company's Annual Report on Form 10-K for the year ended December 31, 1989).
10.6 Warrant Certificate for the purchase of 50,000 shares of Common Stock executed with Benjamin Huberman dated September 19, 1990 (incorporated by reference 10.22 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.7 Consulting Agreement dated October 1, 1990 with Benjamin Huberman (incorporated by reference 10.24 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.8 Warrant Certificate for the purchase of 50,000 shares of Common Stock executed with Yoshikazu Hori dated July 18, 1991 (incorporated by reference 10.25 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.9 Asset Purchase Agreement between Zycad Corporation and Synopsys Technology Inc., a wholly-owned subsidiary of Synopsys, Inc. dated as October 19, 1990 (incorporated by reference 10.26 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.10 Agreement regarding non-compete and payments dated January 15, 1992 between Synopsys, Inc. and Synopsys Technology, Inc. and Zycad Corporation (incorporated by reference 10.27 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.11 Lease dated March 6, 1992 relating to premises at 47100 Bayside Parkway, Fremont, California (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1992).
10.12 Promissory Note dated August 27, 1992 in the amount of $600,000 from Phillips W. Smith (incorporated by reference 10.24 to the Company's Annual Report on Form 10-K for the year ended December 31, 1992).
10.13 * 1993 Stock Option Plan (incorporated by reference 10.13 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.14 Lease dated October 23, 1992 relating to premises at 100 Enterprise Drive, Rockaway, New Jersey (incorporated by reference 10.14 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.15 Form of Warrant Certificate for the purchase of 30,000 shares of Common Stock executed with Benjamin Huberman and Yoshikazu Hori dated August 16, 1993 (incorporated by reference 10.15 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.16 Promissory Note (full recourse) dated September 1, 1993 in the amount of $900,000 from Phillips W. Smith and Patricia Smith (incorporated by reference 10.16 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.17 Share Exchange and Allotment Agreement dated September 7, 1993, for the purchase of Integrated Circuit Applications, Ltd. (incorporated by reference 10.17 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.18 SICAN/Zycad Technology Agreement dated September 23, 1993, between SICAN GmbH and Zycad Corporation (incorporated by reference 10.18 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.19 Private Placement Distribution Agreement dated March 4, 1994 with Rosehouse, Ltd. (incorporated by reference 10.19 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.20 Warrant Certificate for purchase of 50,000 shares of Common Stock executed with James Fiebiger dated February 4, 1994 (incorporated by reference 10.20 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.21 Warrant Certificate for purchase of 5,918 shares of Common Stock executed with James Fiebiger dated November 11, 1994 (incorporated by reference 10.21 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.22 First Amendment to Rockaway New Jersey Lease dated January 13, 1995 (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
11.1 Computation of Earnings Per Share.
13.1 The Company's 1995 Annual Report to Stockholders.
21.1 Subsidiaries of the Registrant.
23.1 Independent Auditors' Consent -- Deloitte & Touche LLP.
- -------------------------------------
* Denotes a compensation plan in which an executive officer participates.
(b) REPORTS ON FORM 8-K. None.
(c) EXHIBITS. See response to Item 14(a) (3).
(d) FINANCIAL STATEMENTS SCHEDULES. See response to Item 14 (a) (2).
For the purposes of complying with the amendments to the Rules governing Form S- 8 (effective July 13, 1990) under the Securities and Exchange Act of 1933, the undersigned hereby undertakes as follows, which undertaken shall be incorporated by reference into the Registrant's Registration Statements on Form S-8 (File Nos. 13244):
Insofar as indemnification for liabilities arising under the Securities Act of 1933 may be permitted to directors, officers and controlling persons of the Registrant pursuant to the foregoing provisions, or otherwise, the Registrant has been advised that in the opinion of the Securities and Exchange Commission such indemnification is against public policy as expressed in the Securities Act of 1933 and is, therefore, unenforceable. In the event that a claim for indemnification against such liabilities (other than the payment by the Registrant of expenses incurred or paid by a director, officer or controlling person of the Registrant in the successful defense of any action, suit or proceeding) is asserted by such director, officer or controlling person in connection with the securities being registered, the Registrant will unless in the opinion of its counsel the matter has been settled by controlling precedent, submit to a court of appropriate jurisdiction the question whether such indemnification by it is against public policy as expressed in the Act and will be governed by the final adjudication of such issue.
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---------- SIGNATURES ----------
Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1934, the Company has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized.
ZYCAD CORPORATION
By /s/Phillips W. Smith ------------------------- Phillips W. Smith President and Chief Executive Officer
By /s/Peter J. Cassidy ------------------------ Peter J. Cassidy Executive Vice President and Chief Financial Officer
Date: March 29, 1996
Pursuant to the requirements of the Securities Exchange Act of 1934, this report has been signed below by the following persons on behalf of the Company in their respective capacities as directors of the Company.
/s/Phillips W. Smith Director March 29, 1996 - ----------------------------- Phillips W. Smith
/s/Peter J. Cassidy Director March 29, 1996 - ----------------------------- Peter J. Cassidy
/s/Horst G. Sandfort Director March 29, 1996 - ----------------------------- Horst G. Sandfort
/s/Benjamin Huberman Director March 29, 1996 - ----------------------------- Benjamin Huberman
/s/James R. Fiebiger Director March 29, 1996 - ----------------------------- James R. Fiebiger
INDEX TO EXHIBITS SEQUENTIALLY EXHIBIT NUMBERED NUMBER DESCRIPTION PAGE 3.1 Certificate of Incorporation of the Company, as amended (incorporated by reference to Exhibit 3.1 to the Company's Annual Report on Form 10-K for the year ended December 31, 1987).
3.2 Bylaws of the Company, as amended (incorporated by reference to Exhibit 3.2 to the Company's Annual Report on Form 10-K for the year ended December 31, 1988).
3.3 Amendment to the Certificate of Incorporation of the Company
10.1 1984 Stock Option Plan as amended (incorporated by reference to Exhibit 10.2 of the Company's Annual Report on Form 10-K for the year ended December 31, 1987).
10.2 Patent Agreement dated October 28, 1985 with Control Data Corporation (incorporated by reference to Exhibit 10.12 to the Company's Annual Report on Form 10-K for the year ended December 31, 1985).
10.3 Employee Stock Purchase Plan (incorporated by reference to Exhibit 10.12 to the Company's Annual Report on Form 10-K for the year ended December 31, 1986).
10.4 Warrant Certificate for the purchase of 15,000 shares of Common Stock executed with Douglas E. Johnson and John A. Fahlberg (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1989).
10.5 Patent Cross License Agreement dated May 17, 1989 with IKOS Systems, Inc. (incorporated by reference 10.25 to the Company's Annual Report on Form 10-K for the year ended December 31, 1989).
10.6 Warrant Certificate for the purchase of 50,000 shares of Common Stock executed with Benjamin Huberman dated September 19, 1990 (incorporated by reference 10.22 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.7 Consulting Agreement dated October 1, 1990 with Benjamin Huberman (incorporated by reference 10.24 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.8 Warrant Certificate for the purchase of 50,000 shares of Common Stock executed with Yoshikazu Hori dated July 18, 1991 (incorporated by reference 10.25 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.9 Asset Purchase Agreement between Zycad Corporation and Synopsys Technology Inc., a wholly-owned subsidiary of Synopsys, Inc. dated as October 19, 1990 (incorporated by reference 10.26 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.10 Agreement regarding non-compete and payments dated January 15, 1992 between Synopsys, Inc. and Synopsys Technology, Inc. and Zycad Corporation (incorporated by reference 10.27 to the Company's Annual Report on Form 10-12 for the year ended December 31, 1991).
10.11 Lease dated March 6, 1992 relating to premises at 47100 Bayside Parkway, Fremont, California (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1992).
10.12 Promissory Note dated August 27, 1992 in the amount of $600,000 from Phillips W. Smith (incorporated by reference 10.24 to the Company's Annual Report on Form 10-K for the year ended December 31, 1992).
10.13 1993 Stock Option Plan (incorporated by reference 10.13 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.14 Lease dated October 23, 1992 relating to premises at 100 Enterprise Drive, Rockaway, New Jersey (incorporated by reference 10.14 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.15 Form of Warrant Certificate for the purchase of 30,000 shares of Common Stock executed with Benjamin Huberman and Yoshikazu Hori dated August 16, 1993 (incorporated by reference 10.15 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.16 Promissory Note (full recourse) dated September 1, 1993 in the amount of $900,000 from Phillips W. Smith and Patricia Smith (incorporated by reference 10.16 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.17 Share Exchange and Allotment Agreement dated September 7, 1993, for the purchase of Integrated Circuit Applications, Ltd. (incorporated by reference 10.17 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.18 SICAN/Zycad Technology Agreement dated September 23, 1993, between SICAN GmbH and Zycad Corporation (incorporated by reference 10.18 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.19 Private Placement Distribution Agreement dated March 4, 1994 with Rosehouse, Ltd. (incorporated by reference 10.19 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.20 Warrant Certificate for purchase of 50,000 shares of Common Stock executed with James Fiebiger dated February 4, 1994 (incorporated by reference 10.20 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.21 Warrant Certificate for purchase of 5,918 shares of Common Stock executed with James Fiebiger dated November 11, 1994 (incorporated by reference 10.21 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.22 First Amendment to Rockaway New Jersey Lease dated January 13, 1995 (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
11.1 Computation of Earnings Per Share.
13.1 The Company's 1995 Annual Report to Stockholders.
21.1 Subsidiaries of the Registrant.
23.1 Independent Auditors' Consent -- Deloitte & Touche LLP.
INDEPENDENT AUDITORS' REPORT
To the Board of Directors and Stockholders of Zycad Corporation:
We have audited the consolidated financial statements of Zycad Corporation as of December 31, 1995 and 1994, and for each of the three years in the period ended December 31, 1995, and have issued our report thereon dated March 27, 1996. Our audits also included the consolidated financial statement schedule of Zycad Corporation, listed in the Index at Item 14. This consolidated financial statement schedule is the responsibility of the Company's management. Our responsibility is to express an opinion based on our audits. In our opinion, such consolidated financial statement schedule, when considered in relation to the basic consolidated financial statements taken as a whole, presents fairly in all material respects the information set forth therein.
DELOITTE & TOUCHE LLP
San Jose, California March 27, 1996