ITEM 1. BUSINESS
Zycad Corporation-Registered Trademark- (the Company)(1) founded in 1981, develops, manufactures and markets a broad range of high performance tools, design services and electronic components that help designers speed the process of moving their electronic products from concept to manufacturing. Zycad calls this process, "Design Realization." It encompasses performing the steps necessary to complete design verification and get to market in the quickest way possible.
Zycad's Design Realization offerings include hardware and software simulation verification tools, rapid prototyping vehicles, high-density programmable Application-Specific Integrated Circuits (ASICs) and related desktop design and programming tools. This suite of products enable electronic designers to quickly and accurately verify their designs prior to production and support initial and low volume ASIC production. Verification has the goal of minimizing downstream problems and risks (i.e., avoiding the expensive and time-consuming process of redesign should a final design not work or not meet the customer requirements). This process of Design Realization via comprehensive and fast verification throughout the design cycle ensures a high quality, production-ready product that meets the customers' time-to-market goals.
Zycad's two-fold business emphasis is on providing both the highest performance verification product offerings (including both simulation and rapid prototyping) in the Electronic Design Automation (EDA) market, and the highest density programmable ASICs to the ASIC designer for both design verification and design realization through use as a reprogrammable component. All development activities are focused on optimizing their future development and the integration of these technologies to solve customer's high-end, complex verification problems, the most dramatic being that of "system on a chip" or "system on silicon" design verification.
Customers benefit from Zycad's capabilities by:
- GETTING TO MARKET FASTEST at the most optimum cost. - IMPROVING PRODUCT QUALITY through more comprehensive verification. - REDUCING RISK AND MANAGING COMPLEXITY through the effective application of advanced design verification tools, methodologies, components and services for designs with more than 50,000 gates all the way up to 16 million gates.
With Zycad's wide range of verification products, customers can quickly logic simulate, fault simulate, and rapidly prototype their designs. Logic simulation is used to verify accuracy, completeness, and quality of designs before building hardware. Fault simulation is used to verify the quality and completeness of tests developed for the design once it is manufactured. Rapid prototyping is the ability to replicate the operation of a portion of a design by using programmable ASICs or FPGAs. It takes a more flexible approach than emulation systems to replicating the behavior of a system by allowing other system components, like processors, memory, and software, to be included in the prototyping environment.
Once verification is complete, the customer can actually implement their design in Zycad's own programmable ASIC technology. No other EDA vendor can actually produce your ASIC for immediate implementation in the end use product.
Zycad's corporate office, and its product divisions are located in Fremont, California. Sales and support offices are located throughout the United States, Europe, Japan and Asia.
- ------------- (1) As used herein, the term "Company" includes Zycad Corporation and its wholly-owned subsidiaries listed in Exhibit 21.1 hereto, unless the context requires otherwise.
STRATEGY
ZYCAD'S STRATEGY IS TO SPEED TIME-TO-DESIGN REALIZATION BY DELIVERING THE HIGHEST PERFORMANCE DESIGN VERIFICATION CAPABILITIES, TEST TOOLS AND PROGRAMMABLE ASICS IN THE WORLD.
In the development of today's electronic systems there are three fundamental, overriding dynamics that drive design and design challenges in the EDA market:
- Time-To-Market (Time-to-Volume) - Silicon Resources (The number of transistors that are available on a die) - Design Efficiency (How many transistors the average engineer can design per hour)
The interplay of these three factors influence the size and success or failure of any development project and forces design engineers to seek improved methods of development.
Current tools have solved many of the problems of getting the individual components of the system to work right the first time, but fall short in solving the problem for the entire system, which for many future designs will all be incorporated on a single chip.
"System on a chip" developers face the following challenges:
- Creation of Intellectual Property (IP) - Use and design reuse of IP (real design reuse of functional blocks from multiple sources) - Design verification and testability - Transition from a mainly hardware centric design focus to a hardware and software centric emphasis
Zycad will continue providing solutions which address the problem of verification complexity driven by time-to-market pressures and the push to "system on a chip". The Company will enable developers to quickly verify, prototype and even implement the Integrated Circuits (ICs) for their complex electronic systems. As with all development strategies, the ultimate objective is to produce the best product, at the lowest cost, as early as possible.
MARKET
System architects, system engineers, hardware and software design engineers, and test engineers in all electronic industries confront a similar set of problems in evolving new products from concept to physical reality. The most challenging of these design issues revolve around:
- SHRINKING GEOMETRIES leading to deep sub-micron design and the associated design and verification issues. - Almost UNLIMITED CAPACITY in terms of the number of transistors that can be put on a chip. We are approaching the era of 100 million transistors on a single die. - Trend towards "SYSTEM ON A CHIP" or "SYSTEM ON SILICON" which is driving the requirement for commercially available IP and the design verification issues associated with IP coming from multiple sources. - SHRINKING PRODUCT LIFE CYCLES to the point where many high volume, consumer oriented products have life cycles that are less than one year. Sub-one year product life cycles have tremendous ramifications on product development and manufacturing cycles.
These design challenges continue to make the product development cycle difficult to predict, control and manage at a time when "time" is of the essence. Being late to market, whether caused by the complexity associated with design verification, having to do a major or minor redesign, or coping with widespread field failures can be catastrophic to the product and the companies designing them. All companies who develop electronic products must overcome these design challenges and learn to live with the fundamental competitive fact of life that more needs to be done in less time.
Zycad's customers include:
- SEMICONDUCTOR MANUFACTURERS with architecture compatibility, fast time-to-volume and high quality requirements. - TELECOMMUNICATIONS MANUFACTURERS with high volume, high quality and product life cycles of one year or less. - MULTIMEDIA COMPANIES that need to make real-time subjective measurements of their designs in order to fine-tune their products before manufacturing and releasing to highly competitive markets. - COMPUTER VENDORS with rapidly shortening product life cycles, requiring a predictable development process and efficient system integration. - MILITARY/AEROSPACE COMPANIES with the need to integrate increasingly complex avionics in reduced budget and scheduling environments.
PROGRAMMABLE ASIC
The characteristics of today's over $20 billion ASIC market include non-recurring engineering costs in the several hundred thousands of dollars to incorporate complex designs into ASICs, lead times of up to 16 weeks (or sometimes longer) from completion of design verification to receiving the ASIC and over 50% of design starts resulting in unit volume of less than 1,000 units. When product life cycles are short, waiting 16 weeks has a dramatic impact on time-to-market and thus profitability, and if the ASIC doesn't meet the component or system requirements, causes even more costly delays and ultimately dire profit consequences.
An alternative to this traditional ASIC approach is to use programmable ASICs. When design corrections are needed, designers simply reprogram the part and proceed with the verification process until complete. Then, instead of waiting 16 or more weeks for a traditional ASIC turnaround, the programmable ASIC can be incorporated in the final system and customer shipments could start immediately upon completion of design verification and system integration.
When increasing volume justifies it, the design can then be mapped to a traditional ASIC for unit cost savings. But, this can be done while the product is already shipping to customers, garnering market share and generating revenues and profit.
With the wide acceptance of top-down design methodologies, the average size of ASIC designs is over 50K gates and continues to grow. CMOS gate arrays and cell based ASICs are highly integrated, flexible, and well supported by EDA tools. But they also have high initial costs, slow turnaround time and require zero design defects. Current Field Programmable Gate Array (FPGA) and complex PLD products avoid these drawbacks, but do not provide the high gate density, the flexibility, or the support for top-down design methodologies needed for ASIC design.
Zycad's family of ProASIC-TM- (Programmable ASIC) products, together with its ASIC methodology and implementation tools, provide a desktop programming system that allows ASIC designers to easily work within their current design environment to re-use functional blocks and IP from existing ASIC designs, to verify the implementations of their new design, and get their product to market faster.
ZYCAD'S PRODUCTS
Zycad offerings help designers speed the process of moving their electronic products from design to manufacturing. This process is called Design Realization and the emphasis is on the verification phase of moving the design from concept into production. Products include LightSpeed Simulation Servers-Registered Trademark-, Paradigm XP-Registered Trademark-simulation accelerators, TDX-Registered Trademark- software fault and test tools, ProASIC products and ProASIC rapid prototyping vehicles and services.
Zycad's goal is to help design engineers achieve Design Realization in the most efficient and effective manner possible.
The product development process encompasses a host of detailed tasks at each stage of development. However, from a high level perspective an idea is turned into an architecture and then the detailed design and iterative verification takes place. The design is then defined at the physical implementation level in order to prepare for manufacturing. During this process, test analysis can also take place in order to grade the tests that will be used by manufacturing to
verify the finished product. Prior to sending the ASICs off to be manufactured, it is wise to verify them along with the software and other system components in order to ensure system and architecture compatibility.
Zycad and its products are unique in many ways, which helps the company maintain a strong technical lead in the industry. A few of the key unique features are listed below.
PERFORMANCE A criteria for all development at Zycad is that the products provide at least an order of magnitude performance improvement over other methods available in the marketplace. This performance is critical to both simulation and rapid prototyping applications required for system verification.
ARCHITECTURE The Company's hardware products' advantage over software-based simulators on traditional workstations is achieved by Zycad's unique and proprietary architecture. Zycad's development emphasis is on application-specific, high performance simulation and rapid prototyping systems; not general purpose machines as workstation manufacturers are designing. With this main focus, Zycad employs specialized techniques, technology and architectures that produce systems providing an order, to orders of magnitude greater performance over workstations.
DESIGN HARDWARE Zycad is an EDA company that actually uses its own tools and methodologies to design its hardware. We are our own end user and, therefore, have the opportunity to debug our tools and services in a real world environment before taking them to our customers. Specifically, Zycad incorporates these features into its main product lines:
LIGHTSPEED SIMULATION SERVER LightSpeed is the Company's latest logic simulation accelerator and the industry leading logic simulation engine. Performing up to 10 times faster than its nearest competitor, LightSpeed is the industry's first massively parallel simulation platform. LightSpeed systems transparently integrate to the industry standard Verilog and VHDL language and simulation environments. The system delivers supercomputer (almost emulation-like) performance for the verification of microprocessors, ASICs and system designs containing up to as much as 16 million gates. Prices range from $260,000 to well over $1 million.
PARADIGM XP SIMULATION ACCELERATOR The Paradigm XP family is the world's leading line of structural fault simulation accelerators and the price/performance leading structural logic simulation accelerator. Systems range in price from $50,000 for an entry-level model with 256,000 gate capacity to over $1 million for expansion to multimillion gate capacity. The Paradigm XP provides powerful features that address ASIC, integrated circuit, and system logic and fault verification problems including modular compilation and hardware assisted toggle test.
Transparent interfaces are provided to popular structural simulation environments including QuickSim II-TM- (Mentor Graphics-TM-), Verilog-Registered Trademark- (Cadence), VantageSpreadSheet-TM- (Viewlogic-TM-), MDE-Registered Trademark-/C-MDET (LSI Logic-TM-), VLSI-TM- Link (Compass), VHDL System Simulator-TM- (Synopsys-Registered Trademark-), ViewSim-Registered Trademark-(Viewlogic-Registered Trademark-). This allows the Paradigm XP product line to transparently integrate into these environments, making it easy for the design engineer to access the XP accelerators in their design environment.
Libraries are always a main concern with our customers. In order to ease the creation of accurate libraries for the Company's LightSpeed and Paradigm XP systems, Zycad has developed automated tools that will accept multiple sources for library translation.
TDX FAULT AND TEST TOOLS In addition to the Company's hardware-assisted fault simulation products, Zycad provides a powerful suite of software testability analysis and test generation tools. These software tools include a high performance fault simulator, IDDq, automated test pattern generation (ATPG), and a fault manager system. Zycad's fault and test tools help customers to significantly reduce the time required for test grading and to improve the efficiency of test programs which ultimately leads to higher quality products.
RAPID PROTOTYPING SYSTEM The Company is currently developing a fully integrated rapid prototyping vehicle based on its GateField GF200F and GF250F ProASIC families combined with innovative packaging technology of a third party.
This will enable a component form factor size solution offering 400,000 gates, dedicated memory blocks, and real time system performance.
GATEFIELD PROGRAMMABLE ASICS The GateField GF100K, GF200F, and GF250F families of reprogrammable ASICs use a unique architecture and switch technology to provide a device that is comparable to a gate array in capacity and usable density, while offering all the advantages of non-volatility and field re-programmability. The revolutionary Sea-of-Tiles-Registered Trademark- architecture coupled with GateField's ASICmaster-TM- software, provides the ASIC designer with unparalleled gate capacity and automation. These high density programmable ASICs currently range from 9,000 to 150,000 usable gates.
GateField ASICmaster software accepts net lists from standard mask programmable ASIC tools, provided by companies such as Mentor Graphics, Viewlogic, Cadence and Synopsys. ASICmaster performs place and route of the design into the selected device and provides back annotated delay information for simulation. Once the design is verified, ASICmaster downloads the layout into the GateField ASICmakerhigh device programmer for chip programming. Design services are provided as needed to help the customer accelerate verification, complete ASIC conversions, complete prototyping systems and enhance time-to-market.
PRODUCT DEVELOPMENT
Zycad is regularly engaged in ongoing research and development to further enhance and improve its family of high-performance design verification and Programmable ASIC software and hardware products. The Company introduced its latest generation simulation accelerator, LightSpeed, in June 1996 and will continue to add enhancements and interfaces to this product line in 1997. The Company will also introduce several new programmable ASIC products ranging in densities from 25K up to 150K, as well as rapid prototyping and embedded memory solutions. In fiscal year 1996, the Company expensed $15,783,000 on research and development, compared to $11,263,000 in 1995 and $11,172,000 in 1994.
MARKETING & SALES
Zycad markets its products directly and through distributors, through a worldwide product and service sales organization. The Company has direct sales offices in North America, Europe, Japan, Korea, and Taiwan. To complement its direct organization, the Company also has international distributors in the Far East, Israel and Europe.
The Company highlights the economic benefits that can be gained from use of its high performance verification products and services. In addition, demonstration of the products' capacity and speed to individual potential customers through the use of benchmark comparisons against software alternatives is an important element of the selling cycle. The Company's applications engineers, consulting engineers, and sales force are involved in the sales process to provide pre-sale technical assistance, technical credibility, and continuity with post-sale installation and servicing.
The Company's general policy is to sell and not to lease its products; however, leasing arrangements are available for customers who prefer that option.
The rate at which orders are received by the Company may vary from month to month and quarter to quarter. In addition, customers' lead times for placing purchase orders have varied substantially. For these reasons, the Company's backlog at any particular date may not be indicative of its actual sales for any succeeding period.
The Company offers a maintenance agreement to its customers under which its applications engineers provide diagnostic, repair or replacement and maintenance service. In addition, the Company offers software support and updates as part of this agreement.
Zycad markets its GateField Programmable ASIC products both through its GateField worldwide sales organization, as well as through manufacturing representatives. In addition, the manufacturer of the GateField devices, Rohm Co. LTD. (Rohm) located in Kyoto, Japan, also markets and sells the ProASIC products in Japan on a non-exclusive basis. Rohm has a strong marketing and sales presence in Japan through its seven design centers and its direct sales
force of 300 people. This partnership provides Zycad the opportunity to quickly penetrate the Japanese market, which according to the market research from Dataquest, constitutes 36% of the world's gate array market. The ASICmaster software and the ASICmaker hardware are sold in Japan through Zycad's direct sales organization.
For export sales information for the three years ended December 31, 1996, see Note 9 to the Company's Consolidated Financial Statements in the Company's Annual Report to Stockholders for the year ended December 31, 1996, which Note has been incorporated herein by reference in Item 8.
COMPETITION
The EDA market is a dynamic market characterized by advancing technologies in both hardware and software. The advancing technologies frequently result in new product introductions, increased product capabilities and relative product improvements in price/performance ratios. The Company recognizes that rapid technological changes could impair its competitive position.
Indirect competition for the Company's system verification products consists primarily of software simulators that run on general purpose workstations. Software simulators currently hold a large share of the logic simulation market. However, the Company's strategy is to leverage this large installed base of software simulators by selling accelerators as a complementary high performance point tool into the large installed base of EDA vendors whose customers require increased simulation performance. Other indirect competition comes from emulation solutions. However, emulation solutions are competition only from the perspective of total available budget dollars for EDA tools.
Direct competition to LightSpeed Simulation Servers comes from one other company with a logic hardware-assisted simulator, IKOS Systems, Inc. Zycad believes that the combined features, speed, and capacity of its current and future products offer competitive performance and functionality advantages over IKOS.
Management believes that its superior products, services, and customer support will enable the Company to compete effectively in the EDA market based on the breadth, quality, features, performance and price of its product offerings and the neutrality, flexibility, and technological prowess of its services offerings.
The Programmable ASIC market is a fast growing and dynamic market with several large established vendors for similar products (FPGAs/CPLDs) including Xilinx-TM-, Altera, Actel, Lattice and Lucent. These companies offer broad product lines but have not yet been very successful in providing high-density FPGA solutions to ASIC designers. Their penetration into this market has been limited mainly by the mismatch between the top-down design methodologies used by ASIC designers and the design tools required to use their FPGAs/CPLDs effectively.
The revolutionary flash switch technology utilized by the ProASIC family of products provides a 7X size advantage over switches used by SRAM-based devices offered by the market leaders in higher gate count devices. This switch technology is used in a Sea-of-Tiles architecture to create devices that have a 2X-4X density advantage over the competitive offerings. Unlike competing devices, the Sea-of-Tiles architecture has been designed specifically to work seamlessly in the top-down design flow used by today's ASIC designers. The GateField devices offer the ASIC designer not only high density but also allow the designer to remain within his established design environment.
PATENTS AND TRADEMARKS
Due to the rapid pace of technological advancement, the Company believes that, while the protection of proprietary information is important, it must continue to develop and market new products to remain competitive. The Company protects its proprietary product information through issuance of patents, use of employee nondisclosure agreements and by limiting access to sensitive information. On July 2, 1985, United States Patent No. 4,527,249 was issued to the Company for "Concurrent Fault Simulation for Logic Designs", and on April 5, 1988, United States Patent No. 4,736,338 was issued to the Company for a "Programmable Look Up System". These patents are effective for a period of 17 years from the issue date and the Company believes that these patents are an important factor in the protection of its proprietary information. On May 17, 1989, the Company signed a Patent Cross License Agreement with IKOS Systems, Inc., under which both companies granted to each other a perpetual non-exclusive license for logic or fault simulation products utilizing inventions covered by its respective patents issued through May 1, 1994.
On October 10, 1995, United States Patent No. 5,457,653 was issued to the Company for a "Technique to Prevent Reprogramming a Floating Gate Transistor used to Directly Switch a Large Electrical Signal". In addition, on February 14, 1996, United States Patent No. 8,508,914 was issued to the Company for a "Nonvolatile Reprogrammable Interconnect Cell with FN Tunneling and Reprogramming Method Thereof"; on January 14, 1997, United States Patent No. 5,594,636 was issued to the Company for a "Logic Cell and Routing Architecture in a Field Programmable Gate Array"; and on January 14, 1997, United States Patent No. 5,594,698 was issued to the Company for "Random Access Memory (RAM) Based Configurable Arrays". These are the first patents issued for the GateField ProASIC technology and seven more patent applications are pending at this time.
The Company has obtained federal trademark registration for its trademark "Zycad Corporation" from the United States Patent and Trademark Office.
EMPLOYEES
At December 31, 1996, the Company had 182 employees. The employees are not represented by a labor organization and the Company considers its relations with its employees to be good.
MANUFACTURING
The Company's accelerator products utilize a technology which has significant impact upon its manufacturing activities. The efficient use of full custom ICs dramatically reduces both assembly and test time. In addition, custom ICs tend to operate more reliably than a functionally equivalent printed circuit board due to a number of factors including the reduction of solder points and external contacts.
Product configurations include standard computer components such as a controller, central processing unit (CPU) and main memory which are selected from various independent suppliers on the basis of cost, reliability and performance properties. These standard components are connected utilizing proprietary bus structures and controlled using operating systems with proprietary extensions as they interact with the Company's custom IC-based, application-specific subsystems.
The Company contracts out certain manufacturing steps, including printed circuit fabrication and assembly, circuit board wiring, cabinet fabrication and assembly, sheet metal fabrication and painting, and performs final assembly, configuration, testing and quality control procedures itself. Circuit boards are wired by automated equipment on computerized instructions generated on the Company's own Computer Aided Engineering (CAE) system, which is used extensively in order, design and test phases. Manufacturing efficiency is enhanced by testing each circuit board on the Company's test equipment. After final assembly and configuration, each simulation system undergoes additional "burn in" testing.
The Company's ProASIC products are manufactured by Rohm, located in Kyoto, Japan under a manufacturing and development partnership agreement. GateField and Rohm have built a strong working alliance that dates back to October 1993. Rohm is widely recognized for its expertise in Large Scale Integration (LSI) manufacturing and as one of the pioneers in flash technology. As part of the agreement, the company has secured guaranteed wafer capacity sufficient to meet the expected product needs for the foreseeable future. Packaging for the GateField parts is done by well established assembly houses located in the Philippines and in Hong Kong. The company performs wafer sort and final test at its facilities in Fremont, California, but as volume dictates, these activities may be moved offshore. Currently, Zycad has sufficient capacity to meet its present manufacturing requirements through 1997 and the foreseeable future.
ITEM 2.
ITEM 2. PROPERTIES
The Company occupies approximately 61,000 square feet of office space in Fremont, California for its headquarters, manufacturing and engineering operations. The total lease payments remaining amount to approximately $1.6 million. The lease expires August 1999. The Company's Service Division in New Jersey, occupies approximately 37,000 square feet of office space. Total lease payments remaining through February 1998 amount to approximately $1.0 million. For additional information, see Note 6 to the Company's Consolidated Financial Statements in the Company's Annual Report to Stockholders for the year ended December 31, 1996, which note has been incorporated herein by reference in Item 8.
The Company leases sales and support office space in seven domestic locations, three European locations, one Taiwanese, one Korean and one Japanese location on a short-term or intermediate-term basis.
ITEM 3.
ITEM 3. LEGAL PROCEEDINGS
None.
ITEM 4.
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
On December 5, 1996, a special meeting of stockholders was held to vote on a proposal to increase the number of shares of authorized Common Stock from 30,000,000 to 40,000,000 shares and to authorize the issuance of 2,000,000 shares of Series Preferred Stock with a par value of $0.10 per share. The number of votes cast were as follows:
18,146,247 votes cast for 845,962 votes against 97,795 votes abstaining
PART II
ITEM 5.
ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS
The information under the heading "Stock Listing" on page 22 of the Company's 1996 Annual Report to Stockholders is incorporated herein by reference.
ITEM 6.
ITEM 6. SELECTED FINANCIAL DATA
The information under the heading "Selected Financial Data" on page 1 of the Company's 1996 Annual Report to Stockholders is incorporated herein by reference.
ITEM 7.
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS
The information under the heading "Management's Discussion and Analysis of Financial Condition and Results of Operations" on pages 4 through 7 of the Company's 1996 Annual Report to Stockholders is incorporated herein by reference.
ITEM 8.
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA
The Independent Auditors' Report, the consolidated financial statements and the notes to consolidated financial statements on pages 8 through 20 of the Company's 1996 Annual Report to Stockholders are incorporated herein by reference.
ITEM 9.
ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE
Not applicable.
PART III
ITEM 10.
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT
DIRECTORS
Set forth below is information regarding the Directors and Executive Officers of the Company, including information furnished by them as to their principal occupation for the last five years, certain other directorships held by them, and their ages at March 26, 1997:
Director Name Since Age Principal Occupation - ---- ----- --- -------------------- Phillips W. Smith 1990 59 President and Chief Executive Officer of the Company
James R. Fiebiger 1994 55 Industry Consultant; Chairman and Managing Director, Thunderbird Technology, Inc.
Benjamin Huberman 1990 59 President of Huberman Consulting Group
Horst G. Sandfort 1995 54 President of GateField
Stephen A. Flory 42 Vice President and Chief Financial Officer
Douglas E. Klint 46 Vice President, General Counsel and Corporate Secretary
John R. Walsh 53 Vice President and General Manager, Verification Division
Except as set forth below, each of the nominees has been engaged in his principal occupation set forth above during the past five years. There is no family relationship between any of the directors and executive officers of the Company and there are no arrangements or understandings pursuant to which any of them were elected as officers.
Dr. Smith was named President, Chief Executive Officer and director of the Company in June 1990. He had been an independent industry consultant from October 1989 to June 1990 after leaving his post as Chairman and Chief Executive Officer of Edgecore Technology, Inc., a computer manufacturer, after it was acquired by Arix Corporation in September 1989. Previously, Dr. Smith had been President and Chief Executive Officer and a director of CAE Systems, Inc.
Dr. Fiebiger was appointed a director of the Company in February 1994. Dr., Fiebiger has been a Consultant for the semiconductor industry since serving as President and Chief Operating Officer of VLSI Technology, Inc., a manufacturer of semiconductors, from February 1988 to August 1993. Previous positions include President and CEO of Thomson-Mostek and Senior Vice President and Assistant General Manager of Motorola's Worldwide Semiconductor Sector. Dr. Fiebiger is also a member of the board of directors of Mentor Graphics Corporation, Cooper & Chyan Technology, Inc., and Chairman and Managing Director, Thunderbird Technology, Inc.
Mr. Huberman was appointed a director of the Company in September 1990. He has served as President of the Huberman Consulting Group, a technology consulting firm, since 1990. Prior to that, he served as Vice president of Consultants International from 1981 to 1988 and as President from 1988 to 1990. Mr. Huberman is currently a member of the Chief of Naval Operations' Executive Panel. From 1988 to mid-1990, he also served as the first chairman of the Technical Advisory Panel to the U.S. Space Command. Mr. Huberman is also a member of the board of directors of Silicon Valley Research, Inc.
Mr. Sandfort was appointed a director of the Company in September 1995. He held the position of Executive Vice President for Geographic Markets at LSI Logic, where he had worldwide responsibilities for Sales, Marketing, and Engineering in Asia, Canada, Europe, and the U.S.A. During his ten years at LSI, he was also employed in a variety of other senior management positions including General Manager, Germany; Vice President Marketing, Sales and Engineering LSI Europe; and President, LSI Europe.
Mr. Flory has been with Zycad for nine years and has been its corporate controller since 1995 and was promoted to Chief Financial Officer (CFO) in February 1997. Before joining Zycad, Mr. Flory held various financial positions for Motorola Corporation's European operations. Mr. Flory holds a degree in accounting from the Institute of Chartered Management Accountants in London, England.
Mr. Klint joined the Company in December 1984 as Director of Contracts, and was named Corporate Secretary in June 1986, and was promoted to Vice President and General Counsel in November 1987. Mr. Klint holds a J.D. degree from William Mitchel College of Law and a B.A. degree from Gustavus Adolphus College.
Mr. Walsh has been with Zycad since February 1991 when he joined the Company as the Director of Customer Service. He was named the Vice President and General Manager, International Operations, in 1996, and was promoted to the Vice President and General Manager of the Verification Division in November 1996. Prior to joining Zycad, he was the Vice President of Operations for Plexus Software. Previously, Mr. Walsh was the President and CEO of Plexus Computer before it was acquired by Recognition Equipment, Inc.
BOARD COMMITTEES AND MEETINGS
The Board of Directors has a standing Audit Committee, Nominating Committee and Compensation Committee.
The Audit Committee of the Board, which currently consists of directors Benjamin Huberman and James Fiebiger, recommends engagement of the Company's independent auditors, approves services performed by such auditors and reviews and evaluates the Company's accounting system and its system of internal controls. The Audit Committee met once during the year ended December 31, 1996.
The Compensation Committee, which currently consists of directors James Fiebiger and Benjamin Huberman, administers the Company's stock plans and approves salaries, stock options and other compensation arrangements for executive officers of the Company. The Compensation Committee met four times during the year ended December 31, 1996.
The Nominating Committee, which currently consists of Directors James Fiebiger and Benjamin Huberman, establishes criteria and qualifications for prospective Board Members and recommends the nomination of Board Members should a vacancy arise. The Nominating Committee met once during the year ended December 31, 1996.
During the 1996 fiscal year, the Board of Directors held a total of five (5) meetings. Each incumbent Board member attended at least 80% of the aggregate of all meetings of the Board of Directors, plus all meetings of all committees of the Board on which he served during the year ended December 31, 1996.
No executive officer of the Company serves as a member of the board of directors or compensation committee of any entity which has one or more executive officers serving as a member of the Company's Board of Directors or Compensation Committee.
COMPLIANCE WITH SECTION 16(a) OF THE EXCHANGE ACT
Section 16(a) of the Securities Exchange Act of 1934 requires the Company's officers and directors, and persons who own more than ten percent of a registered class of the Company's equity securities, to file reports of ownership on Form 3 and changes in ownership on Form 4 or 5 with the SEC. Such officers, directors and ten-percent stockholders are also required by SEC rules to furnish the Company with copies of all Section 16(a) forms that they file.
Based solely on its review of the copies of such forms received by it, or representations from certain reporting persons that no Forms 5 were required for such persons, the Company believes that, during the last fiscal year, all Section 16(a) filing requirements applicable to its officers, directors, and ten-percent stockholders were complied with.
ITEM 11.
ITEM 11. EXECUTIVE COMPENSATION
EXECUTIVE COMPENSATION
The following table shows, as to the Chief Executive Officer and each of the four other executive officers, information concerning compensation paid for services to the Company in all capacities during the fiscal year ended December 31, 1996, as well as the Company's two previous fiscal years (if such person was the Chief Executive Officer or an executive officer, as the case may be, during any part of such fiscal year).
SUMMARY COMPENSATION TABLE
(1) Messrs. Smith, Cassidy and Klint are paid bonuses based on the Company's profitability. Mr. Olson is paid incentive compensation based on the Accelerator Division revenues and gross profit margin. Mr. Sandfort had a one-time guaranteed bonus of $15,000. (2) Represents $28,355 in cost of living adjustments for California housing. (3) Represents Company contributions to defined benefit plans. (4) Represents $44,048 in cost of living adjustments for California housing. (5) Represents $25,937 in cost of living adjustments for California housing and $38,975 in tax gross-up reimbursement payments for 1993 and 1994. (6) Mr. Cassidy died in August 1996. (7) Mr. Olson resigned in October 1996. (8) Mr. Sandfort's hire date was September 1995.
OPTION GRANTS TO EXECUTIVE OFFICERS
The following table sets forth further information regarding individual grants of stock options pursuant to the 1993 Stock Option Plan during 1996 to each of the executive officers named in the Summary Compensation Table above.
Note: All option shave an exercise price equal to the fair market value of the Company's Common Stock on the date of grant.
(1) All 10,000 options are time based with vesting over four years subject to accelerated vesting upon achievement of MBOs. (2) Options for 100,000 shares are time-based with vesting over four years subject to accelerated vesting upon achievement of MBOs.
AGGREGATED OPTION EXERCISES IN LAST FISCAL YEAR AND FISCAL YEAR END OPTION VALUES
The following table shows, as to the individuals named in the Summary Compensation Table above, information concern in stock options exercised during the fiscal year ended December 31, 1996, and options held at fiscal year end.
(1) Market value of underlying securities, based on the last sale price of the Companies Common Stock on the National Association of Securities Dealers, Inc. Automated Quotation (Nasdaq) National Market System on the date of exercise, minus the exercise price. (2) Market value of underlying securities, based on the last sale price of the Company's Common Stock on the Nasdaq National Market System on December 31, 1996 ($1.718 per share), minus the exercise price.
DIRECTOR COMPENSATION
Members of the Board of Directors who are not employees of the Company receive a retainer of $2,500 per quarter plus a fee of $1,000 for attendance at each Board and Board Committee meetings and are reimbursed for their expenses in attending meetings of the Board of Directors. In September 1990, Mr. Huberman received warrants from the Company entitling him to purchase 50,000 shares of the Company's Common Stock at an exercise price of $1.00 per share, the then market value. In August 1993, Mr. Huberman received warrants from the Company entitling him to purchase 30,000 shares of the Company's Common Stock at an exercise price of $2.06 per share.
In February 1994, Dr. Fiebiger received warrants from the Company entitling him to purchase 50,000 shares of the Company's Common Stock at an exercise price of $3.63 per share. Both of these warrants are exercisable for 10,000 shares on each anniversary date.
All warrants expire eight (8) years after their respective issue dates or 90 days after resignation from the Board of Directors, whichever occurs first.
See "Compensation Committee Interlocks and Insider Participation" for information regarding consulting fees paid to a director during 1996.
COMPENSATION COMMITTEE INTERLOCKS AND INSIDER PARTICIPATION
The Compensation Committee currently consists of outside directors James Fiebiger and Benjamin Huberman. Neither of these individuals was at any time during the fiscal year ended December 31, 1996, or at any other time an officer or employee of the Company.
During fiscal year ended December 31, 1996, the Company paid Mr. Benjamin Huberman, a member of the Board of Directors, $80,000 in consulting fees. Mr. Huberman has worked closely with the Company in developing and marketing the Company's consulting services. Management believes that this arrangement is at least as favorable as could be negotiated with outside consultants.
During fiscal year ending December 31, 1996, the Company paid Dr. James Fiebiger, a member of the Board of Directors, consulting fees in the amount of $24,875. Dr. Fiebiger's consulting services were rendered for product development, strategic planning and marketing consulting services for Field Programmable Gate Array Products developed by the Company's GateField Division. Management believes that this arrangement is at least as favorable as could be negotiated with outside consultants.
No executive officer of the Company serves as a member of the board of directors or compensation committee of any entity which has one or more executive officers serving as a member of the Company's Board of Directors or Compensation Committee.
ITEM 12.
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT
The following table sets forth certain information regarding ownership of the Company's Common Stock at March 26, 1997, by each beneficial owner, by each director, by each of the executive officers and all executive officers named in the Summary Compensation Table and directors of the Company as a group.
SHARES OF COMMON STOCK BENEFICIALLY OWNED
APPROXIMATE NAME AMOUNT OWNED PERCENT OWNED
U.S. Bancorp 1,189,800 4.6%
Phillips W. Smith 500,000 2.0% Peter J. Cassidy 300,000 (1) 1.2% James Fiebiger 35,000 (2) * Benjamin Huberman 110,000 (3) * Douglas E. Klint 2,500 (4) * Charles R. Olson 0 * Stephen A. Flory 15,644 (5) * Horst G. Sandfort 19,345 (6) * All directors and executive officers as a group (8 persons) 1,424,608 (7) 7.2% *Less than one (1) percent.
(1) Represents 300,000 shares subject to options held by Mr. Cassidy's estate that are exercisable through August 1997. Mr. Cassidy died in August 1996. (2) Includes 30,000 shares subject to warrants held by Dr. Fiebiger that are exercisable within 60 days of the Record Date. (3) Includes 80,000 shares subject to warrants held by Mr. Huberman that are exercisable within 60 days of the Record Date. (4) Includes 2,500 shares subject to options held by Mr. Klint that are exercisable within 60 days of the Record Date. (5) Includes 15,644 shares subject to options held by Mr. Flory that are exercisable within 60 days of the Record Date. (6) Includes 19,345 shares subject to options held by Mr. Sandfort that are exercisable within 60 days of the Record Date. (7) Includes 447,489 shares subject to options and warrants held by six persons that are exercisable within 60 days of the Record Date.
ITEM 13.
ITEM 13. CERTAIN TRANSACTIONS
No executive officers of the Company had indebtedness in excess of $60,000 outstanding during the past fiscal year.
PART IV
ITEM 14.
ITEM 14. EXHIBITS, FINANCIAL STATEMENT SCHEDULES AND REPORTS ON FORM 8-K
(a) 1. Financial Statements
Independent Auditors' Report (page 20 of the Company's 1996 Annual Report to Stockholders).
Consolidated Balance Sheets at December 31, 1996 and 1995 (page 8 of the Company's 1996 Annual Report to Stockholders).
Consolidated Statements of Operations for Years Ended December 31, 1996, 1995 and 1994 (page 9 of the Company's 1996 Annual Report to Stockholders).
Consolidated Statements of Stockholders' Equity for Years Ended December 31, 1996, 1995 and 1994 (page 10 of the Company's 1996 Annual Report to Stockholders).
Consolidated Statements of Cash Flows for Years Ended December 31, 1996, 1995 and 1994 (page 11 of the Company's 1996 Annual Report to Stockholders).
Notes to Consolidated Financial Statements (pages 12 through 19 of the Company's 1996 Annual Report to Stockholders).
2. The following financial statement schedules are included herein: Schedule II: Valuation and Qualifying Accounts
All other schedules are omitted because they are not required, inapplicable or the information is otherwise included.
3. Exhibits: EXHIBIT NUMBER DESCRIPTION
3.1 Certificate of Incorporation of the Company, as amended (incorporated by reference to Exhibit 3.1 to the Company's Annual Report on Form 10-K for the year ended December 31, 1987).
3.2 Bylaws of the Company, as amended (incorporated by reference to Exhibit 3.2 to the Company's Annual Report on Form 10-K for the year ended December 31, 1988).
3.3 Amendment to the Certificate of Incorporation of the Company.
10.1 * 1984 Stock Option Plan as amended (incorporated by reference to Exhibit 10.2 of the Company's Annual Report on Form 10-K for the year ended December 31, 1987).
10.2 Patent Agreement dated October 28, 1985 with Control Data Corporation (incorporated by reference to Exhibit 10.12 to the Company's Annual Report on Form 10-K for the year ended December 31, 1985).
10.3 Employee Stock Purchase Plan (incorporated by reference to Exhibit 10.12 to the Company's Annual Report on Form 10-K for the year ended December 31, 1986).
10.4 Warrant Certificate for the purchase of 15,000 shares of Common Stock executed with Douglas E. Johnson and John A. Fahlberg (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1989).
10.5 Patent Cross License Agreement dated May 17, 1989 with IKOS Systems, Inc. (incorporated by reference 10.25 to the Company's Annual Report on Form 10-K for the year ended December 31, 1989).
10.6 Warrant Certificate for the purchase of 50,000 shares of Common Stock executed with Benjamin Huberman dated September 19, 1990 (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1991).
10.7 Consulting Agreement dated October 1, 1990 with Benjamin Huberman (incorporated by reference 10.24 to the Company's Annual Report on Form 10-K for the year ended December 31, 1991).
10.8 Warrant Certificate for the purchase of 50,000 shares of Common Stock executed with Yoshikazu Hori dated July 18, 1991 (incorporated by reference 10.25 to the Company's Annual Report on Form 10-K for the year ended December 31, 1991).
10.9 Asset Purchase Agreement between Zycad Corporation and Synopsys Technology Inc., a wholly-owned subsidiary of Synopsys, Inc. dated as October 19, 1990 (incorporated by reference 10.26 to the Company's Annual Report on Form 10-K for the year ended December 31, 1991).
10.10 Agreement regarding non-compete and payments dated January 15, 1992 between Synopsys, Inc. and Synopsys Technology, Inc. and Zycad Corporation (incorporated by reference 10.27 to the Company's Annual Report on Form 10-K for the year ended December 31, 1991).
10.11 Lease dated March 6, 1992 relating to premises at 47100 Bayside Parkway, Fremont, California (incorporated by reference 10.22 to the Company's Annual Report on Form 10-K for the year ended December 31, 1992).
10.12 Promissory Note dated August 27, 1992 in the amount of $600,000 from Phillips W. Smith (incorporated by reference 10.24 to the Company's Annual Report on Form 10-K for the year ended December 31, 1992).
10.13* 1993 Stock Option Plan (incorporated by reference 10.13 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.14 Lease dated October 23, 1992 relating to premises at 100 Enterprise Drive, Rockaway, New Jersey (incorporated by reference 10.14 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.15 Form of Warrant Certificate for the purchase of 30,000 shares of Common Stock executed by Benjamin Huberman and Yoshikazu Hori dated August 16, 1993 (incorporated by reference 10.15 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.16 Promissory Note (full recourse) dated September 1, 1993 in the amount of $900,000 by Phillips W. Smith and Patricia Smith (incorporated by reference 10.16 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.17 Share Exchange and Allotment Agreement dated September 7, 1993, for the purchase of Integrated Circuit Applications, Ltd. (incorporated by reference 10.17 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.18 SICAN/Zycad Technology Agreement dated September 23, 1993, between SICAN G.m.b.H. and Zycad Corporation (incorporated by reference 10.18 to the Company's Annual Report on Form 10-K for the year ended December 31, 1993).
10.19 Private Placement Distribution Agreement dated March 4, 1994 with Rosehouse, Ltd. (incorporated by reference 10.19 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.20 Warrant Certificate for purchase of 50,000 shares of Common Stock executed with James Fiebiger dated February 4, 1994 (incorporated by reference 10.20 to the Company's Annual Report of Form 10-K for the year ended December 31, 1994).
10.21 Warrant Certificate for purchase of 5,918 shares of Common Stock executed with James Fiebiger dated November 11, 1994 (incorporated by reference 10.21 to the Company's Annual Report of Form 10-K for the year ended December 31, 1994).
10.22 First Amendment to Rockaway, New Jersey Lease dated January 13, 1995 (incorporated by reference 10.21 to the Company's Annual Report on Form 10-K for the year ended December 31, 1994).
10.23 Purchase Agreement between Zycad Corporation and Attest Software, Inc., dated May 31, 1996.
10.24 Factoring Agreement entered into at October 17, 1996, by and between Zycad Corporation and Silicon Valley Bank.
10.25 Credit Loan and Security Agreement entered into at January 6, 1997, by and between Zycad Corporation and Coast Business Credit, a division of Southern Pacific Thrift and Loan Association.
13.1 Registrant's Annual Report to Stockholders for the year ended December 31, 1996, pages 1 through 22.
21.1 Subsidiaries of the Registrant.
23.1 Consent of Independent Auditors, Deloitte & Touche LLP.
24.1 Power of Attorney. Reference is made to page 21.
27.1 Article 5 of Regulation S-X, Financial Data Schedules for Zycad Corporation for the year ended December 31, 1996.
* Denotes a compensation plan in which an executive officer participates.
(b) REPORTS ON FORM 8-K. None. (c) EXHIBITS. See response to Item 14(a)(3). (d) FINANCIAL STATEMENTS SCHEDULES. See response to Item 14 (a)(2).
For the purposes of complying with the amendments to the Rules governing Form S-8 (effective July 13, 1990) under the Securities and Exchange Act of 1933, the undersigned hereby undertakes as follows, which undertaken shall be incorporated by reference into the Registrant's Registration Statements on Form S-8 (File Nos. 13244):
Insofar as indemnification for liabilities arising under the Securities Act of 1933 may be permitted to directors, officers and controlling persons of the Registrant pursuant to the foregoing provisions, or otherwise, the Registrant has been advised that in the opinion of the Securities and Exchange Commission such indemnification is against public policy as expressed in the Securities Act of 1933 and is, therefore, unenforceable. In the event that a claim for indemnification against such liabilities (other than the payment by the Registrant of expenses incurred or paid by a director, officer or controlling person of the Registrant in the successful defense of any action, suit or proceeding) is asserted by such director, officer or controlling person in connection with the securities being registered, the Registrant will unless in the opinion of its counsel the matter has been settled by controlling precedent, submit to a court of appropriate jurisdiction the question whether such indemnification by it is against public policy as expressed in the Act and will be governed by the final adjudication af such issue.
INDEPENDENT AUDITORS' REPORT
To the Board of Directors and Stockholders of Zycad Corporation:
We have audited the consolidated financial statements of Zycad Corporation at December 31, 1996 and 1995, and for each of the three years in the period ended December 31, 1996, and have issued our report thereon (which expresses an unqualified opinion and includes an explanatory paragraph relating to an uncertainty of the Company's ability to continue as a going concern) dated March 11, 1997 (April 14, 1997 as to the last paragraph of Note 5 and as to Note 11). Our audits also included the consolidated financial statement schedule of Zycad Corporation, listed at Item 14(a)(2). This consolidated financial statement schedule is the responsibility of the Company's management. Our responsibility is to express an opinion based on our audits. In our opinion, such consolidated financial statement schedule, when considered in relation to the basic consolidated financial statements taken as a whole, presents fairly in all material respects the information set forth therein.
DELOITTE & TOUCHE LLP
San Jose, California March 11, 1997 (April 14, 1997 as to the last paragraph of Note 5 and as to Note 11 of Notes to the Consolidated Financial Statements of Zycad Corporation incorporated by reference in this Annual Report on Form 10-K for the year ended December 31, 1996)
SCHEDULE II - VALUATION AND QUALIFYING ACCOUNTS
FOR THE YEARS ENDED DECEMBER 31, 1996, 1995 AND 1994
(AMOUNTS IN THOUSANDS)
ZYCAD CORPORATION AND SUBSIDIARIES
(1) Write-off of accounts and notes determined to be uncollectable.
SIGNATURES
Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1934, the Company has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized.
ZYCAD CORPORATION
By /s/ Phillips W. Smith ------------------------------ Phillips W. Smith President and Chief Executive Officer
By /s/ Stephen A. Flory ------------------------------ Stephen A. Flory Vice President and Chief Financial Officer
Date: April 14, 1997
Exhibit 24.1
POWER OF ATTORNEY
KNOW ALL PERSONS BY THESE PRESENTS, that each person whose signature appears below constitutes and appoints Stephen A. Flory, and each of them, as his true and lawful attorneys-in-fact and agents, with full power of substitution and resubstitution, for him and in his name, place, and stead, in any and all capacities, to sign any and all amendments to this report, and to file the same, with all exhibits thereto, and other documents in connection therewith, with the Securities and Exchange Commission, granting unto said attorneys-in-fact and agents full power and authority to do and perform each and every act and thing requisite and necessary to be done in connection therewith, as fully to all intents and purposes as he might or could do in person, hereby ratifying and confirming all that said attorneys-in-fact and agents or his substitute or substitutes, may lawfully do or cause to be done by virtue hereof.
Pursuant to the requirements of the Securities Exchange Act of 1934, this report has been signed below by the following persons on behalf of the registrant and in the capacities and on the dates indicated.
Signature Title Date - -------------------------------------------------------------------------------
/s/ Phillips W. Smith Director April 14, 1997 - -------------------------- Phillips W. Smith
/s/ Horst G. Sandfort Director April 14, 1997 - -------------------------- Horst G. Sandfort
/s/ Benjamin Huberman Director April 14, 1997 - -------------------------- Benjamin Huberman
/s/ James R. Fiebiger Director April 14, 1997 - -------------------------- James R. Fiebiger