ITEM 1. BUSINESS
Overview
QuickLogic Corporation develops, markets and supports advanced field programmable gate array, or FPGA, and embedded standard product, or ESP, semiconductors and the software tools that enable design engineers to use our products. We introduced ESPs, a new class of semiconductor devices, in 1998, to address the design community's demand for a solution that bridges the gap between existing application specific integrated circuit, or ASIC, options and the long-sought goal of system-on-a-chip. Specifically, our ESP devices provide engineers with the ease-of-use, guaranteed functionality and high-performance of standard products, combined with the flexibility of programmable logic. Our ESP and FPGA products target complex, high-performance systems in rapidly changing markets where system manufacturers seek to minimize time-to-market and maximize product differentiation and functionality. We compete in various markets, including telecommunications and data communications; video/audio, graphics and imaging; instrumentation and test; high-performance computing; and military systems.
In August 2001, we completed the acquisition of certain assets of V3 Semiconductor, Inc. ("V3"), a manufacturer of application specific standard products, or ASSPs. The acquisition of V3 provides us with a design center in Canada and additional ASSP products that complement certain of our ESP products.
Product Technology
The key components of our ESP and FPGA product families are our ViaLink programmable metal technology, our user-programmable platform and the associated software tools used for product design. Our ViaLink technology allows us to create smaller devices than competitors' comparable products, thereby minimizing silicon area and cost. In addition, our ViaLink technology has lower electrical resistance and capacitance than other programmable technologies and, consequently, supports higher signal speed. Our user-programmable platform facilitates full utilization of a device's logic cells and Input/Output pins. These logic cells have been optimized to efficiently implement a wide range of logic functions at high speed, thereby enabling greater usable device density and design flexibility. Our architecture uses our ViaLink technology to maximize interconnects at every routing wire intersection. The abundance of interconnect resources allows more paths between logic cells. As a consequence, system designers are able to use QuickLogic devices with smaller gate counts than competing FPGAs to implement their designs. These smaller gate-count devices require less silicon area and as a result are able to be offered at a lower price. Finally, our software enables our customers to efficiently implement their designs using our products.
Industry Background
Competitive pressures are forcing manufacturers of electronic systems to rapidly bring to market products with improved functionality, higher performance and greater reliability, all at lower cost.
Providers of systems requiring high-speed data transmission and processing such as communications equipment, digital image products, test and instrumentation and storage subsystems face intense time-to-market pressures. These market forces have driven the evolution of logic semiconductors, which are used in complex electronic systems to coordinate the functions of other semiconductors, such as microprocessors or memory. There are three types of advanced logic semiconductors:
•Application specific integrated circuits, or ASICs, are special purpose devices designed for a particular manufacturer's electronic system. These devices are customized during wafer manufacturing;
•Application specific standard products, or ASSPs, are fixed-function devices designed to comply with industry standards that can be used by a variety of electronic systems manufacturers. Their functions are fixed prior to wafer fabrication; and
•Programmable logic devices, or PLDs, are general-purpose devices which can be used by a variety of electronic systems manufacturers, and are customized after purchase for a specific application. Field programmable gate arrays, or FPGAs, are types of PLDs used for complex functions.
Systems manufacturers have relied heavily on ASICs to implement the advanced logic required for their products. ASICs provide high performance due to customized circuit design. However, because ASICs are design-specific devices, they require long development and manufacturing cycles, delaying product introductions. In addition, because of the expense associated with the design of ASICs, they are cost effective only if they can be manufactured in high volumes. Finally, once ASICs are manufactured, their functionality cannot be changed to respond to evolving market demands.
ASSPs have become widely utilized as industry standards have developed to address increasing system complexity and the need for communication between systems and system components. These standards include:
•Peripheral component interconnect, or PCI, a standard developed to provide a high performance, reliable and cost-effective method of connecting high-speed devices within a system;
•Synchronous optical network, or SONET, a fiber-optic transmission standard for high-speed digital traffic, employed mainly by telephone companies and other network service providers;
•Ethernet, a widely-used local area network, or LAN, transport standard which controls the interconnection between servers and computers; and
•Fibre channel interconnect protocol, an industry networking standard for storage area networks, or SANs, which controls the interconnection between servers and storage devices.
Compared to ASICs, ASSPs offer the systems designer shorter development time, lower risk and reduced development cost. However, ASSPs generally cannot be used by systems manufacturers to differentiate their products. To address markets where industry standards do not exist or are changing and time-to-market is important, PLDs are often used. These products provide systems manufacturers with the flexibility to customize and thereby differentiate their systems, unlike ASSPs. PLDs also enable systems manufacturers to change the logic functionality of their systems after product introduction without the expense and time of redesigning an ASIC. However, most PLDs are more expensive than ASSPs and even ASICs of equivalent functionality because they require more silicon area. In addition, most PLDs offer lower performance than nonprogrammable solutions, such as ASSPs and ASICs.
Industry Future: System-on-a-Chip
Over the past few years, semiconductor manufacturers have migrated to smaller process geometries. These smaller process geometries enable more logic elements to be incorporated in a single chip using less silicon area. More recently, advances have been made in the integration of logic and memory on a single chip, which had been difficult previously due to incompatible process technologies. The industry "holy grail" is to have the three basic components of all electronic circuit boards; logic, memory and a microprocessor, on the same chip. Advantages of the single-chip approach to systems manufacturers include:
•simplified system development;
•reduced time-to-market;
•elimination of delays associated with the transfer of data between chips;
•smaller physical size;
•lower power dissipation;
•greater reliability; and
•lower cost.
However, as levels of logic integration have increased, devices have become more specific to a particular application. This fact limits their use and potential market size.
QuickLogic's ESP Solution
QuickLogic has leveraged its unique ViaLink technology and user-programmable platform to address the limitations inherent in current system-on-a-chip approaches. The result is embedded standard products, or ESPs, that deliver the advantages offered by both FPGAs and ASSPs. In its simplest form, an ESP contains four basic parts: a programmable logic array, an embedded standard function, an optional programmable read-only memory to configure the embedded function, and an interface that allows communication between the standard function and programmable logic array. Our ESP products combine the system-level functionality of ASSPs with the flexibility of FPGAs. We believe ESPs offer the following specific advantages:
•Increased Performance. In a typical design, data must travel between an ASSP and an FPGA across a printed circuit board. The limited number of connections available and the distance between the devices can degrade the system's overall performance. Our ESP solution allows all data to be processed on a single chip;
•Decreased Cost. Because our ESP is a single chip solution, it requires less silicon area, and therefore is less expensive to produce. Additionally, this single chip approach lowers the component, assembly and test cost for the system manufacturer;
•Increased Reliability. ESP designs are more reliable because single chip solutions contain fewer components and circuit board connections that are subject to failure; and
•Shorter Development Time. With a multiple chip design, systems designers must solve complex routing and timing issues between devices. A single chip ESP solution eliminates the timing issues between devices and simplifies software simulation, leading to shorter development time.
We have introduced six ESP product lines since 1998. These include the QuickSD, QuickFC and QuickPCI families-products aimed at the high-speed interconnect section of the fast-growing communications market. In addition we have introduced QuickDSP and QuickRAM, for high-performance Digital Signal Processing, or DSP, applications and applications that require
embedded memory. Most recently we have introduced our QuickMIPS family to serve applications that require an embedded microprocessor. All of these families are designed for performance-driven applications.
QuickLogic's FPGA Solution
QuickLogic's FPGAs offer higher performance at lower overall systems cost than competing FPGA solutions, in addition to offering the advantages typically associated with FPGAs. Specifically, our products provide greater design flexibility than standard FPGAs and enable designers of complex systems to achieve rapid time-to-market with highly differentiated products. Our products are based on our ViaLink technology and user-programmable platform, and our associated QuickWorks and QuickTools design software.
During 2000, we introduced a new FPGA family called Eclipse-devices that offer a host of new system-level features that are ideal for the telecommunications, networking, computer and test applications that require a combination of high-performance, high density and embedded random access memory, or RAM. In addition, we continue to sell our three families of pASIC FPGAs.
The QuickLogic Strategy
Our objective is to be the indispensable provider of high-speed, flexible, cost-effective ESPs. We feel we can achieve this objective by offering systems manufacturers the ability to accelerate design cycles to satisfy demanding time-to-market requirements. To achieve our objective, we have adopted the following strategies:
Extend Technology Leadership
Our ViaLink technology, user-programmable platform and proprietary software design tools enable us to offer flexible, high-performance ESP products. We intend to continue to invest in the development of these technologies and to utilize such developments in future innovations of our ESP products. We also intend to focus our resources on building critical systems-level expertise to introduce new ESP products and enhance existing ESP product families. We target applications that are:
•high performance and high complexity;
•broadly used and growing quickly; and
•difficult or impossible to implement in traditional FPGAs.
Specifically, we will continue to focus our design and marketing efforts on systems manufacturers who sell complex systems within our target applications. These include:
•data communications and telecommunications;
•video/audio and graphics and imaging;
•instrumentation and test;
•high-performance computing; and
•military.
Provide Complete System Solutions
Our focus on a more targeted set of applications areas will allow us to provide a complete solution to systems manufacturers. This includes not only the device and software, but software drivers,
reference designs, test boards and complementary intellectual property, or IP, functions. We focus ESP development efforts on three strategic applications areas:
•embedded high performance digital signal processing, or DSP;
•embedded high-performance interconnect; and
•embedded high-performance processing.
Strategic Alliances
As a part of our ESP strategy, we have engaged with MIPS Technologies, Finisar, UTMC, Tower Semiconductor, and other companies to expand the range of technology that we embed in our products. In addition, we continue to sell through a network of industry sales representatives and distributors. These alliances will be an essential element of our ESP strategy and strength going forward. By leveraging the expertise of our partners in IP development, wafer fabrication and sales, we can devote our effort to the development of targeted, complete ESP products.
Create Innovative, Industry-Leading Customer Services
We continue to develop and implement innovative ways to serve and communicate with our customers. For example, our WebASIC service allows customers to use our development software to design a circuit, transmit design information over the Internet and receive a QuickLogic ESP or FPGA device programmed with their design (within one business day in North America and Europe or within two business days in Asia). In addition, our ProChannel web-based system allows our distributors to receive quotations, place orders for our products and view their order status over the Internet. This system complements the Electronic Data Interchange systems that we have used for the past several years with our largest customers.
We have recently added a new class of products and their associated delivery system called WebESP. These products are ESPs or FPGAs that are configured in our factory and sold over the Internet as application specific standard products. The first WebESP products are semiconductor devices that form bridges between electronic systems using various forms of the UTOPIA communication protocol. Our ViaLink, non-volatile programmable logic devices give us the ability to configure the many variables needed to accommodate many different UTOPIA options and ship the devices to systems manufacturers who use them as ASSPs.
Customers and Markets
The following chart provides a representative list by industry of our current customers and the markets in which they do business:
Industry
Customer
Application
Data Communications and Telecommunications
Alcatel
Emulex
IBM
IPC
Motorola
Philips
Fiber optic transmission equipment
Storage Area Network equipment
Data encryption, network servers
Telephone equipment
Cellular base stations
Set-top boxes
Video/Audio, Graphics and Imaging
Avid
Honeywell
Samsung
Sony
Video editing equipment
Aircraft navigation and flight controls
Flat panel display controllers
Industrial video cameras
Instrumentation and Test
ABB
ASML
LTX
Medtronics
National Instruments
Teradyne
Industrial power management systems
Semiconductor manufacturing equipment
Semiconductor test equipment
Medical electronics
PC-based instrumentation boards
Semiconductor test equipment
High-Performance Computing
Compaq Computer
IBM
Alpha processor motherboards
RAID controller
Military Systems
Boeing
DY-4
Raytheon
Flight control electronics
VME-based computer systems
Tornado missile
Sales and Technical Support
We sell our products through a network of sales managers, independent sales representatives and electronics distributors in North America, Europe and Asia. In addition to our corporate headquarters in Sunnyvale, we have regional sales operations in Los Angeles, Dallas, Boston, Raleigh, London, Munich, Shin-Yokohama, Shanghai and Hong Kong. Our direct sales personnel and independent sales representatives are responsible for sales and applications support for a given region of responsibility. Our sales managers and independent sales representatives generally focus on major strategic accounts. Our distributor partnerships generally focus on small and medium-sized customers with the assistance of our independent sales representatives.
Currently in the United States, our three distributors include Cilicon (an Avnet company), Future Electronics, and Impact Technologies, Inc. A network of distributors throughout Europe and Asia supports our international business. These firms work with our regional sales managers in discovering new opportunities, satisfying customer needs, providing technical support and other value-added services. This activity takes place with new customers as well as existing customers. From time-to-time, we add or delete distributors and sales representatives, as appropriate to meet the needs of our company.
We provide systems manufacturers with comprehensive technical support, which we believe is critical to remaining competitive in the markets we serve. Our factory-based and distributor applications support organizations provide pre-sales and on-site technical support to customers.
Competition
The semiconductor industry is intensely competitive and is characterized by constant technological change, rapid rates of product obsolescence and price erosion. Our existing competitors include suppliers of conventional standard products, such as PLX Technology and Applied Micro Circuits Corporation; suppliers of complex programmable logic devices, or CPLDs, including Lattice Semiconductor and Altera; and suppliers of FPGAs, particularly Xilinx and Actel. Xilinx and Altera dominate the PLD market, which together control over 60% of the market, according to inSearch Research, a semiconductor market research firm. Xilinx dominates the FPGA segment of the market while Altera dominates the CPLD segment of the market. We also face competition from companies that offer standard gate arrays, which can be obtained at a lower cost for high volumes and may have gate densities and performance equal or superior to our products. As we introduce additional ESPs, we will also face competition from standard product manufacturers who are already servicing or who may decide to enter the markets addressed by these new ESP devices. In addition, we expect significant competition in the future from major domestic and international semiconductor suppliers. We also may face competition from suppliers of products based on new or emerging technologies.
We believe that important competitive factors in our market are length of development cycle, price, performance, installed base of development systems, adaptability of products to specific applications, ease of use and functionality of development system software, reliability, technical service and support, wafer fabrication capacity and sources of raw materials, and protection of products by effective utilization of intellectual property laws.
Research and Development
Our future success will depend to a large extent on our ability to rapidly develop and introduce new products and enhancements to our existing products that meet emerging industry standards and satisfy changing customer requirements. We have made and expect to continue to make substantial investments in research and development and to participate in the development of new and existing industry standards.
As of February 18, 2002, the research and development staff consisted of 60 employees working in several groups. Our research and development efforts are directed at the complete range of requirements of our ESP products.
•Our process engineering group develops our proprietary ViaLink wafer manufacturing process, oversees product manufacturing and process development with our third-party foundries, and is involved in ongoing process improvements to increase yields and optimize device characteristics.
•Our analog engineering group develops high-performance analog circuits to support our ESP products.
•Our FPGA design engineering group develops high-performance programmable systems that can be used stand-alone or combined with high value dedicated functions to form ESP products.
•Our ASIC design engineering group develops or integrates dedicated IP that is combined with a programmable system to produce ESP products.
•Our FPGA software group develops the design libraries, interface routines and place and route software that allows our customers to use third-party design environments to develop designs for our programmable systems and subsystems.
•Our embedded systems group develops the software required to program and use our MIPS based products.
Our research and development expenses for 1999, 2000 and 2001 were $7.4 million, $9.3 million and $14.3 million, respectively. We anticipate that we will continue to commit substantial resources to research and development in the future.
Manufacturing
We have established close relationships with third-party manufacturers for our wafer fabrication, package assembly, test and programming requirements in an effort to ensure stability in the supply of our products and minimize the risk of localized capacity constraints.
We currently outsource all of our wafer manufacturing to Cypress Semiconductor Corporation (Cypress) at its Round Rock, Texas facility and to Taiwan Semiconductor Manufacturing Company (TSMC) at its Taiwan facilities. Cypress manufactures our pASIC1 and pASIC2 product families using a three-layer metal, 0.65 micron CMOS process on six-inch wafers. TSMC manufactures our pASIC3, QuickRAM and QuickPCI product families using a four-layer metal, 0.35 micron CMOS process. TSMC also manufactures our Eclipse and other ESP products using a five-layer metal, 0.25 micron process on eight-inch wafers. Our Cypress agreement provides a guaranteed capacity availability. We purchase products from TSMC on a purchase order basis.
On December 12, 2000 we entered into a Share Purchase Agreement with Tower Semiconductor Ltd. (Tower) under which we agreed to make a $25 million strategic investment in Tower as part of Tower's plan to build a new wafer fabrication facility. The new fabrication facility will produce 200-mm wafers in geometries of 0.18 micron and below, using advanced CMOS technology from Toshiba. In return for our investment, we will receive equity and committed production capacity in the advanced fabrication facility that Tower is building. Tower will develop manufacturing capability for our proprietary ViaLink technology, and supply us with a guaranteed portion of the new fabrication facility's available wafer capacity at competitive pricing, with first production expected in 2002.
We outsource our product packaging, test and programming to Amkor Technology and ChipPAC, Inc. at their South Korea facilities and to Advanced Semiconductor Engineering at its Taiwan facility, among others.
Employees
As of February 18, 2002, we had a total of 189 employees worldwide, with 40 people in operations, 60 people in research and development, 22 people in sales, 32 people in marketing and 35 people in administration. We believe that our future success will depend in part on our continued ability to attract, hire and retain qualified personnel. None of our employees is represented by a labor union, and we believe our employee relations are good.
Intellectual Property
Our future success and competitive position depend upon our ability to obtain and maintain the proprietary technology used in our principal products. We hold 81 U.S. patents and have 12 pending applications for additional U.S. patents containing claims covering various aspects of programmable integrated circuits, programmable interconnect structures and programmable metal devices. In addition, we have two patent applications pending in Japan and one granted. Our issued patents expire between 2009 and 2019. We have also registered six of our trademarks in the U.S. with applications to register an additional two trademarks now pending.
Because it is critical to our success that we are able to prevent competitors from copying our innovations, we intend to continue to seek patent protection for our products. The process of seeking patent protection can be long and expensive, and we cannot be certain that any currently pending or future applications will actually result in issued patents, or that, even if patents are issued, they will be
of sufficient scope or strength to provide meaningful protection or any commercial advantage to us. Furthermore, others may develop technologies that are similar or superior to our technology or design around the patents we own.
We also rely on trade secret protection for our technology, in part through confidentiality agreements with our employees, consultants and third parties. However, employees may breach these agreements, and we may not have adequate remedies for any breach. In any case, others may come to know about or determine our trade secrets through a variety of methods. In addition, the laws of certain territories in which we develop, manufacture or sell our products may not protect our intellectual property rights to the same extent as do the laws of the United States.
From time to time, we receive letters alleging patent infringement or inviting us to take a license to other parties' patents. We evaluate these letters on a case-by-case basis. In September 1999, we received an offer to license a patent related to field programmable gate array architecture. We have not yet determined whether this license would be necessary or useful and obtainable at a reasonable price. Offers such as these may lead to litigation if we reject the opportunity to obtain the license.
Executive Officers and Directors
The following table sets forth certain information concerning our current executive officers and directors as of February 18, 2002:
E. Thomas Hart has served as our President, Chief Executive Officer and a member of our board of directors since June 1994, and as our Chairman since April, 2001. Prior to joining QuickLogic, Mr. Hart was Vice President and General Manager of the Advanced Networks Division at National Semiconductor, a semiconductor manufacturing company, where he worked from September 1992 to June 1994. Prior to joining National Semiconductor, Mr. Hart was a private consultant from February 1986 to September 1992 with Hart Weston International, a technology based management consulting firm. Mr. Hart serves on the board of Insilicon, a provider of electronic design intellectual property. Mr. Hart holds a B.S.E.E. from the University of Washington.
Michael A. Alford, a co-founder of V3 Semiconductor Inc., joined us in August 2001, serving as Vice President, Application-Specific Standard Products. From April, 1994 to August 2001, Mr. Alford was employed by V3 Semiconductor, a semiconductor manufacturing company, most recently as Chief
Technical Officer. To facilitate the asset sale and the subsequent windup of V3 as a distinct entity, V3 filed for relief under Chapter 11 of the bankruptcy laws in May 2001. From 1992 to 1994, Mr. Alford was employed by ATI, a manufacturer of multimedia and graphics components for personal computers. Mr. Alford holds a B.E.Sc. (Electrical) degree from the University of Western Ontario.
John M. Birkner, a co-founder of QuickLogic, has served with us since April 1988, serving as Vice President, Chief Technical Officer since 1993. From September 1975 to June 1986, Mr. Birkner was a fellow at Monolithic Memories, a semiconductor manufacturing company. Mr. Birkner holds a B.S.E.E. from the University of California, Berkeley and an M.S.E.E. from the University of Akron.
Andrew K. Chan, a co-founder of QuickLogic, has served with us since April 1988, most recently as Vice President, Research and Development. Prior to joining QuickLogic, Mr. Chan was a design engineering manager at Monolithic Memories. Mr. Chan holds a B.S.E.E. in Electrical Engineering from Washington State University and an M.S.E.C. in Electrical Sciences from the University of New York, Stonybrook.
Hua-Thye Chua, a co-founder of QuickLogic, has served as a member of our board of directors since QuickLogic's inception in April 1988. Since December 1996, Mr. Chua has served as our Vice President, Process Technology. He served as our Vice President of Technology Development from April 1989 to December 1996. During the prior 25 years, Mr. Chua worked at semiconductor manufacturing companies, including Fairchild Semiconductor, Intel and Monolithic Memories. Mr. Chua holds a B.S.E.E. from Ohio University and an M.S.E.E. from the University of California, Berkeley.
Peter G. Feist served as our Vice President, Worldwide Marketing from June, 2000 until February 15, 2002. From January 1997 to April 2000, Mr. Feist was with GateField, a semiconductor manufacturing company, where he was most recently Senior Vice President, Marketing. From January 1995 to September 1996, he served as Regional Manager, Europe for Hyundai Corporation, Digital Media Division. From April 1985 to December 1994, he worked for LSI Logic, a semiconductor manufacturing company, most recently as Director Strategic Marketing. He holds a Diplom Ingenieur (M.S.E.E.-equivalent) from the University of Dortmund.
Timothy Saxe joined QuickLogic in May 2001 as our Vice President, Software Engineering. From November 2000 to February 2001, Mr. Saxe was Vice President of FLASH Engineering at Actel, a semiconductor manufacturing company. Mr. Saxe joined Zycad, a design verification tools and services company, in June 1983 and was a founder of Zycad's Gatefield division, a semiconductor manufacturing division, in 1993. Zycad was renamed Gatefield in October 1997. Mr. Saxe became Gatefield's CEO in February 1999 and served in that capacity until Gatefield was acquired by Actel in November 2000. He holds a BSEE degree from North Carolina State University, and an MSEE and a PhD in Electrical Engineering from Stanford University.
Jeffrey D. Sexton joined QuickLogic in August 2001. Between January 1995 and August 2001, he held several positions at National Semiconductor including Director of Distribution, Regional Sales Manager, Cisco Systems Global Account Manager and OEM Sales Engineer. He holds a BSEE degree from Wright State University in Dayton, OH.
Reynold W. Simpson has served with us since August 1997, most recently as Senior Vice President and Chief Operating Officer. From February 1996 to July 1997, Mr. Simpson was Vice President of Manufacturing at GateField, a semiconductor manufacturing company. Prior to joining Gatefield, Mr. Simpson was Operations Manager at LSI Logic, a semiconductor manufacturing company, from March 1990 to February 1996 and Quality Director from February 1989 to March 1990. Mr. Simpson holds a Mechanical Engineering Certificate from the Coatbridge Polytechnic Institute in Scotland, a degree in Technical Horology (Mechanical Engineering) from the Barmulloch Polytechnic Institute in
Scotland and studied for a degree in Electronic Engineering at the Kingsway Polytechnic Institute in Scotland.
Arthur O. Whipple has served as our Vice President, Finance, Chief Financial Officer and Secretary since April 1998. From April 1994 to April 1998, Mr. Whipple was employed by ILC Technology, a manufacturer of high performance lighting products, as its Vice President of Engineering and by its subsidiary, Precision Lamp, a manufacturer of high-performance lighting products, as its Vice President of Finance and Operations. From February 1990 to April 1994, Mr. Whipple served as the President of Aqua Design, a privately-held provider of water treatment services and equipment. Mr. Whipple holds a B.S.E.E. from the University of Washington and an M.B.A. from Santa Clara University.
Ronald D. Zimmerman has served as our Vice President, Administration since October 1996. From August 1988 to October 1996, Mr. Zimmerman was Human Resources Director of the Analog Products Group at National Semiconductor, as well as group human resources director of the corporate technology and quality/reliability organizations and the human resources director of corporate administration. Mr. Zimmerman holds a B.A. in Sociology and Psychology and an M.A. in Psychology from San Jose State University.
Donald P. Beadle has served as a member of our board of directors since July 1997. Since June 1994, Mr. Beadle has been President of Beadle Associates, a consulting firm. From May 1997 to July 1997, Mr. Beadle was a consultant at Interwave Communications, a developer of microcell systems, where he served as Acting Vice President of Sales and Sales Operations. From October 1994 to December 1996, he was a consultant for Asian business development at National Semiconductor. At National Semiconductor, he was Managing Director, Southeast Asia from 1993 until June 1994, Vice President of Worldwide Marketing and Sales, International Business Group from 1987 until 1993, and Managing Director, Europe from 1982 to 1986. Mr. Beadle was employed by National Semiconductor in executive sales and marketing positions for 34 years until June 1994, at which time he was Executive Vice President, Worldwide Sales and Marketing. Mr. Beadle serves on the board of directors of one public company, Komag, a thin film media manufacturer. He received his technical education at the University of Connecticut and the Bridgeport Institute of Engineering.
Robert J. Boehlke has served as a member of our board of directors since December 2000. Mr. Boehlke was most recently Executive Vice President and Chief Financial Officer of KLA-Tencor, a position he held until his retirement in June 2000. He joined KLA Instruments in 1983 and served as the general manager of various operating groups through 1990 when he became Chief Financial Officer. He was a partner at the investment banking firm of Kidder, Peabody & Company from 1971 until 1983. Mr. Boehlke serves on the boards of LTX, a test equipment manufacturer, Entegris, a manufacturer of materials management products for the semiconductor industry, MEMC Electronic Materials, Inc. and DuPont Photomasks, Inc., manufacturers of materials for the semiconductor industry. He holds a bachelor's degree in engineering from the U.S. Military Academy at West Point and an M.B.A. from Harvard University.
Michael J. Callahan has served as a member of our board of directors since July 1997. From March 1990 through his retirement in September 2000, Mr. Callahan served as Chairman of the Board, President and Chief Executive Officer of Waferscale Integration, a producer of peripheral integrated circuits. From 1987 to March 1990, Mr. Callahan was President of Monolithic Memories, now a subsidiary of Advanced Micro Devices, a semiconductor manufacturing company. He was Senior Vice President of Programmable Products at Advanced Micro Devices. From 1978 to 1987, Mr. Callahan held a number of positions at Monolithic Memories including Vice President of Operations and Chief Operating Officer. Prior to joining Monolithic Memories, he worked at Motorola Semiconductor, a semiconductor manufacturing company, for 16 years where he was Director of Research and Development as well as Director of Linear Operations. Mr. Callahan serves on the board of Integrated Telecom Express, Inc., which provides asymmetric digital subscriber line chipsets, network protocol
software, and development tools. Mr. Callahan holds a B.S.E.E. from the Massachusetts Institute of Technology.
Executive Officers
Our executive officers are elected by, and serve at the discretion of, our board of directors. There are no family relationships among our directors and officers.
Board of Directors
We currently have authorized five directors. Our directors consist of Messrs. Beadle, Boehlke, Callahan, Chua and Hart. All directors hold office for a term of three years. Our certificate of incorporation provides that our board of directors will be divided into three classes, each with staggered three-year terms. As a result, only one class of directors will be elected at each annual meeting of our stockholders, with the other classes continuing for the remainder of their respective three-year terms. Messrs. Beadle and Callahan have been designated as Class I directors, whose terms expire at the 2003 annual meeting of stockholders; Mr. Chua has been designated as a Class II director, whose term expires at the 2004 annual meeting of stockholders; and Mr. Hart and Mr. Boehlke have been designated as Class III directors, whose terms expire at the 2002 annual meeting of stockholders.
Board Committees
Our board of directors has an audit committee and a compensation committee.
Audit Committee. The audit committee was formed in June 1995 and currently consists of Messrs. Beadle, Boehlke and Callahan. The audit committee reviews the results and scope of the annual audit and other services provided by our independent accountants, reviews and evaluates our internal control functions and monitors financial transactions between us and our employees, officers and directors.
Compensation Committee. The compensation committee was formed in June 1995 and currently consists of Messrs. Beadle, Boehlke and Callahan. The compensation committee administers the 1989 stock option plan, 1999 stock plan and 1999 employee stock purchase plan, and reviews the compensation and benefits for our executive officers.
Compensation Committee Interlocks and Insider Participation
Prior to establishing the compensation committee, the board of directors as a whole performed the functions delegated to the compensation committee. No member of the compensation committee or executive officer of QuickLogic has a relationship that would constitute an interlocking relationship with executive officers or directors of another entity.
ITEM 2.
ITEM 2. PROPERTIES
Our principal administrative, sales, marketing, research and development and final testing facility is located in a building of approximately 42,000 square feet in Sunnyvale, California. This facility is leased through 2003 with an option to renew through 2006. The acquisition of V3 during 2001 added approximately 11,000 square feet of engineering and development space in Toronto, Canada. The Toronto facility is leased through January 2005. In addition, during 2001 we leased approximately 4,000 square feet of engineering development space in La Palma, CA near Los Angeles. The La Palma facility is leased through January 2004. We lease, or rent, sales offices in Richardson, TX (leased through March 2003), London (leased through September 2004), Hong Kong (leased through September 2002), Shanghai (rent in six month increments) and Shin-Yokohama. In June 2001 we closed
our 1,500 square foot engineering office in Hillsborough, Oregon. In December 2001 QuickLogic leased a 4,500 square foot engineering facility in Bangalore, India for the purpose of software development. The Bangalore facility is leased through November 2004. We believe that our existing facilities are adequate for our current needs.
ITEM 3.
ITEM 3. LEGAL PROCEEDINGS
On March 29, 2000, Unisys Corporation ("Unisys") brought suit in the United States District Court for the Northern District of California, San Jose Division ("Court"), against QuickLogic seeking monetary damages and injunctive relief. The summons and complaint were served on QuickLogic on April 10, 2000. The Court conditionally dismissed the case with prejudice on October 11, 2001, which dismissal became final thirty days later. We entered into a definitive written settlement agreement on November 8, 2001. The settlement was immaterial to QuickLogic's business, financial condition and operating results.
On October 26, 2001, a putative securities class action was filed in the U.S. District Court for the Southern District of New York against some investment banks that underwrote QuickLogic's initial public offerings, QuickLogic, and some of QuickLogic's officers and directors. This lawsuit is captioned Turoff v. QuickLogic et al., Case No. 01-CV-9503. Various plaintiffs have filed similar actions asserting virtually identical allegations against over 300 other public companies, their underwriters, and their officers and directors arising out of each company's public offering. The complaint in this case generally alleges that the underwriters obtained excessive and undisclosed commissions in connection with the allocation of shares of Common Stock in the Company's initial public offering and maintained artificially high prices through "tie-in" arrangements which required customers to buy shares in the aftermarket at pre-determined prices. The complaint alleges that QuickLogic and its current officers and directors violated sections of the Securities Act of 1933, and the Securities Exchange Act of 1934 because our registration statements did not disclose the purported misconduct of the underwriters. Plaintiffs seek an unspecified amount of damages on behalf of persons who purchased our stock pursuant to the registration statements. We believe that these allegations are without merit and intend to defend the case vigorously.
ITEM 4.
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
No matters were submitted to a vote of security holders during the fourth quarter of the fiscal year covered by this report.
PART II
ITEM 5.
ITEM 5. MARKET FOR THE REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS
Our Common Stock has been traded on The Nasdaq Stock Market's National Market under the symbol "QUIK" since October 15, 1999, the date of our initial public offering. The following table sets forth for the periods indicated the high and low closing prices for the Common Stock, as reported on The Nasdaq Stock Market's National Market:
The last reported sale price of our Common Stock on The Nasdaq Stock Market's National Market was $4.24 per share on February 27, 2002. As of February 27, 2002, there were 23,185,808 shares of Common Stock outstanding that were held of record by approximately 303 stockholders.
We commenced our initial public offering on October 15, 1999 pursuant to a Registration Statement on Form S-1 (File No. 333-28833) which was declared effective by the Securities and Exchange Commission on October 14, 1999. The Company sold an aggregate of 3,770,635 shares of Common Stock in our initial public offering at an initial price to the public of $10.00 per share. In addition, a selling stockholder sold 3,896,415 shares of Common Stock in our initial public offering at an initial price to the public of $10.00 per share. Our initial public offering has terminated and all shares have been sold. The managing underwriters of our initial public offering were Robertson Stephens, Bear, Stearns & Co. Inc. and SoundView Technology Group. Aggregate proceeds from our initial public offering were $76.7 million, which includes $10.0 million in aggregate proceeds due to the exercise of the underwriters' option to purchase shares to cover over-allotments.
We paid underwriters' discounts and commissions of $2.6 million and no additional offering expenses in connection with our initial public offering. The total expenses we paid in our initial public offering were $1.2 million, and the net proceeds to us of our initial public offering were $33.9 million.
The Company completed a follow-on public offering of its common stock on April 12, 2000. The underwriters' over-allotment option was exercised and QuickLogic sold a total of 1,629,269 common shares at $23.50 per share. Proceeds, net of underwriting discounts and commissions and related offering expenses, of $35.5 million were received.
From October 14, 1999, the effective date of the Registration Statement, to December 31, 2001, the ending date of the reporting period, the approximate amount of net offering proceeds used were $40 million for general business operations. See "Management's Discussion and Analysis of Financial Condition and Results of Operations."
Dividend Policy
We have never declared or paid any dividends on our capital stock. We currently expect to retain future earnings, if any, for use in the operation and expansion of our business and do not anticipate paying any cash dividends in the foreseeable future.
Recent Sales of Unregistered Securities
On August 1, 2001, we acquired capital assets, prepaid expenses, inventory and other assets from V3 Semiconductor, Inc., a Toronto based manufacturer of application specific standard products, in exchange for 2.52 million shares of our common stock with a value of approximately $13.1 million. The shares were issued to V3 pursuant to an exemption under Section 4(2) of the Securities Act of 1933, as amended.
ITEM 6.
ITEM 6. SELECTED FINANCIAL DATA
(1)Contract termination and legal expenses include a charge of $23.0 million in the year ended December 31, 1997 for termination of an agreement with Cypress, and charges of $5.3 million in the year ended December 31, 1997, for legal and settlement costs associated with a cross licensing agreement with Actel Corporation.
(2)Write down of marketable securities includes a charge of $6.8 million for the write down of equity in Tower. See note 8 of notes to consolidated financial statements.
(3)Long term obligations at December 31, 1997 include obligations under an Actel cross licensing agreement. At December 31, 1998, this obligation is classified as a current liability. We paid all of our remaining obligations under the agreement on November 3, 1999.
ITEM 7.
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS
EXPLANATORY NOTE
Statements in this section, and elsewhere in this Annual Report on Form 10-K, which express that QuickLogic "believes", "anticipates" or "plans to...", as well as other statements which are not historical fact, are forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. Actual events or results may differ materially as a result of the risks and uncertainties described herein and elsewhere including, in particular, those factors described under "Factors Affecting Future Results."
Overview
We design and sell field programmable gate arrays, embedded standard products, associated software and programming hardware. From our inception in April 1988 through the third quarter of 1991, we were primarily engaged in product development. In 1991, we introduced our first line of field programmable gate array products, or FPGAs, based upon our ViaLink technology. FPGAs have accounted for substantially all of our product revenue to date. We currently have four FPGA product families: pASIC 1, introduced in 1991; pASIC 2, introduced in 1996; and pASIC 3, introduced in 1997. We introduced our Eclipse family of FPGAs in 2000. The newer product families generally contain greater logic capacity, but do not necessarily replace sales of older generation products.
In September 1998, we introduced QuickRAM, our first line of embedded standard products, or ESPs. Our ESPs are based on our FPGA technology. In April 1999, we introduced QuickPCI, our second line of ESPs. Revenue for our QuickRAM and QuickPCI products together accounted for approximately 22% of our total revenue in 2001. During 2000, we introduced the QuickFC, QuickDSP, QuickSD and QuickMIPS families of ESPs, which accounted for about 1% of total revenue in 2001. We also license our QuickWorks and QuickTools design software and sell our programming hardware, which together have typically accounted for less than 2% of total revenue.
In April 2001, we signed a definitive agreement with V3 Semiconductor, Inc. to acquire certain assets of V3 in a stock transaction. We also entered into a manufacturing and distribution agreement with V3 pending the sale in order to ensure continued distribution of V3's products to its customers. V3, based in Toronto, Ontario, manufactured application specific standard products, or ASSPs, that enhance high-speed data throughput within telecommunications and Internet infrastructure systems.
To facilitate the asset sale and the subsequent windup of V3 as a distinct entity, V3 filed for relief under Chapter 11 of the bankruptcy laws in May 2001. In August 2001, we completed the acquisition of certain assets of V3, for approximately 2.5 million shares of our common stock, valued at $13.1 million. The acquisition is designed to accelerate our ESP strategy by strengthening our ability to develop and market system-level products for the communications and networking markets. Upon completion of V3's bankruptcy proceedings, V3 is expected to distribute these shares to its creditors and stockholders. The distributed shares will then be freely tradeable on the open market. The acquisition was accounted for as a purchase.
On December 12, 2000, we entered into a Share Purchase Agreement (the "Agreement") with Tower Semiconductor Ltd. ("Tower"). Under the Agreement, we agreed to make a $25 million strategic investment in Tower as part of Tower's plan to build a new wafer fabrication facility. The new fabrication facility will produce 200-mm wafers in geometries of 0.18 micron and below, using advanced CMOS technology from Toshiba. In return for the investment, we will receive equity and committed production capacity in the advanced fabrication facility that Tower is building. In connection with the Agreement, we also entered into a foundry agreement under which we are entitled to a certain amount of wafer purchase credits. Up to 15% of order value can be applied against these credits in future wafer purchases from Tower. The amount of credits is determined upon each share purchase
transaction and is calculated based on the difference between our share purchase exercise price and the higher of $12.50 and Tower's average stock price for 30 days preceding a purchase transaction. Under the terms of the Agreement, our investment will be made in several stages over an approximately 22-month period, against satisfactory completion of key milestones for the construction, equipping and commencement of production at the new wafer fabrication facility.
Pursuant to the Agreement, we purchased 533,310 ordinary shares of Tower and future wafer purchase credits for an aggregate purchase price of $14.0 million in fiscal 2001. We agreed to purchase an additional 366,690 ordinary shares of Tower in three equal increments upon occurrence of certain events relating to the construction of the fabrication facility. We agreed to purchase two thirds of these additional shares in fiscal 2002, and the remainder in 2003. The ordinary shares are restricted, and we account for the shares under the cost method, based on the fact that we do not have significant influence over Tower's operations.
During the third quarter of fiscal 2001, due to an "other-than-temporary" decline in the value of the stock, we wrote down our investment in Tower, recording a pre-tax, non-operating loss of $6.8 million. Also, in October 2001, approximately $5.3 million of our wafer purchase credits were converted to 418,616 ordinary shares in Tower. At December 31, 2001, the wafer credits from Tower totalled $1.8 million and are included in other assets on the balance sheet. At December 31, 2001, we owned a total of 951,926 shares in Tower, with a book value of $5.4 million.
We sell our products through two channels. We sell the majority of our products through distributors who have contractual rights to earn a negotiated margin on the sale of our products. We refer to these distributors as point-of-sale distributors. We defer recognition of revenue for sales of unprogrammed products to these point-of-sale distributors until after they have sold these products to systems manufacturers. We recognize revenue on programmed products at the time of shipment. Approximately 65% of our products sold by point-of-sale distributors are programmed by us and are not returnable by these point-of-sale distributors. We also sell our products directly to systems manufacturers and recognize revenue at the time of shipment. The percentage of sales derived through each of these channels in 1999 was 80% and 20% respectively. In 2000 it was 69% and 31%, respectively, and 74% and 26% in 2001, respectively.
Four distributors accounted for 24%, 11%, 10%, and 6% of sales, respectively, in 1999. Five distributors accounted for 20%, 8%, 7%, 6% and 6% of sales, respectively, in 2000 and five distributors accounted for approximately 33%, 15%, 8%, 8% and 7% of sales, respectively, in 2001. We expect that a limited number of distributors will continue to account for a significant portion of our total sales. We believe the company's products are proprietary and sole source, and that the loss of a particular distributor would not result in a short term disruption in sales of our products, since our customers would either buy our products from another distributor or directly from us.
Our international sales were 48%, 38% and 35% of our total sales for 1999, 2000 and 2001, respectively. We expect that revenue derived from sales to international customers will continue to represent a significant and growing portion of our total revenue. All of our sales are denominated in U.S. dollars.
Average selling prices for our products typically decline rapidly during the first six to 12 months after their introduction, then decline less rapidly as the products mature. We attempt to maintain gross margins even as average selling prices decline through the introduction of new products with higher margins and through manufacturing efficiencies and cost reductions. However, the markets in which we operate are highly competitive, and there can be no assurance that we will be able to successfully maintain gross margins. Any significant decline in our gross margins will materially harm our business.
We outsource the wafer manufacturing, assembly and test of all of our products. We rely upon Taiwan Semiconductor Manufacturing Company and Cypress Semiconductor Corporation to
manufacture our products, and we rely primarily upon Amkor Technology and ChipPAC, Inc. to assemble and test our products. Under our arrangements with Cypress, we are obligated to provide forecasts and enter into binding obligations for anticipated purchases. This limits our ability to react to fluctuations in demand for our products, which could lead to excesses or shortages of wafers for a particular product.
Results of Operations
The following table sets forth the percentage of revenue for certain items in our statements of operations for the periods indicated:
Years Ended December 31, 1999, 2000 and 2001
Revenue. Our revenue for 1999, 2000 and 2001 was $39.8 million, $53.3 million and $32.3 million, respectively, representing growth of 34.1% from 1999 to 2000 and a decrease of 39.4% from 2000 to 2001. The majority of the 2000 increase in revenue, as compared with 1999, was due to growth in sales of our FPGA products, which increased by 27%, or $9.7 million. Our ESP products also increased from 1999 to 2000 by $4.0 million or 161%. From 2000 to 2001, our sales of FPGAs declined by 52%, or $23.8 million, in line with other competitors in the industry. Sales of our ESP products, however, increased by 46%, or $3.0 million, driven mostly by the acquisition of V3.
Gross Profit. Gross profit was $22.7 million, $32.3 million and $10.5 million in 1999, 2000 and 2001, respectively, which was 57.0%, 60.5% and 32.5% of revenue for those periods. The increase in 2000, as compared with 1999, was primarily due to the continued growth in sales and the introduction of higher-margin QuickRAM products. The 2000 increase was partially offset by a slight decrease in the average selling price of the older pASIC 1 and pASIC 2 product families. The 68% decline in gross margin from 2000 to 2001 was due to relatively fixed manufacturing overhead costs allocated over lower direct manufacturing costs associated with lower revenue, a write off of approximately $3.7 million in excess die inventory and a small increase in direct manufacturing costs as a percentage of revenue. We expect that as our manufacturing volumes return to historical levels, our gross profit percentage should also return to the 50-60% range.
Research and Development Expense. Research and development expense was $7.4 million, $9.3 million and $14.3 million in 1999, 2000 and 2001 respectively, which was 18.5%, 17.4% and 44.2% of revenue for those periods. The increases in research and development spending from 1999 to 2000 was due primarily to an increase in the number of employees involved in research and development as
we accelerated the introduction of new products, particularly our ESP's. In 2001, we added research and development centers in Toronto (formerly V3) and Bangalore, India. The remainder of the increase for 2001 was due to increased spending to accelerate the introduction of our QuickMIPS family of products. We believe that continued investments in process technology and product development are essential for us to remain competitive in the markets we serve. Specifically in regard to our ESPs, we expect to continue to increase research and development spending.
Selling, General and Administrative Expense. Selling, general and administrative expense was $12.6 million, $17.1 million and $16.9 million in 1999, 2000 and 2001, respectively, which was 31.7%, 32.2% and 52.4% of revenue for those periods. The increases in 1999 and 2000 were primarily due to hiring of additional sales and marketing personnel and increased sales commissions. We kept these expenses relatively flat from 2000 to 2001, but they rose as a percentage of revenue due to the decrease in revenue for the period. We anticipate that selling, general and administrative expense will not continue to decrease, but remain relatively flat or increase in absolute dollars as we invest in our business and seek to find new customers for our products. In October 2001, we reduced our worldwide headcount by approximately 20%. We also instituted salary reduction plans for salaried employees of 10% to 30%. We wrote off $350,000 of intellectual property associated with a cancelled product and incurred $269,000 in severance and other related costs. These charges were reflected in our fourth quarter results as a restructuring charge of $619,000.
Deferred Compensation. With respect to the grant of stock options to employees, we recorded aggregate deferred compensation of $908,000 in 1999. There was no deferred compensation recorded in 2000 or 2001. The amount of deferred compensation is presented as a reduction of stockholders' equity and amortized ratably over the vesting period of the applicable options, generally four years. We amortized $512,000, $589,000, and $400,000 in 1999, 2000 and 2001, respectively. The amortization of deferred compensation is recorded as research and development and selling, general and administrative expenses, depending on the related employees' activities.
Write down of Marketable Securities. During the third quarter of 2001, we wrote down the value of our investment in Tower Semiconductor Ltd. to market value. This resulted in a charge to income of $6.8 million. We have invested $14.0 million in Tower common stock associated with their Fab 2, deep sub-micron wafer foundry project.
Interest and Other Income, Net. Interest and other income, net of expense, was $452,000, $3,793,000 and $1,675,000 in 1999, 2000 and 2001, respectively. The increase from 1999 to 2000 in interest income was due mainly to our investment of proceeds from the October 1999 initial public offering and April 2000 follow-on offering. Interest and other income decreased in 2001 due to decreased cash balances and lower interest rates.
Provision for Income Taxes
No provision for income taxes was recorded for the years ended December 31, 1999, 2000 and 2001, as we were able to utilize a portion of our state and federal net operating loss carryforwards and other tax attributes. At December 31, 2001, we had net operating loss carryforwards for federal and state tax purposes of approximately $49 million and $12 million, respectively. These carryforwards, if not utilized to offset future taxable income and income taxes payable, will continue to expire through 2018.
Liquidity and Capital Resources
At December 31, 2001 we had $28.9 million in cash, a decrease of $41.4 million from cash held at December 31, 2000. As of December 31, 2001, we had an accumulated deficit of $74.9 million.
We have an equipment financing line with a commercial bank. At December 31, 2001, we had obligations of $42,000 outstanding under this equipment line with no remaining available balance. The outstanding obligations under the equipment line are due over the next one to three years. The interest rate on these borrowings is at the bank's prime interest rate plus 0.25%.
Net cash provided by (used for) operating activities was $(3.2) million, $4.3 million and $(20.6) million in 1999, 2000 and 2001, respectively. In 1999, we paid our remaining obligations to Actel from a 1998 cross licensing agreement. Net income and an increase in accounts payable were the primary sources of operating cashflow in 1999. Net income, offset by an increase in depreciation was the primary source of operating cashflow in 2000. These increases were partially offset by increases in inventories and prepaid expenses. In 2001, our primary use of cash was an operating loss, which was offset by an increase in depreciation, a non-cash writedown of Tower securities, and a decrease in receivables.
Net cash used for investing activities was $3.3 million, $6.7 million, and $22.4 million, respectively. All of this amount in 1999 and 2000 was used for acquisition of property and equipment. In 2001, $7.8 million was used for acquisition of property and equipment. Of the remaining $14.6 million, $14.0 million was used for our investment in Tower.
Net cash provided by financing activities was $33.4 million, $38.0 million, and $1.6 million in 1999, 2000, and 2001, respectiviely. In 1999 and 2000 the primary source of cash was our initial public offering and our follow-on offering. Cash was used to repay bank debt of $1.2 million and $470,000 in 1999 and 2000, respectively. In 2001, the main source of cash was $1.7 million received from the exercise of stock options, which was offset by $100,000 used to repay bank debt.
We require substantial working capital to fund our business, particularly to finance inventories and accounts receivable. Our future capital requirements will depend on many factors, including the rate of sales growth, market acceptance of our existing and new products, the amount and timing of research and development expenditures, the timing of the introduction of new products and expansion of sales and marketing efforts. There can be no assurance that additional equity or debt financing, if required, will be available on satisfactory terms. We believe the net proceeds of our offerings combined with existing capital resources and cash generated from operations will be sufficient to meet our needs for operating cashflow and our commitment to invest in Tower over the next 12 months, although we could seek to raise additional capital during that period. After the next 12 months, our capital and operating requirements will depend on many factors, including the levels at which we maintain inventory and accounts receivable, costs of securing access to adequate manufacturing capacity and increases in our operating expenses.
Inflation
The impact of inflation on our business has not been material for the fiscal years ended December 31, 1999, 2000 and 2001.
Critical Accounting Policies
Our critical accounting policies are as follows:
•revenue recognition;
•estimating accrued liabilities and allowance for doubtful accounts;
•inventory valuation;
•accounting for income taxes; and
•valuation of long-lived and intangible assets and goodwill.
Revenue recognition.
We derive our revenue from two sources: the selling of FPGA's and ESP products, and the sale of software licenses for our design tools. Software sales historically represent less than 2% of our total revenues. In both cases, management judgements and estimates must be made and used in connection with the revenue recognized in any accounting period.
Our FPGAs and ESPs may be programmed by us, our distributors, or the end customers. We sell to our distributors under agreements which, in the case of unprogrammed parts, allow certain rights of return and price adjustments on unsold inventory. Amounts billed to such distributors for shipments are included as accounts receivable, inventory is relieved, and the related revenue and cost of revenue are deferred. Revenue is not recognized until the inventory is resold by the distributor. Revenue for programmed parts, which do not have similar return rights, as well as for all non-distributor customers is recognized upon shipment. We estimate returns and distributor price adjustments and provide reserves against accounts receivable. In all cases, we assess whether or not collection is reasonably assured.
Software revenue is recognized when persuasive evidence of agreement exists, delivery of the software has occurred, no significant obligations with regard to implementation or integration exist, the fee is fixed or determinable and collectibility is probable. Because our software sales typically do not include any undelivered elements, and do not require support or maintenance, revenue from software sales is generally recognized at the time of delivery.
In order to determine whether collection is probable, we assess a number of factors, including past transaction history with the customer and the credit-worthiness of the customer. We do not request collateral from our customers. If we determine that collection is not reasonably assured, we defer the recognition of revenue at the time until collection becomes reasonably assured, which is generally upon receipt of cash.
Estimating accrued liabilities and allowance for doubtful accounts.
The preparation of financial statements requires us to make estimates and assumptions that affect the reported amount of assets and disclosure of contingent assets and liabilities at the date of the financial statements and the reported amounts of revenues and expenses during the reported period. Specifically, we must make estimates of potential future product returns related to current period product revenue. Management analyzes historical returns, current economic trends, and changes in customer demand and acceptance of our products when evaluating the adequacy of returns reserves. Material differences may result in the amount and timing of our revenue for any period if management made different judgments or utilized different estimates. The provision for returns amounted to $306,000 in 2001.
Similarly, our management estimates the collectability of our accounts receivables. Management specifically analyzes accounts receivable and analyzes historical bad debts, customer concentrations, customer credit-worthiness, and current economic trends when evaluating the adequacy of the allowance for doubtful accounts. Our accounts receivable balance was $3.1 million, net of allowance for doubtful accounts of $393,000 as of December 31, 2001.
Inventory valuation.
We value our inventory at the lower of standard cost or net realizable value. Standard cost approximates actual cost on a first-in-first-out basis. We routinely evaluate the levels of our inventory in light of current market conditions and market trends. During 2001, demand for our products declined precipitously and our arrangements with our suppliers caused us to purchase more inventory than we required. During the second quarter of 2001 we established additional reserves for this excess inventory. These reserves are associated with specific inventory items and will be relieved when the specific inventory is scrapped or sold. Market conditions are subject to change and forecast demand always differs from actual demand. Such differences may be material to the financial statements. The lives of our products are unusually long and obsolescence has not been a significant factor in the valuation of our inventories. We also evaluate our inventory in light of its merchantability. Accordingly, we create reserves for inventory returned from our customers that has not been processed for resale and for new products that have not been qualified for shipment to our customers.
Accounting for income taxes.
As part of the process of preparing our consolidated financial statements we are required to estimate our income taxes in each of the jurisdictions in which we operate. This process involves us estimating our actual current tax exposure together with assessing temporary differences resulting from differing treatment of items, such as deferred revenue, for tax and accounting purposes. These differences result in deferred tax assets and liabilities, which are included within our consolidated balance sheet. We must then assess the likelihood that our deferred tax assets will be recovered from future taxable income and to the extent we believe that recovery is not likely, we must establish a valuation allowance. To the extent we establish a valuation allowance or increase this allowance in a period, we must include an expense within the tax provision in the statement of operations.
Significant management judgment is required in determining our provision for income taxes, our deferred tax assets and liabilities and any valuation allowance recorded against our net deferred tax assets. We have recorded a valuation allowance of $30.5 million as of December 31, 2001, due to uncertainties related to our ability to utilize some of our deferred tax assets, primarily consisting of certain net operating losses carried forward and foreign tax credits, before they expire. The valuation allowance is based on our estimates of taxable income by jurisdiction in which we operate and the period over which our deferred tax assets will be recoverable. In the event that actual results differ from these estimates or we adjust these estimates in future periods we may need to establish an additional valuation allowance which could materially impact our financial position and results of operations.
Valuation of long-lived assets and goodwill.
We assess the impairment of identifiable intangibles, long-lived assets and related goodwill whenever events or changes in circumstances indicate that the carrying value may not be recoverable. Factors we consider important which could trigger an impairment review include the following:
•significant underperformance relative to expected historical or projected future operating results;
•significant changes in the manner of our use of the acquired assets or the strategy for our overall business;
•significant negative industry or economic trends;
•significant decline in our stock price for a sustained period; and
•our market capitalization relative to net book value.
When we determine that the carrying value of intangibles, long-lived assets and related goodwill may not be recoverable based upon the existence of one or more of the above indicators of impairment, we measure any impairment based on a projected discounted cash flow method using a discount rate determined by our management to be commensurate with the risk inherent in our current business model. During the third quarter of 2001, QuickLogic wrote down the value of its equity investment in Tower. The Tower shares were purchased at an average price of $12.73 per share. QuickLogic has reduced the carrying value for this asset to $5.60 per share, based on the market price of Tower's common stock at the end of the third quarter, 2001. The total amount of the write-down was $6.8 million. Net intangible assets, long-lived assets, and goodwill amounted to $21.4 million as of December 31, 2001.
Recently Issued Accounting Pronouncements
In July 2001, the Financial Accounting Standards Board ("FASB") issued SFAS No. 141, "Business Combinations." This statement addresses financial accounting and reporting for business combinations. All business combinations in the scope of this statement are to be accounted for using only the purchase method. The provisions of this statement apply to all business combinations initiated after June 30, 2001. As such, we have applied SFAS No. 141 in our acquisition of V3 in August 2001.
Also in July 2001, the FASB issued SFAS No. 142, "Goodwill and Other Intangible Assets." This statement addresses financial accounting and reporting for acquired goodwill and other intangible assets. Under SFAS No. 142, goodwill and indefinite lived intangible assets are no longer amortized but are reviewed annually (or more frequently if impairment indicators arise) for impairment. Separable intangible assets that are not deemed to have an indefinite life will continue to be amortized over their useful lives. We do not believe the application of the goodwill non-amortization provisions of these rules will have any material impact on our financial position and results of operations.
In August 2001, the FASB issued SFAS No. 143, "Accounting for Asset Retirement Obligations." This statement addresses financial accounting and reporting requirements for obligations associated with the retirement of tangible long-lived assets and the associated retirement costs. SFAS No. 143 is effective for fiscal years beginning after June 15, 2002. We do not believe that SFAS No. 143 will have any material affect on our financial position and results of operations.
In October 2001, the FASB issued SFAS No. 144, "Accounting for the Impairment of Long-Lived Assets and for Long-Lived Assets to Be Disposed Of." This statement addresses financial accounting and reporting for the impairment or disposal of long-lived assets. SFAS No. 144 supersedes SFAS No. 121 and the accounting and reporting provisions of the Accounting Principles Board ("APB") Opinion No. 30. SFAS No. 144 is effective for fiscal years beginning after December 15, 2001. We are currently in the process of evaluating the impact that SFAS No. 144 will have on our financial position and results of operations, if any.
Factors Affecting Future Results
Our future operating results are likely to fluctuate and therefore may fail to meet expectations which could cause our stock price to decline
Our operating results have varied widely in the past and are likely to do so in the future. In addition, our operating results may not follow any past trends. Our future operating results will depend on many factors and may fail to meet our expectations for a number of reasons, including those set forth in these risk factors. Any failure to meet expectations could cause our stock price to significantly fluctuate or decline.
Factors that could cause our operating results to fluctuate that relate to our internal operations include:
•the need for continual, rapid new product introductions;
•changes in our product mix;
•our inability to adjust our fixed costs in the face of any declines in sales;
•our ability to integrate existing and acquired operations, including the integration of assets acquired from V3 Semiconductor; and
•successful execution of our strategy to develop and market system-level products for the communications and networking markets.
Factors that could cause our operating results to fluctuate that depend upon our suppliers and customers include:
•the timing of significant product orders, order cancellations and reschedulings;
•the availability of production capacity and fluctuations in the manufacturing yields at the facilities that manufacture our devices; and
•the cost of raw materials and manufacturing services from our suppliers.
Factors that could cause our operating results to fluctuate that are industry risks include:
•intense competitive pricing pressures;
•introductions of or enhancements to our competitors' products; and
•the cyclical nature of the semiconductor industry.
Our day-to-day business decisions are made with these factors in mind. Although certain of these factors are out of our immediate control, unless we can anticipate, and be prepared with contingency plans that respond to these factors, we will be unsuccessful in carrying out our business plan.
We cannot assure you that we will remain profitable because we have a history of losses
We incurred significant losses from our inception in 1988 through 1997, and again in 2001. Our accumulated deficit as of December 31, 2001 was $74.9 million. We had net loss of $26.5 million in 2001. We cannot assure you that we will return to profitability in any future periods, and you should not rely on our historical revenue or our previous profitability as any indication of our future operating results or prospects.
A sale of a substantial number of shares of our common stock may cause the price of our common stock to decline
Upon the completion of V3's bankruptcy proceedings, we expect V3 to distribute the approximately 2.5 million shares issued to V3 in connection with our acquisition of certain assets from V3 to its creditors and stockholders. If, as we expect, the V3 creditors or shareholders sell a substantial number of these shares after the distribution, the market price of our common stock could fall. In addition, if our current stockholders sell substantial amounts of our common stock, including shares issued upon the exercise of outstanding options, the market price of our common stock could fall. Such sales also might make it more difficult for us to sell equity or equity-related securities in the future at a time and price that we deem appropriate.
If we fail to successfully develop, introduce and sell new products, we may be unable to compete effectively in the future
We operate in a highly competitive, quickly changing environment marked by rapid obsolescence of existing products. Our future success depends on our ability to develop, introduce and successfully market new products, including ESPs. We introduced our ESPs in September 1998. To date, we have been selling our ESPs in limited quantities, and we must increase our sales of ESP products or our business will suffer. If any of the following occur, our business will be materially harmed:
•we fail to complete and introduce new product designs in a timely manner;
•we are unable to have these new products manufactured according to design specifications;
•our customers do not successfully introduce new systems or products incorporating our products;
•our sales force and independent distributors do not create adequate demand for our products; or
•market demand for our new products, such as ESPs, does not develop as anticipated.
We have only recently introduced our embedded standard products; therefore, we cannot accurately predict their future level of acceptance by our customers, and we may not be able to generate anticipated revenue from these products
We have only recently started selling embedded standard products. In 2001, ESPs accounted for approximately 29% of our revenue. We do not know the extent to which systems manufacturers will purchase or utilize our ESPs. Since we anticipate that ESPs will become an increasingly larger component of our business, their failure to gain acceptance with our customers would materially harm our business. We cannot assure you that our ESPs will be commercially successful or that these products will result in significant additional revenues or improved operating margins in future periods.
If the market in which we sell our embedded standard products does not grow as we anticipate, it will materially and adversely affect our anticipated revenue
The market for embedded standard products is relatively new and still emerging. If this market does not grow at the rate we anticipate, our business will be materially harmed. One of the reasons that this market might not grow as we anticipate is that many systems manufacturers are not yet fully aware of the benefits provided by embedded standard products, in general, or the benefits of our ESPs, specifically. Additionally, systems manufacturers may use existing technologies other than embedded standard products or yet to be introduced technologies to satisfy their needs. Although we have devoted and intend to continue to devote significant resources promoting market awareness of the benefits of embedded standard products, our efforts may be unsuccessful or insufficient.
We expend substantial resources in developing and selling our products, and we may be unable to generate significant revenue as a result of these efforts
To establish market acceptance of our products, we must dedicate significant resources to research and development, production and sales and marketing. We experience a long delay between the time when we expend these resources and the time when we begin to generate revenue, if any, from these expenditures. Typically, this delay is one year or more. We record as expenses the costs related to the development of new semiconductor products and software as these expenses are incurred. As a result, our profitability from quarter to quarter and from year to year may be materially and adversely affected by the number and timing of our new product introductions in any period and the level of acceptance gained by these products.
Our customers may cancel or change their product plans after we have expended substantial time and resources in the design of their products
If one of our potential customers cancels, reduces or delays product orders from us or chooses not to release equipment that incorporates our products after we have spent substantial time and resources in designing a product, our business could be materially harmed. Our customers often evaluate our products for six to twelve months or more before designing them into their systems, and they may not commence volume shipments for up to an additional six to twelve months, if at all. During this lengthy sales cycle, our potential customers may also cancel or change their product plans. Even when customers incorporate one or more of our products into their systems, they may ultimately discontinue the shipment of their systems that incorporate our products. Customers whose products achieve high volume production may choose to replace our products with lower cost customized semiconductors.
We will be unable to compete effectively if we fail to anticipate product opportunities based upon emerging technologies and standards and fail to develop products that incorporate these technologies and standards
We may spend significant time and money on research and development to design and develop products around an emerging technology or industry standard. To date, we have introduced only one product family, QuickPCI, that is designed to support a specific industry standard. If an emerging technology or industry standard that we have identified fails to achieve broad market acceptance in our target markets, we may be unable to generate significant revenue from our research and development efforts. Moreover, even if we are able to develop products using adopted standards, our products may not be accepted in our target markets. As a result, our business would be materially harmed.
We have limited experience in designing and developing products that support industry standards. If systems manufacturers move away from the use of industry standards that we support with our products and adopt alternative standards, we may be unable to design and develop new products that conform to these new standards. The expertise required is unique to each industry standard, and we would have to either hire individuals with the required expertise or acquire such expertise through a licensing arrangement or by other means. The demand for individuals with the necessary expertise to develop a product relating to a particular industry standard is generally high, and we may not be able to hire such individuals. The cost to acquire such expertise through licensing or other means may be high and such arrangements may not be possible in a timely manner, if at all.
We may encounter periods of industry-wide semiconductor oversupply, resulting in pricing pressure and underutilization of manufacturing capacity, as well as undersupply, resulting in a risk that we could be unable to fulfill our customers' requirements
The semiconductor industry has historically been characterized by wide fluctuations in the demand for, and supply of, its products. These fluctuations have resulted in circumstances when supply and demand for the industry's products have been widely out of balance. Our operating results may be materially harmed by industry-wide semiconductor oversupply, which could result in severe pricing pressure and underutilization of our manufacturing capacity. In a market with undersupply, we would have to compete with larger foundry customers for limited manufacturing capacity. In such an environment, we may be unable to have our products manufactured in a timely manner or in quantities necessary to meet our requirements. Since we outsource all of our manufacturing, we are particularly vulnerable to such supply shortages. As a result, we may be unable to fulfill orders and may lose customers. Any future industry-wide oversupply or undersupply of semiconductors would materially harm our business.
None of our products is currently manufactured by more than one manufacturer, which exposes us to the risk of having to identify and qualify one or more substitute suppliers
We depend upon independent third parties to manufacture, assemble and test our semiconductor products. None of our products is currently manufactured by more than one manufacturer. We have contractual arrangements with two of our three foundry manufacturers of semiconductors, Tower and Cypress, to provide us with specified manufacturing capacity. The Tower facility is not yet operational. We purchase product from TSMC on a purchase order basis. Our assembly and test work is also done on a purchase order basis. If we are unable to secure adequate manufacturing capacity from Tower, TSMC, Cypress or other suppliers to meet our supply requirements, our business will be materially harmed.
Processes used to manufacture our products are complex, customized to our specifications and can only be performed by a limited number of manufacturing facilities. If our current manufacturing suppliers are unable or unwilling to provide us with adequate manufacturing capacity, we would have to identify and qualify one or more substitute suppliers for a substantial majority of our products. Our manufacturers may experience unanticipated events, like the September 1999 Taiwan earthquake, that could inhibit their abilities to provide us with adequate manufacturing capacity on a timely basis, or at all. Introducing new products or transferring existing products to a new third party manufacturer would require significant development time to adapt our designs to their manufacturing processes and could cause product shipment delays. In addition, the costs associated with manufacturing our products may increase if we are required to use a new third party manufacturer. If we fail to satisfy our manufacturing requirements, our business would be materially harmed.
If we fail to adequately forecast demand for our products, we may incur product shortages or excess product inventory.
Our agreements with third-party manufacturers require us to provide forecasts of our anticipated manufacturing orders, and place binding manufacturing orders in advance of receiving purchase orders from our customers. This may result in product shortages or excess product inventory because we are not permitted to increase or decrease our rolling forecasts under such agreements. Obtaining additional supply in the face of product shortages may be costly or not possible, especially in the short term. Our failure to adequately forecast demand for our products would materially harm our business.
Fluctuations in our product yields, especially our new products, may increase the costs of our manufacturing process.
Difficulties in the complex semiconductor manufacturing process can render a substantial percentage of semiconductor wafers nonfunctional. We have, in the past, experienced manufacturing runs that have contained substantially reduced or no functioning devices. Varying degrees of these yield reductions occur frequently in our manufacturing process. These yield reductions, which can occur without warning, may result in substantially higher manufacturing costs and inventory shortages to us. We may experience yield problems in the future which may materially harm our business. In addition, yield problems may take a significant period of time to analyze and correct. Our reliance on third party suppliers may extend the period of time required to analyze and correct these problems. As a result, if we are unable to respond rapidly to market demand, our business would suffer.
Yield reductions frequently occur in connection with the manufacture of newly introduced products. Newly introduced products, such as our Eclipse family of FPGAs, are often more complex and more difficult to produce, increasing the risk of manufacturing-related defects. While we test our products, these products may still contain errors or defects that we find only after we have commenced commercial production. Our customers may not place new orders for our products if the products have reliability problems, which would materially harm our business.
We may be unable to grow our business if the markets in which our customers sell their products do not grow
Our success depends in large part on the continued growth of various markets that use our products. Any decline in the demand for our products in the following markets could materially harm our business:
•telecommunications and data communications;
•video/audio, graphics and imaging;
•instrumentation and test;
•high-performance computing; or
•military systems.
Slower growth in any of the other markets in which our products are sold may also materially harm our business. Many of these markets are characterized by rapid technological change and intense competition. As a result, systems sold by our customers that use our products may face severe price competition, become obsolete over a short time period, or fail to gain market acceptance. Any of these occurrences would materially harm our business.
In order to remain profitable, we will need to offset the general pattern of declines and fluctuations in the prices of our products
The average selling prices of our products historically have declined during the products' lives by, on average, approximately 7% per year, and we expect this trend to continue. If we are unable to achieve cost reductions, increase unit demand or introduce new higher-margin products in a timely manner to offset these price declines, our business would be materially harmed.
In addition, the selling prices for our products fluctuate significantly with real and perceived changes in the balance of supply and demand for our products and comparable products. The growth in the worldwide supply of FPGA's in recent periods has added to the decrease in the average selling prices for our products. In addition, we expect our competitors to invest in new manufacturing process technologies and achieve significant manufacturing yield improvements in the future. These developments could increase the worldwide supply of FPGA's and alternate products and create additional downward pressure on pricing. If the worldwide supply of FPGA's grows faster than the demand for such products in the future, the price for which we can sell such products may decline, which would materially harm our business.
We depend upon third party distributors to market and sell our products, and they may discontinue sale of our products, fail to give our products priority or be unable to successfully market, sell and support our products
We employ independent, third-party distributors to market and sell a significant portion of our products. During 2001, approximately 74% of our sales were made through our distributors. Two distributors together accounted for approximately 35% of our sales. Although we have contracts with our distributors, any of them may terminate their relationship with us on short notice. The loss of one or more of our principal distributors, or our inability to attract new distributors, could materially harm our business. We may lose distributors in the future and we may be unable to recruit additional or replacement distributors. As a result, our future performance will depend in part on our ability to retain our existing distributors and attract new distributors that will be able to market, sell and support our products effectively.
Many of our distributors, including our principal distributors, market and sell products for other companies, and many of these products may compete directly or indirectly with our products. We generally are not one of the principal suppliers of products to our distributors. If our distributors give higher priority or greater attention to the products of other companies, including products that compete with our products, our business would be materially harmed.
We may be unable to accurately predict quarterly results if distributors are inaccurate or untimely in providing us with their resale reports, which could adversely affect the trading price of our stock
Since we generally recognize revenue from sales to our distributors only when these distributors make sales to customers, we are highly dependent on the accuracy and timeliness of their resale reports. Inaccurate resale reports contribute to our difficulty in predicting and reporting our quarterly revenue and results of operations, particularly in the last month of the quarter. If we fail to accurately predict our revenue and results of operations on a quarterly basis, our stock price could materially fluctuate. Distributors occasionally increase their inventories of our products in anticipation of growth in the demand for our products. If this growth does not occur, distributors will decrease their orders for our products in subsequent periods, and our business would be materially harmed.
Customers may cancel or defer significant purchase orders or our distributors may return our products, which would cause our inventory levels to increase and our revenues to decline
We sell our products on a purchase order basis through our distributors and direct sales channels, and our distributors or customers may cancel purchase orders at any time with little or no penalty. In addition, our distributor agreements generally permit our distributors to return unprogrammed products to us. Contractually, our distributors are permitted to return up to 10%, by value, of the products they purchase from us every six months. If our customers cancel or defer significant purchase orders or our distributors return our products, our inventories would increase, which would materially harm our business.
Many systems manufacturers may be unwilling to switch to our products because of their familiarity with the products offered by our direct competitors such as Xilinx and Altera, which dominate the programmable logic market
The semiconductor industry is intensely competitive and characterized by:
•erosion of selling prices over product lives;
•rapid technological change;
•short product life cycles; and
•strong domestic and foreign competition.
If we are not able to compete successfully in this, environment, our business will be materially harmed. A primary cause of this highly competitive environment is the strengths of our competitors. Our industry consists of major domestic and international semiconductor companies, many of which have substantially greater financial, technical, marketing, distribution and other resources than we do. Our current direct competitors include suppliers of complex programmable logic devices and field programmable gate arrays, such as Xilinx, Altera, Actel, and Lattice Semiconductor. Xilinx and Altera together have a majority share of the programmable logic market. Many systems manufacturers may be unwilling or unable to switch to our products due to their familiarity with competitors' products or other inhibiting factors.
We also face competition from companies that offer ASICs, which may be obtained at lower costs for higher volumes and typically have greater logic capacity, additional features and higher performance
than those of our products. We may also face competition from suppliers of products based on new or emerging technologies, including ESPs. Our inability to successfully compete in any of the following areas could materially harm our business:
•the development of new products and manufacturing technologies;
•the quality and price of products and devices;
•the diversity of product lines; or
•the cost effectiveness of design, development, manufacturing and marketing efforts.
We may be unable to successfully grow our business if we fail to compete effectively with others to attract and retain key personnel
We believe our future success will depend upon our ability to attract and retain engineers and other highly skilled personnel. Our employees are at-will and not subject to employment contracts. Hiring qualified sales and technical personnel will be difficult due to the limited number of qualified professionals. Competition for these types of employees is intense. We have in the past experienced difficulty in recruiting and retaining qualified sales and technical personnel. In 2001, our Vice President of Sales, Michael Brown, resigned. Failure to attract and retain personnel, particularly sales and technical personnel, would materially harm our business.
We may be unable to adequately protect our intellectual property rights, and may face significant expenses as a result of future litigation
Protection of intellectual property rights is crucial to our business, since that is how we keep others from copying the innovations which are central to our existing and future products. From time to time, we receive letters alleging patent infringement or inviting us to take a license to other parties' patents. We evaluate these letters on a case-by-case basis. In September 1999, we received an offer to license a patent related to field programmable gate array architecture. We have not yet determined whether this license would be necessary or useful, or whether a license would be obtainable at a reasonable price. Offers such as these may lead to litigation if we reject the opportunity to obtain the license. We have in the past and may again become involved in litigation relating to alleged infringement by us of others' patents or other intellectual property rights. This kind of litigation is expensive and consumes large amounts of management's time and attention. For example, we incurred substantial costs associated with the litigation and settlement of our dispute with Actel, which materially harmed our business. In addition, if the September 1999 letter or other similar matters result in litigation that we lose, a court could order us to pay substantial damages and/or royalties, and prohibit us from making, using, selling or importing essential technologies. For these and other reasons, this kind of litigation would materially harm our business. Also, although we may seek to obtain a license under a third party's intellectual property rights in order to bring an end to certain claims or actions asserted against us, we may not be able to obtain such a license on reasonable terms or at all.
We have entered into technology license agreements with third parties which give those parties the right to use patents and other technology developed by us, and which give us the right to use patents and other technology developed by them. We anticipate that we will continue to enter into these kinds of licensing arrangements in the future; however, it is possible that desirable licenses will not be available to us on commercially reasonable terms. If we lose existing licenses to key technology, or are unable to enter into new licenses which we deem important, it could materially harm our business.
Because it is critical to our success that we are able to prevent competitors from copying our innovations, we intend to continue to seek patent and trade secret protection for our products. The process of seeking patent protection can be long and expensive, and we cannot be certain that any currently pending or future applications will actually result in issued patents, or that, even if patents are
issued, they will be of sufficient scope or strength to provide meaningful protection or any commercial advantage to us. Furthermore, others may develop technologies that are similar or superior to our technology or design around the patents we own. We also rely on trade secret protection for our technology, in part through confidentiality agreements with our employees, consultants and third parties. However, employees may breach these agreements, and we may not have adequate remedies for any breach. In any case, others may come to know about or determine our trade secrets through a variety of methods. In addition, the laws of certain territories in which we develop, manufacture or sell our products may not protect our intellectual property rights to the same extent as do the laws of the United States.
Problems associated with international business operations could affect our ability to manufacture and sell our products
Most of our products are manufactured outside of the United States at manufacturing facilities operated by our suppliers in Taiwan, South Korea and the Philippines. As a result, our manufacturing operations are subject to risks of political instability, including the risk of conflict between Taiwan and the People's Republic of China and conflict between North Korea and South Korea. Moreover, the majority of available manufacturing capacity for our products is located in Taiwan and South Korea.
Sales to customers located outside the United States accounted for 48%, 35% and 41% of our total sales in 1999, 2000 and 2001, respectively. We anticipate that sales to customers located outside the United States will continue to represent a significant portion of our total sales in future periods and the trend of foreign customers accounting for an increasing portion of our total sales may continue. In addition, most of our domestic customers sell their products outside of North America, thereby indirectly exposing us to risks associated with foreign commerce. Asian economic instability could also materially and adversely affect our business, particularly to the extent that this instability impacts the sales of products manufactured by our customers. Accordingly, our operations and revenues are subject to a number of risks associated with foreign commerce, including the following:
•managing foreign distributors;
•staffing and managing foreign branch offices;
•political and economic instability;
•foreign currency exchange fluctuations;
•changes in tax laws, tariffs and freight rates;
•timing and availability of export licenses;
•inadequate protection of intellectual property rights in some countries; and
•obtaining governmental approvals for certain products.
In the past we have denominated sales of our products in foreign countries exclusively in U.S. dollars. As a result, any increase in the value of the U.S. dollar relative to the local currency of a foreign country will increase the price of our products in that country so that our products become relatively more expensive to customers in the local currency of that foreign country. As a result, sales of our products in that foreign country may decline. To the extent any such risks materialize, our business would be materially harmed.
Our principal stockholders have significant voting power and may vote for actions that may not be in the best interests of our stockholders
Our officers, directors and principal stockholders together control approximately 39% of our outstanding common stock. As a result, these stockholders, if they act together, will be able to
significantly influence the management and affairs of QuickLogic and all matters requiring stockholder approval, including the election of directors and approval of significant corporate transactions. This concentration of ownership may have the effect of delaying or preventing a change in control and might affect the market price of our common stock. This concentration of ownership may not be in the best interest of our other stockholders.
Our certificate of incorporation, bylaws, Shareholder Rights Plan, and Delaware law contain provisions that could discourage a takeover
Our basic corporate documents and Delaware law contain provisions that might enable our management to resist a takeover. These provisions might discourage, delay or prevent a change in the control of QuickLogic or a change in our management. Our certificate of incorporation provides that we will have a classified Board of Directors, with each class of directors subject to re-election every three years. This classified board when implemented will have the effect of making it more difficult for third parties to insert their representatives on our board of directors and gain control of QuickLogic. These provisions could also discourage proxy contests and make it more difficult for you and other stockholders to elect directors and take other corporate actions. The existence of these provisions could limit the price that investors might be willing to pay in the future for shares of the common stock.
We adopted a Shareholder Rights Plan in 2001. The plan provides that our board of directors may, without further action by the stockholders, issue shares of preferred stock in one or more series and fix the rights, preferences, privileges and restrictions thereof. The issuance of preferred stock could adversely affect the voting power of holders of common stock and the likelihood that such holders will receive dividend payments and payments upon liquidation. In addition, the issuance of preferred stock could have the effect of delaying, deferring or preventing a change in control of QuickLogic.
Our common stock has only been publicly traded for a short time, and we expect the price of our common stock will fluctuate substantially
Prior to our initial public offering on October 15, 1999, there was no public market for shares of our common stock. The market price for our common stock may be affected by a number of factors, including:
•the announcement of new products or product enhancements by us or our competitors;
•quarterly variations in our or our competitors' results of operations;
•changes in earnings estimates or recommendations by securities analysts;
•developments in our industry; and
•general market conditions and other factors, including factors unrelated to our operating performance or the operating performance of our competitors.
In addition, stock prices for many companies in the technology and emerging growth sectors have experienced wide fluctuations that have often been unrelated to the operating performance of such companies. Such factors and fluctuations may materially and adversely affect the market price of our common stock.
If our share price falls further, we could be delisted from the Nasdaq National Market
The minimum per share bid price required under market place Rule 4450(a)(5) to maintain a listing on the Nasdaq National Market is $1.00. Our common stock traded as low as $3.25 during 2001. A delisting could impair our ability to raise additional working capital. If we are able to raise additional capital, the terms may not be favorable and your investment may be diluted. Furthermore, because prices for delisted stock are often not publicly available, a delisting would impair the liquidity of our
common stock and make it difficult for you to sell your shares, and you may lose some or all of your investment.
ITEM 7A.
ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK
Interest Rate Risk
We do not use derivative financial instruments in our investment portfolio. Our investment portfolio is generally comprised of commercial paper. We place investments in instruments that meet high credit quality standards. These securities are subject to interest rate risk, and could decline in value if interest rates fluctuate. Due to the short duration and conservative nature of our investment portfolio, we do not expect any material loss with respect to our investment portfolio. A 10% move in interest rates as of December 31, 2001 would have an immaterial effect on our pretax earnings and the carrying value of its investments over the next fiscal year.
Foreign Currency Exchange Rate Risk
All of the Company's sales and cost of manufacturing are transacted in U.S. dollars. In late 2001, we began to conduct research and development in Canada and India. We also have sales and marketing activities outside the United States. These costs are incurred in local currency. If these local currencies strengthen against the dollar, our payroll and other local expenses will be higher than we currently anticipate. Since our sales are transacted in dollars, these negative impacts on expenses would not be offset by any positive effects on revenue. In 2001, research and development expenses denominated in foreign currencies were approximately 6% of our total research and development expenses. We expect that approximately 25% of our research and development expenses and approximately 14% of our selling, general and administrative expenses will be denominated in foreign currencies in 2002.
ITEM 8.
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA
INDEX TO CONSOLIDATED FINANCIAL STATEMENTS
REPORT OF INDEPENDENT ACCOUNTANTS
To the Board of Directors and Stockholders of
QuickLogic Corporation
In our opinion, the accompanying consolidated balance sheets and the related consolidated statements of operations, of stockholders' equity and of cash flows present fairly, in all material respects, the financial position of QuickLogic Corporation and its subsidiaries at December 31, 2000 and 2001, and the results of their operations and their cash flows for each of the three years in the period ended December 31, 2001, in conformity with accounting principles generally accepted in the United States of America. In addition, in our opinion, the consolidated financial statement schedule listed under item 14(a)2 presents fairly, in all material respects, the information set forth therein when read in conjunction with the related consolidated financial statements. These financial statements and financial statement schedule are the responsibility of the Company's management; our responsibility is to express an opinion on these financial statements and financial statement schedule based on our audits. We conducted our audits of these statements in accordance with auditing standards generally accepted in the United States of America, which require that we plan and perform the audit to obtain reasonable assurance about whether the financial statements are free of material misstatement. An audit includes examining, on a test basis, evidence supporting the amounts and disclosures in the financial statements, assessing the accounting principles used and significant estimates made by management, and evaluating the overall financial statement presentation. We believe that our audits provide a reasonable basis for our opinion.
PricewaterhouseCoopers LLP
San Jose, California
January 23, 2002.
QUICKLOGIC CORPORATION
CONSOLIDATED BALANCE SHEETS
(In thousands, except par value amount)
The accompanying notes form an integral part of these Consolidated Financial Statements
QUICKLOGIC CORPORATION
CONSOLIDATED STATEMENTS OF OPERATIONS
(In thousands, except per share amounts)
The accompanying notes form an integral part of these Consolidated Financial Statements
QUICKLOGIC CORPORATION
CONSOLIDATED STATEMENTS OF STOCKHOLDERS' EQUITY
(In thousands)
QUICKLOGIC CORPORATION
CONSOLIDATED STATEMENTS OF CASH FLOWS
(In thousands)
The accompanying notes form an integral part of these Consolidated Financial Statements
QUICKLOGIC CORPORATION
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS
NOTE 1-THE COMPANY AND BASIS OF PRESENTATION
QuickLogic Corporation, founded in 1988, operates in a single industry segment where it designs, develops, markets and supports advanced field programmable gate array semiconductors ("FPGAs"), embedded standard products ("ESPs") and associated software tools.
The company's fiscal year ends on the Sunday closest to December 31. For presentation purposes, the financial statements and notes have been presented as ending on the last day of the calendar month.
Principles of Consolidation
The consolidated financial statements include the accounts of QuickLogic Corporation and its wholly-owned subsidiaries, QuickLogic International, Inc., QuickLogic Canada Company, QuickLogic Kabushiki Kaisha, QuickLogic (India) Private Limited, and QuickLogic GmbH. All significant intercompany accounts and transactions are eliminated in consolidation.
Uses of Estimates
The preparation of these financial statements in conformity with generally accepted accounting principles requires management to make estimates and assumptions that affect the reported amounts of assets and liabilities and disclosure of contingent assets and liabilities as of the date of the financial statements and the reported amounts of revenues and expenses during the reporting period. Actual results could vary from those estimates, particularly in relation to sales returns and allowances, and product obsolescence.
NOTE 2-SIGNIFICANT ACCOUNTING POLICIES
Cash Equivalents and Short-Term Investments
All highly-liquid investments purchased with a remaining maturity of three months or less are considered cash equivalents.
Fair Value of Financial Instruments
The estimated fair value of financial instruments, are determined by using available market information and appropriate valuation methodologies. However, considerable judgment is required to interpret and analyze the available data and to develop estimates. Accordingly, estimates could differ significantly from the amounts we would realize in a current market exchange. The estimated fair value of all financial instruments at December 31, 1999, 2000 and 2001, approximate the amounts presented in the balance sheets, due primarily to the short-term nature of these instruments.
Foreign Currency Transactions
All of the Company's sales and cost of manufacturing are transacted in U.S. dollars. In late 2001, QuickLogic began to conduct research and development in Canada and India. The company also has sales and marketing activities outside the United States. These costs are incurred in local currency. Foreign currency transaction gains and losses are included in income as they occur. The effect of foreign currency exchange rate fluctuations has not been significant to date. In 2001, research and development expenses denominated in foreign currencies were 6% of our total research and development expenses. The company does not use derivative financial instruments.
Inventory
Inventory is stated at the lower of cost or market, cost being determined under the first-in, first-out method. The Company routinely evaluates its inventory levels in light of current market conditions and market trends, which are always subject to change. When necessary, we create reserves to account for these changes. The lives of the Company's semiconductor products are unusually long and obsolescence has not been a significant factor in the valuation of inventories.
Property and Equipment
Property and equipment are stated at cost less accumulated depreciation. Depreciation is calculated on a straight-line basis over the asset's estimated useful life of two to seven years. Amortization of leasehold improvements is computed on a straight-line basis over the shorter of the facility lease term or the estimated useful lives of the improvements.
Long-lived Assets
The company reviews the impairment of long-lived assets whenever events, changes in circumstances, or changes in market condition indicate that the carrying amount of an asset may not be recoverable. An impairment loss would be recognized when estimated future cash flows expected to result from the use of the asset and its eventual disposition is less than its carrying amount.
Revenue Recognition
QuickLogic's FPGAs and ESPs may be programmed by the company, the distributor or the end customer. QuickLogic sells to certain distributors under agreements which, in the case of unprogrammed parts, allow certain rights of return and price adjustments on unsold inventory. Amounts billed to such distributors for shipments are included as accounts receivable, inventory is relieved, and the related revenue and cost of revenue are deferred and the resultant gross profit is recorded as a current liability, "deferred income on shipments to distributors", until the inventory is resold by the distributor. Revenue for programmed parts, which do not have similar return rights, as well as for all non-distributor customers is recognized upon shipment. Reserves for estimated returns and distributor price adjustments are provided against accounts receivable. Software revenue from sales of design tool kits is recognized when persuasive evidence of an agreement exists, delivery of the software has occurred, no significant Company obligations with regard to implementation or integration exist, the fee is fixed or determinable and collectibility is probable. Software revenues typically amount to less than 2% of total revenues. In 2001, software revenues were less than 1% of total revenues.
Stock-Based Compensation
The company has elected to measure stock-based compensation costs using the intrinsic value method prescribed by the Accounting Principles Board ("APB") Opinion No. 25, "Accounting for Stock Issued to Employees" and to comply with the pro forma disclosure requirements of Statement of Financial Accounting Standards ("SFAS") No. 123, "Accounting for Stock-Based Compensation."
Concentration of Credit Risk
Financial instruments which potentially subject the company to concentrations of credit risk consist principally of cash and cash equivalents and accounts receivable. Cash and cash equivalents are maintained with high quality institutions. The company's accounts receivable are derived primarily from sales to customers located in North America, Europe, Japan and Korea. QuickLogic performs ongoing
credit evaluations of its customers and generally does not require collateral. Bad debt write-offs to date have been immaterial.
At December 31, 2001, our top three customers were distributors of our products. They accounted for the following percentages of our accounts receivable as of periods presented:
Software Development Costs
Software development costs incurred prior to the establishment of technological feasibility are included in research and development and are expensed as incurred. Development costs incurred subsequent to the establishment of technological feasibility through the period of general market availability are capitalized, if material. To date, all software development costs have been expensed as incurred due to the insignificant development costs incurred during the short time period between the establishment of technological feasibility and general availability.
Other Comprehensive Income (Loss)
Effective January 1, 1998, the company adopted the provisions of SFAS No. 130, "Reporting Comprehensive Income" ("SFAS 130"). SFAS 130 establishes standards for reporting comprehensive income (loss) and its components in financial statements. Comprehensive income (loss) as defined, includes all changes in equity (net assets) during a period from nonowner sources. No items were included in other comprehensive income (loss) during 1999, 2000 and 2001.
New Accounting Pronouncements
In July 2001, the Financial Accounting Standards Board ("FASB") issued SFAS No. 141, "Business Combinations." This statement addresses financial accounting and reporting for business combinations. All business combinations in the scope of this statement are to be accounted for using only the purchase method. The provisions of this statement apply to all business combinations initiated after June 30, 2001. As such, the Company has applied SFAS No. 141 in its acquisition of V3 in August 2001.
Also in July 2001, the FASB issued SFAS No. 142, "Goodwill and Other Intangible Assets." This statement addresses financial accounting and reporting for acquired goodwill and other intangible assets. Under SFAS No. 142, goodwill and indefinite lived intangible assets are no longer amortized but are reviewed annually (or more frequently if impairment indicators arise) for impairment. Separable intangible assets that are not deemed to have an indefinite life will continue to be amortized over their useful lives. The Company does not believe the application of the goodwill non-amortization provisions of these rules will have any material impact on its financial position and results of operations.
In August 2001, the FASB issued SFAS No. 143, "Accounting for Asset Retirement Obligations." This statement addresses financial accounting and reporting requirements for obligations associated with the retirement of tangible long-lived assets and the associated retirement costs. SFAS No. 143 is
effective for fiscal years beginning after June 15, 2002. The Company does not believe that the adoption of SFAS No. 143 will have any material impact on its financial position and results of operations.
In October 2001, the FASB issued SFAS No. 144, "Accounting for the Impairment of Long-Lived Assets and for Long-Lived Assets to Be Disposed Of." This statement addresses financial accounting and reporting for the impairment or disposal of long-lived assets. SFAS No. 144 supersedes SFAS No. 121 and the accounting and reporting provisions of the Accounting Principles Board ("APB") Opinion No. 30. SFAS No. 144 is effective for fiscal years beginning after December 15, 2001. The Company is currently in the process of evaluating the impact that SFAS No. 144 will have on its financial position and results of operations, if any.
NOTE 3-NET INCOME PER SHARE
Basic earnings per share ("EPS") is computed by dividing net income available to common stockholders (numerator) by the weighted average number of common shares outstanding (denominator) during the period. Diluted EPS is computed using the weighted average number of common shares and dilutive potential common shares outstanding during the period. In computing diluted EPS, the average stock price for the period is used in determining the number of shares assumed to be purchased from the exercise of stock options. A reconciliation of the numerators and denominators of the basic and diluted per share computations is as follows (in thousands, except per share amounts):
For fiscal years 1999 and 2000, all potential common shares have been included in the calculation of diluted EPS. In 2001, there were 804,000 potential common shares determined to be antidilutive and they have been excluded from the calculation of diluted EPS.
NOTE 4-BALANCE SHEET COMPONENTS
NOTE 5-LONG-TERM OBLIGATIONS
Notes Payable to Bank
At December 31, 2000 and 2001, QuickLogic had outstanding bank installment notes totaling $142,000 and $42,000, respectively. The notes bear interest at prime plus 0.25% (5.25% as of December 31, 2001), and are secured by the specific equipment financed. Principal payments are due in equal monthly installments over the term of the notes which mature in 2002. At December 31, 2001, the company was in compliance with the loans covenants.
Deferred Compensation Plan
During fiscal year 2000, the Company established a non-qualified deferred compensation plan that covers executives and certain other key employees. This non-qualified plan is funded entirely by participants through voluntary deferrals of compensation. Income deferrals made by participants under this plan are deposited into a common trust account. The participants are allowed to diversify the assets, and the deferred compensation obligation is adjusted to reflect gains or losses on the assets in the trust. The assets are classified as trading assets and are reported as other assets. The related obligations are recorded as long-term obligations on the balance sheet. At December 31, 2000 and 2001, the liability accrued under the Company's Deferred Compensation Plan was $308,000 and $647,000, respectively. Total compensation expense, net of gains and losses on the trust assets, was $308,000 and $339,000 in fiscal 2000 and 2001, respectively.
Prepaid Royalty
In October 2000, we entered into a technology license agreement with Aeroflex UTMC. Under the terms of the technology agreement, we received $750,000 of prepaid royalty from Aeroflex UTMC which will be recognized as revenue when products with the licensed technology are sold by Aeroflex UTMC. Aeroflex UTMC had not made any royalty-bearing shipments through December 31, 2001, and accordingly, no royalty income has been recognized.
NOTE 6-INCOME TAXES
No provision for federal or state income taxes has been recorded for the years ended December 31, 1999, 2000 and 2001, as the Company had the ability to utilize federal and state net operating loss carryforwards.
A rate reconciliation between income tax provisions at the US federal statutory rate and the effective rate reflected in the Consolidated Statement of Operations is as follows:
The Company did not have any significant foreign tax liability during the periods presented.
Deferred tax balances are comprised of the following:
Management believes that, based on a number of factors, the available objective evidence creates sufficient uncertainty regarding the realizability of the deferred tax assets such that a full valuation allowance has been recorded. These factors include the Company's history of losses, the fact that the market in which the Company competes is intensely competitive and characterized by rapidly changing technology, the lack of carryback capacity to realize deferred tax assets, and the uncertainty regarding market acceptance of the Company's products. The Company will continue to assess the realizability of the deferred tax assets in future periods.
At December 31, 2001, the Company had net operating loss carryforwards for federal and state income tax purposes of approximately $49 million and $12 million, respectively. These carryforwards, if not utilized to offset future taxable income and income taxes payable, will expire in the years 2002 through 2021.
Under the Tax Reform Act of 1986, the amount of and the benefit from net operating losses that can be carried forward may be impaired in certain circumstances. Events which may cause changes in the Company's tax carryovers include, but are not limited to, a cumulative ownership change of more than 50% over the three year period. Since inception, the Company believes cumulative changes in ownership have invoked the loss carryforward deduction limitation under IRC Section 382. However, the Company believes that such limitations will not have a material effect on the future utilization of the losses.
NOTE 7-STOCKHOLDERS' EQUITY
Convertible Preferred Stock
At December 31, 1998, the Company had 9,912,000 shares of Series A, B, C, D, E and F preferred stock outstanding. The holders of the outstanding Series A, B, C, D, E and F preferred stock were entitled to certain dividend and liquidation preference rights. No dividends were declared or paid related to preferred stock. Each share of preferred stock was convertible at the option of the holder, or upon the Company's completion of a qualifying public offering of common stock. Upon completion of the Company's initial public offering on October 15, 1999, each share of Series A, B, C, D, E and F preferred stock was converted into one share of the Company's common stock.
Common Stock
The Company was originally incorporated in California in April 1988. In October 1999 the Company reincorporated in Delaware and, in conjunction with that reincorporation, effected a 1-for-6 stock split (the "Reverse Stock Split") of its stock. All references to the number of shares of common stock and per share amounts have been retroactively restated in the accompanying financial statements to reflect the effect of the Reverse Stock Split. The Board of Directors also approved a recapitalization that authorized 100 million shares of common stock and ten million shares of undesignated preferred stock.
The Company completed an initial public offering of its common stock on October 15, 1999. The underwriters' over-allotment option was exercised and QuickLogic sold a total of 3,770,635 common shares at $10.00 per share. Proceeds, net of underwriting discounts and commissions and related offering expenses, of $33.9 million were received.
The Company completed a public offering of its common stock on April 12, 2000. The underwriters' over-allotment option was exercised and QuickLogic sold a total of 1,629,269 common shares at $23.50 per share. Proceeds, net of underwriting discounts and commissions and related offering expenses, of $35.5 million were received.
Employee Stock Option Plans
1989 Stock Option Plan
In July 1996, the 1989 Stock Option Plan (the "1989 Plan") was amended to allow options to be exercised prior to vesting. Unvested shares are deposited to an escrow agent and the Company has a right to repurchase unvested shares at the original issuance price if the employee is terminated prior to the lapsing of the Company's repurchase right. In April 1999, an additional 1,333,000 shares were authorized for issuance. The 1989 Plan provides for the issuance of incentive and nonqualified options for the purchase of up to 4,617,000 shares of Common Stock. Options may be granted to employees, directors and consultants to the Company. The fair value of the Company's common stock was determined by the Board of Directors considering operating results, current legal developments, product life cycle, general market conditions, independent valuations and other relevant factors. Options granted under the 1989 Plan may have a term of up to 10 years. Options typically vest at a rate of 25% of the total grant per year over a four-year period. However, the Company may, at its discretion implement a different vesting schedule with respect to any new stock option grant. In September 1999, the Company adopted the 1999 Stock Option Plan and all subsequent stock option grants are made under this later plan.
1999 Stock Option Plan
The 1999 Stock Plan (the "1999 Plan") was adopted by the Board of Directors in August 1999 and was approved by the stockholders in September 1999. The total number of shares of common stock reserved for issuance under this plan was 5,000,000 shares of common stock. In addition, commencing January 2000, an annual increase will be added to the 1999 stock plan equal to the lesser of 5,000,000 shares or 5% of the outstanding shares on such date. Options granted under the 1999 Plan may have a term of up to 10 years. Options typically vest at a rate of 25% of total grants per year over a four-year period. However, the Company may, at its discretion, implement a different vesting schedule with respect to any new stock option grant.
The following table summarizes all of our stock option activity under the 1989 Plan and the 1999 Plan and related weighted average exercise price for the years ended December 31, 1999, 2000 and 2001:
As of December 31, 2001, 2,976,029 shares were available for grant, and options to purchase 2,502,688 shares were vested. At December 31, 1999 and 2000, options to purchase 2,834,000 and 3,122,000 shares, respectively, were vested.
Related weighted average exercise price and contractual life information at December 31, 2001 are as follows:
The weighted average estimated grant date fair values, as defined by SFAS 123, for options granted during 1999, 2000 and 2001 was $3.80, $9.79 and $2.96 per option, respectively. The fair value of each option grant is estimated on the date of grant using the Black-Scholes option pricing model. The Black-Scholes model, as well as other currently accepted option valuation models, was developed to estimate the fair value of freely tradable, fully transferable options without vesting restrictions, which significantly differ from our stock option awards.
The following weighted average assumptions are included in the estimated grant date fair value calculations for stock option grants in 1999, 2000 and 2001:
Employee Stock Purchase Plan
The 1999 Employee Stock Purchase Plan ("ESPP") was adopted by the Board of Directors in August 1999 and was approved by the stockholders in September 1999. The total number of shares of common stock reserved for issuance under this plan is 2,000,000 plus annual increases equal to the lesser of 1,500,000 shares or 4% of the outstanding shares on such date. The ESPP contains consecutive, overlapping, twenty-four month offering periods. Each offering period includes four six-month purchase periods. The ESPP permits participants to purchase shares through payroll deductions of up to 20% of an employee's total compensation (maximum of 20,000 shares) at 85% of the lower of the fair market value of the common stock at the beginning or end of a purchase period. As of December 31, 2001, 3,104,015 shares were available for issuance.
The following weighted average assumptions are included in the estimated grant date fair value calculations for rights to purchase stock under ESPP:
The estimated fair value of rights issued pursuant to the Company's ESPP in 1999, 2000, 2001 was $4.03, $4.52 and $2.23 per right, respectively.
Had the Company recorded compensation cost based on the estimated grant date fair value, as defined by SFAS 123, for awards granted under its stock option and employee stock purchase plans, its pro forma net loss for the years ended December 31, 1999, 2000 and 2001 would have been as follows:
Deferred Stock Compensation
During the year ended December 31, 1999, the Company granted options to purchase 866,000 shares of common stock at a price less than the fair market value of its common stock at the time of the grant and recorded related deferred stock compensation of $908,000, net of reversals associated with unvested shares of terminated employees. There was no deferred stock compensation recorded during the years ended December 31, 2000, and 2001. Such deferred stock compensation is being amortized ratably over the vesting period of the options. During the years ended December 31, 1999, 2000, and 2001, the Company amortized $512,000, $589,000 and $393,000, respectively, of deferred stock compensation.
NOTE 8-INVESTMENT IN TOWER SEMICONDUCTOR, LTD.
On December 12, 2000, the Company entered into a Share Purchase Agreement (the "Agreement") with Tower Semiconductor Ltd. ("Tower"). Under the Agreement, the Company agreed to make a $25 million strategic investment in Tower as part of Tower's plan to build a new wafer fabrication facility. The new fabrication facility will produce 200-mm wafers in geometries of 0.18 micron and below, using advanced CMOS technology from Toshiba. In return for the investment, the Company will receive equity and committed production capacity in the advanced fabrication facility that Tower is building. The committed capacity may be reduced if the Company elects not to exercise additional share purchase obligations. In connection with the Agreement, the Company also entered into a foundry agreement under which the Company is entitled to certain amount of wafer purchase
credits. Up to 15% of order value can be applied against these credits in future wafer purchases from Tower. The amount of credits is determined upon each share purchase transaction and is calculated based on the difference between the company's share purchase exercise price and the higher of $12.50 and Tower's average stock price for 30 days preceding a purchase transaction. Under the terms of the Agreement, the Company's investment will be made in several stages over an approximately 22-month period, against satisfactory completion of key milestones for the construction, equipping and commencement of production at the new wafer fabrication facility.
Pursuant to the Agreement, the Company purchased 533,310 ordinary shares of Tower and future wafer purchase credits for an aggregate purchase price of $14.0 million in fiscal 2001. The Company has agreed to purchase an additional 366,690 ordinary shares of Tower in three equal increments upon occurrence of certain events relating to the construction of the fabrication facility. Quicklogic agreed to purchase two thirds of these additional shares in fiscal 2002, and the remainder in 2003. The ordinary shares are restricted in nature, and the Company accounts for the shares under the cost method, based on the fact that Company does not have significant influence over Tower's operations.
During the third quarter of fiscal 2001, due to an other-than-temporary decline in the value of the stock, the Company wrote down its investment in Tower, recording a pre-tax, non-operating loss of $6.8 million. Also, in October 2001, approximately $5.3 million of the Company's wafers purchase credits were converted to 418,616 ordinary shares in Tower. At December 31, 2001, the wafer credits from Tower totalled $1.8 million and are included in other assets on the balance sheet. At December 31, 2001, the Company owned 951,926 shares of Tower, with a carrying value of $5.4 million.
NOTE 9-V3 SEMICONDUCTOR AQUISITION
On August 1, 2001, we acquired certain assets of V3 Semiconductor, Inc., a Toronto based manufacturer of Application Specific Standard Products (ASSP's). This acquisition is designed to accelerate our ESP strategy by strengthening our ability to develop and market system-level products for the communications and networking markets. The results of V3 have been included in the Company's operating results from the date of acquisition. Details of the purchase are as follows (in thousands):
The purchase price has been allocated as follows (in thousands):
The company has not identified any intangible assets associated with the purchase, and accordingly has allocated to Goodwill all of the purchase price in excess of book value of net assets acquired.
The following unaudited pro forma consolidated financial information reflects the results of operations for the years ended December 31, 2000 and 2001, as if the acquisition had taken place as of the beginning of the periods presented.
These pro forma results have been prepared for comparative purposes only, do not purport to be indicative of what operating results would have been, and may not be indicative of future operating results (in thousands, except per share data):
NOTE 10-RELATED PARTY TRANSACTIONS
Notes Receivable from Stockholder
As of December 31, 1999, we had $121,000 of demand promissory notes due from a stockholder. The notes bear interest at rates ranging from 6.7% to 8.5% per annum and were secured by shares of our common stock held by the stockholder. The notes were paid in full in September 2000.
NOTE 11-RESTRUCTURING CHARGES
In October 2001, we reduced our worldwide headcount by approximately 20%. We also instituted salary reduction plans for salaried employees of 10% to 30%. We wrote off $350,000 of intellectual property associated with a cancelled product and incurred $269,000 in severance costs for 44 staff employees and other related expenses. All restructuring costs were incurred in the fourth quarter of 2001, and no accruals for future expenses have been recorded.
NOTE 12-INFORMATION CONCERNING BUSINESS SEGMENTS AND MAJOR CUSTOMERS
Information About Geographic Areas
All of our sales originate in the United States. Shipments to some of our distributors are made to centralized purchasing and distributing locations, which in turn sell through to other locations. As a result of these factors, we believe that sales to certain geographic locations might be higher or lower, though accurate data is difficult to obtain.
The following is a breakdown of revenues by shipment destination for the years ended 1999, 2000 and 2001:
The countries comprising "Rest of world" category include Canada, UK, Korea and other countries in Asia, none of which individually comprise more than 10% of our sales.
Two customers, distributors of our products, accounted for approximately 24% and 11% of revenues in 2001. Three customers, distributors of our products, accounted for approximately 20%, 8% and 7% of revenues in 2000. Three customers, distributors of our products, accounted for approximately 24%, 11% and 10% of revenues in 1999. All sales are made from the United States and are denominated in U.S. dollars.
Less than 10% of our long-lived assets, including property and equipment and other assets, were located outside the United States.
NOTE 13-COMMITMENTS
On December 12, 2000 we entered into a Share Purchase Agreement (the "Agreement") with Tower Semiconductor Ltd. under which we will make a $25 million strategic investment in Tower as part of Tower's plan to build a new wafer fabrication facility. The new fabrication facility will produce 200-mm wafers in geometries of 0.18 micron and below, using advanced CMOS technology from Toshiba. In return for our investment, we will receive equity and committed production capacity in the advanced fabrication facility that Tower is building. Under the terms of the Agreement, our investment will be made in several stages over an approximately 22-month period, against satisfactory completion of key milestones for the construction, equipping and commencement of production at the new wafer fabrication facility. Tower will develop manufacturing capability for our proprietary ViaLink technology, and supply us with a guaranteed portion of the new fabrication facility's available wafer capacity at competitive pricing, with first production expected in 2002. Per the terms of the Agreement, we paid Tower three payments totaling $14 million in 2001.
We lease our primary facility under a noncancelable operating lease which expires in 2003, and includes an option to renew through 2006. Rent expense for the years ended December 31, 1999, 2000 and 2001 was approximately $628,000, $620,000, and $767,000 respectively.
Assets acquired under capital leases and included in plant and equipment at December 31, 1999, 2000 and 2001, were $198,000, $153,000 and $102,000 respectively. Depreciation expense on leased assets in 1999, 2000 and 2001 were $284,000, $388,000 and $490,000 respectively.
Future minimum lease commitments, excluding property taxes and insurance, are as follows:
NOTE 14-LITIGATION
On October 26, 2001, a putative securities class action was filed in the U.S. District Court for the Southern District of New York against some investment banks that underwrote the Company's initial public offerings, the Company, and some of the Company's officers and directors. This lawsuit is captioned Turoff v. QuickLogic et al., Case No. 01-CV-9503. Various plaintiffs have filed similar actions asserting virtually identical allegations against over 300 other public companies, their underwriters, and their officers and directors arising out of each company's public offering. The complaint in this case generally alleges that the underwriters obtained excessive and undisclosed commissions in connection with the allocation of shares of common stock in the Company's initial public offering and maintained artificially high prices through "tie-in" arrangements which required customers to buy shares in the aftermarket at pre-determined prices. The complaint alleges that the Company and its current officers and directors violated Sections of Securities Act of 1933, and the Securities Exchange Act of 1934 because the Company's registration statements did not disclose the purported misconduct of the underwriters. Plaintiffs seek an unspecified amount of damages on behalf of persons who purchased the Company's stock pursuant to the registration statements. The Company believes that the allegations against it are without merit and intends to defend the case vigorously.
On March 29, 2000, Unisys Corporation ("Unisys") brought suit in the United States District Court for the Northern District of California, San Jose Division ("Court"), against QuickLogic seeking monetary damages and injunctive relief. The summons and complaint were served on QuickLogic on April 10, 2000. The company orally agreed with Unisys to settle the case on October 5, 2001, and executed a definitive written settlement agreement on November 8, 2001. The Court conditionally dismissed the case with prejudice on October 11, 2001, which dismissal became final thirty days later. The settlement was immaterial to QuickLogic's business, financial condition and operating results.
The semiconductor industry has experienced a substantial amount of litigation regarding patent and other intellectual property rights. From time to time, we have received and may receive in the
future, communications alleging that our products or our processes may infringe on product or process technology rights held by others. We may in the future be involved in litigation with respect to alleged infringement by us of another party's patents. In the future, we may be involved with litigation to:
•Enforce our patents or other intellectual property rights;
•Protect our trade secrets and know-how;
•Determine the validity or scope of the proprietary rights of others; and
•Defend against claims of infringement or invalidity.
Such litigation has in the past and could in the future result in substantial costs and diversion of management resources. Such litigation could also result in payment of substantial damages and/or royalties or prohibitions against utilization of essential technologies, and could have a material adverse effect on our business, financial condition and results of operations.
ITEM 9.
ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE.
Not applicable.
PART III
Certain information required by Part III is incorporated by reference from the definitive Proxy Statement regarding our 2002 Annual Meeting of Stockholders filed not later than 120 days after the end of the fiscal year covered by this Report.
ITEM 10.
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE COMPANY
Information regarding the backgrounds of our directors and officers is contained herein under Item 1, "Executive Officers and Directors of the Company."
Information regarding directors appearing under the caption "Election of Directors-Directors and Nominees for Director" in our Proxy Statement is hereby incorporated by reference.
Information regarding compliance with Section 16(a) of the Securities Exchange Act of 1934, as amended, is hereby incorporated herein by reference from the section entitled "Election of Directors-Section 16(a) Beneficial Ownership Reporting Compliance" in the Proxy Statement.
ITEM 11.
ITEM 11. EXECUTIVE COMPENSATION
The information required by Item 11 is set forth under the caption, "Executive Compensation" in our Proxy Statement, which information is incorporated herein by reference.
ITEM 12.
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT
The information required by Item 12 is set forth under the caption "Security Ownership" in our Proxy Statement, which information is incorporated herein by reference.
ITEM 13.
ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS
The information required by Item 13 is set forth under the captions "Compensation Committee Interlocks and Insider Participation" herein under Item 1 and "Related Party Transactions" in our Proxy Statement, which information is incorporated herein by reference.
PART IV
ITEM 14.
ITEM 14. EXHIBITS, FINANCIAL STATEMENT SCHEDULES AND REPORTS ON FORM 8-K
(a)1. Financial Statements
Reference is made to page 35 for a list of all financial statements and schedules filed as a part of this report.
2. Financial Statement Schedules
QuickLogic Corporation
Valuation and Qualifying Accounts
(in thousands)
All other schedules not listed above have been omitted because the information required to be set forth therein is not applicable or is shown in the financial statements or notes hereto.
3. Exhibits
The exhibits listed under Item 14(c) hereof are filed as part of this Annual Report on Form 10-K. Exhibit 10.22 is a form of management contract.
(b)Reports on Form 8-K. QuickLogic filed a current report on Form 8-K on December 10, 2001 disclosing the adoption of a shareholder rights plan.
(c)Exhibits
The following exhibits are filed with or incorporated by reference into this report:
Exhibit
Number
Description
2.1 (3) Asset Purchase Agreement and Plan of Reorganization by and among QuickLogic Corporation, Q Acquisition Corporation, V3 Semiconductor Inc., and V Cubed Corporation dated as of April 17, 2001.
3.1 (1) Amended and Restated Certificate of Incorporation of the Registrant.
3.2 (1) Bylaws of the Registrant.
4.1 (1) Specimen Common Stock certificate of the Registrant.
4.2 (4) Rights Agreement, dated as of November 28, 2001, between QuickLogic Corporation and American Stock Transfer & Trust Company, as Rights Agent.
10.1 (1) Form of Indemnification Agreement for directors and executive officers.
10.2 (1) 1999 Stock Plan and form of Option Agreement thereunder.
10.3 (1) 1999 Employee Stock Purchase Plan.
10.4 (1) 1989 Stock Option Plan.
10.6 (1) Termination Agreement dated March 29, 1997 between the Registrant and Cypress Semiconductor Corporation.
10.7 (1) Cross License Agreement dated March 29, 1997 between the Registrant and Cypress Semiconductor Corporation.
10.8 (1) Wafer Fabrication Agreement dated March 29, 1997 between the Registrant and Cypress Semiconductor Corporation.
10.9 (1) Sixth Amended and Restated Shareholder Agreement dated March 29, 1997 by and among the Registrant, Cypress Semiconductor Corporation and certain stockholders.
10.10 (1) Sixth Amended and Restated Registration Rights Agreement dated March 29, 1997 by and among the Registrant, Cypress and certain stockholders.
10.11 (1) Technical Transfer, Joint Development License and Foundry Supply Agreement, dated October 2, 1992, between the Registrant and Cypress.
10.12 (1) Lease dated June 17, 1995, as amended, between Kairos, LLC and Moffet Orchard Investors as Landlord and the Registrant for the Registrant's facility located in Sunnyvale, California.
10.13 (1) Business Loan Agreement dated August 9, 1995 between the Registrant and Silicon Valley Bank, as amended.
10.14 (1) Loan and Security Agreement dated August 8, 1996 between the Registrant and Silicon Valley Bank, as amended.
10.15 (1) Export-import Bank Loan and Security Agreement dated August 8, 1996 between the Registrant and Silicon Valley Bank.
10.16 (1) First Amended and Restated Common Stock Purchase Agreement dated June 13, 1997 between the Registrant and Cypress.
10.18 (1) Patent Cross License Agreement dated August 25, 1998 between the Registrant and Actel Corporation.
10.19 (2) Share Purchase Agreement dated December 11, 2000 between the Company and Tower Semiconductor Ltd.
10.20 (2,5) Foundry Agreement dated December 11, 2000 as amended on September 17, 2001 between the Company and Tower Semiconductor Ltd.
10.21 (2) Registration Rights Agreement dated January 18, 2001 among, inter alia, the Company and Tower Semiconductor Ltd.
10.22
Form of Change of Control Severance Agreement.
21.1
Subsidiaries of the Registrant.
23.1
Consent of Independent Accountants
24.1
Power of Attorney (See page 60)
(1)Incorporated by reference to the Company's Registration Statement on Form S-1 declared effective October 14, 1999 (Commission File No. 333-28833).
(2)Incorporated by reference to the Company's Statement on Form 10-K filed on March 28, 2001 (Commission File No. 000-22671).
(3)Incorporated by reference to the Company's Statement on Form 8-K filed on August 7, 2001 (Commission File No. 000-22671).
(4)Incorporated by reference Company's Registration Statement on Form 8-A, filed on December 10, 2001 (Commission File No. 000-22671).
(5)Incorporated by reference to the Company's Statement on Form 10-Q filed on November 2, 2001 (Commission File No. 000-22671).
The Company has requested confidential treatment pursuant to Rule 406 for a portion of the referenced exhibit and has separately filed such exhibit with the Commission.
SIGNATURES
Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1933, as amended, the Registrant has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized on this fourth day of March, 2002.
QUICKLOGIC CORPORATION, INC.
By:
/s/ E. THOMAS HART E. Thomas Hart
President and Chief Executive Officer
POWER OF ATTORNEY
KNOW ALL PERSONS BY THESE PRESENTS, that each person whose signature appears below constitutes and appoints E. Thomas Hart and Arthur O. Whipple and each of them singly, as true and lawful attorneys-in-fact and agents with full power of substitution and resubstitution, for him and in his name, place and stead, in any and all capacities to sign this Annual Report on Form 10-K filed herewith and any or all amendments to said report, and to file the same, with all exhibits thereto, and other documents in connection therewith, with the Securities and Exchange Commission granting unto said attorneys-in-fact and agents the full power and authority to do and perform each and every act and the thing requisite and necessary to be done in and about the foregoing, as to all intents and purposes as he or she might or could do in person, hereby ratifying and confirming all that said attorneys-in-fact and agents or any of them, or his substitute, may lawfully do or cause to be done by virtue hereof.
Pursuant to the requirements of the Securities Exchange Act of 1934, as amended, this report has been signed by the following persons in the capacities and on the dates indicated below.
Signature
Title
Date
/s/ E. THOMAS HART E. Thomas Hart
Chairman of the Board, President, Chief Executive Officer and Director (Principal Executive Officer)
March 4, 2002
/s/ ARTHUR O. WHIPPLE Arthur O. Whipple
Vice President, Finance, Chief Financial Officer and Secretary (Principal Financial Officer and Principal Accounting Officer)
March 4, 2002
/s/ DONALD P. BEADLE Donald P. Beadle
Director
March 4, 2002
/s/ ROBERT J. BOEHLKE Robert J. Boehlke
Director
March 4, 2002
/s/ MICHAEL J. CALLAHAN Michael J. Callahan
Director
March 4, 2002
/s/ HUA-THYE CHUA Hua-Thye Chua
Director
March 4, 2002
SUPPLEMENTARY FINANCIAL DATA
QUARTERLY DATA (UNAUDITED)
EXHIBIT INDEX
Exhibit
Number
Description
2.1(3)
Asset Purchase Agreement and Plan of Reorganization by and among QuickLogic Corporation, Q Acquisition Corporation, V3 Semiconductor Inc., and V Cubed Corporation dated as of April 17, 2001
3.1(1)
Amended and Restated Certificate of Incorporation of the Registrant.
3.2(1)
Bylaws of the Registrant.
4.1(1)
Specimen Common Stock certificate of the Registrant.
4.2(4)
Rights Agreement, dated as of November 28, 2001, between QuickLogic Corporation and American Stock Transfer & Trust Company, as Rights Agent
10.1(1)
Form of Indemnification Agreement for directors and executive officers.
10.2(1)
1999 Stock Plan and form of Option Agreement thereunder.
10.3(1)
1999 Employee Stock Purchase Plan.
10.4(1)
1989 Stock Option Plan.
10.6(1)
Termination Agreement dated March 29, 1997 between the Registrant and Cypress Semiconductor Corporation.
10.7(1)
Cross License Agreement dated March 29, 1997 between the Registrant and Cypress Semiconductor Corporation.
10.8(1)
Wafer Fabrication Agreement dated March 29, 1997 between the Registrant and Cypress Semiconductor Corporation.
10.9(1)
Sixth Amended and Restated Shareholder Agreement dated March 29, 1997 by and among the Registrant, Cypress Semiconductor Corporation and certain stockholders.
10.10(1)
Sixth Amended and Restated Registration Rights Agreement dated March 29, 1997 by and among the Registrant, Cypress and certain stockholders.
10.11(1)
Technical Transfer, Joint Development License and Foundry Supply Agreement, dated October 2, 1992, between the Registrant and Cypress.
10.12(1)
Lease dated June 17, 1995, as amended, between Kairos, LLC and Moffet Orchard Investors as Landlord and the Registrant for the Registrant's facility located in Sunnyvale, California.
10.13(1)
Business Loan Agreement dated August 9, 1995 between the Registrant and Silicon Valley Bank, as amended.
10.14(1)
Loan and Security Agreement dated August 8, 1996 between the Registrant and Silicon Valley Bank, as amended.
10.15(1)
Export-import Bank Loan and Security Agreement dated August 8, 1996 between the Registrant and Silicon Valley Bank.
10.16(1)
First Amended and Restated Common Stock Purchase Agreement dated June 13, 1997 between the Registrant and Cypress.
10.18(1)
Patent Cross License Agreement dated August 25, 1998 between the Registrant and Actel Corporation.
10.19(2)
Share Purchase Agreement dated December 11, 2000 between the Company and Tower Semiconductor Ltd.
10.20(2,5)
Foundry Agreement dated December 11, 2000 as amended on September 17, 2001 between the Company and Tower Semiconductor Ltd.
10.21(2)
Registration Rights Agreement dated January 18, 2001 among, inter alia, the Company and Tower Semiconductor Ltd.
10.22
Form of Change of Control Severance Agreement.
21.1
Subsidiary of the Registrant.
23.1
Consent of Independent Accountants
24.1
Power of Attorney (See page 60)
(1)Incorporated by reference to the Company's Registration Statement on Form S-1 declared effective October 14, 1999 (Commission File No. 333-28833).
(2)Incorporated by reference to the Company's Statement on Form 10-K filed on March 28, 2001 (Commission File No. 000-22671).
(3)Incorporated by reference to the Company's Statement on Form 8-K filed on August 7, 2001 (Commission File No. 000-22671).
(4)Incorporated by reference Company's Registration Statement on Form 8-A, filed on December 10, 2001 (Commission File No. 000-22671).
(5)Incorporated by reference to the Company's Statement on Form 10-Q filed on November 02, 2001 (Commission File No. 000-22671).
The Company has requested confidential treatment pursuant to Rule 406 for a portion of the referenced exhibit and has separately filed such exhibit with the Commission.
EXPLANATORY NOTE
PART I
ITEM 1. BUSINESS
ITEM 2. PROPERTIES
ITEM 3. LEGAL PROCEEDINGS
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
PART II
ITEM 5. MARKET FOR THE REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS
ITEM 6. SELECTED FINANCIAL DATA
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS
EXPLANATORY NOTE
ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA
INDEX TO CONSOLIDATED FINANCIAL STATEMENTS
REPORT OF INDEPENDENT ACCOUNTANTS
QUICKLOGIC CORPORATION CONSOLIDATED BALANCE SHEETS (In thousands, except par value amount)
QUICKLOGIC CORPORATION CONSOLIDATED STATEMENTS OF OPERATIONS (In thousands, except per share amounts)
QUICKLOGIC CORPORATION CONSOLIDATED STATEMENTS OF STOCKHOLDERS' EQUITY (In thousands)
QUICKLOGIC CORPORATION CONSOLIDATED STATEMENTS OF CASH FLOWS (In thousands)
QUICKLOGIC CORPORATION NOTES TO CONSOLIDATED FINANCIAL STATEMENTS
ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE.
PART III
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE COMPANY
ITEM 11. EXECUTIVE COMPENSATION
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT
ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS
PART IV
ITEM 14. EXHIBITS, FINANCIAL STATEMENT SCHEDULES AND REPORTS ON FORM 8-K
SIGNATURES
SUPPLEMENTARY FINANCIAL DATA QUARTERLY DATA (UNAUDITED)
EXHIBIT INDEX