def __init__(self, revision='1.0', device='85F', sdram_device='MT41K64M16', sys_clk_freq=int(60000000.0), toolchain='trellis', with_ethernet=False, with_etherbone=False, eth_ip='192.168.1.50', eth_dynamic_ip=False, with_spi_flash=False, with_led_chaser=True, **kwargs):
    platform = butterstick.Platform(revision=revision, device=device, toolchain=toolchain)
    if (kwargs['uart_name'] == 'serial'):
        kwargs['uart_name'] = 'crossover'
    SoCCore.__init__(self, platform, sys_clk_freq, ident='LiteX SoC on ButterStick', ident_version=True, **kwargs)
    self.submodules.crg = _CRG(platform, sys_clk_freq)
    if (not self.integrated_main_ram_size):
        available_sdram_modules = {'MT41K64M16': MT41K64M16, 'MT41K128M16': MT41K128M16, 'MT41K256M16': MT41K256M16, 'MT41K512M16': MT41K512M16}
        sdram_module = available_sdram_modules.get(sdram_device)
        self.submodules.ddrphy = ECP5DDRPHY(platform.request('ddram'), sys_clk_freq=sys_clk_freq)
        self.comb += self.crg.stop.eq(self.ddrphy.init.stop)
        self.comb += self.crg.reset.eq(self.ddrphy.init.reset)
        self.add_sdram('sdram', phy=self.ddrphy, module=sdram_module(sys_clk_freq, '1:2'), l2_cache_size=kwargs.get('l2_size', 8192))
    if (with_ethernet or with_etherbone):
        self.submodules.ethphy = LiteEthPHYRGMII(clock_pads=self.platform.request('eth_clocks'), pads=self.platform.request('eth'))
        if with_ethernet:
            self.add_ethernet(phy=self.ethphy, dynamic_ip=eth_dynamic_ip)
        if with_etherbone:
            self.add_etherbone(phy=self.ethphy, ip_address=eth_ip)
    if with_spi_flash:
        from litespi.modules import W25Q128JV
        from litespi.opcodes import SpiNorFlashOpCodes as Codes
        self.add_spi_flash(mode='4x', module=W25Q128JV(Codes.READ_1_1_4), with_master=False)
    if with_led_chaser:
        self.comb += platform.request('user_led_color').eq(2)
        self.submodules.leds = LedChaser(pads=platform.request_all('user_led'), sys_clk_freq=sys_clk_freq)
def __init__(self, revision='1.0', device='85F', sdram_device='MT41K64M16', sys_clk_freq=int(60000000.0), toolchain='trellis', with_ethernet=False, with_etherbone=False, eth_ip='192.168.1.50', eth_dynamic_ip=False, with_spi_flash=False, with_led_chaser=True, **kwargs):
    platform = butterstick.Platform(revision=revision, device=device, toolchain=toolchain)
    if (kwargs['uart_name'] == 'serial'):
        kwargs['uart_name'] = 'crossover'
    SoCCore.__init__(self, platform, sys_clk_freq, ident='LiteX SoC on ButterStick', ident_version=True, **kwargs)
    self.submodules.crg = _CRG(platform, sys_clk_freq)
    if (not self.integrated_main_ram_size):
        available_sdram_modules = {'MT41K64M16': MT41K64M16, 'MT41K128M16': MT41K128M16, 'MT41K256M16': MT41K256M16, 'MT41K512M16': MT41K512M16}
        sdram_module = available_sdram_modules.get(sdram_device)
        self.submodules.ddrphy = ECP5DDRPHY(platform.request('ddram'), sys_clk_freq=sys_clk_freq)
        self.comb += self.crg.stop.eq(self.ddrphy.init.stop)
        self.comb += self.crg.reset.eq(self.ddrphy.init.reset)
        self.add_sdram('sdram', phy=self.ddrphy, module=sdram_module(sys_clk_freq, '1:2'), l2_cache_size=kwargs.get('l2_size', 8192))
    if (with_ethernet or with_etherbone):
        self.submodules.ethphy = LiteEthPHYRGMII(clock_pads=self.platform.request('eth_clocks'), pads=self.platform.request('eth'))
        if with_ethernet:
            self.add_ethernet(phy=self.ethphy, dynamic_ip=eth_dynamic_ip)
        if with_etherbone:
            self.add_etherbone(phy=self.ethphy, ip_address=eth_ip)
    if with_spi_flash:
        from litespi.modules import W25Q128JV
        from litespi.opcodes import SpiNorFlashOpCodes as Codes
        self.add_spi_flash(mode='4x', module=W25Q128JV(Codes.READ_1_1_4), with_master=False)
    if with_led_chaser:
        self.comb += platform.request('user_led_color').eq(2)
        self.submodules.leds = LedChaser(pads=platform.request_all('user_led'), sys_clk_freq=sys_clk_freq)