a plurality of metal bumps is based on a corresponding plurality of metal pads on a chip . by means of cog technique and the adhesion of the acf , the chip can be lowered and tightly attached to a plurality of bonding pads of a glass substrate . therefore , the conductive particles of the acf sandwiched between the top of the metal bump and the surface of the bonding pad serve as an electrically connecting bridge for electrically connecting the chip and the glass substrate . in order to avoid electrical shorts between adjacent metal bumps , the right - angled points of the square or rectangular profile are rounded or cut into curved faces or faceted faces , wherein the contact area of the metal bump should be kept at the maximum receivable range to maintain the demanded conductivity . this can increase the diagonal distance between adjacent metal bumps positioned at adjacent rows . furthermore , a preferred arrangement in which three centers of three adjacent metal bumps positioned at two adjacent rows are arranged as an equilateral triangle can increase layout density of the metal bumps and is applied to a chip of smaller scale . [ 0023 ] fig3 a to 3 e are top views of metal bumps according to the first embodiment of the present invention . a plurality of metal bumps 30 is arranged in two adjacent rows . in each row , each metal bump 30 with a transverse width w 2 is situated a transverse distance w 1 from all others , and the tops of the metal bumps 30 are leveled off . notice that the transverse distance w 1 is equal to the transverse width w 2 , and a lengthwise distance l between the two adjacent rows is smaller than the transverse distance w 1 . in a first row , a first metal bump 301 and a second metal bump 302 are adjacent and apart from the transverse distance w 1 . in a second row , a third metal bump 303 is disposed between the first metal bump 301 and the second bump 302 . therefore , the connection between the three centers of the three metal bumps 301 , 302 , 303 becomes a triangle . as shown in fig3 a , the first metal bump 301 has at least one curved face 32 , the second metal bump 302 has at least one curved face 34 , and the third metal bump 303 at least has a first curved face 36 and a second curved face 38 . the first curved face 36 of the third metal bump 303 is adjacent to the curved face 32 of the first metal bump 301 , and the second curved face 38 of the third metal bump 303 is adjacent to the curved face 34 of the second metal bump 302 . according to the profile - design rule , when the contact area of the metal bump 30 can be kept at a receivable range to maintain the demanded conductivity , the metal bumps 301 , 302 , 303 can present various profiles , such as the irregular profile shown in fig3 a , the elliptical profile shown in fig3 b , or the circular profile shown in fig3 c . the first advantage is that the smallest distance p 1 between the curved face 32 of the first metal bump 301 and the first curved face 36 of the third metal bump 303 is increased to avoid an electrical connection between the first metal bump 301 and the third metal bump 303 . similarly , the smallest distance p 1 is increased to avoid an electrical connection between the second metal bump 302 and the third metal bump 303 . as shown in fig3 d , a top view of the metal bumps 30 corresponding in position to bonding pads 40 , the bonding pads 40 on a glass substrate present a circular profile depending on the circular profile of the metal bumps 30 . within the smallest distance p 2 between the first bonding pad 401 and the third bonding pad 403 , the probable contact region is the circumference of the first metal bump 301 and the circumference of the third bonding pad 403 , as a point of tangency . thus , the second advantage is that an electrical short is not likely to be caused between the first metal bump 301 and the third bonding pad 403 if the chip is inaccurately aligned to the glass substrate . this can improve the tolerance limitation of alignment error in cog technique . similarly , an electrical short is not easily caused between the second metal bump 302 and the third bonding pad 403 . in accordance with the metal bumps 30 presenting a circular profile , there are other advantages . the fabricating method for the circular profile is simpler and improves the quality of the metal bumps 30 . also , since gold bumps create the problem of an anisotropical variation at the right - angle point , the circular profile solves this problem . furthermore , as shown in fig3 e , the three centers o 1 , o 2 , o 3 of the three metal bumps 301 , 302 , 303 can be arranged as an equilateral triangle to reduce the transverse distance between adjacent metal bumps 301 , 302 and the lengthwise distance between adjacent rows to a limitation . this can increase layout density of the metal bumps 30 and the size of the chip can be smaller to increase the amount of chips fabricated on a wafer . please refer to fig4 a to 4 e , which are top views of metal bumps 50 according to the second embodiment of the present invention . a plurality of metal bumps 50 is arranged in two adjacent rows . in each row , each metal bump 50 with a transverse width w 2 is spaced out a transverse distance w 1 apart from each other , and the tops of the metal bumps 50 are leveled off . notice that the transverse distance w 1 is equal to the transverse width w 2 , and a lengthwise distance l between the two adjacent rows is smaller than the transverse distance w 1 . in a first row , a first metal bump 501 and a second metal bump 502 are adjacent and separated by distance w 1 . in a second row , a third metal bump 503 is disposed between the first metal bump 501 and the second bump 502 . therefore , the connection between the three centers of the three metal bumps 501 , 502 , 503 respectively forms a triangle . as shown in fig4 a , the first metal bump 501 has at least one faceted face 52 , the second metal bump 502 has at least one faceted face 54 , and the third metal bump 503 at least has a first faceted face 56 and a second faceted face 58 . the first faceted face 56 of the third metal bump 503 is adjacent to the faceted face 52 of the first metal bump 501 , and the second faceted face 58 of the third metal bump 503 is adjacent to the faceted face 54 of the second metal bump 502 . according to the profile - design rule , when the contact area of the metal bump 50 can be kept at a receivable range to maintain the demanded conductivity , the metal bumps 501 , 502 , 503 can present various profiles , such as the irregular profile shown in fig4 a , the rhombus profile shown in fig4 b , the equilateral pentagon profile shown in fig4 c , the equilateral hexagon profile shown in fig4 d , or the equilateral octagon profile shown in fig4 e . the first advantage is that the smallest distance p 3 between the faceted face 52 of the first metal bump 501 and the first faceted face 56 of the third metal bump 503 is increased to avoid an electrical connection between the first metal bump 501 and the third metal bump 503 . similarly , the smallest distance p 3 is increased to avoid a electrical connection between the second metal bump 502 and the third metal bump 503 . the second advantage is that the diagonal distance between the bonding pads is also reduced , hence an electrical short is not easily caused between the metal bump 50 and the bonding pad if the chip is inaccurately aligned to the glass substrate . this can improve the tolerance limitation of alignment error in cog technique . those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teaching of the invention . accordingly , the above disclosure should be construed as limited only by the metes and bounds of the appended claims .