fig6 shows a receiver correlator 30 of the present invention which receives from transmitter 32 an ultra wide bandwidth signal rf . ultra wide bandwidth signal rf comprises a sequence of wavelets of particular shapes and positions . transmitter 32 is disclosed in ser . no . 09 / 685 , 205 , filed oct . 10 , 2000 , entitled system and method for generating ultra wideband pulses , incorporated herein by reference , and in ser . no . 09 / 685 , 197 filed oct . 10 , 2000 , entitled ultra wideband communication system with low noise pulse formation , incorporated herein by reference . in addition , the receiver correlator structure 30 of the present invention receives an ultra wide bandwidth signal lo . ultra wide bandwidth signal lo comprises a sequence of wavelets of particular shapes and positions corresponding to ultra wide bandwidth signal rf . ultra wide bandwidth signal lo is produced by timing generator 36 as disclosed in co - pending application ser . no . 09 / 685 , 199 filed oct . 10 , 2000 , entitled a low power , high resolution timing generator for ultra - wide bandwidth communications systems , incorporated herein by reference . more particularly , timing generator 36 , based upon inputs of frequency , phase , and time dither , prompts wavelet generator 34 to generate lo , which is time - aligned with signal rf . wavelet generator 34 is disclosed in co - pending application ser . no . 09 / 685 , 205 , filed oct . 10 , 2000 , entitled system and method for generating ultra wideband pulses , incorporated herein by reference . the shape of the wavelet of signal lo generated by wavelet generator 34 can vary , with shapes such as biphase , multi - amplitude , multi - phase , and chirp . fig7 shows an example of a waveform presented by signal lo in fig6 . the waveform lo shown in fig7 was generated by wavelet generator 34 and has a constant pulse shape . fig8 shows a series of signals rf 1 , rf 2 , rf 3 , . . . which are wavelets , having a period of t s . each wavelet , or series of wavelets , of ultra wide bandwidth signal rf corresponds to a logical “ 1 ” or a logical “ 0 ”, depending upon the shape of the wavelet of signal rf . that is , rf 1 of fig8 could correspond to logical “ 1 ” ( and signal lo of fig7 ), while rf 2 and rf 3 of fig8 could each correspond to logical “ 0 ”. as shown in fig8 , t p is less than t s ( the center - to - center clock period ), and t pp ( peak to peak ) is less than t p . t p is the width of the wavelet , and is typically twice t pp . an example of t pp would be 330 pico - seconds ( peak - to - peak ); an example of t s would be 20 nano - seconds . fig9 a shows a more detailed diagram of receiver correlator structure 30 of the present invention . as shown in fig9 a , signal rf impinges upon antenna 38 , and is coupled to mixer 40 . antenna 38 could be a conventional antenna or could be of the structure disclosed in co - pending u . s . patent application ser . no . 09 / 563 , 292 filed may 3 , 2000 entitled planar uwb antenna with integrated transmitter and receiver circuits , now issued as u . s . pat . no . 6 , 351 , 246 , incorporated herein by reference . mixer 40 receives signal rf and local oscillator signal lo , which is time - aligned with signal rf as discussed in co - pending u . s . application ser . no . 09 / 685 , 197 , filed oct . 10 , 2000 , entitled mode controller for signal acquisition and tracking in an ultra wideband communication system , incorporated herein by reference , and in ser . no . 09 / 685 , 195 , filed oct . 10 , 2000 , entitled ultra wide bandwidth system and method for fast synchronization , incorporated herein by reference . in one embodiment , the pulse shape of signal lo can be constant . that is , each waveform generated by wavelet generator 34 ( shown in fig6 ) is the same as the prior waveform of signal lo , and corresponds to either a logical “ 1 ” or a logical “ 0 ”, but does not vary from pulse to pulse . consequently , leakage l ( shown in fig9 ) of signal lo between mixer 40 and antenna 38 is always the same from pulse to pulse of signal lo . this leakage l is non - linear , and is removed as discussed herein below . mixer 40 is , for example , a mini - circuits ade - 42 mh . after signals rf and lo are mixed by mixer 40 , the resultant , mixed signal if is transmitted from mixer 40 to band pass filter 42 . band pass filter 42 removes dc components from signal if . that is , band pass filter 42 removes any bias introduced by mixer 40 by resetting the bias to 0 in a single chip period . thus , in band pass filter 42 , the settling time is less then the bit . more particularly , band pass filter 42 removes 1 / f noise . band pass filter 42 is discussed in further detail with reference to fig1 a and 13b . fig9 b shows another embodiment of the present invention which includes adder 43 . adder 43 has a bias voltage v b . v b is set such that when signal rf = 0 , the output of convertor 44 ( if convertor 44 is an analog - to - digital convertor ) is 0v at sampling point s . if converter 44 is a comparator , then v b is set such that the comparator has a 50 % duty cycle . if v b is not set in this way , then dsp 46 would have to estimate v b across a series of bits decoded from the wavelets of received ultra wide bandwidth signal rf . however , setting v b as described would save time and battery life over having dsp 46 estimate v b . fig9 c , 9 d , and 9 e show alternate embodiments of the convertor 44 . fig9 c shows analog - to - digital converter 92 ; fig9 d shows comparator 94 ; and fig9 e shows sample - and - hold circuit 96 coupled in series to integrator 98 , which is coupled in series to analog - to - digital convertor 99 . in one embodiment , integrator 98 would function as a d - latch circuit , in which the integrator would sample a signal input thereto on the rising edge of a clock pulse input to the the integrator 98 , and transfers to the output of integrator 98 the signals that were integrated since the prior clock pulse . such an integrator 98 would comprise a ping - pong circuit , which would comprise two integrators functioning during alternating clock periods . an example of such an integrator 98 is disclosed in u . s . patent application ser . no . 09 / 209 , 460 filed dec . 11 , 1998 , entitled ultra wide bandwidth spread - spectrum communications system , now issued as u . s . pat . no . 6 , 700 , 939 , incorporated herein by reference , and in u . s . patent application ser . no . 09 / 633 , 815 filed aug . 7 , 2000 entitled electrically small planar uwb antenna , incorporated herein by reference . an example of waveform if , at the output of mixer 40 , is shown in fig1 a . for the shape of waveform if shown in fig1 a , the shape of the waveform input in signal rf corresponds to a logical “ 1 ”, and the shape of the waveform input by signal lo also corresponds to a logical “ 1 ”. of course , if rf and lo were logically opposite to each other , then the shape of waveform if at the output of mixer 40 would correspond to waveform if shown in fig1 b . moreover , in the signal if shown in fig1 a and 10b , the peak - to - peak difference between pulses is typically less than 1 nanosecond , though in some applications could be longer . band pass filter 42 accommodates waveform if as shown in fig1 a and in fig1 b . that is , band pass filter 42 recognizes dynamically whether signal if corresponds to the waveform shown in fig1 a or corresponds to the waveform shown in fig1 b , and removes the dc components , and therefore the bias introduced by mixer 40 , from either . fig1 a shows band pass filter 42 being applied to signal if , and fig1 b shows resultant signal b , at the output of the band pass filter 42 , after band pass filter 42 is applied to signal if . that is , signal b corresponds to signal if , but with dc components present in signal if removed from signal b by band pass filter 42 , and the ac signal leaked by mixer 40 from signal lo , removed at the sampling instant s . also as shown in fig1 a , in the receiver correlator of the present invention , the sampling instant s by the convertor 44 occurs at the relative maximum ( or peak ) or relative minimum of the output waveform from the bandpass filter 42 . as shown in fig1 a , the settling time of the band pass filter 42 is less than the bit period of the data encoded in signal if . signal b is then transmitted to convertor 44 , which samples signal b at each respective peak thereof . that is , convertor 44 samples signal b at sampling points s shown in fig1 a . convertor 44 is an analog - to - digital convertor . alternatively , convertor 44 is a comparator . alternatively still , convertor 44 is a sample - and - hold circuit coupled in series to an integrator and to an analog - to - digital convertor . convertor 44 is biased by v b such that the output of the convertor 44 is at the 0 - volt threshold ( or zero mean ), when there is no rf signal or the rf signal is white gaussian noise . that is , each bit is resolved to 0 by the combination of band pass filter 42 and convertor 44 . the convertor 44 is , for example a texas instruments tlv 5580 . for pulses ( or wavelets ) transmitted as signal rf which correspond to logical “ 1 ” or logical “ 0 ”, then output signal of is output by receiver correlator structure 30 directly from convertor 44 . each pulse transmitted as signal rf , and ultimately , as signal if and signal b , corresponds to a logical “ 1 ” or a logical “ 0 ” in the embodiment described here and above . alternatively , a series of single spike pulses , rf , represent a bit . that is , a series of two consecutive single spike pulse correspond to either logical “ 1 ” or logical “ 0 ”. if a series of single spike pulses corresponds to either logical “ 1 ” or logical “ 0 ” then a digital signal processor dsp 46 is placed at the output of convertor 44 . the dsp 46 receives the output signal from convertor 44 and digitally integrates the output signal . that is , dsp 44 implements an algorithm readily apparent to those of skill in the art , to sum or add the series of pulses such that each series of pulses is determined to be to correspond to either a logical “ 1 ” or a logical “ 0 ”. dsp 46 is , for example an intel pentium ™ processor . fig1 shows a series of pulses , rf , which when received by receiver correlator structure 30 of the present invention , resolve through the activities of antenna 38 , mixer 40 , band pass filter 42 , convertor 44 and dsp 46 as described herein above , to a logical “ 1 ”. although the series of pulses rf correspond to logical “ 1 ” each single spike pulse is spaced from another single spike pulse by a period of t s . fig1 a shows an embodiment of band pass filter 42 . referring now to fig1 a , signal if enters band pass filter 42 along an input port which is tied to ground through a nine pico - fared capacitor 50 and a 51 - ohm resister 52 and proceeds to 22 - nano henry inductor 54 . the output of inductor 54 is tied to ground through 51 - ohm resistor 56 and 100 nano henry inductor 58 and to 47 pico - fared capacitor 60 , which is input to amplifier era - 5sm 62 . the output of amplifier 62 is tied to ground through 4 pico - fared capacitor 64 and to 22 nano henry inductor 66 . the output of inductor 66 is tied , concurrently , to ground through 4 pico - fared capacitor 68 , and to a 12 - volt power source through 110 - ohm resistor 70 , which is in parallel with 0 . 01 micro - fared capacitor 72 , also tied to ground . the output of inductor 66 travels through 0 . 01 micro - fared capacitor 74 to become output b . an alternate embodiment of band pass filter 42 is shown in fig1 b . referring now to fig1 b , input signal if travels through capacitor 80 , the output of which is tied in parallel to capacitor 82 , capacitor 84 and ground through capacitor 86 . signal if continues through capacitor 84 into amplifier 86 and through capacitor 82 to the output of amplifier 86 . the output of amplifier 86 is tied through resistor 88 back to the input of amplifier 86 and is output from band pass filter 42 at signal b . fig1 shows a table 90 of outputs by receiver correlator 30 and receiver correlator 10 , based upon input signal rf and local oscillator lo . as shown in fig1 , when input signal rf is corresponds to logical “ 1 ” and local oscillator corresponds to logical “ 1 ”, receiver correlator 30 of the present invention outputs a value of + 1 , whereas receiver correlator 10 would output a value of 1 + a , which is perhaps a value other than + 1 . likewise , if rf corresponds to logical “ 0 ” and lo corresponds to logical “ 0 ”, receiver correlator 30 would output + 1 whereas receiver correlator 10 would output a value of 1 − b , which is also perhaps a value other than + 1 . in addition , if rf corresponds to logical “ 1 ”, and lo corresponds to logical “ 0 ” receiver correlator 30 outputs − 1 and receiver correlator 10 outputs − 1 − b , which is perhaps a value other than − 1 . lastly if rf corresponds to “ 0 ” and lo corresponds to “ 1 ” receiver correlator 30 outputs − 1 and receiver correlator 10 outputs − 1 − a , which is also perhaps a value other than − 1 . receiver correlator 10 outputs a and b because of the affect of the bias between mixer 14 and antenna 12 . moreover , a and b have 1 / f noise that obscures the signal of interest . the present invention has been described with respect to the above - mentioned components . however , implementation of the above - mentioned functions is not limited in the present invention to the components described . for example , the present invention may be implemented in silicon on a signal chip or on multiple chips . an ultra wide bandwidth system ( that is , an ultra - wide band trnasceiver ) in which the receiver correlator structure of the present invention could be implemented is shown in fig1 . the transceiver 100 shown in fig1 includes a receiver 112 , a transmitter 114 , and a radio controller and interface 110 . the receiver 112 includes antenna 102 , front end 104 , uwb waveform correlator 106 , and timing generator 108 . the transmitter 114 includes antenna 116 , uwb waveform generator 118 , timing generator 108 , and encoder 122 . the transceiver 100 is described in further detail in u . s . application ser . no . 09 / 685 , 199 filed oct . 10 , 2000 , entitled a low power , high resolution timing generator for ultra - wide bandwidth communications systems , incorporated herein by reference . the receiver correlator structure 30 of the present invention is incorporated into transceiver 100 as shown in fig1 and 17 . that is , the mixer 40 and the bandpass filter 42 are included ( along with wavelet generator 34 ) into uwb waveform correlator 106 , and the convertor 44 and the dsp 46 are included in the radio controller and interface 110 . that is an ultra wide bandwidth communication system of the present invention comprises a transmitter transmitting an ultra wide bandwidth signal comprising a sequence of wavelets of particular shapes and positions , a wavelet generator generating a local ultra wide bandwidth signal comprising a sequence of wavelets of particular shapes and positions corresponding to the transmitted ultra wide bandwidth signal , and a receiver correlator structure . the receiver correlator structure comprises an antenna receiving the transmitted ultra wide bandwidth signal , a mixer , coupled to the antenna , receiving from the antenna the received ultra wide bandwidth signal and mixing the ultra wide bandwidth signal with the local ultra wide bandwidth signal , a bandpass filter , coupled to the mixer output , receiving the mixed ultra wide bandwidth signal , removing the dc components therefrom , and outputting a resultant signal , wherein an initial peak of the resultant signal is proportional to energy included in the mixed ultra wide bandwidth signal and post signal decay of the resultant signal to zero occurs in t s time , and a convertor , coupled to the bandpass filter , converting the resultant signal at the initial peak to a digital output signal . the many features and advantages of the invention are apparent from the detailed specification and , thus , it is intended by the appended claims to cover all such features and advantages of the invention which fall within the true spirit and scope of the invention . further , since numerous modifications and changes will readily occur to those skilled in the art , it is not desired to limit the invention to the exact construction and operation illustrated and described , and accordingly all suitable modifications and equivalents may be resorted to , falling within the scope of the invention .