an electrical equipment control system of a preferred embodiment according to the present invention will be described in detail hereinafter with reference to the accompanying drawings . fig1 is a block diagram of an electrical equipment control system 10 embodying the present invention . the electrical equipment control system 10 for a vehicle comprises a central control unit 12 , i / o units , i . e ., an ignition i / o unit 14 , a speedometer i / o unit 16 and a flasher i / o unit 18 , and a communication network 19 connecting the central control unit 12 and the i / o units 14 , 16 and 18 for communication . the central control unit 12 comprises a microcomputer 20 and a communication circuit 22 . the ignition i / o unit 14 comprises a rotational frequency measuring timer 26 which records periodic signals representing the rotational frequency of the crankshaft provided by a crank position sensor 24 , a timing signal producing circuit 28 which produces an ignition timing signal for timing the igniting operation of the spark plugs , an ignition timer 32 which applies an ignition signal to the ignition coil on the basis of the ignition timing signal provided by the timing signal producing circuit 28 , and a communication circuit 34 which converts a crankshaft speed signal provided by the rotational frequency measuring timer 26 into a signal of a predetermined transmission format , delivers the signal of the predetermined transmission format to the communication network 19 , and receives signals from the communication network 19 . the speedometer i / o unit 16 comprises a traveling speed measuring timer 38 which records a traveling speed signal provided by a traveling speed sensor 36 , a digital - to - analog converter ( hereinafter , referred to as &# 34 ; d / a converter &# 34 ;) 42 which converts a digital signal for driving the speedometer indicator 40 into a corresponding analog signal , and a communication circuit 44 which transforms the traveling speed signal provided by the traveling speed measuring timer 38 into a signal of a predetermined transmission format , delivers the signal of the predetermined transmission format to the communication network 19 and receives signals from the communication network 19 . the flasher i / o unit 18 comprises an analog - to - digital converter ( hereinafter referred to as &# 34 ; a / d converter &# 34 ;) 48 which converts a steering angle signal provided by a steering angle sensor 46 into a corresponding digital signal , a flasher driver 52 for driving a flasher relay 50 for turning on and off the flasher lamps , and a communication circuit 54 which transforms the steering angle signal into a signal of a predetermined transmission format , delivers the signal of the predetermined transmission format to the communication network 19 and receives signals from the communication network 19 . the output signal of a manual flasher switch 56 for actuating and stopping the flasher relay 50 is delivered to the flasher driver 52 . fig2 is a block diagram of the communication circuit 44 . the communication circuits 34 and 54 are of the same configuration as the communication circuit 44 . the communication circuit 44 comprises a transmitter 60 which transmits the traveling speed signal provided by the traveling speed measuring timer 38 to the communication network 19 and a receiver 62 which receives a signal to be delivered to the communication network 19 provided by the central control unit 12 . the transmitter 60 has an output terminal through which to deliver a receive inhibit signal to the receiver 62 and the receiver 62 has an output terminal through which to deliver a transmitter start signal to the transmitter 60 . an npn transistor t r1 has a base terminal connected through a resistor r1 to the output terminal of the transmitter 60 , a collector terminal connected to a communication signal i / o terminal a and an emitter terminal connected to the negative terminal of the power supply . the base terminal is connected through a resistor r2 to the negative terminal of a power supply . a pnp transistor t r2 has a collector terminal connected to the input terminal of the receiver 62 , an emitter terminal connected to the positive terminal of the power supply and a base terminal connected through a resistor r5 to the communication signal i / o terminal a . a resistor r3 is connected across the emitter terminal and the base terminal of the transistor t r2 . a resistor r4 has one end connected to the positive terminal of the power supply and the other end connected to the communication signal i / o terminal a . fig3 is a block diagram of the traveling speed measuring timer 38 and the transmitter 60 of the communication circuit 44 . the traveling speed measuring timer 38 comprises an l - capture register 64 which stores the lower eight bits of a traveling speed signal provided by the traveling speed sensor 36 , an h - capture register 66 which stores the upper eight bits of the traveling speed signal provided by the traveling speed sensor 36 and a 16 - bit automatic timer 68 . the transmitter 60 comprises a register 70 which stores a communication address signal consisting of a start bit , a receive address signal and a transmit address signal , a register 72 which stores a parallel signal provided by the l - capture register 64 , a register 74 which stores a parallel signal provided by the h - capture register 66 , a shift register 76 which transforms the communication address signal stored in the register 70 and the traveling speed signals stored in the registers 72 and 74 into a serial signal and delivers the serial signal to the communication network 19 , and a parity signal generator 78 which provides a parity signal to the shift register 76 . a transmission signal u to be delivered from the meter i / o unit 16 to the communication network 19 consists of the communication address signal and the traveling speed signals . the transmitter 60 further comprises a transmission clock generator 80 which generates a transmission clock upon the reception of a transmission start signal from the receiver 62 and a data select circuit 82 which delivers a receive inhibit signal to the receiver 62 upon the reception of the transmission clock from the transmission clock generator 80 and delivers a clock signal to the registers 70 , 72 and 74 . the transfer of the contents of the registers 70 , 72 and 74 to the shift register 76 is controlled by the clock signal provided by the data select circuit 82 . the shift register 76 delivers the transmission signal u to the communication network 19 in synchronism with the transmission clock provided by the transmission clock generator 80 . fig4 is a block diagram of the receiver 62 . the receiver 62 comprises a sampling circuit 84 which receives signals from the communication network 19 , a shift register 86 which transforms the serial input signals into parallel signals , a data select circuit 88 , a register 90 which receives the communication address signal from the shift register 86 and stores the same upon the reception of a select signal from the data select circuit 88 , a register 92 which receives the lower eight bits of an angular deflection signal representing the angular deflection of the indicator of the speedometer 40 from the shift register 86 in response to the select signal provided by the data select circuit 88 and stores the same , and a register 94 which stores the upper eight bits of the angular deflection signal from the shift register 86 in response to the select signal provided by the data select circuit 88 . the receiver 62 further comprises a receive address comparator 96 which compares the receive address signal of the communication address signal provided by the register 90 with a given receive address signal and delivers a signal representing the results of comparison to the data select circuit 88 , and a transmission request comparator 98 which delivers a transmission start signal to the transmitter 60 when the register 90 does not provide any transmission address signal for a predetermined time . the receiver 62 also comprises a receive clock generator 100 and a data check circuit 102 . the receive clock generator 100 generates a receive clock upon the reception of a receive start signal and the data check circuit 102 tests the parity of the signal delivered to the shift register 86 . the d / a converter 42 has a d / a converter 104 for converting the digital signal provided by the register 92 into a corresponding analog signal and a d / a converter 106 for converting the digital signal provided by the register 94 into a corresponding analog signal . fig5 is a block diagram of the communication circuit 22 included in the central control unit 12 . the communication circuit 22 comprises a shift register 108 which transforms the parallel data provided by the microcomputer 20 into serial data and delivers the serial data to the communication network 19 , a shift register 110 which transforms the serial data received from the communication network 19 into parallel data and delivers the parallel data to the microprocessor 20 , and a clock generator 112 which delivers a clock signal to the shift registers 108 and 110 . a centralized control procedure for controlling the ignition i / o unit 14 , the speedometer i / o unit 16 and the flasher i / o unit 18 by the central control unit 12 in this electrical equipment control system 10 having the above - described configuration will be described hereinafter with reference to a main flow chart shown in fig6 . after the engine has been started , the crank position sensor 24 delivers a reference crank position signal to the rotational frequency measuring timer 26 of the ignition i / o unit 14 . the crank position signal is delivered through the communication circuit 34 to the communication network 19 . the central control unit 12 reads the reference crank position signal from the communication network 19 and determines an engine speed on the basis of the reference crank position signal in step s1 . then , the central control unit 12 determines an ignition time at which the spark plug is to pass an electrical discharge , and a spark duration in step s2 by using the determined engine speed . the results of the determination are delivered to the communication network 19 in step s3 . thereafter , the central control unit 12 reads the traveling speed signal provided by the traveling speed sensor 36 delivered to the communication network 19 by the speedometer i / o unit 16 and determines the traveling speed of the vehicle by using the traveling speed signal in step s4 . then , the central control unit 12 determines the angular deflection of the indicator of the speedometer 40 by using the traveling speed in step s5 and delivers the results of the determination to the communication network 19 in step s6 . then , the central control unit 12 reads a steering angle signal and a steering duration signal provided by the steering angle sensor 46 delivered to the communication network 19 by the flasher i / o unit 18 and determines a steering angle by using the steering angle signal in step s7 . then , the central control unit 12 examines the steering duration to decide whether or not the flasher is to be stopped in step s8 , and then delivers a flasher control signal according to the decision made in step s8 to the communication network 19 in step s9 . a query is made in step s10 to see if a control termination signal is given . step s1 and the following steps are repeated if the response in step s10 is negative , or the centralized control procedure is terminated when the response in step s10 is affirmative . thus , the single central control unit 12 performs the centralized control of the plurality of i / o units . a manner of communication between the central control unit 12 and the i / o units 14 , 16 and 18 will be described with reference to fig7 . a transmission request signal requesting the meter i / o unit 16 to transmit a signal is delivered to the communication network 19 by the central control unit 12 . the transmission request signal is delivered to the receiver 62 of the speedometer i / o unit 16 in step s20 . then , the receiver 62 delivers a transmission start signal to the transmitter 60 in response to the transmission request signal , and then in step s21 , the transmitter 60 delivers a transmission signal u obtained by adding a communication address signal to the traveling speed signal provided by the traveling speed measuring timer 38 to the communication network 19 . upon the reception of the transmission signal u from the communication network 19 , the central control unit 12 determines an angular deflection signal representing the angular deflection of the indicator of the speedometer 40 by using the transmission signal u and delivers a transmission signal c obtained by adding a communication address signal to the angular deflection signal to the communication network 19 in step s22 . upon the reception of the transmission signal c from the communication network 19 , the receiver 62 of the speedometer i / o unit 16 extracts the angular deflection signal from the transmission signal c and delivers the same to the d / a converter 42 , and then , the d / a converter 42 converts the angular deflection signal into a corresponding analog signal and delivers the same to the speedometer 40 in step s23 . a procedure by which the transmitter 60 delivers the transmission u to the communication network 19 in step s21 will be described hereinafter with reference to fig3 and 8 . a transmission start signal ( fig8 ( a )) provided by the receiver 62 is applied to the registers 72 and 74 of the transmitter 60 and the control input terminal of the transmission clock generator 80 , as shown in fig3 . upon the reception of the transmission start signal , the register 72 stores the lower eight bits of the traveling speed signal stored in the l - capture register 64 , and the register 74 stores the upper eight bits of the traveling speed signal stored in the capture register 66 . upon the reception of the transmission start signal , the transmission clock generator 80 generates a transmission clock signal ( fig8 ( b )) synchronous with a transmission clock signal generated by the microcomputer 20 of the central control unit 12 and applies the transmission clock signal to the data select circuit 82 and the transmission shift register 76 . the data select circuit 82 delivers signals sequentially to the registers 70 , 72 and 74 , the register 70 delivers the communication address signal ( fig8 ( c )) stored beforehand therein to the shift register 76 , the register 72 delivers the lower eight bits of the traveling speed signal ( fig8 ( d )) to the shift register 76 , and the register 74 delivers the upper eight bits of the traveling speed signal ( fig8 ( e )) to the shift register 76 . the shift register 76 transforms the received signals into a serial signal , adds a parity bit provided by the parity signal producing circuit 78 to the serial signal to obtain a transmission signal u ( fig8 ( f )) and delivers the transmission signal u to the communication network 19 . fig9 shows the format of the transmission signal u thus produced . the first byte of the transmission signal u represents the communication address signal and consists of start bits , a receive address signal and a transmit address signal . each of the second byte and the third byte of the transmission signal u consist of traveling speed data , a parity bit and a stop bit . suppose that the start bit is &# 34 ; 1 &# 34 ;, the address signal for the receiving central control unit 12 is &# 34 ; 001 &# 34 ; and the address signal for the transmitting speedometer i / o unit 16 is &# 34 ; 010 &# 34 ;, and the word length is eight bits . then , the address signal for the transmission signal u is &# 34 ; 1 0 0 1 0 1 0 0 &# 34 ;. the operation of the central control unit for receiving the transmission signal u from the communication network 19 and delivering the angular deflection signal representing the angular deflection of the indicator of the speedometer 40 to the communication network 19 will be described hereinafter with reference to fig5 . the first byte of the transmission signal u provided by the speedometer i / o unit 16 is delivered from the communication network 19 to the receiving shift register 110 of the central control unit 12 . upon the identification of the transmission signal u provided by the speedometer i / o unit 16 , the microcomputer 20 reads the speed data represented by the second byte and the third byte from the shift register 110 , and determines the angular deflection of the indicator of the speedometer 40 by using the speed data . a communication address signal , a parity bit and a stop bit are added to an angular deflection signal representing the determined angular deflection to produce a transmission signal c , the shift register 108 transforms the transmission signal c of a parallel format into that of a serial format , and then the central control unit 12 delivers the serial transmission signal c to the communication network 19 . the operation of the speedometer i / o unit 16 for receiving the transmission signal c delivered by the central control unit 12 to the communication network 19 and for driving the indicator of the speedometer 40 will be described hereinafter with reference to fig4 and 10 ( a )-( i ). when the transmission signal c received from the communication network 19 goes low ( fig1 ( a )), the sampling circuit 84 of the communication circuit 44 delivers a receive start signal ( fig1 ( b )) to the receive clock generator 100 . upon the reception of the receive start signal , the receive clock generator 100 generates a receive clock ( fig1 ( c )) and applies the same to the sampling circuit 84 , the data select circuit 88 and the shift register 86 . the receive clock generated by the receive clock generator 100 is synchronous with the transmission clock signal generated by the microcomputer 20 . the sampling circuit 84 operates in synchronism with the receive clock to receive the transmission signal c in the low state and delivers the transmission signal c to the shift register 86 . the shift register 86 delivers the communication address signal included in the transmission signal c to the register 90 . the register 90 receives the communication address signal ( fig1 ( d )) in response to the select signal ( fig1 ( g )) provided by the data select circuit 88 and delivers a receive address signal included in the communication address signal to the receive address comparator 96 . the receive address comparator 96 compares the input receive address signal with a predetermined receive address signal . if both the receive address signals coincide with each other , the receive address comparator decides that the destination of the transmission signal c is the unit to which the receive address comparator 96 belongs and delivers a coincidence signal to the data select circuit 88 . upon the reception of the coincidence signal , the data select circuit 88 delivers a data select signal ( fig1 ( h )) to the register 92 and delivers a data select signal ( fig1 ( i )) to the register 94 . then , the register 92 reads the lower eight bits of a parallel signal ( fig1 ( e )) representing the angular deflection of the indicator from the shift register 86 and delivers the same to the d / a converter 104 , and the register 94 reads the upper eight bits of the parallel signal ( fig1 ( f )) representing the angular deflection of the indicator from the shift register 86 and delivers the same to the d / a converter 106 . the d / a converter 104 converts the input 8 - bit digital signal into a corresponding analog signal and delivers the analog signal to the speedometer 40 , and the d / a converter 106 converts the upper 8 - bit digital signal into a corresponding analog signal and delivers the same to the speedometer 40 . the indicator of the speedometer 40 is moved according to the input analog signals . the central control unit 12 communicates through the communication network 19 with the speedometer i / o unit 16 to control the angular deflection of the indicator of the speedometer 40 . the central control unit also communicates with the ignition i / o unit 14 and the flasher i / o unit 18 to control the ignition coil 30 and the flasher relay 50 . as is apparent from the foregoing description , in this embodiment , the central control unit 12 is provided with the communication circuit 22 , the i / o units 14 , 16 and 18 are provided respectively with the communication circuits 34 , 44 and 54 , and the communication circuit 22 , 34 , 44 and 54 are interconnected by the communication network 19 for data communication , so that the centralized control of the plurality of i / o units can be achieved by the single central control unit 12 . in the above - described electrical equipment control system in accordance with the present invention for controlling the electrical equipment of a vehicle , the central control units communicates through the data communication network with the plurality of i / o units . accordingly , the electrical equipment control system does not need a plurality of microcomputers and therefore reduces the manufacturing cost of the electrical equipment of the vehicle . moreover , since the i / o units provided with the communication circuits are disposed separately , the i / o port of the central control unit and the i / o units can be interconnected by a comparatively small number of lines and the central control unit can be miniaturized . since the i / o units can readily be replaced with another i / o unit merely by disconnecting the former from the i / o port and connecting the latter to the i / o port , the efficiency of research activities for the development of an electrical equipment control system is improved . the invention being thus described , it will be obvious that the same may be varied in many ways . such variations are not to be regarded as a departure from the spirit and scope of the invention , and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims .