the present invention is described with reference to the attached figures , wherein like reference numerals are used throughout the figures to designate similar or equivalent elements . the figures are not drawn to scale and they are provided merely to illustrate the invention . several aspects of the invention are described below with reference to example applications for illustration . it should be understood that numerous specific details , relationships , and methods are set forth to provide a full understanding of the invention . one skilled in the relevant art , however , will readily recognize that the invention can be practiced without one or more of the specific details or with other methods . in other instances , well - known structures or operations are not shown in detail to avoid obscuring the invention . the present invention is not limited by the illustrated ordering of acts or events , as some acts may occur in different orders and / or concurrently with other acts or events . furthermore , not all illustrated acts or events are required to implement a methodology in accordance with the present invention . the need for a method of measuring a fraction of unreacted polycrystalline silicon ( polysilicon ) in an integrated circuit ( ic ) with fully silicided ( fusi ) gates on a statistically significant sample is addressed by the instant invention , which provides a method of deprocessing an ic in a novel manner to expose any unreacted polysilicon , acquiring an image of a statistically significant sample region using scanning electron microscopy ( sem ), generating a mask image from the sem sample image which identifies all gate regions in the sem sample image , applying the mask image to the sem sample image to produce a masked image of gate regions with unreacted polysilicon , manipulating the masked image to facilitate quantification of the gate regions with unreacted polysilicon , measuring the amount of area with unreacted polysilicon in the manipulated masked image and normalizing the amount of area with unreacted polysilicon to the total gate area in the mask image to produce a computation of a fraction of unreacted polysilicon . fig1 is a flow chart ( 100 ) of the inventive method of measuring the fraction of unreacted polysilicon in an ic . the first step ( 102 ) is to deprocess a portion or all of the ic such that all material around the unreacted polysilicon is removed , without disturbing underlying layers . the second step ( 104 ) is to acquire a top - down sem sample image of a statistically significant sample region of the ic , which includes gate regions , and includes regions of unreacted polysilicon , if present in the gate regions . the third step ( 106 ) is to generate a mask image from the sample image , by a novel method of manipulating the contrast of the sample image and converting non - gate regions to black using automated techniques , such that gate regions of the sample image are reproduced as transparent regions in the mask image . the fourth step ( 108 ) is to apply the mask image to the sample image , producing a masked sample image in which only gate regions contain any image content , including unreacted polysilicon regions , and manipulate the masked sample image to generate an image of the unreacted polysilicon as black regions on a white background . the fifth step ( 110 ) is to quantify the amount of black area in the unreacted polysilicon image , which is proportional to the amount of unreacted polysilicon in the sample region of the ic . the sixth step ( 112 ) is to quantify the amount of transparent area in the mask image , which is proportional to the total amount of gate area in the sample region of the ic . the seventh step ( 114 ) is to divide the quantity of black area in the inverted filtered masked sample image by the quantity of white area in the mask image to produce a computation of the fraction of unreacted polysilicon in the gate region of the ic . fig2 depicts novel steps of the ic deprocessing operation noted in step ( 102 ) of the flowchart in fig1 . the ic ( 200 ) may be in the form of a complete wafer or ic substrate , or a portion of a wafer or ic substrate . it is within the scope of this invention to deprocess a portion of the ic . the ic ( 200 ) is prepared so that material overlying gates is removed in a manner that does not disturb gate sidewall spacer material or layers the gates , such as silicon . the ic ( 200 ) is transferred , as depicted schematically by the arrow ( 202 ), to an oxidizing process apparatus ( 204 ), in which the ic ( 200 ) is exposed to an oxidizing solution ( 206 ), which is substantially composed of a mixture of ammonium hydroxide ( 30 % to 50 % in h 2 o ) and hydrogen peroxide ( 25 % to 35 % in h 2 o ) in the ratio of 4 to 1 , at a temperature between 110 c and 175 c , whereby 115 to 125 c is preferred , for 30 to 50 minutes . the effect of the oxidizing solution on the ic is to oxidize nickel in nickel silicide forming fusi gates on the ic ( 200 ). it is within the scope of this invention to vary the concentration of the ammonium hydroxide , the concentration of the hydrogen peroxide , the ratio of ammonium hydroxide to hydrogen peroxide , the temperature of the oxidizing solution , and the oxidizing exposure time in a manner such that the nickel in the nickel silicide is oxidized . furthermore , it is within the scope of this invention to add or substitute other alkaline chemicals , such as tetra - methyl ammonium hydroxide , for the ammonium hydroxide and other oxidizing chemicals , such as ozone in water , for the hydrogen peroxide in the oxidizing solution ( 206 ). it is also within the scope of the instant invention to apply additional means to accomplish oxidation of the nickel in the oxidizing solution ( 206 ), including adding ultrasonic acoustic energy , commonly called megasonic action , to the solution . the oxidizing process apparatus ( 204 ) may be any equipment for containing the oxidizing solution ( 206 ) and the ic ( 200 ), and for exposing the ic ( 200 ) to the oxidizing solution ( 206 ), for example , a beaker , a spray bottle and sample holder , a semiconductor wafer wet processing hood , or a semiconductor wafer chemical spray tool . still referring to fig2 , after the nickel in the nickel silicide is oxidized , the ic ( 200 ) is transferred , with an optional rinse process and an optional dry process , as depicted schematically by the arrow ( 208 ), to an etching process apparatus ( 210 ), in which the ic ( 200 ) is exposed to an etching solution ( 212 ), which is substantially a mixture of hydrochloric acid ( 40 % to 60 % in h 2 o ), nitric acid ( 60 % to 80 % in h 2 o ) and ethylene glycol , in the ratio of 8 to 1 to 2 , at room temperature , commonly 20 to 28 c , for 40 to 80 minutes . the effect of the etching solution on the ic is to remove all nickel and silicon that formed nickel silicide on the ic ( 200 ) before deprocessing , without removing gate sidewall spacer material such as silicon dioxide or silicon nitride on lateral surfaces of gates on the ic ( 200 ). it is within the scope of this invention to vary the concentration of the hydrochloric acid , the concentration of the nitric acid , the ratio of hydrochloric acid to nitric acid to ethylene glycol , the temperature of the etching solution , and the etching exposure time in a manner such that the nickel in the nickel silicide is oxidized . furthermore , it is within the scope of this invention to add or substitute other acidic chemicals , such as phosphoric acid , for the hydrochloric acid and nitric acid in the etching solution ( 202 ). it is also within the scope of the instant invention to apply additional means to accomplish etching of the nickel silicide in the etching solution ( 212 ), including adding ultrasonic acoustic energy , commonly called megasonic action , to the solution . the etching process apparatus ( 210 ) may be any equipment for containing the etching solution ( 212 ) and the ic ( 200 ), and for exposing the ic ( 200 ) to the etching solution ( 212 ), for example , a beaker , a spray bottle and sample holder , a semiconductor wafer wet acid processing hood , or a semiconductor wafer chemical spray tool . continuing to refer to fig2 , after the nickel silicide is removed from the ic ( 200 ) in the etching processing apparatus ( 210 ), the ic ( 200 ) is removed from the etching processing apparatus ( 210 ), as depicted schematically by the arrow ( 214 ), followed by a second optional rinse process and a second optional dry process . fig3 a and fig3 b are an sem sample image of a sample region of an ic after deprocessing and an expanded portion of the sem sample image , as called for in step ( 104 ) of the flowchart in fig1 . the sem sample image is acquired in a preferred embodiment by backscattered electron imaging using a 5 kv beam and image contrast is optimized using known methods . the sem sample image ( 300 ) shows multiple gate areas that have been deprocessed . an expanded image portion ( 302 ) of the sem sample image ( 300 ) shows two gate areas ( 304 ) that have been deprocessed . gate areas with no unreacted polysilicon appear black in the sem sample image ( 300 ) and the expanded image portion ( 302 ). gate sidewall spacer areas ( 306 ) appear white in the sem sample image ( 300 ) and the expanded image portion ( 302 ). unreacted polysilicon areas ( 308 ) appear gray in the sem sample image ( 300 ) and the expanded image portion ( 302 ). non - gate areas ( 310 ), which are defined for the purposes of this disclosure to mean areas other than gate areas or gate sidewall spacer areas , appear black in the sem sample image ( 300 ) and the expanded image portion ( 302 ). it is within the scope of the instant invention to generate a sample image by other means that clearly distinguish unreacted polysilicon areas , clear gate areas , gate sidewall spacer areas and non - gate areas . fig4 a is a flowchart ( 400 ) of the process for generating an mask image , as called for in step ( 106 ) of the flowchart in fig1 . fig4 b through fig4 d are images of successive steps in the process of generating the mask image . referring to fig4 a , the process of generating the mask image starts with step ( 402 ), which is to start with the sem sample image as input ( 404 ) and increase a contrast of the sem sample image to convert the gate areas to black , gate sidewall spacer areas to white , and the non - gate areas to black , to form a high contrast image ( 406 ) as output . still referring fig4 a , the next step in generating the mask image is step ( 408 ), which is to convert the gate areas in the high contrast image ( 406 ) to white while keeping the gate sidewall spacer areas in the high contrast image ( 406 ) white and the non - gate areas in the high contrast image ( 406 ) black . the black areas are then incrementally expanded at their borders . the output of this step is a bleached gate image ( 410 ). fig4 b shows the bleached gate image ( 420 ) that results from this step . referring once again to fig4 a , the next step in generating the mask image is step ( 412 ), which is to start with the high contrast image ( 406 ) and invert the contrast , so that gates areas are white , gate sidewall spacer areas are black , and non - gate areas are white . the output of this step in an inverted high contrast image ( 414 ). fig4 c shows the inverted high contrast image ( 422 ) that results from this step . referring once again to fig4 a , the last step in generating the mask image is step ( 416 ), which is to combine the inverted high contrast image ( 414 ) with the bleached gate image ( 410 ) to form the mask image ( 418 ), according to the following procedure : regions in the mask image ( 418 ) corresponding to white regions in the inverted high contrast image ( 414 ) and white regions in the bleached gate image ( 410 ) are transparent . regions in the mask image ( 418 ) corresponding to white regions in the inverted high contrast image ( 414 ) and black regions in the bleached gate image ( 410 ) are opaque . regions in the mask image ( 418 ) corresponding to black regions in the inverted high contrast image ( 414 ) and white regions in the bleached gate image ( 410 ) are opaque . regions in the mask image ( 418 ) corresponding to black regions in the inverted high contrast image ( 414 ) and black regions in the bleached gate image ( 410 ) are opaque . fig4 d shows the mask image ( 424 ) that results from this step . transparent regions in the mask image appear as white in ( 424 ) while opaque regions in the mask image appear as black in ( 424 ). in a preferred embodiment , the steps described in reference to fig4 a through fig4 d may be performed using a computing apparatus such as a general purpose computer or a dedicated image processing apparatus . in another embodiment , the steps described in reference to fig4 a through fig4 d may be performed by physically manipulating a printout of the sem sample image . in a further embodiment , the steps described in reference to fig4 a through fig4 d may be performed by a combination of using a computing apparatus and physically manipulating a printout of the sem sample image . fig5 a is a flowchart ( 500 ) of a process for applying the mask image ( 424 ) of fig4 to the sem sample image , as called for in step ( 108 ) of the flowchart ( 100 ) in fig1 . fig5 b is an image of unreacted polysilicon as black regions on a white background , produced by the process of the flowchart ( 500 ) in fig5 a . referring to fig5 a , the process of applying the mask image ( 424 ) of fig4 to the sem sample image starts with step ( 502 ), which is to start with the sem sample image ( 504 ) and retain image information only from regions corresponding to transparent regions in the mask image ( 506 ) which is the mask image ( 424 ) of fig4 , to produce a masked sample image ( 508 ). regions in the masked sample image ( 508 ) corresponding to opaque regions in the mask image are filled in with black . still referring to fig5 a , the next step in applying the mask image ( 506 ) to the sem sample image is step ( 510 ), which is to filter the masked sample image ( 508 ) by increasing the contrast of the masked sample image ( 508 ), resulting in regions corresponding to unreacted polysilicon becoming white , and gate regions with no unreacted polysilicon , as well as regions outside the gate areas , becoming or remaining black , to produce a filtered masked sample image ( 512 ) which contains only regions of white , corresponding to unreacted polysilicon , on a black background . continuing to refer to fig5 a , the last step in applying the mask image ( 506 ) to the sem sample image is step ( 514 ), which is to optionally invert a contrast of the filtered masked sample image ( 512 ) to produce a black and white inverted filtered masked sample image ( 516 ) in which regions corresponding to unreacted polysilicon in the original sem sample image are black on a white background , shown in fig5 b as image ( 518 ). inverting the contrast of the filtered masked sample image ( 512 ) is advantageous because the inverted filtered masked sample image ( 516 ) is easier to analyze visually . in a preferred embodiment , the steps described in reference to fig5 a and fig5 b may be performed using a computing apparatus such as a general purpose computer or a dedicated image processing apparatus . in another embodiment , the steps described in reference to fig5 a and fig5 b may be performed by physically manipulating a printout of the sem sample image . in a further embodiment , the steps described in reference to fig5 a and fig5 b may be performed by a combination of using a computing apparatus and physically manipulating a printout of the sem sample image . the step of quantifying the black area in the inverted filtered masked sample image , as called for in step ( 110 ) of the flowchart ( 100 ) in fig1 , may be performed in a preferred embodiment using a computing apparatus such as a general purpose computer or a dedicated image processing apparatus . in another embodiment , quantifying the black area in the inverted filtered masked sample image may be performed by visual analysis of a printout of the inverted filtered masked sample image . in a further embodiment , quantifying the black area in the inverted filtered masked sample image may be performed by a combination of using a computing apparatus and visual analysis of a printout of the inverted filtered masked sample image . the result of quantifying the black area in the inverted filtered masked sample image is a number corresponding to the amount of unreacted polysilicon in the original sem sample image ( 300 ) in fig3 a , for example the number of black pixels in the inverted filtered masked sample image . the step of quantifying the transparent area in the mask image ( 506 ), as called for in step ( 112 ) of the flowchart ( 100 ) in fig1 , may be performed in a preferred embodiment using a computing apparatus such as a general purpose computer or a dedicated image processing apparatus . in another embodiment , quantifying the transparent area in the mask image ( 506 ) may be performed by visual analysis of a printout of the mask image ( 506 ). in a further embodiment , quantifying the white area in the mask image ( 506 ) may be performed by a combination of using a computing apparatus and visual analysis of a printout of the mask image ( 506 ). the result of quantifying the transparent area in the mask image ( 506 ) is a number corresponding to the amount of gate area in the original sem sample image ( 300 ) in fig3 a , for example the number of transparent pixels in the mask image ( 506 ). the step of computing the unreacted polysilicon fraction , as called for in step ( 114 ) of the flowchart ( 100 ) in fig1 , may be performed , using the amount of black area in the inverted filtered masked sample image from execution of step ( 110 ) in the flowchart ( 100 ) in fig1 , and the amount of transparent area in the mask image ( 506 ) from execution of step ( 112 ) in the flowchart ( 100 ) in fig1 , according to the following expression : unreacted polysilicon fraction =( the amount of black area in the inverted filtered masked sample image ) divided by ( the amount of transparent area in the mask image ( 506 )). the step of computing the unreacted polysilicon fraction may be in a preferred embodiment by a computing apparatus such as a general purpose computer . in other embodiments , the computation of the unreacted polysilicon fraction may be performed manually , or using a hand calculator , or any other means to perform the computation recited above . it is within the scope of the instant invention to substitute other colors for black and white in the images described above , including exchanging black for white . the procedure for measuring the first fraction of unreacted polysilicon , as described above in reference to fig1 , fig2 , fig3 a and fig3 b , fig4 a through fig4 d and fig5 a through fig5 b , is advantageous because it provides statistically significant sample in as little as 4 hours that can be used to characterize a nickel silicide process with less than 10 measurements . by comparison , hundreds of tem samples would be required to provide a comparable characterization , with a corresponding higher cost and longer time delay . in one embodiment , the procedure for measuring the first fraction of unreacted polysilicon may be used to compare different silicide formation processes . in an alternate embodiment , the procedure for measuring the first fraction of unreacted polysilicon may also be used to monitor production of ics using fully silicided gates . furthermore , the procedure for measuring the first fraction of unreacted polysilicon may be used to adjust the fusi nickel silicide process to reduce a fraction of unreacted polysilicon on a second ic . in a further embodiment , a fusi nickel silicide process may be developed by the following process . a first ic may be produced using a first fusi nickel silicide process . a first fraction of unreacted polysilicon may be measured on a sample of the first ic using the process described in the embodiments recited herein . process parameters of the first fusi nickel silicide process , such as a thickness of a deposited nickel layer , or silicide formation temperature and / or time , may be adjusted to generate a second fusi nickel silicide process . this adjustment may be made based on the first fraction of unreacted polysilicon . a second ic may be formed using the second fusi nickel silicide process . a first fraction of unreacted polysilicon may be measured on a sample of the second ic using the process described in the embodiments recited herein . the first fraction of unreacted polysilicon from the first ic may be compared to the first fraction of unreacted polysilicon from the second ic to allow selection of a preferred fusi nickel silicide process .