fig2 is a schematic diagram of an electronic vane relay architecture 20 according to the present invention . the electronic vane relay architecture 20 may be used in connection with the track configuration shown in fig1 , wherein it is the vital relay circuit 12 . as described above , a prior art electromechanical vane relay operates by producing torque that drives mechanically linked metallic contacts wherein the torque is proportional to the product of : ( i ) the current in the local winding , ( ii ) the current in the control / track winding , and ( iii ) the cosine of the angular difference of those currents . the current portion of the product is an indication of whether a train or a broken rail is present in the track section being monitored , and the phase portion of the product is an indication of whether a fault condition exists between track sections . in contrast , in electronic vane relay architecture 20 , the determination of sufficient current and phase difference for operation of the relay are determined independently from one another in an electronic manner and combined as a logical ( digital ) and function to deliver a dc output . in addition , the current determination is based solely on the control / track current , entirely independent of the local voltage . as seen in fig2 , a control transformer 25 ( connected to a track transformer such as track transformer 13 in fig1 ( not shown )) operates as a current transformer , i . e ., it translates the primary track current into a proportional voltage . the transfer function ( secondary voltage / primary current ) is controlled by the turns ratio of the control transformer 25 and the secondary load provided by resistor 30 . to achieve a particular input impedance , such as the input impedance of the vane relays used in many systems ( i . e ., 62 ω ), a resistor 35 is connected in series with the control transformer 25 . diodes 40 and 45 take the output of the control transformer 25 and produce a dc voltage proportional to the track current . the dc voltage is input into level detector 50 . as is known in the art , a level detector is a device that takes a voltage as an input and outputs an oscillating signal , e . g ., a square wave , if the input voltage is greater than or equal to a predetermined threshold voltage value , and outputs nothing if the input voltage is less than a predetermined threshold voltage value . example level detectors are described in u . s . pat . nos . 4 , 384 , 250 , entitled “ vital vehicle movement detector .” and u . s . pat . no . 4 , 056 , 739 , entitled “ fail - safe electronic polarized relay ,” the disclosures of which are incorporated herein by reference . in the particular embodiment shown in fig2 , the predetermined threshold voltage value of level detector 50 is the voltage that is produced by control transformer 25 and diodes 40 and 45 in response to a control current of approximately 50 ma , and the output of level detector 50 when the predetermined threshold value is met or exceeded is a square wave switching at approximately 20 khz . the output of level detector 50 is provided as one input into optical isolator / vital and gate 55 . the second input into optical isolator / vital and gate 55 and the output thereof will be described in greater detail herein . however , the important point to note is that the level detector 50 will output an oscillating signal only when the voltage output by control transformer 25 and diodes 40 and 45 meets or exceeds the predetermined threshold voltage value , i . e ., when the control / track current meets or exceeds the predetermined threshold voltage value . those values are chosen to be the values that indicate that a train is not present and there is no broken rail in the track section being monitored by the electronic vane relay architecture 20 . thus , according to this aspect of the invention , the level detector 50 will output an oscillating signal only if there is sufficient current to indicate that neither a train nor a broken rail is present in the track section in question . this is determined by the control / track current and voltage only , and independent of the local voltage . in addition , the ac voltage output of the control transformer 25 ( which is proportional to the control / track current ) is input into high speed solid state relay 60 . the solid state relay 60 in turn optically transmits a control signal based on the received input voltage signal to synchronous switching element 65 . as seen in fig2 , electronic vane relay architecture 20 also includes a local transformer 70 ( connected to the track supply line wires such as line wires 6 and 7 in fig1 ( not shown )) that operates as a step down transformer , i . e ., it translates the local voltage into a lower proportional ac voltage . that ac voltage is input into the synchronous switching element 65 . thus , the synchronous switching element 65 has input thereto a control signal that controls the switching of the synchronous switching element 65 based on the ac voltage that is proportional to the control / track current and an ac voltage that is proportional to the local voltage . the solid state relay 60 and the synchronous switching element 65 together operate as a synchronous rectifier . as used herein , the term synchronous rectifier shall refer to a device that takes two ac signals having the same frequency as inputs and outputs a first signal ( e . g ., half wave rectified ) having a first polarity if the signals are in phase and a second signal ( e . g ., half wave rectified ) having a second , opposite polarity if the signals are 180 ° out of phase . other phase relationships ( e . g ., 90 ° out of phase ) will result in a signal of mixed polarity ( wherein the average voltage for a 90 ° out of phase condition will be zero ). thus , synchronous switching element 65 outputs a signal having a first polarity ( e . g ., positive ) if the ac voltage that is proportional to the control / track current and the ac voltage that is proportional to the local voltage are in phase with one another , and a signal having an opposite polarity ( e . g ., negative ) if the ac voltage that is proportional to the control / track current and the ac voltage that is proportional to the local voltage are 1800 out of phase with one another . in particular , synchronous switching element 65 includes a switching mechanism that turns on and gates the ac voltage that is proportional to the local voltage through during the positive half cycle of the ac voltage that is proportional to the control / track current , and turns off and gates nothing through during the negative half cycle of the ac voltage that is proportional to the control / track current . the output of synchronous switching element 65 is input into averaging filter 75 . averaging filter 75 produces a dc output signal that is an average of the ac voltage signal that is input thereto . it should be noted that the inductance value of the inductor forming a part of the averaging filter 75 is extremely high , e . g ., on the order of 50 - 150 henries . the use of averaging filter 75 is preferred to ensure that level detector 80 , described below , responds only if the synchronous switching element 65 is operating properly . if a peak filter ( simple capacitor ) were used instead , a sequence of component failures could satisfy the level detector 80 regardless of phase differential between the control / track current and the local voltage . of chief concern is a series of component failures , each of which is undetectable , followed by a shorted synchronous switching element 65 , the consequence being continued operation regardless of phase reversal and therefore continued operation of the output in the event of a failed insulated joint . the voltage signal output by the averaging filter 75 is input into level detector 80 . as described above in connection with level detector 50 , level detector 80 will output an oscillating signal , e . g ., a square wave , only when the voltage output by averaging filter 75 meets or exceeds a predetermined threshold voltage value , and will output nothing if the voltage output by averaging filter 75 is less than the predetermined threshold voltage value ( including negative values ). the predetermined threshold voltage value is chosen to correspond to the voltage that would be output by averaging filter 75 in cases where the ac voltage that is proportional to the control / track current and the ac voltage that is proportional to the local voltage are nominally in phase , meaning they are in phase within a particular predetermined amount . for example , the ac voltage that is proportional to the control / track current and the ac voltage that is proportional to the local voltage may be considered to be nominally in phase when they are at least within 45 ° of one another . such tolerance to phase shift is necessary because in operation , the control input will typically lag the local input due to the inductance of the rails . thus , as will be appreciated , level detector 80 will output an oscillating signal only when the ac voltage that is proportional to the control / track current and the ac voltage that is proportional to the local voltage are nominally in phase , because it is only then that output of synchronous switching element 65 and averaging filter 75 will output a positive polarity signal of sufficient magnitude . diodes 85 , 90 , 95 and 100 are coupled to local transformer 65 as shown in fig2 . diodes 85 , 90 , 95 and 100 produce positive and negative rectified ( dc ) voltage sources (+ l ) and (− l ). the output level detector 80 and positive source + l are input into a half - wave doubler circuit 105 . as is known in the art , a half - wave doubler circuit receives a dc source voltage and produces a dc output voltage of polarity opposite ( the magnitude may differ ) to that of its source voltage only if it also receives a second , oscillating input such as a square wave input . if either the source voltage or the oscillating input is missing , the half - wave doubler circuit outputs nothing . essentially , a half - wave doubler circuit functions as a fail - safe and gate , i . e . it produces an opposite polarity output only with an oscillating input and an applied source voltage . both inputs , oscillating and source voltage , are required for an opposite polarity output . with only one of the two inputs , no component or combination of component failures can produce an opposite polarity output . examples of suitable half wave doubler circuits for use in the present invention are shown in fig3 a and 3b . thus , in fig2 , half - wave doubler circuit 105 will output a negative polarity voltage signal only if it receives an oscillating signal from level detector 80 . as noted above , level detector 80 will output an oscillating signal only when the ac voltage that is proportional to the control / track current and the ac voltage that is proportional to the local voltage are in phase . thus , the output of half - wave doubler circuit 105 is an indicator of the phase relationship between the control / track current and the local voltage , i . e ., if a negative polarity voltage signal is present at the output of the half - wave doubler circuit 105 , it means the two currents are nominally in phase . the output of half - wave doubler circuit 105 is input into optical isolator / vital and gate 55 . as noted above , optical isolator / vital and gate 55 also receives the output of level detector 50 . the optical isolator / vital and gate 55 will output an oscillating signal only if : ( i ) the output of level detector 50 is an oscillating signal ( meaning that the control / track current has been determined to be of sufficient magnitude to indicate that no train is present and not rail is broken ), and ( ii ) the output of half - wave doubler circuit 105 is a negative polarity voltage signal ( meaning that the control / track current and local voltage are nominally in phase and thus there is not an insulated joint fault condition ); if either signal is missing , then optical isolator / vital and gate 55 outputs nothing . the output of optical isolator / vital and gate 55 is input into half - wave doubler circuit 110 . also input into the half - wave doubler circuit 110 is the negative source (− l ) generated by diodes 85 , 90 , 95 and 100 . the half - wave doubler circuit i 10 will output a positive polarity signal only if the input it receives from optical isolator / vital and gate 55 is an oscillating signal . thus , a positive polarity signal output from the half - wave doubler circuit 110 proves that the control / track current is greater than the predetermined threshold value ( e . g ., 50 ma ) and that the local and control / track currents are nominally in phase . because control / track input current magnitude and phase comparison are independently determined according to the present invention , sensitivity to control / track current is not influenced by phase or magnitude of the local input . the output of the half - wave doubler circuit 110 may be used directly as an input to the railroad signaling system in question , wherein it acts as the vital relay output . however , in most applications , the output of the half - wave doubler circuit 110 is not of sufficient power for that purpose . thus , as an alternative , as shown in fig2 , the output of the half - wave doubler circuit 110 may be input into output circuitry 115 that acts as a power conversion circuit for driving relay 120 , such as a pn - 150 relay manufactured by the assignee of the present invention . the output circuitry 115 includes pulse width modulator 125 and power switching fets 130 that drive a transformer 135 . output of half - wave doubler # 1 furnishes the control voltage to the 1524 control chip ; it produces the gate signals that alternately turn on the fets driving the transformer . in this case , the output power of the half - wave doubler circuit 110 is insufficient to also act as the source for the power switching fets 130 , and therefore the positive source + l is used as the source for the power switching fets 130 . fig4 a and 4b are a schematic diagram of the electronic vane relay architecture 20 according to one particular embodiment of the present invention . specifically , fig4 a and 4b show one particular implementation of the solid state relay 60 and the synchronous switching element 65 . the elements identified as k 1 and k 2 are solid state relays , such as the model aqv225 relay sold by aromat corporation of new providence , new jersey . switching speed is preferably on the order of about 100 microseconds . a diode symbol bounded by terminals a and b is intended as a representation of the control element , and the mechanical switch enclosed in the dashed box is intended as a representation of the switching element ( pseudo contacts ). current through terminals a and b effectively produces a low resistance connection from terminals c to d . the control element and the switching element ( pseudo contacts ) share no common connection ; they are isolated , being optically coupled . on each positive excursion at a of the control transformer 25 , the pseudo contact of k 1 closes and a 200 microsecond negative going pulse is delivered to terminal e of the 555 timer 140 . in response , its output on pin f switches high for a much greater time , controlled by the resistor and capacitor connected to pins g & amp ; h . additionally , the pseudo contacts of k 2 , coupled to 12v to 5v dc to dc converter 143 , close and gate the triac 145 on . the time is set to approximately 75 % of one half the period of the operating frequency . for example , for 50 or 60 hz applications , the time is set to approximately 6 milliseconds , and for 100 hz applications , the time is set to approximately 3 milliseconds . it is expected b of the local transformer 75 is nominally in phase with a of the control transformer 25 and therefore the triac 145 is turned on for a substantial portion of time during which a and b are simultaneously positive . it is important that the gate of the triac 145 be switched off before the negative half - cycle of a is initiated otherwise it will remain on continuously and disrupt the synchronous rectification process . limiting on time of the gate of the triac 145 also allows for a moderate amount of phase shift of local with respect to control . by limiting the on time of the gate of the triac 145 to 75 % of one - half the period of the operating frequency , a phase shift of approximately 45 degrees can be tolerated . in track circuit operation , the control input will lag local due to inductance of the rails , and therefore , tolerance to phase shift is necessary . thus , if a and b are nominally in phase , a positive voltage the level detector 80 and the half - wave doubler 105 , thereby producing a negative polarity voltage signal that , as discussed above in connection with fig2 , confirms the phase relationship of a and b . if a and b are out of phase , meaning they are not nominally in phase , which can occur resulting from a failed insulated joint 3 , synchronous rectification will produce a negative voltage . the level detector 80 will not respond to a negative voltage and thus the failed insulated joint 3 is detected because the relay 120 will de - energize . it is shown that synchronous rectification is critical to the task of ensuring that local and control are essentially in phase but it is of great importance to ensure no component failures can mask the in phase relationship . for example , if the triac 145 or gate control thereof fails and the triac 145 is either shorted or on continuously , the voltage at a 1 will revert to a sine wave instead of half - wave rectification . in that event , the averaging filter 75 will average the input to the level detector 80 to zero volts ; the level detector 80 will not respond and the relay 120 will de - energize . the averaging filter 75 was selected instead of a peak filter because its failure modes preclude the possibility of continued operation with a series of component failures . peak filtering is realized with a single capacitor . under normal conditions , a peak filter will produce a much greater voltage than an averaging filter like averaging filter 75 . however , the level detector 80 can be scaled to operate at a significantly greater voltage and , therefore , a peak filter could operate just as well . sequential component failures are undetectable , however , and can result in inability to detect phase reversal as the result of a failed insulated joint 3 . with a single capacitor , if either connection opens , the level detector 80 input will revert to positive half sine wave dc pulses . the level detector 80 will respond with an output approximately one - half the time corresponding to each input pulse . the pulsating response will ripple through to the final output stage ( i 15 ), producing reduced voltage to the relay 120 , but still sufficient to retain the relay 120 in an energized state . thus , an open lead to the peak filter capacitor is undetectable . subsequently , if the triac 145 or control thereof fails and it is continuously in conduction , the level detector 80 will continue its pulsating response with the relay 120 held energized . if phase reversal then occurs as a result of a failed insulated joint 3 it will be undetected and jeopardize integrity of the signal system . with the averaging filter 75 , disconnection of either capacitor thereof decreases the voltage to the level detector 80 and response to an ac input averages an output to zero . if both capacitors open , the net dc that is produced will decrease , but the level detector 80 will marginally continue to function . thereafter , if the triac 145 shorts , it will provide an ac input to the averaging filter 75 , which in turn will produce an output that is well blow the level required by level detector 80 ( it will be at or near zero ). the failure of triac 145 is thus detectable . while specific embodiments of the invention have been described in detail , it will be appreciated by those skilled in the art that various modifications and alternatives to those details could be developed in light of the overall teachings of the disclosure . accordingly , the particular arrangements disclosed are meant to be illustrative only and not limiting as to the scope of the invention which is to be given the breadth of the claims appended in any and all equivalents thereof .