in the following detailed description , reference is made to the accompanying drawings which form a part hereof , and in which is shown by way of illustration specific embodiments in which the invention may be practiced . these embodiments are described in sufficient detail to enable those of ordinary skill in the art to practice the invention . it should be understood , however , that the detailed description and the specific examples , while indicating examples of embodiments of the invention , are given by way of illustration only and not by way of limitation . from this disclosure , various substitutions , modifications , additions rearrangements , or combinations thereof within the scope of the present invention may be made and will become apparent to those skilled in the art . in accordance with common practice the various features illustrated in the drawings may not be drawn to scale . the illustrations presented herein are not meant to be actual views of any particular method , device , or system , but are merely idealized representations that are employed to describe various embodiments of the present invention . accordingly , the dimensions of the various features may be arbitrarily expanded or reduced for clarity . in addition , some of the drawings may be simplified for clarity . thus , the drawings may not depict all of the components of a given apparatus ( e . g ., device ) or method . in addition , like reference numerals may be used to denote like features throughout the specification and figures . it should be understood that any reference to an element herein using a designation such as “ first ,” “ second ,” and so forth does not limit the quantity or order of those elements , unless such limitation is explicitly stated . rather , these designations may be used herein as a convenient method of distinguishing between two or more elements or instances of an element . thus , a reference to first and second elements does not mean that only two elements may be employed there or that the first element must precede the second element in some manner . also , unless stated otherwise a set of elements may comprise one or more elements . embodiments of the present invention comprise apparatuses and methods to improve the efficiency of power delivery to charge storage devices and fuze electronics with power supplies and power needs that vary over time . fig3 is a simplified block diagram of a fuze power conversion circuit 100 according to one or more embodiments of the present invention . a setter signal 105 from a launch apparatus ( not shown ) is conveyed by an inductive setter . from the setter signal , an ac signal 115 is generated by a coil assembly 110 . the ac signal 115 may be used by a message extractor 128 to extract fuze programming and other information from the ac signal 115 . for example , the ac signal 115 may include amplitude modulated or frequency modulated signals on the base ac signal 115 as the message . the ac signal 115 feeds a rectifier 120 ( such as , for example , a full - wave diode bridge ) to convert the ac signal 115 to a direct current ( dc ) signal 125 ( may also be referred to herein as a rectifier output 125 ). a capacitor c 1 may be used to filter the rectified voltage to create a more stable and smooth dc signal 125 . a resistor r 1 causes a small voltage drop between the dc signal 125 and a power source signal 135 ( may also be referred to herein as a dc source signal 135 or a dc input signal 135 ). a current monitor 140 coupled to the dc signal 125 and the power source signal 135 may be used to sense the voltage drop across the resistor r 1 and thus evaluate a current on the power source signal 135 . as a non - limiting example , the current monitor 140 may be an amplifier coupled between the dc signal 125 and the power source signal 135 to generate a source current indicator 145 as a voltage correlated to the current on the power source signal 135 , which may be indicated by the voltage drop across the resistor r 1 . of course , other current monitors 140 may also be used , such as , for example , a current monitor 140 that can directly sense the current on the power source signal 135 without requiring resistor r 1 and the voltage drop therefrom . a voltage monitor 150 coupled to the dc signal 125 or the power source signal 135 ( fig3 illustrates a connection to the dc signal 125 ) may be used to sense a voltage on the power source signal 135 . as a non - limiting example , the voltage monitor 150 may be a simple resistor divider network ( not shown ) to generate a source voltage indicator 155 as a voltage correlated to the voltage on the power source signal 135 . of course , other voltage monitors 150 may also be used , such as , for example , a buffer or an amplifier coupled to the resistor divider network or to the power source signal 135 . the power source signal 135 feeds a dc - dc converter 200 ( may also be referred to herein as a power converter 200 ) for generating a power output signal 185 ( may also be referred to herein as a dc output signal 185 ). as a non - limiting example , the dc - dc converter 200 may be a buck converter that uses a switching regulator 250 and pulse - width modulation of currents through an inductor l 1 . the power output signal 185 may operably couple to a charge storage device c 2 , such as , for example , a capacitor , a bank of capacitors , a super - capacitor , or a bank of super - capacitors . the charge storage device c 2 may be used to store energy produced by the dc - dc converter 200 for later use by the fuze electronics 190 ( may also be referred to herein more generically as a load 190 ). in addition , the charge storage device c 2 may assist in filtering the power output signal 185 to produce a smoother and more stable dc output . of course , while not shown , a person of ordinary skill in the art will recognize that other passive components such as resistors and additional capacitors ( not shown ) may be used in filtering the power output signal 185 . an output voltage monitor 170 may be included to sense a voltage on the power output signal 185 . the output voltage monitor 170 may be embodied as a simple resistor divider network ( not shown ) to generate an output voltage indicator 175 as a voltage correlated to the voltage on the power output signal 185 . of course , as with the voltage monitor 150 , the output voltage monitor 170 may be configured in many different ways . as non - limiting examples , a buffer may be used or an amplifier coupled to a resistor divider network may be used . moreover , the output voltage indicator 175 may be conditioned with processes , and apparatuses configured to perform the processes , such as filtering or voltage level adjustments up or down to achieve a substantially smooth voltage correlated to the power output signal 185 and at a level for use by a combiner 300 . as will be explained more fully below with reference to fig4 , 5 a , and 5 b , the combiner 300 may combine one or more of the source current indicator 145 , the source voltage indicator 155 , and the output voltage indicator 175 , to generate a current adjustment signal 395 to the switching regulator 250 . in the buck converter embodiment illustrated in fig3 , a switched power output 183 drives the inductor l 1 and the charge storage device c 2 to create the power output signal 185 . a high sense signal 185 coupled to the inductor l 1 may feed back to the switching regulator 250 as an indication of the voltage produced by the dc - dc converter 200 . in addition , a feedback resistor r 2 may be coupled between the high sense signal 185 and the power output signal 185 to create a small voltage drop between the high sense signal 185 and the power output signal 185 . the power output signal 185 may be coupled to the switching regulator 250 as a low sense signal 188 such that the voltage drop across feedback resistor r 2 indicates an amount of current being supplied by the power output signal 185 . in some embodiments , the power output signal 185 may be coupled to the charge storage device c 2 and the fuze electronics 190 to share the current produced by the dc - dc converter 200 . in such a configuration , power not used by the fuze electronics 190 as a fuze power input 195 will charge the charge storage device c 2 . thus , when power is no longer being supplied by the setter signal , and as a result , the dc - dc converter 200 , the fuze electronics 190 may draw from the charge storage device c 2 to provide additional power . in other embodiments , the power source signal 135 may be used as the fuze power input 195 . in such a configuration , the amount of power available to the dc - dc converter 200 may be reduced by the amount of power used by the fuze power input 195 . the power output signal 185 will charge the charge storage device c 2 . in such a configuration , when power is no longer being supplied by the setter signal 105 , the fuze electronics 190 may draw from the charge storage device c 2 to provide additional power on an additional fuze power input 198 . as non - limiting examples for one embodiment , the voltage level on the power output signal 185 may be in a range of about 10 - 25 volts while the voltage level on the power source signal 135 may be in a range of about 28 - 32 volts . conventional dc - dc converters generally track a voltage on the output and feed this voltage back to a pulse - width modulation control to adjust pulse widths of the current through the inductor l 1 to control overall voltage levels on the output . generally , dc - dc converters don &# 39 ; t track input voltages and input currents because those parameters are usually less important , or well known , in the overall system and the important factor for the dc - dc converter is to create a stable output at a specified voltage . however , with fuze electronics 190 powered by inductive setters 105 , the amount of power available is very limited . as a result , it is desirable to capture as much of that energy as possible . in addition , the amount of current or power that may be drawn from the inductive setter is required to be maintained at or below a predefined limit . as discussed above , with reference to fig1 , for many dc - dc converters with a power limit on the input , the energy capture efficiency may be only 50 % for charging a capacitor . accordingly , to substantially optimize charging of the charge storage device c 2 , it may be useful to track the input to the dc - dc converter 200 as a function of voltage , current , or power to better deliver current to the charge storage device c 2 for storing energy to be used later by the fuze electronics 190 . embodiments of the present invention provide more efficient energy capture for inductive fuzing applications . the embodiments monitor output power from the inductive setter 110 and draw substantially near the maximum available power until the charge storage device c 2 is fully charged . as the fuze electronics 190 power requirements fluctuate ( i . e ., present a time - varying load ), the increased or decreased available energy for the charge storage device c 2 is detected and excess energy is re - directed into the charge storage device c 2 in response to the detected available energy . in other words , the energy capture process for inductive fuzing applications increases power capture efficiency by dynamically throttling the charging current to the charge storage device c 2 based on the amount of available energy from the inductive setter 110 . the switching regulator 250 may be configured to have a current limit ( e . g ., based on the high sense signal 185 and the low sense signal 188 ) that is used to limit the cycle by cycle maximum current through the inductor l 1 as well as a maximum limit for any component in series with the charging current . this current limit may be set well above the peak storage capacitor charging current such that current is available for both the charge storage device c 2 and the fuze electronics 190 . in addition , the charge storage device c 2 may have a voltage charging limit at which it is fully charged . once the charge storage device c 2 reaches this predetermined voltage threshold , the combiner 300 may use the output voltage indicator 175 to control the current adjustment signal 395 to substantially reduce the amount of power produced by the dc - dc converter 200 . the reduced power from the dc - dc converter 200 is sufficient because only a trickle power is needed to maintain the charge storage device c 2 at full charge or the power output need is substantially reduced because there is only a need to supply power to the fuze electronics 190 . the buck converter and the switching regulator 250 described herein use an example of a synchronous buck converter using a forward current switch ( i . e ., p 1 ) and a reverse current switch ( i . e ., n 1 ). however , other embodiments , such as a basic buck converter ( which uses a reverse bias diode in place of the reverse current switch ) or a boost converter may also be used in embodiments of the present invention . in addition , the switching regulator 250 described herein uses a constant off - time type control for the pulse - width modulation . other pulse - width modulation may be used with embodiments of the present invention , such as , for example , a constant period type control . fig4 is a simplified block diagram illustrating additional detail of the switching regulator 250 and the combiner 300 of the fuze power conversion circuit 100 of fig3 . both fig3 and 4 are used in much of the description of operation of the switching regulator 250 and the combiner 300 . a comparator 280 compares the difference in voltages on the low sense signal 188 and the high sense signal 184 , which are connected across the feedback resistor r 2 . a p - channel transistor p 1 is coupled between the power source signal 135 and the switched power output 183 . an n - channel transistor n 1 is coupled in series between the p - channel transistor p 1 and ground . when the voltage drop across the feedback resistor r 2 reaches a high threshold value , a pulse - width - modulation ( pwm ) control circuit 290 negates pwm signal 295 p to turn off the p - channel transistor p 1 and asserts the pwm signal 295 n to turn on the n - channel transistor n 1 . in other words , the current on the power output signal 185 has reached a high enough level that the increasing current storing energy in the inductor l 1 should be reversed through the n - channel transistor n 1 to extract the stored energy in the inductor l 1 . an off timer 270 tracks the voltage on the low sense signal 188 to estimate when a voltage level on the power output signal 185 has fallen below a low threshold value . at that time , the pwm control circuit 290 asserts the pwm signal 295 p to turn on the p - channel transistor p 1 and negates the pwm signal 295 n to turn off the n - channel transistor n 1 . in other words , the current on the power output signal 185 has reached a low enough level that sufficient energy stored in the inductor l 1 has been extracted and current should be supplied to the inductor l 1 to begin storing energy in the inductor l 1 . this process of reversing current through the inductor l 1 is repeated such that the voltage drop across the feedback resistor r 2 oscillates between the high threshold and the low threshold . a voltage level adjuster 260 coupled between the comparator 280 and the high sense signal 185 may be used to adjust the high threshold value at which the pwm control circuit 290 shuts off the p - channel transistor p 1 . in a baseline configuration , a gain stage 255 drives resistor r 3 to create a baseline voltage for the voltage level adjuster 260 . a feedback voltage 251 may be compared to a reference voltage 252 by the gain stage 255 to create the baseline voltage . as a non - limiting example , the reference voltage 252 may be set to about 1 . 25 volts and the feedback voltage 251 may be coupled to a voltage divider coupled to the low sense signal 188 , such that at a steady state condition on the feedback voltage 251 is substantially near the reference voltage 252 . in this configuration , as the current on the power output signal 185 increases , the voltage on the power output signal 185 will decrease slightly , which will cause the gain stage 255 to slightly increase the comparator threshold at the comparator 280 . the combiner 300 may further modify the comparator threshold through the current adjustment signal 395 . reverse bias zener diodes d 1 and d 2 may be configured with a reverse breakdown voltage near or above the baseline voltage produced by the gain stage 255 and resistor r 3 . as stated earlier , the output voltage indicator 175 may be configured to produce a voltage correlated to the predetermined voltage threshold at which the charge storage device c 2 is fully charged . at that point , the output voltage monitor 170 may be configured to place a low enough voltage on the output voltage indicator 175 to drive the current adjustment signal 395 lower . the lower current adjustment signal 395 will change the compartor threshold at the comparator 280 via the voltage level adjuster 260 , such that the current output on the power output signal 185 is throttled back to a much lower level . as another control path , a power input determiner 320 may generate a current level adjustment signal 325 to lower the compartor threshold at the comparator 280 via the voltage level adjuster 260 . the power input determiner 320 uses the source current indicator 145 and the source voltage indicator 155 to generate the current level adjustment signal 325 . thus , the power input determiner 320 can make adjustments to the amount of current produced on the power output signal 185 , via the current level adjustment signal 325 , in response to the amount of power being delivered on the power source signal 135 . fig5 a and 5b are simplified block diagrams illustrating two example embodiments for the power input determiner 320 . in fig5 a , a digital embodiment of the power input determiner 320 a includes an analog - to - digital converter 330 to convert the source current indicator 145 to a digital current value 345 . another analog - to - digital converter 340 converts the source voltage indicator 155 to a digital voltage value 355 . a digital multiplier 350 multiplies together the digital voltage value 335 and the digital current value 345 to arrive at a digital power value 355 . a digital - to - analog converter 360 converts the digital power value 355 back to an analog signal as the current level adjustment signal 325 . a signal conditioner 380 a may be included to adjust the current level adjustment signal 325 to appropriate levels for the voltage level adjuster 260 by filtering , adjusting the voltage level , or a combination thereof . the digital multiplier 350 may be included in a controller 390 configured for performing additional functions for the fuze electronics 190 . in some embodiments , the analog - to - digital converters 330 and 340 may be included in the controller 390 . in other embodiments , the analog - to - digital converters 330 and 340 may be discrete parts . moreover , a single analog - to - digital converter ( 330 or 340 ) may be time multiplexed to provide the digital voltage value 335 from the source voltage indicator 155 and provide the digital current value 345 from the source current indicator 145 . in addition , the digital - to - analog converter 360 may be a discrete part or included in the controller . when included in the controller , the signal conditioner 380 a may perform its functions digitally before or after the digital - to - analog conversion . in fig5 b , an analog embodiment of the power input determiner 320 b is illustrated . an analog multiplier 370 may be configured to perform a multiplication of the source current indicator 145 and the source voltage indicator 155 to generate an analog power output 375 . a signal conditioner 380 b may be included to adjust the current level adjustment signal 325 to appropriate levels for the voltage level adjuster 260 by filtering , adjusting the voltage level , or a combination thereof . to mitigate the impact of short term transient behavior , both the source current indicator 145 and the source voltage indicator 155 may be averaged over a sliding time window to determine an average value for the appropriate indicator over the time window . the averaging may be performed in the analog domain , such as , for example , by appropriate low - pass filtering circuitry the averaging may also be performed in the digital domain by averaging multiple samples of the digital current value 345 and the digital voltage value 355 over the sliding time window . providing average values may assist in generating a more stable power output by removing noise or other undesired transients from the raw signals . of course , the length of the sliding time window may be adjusted depending on the application , the expected variations in signals , and the response time of the feedback loops in the dc - dc converter 200 ( fig3 ). in some embodiments , the rectifier output ( 125 in fig3 ) may vary over a wide voltage range . in such embodiments , it may be best to use a current control system that is responsive to the overall input power as a product of the source voltage indicator 155 and the source current indicator 145 , as described above . these embodiments may be referred to herein as input - power responsive systems . in other embodiments , it may be appropriate to control the current on the power output signal 185 in response to only the source voltage indicator 155 or only the source current indicator 145 . in such embodiments , the multiplier may be configured to multiply the appropriate indicator ( voltage 155 or current 145 ) by a constant or unity . in an input - voltage responsive system , the power input determiner 320 would generate a voltage indication . thus , the dc - dc converter 200 can throttle current to the charge storage device c 2 by pulling the rectified voltage down to a minimum level . in other words , a voltage level on the power source signal 135 can be monitored . as more power is drawn from the inductive setter 110 , the voltage level on the power source signal 135 will decrease . the dc - dc converter 200 will pull as much power as possible from the inductive setter 110 until the voltage level on the power source signal 135 is pulled down to a preset level and then throttle the current on the power output signal 185 , via the current level adjustment signal 325 , to maintain the voltage level on the power source signal 135 at or near the preset level . in an input - current responsive system , the power input determiner 320 would generate a current indication to throttle the dc - dc converter 200 . in other words , the dc - dc converter 200 will increase the current on the power output signal 185 until the average current on the power source signal 135 reaches a preset maximum level . then , the dc - dc converter 200 can throttle the current on the power output signal 185 , via the current level adjustment signal 325 , to draw at or near the maximum specified current for the power source signal 135 . fig6 a illustrates plots of various signals for the fuze power conversion circuit of fig3 when configured in an input - power responsive system . fig6 b illustrates the plots of fig6 a with noise and oscillations removed to better see the average dc signals for the fuze power conversion circuit of fig3 . fig3 will also be referred to in discussing fig6 a and 6b . line 610 illustrates “ voltage in ” on the power source signal 135 . line 620 illustrates “ current in ” on the power source signal 135 . line 660 illustrates “ voltage out ” on the power output signal 185 and line 670 illustrates “ current out ” on the power source signal 135 . line 630 illustrates “ power in ” on the power source signal 135 as a product of the voltage in 610 and the current in 620 . the voltage in 610 is shown in × 10 volts and the voltage out 660 is shown in volts . the current in 620 and the current out 670 are shown in amps . the power in 630 is shown in watts . at time 605 , power is applied at the inductive setter 110 and the power in line 630 rises rapidly . this rapid rise is opposed to a conventional system as illustrated in fig1 and 2 wherein the power rises slowly . once the power in line 630 reaches a specified power level , the dc - dc converter 200 begins to throttle the current on the power output signal 185 to maintain the power in line 630 at or near the specified power level . when the charge storage device c 2 reaches a full charge , the voltage out line 660 will go over the predetermined voltage threshold indicating the charge storage device c 2 is fully charged . at that point , indicated by time 695 , the feedback path with the output voltage monitor 170 will substantially reduce the current output on the power output signal 185 , which also causes the voltage in line 610 , the current in line 620 , and the voltage out line 660 to drop . input - current responsive systems would operate similar to the curves shown in fig6 a and 6b except that there would be no need to monitor the power in line 630 and the current in line 620 would be held near the predefined level for input current . similarly , input - voltage responsive systems would operate similar to the curves shown in fig6 a and 6b except that there would be no need to monitor the power in line 630 and the voltage in line 610 would be held near the predefined level for input voltage . although the present invention has been described with reference to particular embodiments , the present invention is not limited to these described embodiments . rather , the present invention is limited only by the appended claims and their legal equivalents .