in fig1 there is shown a circuit diagram of a first embodiment of an analog voltage memory device 10 in accordance with the present invention comprising an operational amplifier 11 , a reed relay 13 and a mosfet 14 . an output terminal 11c of the operational amplifier 11 is connected through an input resistor 12 to one of two relay contacts 13a of the reed relay 13 , and the other contact is connected to the gate of mosfet 14 . one end of a nonpolarized electrolytic capacitor 15 is connected to the gate of mosfet 14 while the other is grounded . the source of mosfet 14 is connected to one end of an output resistor 16 whose the other end is grounded and to an inverting input terminal 11a of the operational amplifier 11 . the input voltage vin is applied to an noninverting input terminal 11b . one end of a coil 13b of the reed relay 13 is connected to a positive voltage source + v through a switch 17 while the other end is grounded . the drain of the mosfet 14 and a positive terminal 11d of the operational amplifier 11 are also connected to the positive voltage source + v , and a negative terminal 11e is connected to a negative voltage source - v . the output voltage vout of the analog voltage memory device 10 is derived as a source follower voltage of the mosfet 14 . next the mode of operation of the first embodiment with the above construction will be described . when the capacitor 15 is not charged , the output voltage vout is zero . when the input voltage vin applied to the input terminal 11b of the operational amplifier 11 is in excess of the output voltage vout , the output voltage va appears at the output terminal 11c of the operational amplifier 11 consisting of a bipolar analog integrated circuit shown in fig2 and is substantially equal to the positive power source voltage + v . in fig2 a , 11b , 11c , 11d and 11e denote the inverting input terminal , the noninverting input terminal , the output terminal and the positive and negative power supply terminals , respectively . when the switch 17 is closed , the coil 13b of the reed relay 13 is energized so that the relay contacts 13a are closed and consequently the capacitor 15 is charged with the output voltage va from the operational amplifier 11 . when the voltage vc across the capacitor 15 rises to a predetermined level , the mosfet 14 is turned on , and the voltage across the output resistor 16 is derived as the output voltage vout . when the level of the ouput voltage vout approaches to the level of the input voltage vin , the output voltage va of the operational amplifier 11 decreases and approaches to the voltage vc across the capacitor 15 . when the output voltage va becomes equal to the voltage vc , the capacitor 15 is not charged any longer , and the input voltage vin becomes equal to the output voltage vout . thereafter even when the switch 13 is opened , the output voltage vout remains equal to the input voltage vin ; that is , the analog voltage memory device 10 is now providing the output voltage equal in magnitude to the input voltage vin . when the input voltage vin is lower than the output voltage vout , the output voltage va from the operational amplifier equals the negative voltage source voltage - v , and consequently the voltage vc across the capacitor 15 becomes lower than the output voltage va . therefore when the switch 13 is closed , the capacitor 15 is discharged so that the output voltage vout decreases . when the output voltage vout approaches to the input voltage vin , the output voltage va from the operational amplifier 11 increases , approaching the voltage vc across the capacitor 15 . when the output voltage va becomes equal to the voltage vc across the capacitor 15 , the discharge of the capacitor 15 is interrupted so that the output voltage vout becomes equal to the input voltage vin . thereafter the analog voltage memory device 10 holds the input voltage vin as the output voltage vout even when switch 17 is opened . in order to ensure the practical application of the analog voltage memory device 10 , the rc time constant must be sufficiently small so that the operation may be accomplised at such high speed as less than 10 μsec . that is , in response to the slowly changing input voltage vin shown in fig3 a , the analog voltage memory device 10 provides the output voltage vout which changes as shown in fig3 b when the switch 17 is closed and remains at the level of the input voltage vin when the switch 17 is opened . the second embodiment shown in fig4 is substantially similar in construction to the first embodiment except that instead of the switch 17 , a switching circuit consisting of a switching transistor 18 , a resistor 19 and an input terminal 20 is used . the operation of the switching circuit is substantially similar to that of the switch 17 . that is , in response to the level of the voltage applied to the input terminal 20 connected through the resistor 19 to the base of the transistor 18 , the latter is turned on or off . the third embodiment shown in fig5 is also substantially similar in construction to the first embodiment except that protective resistors 21 and 22 are connected to the input terminals 11a and 11b , respectively , of the operational amplifier 11 . this arrangement can protect the operational amplifier 11 from being damaged by an excessively high input voltage vin . the fourth embodiment shown in fig6 responds to the input voltage vin and provides the output voltage vout whose magnitude follows only the peak of the input voltage vin . the fourth embodiment is substantially similar in construction to a combination of the first , second and third embodiments described above except the additional arrangement to be described below . that is , the output terminal ( 23c ) of a second operational amplifier 23 is connected through the resistor 19 to the base of the switching transistor 18 . the source of the mosfet 14 is connected not only to the inverting input terminal 11a of the first operational amplifier 11 through the protective resistor 21 but also to the inverting input terminal 23a of the second operational amplifier 23 through a resistor 24 . the input voltage vin is applied to both the noninverting input terminals 11b and 23b of the first and second operational amplifiers 11 and 23 through the protective resistors 22 and 25 . the collector of the transistor 18 is connected through the switch 17 to the positive voltage supply + v while the emitter is connected to one end of the coil 13b of the reed relay 13 . a diode 26 is connected in parallel with the coil 13b in order to prevent the reverse electromotive force . next further referring to fig7 a and 7b , the mode of operation of the fourth embodiment will be described . when the input voltage vin is higher than the output voltage vout which is provided as a source follower voltage of the mosfet 14 , the output voltages va and vb from the first and second operational amplifiers 11 and 23 are substantially equal to the voltage + v of the positive voltage supply . therefore the transistor 18 is turned on , and consequently the coil 13b of the reed relay 13 is energized so that the contacts 13b are closed . therefore the capacitor 15 is charged with the output voltage va from the first operational amplifier 11 . the drain current of the mosfet 13 increases with increase in voltage across the capacitor 15 so that the output voltage vout also increases , approaching to the input voltage vin . when the output voltage vout becomes equal to the input voltage vin , the output voltage va from the first operational amplifier 11 is equal to the voltage vc across the capacitor 15 while the output vb from the second operational amplifier 23 becomes substantially zero so that the transistor 18 is turned off . as a result , the coil 13b of the reed relay 13 is deenergized , opening the contacts 13a . therefore the voltage whose magnitude is equal to that of the voltage across the capacitor 15 when the transistor 18 is turned off remains charged across the capacitor 15 , and consequently the level of the input voltage vin when the transistor 18 is turned off is stored as the level of the output voltage vout . even when the input voltage vin drops below the output voltage vout , the output voltage vb from the second operational amplifier 23 remains zero or is substantially equal to the voltage - v of the negative voltage supply so that the transistor 18 remains turned off . as a result , the reed relay 13 remains opened so that the voltage across the capacitor 15 remains unchanged and consequently the output voltage vout remains unchanged . thereafter as shown in fig7 b the output voltage vout remains at the level of the highest peak of the input voltage vin which changes as a function of time as shown in fig7 a , and changes only if the input voltage vin goes higher than the previous peak level to a new higher peak level . that is , only when the level of the input voltage vin changes to a new higher level , the transistor 18 is turned on so that the capacitor 15 is charged until vin = vout . however , even when the level of the input voltage vin drops to a new level lower than the previously held level , the output voltage vout remains at the same previous level . therefore when a small circuit constant is selected , the source follower voltage of mosfet 14 follows only the peak of the input voltage vin , and remains at the level of this peak . the fifth embodiment shown in fig8 is substantially similar in construction to the fourth embodiment shown in fig6 except that the inverting input terminal 11a of the first operational amplifier 11 is connected through the protective resistor 21 to the movable arm of a variable resistor 27 having its one fixed end connected to the source of mosfet 14 and the other end grounded through a resistor 28 . this arrangement can prevent the erratic operation that the transistor 18 will not turn off even when the output voltage vout becomes equal to the input voltage vin . this erratic operation tends to frequently occur when the characteristics of the first and second operational amplifiers 11 and 23 are different . however , according to the fifth embodiment , the inputs to the first and second operational amplifiers 11 and 23 can be made different in level by a few mv so that the reliable and dependable operation of the operational amplifiers 11 and 23 may be ensured without the sacrifice of the precise operation of the analog voltage memory device 10 . as described above , the analog voltage memory device in accordance with the present invention can provide the output voltage whose magnitude follows the level of the input voltage and remains at a desired level or peak level thereof . however even when the components of the analog voltage memory device are mounted on a printed circuit board and electrically mounted , the desired function of the memory device cannot be ensured because the insulation of the printed circuit board is lower than the insulation of the capacitor 15 by the order of 10 3 ohms . the sixth and seventh embodiments of the present invention to be described below can overcome this problem . in the sixth embodiment shown in fig9 and 11 , the components ; that is , the resistors 12 , 16 , 21 and 22 , the operational amplifier 11 , the reed relay 13 , the capacitor 15 and mosfet 14 are mounted on a printed circuit board 29 , and one terminal of the capacitor 15 , the gate terminal of the mosfet 14 and one of the relay contacts 13a of the reed relay 13 are joined together within an opening 30 formed through the printed circuit board 29 in such a way that they may be kept out of contact with the edge of the opening 30 . thus assembled printed board 29 is encased within a casing 31 as shown in fig1 and then molded with high insulating resin such as exposy resin with leads or terminals 32 connected to the printed circuits on the board 29 and extended through and beyond the mold as shown in fig1 . the seventh embodiment shown in fig1 , 13 and 14 is an assembly of the components of the fourth or fifth embodiment . as with the sixth embodiment , the components such as first and second operational amplifiers 11 and 23 , the transistor 18 , the mosfet 14 and so on are mounted on the printed circuit board 29 , and the gate terminal of the mosfet 14 , one contact of the reed relay 13 and one terminal of the capacitor 15 are joined together within the opening 30 of the board 29 in such a way that they may be kept out of contact with the edge of the opening 30 . thus assembled printed circuit board 29 is encased within the casing 31 and then molded with high insulating resin ( having a resistance higher than 10 5 ohms ) with leads or terminals 31 connected to the printed circuits on the board 29 and extended through and beyond the mold as shown in fig1 . the analog voltage memory device in accordance with the present invention arranged and constructed in the manners described above has remarkably improved voltage memory characteristics . for instance , when the voltage impressed across a variable capacitor used in a tuner of a color television receiver changes tens of micro volts , the color distortion occurs . however , when the analog voltage memory device in accordance with the present invention is incorporated , the color distortion due to the change in voltage applied to the capacitor can be completely eliminated . when a plastic film capacitor made of polypropylene or polystyrene film is used as the capacitor 15 , the oxide film of mosfet 14 is made thicker than 2000a and suitable high quality glass is selected to form a glass envelope of the reed relay 13 , the leakage can be kept less than even 2 % after such a long service as 1000 hours . as described above , the present invention improves remarkably the analog voltage memory characteristics which render the analog memory device completely indestructible and which prevents the leakage of charges . therefore the analog memory devices in accordance with the present invention may find a wide field of applications . for instance , they may be used for storing a monitor level , a turning level , a finally adjusted level or the peak of the output from an analog measuring instrument . furthermore since the reed relay is used , more than tens of millions on - off operations may be possible ; that is , a long service life is ensured .