referring now to fig1 the x and y deflection voltages are input to the circuitry on lines 100 and 120 , respectively . as is known in the art , these voltages , in a raster - scanned cathode ray tube ( crt ) fluctuate , in this exemplary embodiment , between ± 5 volts . the input resistors 101 and 121 are each 24 kohms . the x deflection op amp 102 , has a + 15 volt and a - 15 volt power supply and a voltage reference app ied input to the negative input of op amp 102 across resistor 108 ( 20 kohms ) selected to provide an output voltage shift for the x deflection voltage having a swing from + 1 volt to + 11 volts at both the a and b outputs of op amp 102 as shown in fig1 . the b output across resistor 111 ( 1 kohm ) is protected by the diode 112 to insure no negative swings are tolerated on output b . output a is not so protected , and is an accurate representation of the voltage output from op amp 102 , provides feedback across resistor 109 ( 24 kohms ) into the negative terminal of op amp 102 . the voltage divider network resistor 105 ( 33 kohms ), 106 ( 10 kohm potentiometer ) and 107 ( 33 kohms ) provides a readily adjustable voltage reference point for shifting the center of the cut - out voltage , with respect to the x deflection voltage , on the crt screen as desired . the four - line cut - out bus 115 provides communication between the x deflection reference point establishing circuitry and a plurality of cut - out circuits as are required in specific implementations . capacitor 108 ( 0 . 68 mf ) shorts high frequencies and thus maintains a filtered dc reference for the x deflection circuitry . the y deflection input 120 across resistor 121 is input into an essentially similar circuit to the x deflection reference point establishing circuit previously described with the op amp 122 operating to change a ± 5 volt y deflection input into a + 1 to + 11 volts output on outputs c and d . again , one of the outputs ( d in this exemplary embodiment ) utilizes a protection diode 136 to prevent negative - going signals , in conjunction with resistor 134 ( 1 kohm ) and a negative voltage reference is coupled across resistor 130 ( 20 kohms ) with a positive feedback function provided the output of op amp 122 through point 132 , and across resistor 131 ( 24 kohms ) into the negative input terminal of op amp 122 . the additional requirement in the y deflection reference establishment circuitry for a low impedance input requires an additional op amp 126 in conjunction with the voltage divider circuitry resistor 127 ( 33 kohms ), resistor 128 ( 10 kohm potentiometer ), and resistor 129 33 kohms ) allowing a shift in the reference point from ± 5 volts to an output range varying at outputs c and d in response to the y deflection input having a low impedance , enabling through the adjustment of potentiometers 128 and 106 , positioning of a voltage reference point for the cut - out circuits to be described generally in the center of the cathode ray tube represented by a 6 volt x deflection voltage on outputs a and b of the cut - out deflection bus 115 as well as a y deflection voltage of 6 volts on outputs c and d , also on the cut - out deflection bus 115 . thus , any position on the crt display shown in fig2 is represented by the cartesian coordinates ( x , y ) wherein the entire display is described by positive x and positive y values , and the reference point is established relative to the crt display by adjusting the x deflection potentiometer 106 and the y deflection potentiometer 128 . it should be noted that the use of positive x and y coordinates for the entire surface of the screen enables the coupling of readily available ttl logic circuits to cut - out bus 115 . as is known in the art , a negative deflection voltage ( by standard convention ) is required to deflect the electron beam to the left of the center in the x axis , and the present invention enables that negative voltage to be represented on cut - out bus 115 by a lesser positive voltage . similarly , a negative y deflection voltage is represented on cut - out bus 115 as a lesser positive voltage than the reference point , herein established as (+ 6 volts , + 6 volts ), and thus logic circuits may be directly coupled to the cut - out bus 115 without additional buffering required . referring now to the voltage divider networks 160 of fig1 each of the four shown voltage divider networks are utilized to provide reference voltage for a marker beacon cut - out form as is used in an avionics crt , for example . the marker beacon circuit described herein is merely exemplary and is described herein to facilitate a readily - understandable example of one of many diverse circuits which may be utilized to define predetermined crt cut - out forms on the display . each of the four voltage dividers defines a line as is shown in fig2 on the display which , in combination , define the geometric form of the marker beacon . for example , the voltage divider network resistor 141 ( 20 kohms ) and resistor 142 ( 4 . 93 kohms ) provides a reference voltage on input 5 to the comparator chip 149 ( an lm 139 ) which is compared continuously as the x deflection voltage as modified on cut - out bus 115 is input on line 4 . the logic output of the comparator results is output on line 2 , to nand gate 152 , thereafter into nor gate 153 . simultaneously the voltage divider network resistors 143 ( 20 kohms ) and resistor 144 ( 7 . 06 kohms ) provides an additional signal on the nand gate input 152 , and in response to the y deflection input on cut - out bus 115 , to limit the crt blanking signal output on 154 during periods when the y deflection is less than the voltage represented by line 278 on the display of fig2 and also when the y deflection voltage is greater than that represented by line 276 on the display 270 of fig2 . similarly , the y deflection voltage is compared by comparator chip 149 for left and right parameters defined by line 272 utilizing the voltage divider circuit resistors 145 ( 20 kohms ) and 146 ( 2 . 03 kohms ) input on line 9 and the voltage divider network resistor 147 ( 20 kohms ) and resistor 148 ( 4 . 17 kohms ) input to comparator chip 149 on line 10 . the net result is a blanking signal output on line 154 unless each of the following logic conditions , in the present marker beacon example , are met : ( 1 ) the voltage on the deflection cut - out bus for the x axis is greater than that represented by the line 272 shown in fig2 ; ( 2 ) the x deflection voltage is less than the line 274 in fig2 ; ( 3 ) the y deflection voltage is greater than that represented by line 278 ; and ( 4 ) the y deflection voltage is less than that represented by line 276 in fig2 . thus , the crt 270 has each display point representable by a positive deflection voltage , defined by the reference point establishing circuitry , around an arbitrary reference point defined substantially at the center 271 of display 270 . this reference point is adjustable by potentiometers 106 , 128 , to various equipment and circuit differences as may be encountered , as well as aging of components , and the cartesian coordinates for every point on the surface of the crt 270 are described on cut - out deflection bus 115 as positive values , enabling direct connection of logic circuits such as comparator chip 149 . thereafter , a variety of cut - out circuits , essentially defining arbitrary forms as may be required in specific implementations are coupled to the cut - out bus to describe specific geometric forms on the display as logic functions embodied in the specific hardware for a specific cut - out form . by additionally adding circuitry to convert from cartesian to polar coordinates , circles , ovals and combinations of linear , second order and higher equations can be added to cut - out bus 115 to provide additional shapes and locations as desired . by adding a cut - out circuit defining a first geometric form to a second cut - out circuit output defining a second form , various shapes are readily applied to the display . in the marker beacon example , an additional inverter 151 is coupled between nor gate 153 and a marker beacon select input 150 to provide the capability of disabling the particular cut - out circuit for the marker beacon as may be desired . while the present invention has been described with respect to a specific exemplary embodiment , it can be seen that a wide variety of cut - out shapes and corresponding circuits may be added to the cut - out bus and operated essentially simultaneously with additional cut - out circuits , providing a wide variety of capability to the crt display designer . additionally , each of the cut - out circuits may be disabled individually and require no software storage memory capability to be implemented . it is therefore contemplated that the appended claims will cover any such modifications or cut - out circuits as fall within the true scope of the invention .