the new and improved method of forming contact metallization to active silicon device regions , wherein the contact metallization has superior and improved barrier integrity , will now be described in detail this contact metallization can be used as part of mosfet devices that are currently being manufactured in industry ; therefore only the specific areas unique to understanding this invention will be described in detail . referring to fig1 there is shown a portion of a partially completed integrated circuit . the semiconductor substrate , 10 , is preferably composed of p - type , single crystal silicon with a & lt ; 100 & gt ; orientation . a doped region , 9 , is provided in the semiconductor substrate , 10 . an interlevel dielectric layer , 11 , of silicon dioxide or the like , is deposited by low pressure chemical vapor deposition ( lpcvd ), atmospheric pressure chemical vapor deposition ( apcvd ), or plasma - enhanced chemical vapor deposition ( pecvd ) to a thickness of between about 5 , 000 to 15 , 000 angstroms . contact openings are formed through the interlevel dielectric layer to the semiconductor substrate , 10 , wherein there may be doped device region , 9 , formed therein , as is well understood by those skilled in the art . conventional lithography and dry etching techniques , such as plasma etching or rie , are used to form the contact openings . for simplicity , and since they do not form a part of the invention , a single opening and a single doped device region are shown in the figs . referring again to fig1 a multilevel barrier layer is deposited over the surface of the substrate and within the contact openings . the first layer , 12 , is composed of sputtered titanium and is between about 400 to 800 angstroms thick . the titanium in contact with the silicon within the contact openings reacts with the silicon , upon subsequent heating , to form a low resistance contact . the second layer , 13 , is composed of titanium nitride , deposited by sputtering from a titanium target in the presence of nitrogen , and is between about 800 to 1 , 500 angstroms thick . a third and critical layer , 14 , for this invention , is composed of conformal cvd tungsten deposited by using wf 6 , sih 4 and h 2 at a pressure between about 60 to 120 torr , at a temperature between about 350 ° to 480 ° c ., and is between about 800 to 2 , 500 angstroms thick . an important attribute of conformal cvd tungsten layer , 14 , is formation of a continuous layer over the titanium nitride layer , 13 , on all surfaces , including the bottom of the contact opening , the vertical sidewalls of the contact opening , and surfaces outside the contact regions and across corners and intersections of the various titanium nitride surfaces . the conformality of the cvd tungsten layer , 14 , improves the integrity of the barrier layer by eliminating easy diffusion paths for silicon and aluminum at contact corners . a final optional layer , 15 , completing the barrier layer , is composed of sputtered titanium and is between about 400 to 800 angstroms thick . the sputtered titanium layer , 15 , serves as an adhesive layer between the barrier layers and subsequently sputtered aluminum - copper - silicon metallization layer , 16 . the preferred metallization is aluminum or an aluminum alloy , such as al - 1 % si - 0 . 5 % cu , or alternately alloys of aluminum containing between about 0 to 2 . 0 % si and between about 0 to 1 . 0 % cu . as commonly practiced in the industry , the aluminum or aluminum alloy metallization layer , 16 , is deposited by a two step sputtering process wherein the first step is performed cold to insure continuity of film coverage and the second step is performed hot to fill and planarize the contact region . for example , the cold sputter deposition should be at a substrate temperature between about 25 ° to 150 ° c ., and preferably at a temperature less than about 100 ° c ., and should deposit a layer thickness between about 1 , 000 to 3 , 500 angstroms . the hot sputter deposition should immediately follow and should be at a substrate temperature between about 400 ° to 580 ° c ., and preferably at a temperature higher than 430 ° c ., and should deposit a layer thickness between about 2 , 500 to 7 , 500 angstroms . a final sputtered titanium nitride cap layer , 17 , is deposited to serve as an arc ( anti - reflection coating ) layer , as commonly used to facilitate photolithogrphic processing for patterning of the interconnect metallization layer . fig2 shows a completed metallization contact to silicon and interconnect metal after pattern formation . while the invention has been particularly shown and described with reference to the preferred embodiments thereof , it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention .