embodiments of the present invention will be described with reference to the figures . the chip type resistor in accordance with the first embodiment is manufactured through the following method . step 1 . first , referring to fig1 a pair of left and right main upper electrodes 13a are formed on an upper surface of a chip type insulating substrate 11 , by applying a row material conductive paste by screen printing , followed by sintering . step 2 . thereafter , referring to fig2 to 5 , on the upper surface of insulating substrate 11 , a resistive film 12 is formed by application of a raw material paste by screen printing , followed by sintering . at this time , simultaneously with the formation of resistive film 12 , extensions 12 &# 39 ; integrally extending from resistive film 12 are formed superposed on both left and right sides on the upper surface of main upper electrodes 13a . step 3 . on the upper surface of insulating substrate 11 , referring to fig6 and 7 , an undercoat 14a of glass covering resistive film 12 is formed by application by screen printing of a raw material , followed by sintering . thereafter , resistive film 12 and undercoat 14a are engraved to form a trimming groove 12a by laser beam irradiation , for example , while resistance value of resistive film 12 is measured by a conductive probe ( not shown ) brought into contact with that portion of the upper surface of main upper electrodes 13a which is between the extension 12 &# 39 ; so that the resistance value of resistive film 12 is within a prescribed tolerable range , whereby trimming adjustment is realized . step 4 . referring to fig8 and 9 , a middle coat 14b of glass to fill trimming groove 12b is formed on the upper surface of insulating substrate 11 , by application of a raw material by screen printing , followed by sintering . step 5 . referring to fig1 and 11 , an overcoat 14c entirely covering middle coat 14b is formed on the upper surface of insulating substrate 11 by application of a raw material by screen printing , followed by sintering . in this manner , cover coat 14 having a three layered structure including undercoat 14a , middle coat 14b and overcoat 14c is formed . step 6 . referring to fig1 to 14 , an auxiliary upper electrode 13b is formed on the upper surface of main upper electrode 13a such that the auxiliary upper electrode is superposed over both the extensions 12 &# 39 ; of resistive film 12 and the upper surface of main upper electrode 13a , by application of a raw material conductive paste by screen printing , followed by sintering . step 7 . referring to fig1 and 16 , side electrodes 13c are formed on left and right surfaces of insulating substrate 11 by application of a raw material conductive paste and sintering , and thereafter metal plating is performed entirely , so as to form metal plate layers 13d on auxiliary upper electrodes 13b and on side electrodes 13c , and thus terminal electrodes 13 are completed . in the chip type resistor manufactured in this manner , the portion of terminal electrode 13 on the upper surface of insulating substrate 11 has a three layered structure as shown in fig1 and 16 . more specifically , terminal electrode 13 has a main upper electrode 13a , an extension 12 &# 39 ; of resistive film 12 on left and right sides of the upper surface of main upper electrode , and auxiliary upper electrode 13b formed on the upper surface of extension 12 &# 39 ;. the height h1 from the upper surface of insulating substrate 11 to the upper surface of auxiliary upper electrode 13b ( more exactly , height between the upper surface of insulating substrate 11 to the upper surface of metal plate layer 13c ) corresponds to the thickness tb of auxiliary upper electrode 13b , thickness ta of main upper electrode 13a plus thickness t1 of resistive film 12 , when the height h1 is made exactly or approximately the same as the height h0 from the upper surface of insulating substrate 11 to the upper surface of overcoat 14c . therefore , the thickness tb of auxiliary upper electrode 13b can be made thinner by the thickness t1 of resistive film 12 as compared with the prior art . the extension 12 &# 39 ; of resistive film 12 may , alternatively , be formed as an enclave 12 &# 34 ; separate from resistive film 12 as shown in fig1 . alternatively , the extension may have a shape appropriately combining extension 12 &# 39 ; and enclave 12 &# 34 ;. for example , the extension 12 &# 39 ; may be formed on one of the main upper electrodes 13a and an enclave 12 &# 34 ; may be formed on the other one of the main upper electrodes . in the first embodiment described above , main upper electrodes 13a are formed , thereafter resistive film 12 is formed with extensions 12 &# 39 ; or enclaves 12 &# 34 ; superposed on left and right sides of main upper electrodes 13a , and thereafter auxiliary upper electrodes 13b are formed superposed on extensions 12 &# 39 ; or enclaves 2 &# 34 ; of resistive film 12 . alternatively , referring to fig1 and 19 , resistive film 12 together with extensions 12 &# 39 ; or enclaves 2 &# 34 ; may be formed first , thereafter main upper electrodes 13a may be formed with the left and right sides superposed on the extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 and , thereafter , auxiliary upper electrodes 13b may be formed on portions of the upper surface of the main upper electrodes 13a which are on the extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 ( other structures are the same ). the second embodiment is similar to the first embodiment until formation of overcoat 14c . the present embodiment differs from the first embodiment in subsequent formation of auxiliary upper electrodes 13b . more specifically , when auxiliary upper electrode 13b is formed on the upper surface of main upper electrode 13a , auxiliary upper electrode 13b &# 39 ; is formed only at a portion between extensions 12 &# 39 ; or enclaves 12 &# 34 ; on the upper surface of main upper electrode 13a as shown in fig2 to 22 . the auxiliary upper electrode 13b &# 39 ; may be formed by application of the raw material conductive paste by screen printing and sintering as described above . alternatively , it may be formed simultaneously with formation of side electrodes 13c on both end surfaces of insulating substrate 11 . more specifically , when the raw material conductive paste for the side electrodes 13c is applied to left and right end surfaces of insulating substrate 11 , part of the raw material conductive paste may be heaped up to the upper surface side of main upper electrode 13a for forming the auxiliary upper electrode . thereafter , referring to fig2 and 24 , side electrodes 13c are formed in the similar manner on both left and right end surfaces of insulating substrate 11 , metal plating is performed entirely , and a metal plate layer 13d is formed on surfaces of auxiliary upper electrodes 13b and side electrodes 13c . thus terminal electrodes 13 are completed . chip type resistor manufactured in this manner has extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 formed on both left and right sides of main upper electrodes 13a of terminal electrodes 13 as shown in fig2 and 24 . auxiliary upper electrode 13b is formed at a portion between extensions 12 &# 39 ; or enclaves 12 &# 34 ; on the upper surface of main upper electrode 13a . when auxiliary upper electrode 13b &# 39 ; is formed by applying a raw material conductive paste by screen printing or the like , the extensions or enclaves position on left and right sides function as a dam for preventing flow of the conductive paste applied to the portion therebetween in the widthwise direction of the insulating substrate . therefore , the conductive paste in small amount can be heaped up high . in the second embodiment , extensions 14a &# 39 ; ( or enclaves ) of undercoat 14a may be formed on the upper surface of extension 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 as shown in fig2 , whereby the height from the upper surface of main upper electrode 13a can be increased . as a result , when auxiliary upper electrodes 13b are formed , the effect that a small amount of conductive paste can be heaped up high is further enhanced . further , extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 can be covered by the extensions 14a &# 39 ; ( or enclaves ) of undercoat 14a . therefore , at the time of metal plating , metal plating layer 13c can be formed only on auxiliary upper electrodes 13b as shown in fig2 . further , formation of metal plate layer 13c on surfaces of extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 can be avoided . here , on the upper surface of extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 , extensions ( enclaves ) of middle coat 14b or extensions ( or enclaves ) or overcoat 14c may be formed , in place of extensions 14a &# 39 ; ( or enclaves ) of undercoat 14a , as described above . further , extensions ( or enclaves ) of at least two of undercoat 14a , middle coat 14b and overcoat 14c may be formed . further , in the second embodiment , main upper electrodes 13a are formed , thereafter resistive film 12 is formed with extensions 12 &# 39 ; or enclaves 12 &# 34 ; superposed on both left and right sides of main upper electrodes 13a , and thereafter auxiliary upper electrodes 13b are formed on the upper surface of main upper electrodes 13a superposed between extension 12 &# 39 ; or enclaves 12 &# 34 ; of the resistive film 12 . alternatively , as in the example shown in fig1 and 19 , resistive film 12 together with extensions 12 &# 39 ; or enclaves 12 &# 34 ; may be formed first , main upper electrodes 13a may be formed with left and right sides superposed on extensions 12 &# 39 ; or enclaves 12 &# 34 ; of resistive film 12 , and thereafter auxiliary upper electrodes 13b may be formed superposed on the upper surface of the main upper electrodes 13a superposed on extensions 12 &# 39 ; or enclaves 12 &# 34 ; of the resistive film 12 . further , in each of the embodiment described above , a lower electrode 13e constituting part of terminal electrode 13 may be formed on a lower surface of insulating substrate 11 as shown in fig2 , whereby it becomes possible to mount the chip on a printed board with the side of resistive film 12 facing upward . generally , lower electrode 13c is formed by screen printing and sintering of a raw material paste in a process step before forming main upper electrodes 13a or resistive film 12 . however , it is possible to form lower electrode 13e simultaneously with formation of side electrodes 13c on both end surfaces of insulating substrate 11 . more specifically , the lower electrode may be formed , when a raw material conductive paste for side electrodes 13c are applied to left and right end surfaces of insulating substrate 11 , by heaping up part of the raw material conductive paste on the lower surface of insulating substrate 11 . although the present invention has been described and illustrated in detail , it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation , the spirit and scope of the present invention being limited only by the terms of the appended claims .