as used herein , the words &# 34 ; write &# 34 ; and &# 34 ; print &# 34 ; and the words &# 34 ; electrode &# 34 ; and &# 34 ; stylus &# 34 ; are intended to be synonymous , unless indicated otherwise . similarly , the term &# 34 ; write pulse &# 34 ; is intended to mean the same as the terms &# 34 ; print pulse &# 34 ; or &# 34 ; print voltage &# 34 ;. in addition , as used herein , the term &# 34 ; write cycle time &# 34 ; means the time taken to write to or supply write electrode voltage for printing one line of pixels across the width of the recording medium being used . in a matrix printer of the type referred to hereinabove , one in which the recording medium is constantly being moved at a predetermined rate , a typical write cycle time is 500 microseconds or 0 . 5 milliseconds ( ms ). this is the time that it would take to actuate each one of a plurality of write electrodes that are contained in a full or partial width print head that is mounted transversely across the recording medium and be ready for the next write cycle . a representative rate of recording medium movement is a constant 5 inches per second . if a particular electrode is kept on for the entire write cycle time , to obtain maximum print darkness , that electrode will have printed a pixel that was 0 . 0025 inches long at that recording medium velocity . if a lesser pixel intensity is desired , then the appropriate write electrode can be driven for a lesser time . in other words , the intensity of the printed pixel is a function of the time that the printing electrode is supplied with drive voltage . the length of the pixel printed is a function of that same printing time and the speed at which the recording medium is moved relative to the write electrode . referring now to the drawings wherein like reference numerals have been used in the several views thereof to identify like elements , fig1 depicts a fundamental 0 . 50 ms write cycle 20 that has been subdivided into a number of equal width portions , 1 to 10 . the number of write cycle subdivisions or portions that are to be formed is primarily a function of the maximum allowable perceivable registration error and , to a lesser extent , the number of intensity levels required . in this instance , the write cycle has been broken up into ten equal portions of 0 . 05 ms each . thus , at a recording medium speed of 5 inches per second , the maximum registration shift or difference in pixel length for each write cycle subdivision of on - time will be 0 . 00025 inches . generally stated , under ordinary conditions , without compensation , the maximum registration error that will result for any single subdivision of the write cycle is a function of the number of write cycle subdivisions . one possible scheme for achieving gray scale control would simply require turning on a write electrode at the beginning of each write cycle for as long a portion thereof as would be necessary to achieve a pixel of a desired intensity . thus , as is shown in fig2 by way of example , pixel 22 is printed by driving its related write electrode for the first three subdivisions of a write cycle 20 , thereby forming pixel 22 which , under the stated conditions , has an elongated portion 22a of 0 . 00075 inches and a nucleus portion 22b , the length of which is a function of the diameter of its related write electrode . a darker pixel 24 , having an elongated portion 24a that is 0 . 00150 inches long and a nucleus portion 24b whose length is a function of the diameter of its related write electrode , is created by printing for the first six write cycle subdivisions . an even darker pixel 26 , having an elongated portion 26a that is 0 . 00225 inches long and a nucleus portion 26b whose length is a function of the diameter of its related write electrode , is printed by applying pulses to that write electrode for the first nine write cycle subdivisions . it is clear that the misregistration or differences in length between the pixels 22 , 24 and 26 would be noticeable in a matrix printer of the type described , particularly where print electrode diameters are typically 0 . 005 inches . using this or a similar scheme , either the pixels &# 39 ; ending or starting points would be the same , with the most noticeable difference in pixel length occurring when the lightest and darkest pixels were printed alongside or following each other . therefore , where all pixels have the same starting or ending point which gives the eye a common point of reference , some manner of compensation is needed to avoid such visible misregistration . it is proposed to overcome this limitation by starting and ending the majority of the electrode write cycle driver waveforms , and the different intensity pixels printed thereby , at substantially the same place or point of reference . to that end , intensity clock pulse generator means 28 is used to provide a predetermined number of intensity clock pulses using an oscillator 30 , a binary counter 32 , a decoder 34 , a reset circuit 36 and a logic circuit 38 , as is shown in fig3 . the number of intensity clock pulses provided is equal to the number of bits of coded information that are required per code word to uniquely define the number of available intensity levels , which is four in this particular embodiment . the binary counter 32 and the decoder 34 have , in this instance , been implemented by use of texas instrument corp . chips sn74193 and sn54154 , respectively , although there are other integrated circuits chips available from other sources that would work as well . further , it will be understood and appreciated by those having skill in this art that a decade counter and suitable decoder therefor could be used in place of the parts selected above . in addition , it will be apparent that the entire intensity clock pulse generating means could also be implemented through the use of discrete circuits . initially , in response to a startup signal on its input line 40 , reset circuit 36 sets the binary counter 32 internally to zero forcing it to start its counting function . counter 32 receives the output signal 42 of oscillator 30 , the individual pulses of which have the same period as the subdivisions of the fundamental write cycle 20 . thus , five complete pulses of the oscillator &# 39 ; s output signal 42 would be equal in length to the basic write cycle 20 . the amplitude of the pulse train 42 pulses is selected as would be appropriate for the particular logic circuit family being used . the output of the binary counter 32 , lines 32a to 32d respectively , are connected to the input of decoder 34 . counter output line 32a carries a value of 1 , comprising a pulse train having one - half the frequency of the counter input pulse 42 . counter output line 32b has a value of 2 , comprising a pulse train whose frequency is one - fourth that of the counter input pulse 42 . similarly , counter output line 32c has a value of 4 , and comprises a pulse train having a frequency that is one - eighth the frequency of the counter input pulse 42 . counter output line 32d has a value of 8 , comprising a pulse train whose frequency is one - sixteenth that of the counter input pulse 42 . decoder 34 , in response to the active states of the input lines thereto , decodes those signals and then generates a number of individual pulse outputs on its sixteen output lines 34a to 34p . output line 34a , for example , consists of a single subdivision pulse that starts at the location of subdivision 1 of a write cycle 20 and has the same duration . output line 34b would consist of a pulse signal having the same location and duration as subdivision 2 of the basic write cycle 20 . similarly , output lines 34c through 34j would consist , respectively , of a pulse signal having the same location and duration as subdivisions 3 to 10 of the write cycle 20 . in this instance , where only ten write cycle subdivisions were selected , further decoder output is not required . to restart the counter 32 after the ten required number of signals are made available from decoder 34 , a reset line 46 is tied from decoder output line 34j , which provides the tenth and last subdivision of the write cycle 20 , to the reset circuit 36 . the appearance of the last subdivision pulse on line 34j will cause the reset circuit 36 to be actuated , thereby resetting counter 32 and starting the generation of subdivision pulses once again . the remaining six output lines of decoder 34 are therefore not used . the signals output by decoder 34 are fed to logic circuit 38 where they are logically combined , as needed , to form intensity clock pulses a , b , c and d , which appear respectively on the logic circuit output lines 38a to 38d . as can be seen in fig4 intensity clock pulses a to d are waveforms having the same overall duration and amplitude as the basic write pulse 20 . the significant difference is that they are each &# 34 ; on &# 34 ; for only predetermined and different portions of their overall identical duration . intensity clock pulse a , for example , consists of a subdivision 1 pulse and a subdivision 10 pulse and is provided on output line 38a by oring the decoder output lines 34a and 34j in logic circuit 38 . the positive going portions of intensity clock pulse a , subdivisions 1 and 10 , are each equal in width to the write cycle subdivisions . intensity clock pulse b , which includes only subdivision pulses 2 , 3 and 10 , is provided by oring decoder output lines 34b , 34c and 34j in logic circuit 38 . the positive going portions of intensity clock pulse b , subdivisions 2 , 3 and 10 , are each equal in width to the write cycle subdivisions . intensity clock pulse c , includes only subdivision pulses 4 , 5 , 6 and 10 , and is provided by oring decoder output lines 34d , 34e , 34f and 34j in logic circuit 38 . the positive going portions of intensity clock pulse c , subdivisions 4 , 5 , 6 and 10 , are each equal in width to the write cycle subdivisions . intensity clock pulse d , is arranged to include only subdivision pulses 7 through 10 , and is provided by oring decoder output lines 34g through 34j in logic circuit 38 . the positive going portions of intensity clock pulse d , subdivisions 7 through 10 , are each equal in width to the write cycle subdivisions . the number of intensity levels desired which determines the degree of possible gray scale resolution , has been arbitrarily selected in the preferred embodiment to be eleven . this choice is not related to the number of write cycle subdivisions selected although they may be the same . the number of subdivisions selected is a function of the smallest perceivable error one wishes to accept , while the number of intensity levels possible is a function of the coding and hardware required to uniquely identify each intensity level . four digits can be used to encode up to sixteen unique combinations or intensity levels in a multibit word . however , a lesser number of intensity levels can be selected , as in this instance where only eleven intensity levels have been provided for . as noted previously , the number of bits selected to define or encode the desired intensity levels simultaneously sets the number of intensity clock pulse signals required . the greater the number of intensity levels and defining code words required therefor , the greater the quantity and cost of the hardware that will be necessary to decode and generate the write electrode waveforms that support the higher number of intensity levels . as used herein , the term &# 34 ; effective on - time &# 34 ; means the total time during any of the permissible write pulse waveforms defined herein that a particular print stylus is supplied with drive voltage . the intensity clock pulses a , b , c and d are used , either alone or in predetermined combination , to develop write pulse waveforms 48 for each of the eleven levels or degrees of print intensity desired , with one exception . the write pulse waveforms 48a to 48k are shown in fig5 . the intensity level identifiers are shown at the left of each of the waveforms 48a through 48k . the coding for the waveforms is shown at their right together with the effective on - time of each . the first intensity level , obtained by using write pulse waveform 48a , is simply the absence of any of the intensity clock pulses and is the one obvious exception where those clock signals , referred to above , are not used . the second intensity level is achieved by utilizing write pulse waveform 48b which consists solely of the clock a signal . similarly , the third intensity level is obtained by using write pulse waveform 48c which consists solely of the clock b signal . the remaining intensity level waveforms are the result of logical combinations of the intensity clock pulses a , b , c and d , as reflected by the clock coding . for example , the seventh intensity level is obtained by logically combining intensity level clock signals a , b and d . it should be noted that only write pulse waveforms 2 , 5 , 6 and 9 do not start at the same point or time as do the remaining write pulse waveforms . in each instance however , these four waveforms lag the other by only one write cycle subdivision . thus , the actual maximum registration error at the start of any of these four write pulse waveforms is 0 . 0025 inches , the product of recording media speed ( five inches per second ) and the subdivision time span ( 0 . 05 microseconds ). it should also be noted that the maximum time between subdivision pulses , within a write pulse waveform , is that exhibited by write pulse waveform 1 , which is also the waveform for clock a . this waveform has a span of eight consecutive subdivisions that are off . a pixel formed thereby will , therefore , have a starting and ending section sandwiched around a gap that will be 0 . 002 inches long . however , since the gap occurs in the center of the pixel , integration thereof by an observer &# 39 ; s eye will make it appear that the pixel is complete and uniform . it should be noted that the human eye will tend to integrate a pixel having an open central portion much more readily than it will pixels that have equal differences in their starting or ending points . as a result , the apparent or discernable registration error will appear to be no more than that resulting from or attributable to the difference in the starting points of the write pulse waveforms 48 , which in accordance with the present invention is no more than a single write cycle subdivision . fig6 illustrates a portion of circuit means 50 which generates the write pulse waveforms 48a through 48k . since the entire circuit means 50 functions in the same manner as the depicted portion thereof , the following description of that portion will serve to satisfactorily explain the entire arrangement . in the particular portion shown , it is assumed that write pulse waveform 48e for the fifth intensity level is to be provided by driver 52 for a first write electrode and that write pulse waveform 48h for the eighth intensity level is to be provided by driver 54 for a second write electrode . serial data , which has been coded to represent the degree of intensity desired for each of the write electrodes , is input to shift register 56 via its input line 58 . when actuated , clock line 60 causes register 56 to transfer its contents in parallel to an intermediate buffer 62 . as can be seen , the first stage of buffer 62 contains the clock code ( 1 0 0 1 ) for the fifth intensity level and the second stage of buffer 62 contains the clock code ( 1 1 0 1 ) for the eighth intensity level . the outputs of the intermediate buffer are connected to a plurality of and gates 64 , with only gates 64a through 64h being shown in this case . the other input of each of the and gates 64a to 64h is connected to receive one of the intensity clock pulses a , b , c or d . as will be noted , a set of four of the and gates 64 is connected to receive one each of these clock pulses and is , in turn , connected to an or gate 66 . specifically , in the depicted portion of circuit means 50 , and gates 64a through 64d are connected to receive intensity clock signals a to d respectively and to send or gate 66a the logical result of the inputs thereto , the write pulse waveform 48e for the fifth intensity level . and gates 64e through 64h are also connected to receive intensity clock signals a to d respectively and to forward to or gate 66b the logical result of the inputs thereto , the write pulse waveform 48h for the eighth intensity level . thus , and gate 64a receives the intensity clock a signal and a logical hi signal from buffer 62 . and gates 64b and 64c , which receive the intensity clock pulses b and c respectively at one of their inputs , are however kept from being toggled by the logical lo signal received from buffer 62 . and gate 64d receives the intensity clock d signal on one of its inputs and a logical hi on its other input from the buffer 62 . the net result is that and gates 64a and 64d are kept on by the buffer 62 code and pass the combined a and d intensity clock signals , the fifth intensity level or write pulse waveform 48e , to or gate 66a and drive 52 . in similar fashion , and gates 64e , 64f and 64h respectively pass only intensity clock signals a , b and d , due to the second stage buffer 62 contents , to or gate 66b . as shown in fig5 the combination of intensity clock signals a , b and c yields write pulse 48h , the eighth intensity level , which is then passed from or gate 66b to the write electrode driver 54 . the two pixels created thereby will be indistinguishable from each other by the naked human eye even though there will be a difference in their central gaps due to the two subdivision differences in their respective write pulse waveforms and effective on - time . thus , the elongated pixels produced by use of the present invention , will all appear to be of the same length . only in four instances will there be an apparent registration error and that has been held to an absolute minimum of one write cycle subdivision . the foregoing description has been specifically directed to the printing situation where a continuously moving recording medium is employed . it will be apparent to those having skill in this art that the present invention could also be of benefit when used in a matrix printer that halted movement of the recording medium during the printing cycle . thus , while the present invention has been described in the context of a preferred embodiment thereof , it will be readily apparent to those skilled in the appertaining art , that modifications and variations can be made therein without departing from its spirit and scope . accordingly it is not intended that the present invention be limited to the specifics of the foregoing description of the preferred embodiment . instead , the present invention should be considered as being limited solely by the appended claims , which alone are intended to define its scope .