the invention will be described in detail by way of a preferred embodiment with reference to accompanying drawings . as shown in fig2 a , a first insulating film 13 is formed on a semiconductor device 11 in which a junction 12 is formed so that the junction 12 is exposed to form a contact hole 12 a . then , a plug 14 is formed within the contact hole 12 a . the plug 14 is formed by stacking polysilicon 14 a and ti / tin 14 b . the ti / tin 14 b acts to reduce the contact resistance with a metal electrode to be formed thereon and to prevent the polysilicon 14 a and a metal from diffusing each other . ti / tialn or ti / tisin may be used instead of ti / tin . referring to fig2 b , an etching prevention layer 15 , a first diffusion prevention film 16 , and an oxide film 17 are sequentially formed on the entire structure , including the plug 14 . the oxide film 17 , the first diffusion prevention film 16 , and the etching prevention layer 15 are sequentially patterned using a mask for storage electrode . the etching prevention layer 15 is formed by depositing a nitride film to a thickness between about 500 å and about 1000 å so that loss of the first insulating film 13 is prevented when the oxide film 17 is etched . the first diffusion prevention film 16 is formed by depositing al 2 o 3 to a thickness between about 50 å and about 200 å by utilizing an atomic layer deposition ( ald ) method , and the oxide film 17 has a thickness between about 5000 å and about 12000 å so that it can exhibit a sufficient capacitance . referring to fig2 c , a metal or metal oxide , preferably including at least one of ru , pt , ruo 2 , ir , iro 2 , w , wn , and tin , is deposited to a thickness between about 200 å and about 400 å on the entire structure . the metal deposited on the oxide film 17 is removed in order to electrically separate the memory cells . thus , a storage electrode 18 is formed at the portion in which the oxide film 17 , the first diffusion prevention film 16 and the etching prevention layer 15 are patterned so that the storage electrode can contact the plug 14 . the metal deposited on the oxide film 17 is removed by utilizing an etch - back process or a chemical mechanical polishing ( cmp ). [ 0028 ] fig2 d shows a cross - sectional view of the device in which a dielectric film 19 and a plate electrode 20 are sequentially formed on the entire structure . the process of forming the dielectric film 19 includes depositing a high dielectric , e . g ., ta 2 o 5 , taon , or bst , to a thickness between about 100 å and about 250 å by utilizing a chemical vapor deposition ( cvd ) method having a good coverage property , and then performing a low - temperature thermal process at a temperature range between about 350 ° c . and about 450 ° c . by utilizing an oxygen ( o 2 ) plasma or uv / o 3 method , or by performing a high - temperature thermal process in a reactive furnace or a rapid thermal processing equipment having a temperature range between about 550 ° c . and about 700 ° c . so that organic impurity contained in the source can be removed . the plate electrode 20 is formed of a metal or metal oxide , preferably including at least one of ru , pt , ruo 2 , ir , iro 2 , w , wn , and tin . additionally , it is preferred that ta 2 o 5 and taon are formed with a thickness between about 100 å and about 150 å and the bst is formed with a thickness between about 150 å and about 250 å . [ 0030 ] fig2 e shows a cross - sectional view of the device in which al 2 o 3 is deposited at a thickness between about 50 å and about 200 å on the plate electrode 20 by utilizing the ald method to form a second diffusion prevention film 21 . a second insulating film 22 is then formed on the second diffusion prevention film 21 so that the surface of the second diffusion prevention film is essentially flat . in the capacitor manufactured as above , penetration of hydrogen ions from the etching prevention layer 15 and the bottom can be prevented by the presence of the first diffusion prevention film 16 . also , penetration of hydrogen ions from the outside can be prevented by the presence of the second prevention film 21 . in this way deterioration of the dielectric property of the dielectric film 19 due to penetration of hydrogen ions does not occur . as the property of the dielectric film is preserved , degradation of reliability of a device due to generation of a leakage current can be prevented . also , the invention can maintain the property of a mos transistor at an optimal state by eliminating the problems generated during a thermal process . further , the invention makes it possible to effectively generate a desired capacitance depending on the use of a dielectric and a metal electrode , thus facilitating a higher integration of a device . the invention has been described with reference to a particular embodiment in connection with a particular application . those having ordinary skill in the art and access to the teachings of the present invention will recognize additional modifications and applications within the scope thereof . it is therefore intended by the appended claims to cover any and all such applications , modifications , and embodiments within the scope of the present invention .