referring to the drawing , the reference numeral 1 designates a t . v . signal receiving circuit which takes video signals ( v , d ) from composite video signals including video signals v and character broadcasting signals d . the reference numeral 2 designates an a / d converter which converts the video signals v output from the t . v . signal receiving circuit 1 into digital gradation density signals vd . the reference numeral 3 designates a character decoder which takes character broadcasting signals ( v , d ) from the composite video signals , and decodes the same for broadcasting . the reference numeral 4 designates a copy key whereby an instruction is given so as to determine that either the pictures or characters should be selected for printing - out , of which the key 4a is for pictures and the key 4b is for characters . the reference numeral 5 designates a video memory in which either of the video gradation density signals vd or the character broadcasting signals d are stored . the reference numeral 6 designates a first multiplexer ( signal selector ) which delivers to the video memory 5 either of the gradation density signals vd from the a / d converter 2 or the character broadcasting signals d from the character decoder 3 , in accordance with the instruction of the copy key 4 . the reference numeral 10 designates a writing address control circuit which delivers an address signal a to the video memory 5 at the timings required when either of the gradation density signals vd or the character broadcasting signals d are written in the video memory 5 . the reference numeral 11 designates a video clock pulse generator which generates timing pulses for writing the gradation density signals vd in the video memory 5 . the reference numeral 12 designates a character clock pulse generator which generates timing pulses for writing the character broadcasting signals d in the video memory 5 . the reference numeral 13 designates a writing address counter whereby the address signal a is delivered to the video memory 5 at the timings of the output of either of the clock pulse generators 11 or 12 . the reference numeral 14 designates a second multiplexer which delivers either of the video clock pulses or character clock pulses to the writing address counter 13 in accordance with the instruction of the copy key 4 . the reference numeral 7 designates a cpu ( central processing unit ) which reads either of the gradation density signals vd or the character broadcasting signals d in the video memory 5 , and outputs a switching control signal 20 whereby either of the first or second multiplexer 6 or 14 is switched over in accordance with the instruction of the copy key 4 . the reference numeral 8 designates a printer for printing out either of the gradation density signals vd or the character broadcasting signals d read out by the cpu 7 . the reference numeral 9 designates a crt ( cathode - ray tube ) on which either the picture images or the character images selected by a selecting switch ( not shown ) are provided in the television receiver . the letters a and b designate display mode signals output from the character decoder 3 , the display mode signals being intended to communicate to the cpu which of the picture images or the character images or the multiplexd images thereof are displayed on the screen of the crt 9 . when the television receives the composite video signals , ( v , d ) they are input to the character decoder 3 and the t . v . signal receiving circuit 1 . as a result , the character broadcasting signals d are taken out by the character decoder 3 , and the video signals v are taken out by the t . v . signal receiving circuit 1 , thereby enabling the picture images or the character images to be represented on the screen of the crt 9 as selected by the selecting switch , at this stage the character broadcasting signals d are inserted in the form of digital data in the vertical blanking period of the t . v . signals , and the signals d are temporarily stored in the memory within the decoder 3 . subsequently , the signals d are converted into signals capable of visual representation on the crt 9 , and are represented on the screen thereof . if the viewers want to make a copy of the picture images or the character images appearing on the crt , they can select either of them by switching on the copy key 4a ( for the picture images ) or 4b ( for the character images ). now , suppose that the copy key 4a is pressed . in accordance with the instruction from the copy key 4a , the cpu 7 outputs the switching control signals 20 to the first and the second multiplexer 6 and 14 so as to cause the first multiplexer 6 to select the output from the a / d converter 2 , and to cause the second multiplexer 14 to select the video clock pulses . under such conditions the video signals v from the t . v . signal receiving circuit 1 are converted into gradation density signals vd by the a / d converter 2 , which are input to the video memory 5 through the first multiplexer 6 . in this case the address control is performed by the writing address counter 13 counting the video clock pulses delivered through the second multiplexer 14 , and giving the counted value to the video memory 5 as the address signal a at the timings of the video clock pulses . the gradation density signals vd which are written in the video memory 5 in this way are read out by the cpu 7 , and are printed out by the printer 8 . if the copy key 4b for the character broadcasting is pressed , the cpu 7 , in response to the instruction therefrom , outputs the switching control signals 20 which reversely switch the first and the second multiplexers 6 and 14 . as a result , the first multiplexer 6 is switched on so as to select the output of the character decoder 3 , and the second multiplexer 14 is switched on so as to select the clock pulses for character images . in such a situation the character broadcasting signals d in digital form separated by the character decoder 3 , are directly input to the video memory 5 through the first multiplexer 6 . in this case the address control is performed by the writing address counter 13 counting the clock pulses for character images , and giving the counted value to the video memory 5 as the address signal a at the timings of the clock pulses . the character broadcasting signals d which are written in the video memory 5 in this way are read out by the cpu 7 , and are printed out by the printer 8 . in the illustrated embodiment the video signals and the character broadcasting signals are switched over therebetween , and the selected signals are written in the video memory 5 . therefore , if the t . v . viewer wants to make a copy of either of the picture images or the character images , he has only to print out the content of the video memory 5 . this means that a single printer is sufficient for printing out both picture and character images . the character broadcasting signals are written in the video memory 5 , thereby securing an increased operational speed in comparison with that achieved under a system which conducts programmed transmission of the signals with the use of a memory and a cpu in the character decoder 3 . in addition , the transmission of data from the character decoder 3 is finished in one vertical period , and there is no need for stopping the flow of images on the screen when they are printed out . furthermore , the present invention has eliminated the need of writing in and reading out for the print - out within the character decoder 3 , which reduces the burden upon the decoder 3 , thereby allowing simplified circuits . as evident from the foregoing description , according to the present invention a single printer having a single memory is sufficient for printing out the picture images or character images as desired . in addition , the circuits of the character decoder can be simplified .