hereafter , referring to the drawings , a description will be given of an embodiment of the invention . fig1 is a block diagram showing a configuration of a switching power supply control circuit according to the embodiment . a control ic 8 configuring the switching power supply control circuit has basically the same configuration as a related pwm controlling control ic 8 previously described in fig6 . the control ic 8 , based on voltage from an ac input 1 , controls a flyback power supply ( refer to fig5 ) that generates a constant output voltage . also , a current detecting sense resistor 12 for converting the voltage of current flowing through a mosfet 17 , shown in fig5 , an is terminal that detects a converted voltage signal , and an ocp comparator 45 for detecting an overcurrent in the control ic 8 configure an overcurrent protection circuit for detecting overcurrent . a description will be given of portions in fig1 differing from a heretofore known switching power supply control circuit , while the same reference signs are given to portions corresponding to the heretofore known circuit shown in fig6 , and a detailed description thereof will be omitted . differences between the control ic 8 and the heretofore known circuit ( fig6 ) are that an overcurrent level setting circuit 50 is connected to the inversion input terminal (−) of the ocp comparator 45 , and the overcurrent protection level of the mosfet 17 is determined without using a reference power supply v 3 . firstly , a description will be given of an operation of the control ic 8 when protecting from overcurrent . the mosfet 17 is turned on , current flows through the sense resistor 12 connected to the mosfet 17 , and the voltage of the is terminal of the control ic 8 rises . on the voltage of the is terminal of the control ic 8 rising to or above an overcurrent protection level voltage inside the control ic 8 , the output of the overcurrent detecting ocp comparator 45 is inverted , and a reset signal is generated for an rs flip - flop 38 of a subsequent stage . on the rs flip - flop 38 being reset , a signal causing the mosfet 17 to be turned off is output from an out terminal . as the output signal of a one - shot circuit 37 is a short pulse signal , and is normally at an l level at a point at which an overcurrent occurs , the output of an or gate 39 is fixed by the output of the rs flip - flop 38 . also , input noise immediately after the mosfet 17 is turned on can be eliminated by adding an unshown leading edge blanking circuit , or the like , to the is terminal of the control ic 8 . the overcurrent level setting circuit 50 is connected between a slope compensation circuit 35 and the inversion input terminal (−) of the ocp comparator 45 , and outputs a reference voltage signal sd determining the overcurrent protection level . the overcurrent level setting circuit 50 is such that the reference voltage signal sd rises continuously from immediately after the mosfet 17 is turned on , correcting the phenomenon whereby the peak current when protecting the mosfet 17 from overcurrent becomes higher the higher the level of the input voltage from the ac input 1 . fig2 is a circuit diagram showing the slope compensation circuit in the control circuit of fig1 . the slope compensation circuit 35 has the same configuration as a heretofore known slope compensation circuit 35 shown in fig7 , except for including a terminal 35 d for outputting a slope voltage signal sa . that is , in the slope compensation circuit 35 , a capacitor c 1 is charged by a current from a current source circuit i 1 on an oscillating signal dmax of an oscillator 34 input from an input terminal 35 b changing to an h level , and generates an integrated voltage sa that increases monotonically , as described in relation to fig7 . the monotonically increasing integrated voltage sa is output from the terminal 35 d as a slope voltage signal sa . that is , when the mosfet 17 that carries out a switching operation is turned on , the capacitor c 1 is charged , generates the monotonically increasing slope voltage signal sa , and outputs the slope voltage signal sa to the overcurrent level setting circuit 50 . consequently , the gradient of the slope voltage signal sa is determined by the capacitance value of the capacitor c 1 and the value of the current ( i 1 ) from the current source circuit i 1 , and the slope voltage is such that the voltage value increases further the longer the on - state duration of the switching in the mosfet 17 . fig3 is a circuit diagram showing the overcurrent level setting circuit in the control circuit of fig1 . the overcurrent level setting circuit 50 includes an input terminal 50 a , into which the slope voltage signal sa is input , and an output terminal 50 b , which outputs the reference voltage signal sd . the overcurrent level setting circuit 50 is configured of a pnp transistor t 3 and an npn transistor t 4 , each of which configures an emitter follower circuit , current source circuits 16 and 17 , p - channel transistors m 8 and m 9 configuring a current mirror circuit , and resistors r 3 and r 4 . in the overcurrent level setting circuit 50 , a voltage signal which is ( the slope voltage signal sa + the base - emitter voltage of the pnp transistor t 3 ) is generated at the emitter terminal of the pnp transistor t 3 in the emitter follower formed of the pnp transistor t 3 , while a voltage signal which is ( the slope voltage signal sa + the base - emitter voltage of the pnp transistor t 3 − the base - emitter voltage of the npn transistor t 4 ≈ the slope voltage signal sa ) is generated at the emitter terminal of the npn transistor t 4 in the emitter follower formed of the npn transistor t 4 . this is done in order to apply the slope voltage signal sa with converted impedance to the resistor r 3 . as the slope voltage signal sa with converted impedance is applied to the resistor r 3 , a current proportional to the slope voltage signal sa flows through the resistor r 3 . this current is copied in the current mirror circuit formed of the transistors m 8 and m 9 , and a current wherein a reference current of the current source circuit i 7 ( the current value is also expressed as i 7 ) is added to the copied current flows through the resistor r 4 ( the resistance value thereof is also expressed as r 4 ). that is , the voltage of a current wherein the reference current ( i 7 ) is added to the current proportional to the slope voltage signal sa is converted by the resistor r 4 , forming the reference voltage signal sd . consequently , the reference voltage signal sd determining the overcurrent protection level output from the output terminal 50 b increases continuously from a non - zero initial voltage (= i 7 × r 4 ) ( the increase is generated by the current proportional to the slope voltage signal sa flowing through the resistor r 4 ). the reference voltage signal sd , wherein the voltage proportional to the slope voltage signal sa and the initial voltage are added together , is supplied to the inversion input terminal (−) of the ocp comparator 45 , as shown in fig1 . because of this , a reset signal is input into the rs flip - flop 38 on the voltage of the is terminal of the control ic 8 rising above the reference voltage signal sd . consequently , it is possible to cause the mosfet 17 to be turned off at the timing at which the output signal of the ocp comparator 45 is inverted . fig4 a and 4b are timing diagrams illustrating a correction operation by the overcurrent level setting circuit of fig3 . a voltage signal sb ( a trapezoidal wave signal ) and the oscillating signal dmax , each generated by the oscillator 34 ( fig9 ), rise simultaneously at a timing t 4 , a timing t 7 , and the like , as shown in fig4 ( b ) and ( c ), while an h level switch signal sout is output from a drive circuit 42 to the out terminal , as shown in fig4 a . because of this , it is possible to cause the mosfet 17 to be turned on . the continuously rising slop voltage signal sa is generated in the slope compensation circuit 35 by the capacitor c 1 being charged from the current source circuit i 1 in synchronization with the timings t 4 and t 7 at which the oscillating signal dmax rises , as shown in fig4 d . the reference voltage signal sd from the overcurrent level setting circuit 50 shown in fig4 e has a value of at the timings t 4 and t 7 immediately after the mosfet 17 is turned on , and from there becomes a continuously rising voltage signal that rises at a gradient proportional to i 1 / c 1 ( v / s ). the voltage signal sb ( a trapezoidal wave signal ) in the oscillator 34 is such that a constant voltage value v 5 is maintained from timings t 2 and t 5 at which charging periods finish and modulation periods i and ii start , as shown in fig4 b . because of this , it is not possible to also generate a signal maintaining a continuously rising gradient in the oscillator 34 during the modulation periods i and ii . as opposed to this , the slope voltage signal sa from the slope compensation circuit 35 has a continuously rising gradient during the period for which the oscillating signal dmax is at an h level , as heretofore described . consequently , the overcurrent protection reference voltage signal sd generated based on the slope voltage signal sa is a signal that also increases at a continuously rising gradient throughout the modulation periods i and ii . when the output voltage of the switching power supply is controlled to be constant , the on - state duration of the switch signal sout is shorter the higher the input voltage from the ac input 1 , and longer the lower the input voltage . therefore , by a voltage proportional to the slope voltage signal sa , which is proportional to the on - state duration of the switch signal sout , being added to the constant overcurrent reference voltage (= i 7 × r 4 , corresponding to the voltage of the reference power supply v 3 of the circuit shown in fig6 ), the voltage of the reference voltage signal sd is high in an overcurrent condition when the input voltage is low ( the on - state duration is long ), while the voltage of the reference voltage signal sd is low in an overcurrent condition when the input voltage is high ( the on - state duration is short ). consequently , input voltage correction is carried out on the overcurrent reference voltage by this operation of the overcurrent level setting circuit 50 , and it is possible to correct fluctuation occurring in the peak current of the mosfet 17 when carrying out overcurrent protection . in this way , according to the switching power supply device of embodiments of the invention , it is possible to provide the control ic 8 , which has a frequency modulation function using a modulation period ( idle period ), with an advantage of correcting the input voltage with respect to the peak current of the mosfet 17 when carrying out overcurrent protection . the heretofore described mosfet 17 has been used as one example of a switching element , and may be replaced with a device such as an igbt ( insulated gate bipolar transistor ) or bipolar transistor . the above description shows simply the principle of embodiments of the invention . furthermore , a large number of modifications and changes are possible for those skilled in the art and , the invention not being limited to the exact configuration and application heretofore shown and described , all corresponding modification examples and equivalents are seen as being within the range of the invention according to the attached claims and equivalents thereof .