in fig1 reference character p indicates an electrode ; w designates a workpiece ; c identifies a capacitor ; v denotes a dc high - tension power supply ; q represents a switching element , for example , a transistor ; r1 to r3 show resistors ; cmp1 and cmp2 refer to first and second comparators ; osc1 and osc2 indicate first and second oscillators , g1 designates an and circuit ; and g2 identifies an or circuit . the capacitor c is charged by the dc high - tension power supply v via the resistor r1 and the transistor q , and the charged voltage is applied across the electrode p and the workpiece w to produce a discharge in the working gap defined therebetween . a working gap voltage v g during working is detected by the resistors r2 and r3 and provided to one input of each of the first and second comparators cmp1 and cmp2 . the first comparator cmp1 compares the working gap voltage v g and a reference voltage v 1 and , when the working gap voltage v g is reduced by the discharge to a level lower than a potential level v 1 shown in fig2 the comparator cmp1 starts the second oscillator osc2 . oscillator osc2 stops oscillating when the working gap voltage v g is raised by the charging of the capacitor c to a higher level than the potential level v 1 . in contrast thereto , the second comparator cmp2 compares the working gap voltage v g and another reference voltage v 2 and holds the transistor q in the on state when the working gap voltage v g remains above a potential level v 2 shown in fig2 . the first oscillator osc1 steadily applies pulse signals of a short pulse duration to the and circuit g1 , and usually the on and off periods of the output from the first oscillator osc1 can arbitrarily be set by an external setting circuit ( not shown ). the second oscillator osc2 , when started , first generates an on pulse of a longer duration than that of the pulse signal from the first oscillator osc1 and then an off interval of a longer duration than the off interval of the pulse signal from the first oscillator osc ; thereafter , the second oscillator repeats the alternate generation of such on and off signals . when stopped , the second oscillator osc2 stops its oscillation but continues to produce an on signal . next , a description will be given , with reference to fig2 of the operation of the circuit shown in fig1 . in the initial state , the voltage across the capacitor c is substantially zero and , accordingly , the second oscillator osc2 is started by the output from the first comparator cmp1 and provides the alternating on and off signals . further , the output from the second comparator cmp2 is low - level . in this state , when the output pulse of the first oscillator osc1 is provided to the base of the transistor q via the and circuit g1 and the or circuit g2 , the transistor q undergoes an on - off operation and the capacitor c is charged by the dc high - tension power supply v . at this time , if the electrode p and the workpiece w are sufficiently insulated from each other without forming an arc in the working gap therebetween , the charging voltage of the capacitor c , that is , the working gap voltage v g , is able to exceed the aforesaid potential levels v 1 and v 2 . when the working gap voltage v g exceeds the potential level v 1 , the oscillation of the second oscillator osc2 is stopped by the output from the first comparator cmp1 . but since the second oscillator osc2 continues to yield an on signal , the output pulses of the first oscillator osc1 can be applied to the base of the transistor q . in addition , since the transistor q is held in the on state by the output from the second comparator cmp1 from the moment when the working gap voltage v g exceeds the potential level v 2 , the capacitor c is charged up to a value substantially equal to the voltage of the dc high - tension power supply v . and when a discharge is produced across the working gap a little time thereafter , the working gap voltage v g rapidly drops below the potential levels v 1 and v 2 , so that the second oscillator osc2 is restarted by the output from the first comparator cmp1 and the output from the second comparator cmp2 becomes low - level , so that the circuit is restored to its initial state . the above - described operations are carried out under normal working conditions . when an arc is caused in the working gap , an instantaneous arc discharge is repeated as indicated by a in fig2 and , as a result of this , the working gap voltage v g is unable to rise above a certain value . in other words , the working gap voltage v g does not exceed the potential levels v 1 and v 2 . in the conventional power sources for electric discharge machines , since only the output pulse from the first oscillator osc1 is supplied directly to the transistor q , it is difficult to eliminate an arc once it forms . in the present invention , however , when an arc is caused , since the second oscillator osc2 is held in its oscillating state , the current flowing across the working gap is cut off both by the short duration off intervals of the first oscillator osc1 and the long duration off intervals of the second oscillator osc2 , thereby facilitating the recovery of the working gap . accordingly , since normal charging and discharging can be quickly restarted , the frequency of discharge per unit time can be increased to provide for enhanced working efficiency . as will be appreciated from the foregoing description , the potential levels v 1 and v 2 , which are operating levels of the first and second comparators cmp1 and cmp2 , are set to be a little higher than the highest voltage of the working gap voltage v g during arcing . it is also possible to set the potential level v 1 to be equal to or higher than the potential level v 2 so long as it lies within the abovesaid range and , in this case , the second oscillator osc2 need not be held to the on level when its oscillation is stopped . also it is possible to employ an arrangement wherein the second comparator cmp2 is omitted and the output from the first comparator cmp1 is provided via a not circuit ( not shown ) to the or circuit g 2 . as has been described in the foregoing , according to the present invention , when an arc is caused in the working gap , the off period of the transistor inserted in the charging path of the capacitor is increased to cut off the current flowing across the working gap for a relatively long period of time , so that the insulation quickly recovers during arcing . accordingly , the discharge frequency can be increased to improve the working efficiency .