fig1 illustrates , in isometric view , the exterior structure of the portable , battery powered ultrasonoscope 11 of the invention which is provided for the examination of the interior of a patient &# 39 ; s body . fig2 illustrates the invention in block form . a master clock generator 13 generates a repetitive clock pulse which is fed as a trigger pulse to a transmitter 15 . the transmitter 15 transmits an electrical pulse to an ultrasonic transducer 17 which is positioned on the skin of the patient &# 39 ; s body . the transducer 17 converts the electrical signal to an ultrasonic pulse which it radiates into the patient &# 39 ; s body from the end of the transducer . echoes are reflected from the surface of the body and from interfaces in the body . the echoes are picked up by the transducer 17 and converted to electrical echoes signals . the electrical echo signals are applied to a receiver 19 . the receiver 19 receives the electrical echo signals and feeds them to a cathode ray tube 21 . the signal generated by the master clock generator 13 is also fed as a trigger pulse to a time - base sweep generator 23 . the time - base sweep generator 23 generates a sawtooth time - base sweep signal . the time - base sweep signal is applied to the x axis input of the cathode ray tube 21 to horizontally deflect a spot of light produced on the screen of the cathode ray tube synchronously with the pulsing of the transducer 17 . &# 34 ; a &# 34 ; mode scan and &# 34 ; m &# 34 ; mode scan are combined in the ultrasonoscope . in &# 34 ; a &# 34 ; mode , the signal from the receiver 19 is applied to the y axis input of the cathode ray tube 21 . in &# 34 ; m &# 34 ; mode the signal from the receiver 19 is applied to the z axis input of the cathode ray tube 21 . fig3 illustrates &# 34 ; a &# 34 ; mode scan wherein the echoes are presented as vertical deflections of the trace or &# 34 ; pips &# 34 ; on the screen , and since the time delay between a transmitted pulse and the received echo depends on the distance between the transducer to the reflecting interface , the depth of the reflecting interface from the end of the transducer is represented along the x axis . fig4 illustrates &# 34 ; m &# 34 ; mode scan wherein the echoes are represented as a brightening or intensity modulation of the time - base trace and the time - base is swept at right angles to its direction so as to plot the position of an interface which is moving . elapsed time is represented along the y axis , and the depth of the reflecting interface from the end of the transducer is represented along the x axis . the signal generated by the master clock generator 13 is also fed to a depth marker generator 25 . the depth marker generator 25 generates repetitive pulses which are fed to the y axis input of the cathode ray tube 21 to provide depth markers along the base line of the display . in fig3 and 4 , depth markers are denoted by the numeral 53 . in accordance with the present invention , the ultrasonoscope is further provided with &# 34 ; c &# 34 ; mode scan means outlined by the broken line 27 . in &# 34 ; c &# 34 ; mode , the repetitive clock pulses generated by the master clock generator 13 are fed as trigger pulses to a staircase voltage generator 29 over connections represented by lead 31 . the staircase voltage generator 29 generates a staircase voltage signal whose steps are in sync with the clock pulses . the staircase signal is applied over connections represented by lead 33 to the y axis input of the cathode ray tube 21 . the signal generated by the master clock generator 13 is also fed to a sequencer 35 over lead 37 . the sequencer 35 is provided with a plurality of output terminals whose number ( n + 4 ) where n is a positive integer , is determined by the desired resolution of the display , and may amount to 24 for example . the sequencer 35 is set by the clock pulse to initiate a trigger pulse at each one of its out - put terminals in time sequence . the second output terminal and the second - from - last output terminal are connected to the depth marker generator 25 over connections represented by lead 39 . the second and second - from - last trigger pulses in the sequence cause display of the depth markers at the bottom and top of the screen of the cathode ray tube . a plurality 41 of transmitters , n in number , are connected respectively to the third through third - from - last output terminals of the sequencer 35 . each of the next n trigger pulses after the first two in the sequence fire the transmitters 41 in cyclic order . each transmitter transmits an electrical pulse over connections represented by lead 43 to a respective one of an array of n ultrasonic transducers 45 arranged in a row and positioned on the skin of the patient &# 39 ; s body . the respective transducer converts electrical signal to an ultrasonic pulse which is radiated into the patient &# 39 ; s body from the end of the transducer . the echoes are picked up by the transducer and converted to electrical echo signals . the electrical echo signals are applied to the receiver 19 over connections represented by lead 47 . the last output terminal of the sequencer is connected to a bias voltage generator 49 . the last trigger pulse in the sequence causes the bias voltage generator 49 to generate a bias voltage for offsetting the vertical position of the staircase voltage half a raster line from that of the previous frame on the screen of the cathode ray tube 21 . the bias voltage signal is applied over connections represented by lead 51 to the y axis input of the cathode ray tube . in &# 34 ; c &# 34 ; mode , the receiver signal is applied to the z axis input of the cathode ray tube . fig5 illustrates &# 34 ; c &# 34 ; mode scan wherein the echoes are represented as a brightening or intensity modulation of the cathode ray . the vertical position of the cathode ray corresponds at any time with the position of the active transducer in the array . the depth of the reflecting interface from the plane of the transducer is represented along the x axis . the number of horizontal lines in the frame is selected as twice the number of transducers plus two extra lines at the top and bottom for depth markers . the bias voltage applied to the y axis input produces the visual effect of having twice the number of ultrasonic transducers in the array , thereby enhancing the display . depth markers are denoted by the numeral 53 . the representation obtained on the screen of the cathode ray tube provides a two dimensional or cross - sectional image of anatomical organs or structures or the like , in which all displacements , for instance , of the heart wall , can be observed . the prime embodiment of this invention is more particularly described with reference to fig6 and 7 which collectively show a schematic circuit diagram of the &# 34 ; c &# 34 ; mode scan means of the ultrasonoscope of this invention . the circuits outlined in fig6 and 7 by broken lines carry the same reference numbers as the blocks in fig2 . enclosed by a broken line 29 is the staircase voltage generator . a non - inverting amplifier 55 is connected to input lead 31 . the output of the amplifier 55 is connected to the first input of the positive logic nor gate 57 whose output forms the input of the positive logic nor gate 59 . the output of the amplifier 55 is also connected to the clock input cl of the d - type flip flop 61 whose set output q comprises the second input of the nor gate 57 . the output of the nor gate 59 is connected to the clock input cl of the 7 - stage binary counter 63 and the set output q of the d - type flip - flop 61 is connected to the reset input r of the binary counter 63 . the outputs of the stages of the binary counter 63 are connected to an analog - to - digital conversion resistor ladder network 63 whose output is coupled through source follower 67 to lead 33 . when each clock pulse appears on lead 31 , the output of the nor gate 57 goes low in response to a high at its inputs . the output of the nor gate 59 is thereby caused to go high and the binary counter 63 is energized causing a voltage waveform to appear across the ladder network 65 and to be coupled through the source follower 67 to the y - axis input of the cathode ray tube 21 . enclosed by the broken line 35 is the sequencer . the output of the non - invertering amplifier 55 is connected by lead 68 to the clock input cl of the units decade counter 69 to start a count of units and the set output q of the d - type flip flop 61 is connected by lead 70 to the reset input r of the units decade counter 69 . a tens decade counter 71 is cascaded with the units decade counter 69 and driven thereby to indicate tens . the outputs of the stages of the units decade counter 69 are connected to the data inputs in of the bilateral pulse switches ps n - 2 through ps n + 2 , the output of the first stage being connected to every tenth pulse switch starting with ps n - 2 , the output of the second stage being connected to every tenth pulse switch starting with ps n - 1 , and so forth . the outputs of the stages of the tens decade counter 71 are connected to the control inputs vc of the bilateral pulse switches ps n - 2 through ps n + 2 , the output of the first stage being connected to the first ten pulse switches , the output of the second stage being connected to the second ten pulse switches and so forth . the outputs out of the bilateral pulse switches ps n - 2 through ps n + 2 are connected to ground through the resistors r . the output of the second bilateral switch ps n - 1 and the second from last bilateral pulse switch ps n + 1 are connected through the diodes 73 and 75 to the pulse amplifier driver 77 whose output is connected by lead 39 to the depth marker generator 25 . the outputs of the third through third from last pulse switches ps 1 through ps n are connected to the pulse amplifiers a 1 through a n . the operation of the sequencer 35 will now be described in conjunction with fig7 and the waveforms illustrated in the timing diagrams of fig8 . the clock pulses have a waveform as illustrated in fig8 ( a ). let it be assumed that the units decade counter 69 and the tens decade counter 71 have been reset by a positive going pulse at their reset inputs r . when the first clock pulse appears on lead 31 the clock input cl of the units decade counter 69 goes high in response to a high at the output of the amplifier 55 . a voltage pulse p n - 2 with a waveform as shown in fig8 ( c ) then appears at the output of the first stage of the units decade counter 69 and also at the data inputs in of every tenth bilateral pulse switch starting with the first switch ps n - 2 . in order for the pulse p n - 2 to pass through the switches to their outputs out , a positive voltage is required at the switch control inputs vc . this voltage is derived from the output of the first stage of the tens decade counter 71 and appears only for the first ten pulse switches ps n - 2 through ps 8 . thus only the pulse switch ps n - 2 is turned on , allowing the pulse p n - 2 to pass through to its output out and across the resistor r . in the meantime , the step s n - 2 of the staircase voltage waveform shown in fig8 ( b ) is generated and the staircase voltage is allowed time to settle during retrace . when the second clock pulse appears on lead 31 , the clock input cl of the units decade counter 71 goes high and a voltage pulse p n - 1 with a waveform as shown in fig8 ( d ) appears at the output of the second stage of the units decade counter 69 . this clock pulse also initiates step s n - 1 of the staircase voltage waveform shown in fig8 ( b ). with a positive voltage at the control input vc of the bilateral pulse switch ps n - 1 from the output of the first stage of the tens decade counter 71 pulse switch ps n - 1 is turned on next . the pulse p n - 1 passes through the switch , appears across the resistor r and is coupled through the diode 73 to the pulse amplifier driver 77 . when the third clock pulse appears on lead 31 , the staircase voltage is advanced another step to step s 1 as shown in fig8 ( b ) and a voltage pulse p 1 with a waveform as shown in fig8 ( e ) is caused to appear at the output of the third stage of the units decade counter 69 and at the input of pulse switch ps 1 and every tenth pulse switch therefrom . only pulse switch ps 1 is turned on because only its control input vc voltage is high and the pulse p 1 passes through the pulse switch ps 1 to the first pulse amplifier a1 . the sequence of events described for pulse p 1 is then repeated for each of the pulses p 2 through p 8 . the voltage pulse p 8 is the tenth pulse event for the units decade counter 69 . the next clock pulse initiates two events . the first event is that the units decade counter 69 recycles producing pulse p 9 at the output of its first stage . the second event is that a positive going pulse from the output co of the units decade counter 69 is coupled to the input cl of the tens decade counter 71 . this latter pulse turns off the positive voltage at the output of the first stage of the tens decade counter 71 and replaces it with a positive voltage at the output of the second stage so that the control inputs vc of the pulse switches ps 9 through ps 18 now are caused to go high . pulse switch ps 9 is turned on and the pulse p 9 passes through to the ninth pulse amplifier a 9 . the succeeding clock pulses cause the pulses p 10 through p n to be passed through the pulse amplifiers ps 10 through ps n . the waveform of the voltage pulse p n is shown in fig8 ( f ), and the corresponding step s n of the staircase voltage waveform is illustrated in fig8 ( b ). when the ( n + 1 ) th clock pulse appears on lead 31 , the staircase voltage is advanced to step s n + 1 as shown in fig8 ( b ) and a voltage pulse p n + 1 with a waveform as shown in fig8 ( g ) is caused to appear at the output of the corresponding stage of the units decade counter 69 and at the data input in of the pulse switch ps n + 1 . the pulse p n + 1 passes through the pulse switch ps n + 1 , appears across the resistor r and is coupled through the diode 75 to the pulse amplifier driver 77 . finally , when the ( n + 2 ) th clock pulse appears on lead 31 , a voltage pulse p n + 2 with a waveform as shown in fig8 ( h ) occurs at the data input in of the pulse switch ps n + 2 . the pulse p n + 2 passes through the pulse switch ps n + 2 to the direct set input s of the d - type flip - flop 79 causing its set output q to go high , thereby resetting the binary counter 63 , the units decade counter 69 , and the tens decade counter 71 for a new cycle of operations . enclosed by a broken line 41 in fig2 are the ultrasonic transmitters txi - txn and analog switches as 1 - as n . only the details of the first transmitter txi have been illustrated since each of the n transmitters is identical . the output of the pulse amplifier a1 is connected to the junction of the control input vc of the analog switch as 1 and the resistor r1 . the resistor r1 is connected by a parallel combination of the resistor r2 and the capacitor c1 to ground . resistor r1 is also connected to ground through the capacitor c2 and the parallel combination of the diode cr1 and the primary winding of the transformer t1 . a silicon controlled rectifier scri , shunted by the resistor r5 , is connected at its gate through the resistor r3 to one of the secondary windings of the transformer t1 , and at its cathode to ground through the diode cr2 . a silicon controlled rectifier scr2 , shunted by the resistor r6 , is connected at its gate through the resistor r4 to another secondary winding of the transformer t1 , at its cathode to the anode of the silicon controlled rectifier scr1 through the diode cr3 and at its anode to the high voltage hv through the series circuit of the coil l1 , the decoupling diode cr9 and the resistor r9 , and to ground through the capacitor c3 and the diode cr4 . the junction of the diode cr9 and the resistor r9 is connected to ground through the capacitor c5 . the junction of the capacitor c3 and the diode cr4 is connected through the diode cr5 to the junction of the first ultrasonic transducer , the resistor r7 , and the capacitor c4 . the capacitor c4 is connected to ground through the parallel combination of diodes cr7 and cr8 and the resistor r8 , and also to the data input in of the analog switch as 1 . referring to fig7 and 9 , the operation of the first transmitter will now be described , as illustrative of the operation of the n ultrasonic transmitters . the transmitter relies on capacitive discharge to fire the ultrasonic transducer . when the pulse p 1 with a waveform as shown in fig9 ( a ) appears at the output of the pulse amplifier a1 , resistors r1 and r2 provide isolation and divide the pulse amplitude . the capacitor c1 filters out high frequency noise and the capacitor c2 differentiates the pulse . the negative portion of the differentiated pulse is clipped by the diode cr1 and the positive portion of the pulse with a waveform shown in fig9 ( b ) passes to transformer t1 causing a current to flow in its secondary windings and the silicon controlled rectifiers scr1 and scr2 to be triggered . resistors r3 and r4 desensitize the gates of the silicon controlled rectifiers to rfi firing . the diodes cr2 and cr3 , biased by voltage dividing resistors r5 and r6 , minimize anode rfi firing of the silicon controlled rectifiers . while only two silicon controlled rectifiers are shown , it is to be understood that additional silicon controlled rectifiers can be added in cascade depending upon the magnitude of the high voltage . capacitor c3 is charged from the high voltage hv through a charging circuit comprising the resistor r9 , the diode cr9 , the coil l1 , the capacitor c3 , and the diode cr4 . when the leading edge of the pulse p 1 fires the silicon controlled rectifiers , the charge on the capacitor c3 is discharged through scr1 and scr2 via the diode cr5 and the resistor r7 in parallel with the first ultrasonic transducer . the discharge current impulse with a waveform shown in fig9 ( c ) causes the first ultrasonic transducer to radiate an ultrasonic pulse into the patient &# 39 ; s body from the end of the transducer . the echoes picked up by the transducer are converted to electrical echo signals appearing across the resistor r7 with a waveform shown in fig9 ( d ). the electrical echo signals are capacitively coupled through the capacitor c4 to the data input in of the analog switch as 1 . the diodes cr7 and cr8 are provided for clipping large signals and the resistor r8 is the input load for the analog switch . the analog switch as 1 is turned on by the appearance of the pulse p 1 at the control input vc and the electrical echo signals are passed through the switch to a common signal bus 81 and to the base of the transistor 83 whose output is coupled to the receiver 19 by lead 47 , as intensity modulating signals with a waveform shown in fig9 ( e ). enclosed by the broken line 49 is the bias voltage generator . the output out of the pulse switch ps n + 2 is connected by lead 84 to the clock input cl of the d - type flip - flop 79 whose set output q comprises the input of the pulse amplifier 85 . at the output of the pulse amplifier 85 are connected two potentiometers 87 and a source follower 89 which is connected by lead 51 to the y input of the cathode ray tube . at the last clock pulse appearing on lead 31 , the voltage pulse p n + 2 sets the d - type flip - flop 79 causing its set output q to go high and providing an input voltage to the source follower 89 . a bias voltage is thereby supplied to offset the staircase voltage at the y input of the cathode ray tube 21 . obviously , numerous modifications and variations of the present invention are possible in light of the above teachings . it is therefore to be understood that within the scope of the appended claims , the invention may be practiced otherwise than as specifically described herein .