fig1 depicts a train control system including a brake interface unit in accordance with the illustrative embodiment of the present invention . the train control system comprises , vital positive train control ( v - ptc ) 110 , brake interface unit ( biu ) 130 , and train brake system 140 . brake interface unit ( biu ) 130 is interface for engaging the brakes on a train . it is connected to at least one train control processor that is in control of a train &# 39 ; s braking . in accordance with the illustrative embodiment of the present invention , brake interface unit ( biu ) 130 performs one or more of the following six ( 6 ) functions : ( 1 ) carry instructions of a train control processor to apply the brakes on a train ; ( 2 ) detect a failure in the train control processor ; ( 3 ) detect a failure in its own circuitry ; ( 4 ) apply the brakes when a failure is found ; ( 5 ) perform self diagnostics ; and ( 6 ) perform any other action that is specified in the remainder of this disclosure . specifically , brake interface unit ( biu ) 130 is designed to maintain a short between the two wires — wire a and wire b — that connect it to train braking system 140 . the wires connect to a train &# 39 ; s electronic braking system or magvalve , depending on the design of the locomotive on which the present invention is used . when a short between wire a and wire b is maintained , the train brakes are in the “ released ” state . when the short is lost , the brakes are applied . for the purposes of this disclosure , when the brakes of train brake system 140 are applied , the braking system is said to be “ engaged ” or in “ an engaged state .” vital positive train control ( v - ptc ) 110 is a system for monitoring and controlling train movements . it is equipment that is carried on board of trains which enforces speed limits , automatically applies brakes , and performs other functions . in accordance with the illustrative embodiment of the present invention vital positive train control ( v - ptc ) 110 comprises two processors : train control processor 310 and train control processor 320 ( see , e . g ., fig2 - 3 , etc .). each processor executes logic for determining when the penalty braking on a train should be applied . the logic is denoted penalty brake application 340 - 1 and 340 - 2 . ( see , e . g ., fig3 , etc .). the logic of the penalty brake applications determines what signals are provided to brake interface unit ( biu ) 130 and when . it depends on these signals whether brake interface unit ( biu ) 130 applies the brakes of train brake system 140 . two types of signals are used by vital positive train control ( v - ptc ) to manipulate the operation of brake interface unit ( biu ) 130 : ac signals and high - low signals . the ac signals energize switching devices ( e . g ., relays , etc .) that are used to maintain the short between wire a and wire b . the high - low signals cause brake interface unit ( biu ) 130 to generate additional ac signals . the additional ac signals also energize switching devices ( e . g ., relays , etc .) that are used to maintain the short between wire a and wire b . in addition to the ac and high - low signals , vital positive train control ( v - ptc ) 110 is capable exchanging data with brake interface unit ( biu ) 130 via network 120 . network 120 is an ethernet network . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which the data communication between the train control processors is implemented in alternative means ( e . g ., universal serial bus , controller area network ( can - bus ), etc .). the capability to receive and send data to vital positive train control ( v - ptc ) 110 further increases the functionality of the present invention . nevertheless , it should be noted that network 120 is dispensable . those skilled in the art will readily recognize , after reading this disclosure , that alternative embodiments of the present invention can be devised in which vital positive train control ( v - ptc ) and brake interface unit ( biu ) 130 exchange the ac signals only . in accordance with the illustrative embodiment of the present invention , vital positive train control ( v - ptc ) generates two ac signals . however , those skilled in the art will readily recognize , after reading this disclosure , that any number of ac signals can be used by vital positive train control ( v - ptc ) 110 to manipulate the operation of brake interface unit ( biu ) 130 ( e . g ., 1 , 3 , 5 , 10 , etc .). furthermore , in accordance with the illustrative embodiment , brake interface unit ( biu ) 130 is an interface for the engaging of the penalty brakes of a train . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiment of the present invention in which brake interface unit ( biu ) 130 is an interface between the brake a system of a train and any part of a train control system ( e . g ., positive train separation system , etc .). fig2 depicts a schematic diagram of the salient components of brake interface unit ( biu ) 130 . brake interface unit ( biu ) 130 comprises brake application circuitry ( bac ) 230 and failure detection processor 220 . brake application circuitry ( bac ) 220 is circuitry comprising at least one switching device and at least one sensor that is capable of providing information about a state of the at least one of the switching device ( s ). in the illustrative embodiment , brake interface unit 220 comprises four relays , four relay drivers , and two current flow sensors . the relays are used to maintain and / or interrupt the short between wire a and wire b . when wire a is disconnected from wire b , the brakes of train brake system 140 become applied . the switching devices in brake application circuitry ( bac ) 230 are energized by signals ( i . e ., the ac signals , etc .) provided by both vital positive train control ( v - ptc ) 110 and failure detection processor 220 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiment of the present invention , in which only one of vital positive train control ( v - ptc ) 110 and failure detection processor 220 provides the signal ( s ) that energize the switching devices inside brake application circuitry ( bac ). in addition to generating ac signals , vital positive train control ( v - ptc ) 110 provides high - low signals to failure detection processor 220 . the manner in which the high - low signals are used is further described in the discussion with respect to fig4 . failure detection processor 220 comprises circuitry and logic for detecting failures in at least one of brake application circuitry ( bac ) 230 , train control processor 310 , and train control processor 320 . failure detection processor 220 detects failures on the basis of feedback from at least one sensor that forms part of brake application circuitry ( bac ) 230 and / or the high - low signals that are provided by the train control processors . details about the structure and operation of failure detection processor 220 are provided in the discussion with respect to fig4 and fig6 b . fig3 depicts a schematic diagram of the salient components of vital positive train control ( v - ptc ) 110 . vital positive train control ( v - ptc ) 110 comprises train control processor 310 and train control processor 320 . train control processor 310 is hardware and software capable of controlling the operation of a train . specifically , it comprises hardware and software for operating the penalty braking system of a train . in the illustrative embodiment of the present invention , train control processor 310 produces one ( 1 ) ac signal and one ( 1 ) high - low signal . the ac signal is fed to brake application circuitry ( bac ) 230 and the high - low signal is fed to failure detection processor 220 . train control processor 310 operates driver 370 - 1 . driver 370 - 1 is circuitry for the generation of the ac signal . driver 370 - 1 contains dual circuits , only one of which is used . in the illustrative embodiment of the present invention , driver 370 - 1 is a dual high speed low - side power mosfet driver which produces a 9 . 6 khz , 5v ac current . driver 370 - 1 is capable of producing and removing the ac signal in response to the receipt of signals from cpu 360 - 1 . in accordance with the illustrative embodiment of the present invention , driver 370 - 1 is a serial port . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which driver 370 - 1 is any other circuitry that is capable of generating a signal on behalf of train control processor 310 ( e . g , another type of port , a custom circuit for producing ac or other signals , etc .). train control processor 310 comprises cpu 360 - 1 and penalty brake application 340 - 1 . cpu 360 - 1 is a central processing unit that executes penalty brake application 340 - 1 . in addition , cpu 360 - 1 controls the operation of driver 370 - 1 . it is capable of causing driver 370 - 1 to generate an ac signal as well as remove an ac signal that is being generated . in accordance with the illustrative embodiment of the present invention , the central processing unit ( cpu ) is 600 mhz , rom - less unit . penalty brake application 340 - 1 is software for applying the penalty brakes on a train . it is capable of determining when a train is operated or about to be operated in an unsafe manner and correspondingly applying the brakes of the train . it applies the brakes by removing the ac signal that is produced by driver 370 - 1 , as well as setting the high - low signal that is sent to failure detection processor 220 to low . the low signal causes failure detection processor 220 to remove the ac signal generated by driver 370 - 3 . penalty brake application 340 - 1 is executed by cpu 360 - 1 . in accordance with the illustrative embodiment of the present invention , the high - low signal is output by an i / o pin on cpu 360 - 1 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which the high - low signal is produced a peripheral device or additional circuitry that is in communication with cpu 360 - 1 . train control processor 320 is hardware and software which , together with train control processor 310 , in a redundant fashion , controls the operation of a train . train control processor 320 comprises hardware and software for operating the penalty braking system of a train . in the illustrative embodiment , train control processor 320 produces one ( 1 ) ac signal and one ( 1 ) high - low signal . the ac signal is fed to brake application circuitry ( bac ) 230 and the high - low signal is fed to failure detection processor 220 . train control processor 320 operates driver 370 - 2 . driver 370 - 2 is circuitry for the generation of the ac signal . driver 370 - 2 is identical to driver 370 - 1 . in accordance with the illustrative embodiment of the present invention , driver 370 - 2 is a serial port . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which driver 370 - 2 is any other circuitry that is capable of generating a signal on behalf of train control processor 320 ( e . g , another type of port , a custom circuit for producing ac streams or other signals , etc .). train control processor 320 also comprises cpu 360 - 2 . cpu 360 - 2 is a central processing unit that executes penalty brake application 340 - 2 . in addition , cpu 360 - 2 controls the operation of driver 370 - 2 . it is capable of causing driver 370 - 2 to generate an ac signal as well as remove an ac signal that is being generated . cpu 360 - 2 is identical to cpu 360 - 1 . penalty brake application 340 - 2 is software for applying the penalty brakes on a train . it is capable of determining when a train is operated or about to be operated in an unsafe manner and correspondingly applying the train &# 39 ; s penalty brakes . it applies the penalty brakes by removing the ac signal that is produced by driver 370 - 2 , as well as setting the high - low signal that is sent to failure detection processor 220 to low . the low signal causes failure detection processor 220 to remove the ac signal generated by driver 370 - 4 . penalty brake application 340 - 2 is executed by cpu 360 - 2 . in accordance with the illustrative embodiment of the present invention , the high - low signal is output by an i / o pin on cpu 360 - 2 itself . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which the high - low signal is produced a peripheral device or additional circuitry that is in communication with cpu 360 - 2 . although not depicted in fig3 , train control processor 310 and / or train control processor 320 comprise additional hardware such as memory , input and output ports . it will be clear to those skilled in the art how to make and use embodiments of the present invention in which train control processor 310 and / or train control processor 320 comprise additional hardware elements that are necessary for the performance of their functions ( e . g ., i / o ports , memory , etc .). the functions of the train control processors are not limited to running the penalty brake system of a train . in the illustrative embodiment of the present invention , train control processor 310 and train control processor 320 , operate in a redundant fashion all systems that comprise vital positive train control ( v - ptc ) 110 . examples of such systems include movement planning systems , positive train separation systems , etc . for the purposes of clarity , however , this disclosure focuses on the operation of vital positive train control ( v - ptc ) 110 of the penalty brake system of a train . fig4 depicts a schematic diagram of the salient components of failure detection processor 220 . failure detection processor 220 comprises fpga 420 , driver control application 430 , and failure detection application 440 . ( a ) it applies the brakes of train brake system 140 when it detects a failure ; and ( b ) it detects failures in brake interface unit ( biu ) 130 , train control processor 310 , and train control processor 320 . in relation to the detection of failures , failure detection processor 220 receives four ( 4 ) signals — two ( 2 ) high - low signals from application processors 310 and 320 , respectively ; and two ( 2 ) sensor signals . the high - low signals , among other uses , are used in detecting failures in application control processors 310 and 320 . the sensor signals provide information about state ( s ) of components of brake application circuitry ( bac ) 230 . the manner in which failure detection is performed is further described in the discussions with respect to fig1 . failure detection processor 220 is implemented with a field programmable gate array ( fpga ) processor — fpga 420 . the fpga is configured to execute penalty driver control application 430 and failure detection application 440 . although not depicted in fig4 , failure detection processor 220 comprises additional hardware such as memory , input and output ports . it will be clear to those skilled in the art , after reading this disclosure , how to make and use embodiments of the present invention in which failure detection processor 220 includes additional hardware elements that are necessary for the performance of the functions of driver control application 430 and failure detection application 440 ( e . g ., i / o ports , memory , etc .). driver control application 430 is logic for applying the brakes of train brake system 140 . driver control application is programmed directly onto fpga 420 . driver control application 430 is applies the brakes of train brake system 140 in response to signal from : ( i ) positive train control ( v - ptc ) 110 or ( ii ) failure detection application 440 or ( iii ) both i and ii . driver control application 430 applies the brakes of train brake system 140 by setting drivers 370 - 3 and 370 - 4 to stop generating ac signals . when the ac signals produced by the two drivers are removed , the short between wire a and wire b is interrupted and the brakes of train brake system 140 are applied . the use of a high - low signals allows train control processors 310 and 320 to add diversity to the manner in which they operate the relays of brake application circuitry ( bac ) 230 . as noted , driver 370 - 1 and 370 - 2 are serial ports on the boards used by train control processor 310 and train control processor 320 . in the event of a failure of the serial ports , ( e . g ., problems with the software drivers for the ports , etc . ), the train processors can use the high - low signals to open the relays of brake application circuitry ( bac ) 230 and interrupt the short between wire a and wire b which connect brake interface unit ( biu ) 130 to train control system 140 . when short is interrupted , the brakes of train brake system 140 are applied . driver control application 430 operates drivers 370 - 3 and 370 - 4 . both drivers are identical to driver 370 - 1 . they are capable of producing ( and removing ) ac signals in response to the receipt of signals from driver control application 430 . in accordance with the illustrative embodiment of the present invention , drivers 370 - 3 and 370 - 4 are programmable pins on fpga 420 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which drivers 370 - 3 and 370 - 4 are any other circuitry that is capable of generating a signals on behalf of failure detection processor 220 . the high - low signals fed into failure detection processor 220 determine whether drivers 370 - 3 and 370 - 4 are set to output ac signals . driver control application 430 outputs an ac signal from driver 370 - 3 when it is fed a high signal from train control processor 310 . when it receives a low signal from train control processor 310 , driver control application 430 removes the ac signal that is output by driver 370 - 3 . similarly , driver control application 430 outputs an ac signal from driver 370 - 4 when it is fed a high signal from train control processor 320 . when it receives a low signal from train control processor 320 , driver control application removes the ac signal that is output by driver 370 - 4 . additionally , driver control application 430 is capable of receiving and executing instructions ( or signals ) from failure detection application 440 to engage the brakes of train brake system 140 . when such instructions are received , driver control application 430 removes the ac signals that are output by drivers 370 - 3 and 370 - 4 . failure detection application 440 is logic for detecting failures . in the illustrative embodiment of the present invention , failure detection application 440 is programmed directly onto fpga 420 . the tasks performed by failure detection application 440 are further described in the discussion with respect to fig1 - 13 . although , in accordance with the illustrative embodiment of the present invention , failure detection application 440 is executed by failure detector 220 , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which failure detection application 440 is executed by at least one of train control processor 310 and train control processor 320 . in the alternative embodiments , at least one sensor signal from brake application circuitry ( bac ) 230 is fed into the train control processor ( s ) that executes failure detection application 440 . the sensor signal is used by failure detection application 440 in detecting failures . furthermore , in accordance with the illustrative embodiment of the present invention , driver control application 430 and failure detection application 440 are programmed directly onto fpga 420 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which the applications are implemented in software and executed by a general purpose cpu . fig5 depicts a schematic diagram of the salient components of brake application circuitry ( bac ) 230 . brake unit comprises brake interface circuit ( bic ) 510 - i , relay 520 - i , sensor 514 , and sensor 523 , where i ∈{ 1 , 2 , 3 , 4 }. brake application circuitry ( bac ) 230 is circuitry for applying the brakes of train brake system 140 . when the wires that connect application circuitry ( bac ) 230 to train brake system 140 are shorted , the brakes of train brake system 140 are in the “ released ” state . when the short between the wires is removed , the brakes of train brake system 140 are in the “ applied ” state . as shown , brake application circuitry ( bac ) 230 comprises two circuit legs . the first leg consists of relay 520 - 1 and 520 - 4 and the other leg consists of relay 520 - 2 and 520 - 3 . sensor 514 measures current flow across the first circuit leg , and sensor 523 measures the current flow across the second circuit leg . when the first circuit leg is closed , sensor 514 transmits sensor signal to failure detection processor 220 indicating that current is flowing through it . similarly , when the first leg is closed , sensor 523 transmits sensor signal to failure detection processor 220 indicating that current is flowing through it . failure detection processor 220 uses the signals from the sensors for testing purposes . in normal operation , when all relays are energized , both legs will have current flowing and this current flow is an indication that the brake interface is operational . periodically , during normal operation , application processors 310 and 320 and failure detection processor 220 stop generating their ac signals ; only 1 signal at a time is stopped . this will cause its respective relay to open . the appropriate current sensor ( sensor 514 or 523 ) will then indicate the absence of current flow . in this manner , the operation of each of the four solid state relays can be checked . since only one relay at a time is open , the other circuit leg will maintain the short that is needed to prevent application of the brakes . as a consequence , this method of testing can be performed during normal operation without actually applying the train brakes . brake interface circuit ( bic ) 510 - i is a driver for relay 520 - i . brake interface circuit 510 - i receives ac signal as input and converts it to a dc signal . the dc signal is used to drive relays 520 - i . fig8 depicts a schematic of brake interface circuit ( bic ) 510 - i . the input from the driver is an ac signal . diodes d 1 and d 2 rectify this signal to dc which is then filtered by c 2 , r 3 and r 4 . this smoothed dc then drives the led in relays 520 - i which , in turn , causes photovoltaic diodes in relays 520 - i to generate a voltage sufficient to turn on power mosfets in relays 520 - i which causes the relays to conduct . it is notable that the ac signal must be continuously present to keep relays 520 - i energized . capacitor c 2 will discharge in a few milliseconds if the ac input ceases . r 1 is an input load resistor and c 1 provides ac coupling . if the ac input is lost or becomes dc , no output will be produced and the relay will become de - energized . the appropriate current sensor will detect this fault and any other fault , causing a relay to become de - energized . in the illustrative embodiment , the ac signal received by the brake interface circuits ( bic ) 510 - i from drivers 370 - i is 5 volts , 9 . 6 khz / 50 %, and : d 1 and d 2 : bat54 ( schottky barrier diodes ), 20v , 300 mwatt . relay 520 - i is a solid state relay . in accordance with the illustrative embodiment of the present invention , relay 520 - i is a mosfet n / o spst photovoltaic ac - dc relay . fig7 depicts a schematic diagram of a relay from the type that is used in the illustrative embodiment of the present invention . as shown , the relay comprises a light emitting diode ( led ) which when energized turns on power mosfets in the relay which causes the relay to conduct . in the illustrative embodiment of the present invention , solid state relays are used to close short the wires that connect brake interface unit ( biu ) 130 to train brake system 140 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which other switching devices are used ( e . g ., magnetic relays , transistors , etc .). although , in the illustrative embodiment of the present invention four ( 4 ) relays are used , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which brake application circuitry ( bac ) 230 comprises any number of relays ( e . g ., 1 , 5 , 7 , 10 , 16 , etc .). furthermore , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which the relays are connected in a non - redundant fashion . sensor 514 is a hall effect - based linear current sensor . sensor 514 detects current flowing across relays 520 - 1 and 520 - 4 and generates sensor signal that is proportional to the current flowing . sensor 514 is inductively isolated from the other components of brake application circuitry ( bac ) 230 . in the illustrative embodiment of the present invention , the feedback from sensor 514 is sent to failure detection processor 220 which uses it for testing purposes . in the alternative embodiments of the present invention where failure detection application 400 is executing on one of the train control processors , the signal from sensor 514 is sent to the train control processor which executes failure detection application 400 . sensor 514 uses the circuit shown in fig9 . capacitor c 3 of that circuit acts as a noise filter for the dc power to the sensor while capacitor c 4 is part of an internally connected rc filter that reduces noise on the sensor output . in the illustrative embodiment , the specifications of capacitors c 1 and c 2 are , and : c 3 : 0 . 1 μfarads , ceramic , 25 volts , x7r 0603 ; c 4 : 0 . 1 μfarads , ceramic , 25 volts , x7r 0603 ; sensor 523 is a hall effect - based linear current sensor . sensor 523 detects current flowing across relays 520 - 2 and 520 - 3 and generates sensor signal that is proportional to the current flowing . sensor 523 is inductively isolated from the other components of brake application circuitry ( bac ) 230 . the feedback from sensor 523 is sent to failure detection processor 220 which uses it for test purposes . sensor 523 also uses the circuit depicted in fig9 . in the illustrative embodiment of the present invention , the feedback from sensor 514 is sent to failure detection processor 220 which uses it for testing purposes . in the alternative embodiments of the present invention where failure detection application 400 is executing on one of the train control processors , the signal from sensor 514 is sent to the train control processor which executes failure detection application 400 . furthermore , in the illustrative embodiment , the current sense connection to each current sensor is a copper conductor which is inductively coupled to the rest of the sensor . as a consequence , loss of dc power to the current sensor does not affect the ability of the brake interface unit to cause brake application . although , in the illustrative embodiment of the present invention , brake interface unit ( biu ) 230 uses current sensors to provide information about its state to failure detection processor 220 , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which other types of sensors are used ( e . g ., humidity sensors , temperature sensors , etc .). furthermore , although the illustrative embodiment of the present invention two ( 2 ) sensors are used , it will be clear to those skilled in the art after reading this disclosure , how to make and use alternative embodiments of the present invention in which any number of sensors is used ( e . g ., 1 , 3 , 10 , 15 , etc .). in these embodiments , the sensors can be configured to provide information about groups of components that comprise brake interface unit ( biu ) 230 ( as is the case in the illustrative embodiment ), or the sensors can be configured to provide information about individual components . fig6 a depicts a schematic diagram of the salient logic components of the train control system of fig1 . penalty brake application 340 - 1 of train control processor 310 is used to drive a first relay in brake application circuitry ( bac ) 230 , while penalty brake application 340 - 2 of train control processor 320 is used to drive a second relay . driver control application 430 of failure detection processor 220 is used to drive a third and fourth relays . the three applications drive their respective relays by controlling the generation of electric signals that are used for energizing the relays ( i . e ., the ac signals in the illustrative embodiment , etc .). the three applications are capable of applying the brakes of train brake system 140 . the penalty braking applications apply the brakes of train brake system 140 by removing the signals that energize the relays in brake application circuitry ( bac ) 230 . driver control application 430 applies the brakes of train brake system 140 by removing the ac signals that are generated by drivers 370 - 3 and 370 - 4 . failure detection application 440 detects the presence of a failure in one of train control processor 310 , train control processor 320 , and brake interface unit ( biu ) 130 . it performs its failure - detecting functions on the basis of at least one sensor signal from brake application circuitry ( bac ) 230 and / or the high - low signals received from train control processor 310 and train control processor 320 . brake application circuitry ( bac ) 230 facilitates the operation of failure detection application 440 by feeding it at least one sensor signal . the at least one sensor signal is indicative of the state of at least one component of brake application circuitry ( bac ) 230 . the information contained in the sensor signal is used by the logic of failure detection application 440 to determine whether a component of penalty brake interface 130 has failed . fig6 b depicts a schematic diagram of the salient hardware components of the train control system of fig1 . vital positive train control ( v - ptc ) 110 comprises cpu board 610 and cpu board 620 , and i / o board 630 . each cpu board is computer hardware ( e . g ., processor , memory , network adapter , etc .) that controls the operation of a train . the two cpu boards are the computer hardware that constitutes train control processor 310 and train control processor 320 . in the illustrative embodiment of the present invention , train control processor 310 is implemented on cpu board 610 and train control processor 320 is implemented on cpu board 620 . cpu 360 - 1 and cpu 360 - 2 are in electrical communication , via cpu board 610 and cpu board 620 with drivers 370 - 1 and 370 - 2 . the two drivers comprise circuitry which is capable of generating an ac signal . the ac signal is used to energize one or more relays inside brake application circuitry ( bac ) 230 . cpus 360 - 1 and 360 - 2 control the operation of drivers 370 - 1 and 370 - 2 , respectively ; they can cause the drivers to output or remove the ac signals which they are responsible for producing . i / o board 630 is an expansion board which performs a / d conversion of signals that are input to vital positive train control ( v - ptc ) 110 . additionally , in the illustrative embodiment , i / o board 630 formats the signals that are input and forwards these signals to train control processor 310 and 320 . fpga 420 — which implements failure detection application 440 — is mounted directly on the i / o board . fpga 420 , via i / o board 630 , is in electrical communication with drivers 370 - 3 and 370 - 4 . the two drivers comprise circuitry which is capable of generating an ac signal . the ac signal is used to energize one or more relays inside brake application circuitry ( bac ) 230 . fpga 420 controls the operation of drivers 370 - 3 and 370 - 4 ; it can cause the drivers to output or remove the ac signals which they are responsible for producing . although , in the illustrative embodiment of the present invention fpga 420 is mounted on an i / o board , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which fpga 420 is mounted on any board that forms part of the train control system ( e . g ., cpu board 610 , cpu board 620 , other peripheral boards , etc .). drivers 370 - 1 , 370 - 2 , 370 - 3 , and 370 - 4 contain dual circuits , but only one of them is used . in accordance with the illustrative embodiment of the present invention drivers 370 - 1 , 370 - 2 are ports on cpu board 610 , cpu board 620 , while drivers 370 - 3 and 340 - 4 are programmable pins on fpga 420 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which the drivers are physically separate from cpu board 610 , cpu board 620 , and fpga 420 . fig1 depicts a flowchart of the execution of the salient tasks that are performed by failure detection processor 220 . it will be clear to those skilled in the art , after reading this disclosure , how to perform the tasks associated with fig1 in a different order than represented or to perform one or more of the tasks concurrently . furthermore , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention that omit one or more of the tasks . at task 1010 , failure detection application 440 detects a failure in one of brake interface unit ( biu ) 130 , train control processor 310 , and train control processor 320 , based on a signal from a sensor that provides information about a state of a component of brake application circuitry ( bac ) 230 . task 1011 is further described in the discussion with respect to fig1 and fig1 . at task 1020 , failure detection application 440 detects a failure in one of train control processor 310 and train control processor 320 . the failure is detected on the basis of the high - low signals that are fed into failure detection processor 220 by the two train control processors . when the two signals are different ( i . e ., one is high and the other is low , etc .) failure detection application 440 concludes that one of train control processor 310 and train control processor 320 has failed . at task 1030 , failure detection application 440 performs periodic diagnostics of penalty brake interface 130 . although , in the illustrative embodiment of the present invention , the diagnostics are performed periodically ( e . g ., every 1 second ) it will be clear to those skilled in the art , after reading this disclosure , how to perform the diagnostics sporadically or just once . in accordance with the illustrative embodiment of the present invention , the diagnostics are preformed in real - time , without disturbing the normal operation of brake interface unit ( biu ) 130 . furthermore , in accordance with the illustrative embodiment of the present invention , three types of diagnostics are performed . the three types of diagnostics are described in the discussion with respect to fig1 - 15 . at task 1040 , failure detection application 440 takes action when a failure is detected . task 1040 is further described in the discussion with respect to fig1 . fig1 depicts a flowchart of the execution of the salient sub - tasks associated with detecting a failure in brake interface unit ( biu ) 130 . at task 1110 , failure detection application 440 determines that at least one of relays 520 - 1 and 520 - 4 is open . the determination is made on the basis of signal from current sensor 514 . although , in accordance with the illustrative embodiment of the present invention , relays 520 - 1 and 520 - 4 are monitored , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which relays 520 - 2 and 520 - 3 are monitored instead . the monitoring of relays 520 - 3 and 520 - 4 is performed in accordance with the methods described in relation to relays 520 - 1 and 520 - 4 . at task 1120 , failure detection application 440 determines whether ac signals are supplied to relays 520 - 1 and relay 520 - 4 . in accordance with the illustrative embodiment of the present invention , failure detection application 440 determines whether ac signal is supplied to relay 520 - 4 by communicating with driver control application 430 . furthermore , failure detection application 440 determines whether ac signal is supplied to relay 520 - 1 by train control processor 310 on the basis of the high - low signal which is fed to failure detection processor 220 by train control processor 310 . if train control processor 310 feeds a high signal to failure detection processor 220 , this is an indication that train control processor 310 is supplying ac signal to relay 520 - 1 . conversely , if a low signal is received from train control processor 310 , this is an indication that train control processor 310 has removed the ac signal for relay 520 - 1 . in alternative embodiments of the present invention in which failure detection application 440 is executing on one of train control processor 310 , failure detection application 440 determines whether and ac signal is supplied to relay 520 by communicating with penalty brake application 340 - 1 or by monitoring the state of driver 370 - 1 . furthermore , in the alternative embodiments , failure detection application determines whether ac signal is supplied to relay 520 - 4 by monitoring whether a high - low signal is output by cpu - 360 - 1 to failure detection processor 220 . at task 1130 , failure detection application 440 determines whether a failure has occurred . the determination is based on the information obtained in at least one of tasks 1110 and 1120 . if ac signals are supplied to both relays 520 - 1 and 520 - 4 , and yet , current is not flowing through current sensor 514 , failure detection application 440 determines that at least one of brake interface unit ( biu ) 130 and train control processor 310 has failed . conversely , when one of relays 520 - 1 and 520 - 4 is not supplied with ac signal , and yet , current is flowing through it , failure detection application 440 also determines that at least one of brake interface unit ( biu ) 130 and train control processor 310 has failed . fig1 depicts a flowchart of the execution of the salient sub - tasks associated with detecting a failure in brake interface unit ( biu ) 130 or train control processor 310 as performed by another illustrative embodiment of the present invention . at task 1210 , failure detection application 440 determines that the current flow measured by one of current sensors 514 and 523 is incorrect . an incorrect current flow , is current flow is outside of predetermined bounds . at task 1220 , failure detection application 440 deduces that a failure has occurred in brake interface unit ( biu ) 130 based on the information obtained at task 1210 . in particular , when failure detection application 440 receives signal from one of sensors 514 and 523 that is outside of predetermined bounds , it determines that a failure has occurred . fig1 depicts a flowchart of the execution of the salient sub - tasks associated with a first diagnostic routine that is performed by failure detection application 440 . at task 1310 , failure detection application 440 instructs train control processor 310 to remove to set the high - low signal to low . in accordance with the illustrative embodiment of the present invention , the instruction is submitted in the form of a message that is transmitted over network 120 . at task 1320 , failure detection application 440 determines whether train control processor 310 has failed based on the response of train control 310 to the instruction transmitted at task 1310 . if the high signal is not removed , despite the instruction , failure detection application 440 determines that train control processor 310 has failed and is non - responsive . fig1 depicts a flowchart of the execution of the salient sub - tasks associated with a second diagnostic routine that is performed by failure detection application 440 . at task 1410 , failure detection application 440 removes one of the ac signals generated by train control processor 310 and train control processor 320 . it should be noted that only one of the ac signals generated by train control processor 310 and 320 is removed . this allows brake interface unit ( biu ) 130 to continue operating uninterrupted . in accordance with the illustrative embodiment of the present invention , failure detection application 440 removes the ac signal that is generated by train control processor 310 . it removes the signal by instructing train control processor 310 to remove the ac signal that is output from driver 370 - 1 . the instruction is submitted in the form of a message that is transmitted over network 120 . in the alternative embodiments of the present invention in which failure detection application 440 is executed by train control processor 310 , failure detection application 440 uses internal means of communication ( e . g ., inter - process communication techniques , etc .) to instruct penalty brake application 340 - 1 to remove the ac signal that is produced by ac driver 370 - 1 . at task 1420 , failure detection module determines whether a failure has occurred based on the response of train control processor 310 to the instruction transmitted at task 1410 . if the ac signal is not removed , failure detection module determines that train control processor 310 has failed . whether the ac signal is removed is determined by using the signal from sensor 514 . if sensor 514 indicates that current is flowing through it , that means that both relays 520 - 1 and 520 - 2 are energized which leads to the conclusion that either the ac signal is not removed ( or relay 520 - 1 is stuck ). in accordance with the illustrative embodiment of the present invention , the train control processors remove their respective ac signals in response to instructions from train control application 440 . however , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention in which train control processors 310 and 320 remove their ac signals automatically for the purposes of performing self - diagnostics . in these embodiments , only one ac signal at a time is turned off automatically by the train control processors . in these embodiments , at task 1420 , failure detection application 440 monitors the signal from sensors 514 and 523 to determine whether relays periodically become open in response to the turning off of the ac signals by train control processor 310 and train control processor 320 . fig1 depicts a flowchart of the execution of the salient sub - tasks associated with a third diagnostic routine that is performed by failure detection application 440 . at task 1510 , failure detection application 440 instructs driver control application 430 to remove one of the ac signals that are output from drivers 370 - 3 and 370 - 4 . it should be noted that only one of the ac signals generated by driver control application 430 is removed by failure detection application 440 . this allows brake interface unit ( biu ) 130 to continue operating uninterrupted . in accordance with the illustrative embodiment of the present invention , failure detection application 440 instructs driver control application 430 to remove the ac signal that is produced by driver 370 - 4 by using inter - process communication techniques . in the alternative embodiments of the present invention in which failure detection application 440 is executed by train control processor 310 , failure detection application 440 uses internal means of communication ( e . g ., interposes communication techniques , etc .) to instruct penalty brake application 340 - 1 to remove the high - low signal that is fed to failure detection processor 220 . at task 1520 , failure detection module determines whether a failure has occurred based on the signal from sensor 514 . if sensor 514 continues to indicate that current is flowing though it after the ac signal is removed , failure detection application 440 determines that brake interface unit ( biu ) 130 has failed . fig1 depicts a flowchart of the execution of the salient sub - tasks associated with task 1040 . it will be clear to those skilled in the art , after reading this disclosure , how to perform the tasks associated with fig1 in a different order than represented or to perform one or more of the tasks concurrently . furthermore , it will be clear to those skilled in the art , after reading this disclosure , how to make and use alternative embodiments of the present invention that omit one or more of the tasks . at task 1610 , failure detection application 440 activates the brakes of train brake system 140 . in accordance with the illustrative embodiment of the present invention , failure detection application 440 instructs driver control application 430 and / or penalty brake applications 340 - 1 and 340 - 2 to remove the ac signals produced by drivers 370 - 1 through 370 - 4 . the removal of the ac signals results in the relays being de - energized which , in turn , results in the application of the train brakes . at task 1620 , failure detection application 440 transmits an indication to vital positive train control ( v - ptc ) 110 that a failure has occurred in penalty brake interface 130 . in accordance with the illustrative embodiment of the present invention , the indication is transmitted over network 120 . it is to be understood that the types and parameters of the signals used by the present invention are provided for illustrative purposes only . it will be clear to those skilled in the art , after reading this disclosure , that a number of embodiments of the present invention can be devised in which the different signals are used to control brake application circuitry ( bac ) 230 . furthermore , it is to be understood that the parameters for the components of the present invention ( e . g ., cpus , capacitors , resistors , etc .) are provided for illustrative purposes only . it will be clear to those skilled in the art , after reading this disclosure , that a number of embodiments of the present invention can be devised in which different components and / or components with different parameters are used . in any event , it is to be understood that the disclosure teaches just one example of the illustrative embodiment and that many variations of the invention can easily be devised by those skilled in the art after reading this disclosure and that the scope of the present invention is to be determined by the following claims .