the preferred embodiment of the subject invention will now be discussed in some detail in conjunction with all of the figures of the drawing , wherein like parts are designated by like reference numerals insofar as it is possible and practical to do so . referring now to fig1 there is shown a composite video signal separator 11 which includes an input terminal 13 , connected through the parallel combination of a resistor r1 and a capacitor c1 to the base of a pnp transistor 15 . input terminal 13 is also connected through a resistor r2 to the negative input of an operational amplifier 17 , the cathode of a diode 19 , and the collector of pnp transistor 15 . the output of operational amplifier 17 , in turn , is connected to an output terminal 21 , and the anode of diode 19 , while the positive input of operational amplifier 17 is effectively connected to a ground 23 . connected between the negative input of operational amplifier 17 and the output thereof is a resistor r3 . in addition , input terminal 13 is connected through a resistor r4 to the anode of a diode 25 , and the negative input of an operational amplifier 27 . the output of operational amplifier 27 is , in turn , connected to the cathode of diode 25 , the data input of a phase lock loop circuit 29 , and the data input of a phase lock loop circuit 31 . the positive input of operational amplifier 27 is effectively connected to ground 23 while a resistor r5 is connected between the negative input and the output of operational amplifier 27 . the output of phase lock loop circuit 29 is connected to the data input of a one - shot multivibrator 33 , the output of which is connected to an output terminal 35 . similarly , the output of phase lock loop circuit 31 is connected to the data input of a one - shot multivibrator 37 , the output of which is connected to an output terminal 39 . ground 23 is connected to the first input of a double pole double throw switch 41 , while the second input thereof is connected to the output of a direct current voltage source 43 . the first and second outputs of double pole double throw switch 41 are respectively connected to the first and second control inputs of phase lock loop circuit 31 , while the third output of double pole double throw switch 41 is connected to the first control input of one - shot multivibrator 37 . in addition , the output of direct current voltage source 43 is connected to the second control input of one - shot multivibrator 37 . connected to output terminal 35 is the first input of a nand gate 45 , the output of which is connected to the first input of a nand gate 47 , with the output thereof connected to the first input of a nand gate 49 . the output of direct current voltage source 43 is connected to the second inputs of nand gates 45 and 49 , while output terminal 39 is connected to the second input of nand gate 47 . in the exemplary composite video signal separator of fig1 according to the subject invention components and electrical values successfully utilized are as follows : ______________________________________ resistors : r1 2k ohms r2 1k ohms r3 2k ohms r4 1k ohms r5 4k ohmscapacitors : c1 5 pfnand gates : 45 7400 47 49diodes : 19 5082 - 2800 25 in 914operational amplifiers : 17 ua 741 27 ua 741phase lock loops : 29 ne 565 31 ne 565one - shot multivibrator : 33 9602 37 9602______________________________________ it should be noted at this time that diode 19 is a high speed switching diode which is commercially available from hewlett packerd , inc . of palo - alto , calif ., and phase lock loop circuits 29 and 31 are electronic servo loops which are commercially available from signetics , inc . of sunnyvale , calif . in addition , it should be noted that operational amplifiers 17 and 27 are commercially available from burr brown , inc . of tucson , ariz ., and one - shot multivibrators 33 and 37 are commercially available from fairchild , inc . of mountain view , calif . the operation of the subject invention will now be described in conjunction with all of the figures of the drawing . referring now to fig1 a composite video signal , similar to that depicted in fig2 ( a ), is applied to input terminal 13 of composite video signal separator 11 . the composite video signal of fig2 ( a ) includes therein a horizontal sync component having therein a plurality of horizontal sync pulses 51 , the frequency of which is 15 . 605 kilohertz , a vertical sync component having therein a plurality of vertical sync pulses 53 , the frequency of which is 60 hertz , and a video information component 55 . the horizontal dashed line 57 of fig2 a through 2h represents the line of zero voltage . a positive voltage applied to input terminal 13 will back bias diode 19 such that diode 19 will function as an open circuit , thereby causing amplifier 17 to become operative , while a negative voltage applied to input terminal 13 will forward bias diode 19 such that diode 19 will function as a short circuit , thereby inactivating amplifier 17 . thus , whenever diode 19 is back biased by a positive voltage applied to input terminal 13 , operational amplifier 17 will pass therethrough , amplify , and invert only the positive voltage component of any signal applied to input terminal 13 . accordingly , only video information component 55 of the composite video signal of fig2 ( a ) will pass through , and be amplified and inverted by amplifier 17 such that a video information signal similar to that depicted in fig2 ( b ) will appear at output terminal 21 . a negative pulse applied through the parallel combination of resistor r1 and capacitor c1 to the base of pnp transistor 15 will trigger transistor 15 such that transistor 15 will function as a short circuit thereby rendering operational amplifier 17 not operative . thus , each horizontal sync pulse 51 and vertical sync pulse 53 of the composite video signal of fig2 ( a ) will inactivate operational amplifier 17 such that only the video information component 55 of the signal of fig2 ( a ) will pass through operational amplifier 17 . it should be noted at this time that diode 19 will function under normal operating conditions to prevent the passage of non - video information through operational amplifier 17 in the manner described above . however , due to the fast switching times involved in the operation of the subject invention , pnp transistor 15 was utilized in the manner described above to insure that non - video information does not pass through operational amplifier 17 to output terminal 21 . a negative voltage applied to input terminal 13 will back bias diode 25 such that diode 25 will function as an open circuit thereby causing amplifier 27 to become operative , while a positive voltage applied to input terminal 13 will forward bias diode 25 such that diode 25 will function as a short circuit thereby inactivating amplifier 27 . thus , whenever diode 25 is back biased by a negative voltage applied to input terminal 13 , operational amplifier 27 will pass therethrough , and amplify and invert only the negative voltage component of any signal applied to input terminal 13 . accordingly , only the horizontal and vertical sync components of the signal of fig2 ( a ) will pass through , be amplified and inverted by amplifier 27 such that a signal similar to that depicted in fig2 ( c ) will appear at the output of operational amplifier 27 . the signal of fig2 ( c ) is supplied to the data inputs of phase lock loop circuits 29 and 31 . phase lock loop circuit 29 , in turn , is preset to lock in upon or synchronize only with an incoming signal having a frequency of sixty hertz ; and will provide at the output thereof a sync signal having a frequency of sixty hertz , the same as the frequency of the vertical sync component of the signal of fig2 ( c ). the aforementioned sync signal is then supplied to the input of one - shot multivibrator 33 which expands each pulse of the aforementioned sync signal to a pulse width of approximately 0 . 5 millisecond so as to provide at the output thereof a vertical sync signal similar to that of fig2 ( d ). phase lock loop circuit 31 is preset to lock in upon or synchronize only with an incoming signal having a frequency of 15 . 625 kilohertz when switch 41 is positioned such that ground 23 is effectively connected to the first control input of phase lock loop circuit 31 . phase lock loop circuit 31 will then provide at the output thereof a signal having a frequency of 15 . 625 kilohertz , the same as the frequency of the horizontal sync component of the signal of fig2 ( c ). the aforementioned sync signal is then supplied to the input of one - shot multivibrator 37 which expands each pulse of the aforementioned sync signal to a pulse width of approximately 6 microseconds whenever switch 41 is positioned such that direct current voltage source 43 supplies direct current to the first and second control inputs of one - shot multivibrator 37 . this , in turn , results in one - shot multivibrator 37 providing at the output thereof a horizontal sync signal similar to that depicted in fig2 ( e ). at this time , it may be noteworthy to mention that whenever switch 41 is positioned such that ground 23 is effectively connected to the second control input of phase lock loop circuit 31 , circuit 31 will lock in upon an incoming signal having a frequency of 31 . 25 khz , and provide at the output thereof a sync signal having a frequency of 31 . 25 khz . one - shot multivibrator 37 will then expand each pulse of the aforementioned sync signal to a pulse width of approximately 3 microseconds since switch 41 is positioned such that direct current voltage source 43 will supply direct current to the first control input of one - shot multivibrator 37 . thus it may readily be seen by the artisan that the subject may be adapted to either a 525 or 1023 line television system since the vertical and horizontal sync signals provided respectively at output terminals 35 and 39 are compatible with either of the aforementioned television systems . although the subject invention may be adapted to a conventional television system , it was designed specifically for utilization with the pilot helmet mounted display system described in u . s . patent application , ser . no . 104 , 521 , by james f . harvey , walter s . chambers and john j . kulik . the horizontal sync signal of fig2 ( e ) must be modified in the following manner so as to be compatible with the projection apparatus in the aforementioned helmet mounted display system . the vertical sync signal of fig2 ( d ) is inverted by nand gate 45 so as to supply to the first input of nand gate 47 the signal of fig2 ( f ). nand gate 47 then combines the signal of fig2 ( f ) with the horizontal sync signal of fig2 ( e ) and inverts the resultant signal so as to provide at the output thereof a signal similar to that depicted in fig2 ( g ). the signal of 2 ( g ) is supplied to the first input of nand gate 49 which inverts the aforementioned signal so as to provide at the output thereof a horizontal sync signal similar to that depicted in fig2 ( h ). the signals of fig2 ( b ), 2 ( d ), and 2 ( h ) are then supplied to the video input , a vertical ramp generator , and a horizontal ramp generator of the projection apparatus of the aforementioned helmet mounted display system for utilization thereby so as to effect the operation of the helmet mounted display system in the manner described in u . s . patent application ser . no . 104 , 521 . from the foregoing description , it may readily be seen that the subject invention comprises a new , unique , and exceedingly useful composite video signal separator which constitutes a considerable improvement over the known prior art . obviously , many modifications and variations of the present invention are possible in light of the above teachings . it is , therefore , to be understood that within the scope of the appended claims the subject invention may be practiced otherwise than as specifically described .