referring to fig4 an embodiment 50 of a projection system in accordance with the invention has electrical features to cause the convergence of modulated beams images ( modulated red , green and blue images , for example ) that collectively form a composite image on a screen 59 . in particular , in some embodiments , during calibration , the projection system 50 may use these electrical features to selectively rotate and translate the modulated beam images that are formed by display panels 60 ( display panels 60 a , 60 b and 60 c , as examples ) without physically altering the positions of the display panels 60 . as a result , at the time of manufacture , the display panels 60 may be mounted without a high degree of precision . furthermore , during the lifetime of the projection system 50 , the positions of the beams may be re - calibrated without remounting or repositioning the display panels 60 . in some embodiments , the projection system 50 may be a liquid crystal display ( lcd ) projection system , and the display panels 60 may be reflective lcd display panels . other arrangements are possible . more particularly , fig5 illustrates two modulated beam images 63 ( represented by solid lines ) and 65 ( represented by dashed lines ), each of which is formed by a different display panel 60 . each pixel 67 of the beam image 63 is located ½ pixel from the corresponding pixel 67 of the beam image 65 , i . e ., the beam images 63 and 65 are “ ½ pixel ” out of alignment . thus , the pixel 67 at cartesian coordinate location ( 0 , 0 ) of the image 65 is ½ pixel away from the pixel 67 at location ( 0 , 0 ) of the image 63 . to cause the two beam images 63 and 65 to converge , the projection system 50 may generate internal signals ( described below ) that may be applied to one or both of the display panels 60 that generate the images 63 and 65 to cause the display panel ( s ) 60 to shift the modulated beam image ( s ) to adjust beam convergence . each pixel 67 of a modulated beam image may be formed from a corresponding pixel 46 ( see fig6 described below ) of a display panel 60 , and the position of the pixel 46 may be shifted by ½ pixel ( for example ) in response to the internal signals . as an example , fig6 depicts a portion 61 of a display panel 60 and illustrates that , in some embodiments , each pixel 46 of the display panel 60 may be formed from a group ( a group of two , for example ) of subpixel cells 48 . in this manner , the display panel 60 may be controlled via the internal signals to selectively group the subpixel cells 48 to form the pixels 46 , a flexibility that permits shifting of the positions of the pixels 46 , as described below . in some embodiments , the subpixel cells 48 may be arranged in a rectangular array of rows and columns , and each pixel 46 may be formed from two adjacent subpixel cells 48 of the same column . thus , as depicted in fig6 a particular pixel 46 a may be formed from subpixel cells 48 a and 48 b , each of which forms ½ of the pixel 46 . in response to the assertion of a signal ( called split , described below ), all pixels 46 that are in the same column as the pixel 46 a may be effectively shifted in a downward direction by ½ pixel . in this manner , the assertion of the split signal causes the subpixel cells 48 of the column to reorganize , or regroup , so that the pixel 46 a becomes the pixel 46 a ′. the pixel 46 a ′ includes the subpixel cells 48 b and 48 c and does not include the subpixel cell 48 a . many other embodiments are possible . for example , in response to the assertion of the split signal , a column of pixels 46 may be shifted in an upper direction by ½ pixel , or a row of pixels 46 may be shifted to the right by ½ pixel or shifted to the left by ½ pixel . also , more than two subpixel cells 48 may form each pixel 46 . furthermore , in some embodiments , the shifts may cause less or more than a ½ pixel shift . for example , in other embodiments , each pixel 46 may be formed by four subpixel cells 48 , and as a result , each pixel 46 may be shifted by ¼ pixel in response to the assertion of the split signal . in some embodiments , the number of subpixel cells 48 that are used to form each pixel 46 may be limited by an inter - pixel gap 42 , a minimum spacing to ensure the subpixel cells 48 do not short out . as described below , the shifting of a particular column of pixels 46 may be controlled by an associated split signal , where the notation denotes the coordinate position of the column . as an example , in some embodiments , when the split 100 signal is asserted ( driven high , for example ), the pixels 46 of column 100 may be shifted in a downward direction by approximately ½ pixel . the above - described techniques may be used to adjust for fine , or local , adjustment of the pixel positions i . e ., an adjustment that is approximately less than one pixel in a particular direction . however , more coarse , or global , adjustments may be desired , i . e ., adjustments greater than about one pixel may be desired . in some embodiments , these global adjustments may be performed by remapping pixel positions , as described below . for example , two modulated beams may be rotated with respect to each other , as depicted in fig9 by a row 62 of pixels of a modulated beam image being rotated with respect to a row 64 of pixels of another modulated beam image . to cause the modulated beam images to converge , the columns of one of the beam images may be subdivided into segments , and these segments may be selectively shifted ( as described above ) and remapped ( as described below ) to cause beam convergence . for example , referring to fig1 , using the rows 62 and 64 to illustrate the rotation , the row 62 may be conceptually divided into segments 66 ( segments 66 a , 66 b and 66 c , as examples ) that are selectively shifted down and remapped to substantially align the rows 62 and 64 . in this manner , the shifting and apparent rotation of the row 62 is performed by the shifting and rotation of the pixels 46 of the display panel 60 that form the row 62 . although each segment 66 of the row 62 may have the same slope both before and after alignment , local and global shifting of the segments 66 in the vertical direction may be used to substantially aligns the two rows 62 and 64 , as described below . the local realignment of a particular segment 66 may be accomplished by shifting the pixels 46 that form the segment 66 in a downward direction by ½ pixel using the technique of selectively regrouping subpixel cells 48 , described above . the global realignment of the segment 66 may be accomplished by remapping the coordinates of the pixels 46 that form the segment 66 . for this to occur , the display panel 60 may include extra subpixel cells 48 in addition to the number of subpixel cells that are used to furnish the desired image resolution . referring to fig8 as an example , the display panel 60 may include a block 75 of active pixels ( that are currently being used to form an image ) and inactive pixels 77 ( i . e ., that are turned off pixels ) that may become part of the active block 75 due to remapping . thus , the block 75 of active pixels 46 is driven by electrical signals that represent a pixel image and the needed modulation . to define which pixels 46 form the active block 75 , the projection system 50 may apply a mapping transformation to transform coordinates of an image space in which the pixel image is defined to coordinates that identify the active block 75 . the mapping transformation , in turn , may globally reposition the modulated beam image that is formed by the display panel 60 . as an example , for a desired resolution of 1024 horizontal pixels by 768 vertical pixels ( i . e ., for a 1024 × 768 display ), the display panel 60 may have 1034 horizontal pixels by 778 vertical pixels , i . e ., ten extra pixels in each direction . referring back to fig1 , as an example , the above - described techniques may be applied to substantially align the rows 62 and 64 . for this example , each pixel 46 is assumed to be formed from two subpixel cells 48 , and the alignment error may be kept under ¼ pixel , as described below . in particular , the pixels 46 that form the segment 66 a of the row 62 may be shifted down by ½ pixel by asserting the appropriate split signals . this shift causes the leftmost pixel of the segment 66 a to be shifted down by ¼ of a pixel from the corresponding pixel of the row 64 and causes the rightmost pixel 46 of the segment 66 a to be located ¼ pixel above the corresponding pixel 46 of the row 64 . the next segment 66 b of the row 62 is apparently rotated by remapping the pixels 46 that form the segment 66 b down by one pixel 46 and by not shifting the pixels 46 of the segment 66 b . as a result , the leftmost pixel of the segment 66 c is located ¼ of a pixel down from the corresponding pixel of the row 64 , and the rightmost pixel of the segment 66 c is located ¼ of a pixel up from the corresponding pixel of the row 64 . the next segment 66 c is formed by asserting the appropriate split signals for the corresponding pixels 46 and by remapping the corresponding pixels 46 down by one row . the next segment 66 d is formed by remapping the pixels down by two pixels and not shifting the pixels . thus , to summarize the rotation techniques used in this example , the above - described sequence may be repeated to effectively rotate the row 62 : every two segments 66 , the corresponding pixels 46 are remapped down one additional pixel , and the split signals are asserted for every other segment to shift the positions of the pixels 46 of the segment 66 by ½ pixel . referring back to fig4 in some embodiments , the projection system 50 may include prisms 52 ( prisms 52 a , 52 b , 52 c and 52 d , as examples ) that direct an incoming beam of white light ( formed from red , green and blue beams ) from a light source 63 to the display panels 60 , as described below . in particular , the prism 52 a receives the incoming white beam of light at a prism face 52 aa that is normal to the incoming light and directs the beam to a prism face 52 ab that is inclined toward the face 52 aa . the reflective face of a red dichroic mirror 54 a may be mounted to the prism face 52 ab or to the prism face 52 ca by a transparent adhesive layer . the red dichroic mirror 54 a separates the red beam from the incoming white beam by reflecting the red beam so that the red beam exits another prism face 52 ac of the prism 52 a and enters a prism face 52 ba of the prism 52 b . the prism faces 52 ac and 52 ba may be mounted together via a transparent adhesive layer . the prism 52 b , in turn , directs the red beam to the incident face of the display panel 60 a that is mounted to another prism face 52 bb of the prism 52 b that is inclined toward the prism face 52 ba . the display panel 60 a modulates the incident red beam , and the modulated red beam follows a similar path to the path followed by the incident red beam . however , instead of being directed toward the light source 63 , a beam splitter 55 directs the modulated red beam through projection optics 57 ( a lens , for example ) that forms an image of the modulated red beam on the screen 59 . the remaining blue and green beams ( from the original incoming white beam ) pass through the red dichroic mirror 54 a . the opposite face of the mirror 54 a is attached to a prism face 52 ca of the prism 52 c , an arrangement that causes the blue and green beams to pass through the red dichroic mirror 54 a , pass through the prism face 52 ca of the prism 52 c , travel through the prism 52 c and pass through a prism face 52 cb ( of the prism 52 c ) that forms an acute angle with the prism face 52 ca . the reflective face of a blue dichroic mirror 54 b is mounted to the prism face 52 cb . as a result , the blue dichroic mirror 54 b reflects the blue beam back into the prism 52 c to cause the blue beam to exit another prism face 52 cc of the prism 52 c . the incident face of the display panel 60 b is mounted to the face 52 cc and modulates the incident blue beam . the modulated blue beam , in turn , follows a path similar to the path followed by the incident blue beam . the beam splitter 55 directs the modulated blue beam through the projection optics 57 to form an image of the modulated blue beam on the screen 59 . the green beam passes through the blue dichroic mirror 54 b and enters the prism 52 d through a prism face 52 da that may be mounted to the other face of the blue dichroic mirror 54 b via a transparent adhesive layer . the green incident beam exits another prism face 52 db of the prism 52 d to strike the incident face of the display panel 60 c that is mounted to the prism face 52 db . the display panel 60 c modulates the incident green beam before reflecting the modulated green beam along a path similar to the path followed by the incident green beam . the beam splitter 55 directs the modulated green beam through the projection optics 57 to form an image of the modulated green beam on the screen 59 . the three modulated beam images form a color composite image on the screen 59 . the projection system 50 depicted in fig4 is an example of one of many possible embodiments of the invention . other projection systems , prism arrangements and optical systems are possible . referring to fig7 the display panel 60 may include the following circuitry , a portion of which is depicted in fig7 . in particular , the display panel 60 may include row lines 71 , column lines 73 and split lines 77 ( each receiving a different split signal ) to selectively activate the pixels 46 and selectively group the subpixel cells 48 to form the pixels 46 . in this manner , each pixel 46 may be uniquely addressed by the assertion of one of the row lines 71 and one of the column lines 73 . as an example , the split line 77 and the column line 73 shown in fig7 receive split n and col n signals , respectively ; one of the row lines 71 shown in fig7 receives a row m signal ; and the other row line 71 receives a row m + 1 signal . the split lines 77 , in turn , control the grouping of the subpixel cells 48 . more particularly , the optical output signal of each subpixel cell 48 may be controlled via an associated electrode plate 54 ( plates 54 a , 54 b , 54 c and 54 d , as examples ), and electrode plates 54 of the same pixel 46 are electrically coupled together to group form the subpixel cells 48 for that pixel 46 . the grouping of the subpixel cells 48 is controlled by switch circuits 49 ( switch circuits 49 m and 49 m + 1 , as examples ), each of which is associated with three electrode plates 54 . except for the plates 54 that are associated with the subpixel cells 48 at the edge of the display panel 60 , each electrode plate 54 is associated in common with two switch circuits 49 , an association that permits the shifting , as described below . as an example , the switch circuit 49 m is associated with three electrode plates 54 a , 54 b and 54 c ; and the switch circuit 49 m + 1 is associated with the electrode plate 54 c , the electrode plate 54 d and another electrode plate ( not shown ). thus , the switch circuits 49 m and 49 m + 1 are both associated with the electrode plate 54 b . in this manner , when the split n signal is deasserted ( driven low , for example ), the switch circuit 49 m directs a voltage from the associated row line 71 to the electrode plates 54 a and 54 b to activate the subpixel cells 48 that are coupled to the electrode plates 54 a and 54 b . however , when the split n signal is asserted ( driven high , for example ), the switch circuit 49 m directs the voltage from the associated row line 71 to the electrode plates 54 b and 54 c , an action that shifts the associated pixel 46 by ½ pixel . in some embodiments , the switch circuit 49 a may include an n - channel metal - oxide - semiconductor ( nmos ) field effect transistor 59 that has its drain - source path coupled between the electrode plates 54 a and 54 b , and its gate coupled to a signal called split n # that is the inverse of the split n signal . the electrode plate 54 b is coupled to a capacitor 52 that stores a charge indicative of a voltage that is supplied by the row line 71 when the column line 73 is asserted . the coupling of the row line 71 to the capacitor 52 occurs due to an nmos transistor 50 that has its drain - source path coupled between the row line 71 and the capacitor 52 . the gate of the transistor 50 is coupled to the column line 73 to selectively cause the transistor 50 to conduct . the electrode plate 54 b may be selectively coupled to the plate 54 c via the drain - source path of a nmos transistor 60 . the gate of the transistor 60 is coupled to the split line 75 and thus , is selectively activated by the split signal . the other switch circuits 49 may have a design similar to the switch circuit 49 m . referring to fig1 , the projection system 50 may include the following electrical system 200 that may be part of a computer system , for example , or part of a stand - alone projector . in particular , the electrical system 200 may include a video electronics standards association ( vesa ) interface 202 to receive analog signals from a vesa cable 201 . the vesa standard is further described in the computer display timing specification , v . 1 , rev . 0 . 8 that is available on the internet at www . vesa . org / standards . html . these analog signals indicate images to be formed on the display 59 and may be generated by a graphics card of a computer , for example . the analog signals are converted into digital signals by an analog - to - digital ( a / d ) converter 204 , and the digital signals are stored in a frame buffer 206 . a timing generator 212 may be coupled to the frame buffer 206 and regulate a frame rate at which images are formed on the screen 59 . a processor 220 ( one or more central processing units ( cpus ), microcontrollers or microprocessors , as examples ) may be coupled to the frame buffer 206 via a bus 208 . the processor 220 may process the data stored in the frame buffer 206 to , as examples , transform the coordinate space used by the graphics card into the coordinate space used by the display panels 60 , remap the color space used by the graphics card into the color space used by the display panels 60 and cause the data to conform to the gamma function of the display panels 60 . the end product of these operations is a set of rgb values for each pixel of the image . in this manner , the r values may be used to form the intensity values of the pixels of the display panel 60 a , the g values may be used to form the intensity values of the pixels of the display panel 60 c and the b values may be used to form the intensity values of the pixels of the display panel 60 b . as described above , not all of the pixels of a particular display panel 60 may be used . instead , a map 215 may be stored in a mapping memory 216 that indicates the desired mapping transformation . the map 215 , in turn , may be used by an address generator 214 that generates the pixel addresses for pixels of the display panels 60 . referring to fig1 , as an example , for a particular display panel 60 , p locations 252 ( locations 252 1 , 252 2 , 252 3 , . . . 252 p ) of the map 215 may sequentially indicate the mapping for the uppermost row 300 of a pixel image , for example , beginning with a pixel 302 0 of the row 300 that is at location ( 0 , 0 ). as shown , the pixel 302 0 at location ( 0 , 0 ) maps into the pixel 46 at location ( 3 , 3 ) of the display panel 60 ; the pixel 302 1 at location ( 1 , 0 ) maps into the pixel 46 at location ( 4 , 3 ) of the display panel 60 ; the pixel 302 2 at location ( 2 , 0 ) maps into the pixel 46 at location ( 5 , 3 ) of the display panel 60 ; etc . among the other features of the system 200 , the system 200 may include a display panel interface 222 that is coupled to the bus 208 and drives the display panel voltages to form the images on the display panels 60 in response to signals that are furnished by the frame buffer 206 and the address generator 214 . a calibration interface 218 ( an electromechanical user interface or a serial bus interface , as examples ) may be electrically coupled to the address generator 214 . in this manner , the calibration interface 218 may modify the map 215 in response to the desired calibration that is indicated by the interface 218 in the following manner . in particular the address generator 214 may include a split register 217 that may indicate , for example , the number of pixel columns that are in each split / unsplit group of pixels 46 . for the example depicted in fig1 , each split / unsplit group includes two segments 66 , i . e ., twenty - four pixel columns . the address generator 214 may also include an offset register 219 to indicate how many pixel columns are in each mapping . for the example depicted in fig1 , twenty - four pixel columns are in each mapping . thus , if no rotation is needed , the offset register 219 may indicate the total number of pixel columns . the address generator 214 furnishes the split signals and modifies the map 215 in accordance with the values stored in the offset 219 and split 217 registers . while the invention has been disclosed with respect to a limited number of embodiments , those skilled in the art , having the benefit of this disclosure will appreciate numerous modifications and variations therefrom . it is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of the invention .