fig1 a and 10b show the configurations of an image reading apparatus of an embodiment of the present invention . a color ccd linear image sensor 1300 of tdi system has the structure already explained in relation to fig8 and is provided with ccd linear sensor units 1301 , 1302 , 1303 respectively for red , blue and green colors , each providing output signals of two lines . an analog signal process unit 101 is composed of sample - hold ( s / h ) circuits 101a , 101b for respectively holding the samples of the two ccd output signals , voltage - controlled amplifiers ( vca ) 101c , 101d for amplifying the ccd output signals , retained by the s / h circuits 101a , 101b to a desired level , and an a / d converter 101e for multiplexing the signals amplified to the desired level by the vca &# 39 ; s 101c , 101d and then effecting a / d conversion to an 8 - bit signal . there is provided one such unit for each color , but the unit for red color alone is illustrated . an interline distance correction unit 102 effects correction for the distances of 24 ccd linear sensors of different colors , provided mutually distant on a wafer in the color ccd linear sensor of the present embodiment . fig1 is a detailed circuit diagram of the interline distance correction unit 102 , composed of 2 - mbit fifo &# 39 ; s 102a , 102b provided as interline correction memories for r and b colors . the fifo is not provided for g color , since the g signal is used as the reference , whereas the r and b signals read previously are delayed by the interline distances ( 24 × 2 = 48 lines for r and 24 lines for b ). the two fifo &# 39 ; s 102a , 102b are controlled by reset signals wrst1 , wrst2 for the reset counter for fifo writing , a write / read enable signal enb , and a write - read clock ck ( not shown in fig1 ). these control signals are shown in a timing chart in fig1 . the r and b signals are read out , after respective delays by 48 and 24 lines , in synchronization with the input of the g signal . a shading correction unit 104 receives the signals after the interline distance correction by the interline distance correction unit 102 to a state equivalent to the signals obtained in a same position . the shading correction unit 104 effects correction of fluctuation of the black level signal ( output level without the incident light ) to a level 00h by the offset elimination , and correction of shading ( light amount fluctuation in the main scanning direction of the optical system and fluctuation in the outputs of the pixels of ccd ) in the white level in reading a standard white board , by normalization to ffh level . the r , g and b signals subjected to the shading correction are then supplied to a masking correction unit 105 . the masking correction is to transform the overall spectral characteristics , determined by the r , g , b spectral sensitivity of the ccd and the spectral energy distribution of the light source , into standardized r , g , b spectral characteristics ( for example ntsc r , g , b characteristics ), by the following matrix calculation : ## equ1 ## wherein r i , b i , g i are input r , g , b signals ; r 0 , g 0 , b 0 are masking - corrected r , g , b signals ; and all -- a33 are masking coefficients . the r , g , b signals corrected in the masking correction unit 105 are adjusted in image quality by image sharpening and smoothing in a filter process unit 106 . for example , the sharpening can be achieved with a laplacian filter of a 3 × 3 , 5 × 5 or 7 × 7 matrix depending on the desired level , and the smoothing can be achieved with a median filter of a 3 × 3 , 5 × 5 , 7 × 7 matrix depending on the desired level . the color signals subjected to a magnification change in a page memory 107 are supplied to a gamma conversion unit 108 , for effecting gamma correction corresponding to the intended output . the gamma correction unit 108 is provided with look - up tables ( lut ) corresponding to the number of conversions for gamma correction . in the present embodiment there are provided 8 tables of 256 bytes each . consequently the gamma correction unit 108 is composed of 3 ram &# 39 ; s of 2k bytes . the color signals adjusted in the filter process unit 106 are supplied to a page memory unit 107 . the page memory unit 107 is provided , for each color , with a page memory 107a with a maximum memory size of 66 . 3 mbytes ( a3 size ), controlled by an address controller 107b . the page memory unit 107 is further provided with a sub scanning magnification unit 107c for varying the magnification , in the sub scanning direction , of the image signal read from the page memory 107a according to the address controller 107b , and a main scanning magnification unit 107d for varying the magnification in the main scanning direction . these units are provided for each color , but those for red color alone are illustrated . the sub scanning magnification unit 107c effects interpolation with input data of 8 lines , while the main scanning magnification unit effects interpolation on peripheral 8 pixels on a same line , thereby achieving a variation in the magnification , in the main and sub scanning directions , from 80 % at maximum to 25 % at minimum , in a step of 1 %. in the following there will be given a detailed explanation on the analog process unit 101 , of which detailed structure is shown in fig1 , wherein components same as those in fig1 are represented by same numbers . the two ccd output signals are respectively subjected to sample holding in the s / h circuits 101a , 101b , whereby the variations alone of the ccd signals are separated . such variations of the ccd signals , held in the s / h circuits 101a , 101b are supplied to the vca 101c , 101d which amplify the ccd output signals to a desired level , for supply to a multiplexer 101f . the gains of the vca &# 39 ; s 101c , 101d can be varied by the output voltage levels of d / a converters 101h , 101i according to data set by the cpu 401 constituting control means . the multiplexer 101f multiplexes the two ccd output signals alternately corresponding to the pixel arrangement of the ccd linear sensor , thereby providing a single ccd output signal . the output signal of the multiplexer 101f is , prior to entering an a / d converter 101e , supplied to a buffer amplifier ( buf ) 101g , which generates a low - impedance output signal for the a / d converter 101e , with an adjustment of the offset level of the ccd output signal so as to match the dynamic range of the a / d converter 101e , according to an output voltage level of a d / a converter 101j . like the d / a converters 101h and 101i , the d / a converter 101j generates an output voltage level determined by the data set by the cpu 401 , thereby varying the offset level of the buffer amplifier 101g . the details of the buf 101g will not be explained further . the a / d converter 101e converts the ccd output signal into an 8 - bit digital signal , for supply to the next interline distance correction unit 102 . in the color ccd linear image sensor 1300 , the following ccd registers and output units are used for reaching the charges of the r , g , b , ccd linear sensor units 1301 , 1302 , 1303 . consequently the analog signal process unit 101 connected to each output unit receives the output signals of the ccd linear sensors of different colors in the forward and backward readings . therefore the setting data for the d / a converters 101h , 101i , 101j for setting the gain and the offset level of the vca , buf in the analog signal process unit 101 are preferably made different for the forward reading and the backward reading . consequently , in the present embodiment , the d / a converters 101h , 101i , 101j are given two sets of data a1 / a2 , b1 / b2 , c1 / c2 which are switched according to the direction of reading . a1 , b1 and c1 are setting data for the forward reading , while a2 , b2 and c2 are setting data for the backward reading . these data are stored in a back - up ram 402 employed with the cpu 401 , and are supplied to the d / a converters 101h , 101i , 101j at the start of power supply in the image reading device and at the image reading operation , through the cpu 401 . as explained in the foregoing , the present embodiment effects appropriate correction of the output signal level , regardless of the image reading direction or the charge integrating direction , thereby providing a stable output signal . fig1 shows another embodiment of the analog signal process unit 101 , constituting an improvement over the configuration shown in fig1 which requires a certain time for data resetting at the switching between forward and backward reading . components same as those in fig1 are represented by same numbers and will not be explained further . in fig1 , latch circuits 504a , 504b , 505a , 505b , 506a , 506b temporarily latch the setting data a1 / a2 , b1 / b2 , c1 / c2 for the d / a converters 101h , 101i , 101j , supplied from the back - up ram 402 . selectors 501 , 502 , 503 select the data in the latches 504a , 505a , 506a or those in the latches 504b , 505b , 506b respectively in case an f / b signal from the cpu 401 is &# 34 ; l &# 34 ; indicating the forward reading or &# 34 ; h &# 34 ; indicating the backward reading , and thus selected data are supplied to the d / a converters 101h , 101i , 101j for setting the gain and the offset level of vca , buf matching the ccd output signal in the forward or backward reading . in the present configuration , all the data a1 / a2 , b1 / b2 , c1 / c2 for the d / a converters 101h , 101i , 101j are set at the start of power supply and are suitably supplied to these d / a converters merely by the f / b signal for switching the selectors 501 , 502 , 503 , so that the time required for data setting at the switching of forward and backward reading can be significantly reduced in comparison with the example shown in fig1 . in the following there will be given a detailed explanation on the shading correction unit 104 . the shading correction unit 104 in fig1 a is composed , as shown in fig1 , of black correction circuits 1502a , 1502b , 1502c , and white level correction circuits 1503a , 1503b , 1503c . fig1 shows the configuration of the black correction circuit 1502a , which is identical with 1502b or 1502c . the black level output of the ccd sensor , corresponding to a very low incident light , shows considerable fluctuation among the pixels , and , if such black level is for example printed without correction , there will result streaks or unevenness in the data portion of the image . for this reason the circuit shown in fig1 corrects such fluctuation in such black level . at first a forward reading mode is set ( direction indicated by solid - lined arrow in fig8 ), and the output signal of the r - linear image sensor 1301 is supplied to the black correction circuit 1502a . more specifically , prior to a copying operation , the output signals of the ccd sensors 1301 , 1302 , 1303 , obtained without turning on the halogen lamp 1805 , are supplied as black level image signals to the abovementioned circuit . for storing a line of the black level image signal received from a b in terminal in a black level ram 1601 , the cpu 401 sets data in a latch 1608 , selects terminal a of a selector 1602 , also closes a gate 1603 and opens a gate 1604 . consequently the black level image signal enters the ram 1601 through the selector 1602 and the gate 1604 . the cpu 401 also selects a port cs of the ram 1601 . also a port a of a selector 1606 is selected to enter a count output of an address counter 1605 , initialized by an inverted hsync signal , into the address input port of the ram 1601 , and the black level image signal of a line , from the gate 1605 is stored in the ram 1601 according to the addresses from the address counter 1605 . ( the above - explained operations are called black reference fetching mode , and the black level image signal stored in the ram 1601 is called black level data .) however , the black level data thus fetched in the ram 1601 , being of a very low level , are easily affected by the noises generated in the ccd sensor 1301 and in the analog signal process unit 101 , and may therefore generate noises in the dark area of the image if used as black correction data . for this reason , the cpu 401 executes a process shown in a flow chart in fig1 , on the black level data fetched in the ram 1601 , thereby eliminating the influence of the noises . at first , in a step s601 , the cpu 401 sets data to the latch 1608 so as to close gates 1603 , 1604 , to open a gate 1609 and to select the port b of a selector 1606 , thereby fetching the black level data stored in the addresses b 1 to b 4678 of the ram 1601 into a work register of the cpu 401 . the black level ram 1601 is accessed by the addresses from an address bus of the cpu 401 , and the black level data b 1 - b 4678 are read through the work register and the data bus of the cpu 401 . a next step s602 effects reading of the black data into the ram 1601 again . more specifically , the cpu 401 sets data to the latch 1608 so as to close the gate 1609 , to open the gates 1603 , 1604 and to select the port a of the selector 1606 , whereby the ram 1601 is accessed by the address counter 1605 and the black level data are written into the ram 1601 . a step s603 reads the black level data ( b 1 &# 39 ;)-( b 4678 &# 39 ;) stored in the addresses b 1 - b 4678 of the black level ram 1601 and stores these data in the work register of the cpu 401 in a similar manner as in the step s602 . then a step s604 adds , address by address , the black level data ( b 1 )-( b 4678 ) and ( b 1 &# 39 ;)-( b 4678 &# 39 ;) fetched in the work register , then divides the result of addition with the number of data which is &# 34 ; 2 &# 34 ;, and stores the result of the division into the work ram . then a step s605 sets data in the latch 1608 so as to close the gates 1603 , 1609 , to open the gate 1604 and to select the ports b of the selectors 1602 , 1606 , and writes again the data of the work ram into the addresses b 1 - b 4678 of the black level ram 1601 through the selector 1602 and the gate 1604 and according to the address data from the cpu 401 . by averaging the black level data in this manner , there can be obtained , in the ram 1601 , black level data without noise . in the above - explained embodiment , the corrected black level data are obtained by averaging two different sets of the black level data , but the corrected data can be further improved in the precision , by increasing the number of sets of the data to be averaged . then , when a backward reading mode is set ( direction indicated by broken - lined arrow in fig8 ), the output of the b - linear image sensor 1302 is supplied to the black correction circuit 1502a . then the black level data are fetched in the same manner as in the case of r - image sensor 1301 , but the ram 1610 is selected by the data set by the cpu 401 in the latch 1608 and the process is executed according to the flow chart in fig1 , whereby the black level data are set in the ram 1610 . after the fetching and the correction of the black level data as explained in the foregoing , there is executed the reading of the original image . at the reading of the original image , the cpu 401 sets data in the latch 1608 so as to close the gates 1604 , 1609 , to open the gate 1603 and to select the port a of the selector 1606 , thereby setting the ram 1601 or 1610 at the data readout mode , whereby the black level data of the black level ram 1601 or 1610 are read , pixel by pixel according to the address data from the address counter 1605 and supplied through the gate 1603 into an input port b of a subtractor 1607 , in synchronization with the input of image signals to the terminal b in . the black level ram 1601 or 1610 is selected respectively in the forward reading or in the backward reading . consequently the output of the black correction circuit shown in fig1 is , for the red ( r ) signal , is equal to r in ( i )- dk ( i )= r out ( i ) for each pixel , wherein dk ( i ) is the black level data read from the black level ram 1601 or 1610 and i indicates the pixel address ( black correction mode ). similar control is conducted also on the green ( g ) and blue ( b ) signals , respectively by the black correction circuits 1502b , 1502c of a same configuration as shown in fig1 . the color data subjected to such black level correction are respectively supplied to the white level correction ( shading correction ) units 1503a , 1503b , 1503c , in which correction is made on the fluctuation in the illuminating system , the optical system and the sensitivity of the sensor , based on the white color data obtained from the ccd sensors 1301 , 1302 , 1303 when a uniform white board 1818 is illuminated with the halogen lamp 1805 . fig1 shows an example of the configuration of the white level correction circuit . the basic circuit configuration is same as that of the black correction circuit shown in fig1 , but the subtractor 1607 employed in the black correction explained above is replaced by a multiplier in the white level correction . more specifically , in the present embodiment , in an initial value setting mode , a standard white sheet ( for example a designated copying sheet ) is placed on the platen glass 1800 , then the read level r d1 of the standard white sheet and the read level r s of the white board 1504 are measured by the ccd sensors , for each pixel , according to a flow chart shown in fig1 , and the measured data are stored in back - up memory of the cpu 401 , which is not shown . then an actually used white sheet , for example a copying sheet is placed on the platen glass , and the read level r d2 of this white sheet is measured by the ccd sensors , for each pixel , according to the flow chart in fig1 , and the measured data are stored in the back - up memory of the cpu 401 . as the white level correction units 1503a , 1503b , 1503c are mutually identical in the structure and function , the explanation in the following will be given on the unit 1503a only . fig1 is a flow chart showing an example of the procedure for determining the measured brightness of the white board . as in the operation of the black level correction unit , the forward reading mode is set at first , and the output signal , already subjected to the black level correction , of the r - linear image sensor 1301 is supplied to the white level correction unit 1503a . a step s801 turns on the halogen lamp 1805 , and , in a step s802 , the cpu 401 waits for 1 second to complete the start - up of the halogen lamp 1805 . a step s803 stores a line of the image data of the standard white board 1818 , released from the ccd sensor 1301 , in the correction ram 1801 through the selector 1802 and the gate 1804 . a next step s804 turns off the halogen lamp 104 , and , in a step s805 , the cpu 401 temporarily stores the white image data ( r si )=( wi ) ( i = 1 - 4678 ) of the standard white board , stored in the correction ram 1801 , into the working ram through the gate 1809 . then a step s806 determines the average of the output levels of 512 pixels around the central 2339th pixel , among the white image data ( r si )=( wi ) ( i = 1 - 4678 ) of the standard white board stored in the working ram , by : the read data r s of the standard white board may also be obtained , instead of averaging the output levels of the pixels around the central pixel , by determining a pixel having the peak value among all the image and averaging the output levels of the pixels around thus peak value pixel . in such case , the read data r d1 of the standard white sheet and the read data r d2 of the white sheet , to be determined afterwards , are measured in an image areas same as that used in determining the read data r s . then a step s807 moves the mirror unit 1812 to a position below the standard white sheet placed on the platen glass 1810 , and a step s808 again turns on the halogen lamp 1805 . then a step s809 waits for 1 second counted by the cpu 401 , and a step s810 again stores a line of the white image data of the standard white sheet , released from the ccd sensor 1301 , in the correction ram 1801 through the selector 1802 and the gate 1804 . a step s811 turns off the halogen lamp 1805 , and a step s812 stores the white image data ( w 1 )-( w 4678 ) of the addresses w 1 - w 4678 of the correction ram 1801 into the working ram . then a step s812 calculates the average r d1 of the output levels of the 2083rd to 2595th pixels , among the white image data ( w 1 )-( w 4678 ) of the standard white sheet stored in the working ram , by : a next step s814 determines the measured brightness of the white board from the image data r d of the white sheet and the image data r s of the standard white board , both stored in the working ram , by : the measured output of the white sheet is taken as n (= typ255 ), and the white board is so - called gray color , with a reflection density lower than that of the white sheet . however , it is extremely difficult to produce completely gray color , and the white board often bears certain color or is somewhat discolored . if the white correction is made with such white board , the gray balance of the read image data becomes perturbed . it is however possible to correct such gray balance by assuming a perturbation in the output balance of the r , g , b ccd sensors in reading the white board and setting a white board brightness correction factor k (= typ1 ) for each color as the coefficient for correcting such perturbation in the balance . thus an assumed output value n of the white sheet and the white board brightness correction factors k are also stored in the working ram , together with the measured value c of the brightness of the white board . then , as in the operation of the black level correction unit , a backward reading mode is set , and the output , already subjected to black level correction , of the b - linear image sensor 1302 is supplied to the white level correction unit 1503a . then , in the same manner as in the forward reading mode , there are determined the image data r d &# 39 ; of the white sheet , the image data r s &# 39 ; of the standard white board , the measured brightness c &# 39 ; of the white board and the white board brightness correction factor k &# 39 ; and stored in the working ram . in the actual correcting operation , at first in the forward reading operation , the lamp 1805 is turned on to illuminate the white board 1818 prior to the copying or reading operation , and a line of the white image data of uniform white level , output from the ccd sensors , are stored in the correction ram 1801 through the selector 1802 and the gate 1804 . then the correction coefficients for each pixel are calculated according to a flow chart shown in fig2 . in a step s1001 , the cpu 401 sets data in the latch 1808 so as to close the gates 1803 , 1804 , to open the gate 1809 and to select the port b of the selector 1806 , in order to fetch the white image data , stored in the addresses w 1 - w 4678 of the correction ram 1801 , into the working register of the cpu 401 . thus the correction ram 1801 is accessed by the addresses from the address bus of the cpu 401 , and the white image data ( w 1 )-( w 4678 ) are fetched in the work register of the cpu 401 through the gate 1809 and the data bus . then a step s1002 calculates , for each pixel of the white image data ( w 1 )-( w 4678 ) in the address w 1 - w 4678 of the work register , a shading correction coefficient e i from the assumed output n of the white sheet , the white board brightness correction factor k and the measured brightness c of the white board , stored in the working ram , by : then a step s1003 sets data in the latch 1808 so as to close the gates 1803 , 1809 , to open the gate 1804 and to select the ports b of the selectors 1802 , 1806 , thereby again writing the data of the working ram in the addresses w 1 - w 4678 of the correction ram 1801 through the selector 1802 and the gate 1804 and according to the address data from the cpu 401 . at the reading of the original image , the correction coefficients e i are supplied from the correction ram 1801 to the multiplier 1807 through the gate 1803 , in synchronization with the input image data d i entered into the terminal b in whereby a calculation : also in the backward reading , similar correction is made by selecting the correction ram 1802 . as explained in the foregoing , the present embodiment effects appropriate shading correction on the output signal regardless of the image reading direction or the charge integrating direction , thereby providing stable output signals .