a high - speed differential signal communication link 110 according to a first embodiment of the present invention is shown in fig2 . the communication link 110 includes a skew compensation circuit 130 disposed between a terminator 132 and a conventional differential signal receiver 118 . a differential signal 119 generated by a conventional transmitter 114 is broadcast over a pair of differential transmission lines 120 a , b in accordance with known systems and methods . the transmission lines 120 a , b are terminated at the terminator 132 disposed in the receive end 116 of the link 110 to reduce signal reflections . terminator 132 is shown as a single resistive element in fig2 , but those skilled in the art will recognize that transmission - line terminators can take many forms . the use of the term “ terminator ” is used herein to represent a circuit applied to the receive end 116 of a communication link 110 to provide optimal impedance match for minimizing signal reflections and / or optimizing the effective signal amplitude . the terminated differential signal 125 is fed into a skew - compensation circuit 130 configured to detect and reduce skew between the p - side and n - side signal 126 a , b of the received differential signal 125 as explained below . the skew - compensation circuit 130 outputs skew - corrected p - side and n - side signals 129 a , b with little to no relative skew between them . the corrected signals 129 a , b are subsequently fed into the differential receiver 118 at the receive end 116 of the link 110 . as illustrated , the skew - compensation circuit 130 receives the p - side and n - side signals 126 a , b as inputs to respective delay elements 134 a , b . the delay elements 134 a , b are controlled by a controller 138 to adjust the relative skew between the two signals 126 a , b . the delay elements 134 a , b output the skew - corrected p - side and n - side signals 129 a , b which are subsequently received by both a skew detector 140 and the differential receiver 118 as inputs . when properly de - skewed by the skew - compensation circuit 130 , the p - side and n - side signals 129 a , b are phase aligned such that the receiver 118 can readily discern the intended differential signal 128 . the skew detector 140 monitors the skew - corrected p - side and n - side signals 129 a , b and quantifies the amount of relative skew between them . one method of quantifying the relative skew is by adding the ac components 150 a , b of the two signals 129 a , b together . when the two signals 129 a , b have no measurable skew between them , the sum of the ac components 150 a , b is zero . with this method of quantifying skew , the optimal output of the skew detector 140 is a zero - amplitude control signal . another method for quantifying the relative skew between the p - side and n - sides 129 a , b is to subtract the respective ac components 150 a , b . when the difference between the signals 129 a , b is maximized , there is no skew in the differential signal 128 . with this method , the optimal output of the skew detector 140 is a signal with a relatively high ac voltage ( or current ) amplitude . those skilled in the art will recognize that both the subtraction and addition methods are viable , and the selection of either method is dependent on the needs of the system application . the output of the skew detector 140 is fed into the aforementioned controller 138 via a signal line 142 . the controller 138 interprets the output signal from the skew detector 140 , filters the output to provide the desire frequency response and stability , generates appropriate control signals , and directs the control signals to the delay elements 134 a , b via control lines 144 a , b , respectively , thus forming a closed feedback control loop . in analog form , the controller 138 is a low - pass filter comprised of discrete inductors , capacitors , and resistors , which effectively time - averages the output of the skew detector 140 and provides a stable signal to delay elements 134 a , b . in digital form , the controller 138 consists of an analog - to - digital converter ( adc ) and performs filtering using digital signal processing ( dsp ) algorithms that are well known in the art to generate the control signals to delay elements 134 a , b . those skilled in the art will recognize that both analog and digital methods are viable , and the selection of either method is dependent on the needs of the system application . the skew compensation circuit 130 compensates for the differential signal skew caused by all of the sources upstream from the receiver 118 . the feedback provided by the skew detector 140 enables the skew compensation circuit 130 to dynamically adapt to changes in the differential signal skew . although not illustrated , filter components may be utilized within the controller 138 to control the response time of the feedback loop , and to help ensure stability . turning now to fig3 , a high - speed differential signal communication link 210 according to a second embodiment of the present invention is shown . the link 210 includes a skew compensation circuit 230 disposed between differential transmission lines 220 a , b and a terminator 232 . the configuration and operation of the skew compensation circuit 230 is similar to the circuit 130 of fig2 . the comparator skew detector 240 , controller 238 , and the delay elements 234 a , b all operate in the same manner . however , the skew compensation circuit 230 is disposed upstream from a terminator 232 such that the effective input differential - impedance match into the skew compensation circuit 230 is enhanced by ensuring the received p - side and n - side signals 229 a , b arrive simultaneously at the terminator , further improving the integrity of the differential signals 225 . turning now to fig4 , a high - speed differential signal communication link 310 according to a third embodiment of the present invention is shown . like the high speed communication link 110 of fig2 , a skew compensation circuit 330 is disposed between a terminator 332 and a differential signal receiver 318 . unlike the links 110 , 210 of fig2 and 3 , no variable - delay elements are used in the skew compensation circuit 330 to compensate for skew in the differential signal . as illustrated , the differential transmission lines 320 a , b are terminated at the terminator 332 directed into the skew - compensation circuit 330 . the circuit 330 is configured to detect and reduce relative skew occurring between the p - side and n - side signals 329 a , b of the differential signal 328 that are subsequently fed into the differential receiver 318 at the receive end 316 of the link 310 . the skew detector 340 monitors the p - side and n - side signals 326 a , b of the received differential signal 325 and quantifies the differential signal skew between them in a manner such as previously described . the signals 326 a , b are delayed through fixed - delay elements 334 a , b , described below . the outputs of the fixed - delay elements 334 a , b are delayed p - side and n - side signals 350 a , b . the skew detector 340 outputs a signal to a controller 338 via a signal line 342 . the controller 338 produces and outputs corresponding control signals via signal lines 344 a , b to buffers 345 a , b . the delayed p - side and n - side signals 350 a , b and buffered p - side and n - side signals 351 a , b are fed into adders 336 a , b where the signals are added together to produce de - skewed p - side and n - side signals 329 a , b of the skew - corrected differential signal 328 . still referring to fig4 , in one method for skew compensation , the buffers 345 a , b produce p - side and n - side compensation signals 351 a , b that are of appropriate shape , polarity , and amplitude that when added to the delayed p - side and n - side signals 329 a , b , the resulting differential signal 328 is presented to the receiver 318 with minimal , if any , relative skew . one method of producing the control signals 351 a , b to correct for skew between the received p - side and n - side signals 326 a , b involves the controller 338 producing a signal that is expressed mathematically as p + n where the p - side and n - side signals 326 a , b are added together . the controller 338 and buffers 345 a , b then fraction this summation back to the differential input , where the p - side signal 326 a has ( p + n )/ 2 added to it , and the n - side signal 326 b has ( p + n )/ 2 subtracted from it . by injecting these fractional summations back into the input , the effective signal at the input to the receiver 318 is [ p +( p + n )/ 2 ]−[ n −( p + n )/ 2 ]= 1 . 5p + 0 . 5p + 0 . 5n − 0 . 5n = 2p . in an ideal differential signal 325 , i . e ., the n - side signal 326 b has the opposite polarity but is otherwise identical to the p - side signal 326 a , i . e ., n =− p . the ideal received differential signal 325 is p − n = p −(− p )= 2p , which is the same effective signal presented to the receiver 318 in this embodiment of a high speed communication link 310 . in addition to providing a de - skewed differential signal 328 to the receiver 318 , the skew compensation circuit 330 illustrated in fig4 also compensates for the differential reflected signal at the terminator 332 , thus presenting the transmitter 314 with an effective ideal termination , which significantly aids in improving the resulting signal quality as measured with an eye diagram . one design constraint with the skew compensation circuit 330 is the delay time of the feedback control loop through controller 338 and buffers 345 a , b . to be effective , the buffered p - side and n - side compensation signals 351 a , b should be injected into the adders 336 a , b within the transition period of the signal ( e . g ., rising or falling edge ) of the delayed signals 350 a , b . by inserting fixed - delay elements 334 a , b into the signal path , the signals 326 a , b can be delayed an amount corresponding to the delay through the controller 338 and buffers 345 a , b . as such , the outputs of buffers 345 a , b are added to the delayed signals 350 a , b . in practice , the buffers 345 a , b and adders 336 a , b can take many forms and can often be incorporated into controller 338 . the primary purpose of buffers 345 a , b is to isolate the signals 351 a , b from being injected into the controller 338 , and to produce signals that are of appropriate shape and amplitude . the purpose of the adders 336 a , b is to add the delayed p - side and n - side signals 350 a , b and the compensation signals 351 a , b without affecting the respective driving circuitry . according to one aspect of the present invention , to ensure stability and minimize jitter effects , the dynamic response of the compensation may be controlled with respect to both amplitude and response time . furthermore , and according to another aspect of the present invention , in an effort to obtain optimum compensation , the differential signal skew is monitored at the receiving end of the high - speed communication link rather than at the transmitting end as is done in the prior art . according to yet another aspect of the present invention and to maintain and enhance the benefits of differential signal protocols , the final logic - level detection circuit ( a . k . a ., receiver , sampler , or slicer ) considers the difference between the p and n sides of the differential signal rather than the two sides independently . accordingly , a system and method are provided that compensate for both static and dynamic differential - skew to ensure stability through filtering of the feedback loop , ensure peak performance by monitoring the differential signal at the receiving end of the communication link rather than at the transmitting end , and compensate for differential termination . the present invention has been described in terms of the various embodiments , and it should be appreciated that many equivalents , alternatives , variations , and modifications , aside from those expressly stated , are possible and within the scope of the invention . therefore , the invention should not be limited to any particular described embodiment .