as described briefly above , the improved correlation scheme according to the present invention overcomes the signal recovery problem caused by the differential encoding characteristic of spread spectrum waveforms , such as those containing ccsk modulation and ppm modulation . the correlator is required to operate with a composite signal consisting of a plurality ( two ) pseudo - noise generator waveforms which are added together at the source for security purposes . the reasons for employing a pair of pseudo - noise sequences are the requirements for ccsk and ppm data modulation . in each of these modulation techniques , a sequence of pseudo - noise chips , termed a symbol , is employed . the symbol could be on the order of 256 chips in length and has good autocorrelation properties ; namely , it enjoys a high correlation peak with low autocorrelation sidelobes . this symbol is employed for all communications over an extended period of time . in other words , the same sequence is employed repeatedly . ppm or ccsk modulation involves sending a large number of these symbols in sequence to transmit data . each symbol may represent n bits , wherein n is an integer less than m , where 2 m equals the number of chips employed in the symbol . as an example , a single symbol could be 16 - ary ppm , where the 256 chips of the symbol are shifted into 16 possible time slots separated by at least two chips . 16 - ary ppm can transmit 4 - bits per symbol . similarly , ccsk can be used where the symbol is cyclicly shifted through up to 128 positions , each position being separated by two chips from an adjacent chip position , thereby enabling the transmission of seven data bits per symbol . the use of a pseudo - noise sequence to transmit such symbols is predicated upon the high autocorrelation properties of the pn sequences and , hence , the ease with which time shifts of the symbols can be recognized by a correlator . in order to provide high security , the transmissions are overlaid with another pseudo - random code which does not repeat ( a long pn code ) over some interval such as a day . receiving the composite ( pn sequence - upon pn sequence ) pseudo - noise waveform requires knowledge of both the precise timing of the overlaying pn sequence and the characteristics of both the long pn code and the symbol pn code . thus , at the receiver , knowledge of the overlaying pn sequence and the symbol pn sequence are an a priori requirement to signal recovery . the present invention , to be described in detail below , makes use of the a priori knowledge and is able to simultaneously strip off the overlying pn code and perform ccsk and ppm pseudo - noise symbol demodulation in the correlation / signal demodulation process . before describing this process , a brief description of the hybrid array correlator described in the above referenced copending frazier application that may be advantageously employed in carrying out the present invention will be set forth . for a more detailed explanation of such a correlator , attention may be had , of course , to that application . referring now to fig1 and 2 , the correlator itself may be considered to be formed of a grouping of correlator cells , an individual one of which is shown in fig2 employing respective shift registers for delaying the correlation reference sequence and for delaying the timing and control signals for the integrate and dump circuitry . specifically , a reference signal ( for example a spreading function ) is coupled over a link 11 to a multi - stage shift register comprised of an n number of stages z - 1 1 . . . z - 1 n . the outputs of these respective stages are coupled over links 12 - 1 . . . 12 - n to a respective set of complex multipliers 14 - 1 . . . 14 - n . by complex multipliers is meant that the multipliers combine the in - phase and quadrature components of a base - band signal of interest applied over link 13 by the respective delayed versions of the spreading sequence stored in the shift register 12 . the outputs of multipliers 14 - 1 . . . 14 - n are coupled to respective integrate and dump circuits 15 - 1 . . . 15 - n , the outputs of which are dumped , or coupled , via commutation switches 16 - 1 . . . 16 - n to output link 23 . control of the operation of commutation switches 16 - 1 . . . 16 - n is effected by a timing or gating strobe sequence that is coupled over link 22 to shift register 21 . the respective stages of shift register 21 are coupled over links 24 - 1 . . . 24 - n to control the operation of dump switches 16 - 1 . . . 16 - n . fig2 shows an individual correlator cell of the hybrid array correlator shown in fig1 for processing the vector components of the base - band information signal on link 13 with the digital reference sequence , to produce the base - band vector components of the achieved correlation . as mentioned previously , both the in - phase i ( t ) and quadrature q ( t ) components of the unknown information signal and the spreading sequence are employed . the in - phase component si ( t ) of the reference sequence is coupled over link lli to stage 12 - ii of shift register 12 . the quadrature component sq ( t ) is coupled over link 11q to stage 12 - iq of register 12 . similarly , the commutator or strobe signal is coupled over link 22 to shift register stage 21 - i of shift register 22 . the respective in - phase i ( t ) and quadrature components q ( t ) of the unknown information signal are coupled over links 13i and 13q and applied to respective multipliers 141 / 144 and 143 / 142 . multipliers 141 and 142 receive as second inputs thereof the contents of stage 12 - ii of shift register 12 , while multipliers 143 and 144 are coupled to stage 12 - iq of shift register 12 . the product outputs of multipliers 141 and 143 are summed in adder circuit 145 while the product outputs of multipliers 142 and 144 are subtracted from one another in difference circuit 146 . the output of adder 145 is coupled to integrator 15 - ia while the output of subtractor 146 is coupled to integrator 15 - ib . the outputs of integrators 15 - ia / 15ib denoted as a / b in fig3 may be respectively defined as ## equ1 ## the integration quantities a and b provided by integrators 15 - ia and 15 - ib are coupled to links 23a and 23b under the control of commutator switch 16 - i in response to switching signals supplied over link 24 - i from stage 21 - i of shift register 21 . corresponding digital values are then produced by a / d converters 31 and 32 to be coupled over link 33 and 34 for further signal processing . the clocking of signals through shift register 21 is such that each shift register stage 21 - i provides a one clock cycle delay between adjacent cells or stages ( i ). the operation of integrators 15 - ia and 15 - ib is such that the signals are integrated for the duration of one symbol , at which time the contents thereof are dumped by commutator switch 16 - i . as pointed out above , pursuant to a basic embodiment of the invention , the hybrid array correlator shown in fig1 and 2 may be coupled to perform simultaneous stripping of the overlying pn code from a ccsk waveform . a hybrid array correlator configured for such a operation is shown in fig3 as further including a set of modulo - 2 adders 42 - 1 . . . 42 - n coupled between the outputs 12 - 1 . . . 12 - n of shift register 12 and the inputs of complex multipliers 14 - 1 . . . 14 - n . the overlying pn code is applied over link 41 and common to each of the modulo - 2 adders 42 - 1 . . . 42 - n . the correlator of fig3 operates as a time invariant matched filter for ccsk modulation by employing as many cells or stages of the correlator as there are bits in the ccsk reference waveform and by looping the last ( or z - 1 n ) stage of shift register 12 to the first ( or z - 1 1 ) stage thereof . in this fashion , the reference sequence continuously circulates through shift register 12 . a detailed illustration of an individual cell or stage of the ccsk correlator of fig3 is shown in fig4 . as will be appreciated from the foregoing description of an individual cell of the hybrid array correlator of fig2 and the above description of the block diagram illustration of fig3 an individual cell as shown in fig4 differs from that of fig2 in that respective modulo - 2 adders 42 - ii and 42 - iq are coupled between the respective in - phase line 41 - i for the overlying pn sequence and the quadrature - phase line 41 - q of the overlying pn sequence and the outputs of respective stages 12 - ii and 12 - iq of shift register 12 and the inputs of the complex multipliers . otherwise , the circuit works identically to the correlator stage shown in fig2 . as pointed out briefly above , for ccsk modulation ( or other similar modulation such as ppm ), a sequence of pseudo - noise chips which make up a symbol is employed repeatedly . thus , with the reference sequence being circulated through shift register 12 , at any point in time , one of the cells or stages ( i ) of the correlator will be in time alignment with an incoming ccsk symbol on link 13 , since all possible ccsk shifts exist somewhere within the correlator . thus , the array correlator may be considered to be a time invariant optimal matched filter detector for ccsk signals . when the ccsk signals are received as msk modulation , there is approximately 0 . 9 db correlation loss due to the quantized nature of the reference signals in the correlator . for example , when the msk waveform undergoes a transition from 0 ° to 90 ° over a single bit period , the correlator correlates with a 45 ° fixed angle over the entire bit period . this results in the 0 . 9 db loss . in the process of demodulating the incoming spread waveform , it is initially assumed that time synchronization for the commutation strobe sequence coupled over link 22 has been achieved through the use of a customary training sequence that preceeds normal transmission of unknown data , so that the time of arrival of the pn spreading waveform is known . as the details of the implementation or operation of such a training sequence are not necessary for an understanding of the operation of the present invention , they will not be described here . for an exemplary discussion of the use of such a training sequence , attention may be directed to the above referenced copending application . a component of the demodulation process that is not known is the sequence of n bits of data encoded in the ccsk waveform which results in the one of the 2 n possible received sequences , each corresponding to a unique combination of a known pn sequence that has been modulo - 2 added to one of the 2 n cyclic shifts of the reference waveform . by the provision of the respective modulo - 2 adders 42 - 1 . . . 42 - n between the respective stages of the recirculating shift register 12 and multipliers 14 - 1 . . . 14 - n , for each cell of the array correlator , the reference waveform is modulo - 2 added to the undelayed pn signal supplied over link 41 prior to correlating it with the vector components of the signal on link 13 . thus , within each correlator stage or cell , a precise replica of each of the 2 n possible received sequences is correlated with the unknown received signal to determine which signal had been sent . when applying base - band correlation to an msk waveform , it is necessary to decompose the msk modulation into its respective in - phase and quadrature components in the same manner as employed in the modulator at the transmitter in creating the waveform . the details of the structure of a cell are shown for such respective in - phase and quadrature components in fig4 as noted above . in the modulator at the transmitting station , the pn and ccsk reference are modulo - 2 added together prior to being differentially encoded . in the demodulator , the reference and pn waveforms may be differentially encoded prior to modulo - 2 addition since the modulo - 2 addition is transparent to this operation . this permits the array correlator to employ a smaller number of differential encoders than would be required if the encoding was performed after addition at each cell . in the configuration shown in fig3 and 4 differential encoding is shown as being employed prior to applying the reference and pn waveforms to the correlator stages . as mentioned previously , timing is achieved through the use of a training sequence so that the strobe signals that are coupled through shift register 21 will properly operate the integrate and dump circuits in order that a useful correlation output be obtained . once correct timing has been achieved , the reference sequence , separated into its quadrature and in - phase components and differentially encoded , is loaded into the n = 2 n stages of shift register 12 . using a 32 stage shift register as an example , for resolving a 32 chip reference sequence into its i and q components , there will be obtained 16i and 16q bits . with the incorporation of modulo - 2 adders 42 - 1 . . . 42 - n between the recirculating stages of shift register 12 and complex multipliers 14 , there will be obtained at the output of the integrators 15 a pair of signals a and b as follows : ## equ2 ## as can be seen from these equations , two different spreading functions are applied to create a composite reference in the correlator from which demodulation of the ccsk signals is obtained . through the configuration shown in fig3 and 4 , the incoming signal is correlated with the time - aligned spreading signal and the time delayed ccsk reference signal at the respective cells . thus , as pointed out above , one of the correlator cells is time aligned with the ccsk symbol so that operation of the correlator permits demodulation of the symbol . the incorporation of the stripping of the overlying pn code into each correlation process may also be achieved using correlator configurations other than the hybrid array correlator of fig1 - 4 . fig5 shows the application of the invention to a transversal correlator , whereas fig6 shows the invention employing a digital convolver . in the correlator of fig5 the signal input is applied to a shift register 61 , whereas the reference symbol pattern is coupled over link 11 to a static serial - in - parallel out shift register 65 . the overlying pn sequence is coupled over link 41 to a shift register 67 whose individual stages 67 - 1 . . . 67 - n are connected on their outputs to the first inputs respectively of modulo - 2 adders 42 - 1 . . . 42 - n . once the reference sequence has been loaded into shift register 65 , it remains in a static condition , being coupled over links 65 - 1 . . . 65 - n to a set of latches or register circuits 66 . the contents of these register circuits are coupled over links 66 - 1 . . . 66 - n to second inputs of modulo - 2 adders 42 - 1 . . . 42 - n . this transversal correlator thereby takes multiple delayed versions of the signal samples that are coupled through shift register 61 and multiplies each of these versions of the incoming signal by the corresponding reference sample stored in register 66 times the pn overlay in shift register 67 . each of the products of the reference and the unknown signal input is summed in summing circuit 63 to provide an output over link 64 . the digital convolver configuration of fig6 is somewhat similar to the transversal correlator of fig5 in that the symbol sequence is clocked into a register and then loaded into a set of latches to be employed as a static reference . the spreading sequence coupled over link 41 is modulo - 2 added with the static reference and then multiplied in respective multipliers 14 - 1 . . . 14 - n with an undelayed version of the signal sequence on link 13 . each complex product , however , is successively stored in a register 71 - 1 . . . 71 - n prior to being summed with the product of the next succeeding stage . this results in a correlation between the modulo - 2 products with the symbol sequence stored in the static registers with the undelayed signal samples being sequentially added over all samples of the signal sequence . in the foregoing description of the various embodiments of the invention , the exemplary modulation technique under consideration is ccsk modulation . as noted earlier , however , it is to be observed that the invention has applicability to similar modulation schemes such as pulse position modulation ( ppm ), which may be considered to be a modified form of ccsk . ppm with a pn overlay requires a time invariant matched filter the length of which is equal to the symbol span plus each of the ppm time slots summed together . as an example , for a symbol length of 128 chips , and an additional 16 - two - chip ppm spacings , the correlator length required will be 160 chips . still , the basic scheme described above is applicable to such modulation and is capable of simultaneously removing the overlying pn sequence while correlating the unknown signal with the known scrambling sequence towards signal demodulation . while we have shown and described several embodiments in accordance with the present invention , it is understood that the same is not limited thereto but is susceptible of numerous changes and modifications as known to a person skilled in the art , and we therefore do not wish to be limited to the details shown and described herein but intend to cover all such changes and modifications as are obvious to one of ordinary skill in the art .