hereinafter , an interrupt - handling - mode determining method according to an exemplary embodiment of the present invention will be described below with reference to the accompanying drawings . it will be apparent to those skilled in the art that modifications and variations can be made in the present invention without deviating from the spirit or scope of the invention . thus , it is intended that the present invention cover any such modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents . accordingly , such changes and modifications are seen to be within the true spirit and scope of the invention as defined by the appended claims . it will also be appreciated that the drawings and specification merely disclose typical embodiments of the invention and , although specific terms are employed , they are used in a generic and descriptive sense only and not for purposes of limitation . fig1 is a drawing illustrating an example of a configuration of an embedded system using an interrupt - handling - mode determining method of an embedded operating system kernel according to an exemplary embodiment of the present invention . an embedded system 10 includes a cpu 12 and a modular kernel 14 . if receiving an interrupt from interrupt resources 20 , 30 , etc ., through an interrupt controller 16 in the kernel 14 , the cpu 12 performs a process corresponding thereto . the cpu 12 may be configured as an arm processor . the kernel 14 is the core of an operating system of the embedded system 10 . the kernel 14 includes the interrupt controller 16 ( also referred to as an interrupt processor ) for processing all requests to competitively require a service of the kernel such as a completed i / o operation , a scheduler ( not shown ) for determining which programs share a process time of the kernel in what order , and a supervisor ( not shown ) for actually giving the right of using of a computer to individual processors after scheduling finishes . the interrupt controller 16 divides interrupt handling modes into a first interrupt handling mode and a second interrupt handling mode different from each other in the process speed . for example , the interrupt controller 16 sets a value of an interrupt mode register ( not shown ) to different values in order to divide the interrupt handling modes into the first interrupt handling mode and the second interrupt handling mode . here , the first interrupt handling mode may be a fiq ( fast interrupt request ) handling mode , and the second interrupt handling mode may be an irq ( internet request ) handling mode . it may be understood that the fiq handling mode and the irq handling mode are conceptually the same except that the process speed of the fiq handling mode is faster . if receiving interrupt requests from the interrupt resources 20 , 30 , etc ., the interrupt controller 16 sets the fiq ( fast interrupt request ) handling mode or the irq ( interrupt request ) handling mode according to a kind of each of corresponding interrupts . for example , if the kind of interrupt is a timer interrupt , the interrupt controller 16 unconditionally sets the fiq handling mode . this is because the number of times that the timer interrupt is handled for each hour is the largest . meanwhile , the interrupt controller 16 adapts a method in which a distribution ratio of interrupt handling modes varies according to the process situation of the cpu 12 . that is , according to the ratio of idle time of the cpu 12 , when a cpu bound job ( a process mainly using the cpu 12 ) is predominant , the distribution ratio of the fiq handling mode and the irq handling mode is changed to , for example , 20 : 80 . when i / o bound job ( process mainly performing input / output ) is predominant , the distribution ratio of the fiq handling mode and the irq handling mode is changed to , for example , 80 : 20 . in other words , the kernel 14 can find a ratio of the current i / o bound job and the cpu bound job by self - monitoring , which makes it possible for the interrupt controller 16 to variably adjust the distribution ratio of the fiq handling mode and the irq handling mode . the interrupt controller 16 adjusts the above - mentioned distribution ratio of the fiq handling mode and the irq handling mode during job scheduling time . when a current process exhausts time assigned to it , it returns the cpu and is replaced with the next process . this time is referred to as job scheduling time . during the job scheduling time , a context switch occurs , and in this case , the distribution of interrupt handling modes is adjusted . the interrupt controller 16 finds out and lists resources 20 , 30 , etc . during boot - up . the embedded system 10 should interactively operate in some situations , mainly perform an i / o operation in some situations , and mainly perform a throughput operation in some situations . in the exemplary embodiment of the present invention , profiles of interrupts are generally classified into an interactive profile , an i / o oriented profile , and a throughput oriented profile . in a case of an interactive profile , since a response property to a user &# 39 ; s input is important , the interrupt controller 16 makes interrupts from a human interface apparatus 20 such as a mouse 22 , a keyboard 24 , a touch screen 26 , etc ., to be mainly handled in the fiq handling mode . in a case of an i / o oriented profile , the interrupt controller 16 makes interrupts from an interrupt resource 30 such as a disk 32 or a network apparatus 34 to be handled in the fiq handling mode . in a case of a throughput oriented profile , the interrupt controller 16 makes interrupt handling to be performed in the irq handling mode without using the fiq handling mode . of cause , the user can variably adjust priorities for those interrupts . meanwhile , although profiles of interrupts are generally classified into an interactive profile , an i / o oriented profile , and a throughput oriented profile in the exemplary embodiment of the present invention described above , the user can set categories according to the user &# 39 ; s situation and add new categories . also , the interrupt controller 16 may first set the fiq handling mode on the basis of the number of times the interrupt handling modes are performed with respect to all individual interrupts . fig2 is a flow chart schematically illustrating an operation until boot - up of an embedded system adapting an interrupt - handling - mode determining method of an embedded operating system kernel according to an exemplary embodiment of the present invention is completed . when boot - up of an embedded system 10 starts ( s 10 ), an interrupt controller 16 in a kernel 14 loads an interactive profile , an i / o oriented profile , a throughput oriented profile , etc ., with regard to all interrupt resources 20 , 30 , etc . ( s 12 ). subsequently , the interrupt controller 16 determines whether a fiq has been assigned to a loaded interrupt profile ( s 14 ). if a fiq has been assigned (‘ yes ’ in s 14 ), the interrupt controller 16 performs registration in order to handle a corresponding interrupt in the fiq handling mode ( s 16 ). in contrast , if a fiq has not been assigned (‘ no ’ in s 14 ), the interrupt controller 16 performs registration in order to handle the corresponding interrupt in the irq handling mode ( s 18 ). registered contents are transmitted to the cpu 12 . when the cpu 12 performs the corresponding interrupt in a registered interrupt handling mode , the boot - up is completed ( s 20 ). fig3 is a flow chart illustrating an interrupt - handling - mode determining method of an embedded operating system kernel according to an exemplary embodiment of the present invention in detail . a feature of the exemplary embodiments of the present invention is to determine whether to handle a certain interrupt in the fiq handling mode or in the irq handling mode . accordingly , hereinafter , how to assign the fiq handling mode and the irq handling mode in a process from start to finish of boot - up of the embedded system 10 described above with reference to fig2 will be mainly described . first , the interrupt controller 16 determines whether the kind of interrupt is a timer interrupt ( s 30 ). if the kind of interrupt is a timer interrupt (‘ yes ’ in s 30 ), the interrupt controller 16 unconditionally assigns the fiq handling mode to the corresponding interrupt ( s 32 ). this is because the number of times that the timer interrupt is handled for each hour is the largest . in contrast , if the kind of interrupt is not a timer interrupt (‘ no ’ in s 30 ), the interrupt controller 16 uses a scheme in which the distribution ratio of the interrupt handling modes varies according to the process situation of the cpu 12 . for example , according to the ratio of idle time of the cpu 12 , when a cpu bound job ( a process mainly using the cpu 12 ) is predominant (‘ yes ’ in s 34 ), the interrupt controller 16 changes the distribution ratio of the fiq handling mode and the irq handling mode to , for example , 20 : 80 . as such , when the kind of interrupt is not a timer interrupt , if the cpu bound job is predominant , the ratio of the irq handling mode is made higher than the ratio of the fiq handling mode ( s 36 ). in contrast , when i / o bound job ( process mainly performing input / output ) is predominant instead of the cpu bound job (‘ no ’ in s 34 ), the interrupt controller 16 changes the distribution ratio of the fiq handling mode and the irq handling mode to , for example , 80 : 20 . as such , when the kind of interrupt is not a timer interrupt , if the i / o bound job is predominant , the ratio of the fiq handling mode is made higher than the ratio of the irq handling mode ( s 38 ). although the exemplary embodiments of the present invention have been described above with reference to the accompanying drawings , they are used in a generic and descriptive sense only and not for purposes of limitation . it will be apparent to those skilled in the art that modifications and variations can be made in the present invention without deviating from the spirit or scope of the invention .