now referring to fig3 there is shown how the synchronizer 17 operates in the preferred embodiment of the invention . according to step 20 , an incoming input signal to synchronize with a sequence of at least one coefficient is provided to the synchronizer . according to step 22 , the sequence of at least one coefficient is provided to the synchronizer 17 . according to step 24 , the provided incoming input signal is synchronized with the provided sequence of at least one coefficient . now referring to fig4 there is shown how the signal to synchronize , according to step 20 , is provided in one embodiment of the invention . according to step 30 , the incoming input signal is received by the synchronizer . in the preferred embodiment of the invention , the incoming input signal comprises a real part and an imaginary part . according to step 32 , the real part of the incoming input signal is extracted . according to step 34 , the imaginary part of the incoming input signal is extracted . according to step 36 , signum of the extracted real part of the incoming input signal is computed . while someone skilled in the art will appreciate that signum ( sgn ( )) function is usually defined as follows for a function f : sgn ( f )=− 1 if f & lt ; 0 , it will be appreciated in the following that the signum function used in the preferred embodiment described herein is defined as follows : according to step 37 , signum of the extracted imaginary part of the incoming input signal is computed . now referring to fig5 there is shown how the sequence of at least one coefficient is provided according to step 22 . according to step 40 , the sequence of at least one coefficient is received by the synchronizer . in the preferred embodiment of the invention , the sequence of at least one coefficient comprises a real part and an imaginary part . according to step 42 , the real part of the sequence of at least one coefficient is extracted . according to step 44 , the imaginary part of the sequence of at least one coefficient is extracted . according to step 46 , signum of the extracted real part of the sequence of at least one coefficient is computed . according to step 47 , signum of the extracted imaginary part of the sequence of at least one coefficient is computed . now referring to fig6 there is shown how the synchronization is achieved between the provided incoming input signal and the sequence of at least one coefficient according to step 24 in the preferred embodiment of the invention . according to step 50 , a mapped signum of the real part of the incoming input signal is provided . in fact , the signum of the real part of the incoming input signal , which is computed according to step 36 , is mapped . preferably , the signum of the real part of the incoming input signal is mapped in order to be located at 0 and 1 rather than to be located at − 1 and 1 . according to step 52 , a mapped signum of the imaginary part of the incoming input signal is provided . the signum of the imaginary part of the incoming input signal , which is computed according to step 37 , is mapped . preferably , the signum of the imaginary part of the incoming input signal is mapped in order to be located at 0 and 1 rather than to be located at − 1 and 1 . according to step 54 , a mapped signum of the real part of the sequence of at least one coefficient is provided . the signum of the real part of the sequence of at least one coefficient , which is computed according to step 46 , is mapped . preferably , the signum of the real part of the sequence of at least one coefficient is mapped in order to be located at 0 and 1 rather than to be located at − 1 and 1 . according to step 56 , a mapped signum of the imaginary part of the sequence of at least one coefficient is provided . the signum of the imaginary part of the sequence of at least one coefficient , which is computed according to step 47 , is mapped . preferably , the signum of the imaginary part of the sequence of at least one coefficient is mapped in order to be located at 0 and 1 rather than to be located at − 1 and 1 . according to step 58 , an exclusive or ( xor ) operation is performed using the mapped signum of the real part of the signal , the mapped signum of the imaginary part of the signal , the mapped signum of the real part of the sequence of at least one coefficient and the mapped signum of the imaginary part of the sequence of at least one coefficient . a cross - correlated result signal is provided upon completion of the exclusive or ( xor ) operation . someone skilled in the art will appreciate that such exclusive or ( xor ) operation is of great advantage as it is very easy to implement in hardware . according to step 60 , a sum is computed using the result of the exclusive or ( xor ) operation performed in step 58 . according to step 62 , a maximum in the cross - correlated signal is located using the result of the sum computed according to step 60 . in the preferred embodiment , the maximum is located by detecting the maximum of p = y *( n )· y ( n ), where y ( n ) is the cross - correlated signal . it will be appreciated that detecting the maximum in the cross correlated signal is a specific case of a more general embodiment where step 62 is achieved when the cross - correlated signal matches a given criterion . such given criterion may be provided depending on an application . in fact , it will be appreciated that in the case where some noise is added to the signal , finding the maximum may not be reliable . alternatively , the given criterion may be defined using statistical parameters for instance . now referring to fig2 there is shown a synchronizer 17 in one embodiment of the invention . in this embodiment , an incoming input signal g , having an arbitrary power value , is provided to the synchronizer . the incoming input signal g comprises a real part re ( g ) and an imaginary part im ( g ). the synchronizer 17 synchronizes the incoming input signal g with a sequence of at least one coefficient c . in this embodiment , the sequence comprises one coefficient . the sequence of at least one coefficient comprises a real part re ( c ) and an imaginary part im ( c ). the synchronizer 17 comprises a first correlation unit 18 which correlates the imaginary part of the incoming input signal im ( g ) with the imaginary part of the sequence of at least one coefficient im ( c ) to provide a first correlated signal . the synchronizer 17 comprises a second correlation unit 18 which correlates the real part of the incoming input signal re ( g ) with the real part of the sequence of at least one coefficient re ( c ) to provide a second correlated signal . the synchronizer 17 comprises a third correlation unit 18 which correlates the imaginary part of the incoming input signal im ( g ) with the real part of the sequence of at least one coefficient re ( c ) to provide a third correlated signal . the synchronizer 17 comprises a fourth correlation unit 18 which correlates the real part of the incoming input signal re ( g ) with the imaginary part of the sequence of at least one coefficient im ( c ) to provide a fourth correlated signal . the synchronizer 17 further comprises a first adding unit 14 . the first adding unit 14 subtracts the first correlated signal and the second correlated signal to 4 to provide a first added signal . the synchronizer 17 further comprises a second adding unit 14 . the second adding unit 14 subtracts the third correlated signal and adds the fourth correlated signal to provide a second added signal . the synchronizer 17 further comprises the maximum finding unit 16 which determines which of the first added signal and the second added signal provides a maximum value . someone skilled in the art will appreciate that it is then possible to synchronize the incoming input signal g with the sequence of at least one coefficient c when the maximum value is located according to step 62 of fig6 . it will further be appreciated that the maximum finding unit 16 is a specific case of a criterion matching unit . now referring to fig7 there is shown a schematic of a synchronizer which performs a synchronization of an incoming input signal with a sequence of a plurality of coefficients according to the preferred embodiment of the invention . the synchronizer comprises a plurality of correlation units 18 , a plurality of delay units 15 , a plurality of adding units 14 and a maximum finding unit 16 . the plurality of correlation units 18 , the plurality of adding units 14 and the maximum finding unit 16 function in the same manner as described with fig2 . each delay unit of the plurality of delay units 15 is used to delay an incoming signal by a predetermined delay . the result of a cross - correlation of the sequence of a plurality of coefficients with the incoming input signal is y  ( n ) =  ∑ i = 0 n - 1  c  ( i ) * * g  ( i + n ) =  ∑ i = 0 n - 1  [ re  { c  ( i ) }  re  { g  ( i + n ) } + im  { c  ( i ) }  im  { g  ( i + n ) } ] +  j  ∑ i = 0 n - 1  [ re  { c  ( i ) }  im  { g  ( i + n ) } - im  { c  ( i ) }  re  { g  ( i + n ) } ] , where c ( i ) are the plurality of complex coefficients , g ( i ) are complex samples of the incoming input signal , n is the number of coefficients of the sequence , i is the coefficient index and n is the sample index . y  ( n ) =  ∑ i = 0 n - 1  [ sign  { re  { c  ( i ) } }  sign  { re  { g  ( i + n ) } } +  sign  { im  { c  ( i ) } }  sign  { im  { g  ( i + n ) } } ] +  j  ∑ i = 0 n - 1  [ sign  { re  { c  ( i ) } }  sign  { im  { g  ( i + n ) } } -  sign  { im  { c  ( i ) } }  sign  { re  { g  ( i + n ) } } ] y  ( n ) = ∑ i = 0 n - 1  [ m rr  ( i , n ) + m ii  ( i , n ) ] + j  ∑ i = 0 n - 1  [ m ri  ( i , n ) - m ir  ( i , n ) ] , m rr ( i , n )≡ sign { re { c ( i )}} sign { re { g ( i + n )}} m ii ( i , n )≡ sign { im { c ( i )}} sign { im { g ( i + n )}} m ri ( i , n )≡ sign { re { c ( i )}} sign { im { g ( i + n )}} m ir ( i , n )≡ sign { im { c ( i )}} sign { re { g ( i + n )}} a mapping is then performed in order to have a result of a signum being one of 0 and 1 , rather than being one of − 1 and 1 . to achieve such result , it is necessary that : b rr  ( i , n ) ≡ 1 - m rr  ( i , n ) 2 b ii  ( i , n ) ≡ 1 - m ii  ( i , n ) 2 b ri  ( i , n ) ≡ 1 - m ri  ( i , n ) 2 , it   is   possible   to   show   that b ir  ( i , n ) ≡ 1 - m ir  ( i , n ) 2 y  ( n ) = ∑ i = 0 n - 1  [ 1 - 2  b rr + 1 - 2  b ii ] + j  ∑ i = 0 n - 1  [ 1 - 2  b ri - ( 1 - 2  b ir ) ] = 2  ∑ i = 0 n - 1  [ 1 - b rr - b ii ] + 2  j  ∑ i = 0 n - 1  [ b ir - b ri ] = 2  n - 2  ∑ i = 0 n - 1  b rr - 2  ∑ i = 0 n - 1  b ii + 2  j  [ ∑ i = 0 n - 1  b ir - ∑ i = 0 n - 1  b ri ] y  ( n ) = n - ∑ i = 0 n - 1  b rr - ∑ i = 0 n - 1  b ii + j  [ ∑ i = 0 n - 1  b ir - ∑ i = 0 n - 1  b ri ] someone skilled in the art will appreciate that such embodiment enables performing exclusive - or which is of great advantage as the exclusive - or , performed in units 18 of fig2 and 7 , is easy to implement in hardware . it will further be appreciated that only one bit is used for quantization . such one - bit quantization is of great advantage as signum function is not dependent on the amplitude of the signal but rather on the sign value of the input power of the signal . the maximum finding unit 16 operates by finding a peak in the amplitude or amplitude - squared component of y ( n ). in one embodiment , the maximum finding unit 16 operates by finding a maximum which is located when the sequence of the plurality of coefficients c 0 . . . cn matches the coefficients in an input signal . alternatively , the maximum finding unit 16 operates using a given criterion . the given criterion may be a threshold for instance . the threshold is chosen such that the probability of providing a false maximum is minimized while at the same time the probability of missing a valid trigger is sufficiently low . these conditions require estimating the probability distribution functions for the false synchronization and for a valid synchronization where the signal is distorted due to various impairments . the embodiments of the invention described above are intended to be exemplary only . the scope of the invention is therefore intended to be limited solely by the scope of the appended claims .