the present invention discloses a method for direct chip attach by using solder bumps and an underfill layer inbetween a semiconductor chip and a circuit board such that an assembled device does not have to be filled with an underfill material afterwards . before the direct chip attach process is carried out , a thin underfill layer is first pre - disposed over a pad array site on a laminate substrate . the underfill layer contains a fluxing agent and has a thickness of less than 5 μm , i . e ., substantially thinner than that typically used . the present invention novel use of a pre - disposed thin underfill layer therefore eliminates the need for underfill dispensing after chip - join along with its inherent processing difficulties such as slowed production due to time - consuming capillary feed around the periphery of the attached chip and underfill voids that are difficult to detect . the voids can in turn lead to increased failure rates due to stresses on the affected solder joints . in the present invention novel method , once the underfill is applied to the circuit board , or the substrate , the chip is aligned and placed onto the underfill layer . the chip / circuit board assembly is then heated to at least a solder reflow temperature , typically about 200 ° c . or slightly above the 183 ° c . eutectic solder melting temperature . when the reflow temperature in the assembly is reached , the fluxing agent in the underfill activates the solder in the mold and thereby pulls it toward the metalized conductive pads on the circuit board ( or the substrate ). since the conductive pads have large wetting diameters , there is essentially no ball - up of the solder material . during the reflow process , the solder only protrudes enough to penetrate through the thin underfill layer to wet the conductive pads on the circuit board . most of the solder material stays within the in - situ mold which in effect becomes the bulk of the underfill . a present invention composite underfill can be produced in the following manner . when the reflow temperature is approached , the thin underfill layer is activated to adhesively bond to the in - situ mold layer on the chip . through this bonding , the underfill and the mold layer become one integral part . since the solder stays within the mold layer , i . e ., stays within the via openings in the mold layer , and there is essentially no ball - up phenomenon , the solder mold functions as the main stress absorber between the cte of silicon and the plastic laminate . to achieve this functionality along with being an in - situ mold , the cte of the mold layer on top of the silicon is between that of solder and silicon . since the bulk of the solder material is within the mold layer even after direct chip attach , the mold layer becomes the major component of the composite underfill , while the pre - disposed thin layer applied to the circuit board before attach becomes the minor component , as far as thickness is concerned . the present invention novel method therefore effectively eliminates the need for a separate solder mold , the need for underfill dispensing process after chip join , and voiding problems which are frequently encountered in peripherally applied underfill . the present invention method combines an in - situ solder mold with a thin pre - disposed fluxing underfill into a composite underfill layer . the major function of the underfill is actually performed by the in - situ mold layer on the chip as a main stress absorber . referring initially to fig1 wherein an enlarged , cross - sectional view of a present invention semiconductor chip 10 is shown . the semiconductor chip 10 consists of a bond pad 14 , most likely formed of aluminum on a silicon substrate 12 . a screen printable polymeric material 16 such as polyimide is then printed on a top surface 18 of the silicon substrate 12 . this is shown in fig2 . the present invention method simplifies a molten solder screening ( mss ) process by utilizing a screen printable polymeric layer as a solder mold and thus , eliminating the need for a solder mold or for a solder transfer step . the photo processing step of a photo - sensitive wafer passivation layer for producing openings for the solder bumps is also eliminated . the screen printable polymeric material , such as a polyimide is used as a passivation layer that has a coefficient of thermal expansion ( cte ) similar to that for a silicon wafer . suitable screen printable polyimide materials may be obtained commercially from the epoxy technology company of billerica , ma . under the product names of epo - tek ® 600 or 688 - pfc . the screen printable polyimide can be used to define solder bumps of any size except those of the smallest dimensions , i . e ., smaller than 0 . 003 inch . the method further eliminates the spin coating process , the patterning process and the ablation process normally required in processing polyimides . the screen printable polyimide films can be deposited in either a single or multiple layers to a thickness of 0 . 003 inch or more . the printed polyimide film therefore defines a mask for the deposition of both the ball limiting metallurgy layer and the solder bump . the screen printable polyimide material used in the present invention novel method is a single component , high temperature , low cte composition that is specifically formulated for printing on a silicon wafer while leaving a multiplicity of conductive pads exposed . the screen printable polyimide material has excellent definition and printability . once the material is cured , it prevents smearing during a backside lapping process . the low residual stress in the film after curing further prevents the bowing problem of silicon wafer due to high stresses . in screen printing a polyimide film , a polyimide material that is highly filled with a low cte filler is used . the highly filled content of the polyimide material leads to a low shrinkage , low residual stress film layer and thus a flat wafer . moreover , the screen printing process requires less polyimide material per wafer and the material itself is substantially lower in cost than typical photo - sensitive polyimides . a typical highly filled screen printable polyimide such as epo - tek ® 600 contains approximately 73 % solids . the choice of the print screen should be carefully made such that the screen emulsion material selected is not susceptible to the solvents used in the polyimide paste . the screen printing process can be carried out by an equipment that has precision optics and other capabilities necessary to align and print on wafers with micrometer accuracy and superior repeatability . the squeegee used in the printing process should be made of materials that are not vulnerable to attacks by the solvents in the polyimide paste and furthermore , should be able to produce sharp print patterns . the squeegee shape , material and pressure should be selected based on the thickness required and the viscosity of polyimide . a polyimide film can be printed on the wafer with a single pass of the squeegee across the screen so that the entire wafer is covered , leaving open only the sites of the conductive pads . as shown in fig2 after the screen printable polyimide 16 is printed on the top surface 18 of the silicon substrate 12 , the polyimide film can be cured by such means as infrared radiation for a time period between about 10 and about 20 minutes . once the printing and the curing of the polyimide layer is completed , an electroless plating of a blm layer 22 such as ni - au over the aluminum bond pad 14 can be carried out as in fig3 . the thickness of the blm layer 22 is relatively small such that it only takes up a small fraction of the total polyimide thickness . once the blm layer 22 is deposited over the aluminum bond pad 14 in the aperture 20 formed by the screen printing process , the wafer is ready for receiving molten solder . this is shown in fig3 . the molten solder can be deposited directly onto the wafer surface without using a transfer mold . as shown in fig3 the aperture 20 in the screen printable polyimide layer 16 above the blm layer 22 has a small aspect ratio , i . e ., a depth to diameter ratio of ½ or less . for example , when the depth of the aperture 20 above the blm layer 22 is between 0 . 002 ˜ 0 . 003 in , or approximately the thickness of the polyimide film , the diameter of the aperture 20 is between about 0 . 005 ˜ 0 . 007 in . as shown in fig4 once the shallow via opening 20 is filled with a solder material 30 by using a molten solder screening process , the solder 30 solidifies into a flat pancake of solder forming a flattened solder bump . a further advantage made possible by the present invention method of solder deposition is the ease of wafer testing at this intermediate stage of the bonding process . the flat pancake of solder has a much larger planar area for contact by probe needles . another feature of the flattened solder bumps is the mechanical robustness . since the solder remains coplanar with the rest of the wafer surface , there is nothing protruding that could be damaged by handling during this intermediate process step . it should be noticed that in fig4 only the blm layer 22 is shown under the solder bump 30 , the bond pad 14 is not shown for simplicity reason . the method for filling the apertures with a molten solder screening technique is shown in fig5 and 7 . another novel aspect of the present invention is the use of a fixture 40 which the wafer 10 is joined to for providing the required mechanical features for the molten solder screening process . as shown in fig5 the planarizing and squaring - up fixture 40 assures that the molten solder screening ( mss ) head does not hang over the edge of the silicon wafer at the start and the end of the scanning process . since the solder slot in a mss head is wide enough to cover the entire area of an eight inch or twelve inch wafer , run - on and run - off areas cause the solder to spill when the head overhangs the wafer edge . a to prevent the spilling of solder , fixture 40 in effect “ squares - off ” the round wafer 10 . the mounting of the wafer 10 into the planarizing fixture 40 can be described as follows . first , the wafer 10 is placed on a circular - shaped spring base plate 42 which has a slightly larger diameter than the wafer 10 . a high temperature putty ring 44 such as a partially cured silicon rubber , etc ., is then placed in and around the outer edge gap 46 . since the top surface 18 of the silicon wafer 10 and the top surface 48 of the fixture frame 50 must be on exactly the same plane , a reference flat plate 54 , or an alignment plate , is placed on top of the silicon wafer 10 and pushed down until it bottoms out against the top surface 48 of the fixture frame 50 . a plurality of spring means 60 are positioned between a bottom surface 56 of the cavity 58 and a bottom surface 62 of the spring base plate 42 for pushing the spring base plate 42 outwardly away from the cavity 58 . after the reference flat plate 54 bottoms out on the fixture frame 50 , four mechanical locking means 70 are activated which lock the spring base plate 42 into a planarized position . the mechanical locking means 70 may be suitable bolts that threadingly engage a threaded hole ( not shown ) in the fixture frame 50 with a tip 72 of the bolt 70 exerting a compressive force on an peripheral edge 64 on the spring base plate 42 . the mechanical locking means 70 locks the spring base plate 42 such that the relative position between the plate 42 and the fixture frame 50 is fixed . the reference flat plate , or the alignment plate 54 which is used to assure planarity between the wafer polyimide top surface 76 and the top surface 48 of the fixture frame 50 can now be removed . to assure absolute planarity , the putty ring 44 may be trimmed by running a razor edge along the gap between the wafer perimeter and the fixture frame 50 . at this point , the wafer / fixture assembly 40 is ready for the molten solder screening process in which a molten solder dispensing head ( not shown ) scans and fills the entire wafer . the fixture frame 50 provides the run - on and run - off areas required to prevent the solder from spilling out . the present invention novel method therefore utilizes a screen printable polyimide that has a cte between that of silicon and solder which serves multiple functions of a passivation layer , a blm mask , a solder mold and an underfill component . a mss process is used for wafer solder bumping which eliminates the mold transfer step with the wafer , in effect , serving the function of a mold . the initial as - deposited solder preforms ( or the flattened solder bumps ) are coplanar with the rest of the wafer and thus assuring a mechanically robust solder joint at the intermediate stage which is impervious to handling and amenable to testing . the present invention novel method further utilizes a fixture that permits the mss process to be carried out on a circular wafer by temporarily joining the wafer to a square fixture frame that is wide enough to accommodate the mss head . the fixture frame which assures the top surface of the polyimide is absolutely coplanar with the top surface of the fixture frame through a spring loaded and lockable wafer base . the fixture frame further allows the elimination of any gap formed between the wafer edge and the fixture frame by filling the gap with a high temperature putty ring . the present invention in - situ mold material 16 ( fig3 ) of a printable polyimide is designed and selected to serve several functions . first , the screen printable material is compatible in temperature resistance , in hardness , and in surface properties with the molten solder screening technique . secondly , the screen printable polyimide in - situ mold material protects the solder bumps formed from damages during handling . thirdly , the thermal fatigue enhancement of solder joints of the in - situ mold material is similar to standard underfill materials . in order to achieve solder joint thermal fatigue enhancement , an underfill material must adhere well to a silicon chip , to solder and substrate surfaces and has a thermal expansion coefficient close to that of solder . the present invention joining process can be shown in fig8 and 9 . in the joining process , a composite underfill concept is utilized which contains two materials , i . e ., the in - situ mold material and the flux - containing underfill material . the in - situ mold material is deposited at chip level prior to bumping which can be processed to expose chip pads for subsequent bumping by the molten solder screening process . the in - situ mold material of polyimide has properties compatible with the mss process , and further , has the suitable low cte property and elastic modulus between that of chip and solder , such that the chip stress is minimized and the solder fatigue is enhanced . the in - situ polyimide mold material makes up the majority portion of the composite underfill thickness . the polyimide screen printable material can be screened onto wafers with properly defined and registered cavities corresponding to the locations of the bond pads . in the process , the flux - containing underfill material is deposited on the substrate , or on the circuit board , prior to chip placement to a small thickness , i . e ., less than 15 μm . the flux - containing underfill layer makes up a small portion of the composite underfill thickness . during curing of the underfill layer , the solder bump needs only to penetrate a thin layer of the underfill layer . after the curing process , the flux - containing underfill adheres to the in - situ polyimide mold and the substrate , i . e ., the circuit board . moreover , the effective cte and elastic modulus of the composite underfill material , being proportional to the relative thickness of the two materials , are very close to that of the in - situ polyimide mold material , i . e ., matched closely to solder . [ 0058 ] fig8 illustrates the joining process for the present invention semiconductor chip 10 to a circuit board , or substrate 80 . it is seen that a thin underfill layer 82 is first disposed on a top surface 78 of the circuit board 80 prior to the joining process . the thin underfill layer contains a flux and has a thickness of less than 15 μm . the underfill layer 82 covers the bond pad , or the conductive pad 84 situated on the top surface 78 of the circuit board 80 . the semiconductor 10 with its pancake - shaped solder bump 30 exposed is then flipped over and positioned on top of the circuit board 80 with the solder bump 30 aligned to the conductive pad 84 . this is shown in fig8 . after the semiconductor chip 10 and the circuit board 80 are pressed together , as shown in fig9 a bond is formed between the top surface 24 of the polyimide in - situ mold layer 16 and the top surface 78 of the circuit board 80 . during the bonding process , the temperature of the chip / substrate assembly 100 is heated to a temperature above the melting temperature of the solder 30 . for instance , for a solder material that has an eutectic melting point of 183 ° c ., the assembly 100 is normally heated to a reflow temperature between about 200 ° c . and 230 ° c . as the reflow temperature is reached , the fluxing agent in the underfill layer 82 activates the solder 30 in the mold opening and pulls it toward the metalized pad 84 on the substrate 80 . the bond pad 84 has a large wetting diameter such that there is substantially no ball - up of the solder 30 . during the reflow process , the solder 30 only protrudes enough to penetrate through the thin underfill layer 82 to wet the substrate pad 84 . as a result , most of the solder 30 stays within the in - situ mold opening which in effect functions as the bulk of the underfill . the present invention composite underfill is achieved when the reflow temperature is approached and the thin underfill layer 82 is activated to adhesively bond to the in - situ mold layer 16 on the chip 10 and to the circuit board 78 . through this bonding , the underfill layer 82 and the mold layer 16 become an integral part . since the solder 30 stays within the mold opening , the solder mold 16 functions as a stress absorber between the cte &# 39 ; s of silicon 10 and the plastic laminate 80 . to achieve its functionality along with being an in - situ mold , the in - situ polyimide mold layer 16 must have a cte between that of solder and silicon . since the bulk of the solder 30 is within the in - situ mold layer 16 even after the direct chip attach process , the in - situ mold layer becomes the major component of the composite underfill , with the pre - disposed thin underfill layer 82 that was applied to the circuit board 80 before the attach being the minor component , as far as thickness is concerned . the present invention novel method therefore achieves several advantages over the conventional processes . first , the solder fatigue enhancing material can be deposited at wafer level , but still allow chip attach to a temporary carrier to burn - in and to be subsequently removed . this is possible due to the fact that the thin underfill material layer is only deposited on the ultimate , permanent carrier . secondly , the solder fatigue enhancing material becomes an integral part of the wafer level solder bumping process , rather than a time consuming , one - chip - at - a - time step at chip assembly . the present invention novel method provides a wafer that can be bumped using a low cost molten solder screening process and an in - situ polymeric mold material . the process involves scanning the wafer with an in - situ mold over an mss head . a single scan fills all the cavities in the mold with molten solder which is then allowed to cool and solidify . the process allows a single step for all chip interconnects to be filled on the wafer surface . the in - situ polymeric mold material has properties of cte and elastic modulus close to that of solder . the chips formed can then be diced and solder bumps are protected in subsequent handling by the in - situ mold material . the present invention novel method attaches chips to a circuit board by first applying a very thin layer of flux - containing underfill on the circuit board and then passes attached assembly through a temperature cycle which simultaneously attaches chip solder bumps to substrate conductive pads and cures the thin layer of underfill material to provide adhesion between the layer of underfill and both the in - situ mold surface and the circuit board surface . in the method , the thickness of the in - situ mold material is much greater than that of the thin layer of underfill material , such that the composite underfill material has essentially the same thermal - mechanical properties ( cte , elastic modulus , etc .) as the in - situ mold material . the present invention novel method provides chips that can be attached to a temporary substrate by placing onto substrate pads , passing through a temperature cycle to attach the chip solder bumps to the substrate conductive pads , but without any material between in - situ mold surface and substrate surface , so that there is no adhesion between the two . the assembly can then be burned - in and tested and then , if being electrically functional , be attached to a substrate by the present invention novel method of direct chip attach . the present invention novel method has been amply described in the above descriptions and in the appended drawings of fig1 ˜ 9 . while the present invention has been described in an illustrative manner , it should be understood that the terminology used is intended to be in a nature of words of description rather than of limitation . furthermore , while the present invention has been described in terms of a preferred embodiment , it is to be appreciated that those skilled in the art will readily apply these teachings to other possible variations of the inventions . the embodiment of the invention in which an exclusive property or privilege is claimed are defined as follows :