fig1 is a block diagram showing a structural example of a power - supply device 1 . the power - supply device 1 of the present structural example is a system power - supply ic ( e . g ., vehicle - mounted system power - supply ic ) which has : a power - supply circuit 10 that generates an output voltage vo1 from an input voltage vi ; a power - supply circuit 20 that generates an output voltage vo2 from the output voltage vo1 ; and a power - supply circuit 30 that generates an output voltage vo3 from the output voltage vo1 . the power - supply circuits 10 to 30 each are provided with enable terminals en1 to en3 and power good terminals pg1 to pg3 . besides , the power - supply circuits 20 and 30 are provided with startup sequence setting terminals seq2 and seq3 . these external terminals are described in detail later . besides , the power - supply device 1 is also provided with various protection circuits ( not shown ) such as a thermal shutdown circuit and the like . fig2 is a main - portion structural diagram of the power - supply circuits 10 to 30 . the power - supply circuit 10 includes : an output portion 11 ; a feedback voltage generation portion 12 ; a soft start voltage generation portion 13 ; an error amplifier 14 ; a slope voltage generation portion 15 ; a comparator 16 ; and a control portion 17 . the output portion 11 is a circuit block that steps up or steps down the input voltage vi to generate the output voltage vo1 by driving a switch device , and includes : a p channel type mos [ metal oxide semiconductor ] field effect transistor p 1 ( voltage stepping - down switch device ); an n channel type mos field effect transistor n 1 ( voltage stepping - up switch device ); a coil l ; diodes d 1 and d 2 ; and a capacitor c 1 . in the meantime , in a case where as the input voltage vi , an output voltage ( about 4 to 40 v ) from a vehicle battery is directly input , it is necessary to use a high breakdown - voltage device as a device that forms the output portion 11 . a source of the transistor p 1 is connected to an application terminal for the input voltage vi . a drain of the transistor p 1 is connected to a first terminal of the coil l and to a cathode of the diode d 1 . a gate of the transistor p 1 is connected to an application terminal for a pulse signal s11 . an anode of the diode d 1 is connected to a ground terminal . a second terminal of the coil l is connected to an anode of the diode d 2 and to a drain of the transistor n 1 . a source of the transistor n 1 is connected to the ground terminal . a gate of the transistor n 1 is connected to an application terminal for a pulse signal s12 . a cathode of the diode d 2 is connected to an application terminal for the output voltage vo1 and to a first terminal of the capacitor c 1 . a second terminal of the capacitor c 1 is connected to the ground terminal . the transistor p 1 is turned off when the pulse signal s11 is at a high level and turned on when the pulse signal s11 is at a low level . on the other hand , the transistor n 1 is turned on when the pulse signal s12 is at a high level and turned off when the pulse signal s12 is at a low level . the diode d 1 is equivalent to a first rectification device and also replaceable with a first synchronous rectification transistor that is turned on / off in a complementary manner ( exclusively ) with the transistor p 1 . besides , the diode d 2 is equivalent to a second rectification device and also replaceable with a second synchronous rectification transistor that is turned on / off in a complementary manner ( exclusively ) with the transistor n 1 . in the meantime , the term “ complementary ( exclusive )” used in the present specification covers a case where an output transistor and a synchronous rectification transistor are completely reverse to each other in on / off state and also a case where a predetermined delay is given to on / off transition timing of both transistors from a viewpoint of preventing a through - current ( case where a simultaneous turning - on prevention duration for both transistors is provided ). the feedback voltage generation portion 12 is a resistor division circuit that generates a feedback voltage vfb ( divided voltage of the output voltage vo1 ) in accordance with the output voltage vo1 , and includes resistors r 1 and r 2 connected in series between the application terminal for the output voltage vo1 and the ground terminal . the feedback voltage vfb is output from a connection node between the resistor r 1 and the resistor r 2 . after a startup of the power - supply circuit 10 , the soft start voltage generation portion 13 generates a soft start voltage vss that gradually rises . a structure and operation of the soft start voltage generation portion 13 are described in detail later . the error amplifier 14 generates an error voltage verr in accordance with a difference between a lower one of the reference voltage vref and the soft start voltage vss respectively applied to two non - inverting input terminals (+) and the feedback voltage vfb applied to an inverting input terminal (−). in the meantime , the error amplifier 14 is structured to keep the error voltage verr at a lower limit value until the difference between the soft start voltage vss and the feedback voltage vfb becomes larger than a predetermined input offset value vofs in a soft start duration ( vss & lt ; vref ) disposed immediately after the startup of the power - supply circuit 10 . by employing such structure , after the startup of the power - supply circuit 10 , a pulse signal s10 described later is kept at a low level ; accordingly , it becomes possible to prevent unusual outputs ( unintentional impulse output of the output voltage vo1 and the like ) at the startup time . the slope voltage generation portion 15 generates a serrate or triangular slope voltage vslp . in the meantime , a lower limit value of the slope voltage vslp is set higher than the lower limit value of the error voltage verr , and an upper limit value of the slope voltage vslp is set lower than an upper limit value of the error voltage verr . the comparator 16 compares the error voltage verr applied to a non - inverting input terminal (+) and the slope voltage vslp applied to an inverting input terminal (−) with each other to generate a pulse signal s10 . the pulse signal s10 goes to a high level when the error voltage verr is larger than the slope voltage vslp , and goes to a low level when the error voltage verr is lower than the slope voltage vslp . accordingly , the higher the error voltage verr is , the larger a duty ( percentage of a high level duration to one period ) of the pulse signal s10 becomes , and reversely , the lower the error voltage verr is , the smaller the duty becomes ( see fig3 ). based on the pulse signal s10 , the control portion 17 generates pulse signals s11 and s12 for turning on / off the transistors p 1 and n 1 . in the meantime , the control portion 17 may be structured to generate the pulse signals s11 and s12 to synchronously turn on / off the transistors p 1 and n 1 irrespective of a magnitude relationship between the input voltage vi and the output voltage vo1 , or may be structured to generate the pulse signal s11 and s12 such that if the input voltage vi is lower than the output voltage vo1 , a voltage step - up mode comes into effect in which the transistor p 1 is normally kept in the on - state and only the transistor n 1 is turned on / off ; and if the input voltage vi is lower than the output voltage vo1 , a voltage step - down mode comes into effect in which the transistor n 1 is normally kept in the off - state and only the transistor p 1 is turned on / off . besides , the control portion 17 has also a function to forcibly stop the generation operation of the output voltage vo1 in accordance with a shutdown signal sdn . the shutdown signal sdn goes to a high level at a shutdown time of the power - supply device 1 and goes to a low level at a shutdown elimination time of the power - supply device 1 . in the meantime , in the power - supply circuit 10 of the present structural example , the output portion 11 is of voltage step - up / down type , but the form of the output portion 11 is not limited to this , but may be of voltage step - up type or voltage step - down type . the power - supply circuit 20 includes : a regulator portion 21 ; a comparator 22 ; a pulse signal detection portion 23 ; and an and gate 24 . the regulator portion 21 is a circuit block that generates the output voltage vo2 from the output voltage vo1 , and the generation operation of the output voltage vo2 is controlled in accordance with an output permission signal s23 from the and gate 24 . besides , the regulator portion 21 has also a function to forcibly stop the generation operation of the output voltage vo2 in accordance with the shutdown signal sdn . in the meantime , the input voltage vi ( 4 to 40 v ) is not directly applied to the regulator portion 21 ; accordingly , as a device that forms the regulator portion 21 , it is sufficient to use an intermediate breakdown - voltage device or a low breakdown - voltage device that are able to endure the application of the output voltage vo1 . the comparator 22 compares the output voltage vo applied to a non - inverting input terminal (+) and a threshold value voltage vth1 applied to an inverting input terminal (−) with each other to generate a reduced voltage detection signal s21 . the reduced voltage detection signal s21 goes to a high level when the output voltage vo1 is higher than the threshold value voltage vth1 , and goes to a low level when the output voltage vo1 is lower than the threshold value voltage vth1 . the pulse signal detection portion 23 detects the pulse signal s11 for driving the transistor p 1 to generate a pulse detection signal s22 . the pulse detection signal s22 is triggered by a falling edge ( or rising edge ) of the pulse signal s11 to be latched at a high level . besides , the pulse detection signal s22 is triggered by a rising edge of the shutdown signal sdn to be latched at a low level . in other words , the pulse detection signal s22 goes to the high level when the generation operation of the output voltage vo1 is started in the power - supply circuit 10 , and goes to the low level when the power - supply device 1 is shut down . in the meantime , in the present structural example , the pulse signal s11 is targeted for monitoring , but it is also possible to target the pulse signal s10 and the pulse signal s12 for monitoring . as the pulse signal detection portion 23 , an sr flip - flop and the like may be used . the and gate 24 generates an output permission signal s23 by performing logical product calculation of the reduced voltage detection signal s21 and the pulse detection signal s22 . the output permission signal s23 goes to a high level ( logical level at an output permission time ) when both the reduced voltage detection signal s21 and the pulse detection signal s22 are at the high level , and goes to a low level ( logical level at an output prohibition time ) when at least one of the reduced voltage detection signal s21 and the pulse detection signal s22 is at the low level . next , the significance of providing the pulse signal detection portion 23 is described comparing and referring to fig4 and fig5 . first , referring to fig4 , the vo2 startup operation in a case where the power - supply circuit 20 is not provided with the pulse signal detection portion 23 is described as a comparative example . fig4 is a time chart showing a first example ( with no switching standby ) of the vo2 startup operation in the power - supply circuit 20 , and , in order from top , illustrates : the shutdown signal sdn ; the output voltage vo1 ; the output voltage vo2 ; various voltages ( the soft start voltage vss , the reference voltage vref , and the feedback voltage vfb ) of the power - supply circuit 10 ; the pulse signal s11 ; and the reduced voltage detection signal s21 . if unusual temperature , sudden power - supply shutdown or the like of the power - supply device 1 is detected and the shutdown signal sdn is raised to the high level at a time point t11 , the generation operation of both the output voltages vo1 and vo2 is forcibly stopped . at this time , the output voltage vo2 supplied to loads such as a microcomputer and the like is discharged relatively rapidly as long as power supply routes from the power - supply circuit 20 to the loads are not shut down . on the other hand , the output voltage vo1 supplied to only the power - supply circuits 20 and 30 loses its discharge route because of the forcible stop of the power - supply circuits 20 and 30 ; accordingly , the output voltage vo1 goes to a state to be substantially kept at a voltage level before the shutdown . therefore , the reduced voltage detection signal s21 of the power - supply circuit 20 is kept at the high level even after the power - supply circuit 10 is forcibly shut down . besides , at the time point t11 , the soft start voltage vss of the power - supply circuit 10 is reset to a lower limit value ( 0 v ), but the feedback voltage vfb goes to a state to be kept at the substantially same value as the reference voltage vref . thereafter , if the unusual state of the power - supply device 1 is eliminated and the shutdown signal sdn is dropped to the low level at a time point t12 , a soft start operation for generation resumption of the output voltage vo1 is started in the power - supply circuit 10 . but the feedback voltage vfb is higher than the soft start voltage vss at the time point t12 ; accordingly , the pulse signal s11 goes to a state to be kept at the high level ( state where the generation operation of the output voltage vo1 is not actually resumed ). on the other hand , if the shutdown signal sdn is dropped to the low level at the time point t12 , the power - supply circuit 20 , responding to that the reduced voltage detection signal s21 is kept at the high level , resumes the generation operation of the output voltage vo2 . but as described above , at this time point , the generation operation of the output voltage vo1 by the power - supply circuit 10 is not actually resumed ; accordingly , the output voltage vo1 rapidly declines and goes to a state to become lower than the threshold value voltage vth1 at a time point t13 . as a result of this , the reduced voltage detection signal s21 falls to the low level ; therefore , the generation operation of the output voltage vo2 is stopped in the power - supply circuit 20 and the output voltage vo2 begins to decline again . in the meantime , because of the stop of the power - supply circuit 20 , the discharge route for the output voltage vo1 is lost again ; accordingly , the output voltage vo1 goes to a state to be kept at a voltage value slightly lower than the threshold value voltage vth1 . thereafter , at a time point t14 , if the soft start voltage vss of the power - supply circuit 10 becomes larger than the feedback voltage vfb , pulse driving by the pulse signal s11 is started , and the generation operation of the output voltage vo1 by the output portion 11 is started . the output voltage vo1 , upon beginning to rise at the time point t14 , becomes larger than the threshold value voltage vth1 at the substantially same time point , and further reaches a predetermined target value at a time point t15 . besides , if the output voltage vo1 becomes larger than the threshold value voltage vth1 at the time point t14 , the reduced voltage detection signal s21 of the power - supply circuit 20 is raised to the high level and the generation operation of the output voltage vo2 is resumed . as described above , in the case where the power - supply circuit 20 is not provided with the pulse signal detection portion 23 , the unnecessary start / stop ( time points t12 to t13 ) occur in the generation operation of the output voltage vo2 ; accordingly , there is a risk that the microcomputer and the like could malfunction . hi the meantime , as one of approaches to solve such problem , there is a structure in which a discharge transistor for the output voltage vo1 is provided . but , in a case where the structure is employed , the discharge duration of the output voltage vo1 depends on the capacity value of the capacitor c 1 and the discharge capability of the discharge transistor ; accordingly , to rapidly discharge the output voltage vo1 , it is necessary to use a high breakdown - voltage discharge transistor that has a large size ; therefore , there is another problem that the number of pins and the mount area rise to incur cost increase . next , referring to fig5 , the vo2 startup operation in a case where the power - supply circuit 20 is provided with the pulse signal detection portion 23 is described . fig5 is a time chart showing a second example ( with switching standby ) of the vo2 startup operation in the power - supply circuit 20 , and , in order from top , illustrates : the shutdown signal sdn ; the output voltage vo1 ; the output voltage vo2 ; various voltages ( the soft start voltage vss , the reference voltage vref , and the feedback voltage vfb ) of the power - supply circuit 10 ; the pulse signal s11 ; the reduced voltage detection signal s21 ; the pulse detection signal s22 ; and the output permission signal s23 . like in fig4 , if the shutdown signal sdn is raised to the high level at the time point t11 , the generation operations of both the output voltages vo1 and vo2 are forcibly stopped . at this time , the output voltage vo2 is discharged relatively rapidly and the output voltage vo1 goes to the state to be substantially kept at the voltage level before the shutdown , which is as described above . in the meantime , at the time point t11 , the reduced voltage detection signal s21 is kept at the high level , but the pulse detection signal s22 is reset to the low level ; accordingly , the output permission signal s23 also goes to the low level . thereafter , if the shutdown signal sdn is dropped to the low level at the time point t12 , a soft start operation for the generation resumption of the output voltage vo1 is started in the power - supply circuit 10 . but , the feedback voltage vfb is higher than the soft start voltage vss at the time point t12 ; accordingly , the pulse signal s11 goes to the state to be kept at the high level ( state where the generation operation of the output voltage vo1 is not actually resumed ). this point is as described above . on the other hand , when the shutdown signal sdn is dropped to the low level at the time point t12 , in the power - supply circuit 20 , responding to that the output voltage vo1 is larger than the threshold value voltage vth1 , the reduced voltage detection signal s21 is kept at the high level , while responding to that the pulse driving by the pulse signal s11 is not started , the pulse detection signal s22 is kept at the low level . therefore , the output permission signal s23 is kept at the low level , and the generation operation of the output voltage vo2 is not resumed but waited . thereafter , at a time point t14 ′, if the soft start voltage vss of the power - supply circuit 10 becomes larger than the feedback voltage vfb , the pulse driving by the pulse signal s11 is started , and the generation operation of the output voltage vo1 by the output portion 11 is started . as a result of this , the output voltage vo1 begins to rise at the time point t14 ′ and reaches a predetermined target value at the time point t15 . besides , if the pulse driving by the pulse signal s11 is started at the time point t14 ′, the pulse detection signal s22 of the power - supply circuit 20 is raised to the high level ; accordingly , the output permission signal s23 also is raised to the high level , and the generation operation of the output voltage vo2 is resumed . in the meantime , a duration , which is required from the time the shutdown signal sdn is dropped to the low level to the time the output voltage vo1 reaches the predetermined target value , becomes constant irrespective of whether the power - supply circuit 20 is provided with the pulse signal detection portion 23 or not . as described above , the power - supply circuit 20 is structured to monitor whether the output voltage vo1 is larger the threshold value voltage vth1 or not , to monitor whether the generation operation of the output voltage vo1 is started in the power - supply circuit 10 or not , and to wait until the generation operation of the output voltage vo1 is started in the power - supply circuit 10 without starting the generation operation of the output voltage vo2 even if the output voltage vo1 is larger than the threshold value voltage vth1 . by employing such structure , it is possible to eliminate the start / stop ( see the time points t12 to t13 of fig4 ) unnecessary for the generation operation of the output voltage vo2 ; accordingly , it becomes possible to raise the stability and reliability of the system . besides , the discharge transistor for the output voltage vo1 becomes unnecessary ; therefore , it also becomes possible to achieve cost reduction by reducing the number of pins and the mount area . in the meantime , the structure of the power - supply circuit 30 is basically the same structure as the power - supply circuit 20 , and the reference numbers “ 20 ” to “ 24 ”, “ vo2 ”, and “ s21 ” to “ s23 ” in the above description are respectively replaced with “ 30 ” to “ 34 ”, “ vo3 ”, and “ s31 ” to “ s33 ” to sufficiently understand . fig6 is a main - portion structural diagram showing an example of application to a turning on / off circuit 40 . the power - supply device 1 of the present modification has : the power - supply circuit 10 that generates the output voltage vo1 from the input voltage vi and supplies the output voltage vo1 to an anode of a light emitting diode led ; a switch . sw ( n channel type mos field effect transistor ) that performs connection / disconnection between a cathode of the light emitting diode led and a ground terminal ; and the turning on / off circuit 40 that controls the switch sw to turn on / off a driving current iled for the light emitting diode led . the power - supply circuit 10 is the same as that of fig2 . besides , of a switch control portion 41 , a comparator 42 , a pulse signal detection portion 43 and an and gate 44 that are included in the turning on / off circuit 40 , the components other than the switch control portion 41 are the same as the comparator 22 , the pulse signal detection portion 23 and the and gate 24 of fig2 . the switch control portion 41 is a circuit block that generates a driving signal for the switch sw , and driving of the switch sw is controlled in accordance with an output permission signal s43 from the and gate 44 . besides , the switch control portion 41 has also a function to forcibly turn off the switch sw in accordance with the shutdown signal sdn . next , the significance of providing the pulse signal detection portion 43 is described comparing and referring to fig7 and fig8 . first , referring to fig7 , the iled startup operation in a case where the turning on / off circuit 40 is not provided with the pulse signal detection portion 43 is described as a comparative example . fig7 is a time chart showing a first example ( with no switching standby ) of the iled startup operation in the turning on / off circuit 40 , and , in order from top , illustrates : the shutdown signal sdn ; the output voltage vo1 ; the driving current iled ; various voltages ( the soft start voltage vss , the reference voltage vref , and the feedback voltage vfb ) of the power - supply circuit 10 ; the pulse signal s11 ; and the reduced voltage detection signal s41 . if unusual temperature , sudden power - supply shutdown or the like of the power - supply device 1 are detected and the shutdown signal sdn is raised to the high level at a time point t21 , the generation operation of the output voltage vo1 is forcibly stopped , the switch sw is forcibly turned off , and the supply of the driving current iled is stopped . at this time , the output voltage vo1 supplied to the anode of the light emitting diode led loses its discharge route because of the forcible turning - off of the switch sw ; accordingly , the output voltage vo1 goes to a state to be substantially kept at a voltage level before the shutdown , therefore , the reduced voltage detection signal s41 of the turning on / off circuit 40 is kept at the high level even after the power - supply circuit 10 is forcibly stopped . besides , at the time point t21 , the soft start voltage vss of the power - supply circuit 10 is reset to the lower limit value ( 0 v ), but the feedback voltage vfb goes to a state to be kept at the substantially same value as the reference voltage vref . thereafter , if the unusual state of the power - supply device 1 is eliminated and the shutdown signal sdn is dropped to the low level at a time point t22 , a soft start operation for generation resumption of the output voltage vo1 is started in the power - supply circuit 10 . but , the feedback voltage vfb is higher than the soft start voltage vss at the time point t22 ; accordingly , the pulse signal s11 goes to a state to be kept at the high level ( state where the generation operation of the output voltage vo1 is not actually resumed ). on the other hand , if the shutdown signal sdn is dropped to the low level at the time point t22 , the turning on / off circuit 40 , responding to that the reduced voltage detection signal s41 is kept at the high level , turns on the switch sw to start the supply of the driving current iled to the light emitting diode led . but , as described above , at this time point , the generation operation of the output voltage vo1 by the power - supply circuit 10 is not actually resumed , accordingly , the output voltage vo1 rapidly declines and goes to a state to become lower than the threshold value voltage vth1 at a time point t23 . as a result of this , the reduced voltage detection signal . s41 falls to the low level ; therefore , the switch sw is turned off in the turning on / off circuit 40 and the supply of the driving current iled is stopped again . in the meantime , because of the turning - off of the switch sw , the discharge route for the output voltage vo1 is lost again ; accordingly , the output voltage vo1 goes to a state to be kept at a voltage value slightly lower than the threshold value voltage vth1 . thereafter , at a time point t24 , if the soft start voltage vss of the power - supply circuit 10 becomes larger than the feedback voltage vth , the pulse driving by the pulse signal s11 is started , and the generation operation of the output voltage vo1 by the output portion 11 is started . the output voltage vo1 , upon beginning to rise at the time point t24 , becomes larger than the threshold value voltage vth1 at the substantially same time point , and further reaches a predetermined target value at a time point t25 . besides , if the output voltage vo1 becomes larger than the threshold value voltage vth1 at the time point t24 , the reduced voltage detection signal s41 of the turning on / off circuit 40 is raised to the high level and the switch sw is turned on . as described above , in the case where the turning on / off circuit 40 is not provided with the pulse signal detection portion 43 , the unnecessary start / stop ( time points t12 to t13 ) occur in the supply operation of the driving current iled ; accordingly , there is a risk that the light emitting diode led could be erroneously turned on to be recognized as a flicker . in the meantime , as one of approaches to solve such problem , as described above , there is a structure in which a discharge transistor for the output voltage vo1 is provided . but , in a case where the structure is employed , the discharge duration of the output voltage vo1 depends on the capacity value of the capacitor c 1 and the discharge capability of the discharge transistor ; accordingly , to rapidly discharge the output voltage vo1 , it is necessary to use a high breakdown - voltage discharge transistor that has a large size ; therefore , there is another problem that the number of pins and the mount area rise to incur cost increase . next , referring to fig8 , the iled startup operation in a case where the turning on / off circuit 40 is provided with the pulse signal detection portion 43 is described . fig8 is a time chart showing a second example ( with switching standby ) of the iled startup operation in the turning on / off circuit 40 , and in order from top , illustrates : the shutdown signal sdn ; the output voltage vo1 ; the driving current iled ; various voltages ( the soft start voltage vss , the reference voltage vref , and the feedback voltage vfb ) of the power - supply circuit 10 ; the pulse signal s11 ; the reduced voltage detection signal s41 ; the pulse detection signal s42 ; and the output permission signal s43 . like in fig7 , if the shutdown signal sdn is raised to the high level at the time point t21 , the generation operation of the output voltage vo1 is forcibly stopped , the switch sw is forcibly turned off and the supply of the driving current iled to the light emitting diode led is stopped . at this time , the output voltage vo1 is substantially kept at the voltage level before the shutdown , which is as described above . in the meantime , at the time point t21 , the reduced voltage detection signal s41 is kept at the high level , but the pulse detection signal s42 is reset to the low level ; accordingly , the output permission signal s43 also goes to the low level . thereafter , if the shutdown signal sdn is dropped to the low level at the time point t22 , a soft start operation for the generation resumption of the output voltage vo1 is started in the power - supply circuit 10 . but , the feedback voltage vfb is higher than the soft start voltage vss at the time point t22 ; accordingly , the pulse signal s11 goes to the state to be kept at the high level ( state where the generation operation of the output voltage vo1 is not actually resumed ). this point is as described above . on the other hand , when the shutdown signal sdn is dropped to the low level at the time point t22 , in the turning on / off circuit 40 , responding to that the output voltage vo1 is larger than the threshold value voltage vth1 , the reduced voltage detection signal s41 is kept at the high level , while responding to that the pulse driving by the pulse signal s11 is not started , the pulse detection signal s42 is kept at the low level . therefore , the output permission signal s43 is kept at the low level ; accordingly , the switch sw is kept at the off - state . thereafter , at a time point t24 ′, if the soft start voltage vss of the power - supply circuit 10 becomes larger than the feedback voltage vfb , the pulse driving by the pulse signal s11 is started , and the generation operation of the output voltage vo1 by the output portion 11 is started . as a result of this , the output voltage vo1 begins to rise from the time point t24 ′ and reaches a predetermined target value at a time point t25 . besides , if the pulse driving by the pulse signal s11 is started at the time point t24 ′, the pulse detection signal s42 of the turning on / off circuit 40 is raised to the high level ; accordingly , the output permission signal s43 also is raised to the high level , and the switch sw is turned on . as a result of this , the driving current iled is supplied to the light emitting diode led and the light emitting diode led is turned on . in the meantime , a duration , which is required from the time the shutdown signal sdn is dropped to the low level to the time the output voltage vo1 reaches the predetermined target value , becomes constant irrespective of whether the turning on / off circuit 40 is provided with the pulse signal detection portion 43 or not . as described above , the turning on / off circuit 40 is structured to monitor whether the output voltage vo1 is larger the threshold value voltage vth1 or not , to monitor whether the generation operation of the output voltage vo1 is started in the power - supply circuit 10 or not , and to wait until the generation operation of the output voltage vo1 is started in the power - supply circuit 10 without turning on the driving current iled even if the output voltage vo1 is larger than the threshold value voltage vth1 . by employing such structure , it is possible to eliminate the start / stop ( see the time points t22 to t23 of fig7 ) unnecessary for the supply operation of the driving current iled ; accordingly , it becomes possible to eliminate the erroneous turning - on of the light emitting diode led . besides , the discharge transistor for the output voltage vo1 becomes unnecessary ; therefore , it also becomes possible to achieve cost reduction by reducing the number of pins and the mount area . fig9 is a main - portion structural diagram ( especially , a structural portion for arbitrarily setting a startup sequence procedure ) of the power - supply circuits 20 and 30 . the power - supply circuits 20 and 30 of the present structural example each include : regulator portions 21 and 31 ; enable terminals en2 and en3 ; startup sequence setting terminals seq2 and seq3 ; electric current sources 25 and 35 ; n channel type mos field effect transistors 26 and 36 ; and n channel type mos field effect transistors 27 and 37 . the regulator portion 21 generates the output voltage vo2 from the output voltage vo1 . the enable terminal en2 is an external terminal to which a startup permission signal for the regulator portion 21 is input . the regulator portion 21 goes to a startup permission state when the enable terminal en2 is at a high level , and goes to a startup prohibition state when the enable terminal en2 is at a low level . the startup sequence setting terminal . seq2 is an external terminal that is used to output a startup completion signal from the regulator portion 21 as a startup permission signal for the power - supply circuit 30 . the startup sequence setting terminal seq2 is kept at a low level until the startup of the regulator portion 21 is completed , and latched at a high level when the startup of the regulator portion 21 is completed . the electric current source 25 is an active device that pulls up the enable terminal en2 by running a minute current ( about 10 μa ) from a power - supply terminal to the enable terminal en2 . the transistor 26 is a discharge transistor that performs connection / disconnection between the enable terminal en2 and the ground terminal in accordance with the shutdown signal sdn . the transistor 26 is turned on when the shutdown signal sdn is at the high level , and turned off when the shutdown signal sdn is at the low level . the transistor 27 is an open drain transistor that performs connection / disconnection between the startup sequence setting terminal seq2 and the ground terminal in accordance with the startup completion signal from the regulator portion 21 . the transistor 27 is kept at an on - state until the startup of the regulator portion 21 is completed , and turned off when the startup of the regulator portion 21 is completed . in the meantime , the structure of the power - supply circuit 30 is basically the same structure as the power - supply circuit 20 , and the reference numbers “ 20 ”, “ 21 ”, “ 25 ” to “ 27 ”, “ 30 ”, “ vo2 ”, “ en2 ” and “ seq2 in the above description are respectively replaced with “ 30 ”, “ 31 ”, “ 35 ” to “ 37 ”, “ 20 ”, “ vo3 ”, “ en3 ” and “ seq3 ” to sufficiently understand . fig1 is a diagram showing a relationship between a pin connection state and a startup sequence . as shown in this figure , in a case where the power - supply circuit 30 is started up after the power - supply circuit 20 is started up , the startup sequence setting terminal seq2 and the enable terminal en3 are connected to each other . by performing such pin connection , it becomes possible to achieve a startup sequence comprising a series of operations as follows : when the enable terminal en2 is raised to the high level , the output voltage vo2 begins to rise ; and when the output voltage vo2 reaches a threshold value voltage vth2 , the startup sequence terminal seq2 goes to the high level ; further , the enable terminal . en3 goes to the high level , and the output voltage vo3 begins to rise . on the other hand , reversely to the above description , in a case where the power - supply circuit 20 is started up after the power - supply circuit 30 is started up , the startup sequence setting terminal seq3 and the enable terminal en2 are connected to each other . by performing such pin connection , it becomes possible to achieve a startup sequence comprising a series of operations as follows : when the enable terminal en3 is raised to the high level , the output voltage vo3 begins to rise ; and when the output voltage vo3 reaches a threshold value voltage vth3 , the startup sequence terminal seq3 goes to the high level ; further , the enable terminal en2 goes to the high level , and the output voltage vo2 begins to rise . as described above , in the second embodiment , between the power - supply circuit 20 and the power - supply circuit 30 , the special terminals ( startup sequence setting terminals seq2 and seq3 ) for outputting the startup completion signal from one to the other are disposed . by employing such structure , it becomes possible for a user to achieve an arbitrary startup sequence by only connecting the startup sequence setting terminal seq2 and the enable terminal en3 to each other , or connecting the startup sequence setting terminal seq3 and the enable terminal en2 to each other . therefore , it becomes possible to raise universality of the power - supply device 1 compared with a custom ic in which the startup sequence is fixed . besides , it also becomes possible to achieve reductions in the mount area and cost compared with a structure in which the startup procedure is changed by using discrete components such as a resistor , a capacitor and the like . in the meantime , it is sufficient for each of the transistors 27 and 37 to have an electric current capability for pulling out the minute current generated by the electric current sources 35 and 25 ; accordingly , unlike a structure in which an arbitrary pull - up resistor is externally connected , it becomes possible to design its device size ( electric current capability ) to have the smallest possible size . besides , as shown in fig1 described above , the power - supply circuits 20 and 30 each are provided with power good terminals pg2 and pg3 that output a power good signal , which imparts whether the output operations of the regulator portions 21 and 31 are usual or not , to outside of the power - supply device 1 . by employing such structure , by using a microcomputer and the like disposed outside the power - supply device 1 , it becomes possible to monitor the operation state of the power - supply device 1 . in the meantime , it is also possible to perform the above startup sequence setting by using the power good terminals pg2 and pg3 , but there are many cases where the voltage level suitable to be input to the enable terminals en2 and en3 and the voltage level suitable to be input to the microcomputer are not equal to each other ; accordingly , it is impossible to easily use the power good terminals pg2 and pg3 for that purpose . besides , unlike the power good terminals pg2 and pg3 , the startup sequence setting terminals seq2 and seq3 are not universal terminals for outputting a signal to the outside of the power - supply device 1 ; accordingly , there is only slight constraint on the pin arrangement . therefore , for example , it is possible to perform an arbitrary pin arrangement by adjacently disposing the enable terminals en2 and en3 and the startup sequence setting terminals seq2 and seq3 . fig1 is a circuit diagram showing a structural example of the soft start voltage generation portion 13 . the soft start voltage generation portion 13 of the present structural example includes : a capacitor 131 ; a charge current generation portion 132 ; a discharge switch 133 ; and a pulse signal detection portion 134 . the capacitor 131 is connected between the application , terminal for the soft start voltage vss and the ground terminal , and a charge voltage appearing at one terminal of the capacitor 131 is output as the soft start voltage vss . the charge current generation portion 132 is a circuit block that generates a charge current ichg for the capacitor 131 , and includes : electric current sources 132 a and 132 b ; and a switch 132 c . the electric current source 132 a is connected to one terminal of the capacitor 131 , generates an electric current ia and supplies it to the capacitor 131 . the electric current source 132 b is connected to the one terminal of the capacitor 131 via the switch 132 c , generates an electric current ib and supplies it to the capacitor 131 . the switch 132 c is connected between the capacitor 131 and the electric current source 132 b , is turned on when a boost signal bst is at a low level , and turned off when the boost signal bst is at a high level . in other words , the switch 132 c performs switching to output , as the charge current ichg for the capacitor 131 , a summed current of the electric current ia and the electric current ib or to output the electric current ia only . in the meantime , like the above pulse detection signals s22 and s32 , the above boost signal bst is a signal that rises to the high level at a time the pulse driving by the pulse signal s11 is started . therefore , it is sayable that the above charge current generation portion 131 has a structure which boosts the charge current ichg to an electric value (= ia + ib ) that is increased from a usual value (= ia ) before detection of the pulse signal s11 and returns the charge current ichg to the usual value (= ia ) after the detection of the pulse signal s11 . the discharge switch 133 is connected between the application terminal for the soft start voltage vss and the ground terminal , is turned on when the shutdown signal sdn is raised to the high level , and discharges electric charges stored in the capacitor 131 . the pulse signal detection portion 134 detects the pulse signal s11 for driving the transistor p 1 to generate the boost signal bst ( which corresponds to the above pulse detection signals s22 and s32 ). the boost signal bst is triggered by a falling edge ( or rising edge ) of the pulse signal s11 to be latched at the high level . besides , the boost signal bst is triggered by a rising edge of the shutdown signal sdn to be latched at the low level . in other words , the boost signal bst goes to the high level when the generation operation of the output voltage vo1 is started in the power - supply circuit 10 , and goes to the low level when the power - supply device 1 is shut down . in the meantime , in the present structural example , the pulse signal s11 is targeted for monitoring , but it is also possible to target the pulse signals s10 and s12 for monitoring . as the pulse signal detection portion 134 , an sr flip - flop and the like may be used . next , the significance of performing the boost operation of the soft start voltage vss is described comparing and referring to fig1 and fig1 . first , referring to fig1 , the soft start operation with no boost ( case where the soft start voltage generation portion 13 is not provided with the electric current source 132 b , the switch 132 c , and the pulse signal detection portion 134 ) is described as a comparative example . fig1 is a time chart showing a first example ( with no boost ) of the soft start operation , and in order from top , illustrates : the shutdown signal sdn ; various voltages ( the soft start voltage vss , the reference voltage vref , and the feedback voltage vfb ) of the power - supply circuit 10 ; and the pulse signal s11 . at a time point t31 , if the shutdown signal sdn is dropped to the low level , the discharge switch 133 is turned off and a charge by the electric current ichg (= ia ) to the capacitor 131 is started ; accordingly , the soft start voltage vss begins to rise gradually . but , at this time point , a difference between the soft start voltage vss and the feedback voltage vfb is lower than an input offset value vofs of the error amplifier 14 ; therefore , the pulse driving by the pulse signal s11 is still stopped and the feedback voltage vfb is kept at the lower limit value ( 0 v ). at a time point t32 , if the difference between the soft start voltage vss and the feedback voltage vfb becomes larger than the input offset value vofs of the error amplifier 14 , the pulse driving by the pulse signal s11 is started and the feedback voltage vfb begins to rise gradually . thereafter , the soft start voltage vss keeps rising to become larger than the reference voltage vref at a time point t33 . accordingly , output feedback control is performed until the time point t33 such that the soft start voltage vss and the feedback voltage vfb become equal to each other , and after the time point t33 , the output feedback control is performed such that the reference voltage vref and the feedback voltage vfb become equal to each other . as described above , according to the structure in which the pulse driving by the pulse signal s11 is kept stopped until the difference between the soft start voltage vss and the feedback voltage vtb becomes larger than the input offset value vofs of the error amplifier 14 , it is possible to prevent an unusual output ( unintentional impulse output of the output voltage vo1 and the like ) at the startup time . but , in a case where the above structure is employed , there is a problem that the soft start duration becomes long unnecessarily . in the meantime , if the electric current value of the charge current ichg (= ia ) is set larger , it is possible to shorten the soft start duration by raising the soft start voltage vss more rapidly , but if the electric current value of the charge current ichg is set too large , there is a risk that an effect of alleviating a rush current and an output overshoot could be impaired . besides , if the input offset value vofs of the error amplifier 14 is set smaller , it is possible to shorten the soft start duration by starting the pulse driving by the pulse signal s11 at an earlier timing , but if the input offset value vofs is set too small , there is a risk that an unusual output prevention effect at the startup time could be impaired . besides , for example , in a case where a comparator for confirming the soft start voltage vss is reset to the lower limit value ( 0 v ) at the shutdown time of the power - supply device 1 is disposed , it is necessary to set a threshold voltage of the comparator to a value lower than the input offset value vofs of the error amplifier 14 . because of this , if the above input offset value vofs is set too small , it is necessary to set the threshold voltage of the above comparator to be near 0 v ; accordingly , there is a problem that noise resistance deteriorates . next , referring to fig1 , the soft start operation with a boost is described . fig1 is a time chart showing a second example ( with a boost ) of the soft start operation , and in order from top , illustrates : the shutdown signal sdn ; the boost signal bst ; various voltages ( the soft start voltage vss , the reference voltage vref , and the feedback voltage vfb ) of the power - supply circuit 10 ; and the pulse signal s11 . at a time point t41 , if the shutdown signal sdn is dropped to the low level , the discharge switch 133 is turned off and a charge by the electric current ichg to the capacitor 131 is started . but , at this time point , a difference between the soft start voltage vss and the feedback voltage vfb is lower than the input offset value vofs of the error amplifier 14 ; accordingly , the pulse driving by the pulse signal s11 is still stopped and the feedback voltage vfb is kept at the lower limit value ( 0 v ). besides , at the time point t41 , the pulse driving by the pulse signal s11 is kept stopped ; accordingly , the boost signal bst is kept at the low level , and the switch 132 c is in the on - state . therefore , a summed current (= ia + ib ) of the electric currents ia and ib is output as the charge current ichg for the charge capacitor 131 from the charge current generation portion 132 ; therefore , the soft start voltage vss begins to rise sharply at a first inclination . at a time point t42 , if the difference between the soft start voltage vss and the feedback voltage vfb becomes larger than the input offset value vofs of the error amplifier 14 , the pulse driving by the pulse signal s11 is started ; accordingly , the feedback voltage vfb begins to rise . besides , at the time point t42 , because the pulse driving by the pulse signal s11 is started , the boost signal bst is raised to the high level and the switch 132 c is turned off . accordingly , after the time point t42 , the charge current generation portion 132 goes to a state to output the electric current ia only as the charge current ichg for the capacitor 131 . in other words , the boost operation of the soft start voltage vss is terminated at the time the pulse driving by the pulse signal s11 is detected ; after the time point t42 , the soft start voltage vss goes to a state to keep rising at a second inclination that is more gradual than the first inclination . thereafter , the soft start voltage vss keeps rising gradually to become larger than the reference voltage vref at a time point t43 . accordingly , the output feedback control is performed until the time point t43 such that the soft start voltage vss and the feedback voltage vfb become equal to each other , and after the time point t43 , the output feedback control is performed such that the reference voltage vref and the feedback voltage vfb become equal to each other . as described above , the soft start voltage generation portion 13 is structured to raise the soft start voltage vss at the first inclination before the detection of the pulse signal s11 , and to raise the soft start voltage vss at the second inclination more gradual than the first inclination after the detection of the pulse signal s11 . in other words , the soft start voltage generation portion 13 is structured to raise the soft start voltage vss more sharply than usual from the time the power - supply circuit 10 is started up to the time the generation operation of the output voltage vo1 by the output portion 11 is started . according to such structure , it becomes possible to shorten the soft start duration without impairing the effect of alleviating a rush current and an output overshoot . besides , according to the above structure , it becomes easy to set large the input offset value vofs of the error amplifier ; accordingly , it becomes possible to raise more the unusual output prevention effect at the startup time . besides , in a case where a comparator for confirming the soft start voltage vss is reset to the lower limit value ( 0 v ) at the shutdown time of the power - supply device 1 is disposed , it becomes possible to set a higher threshold voltage of the comparator ; accordingly , it becomes possible to improve the noise resistance . fig1 is a block diagram showing a structural example of a vehicle - mounted device that incorporates the power - supply device . a vehicle - mounted device x 10 of the present structural example has the power - supply device 1 and a microcomputer 2 . the power - supply device 1 is the system power - supply ic of fig1 , converts the input voltage vi supplied from a battery x 20 into the output voltages vo2 and vo3 and supplies them to the microcomputer 2 . the microcomputer 2 receives the output voltages vo2 and vo3 supplied from the power - supply device 1 to operate and controls comprehensively operation of the vehicle - mounted device x 10 . besides , the microcomputer 2 is provided with a function to monitor the startup completion signals pg1 to pg3 from the power - supply device 1 . in the meantime , the output voltage vo2 is supplied to an i / o [ input / output ] block of the microcomputer 2 , while the output voltage vo3 is supplied to a core block of the microcomputer 2 . fig1 is an appearance view showing a structural example of a vehicle that incorporates the vehicle - mounted device . a vehicle x of the present structural example incorporates vehicle - mounted devices x 11 to x 17 and a battery ( see battery x 20 in fig1 ) that supplies electric power to these vehicle - mounted devices x 11 to x 17 . the vehicle - mounted device x 11 is an engine control unit that performs control ( injection control , electronic throttle control , idling control , oxygen sensor heater control , auto cruise control and the like ) related to an engine . the vehicle - mounted device x 12 is a lamp control unit that performs turning on / off control of a hid [ high intensity discharged lamp ], a drl [ daytime running lamp ] and the like . the vehicle - mounted device x 13 is a transmission control unit that performs control related to transmission . the vehicle - mounted device x 14 is a body control unit that performs control ( abs [ anti - lock brake system ] control , eps [ electric power steering ] control , electronic suspension control and the like ) related to movement of the vehicle x . the vehicle - mounted device x 15 is a security control unit that performs driving control of a door lock , a security alarm and the like . the vehicle - mounted device x 16 is an electronic device that is built in the vehicle x on the factory shipment stage as a standard product or a maker option product such as a wiper , an electric door mirror , a power window , an electric sunroof , an electric seat , an air conditioner and the like . the vehicle - mounted device x 17 is an electronic device such as a vehicle a / v [ audio / visual ] device , a car navigation system , an etc [ electronic toll collection system ] and the like that is mounted on the vehicle x in accordance with a user &# 39 ; s option . in the meantime , the above vehicle - mounted device x 17 is an example of the vehicle - mounted device x 10 shown in fig1 , and the power - supply device 1 described above is buildable in any of the vehicle - mounted devices x 11 to x 17 . hereinafter , the various inventions disclosed in the present specification are summed up . the power - supply device disclosed in the present specification has the structure ( the 1 - 1 structure ) which has a first power - supply circuit that generates a first output voltage from an input voltage ; and a second power - supply circuit that generates a second output voltage from the first output voltage , wherein the second power - supply circuit monitors whether the first output voltage is larger than a first threshold value voltage or not , monitors whether a generation operation of the first output voltage is started in the first power - supply circuit or not , and waits until the generation operation of the first output voltage is started in the first power - supply circuit without starting a generation operation of the second output voltage even if the first output voltage is larger than the first threshold value voltage . in the meantime , the power - supply device having the above 1 - 1 structure may have the structure ( the 1 - 2 structure ), in which the first power - supply circuit includes an output portion that drives a switch device to generate the first output voltage from the input voltage ; and the second power - supply circuit includes a pulse signal detection portion that detects a pulse signal for driving the switch device . besides , the power - supply device having the above 1 - 2 structure may have the structure ( the 1 - 3 structure ), in which the first power - supply circuit includes : a feedback voltage generation portion that generates a feedback voltage in accordance with the first output voltage ; a soft start voltage generation portion that generates a soft start voltage which rises gradually after a startup ; an error amplifier that generates an error voltage in accordance with a difference between a lower one of a predetermined reference voltage and the soft start voltage and the feedback voltage ; a slope voltage generation portion that generates a serrate or triangular slope voltage ; and a pulse signal generation portion that generates the pulse signal in accordance with a comparison result between the error voltage and the slope voltage . besides , the power - supply device having any one of the above 1 - 1 to 1 - 3 structures may have the structure ( the 1 - 4 structure ) which further has a third power - supply circuit that generates a third output voltage from the first output voltage . besides , the power - supply device having the above 1 - 4 structure may have the structure ( the 1 - 5 structure ), in which the second power - supply circuit and the third power - supply supply circuit each include : a regulator portion ; a first terminal to which a startup permission signal for the regular portion is input ; and a second terminal that is used when an startup completion signal from the regulator portion is output as a startup permission signal for another power - supply circuit . besides , the power - supply device having the above 1 - 5 structure may have the structure ( the 1 - 6 structure ), in which the second power - supply circuit and the third power - supply circuit each include : an electric current source that pulls up the first terminal ; and an open drain transistor that performs connection / disconnection between the second terminal and a ground terminal . besides , the power - supply device having the above 1 - 6 structure may have the structure ( the 1 - 7 structure ), in which the second power - supply circuit and the third power - supply circuit each include : a discharge transistor that performs connection / disconnection between the first terminal and the ground terminal . besides , the power - supply device having any one of the above 1 - 5 to 1 - 7 structures may have the structure ( the 1 - 8 structure ), in which the second power - supply circuit and the third power - supply circuit each include : a third terminal , that outputs a power good signal , which indicates whether an output operation of the regulator portion is usual or not , to outside of the power - supply device . besides , the vehicle - mounted device disclosed in the present specification has the structure ( the 1 - 9 structure ) which has : the power - supply device having any one of the above 1 - to 1 - 8 structures ; and a microcomputer that receives an output voltage from the power - supply device to operate . besides , the vehicle disclosed in the present specification has the structure ( the 1 - 10 structure ) which has : the vehicle - mounted having the above 1 - 9 structure ; and a . battery that supplies electric power to the vehicle - mounted device . besides , the power - supply device disclosed in the present specification has the structure ( the 1 - 11 structure ) which has a power - supply circuit that generates an output voltage from an input voltage and supplies the output voltage to a light emitting diode ; and a turning on / off circuit that turns on / off a driving current for the light emitting diode , wherein the turning on / off circuit monitors whether the output voltage is larger than a predetermined threshold value voltage or not , monitors a generation operation of the output voltage is started in the power - supply circuit or not , and waits until the generation operation of the output voltage is started in the power - supply circuit without turning on the driving current even if the output voltage is larger than the threshold value voltage . in the meantime , the power - supply device having the above 1 - 11 structure may have the structure ( the 1 - 12 structure ), in which the power - supply circuit includes an output portion that drives a switch device to generate the output voltage from the input voltage ; and the turning on / off circuit includes a pulse signal detection portion that detects a pulse signal for driving the switch device . besides , the power - supply device having the above 1 - 12 structure may have the structure ( the 1 - 13 structure ), in which the power - supply circuit includes : a feedback voltage generation portion that generates a feedback voltage in accordance with the output voltage ; a soft start voltage generation portion that generates a soft start voltage which rises gradually after a startup ; an error amplifier that generates an error voltage in accordance with a difference between a lower one of a predetermined reference voltage and the soft start voltage and the feedback voltage ; a slope voltage generation portion that generates a serrate or triangular slope voltage ; and a pulse signal generation portion that generates the pulse signal in accordance with a comparison result between the error voltage and the slope voltage . besides , the power - supply device disclosed in the present specification has the structure ( the 2 - 1 structure ) which has : an output portion that drives a switch device to generate the output voltage from the input voltage ; a feedback voltage generation portion that generates a feedback voltage in accordance with the output voltage ; a soft start voltage generation portion that generates a soft start voltage which rises gradually after a startup ; an error amplifier that generates an error voltage in accordance with a difference between a lower one of a predetermined reference voltage and the soft start voltage and the feedback voltage ; a slope voltage generation portion that generates a serrate or triangular slope voltage ; and a pulse signal generation portion that generates the pulse signal for driving the switch device in accordance with a comparison result between the error voltage and the slope voltage , wherein the soft start voltage generation portion includes a pulse signal detection portion that detects the pulse signal ; the soft start voltage is raised at a first inclination before detection of the pulse signal ; and the soft start voltage is raised at a second inclination more gradual than the first inclination after the detection of the pulse signal . in the meantime , the power - supply device having the above 2 - 1 structure may have the structure ( the 2 - 2 structure ), in which the error amplifier keeps the error voltage at a lower limit value until a difference between the soft start voltage and the feedback voltage becomes larger than a predetermined input offset value . besides , the power - supply device having the above 2 - 2 structure may have the structure ( the 2 - 3 structure ), in which a lower limit value of the slope voltage is higher than the lower limit value of the error voltage . besides , the power - supply device having the above 2 - 3 structure may have the structure ( the 2 - 4 structure ), in which the soft start voltage generation portion includes : a capacitor whose charge voltage is output as the soft start voltage ; a charge current generation portion that generates a charge current for the capacitor ; and a discharge switch that discharges the capacitor , wherein the charge current generation portion makes the charge current larger than a usual value before detection of the pulse signal , and returns the charge current to the usual value after the detection of the pulse signal . besides , the power - supply device having the 2 - 4 structure may have the structure ( the 2 - 5 structure ), in which the charge current generation portion includes : a first current source that generates a first current ; a second current source that generates a second current ; and a switch that performs switching whether the second current is to be added to the first current in accordance with a detection result from the pulse signal detection portion or not , wherein a summed current of the first current and the second current is output as the charge current before detection of the pulse signal , and the first current only is output as the charge current after the detection of the pulse signal . besides , the vehicle - mounted device disclosed in the present specification has the structure ( the 2 - 6 structure ) which has : the power - supply device having any one of the above 2 - 1 to 2 - 5 structures ; and a microcomputer that receives an output voltage from the power - supply device to operate . besides , the vehicle disclosed in the present specification has the structure ( the 2 - 10 structure ) which has : the vehicle - mounted device having the above 2 - 6 structure ; and a battery that supplies electric power to the vehicle - mounted device . in the meantime , in the above embodiments , the structures which applies the present invention to the vehicle - mounted system power - supply ic are described as examples , but the application target of the present invention is not limited to these , and the present invention is also widely applicable to power - supply devices that are used for other applications . besides , in the above first to third embodiments , all the structures may be applied at the same time or only a necessary structure may be applied independently . for example , in a power - supply device that includes a single power - supply circuit , the above third embodiment only is also applicable . besides , the various technological features disclosed in the present specification , besides the above embodiments , are variously modifiable without departing from the spirit of the technological creation . for example , mutual replacement between the bipolar transistor and the mos field effect transistor and logical level inversions of the various signals are arbitrary . in other words , it should be understood that the above embodiments are examples in all respects and not limiting , and the technological scope of the present invention is not indicated by the above description of the embodiments but by the claims , and all modifications within the scope of the claims and meaning equivalent to the claims are covered . the present invention is applicable , for example , to a vehicle - mounted system power - supply ic . but the application target of the present invention is not limited to this , and the present invention is also widely applicable to power - supply devices that are used for other applications . 26 , 27 , 36 , 37 n channel type mos field effect transistors