although the principles of the invention are particularly well - suited for wireless communications systems based on the well - known is 2000 or cdma 2000 standards , and will be described in this exemplary context , it should be noted that the embodiments shown and described herein are meant to be illustrative only and not limiting in any way . for example , the present invention is also applicable to the well - known high speed downlink packet access ( hsdpa ) specification in the universal mobile telecommunication system ( umts ) standard . as such , various modifications will be apparent to those skilled in the art for application to other transmission systems and are contemplated by the teachings herein . in accordance with the method and apparatus of the present invention , a dtx threshold is set based on the data rate of a channel ( e . g ., traffic channel ) in order to improve reliability of dtx detection . in this way , a dtx threshold may be optimized for each individual data rate and radio configuration of the channel . [ 0023 ] fig1 is a simplified block diagram of a receiver incorporating a dtx detector in accordance with the present invention . in this embodiment , the method and apparatus is described from the aspect of the reverse link , i . e ., dtx frame detection is performed at a base station receiver . however , the method and apparatus described herein are applicable to the forward link ( e . g ., dtx frame detection at a mobile station receiver ). accordingly , in fig1 receiver 10 may be a receiver in a base station of a cellular communication system , for example . the receiver 10 includes a base station modem ( bsm ) chip level processing stage 12 , which may include finger front end pseudo - noise ( pn ) processing . after the pn code is removed from each finger ( e . g ., each signal component ) of a signal that is transmitted over a channel or link . the received signal contains one or more frames , where “ frame ” refers to a data frame that is carrying data over the channel between a transmitter and receiver ). the received signal is processed by a symbol level processor 14 . in an embodiment , this could may be implemented as a digital signal processor ( dsp ) or alternately as an asic . the dsp 14 converts the symbols into data bits . the data bits are then output to a decoder 16 , which in an illustrative code division multiple access ( cdma ) system , performs speech ( e . g ., viterbi ) or data decoding . the dsp 14 also calculates one or more metrics used for identifying dtx frames . the metrics may be embodied as a measured traffic energy of the channel value or symbol error rate ( ser ) value of the transmitting channel , for example , it being understood that the metric could be any other measurable or calculated parameter of the transmitting channel . a metric is calculated for every frame received over a channel . the metrics are output to a microprocessor 18 . additionally , dsp 14 determines the data rate for each channel that is transmitting data frames . a “ best data rate ” for a particular channel is to be utilized in setting a dtx threshold for that particular channel , based on a determined best data rate . for example , the dsp 14 utilizes an algorithm to determine the best data rate for a given channel based on the conditions of the transmitting channel as compared to stored parameters ( e . g ., predetermined data rates ) that are known for that particular channel . in the specific case of the cdma - 2000 standard , for example , the data rate of the channel is known by receiver 10 before the channel is assigned , and is maintained for the duration of the transmission . the base station updates the receiver 10 before a change of data rate is performed . in this way , the dsp 14 does not have to estimate the data rate after decoding . the present invention is not limited to the above method of determining a best data rate ; a blind rate detection method may be performed in the case where the data rate is not signaled ahead of time by the base station . dsp 14 may be constructed with an asic ( application specific integrated circuit ) that contains , for example , a general purpose r3000a mips risc core , with sufficient on - chip instruction cache and data cache memory . furthermore , dsp 14 may integrate system peripherals such as interrupt , timer , and memory controllers on - chip , including rom , sdram , dma controllers ; a packet processor , crypto - logic , pci compliant pc port , and parallel inputs and outputs , for example . microprocessor 18 , which may also be embodied as part of an asic , or as a singular microprocessor chip , sets a threshold based on the best data rate received from dsp 14 for a traffic channel . for example , dtx thresholds may be calculated for a number of different data rates in advance , and stored in a suitable storage media such as a look - up table ( lut ) 19 of a non - volatile memory 20 operatively connected to dsp 14 and / or microprocessor 18 , as is known ( see dotted - line in fig1 ). once a best data rate is known and received from dsp 14 , microprocessor 18 may reference lut 19 to determine which dtx threshold for a predetermined data rate is closest to the actual data rate received from dsp 14 for that traffic channel . accordingly , the selected dtx threshold is compared against the metric calculated at dsp 14 to determine whether or not a data frame corresponding to that metric is a dtx frame , or a frame that was transmitted with error ( e . g ., an erasure ). alternatively , microprocessor 18 may contain a particular algorithm or separate asic which performs the threshold calculation based on the data rate . for example , the algorithm may provide the flexibility to read the value of the dtx threshold from an external register ( e . g ., lut 19 ) that is set in a call - by - call basis by a software application / asic running the algorithm , depending on the data rate . alternatively , the dtx thresholds may be estimated through link level simulation results or through field measurements . the implementation shown in fig1 may include storage media operatively connected to , or embodied within each of the processors 12 , 14 and 18 . the memory 20 may be embodied as rom , ram , sdrram or other non - volatile memory device , and may store parameters that are part of a register or lut which is accessible by one or more of the processors . further , multiple memories may be dispensed with altogether or consolidated within a singular memory device . [ 0030 ] fig2 is a flow chart illustrating a method in accordance with an exemplary embodiment of the invention . referring now to fig2 each finger ( component ) of the received signal together with a corresponding calculated metric ( e . g ., traffic energy metric or symbol error rate ( ser ) metric for that channel ) are sent from bsm chip level processing stage 12 to dsp 14 ( step s 210 ). dsp 14 calculates the best data rate of the channel transmitting the data frames in a step s 220 . for example , the best data rate may be determined via blind rate detection method . in a blind detection method , all data rate hypothesis are tried , and the data rate of the best metric is the winner . alternatively , the best data rate may be known before the channel is assigned , as is the case in cdma - 2000 for a shared control channel ( sch ) and downlink control channel ( dcch ). the calculated data rate is used by dsp 14 to set a dtx threshold ( step s 230 ) based on the computed data rate in step s 230 . in an alternative embodiment , microprocessor 18 may determine the threshold based on the computed data received form dsp 14 , or an asic may be provided for determining the dtx threshold based on a best data rate input to the asic from dsp 14 or microprocessor 18 . dsp 14 compares ( step s 240 ) the metric for each frame received from a transmitting channel against the dtx threshold determined from the best data rate of that channel and sends a result to microprocessor 18 . if the metric value is greater than or equal to (≧) the dtx threshold ( e . g ., the output of step s 240 is no ), dsp 14 determines that a bad frame has been transmitted , and outputs status ( erasure ) ( step s 250 ) to microprocessor 18 . however , if the metric is less than (& lt ;) the dtx threshold ( e . g ., the output of step s 240 is yes ) a dtx frame is declared as the status ( step s 260 ). accordingly , discrimination as to whether a transmitted frame is a dtx frame , or simply an erasure ( bad frame transmitted with error ), is determined with greater accuracy , since each individual data rate is associated with a unique dtx threshold . the method and apparatus of the invention provide greater dtx reliability by making a dtx threshold dependent on data rate of a traffic channel , so that a condition required to declare a frame as a dtx frame is more restrictive . in this way , the value of the dtx threshold is optimized separately for each data rate . the invention is applicable to both forward and reverse links , and benefit both base station and mobile station performance . the invention being thus described , it will be obvious that the same may be varied in many ways , for example , the logical blocks in fig1 and 2 may be implemented in hardware and / or software . the hardware / software implementations may include a combination of processor ( s ) and article ( s ) of manufacture . the article ( s ) of manufacture may further include storage media , computer - readable media having code portions thereon that are read by a processor to perform the method , and executable computer program ( s ). the executable computer program ( s ) may include instructions to perform the described operations and the method . the computer executable ( s ) may also be provided as part of externally supplied propagated signals . such variations are not to be regarded as a departure and scope of the invention , and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims .