embodiments of the present invention will be explained below in detail with reference to the accompanying drawings . note that the invention is not limited thereto . a display device according to a first embodiment of the present invention shown in fig1 is an active matrix display device . the display device includes a pixel array unit 2 , a data line driver dd , a scanning line driver sd , and a controller cnt synchronized with the data line drier dd and the scanning line driver sd . although fig1 shows only one display pixel pix , the pixel array unit 2 actually includes a plurality of display pixels pixs arranged two - dimensionally in a matrix . each display pixel pix includes a light emitting element 21 constituted by an oled , a drive transistor tdrv , two switching elements tems 1 and tems 2 , a reset transistor trst , a vt detection transistor tdet , a bias transistor tbias , a capacitor cap , and a scanning transistor tscan . the light emitting element 21 , the first switching element tems 1 , and the drive transistor tdrv are connected in series between a first power supply vdd and a second power supply vss and constitute a current path . a current carried on this current path causes the light emitting element 21 to emit light . the drive transistor tdrv is an n - type tft ( thin film transistor ) at least a channel part of which is formed out of amorphous silicon . the drive transistor tdrv controls the current carried on the current path between the first power supply vdd and the second power supply vss . the drive transistor tdrv can thereby drive the light emitting element 21 to emit light at a desired brightness and a desired gradation based on potential data received from the data line driver dd . it is assumed that a drain - side node of the drive transistor tdrv is n 1 , a source - side node thereof is n 2 , and that a gate - side node thereof is n 3 . an anode of the light emitting element 21 is connected to the first power supply vdd and a cathode thereof is connected to a drain of the first switching element tems 1 . a source of the first switching element tems 1 is connected to the node n 1 . namely , the first switching element tems 1 is connected between the light emitting element 21 and a drain of the drive transistor tdrv . the vt detection transistor tdet is connected between the node n 1 and a gate of the bias transistor tbias and used to detect a threshold voltage of the drive transistor tdrv . a gate of the vt detection transistor tdet is connected to a first scanning line lscan [ n ], where n is an integer . the bias transistor tbias is connected between a second scanning line lscan [ n + 1 ] and the node n 3 . the bias transistor tbias is connected to the node n 1 if the vt detection transistor tdet is conductive , and transmits a potential of the second scanning line lscan [ n + 1 ] to the node n 3 according to a potential of the node n 1 . the reset transistor trst is connected between the node n 1 and a third power supply vref . a gate of the reset transistor trst is connected to a reset line driver rd . a reset line lrst is connected to the gate of the reset transistor trst from the reset line driver rd . the reset line driver rd controls the reset transistor trst via the reset line lrst . the third power supply vref has a higher potential than at least a threshold voltage of the bias transistor tbias . the first and second scanning lines lscan [ n ] and lscan [ n + 1 ] are connected to the scanning line driver sd , and each of the first and second scanning lines lscan [ n ] and lscan [ n + 1 ] is provided to correspond to each of pixel rows of the pixel array unit 2 . if the corresponding pixel row is to be driven , a potential of each of the first and second scanning lines lscan [ n ] and lscan [ n + 1 ] is raised to a positive potential ( e . g ., + 10 volts ( v )). in a standby state where the corresponding pixel row is not driven , the potential of each of the first and second scanning lines lscan [ n ] and lscan [ n + 1 ] is kept to a negative potential ( e . g ., − 10 v ). the first and second scanning lines lscan [ n ] and lscan [ n + 1 ] are selected ( activated ) in order of lscan [ n ] and lscan [ n + 1 ]. note that “ activation ” means turning on or driving an element or a circuit and that “ deactivation ” means turning off or stopping an element or a circuit . accordingly , a high ( high level potential ) signal is an activation signal on one occasion and a low ( low level potential ) signal is an activation signal on another occasion . for example , an nmos transistor is activated by making a gate thereof high . a pmos transistor is activated by making a gate thereof low . a first electrode and a second electrode of the capacitor cap are connected to the node n 3 and a node n 4 , respectively . namely , the capacitor cap interposes between the gate ( n 3 ) and the source ( n 2 ) of the drive transistor tdrv . the second switching element tems 2 is connected between the nodes n 4 and n 2 . namely , the second switching element tems 2 is connected between the electrode on one end of the capacitor cap and the source of the drive transistor tdrv . the scanning transistor tscan is connected between the node n 4 and a data line ldata propagating data . the capacitor cap applies a potential difference between the gate ( n 3 ) and the source ( n 2 ) of the drive transistor tdrv if the light emitting element 21 is driven to emit light . the data line ldata is connected to the data line driver dd and provided to correspond to each of pixel columns of the pixel array unit 2 . the data line ldata transmits potential data for driving the light emitting element 21 to emit light at the desired brightness and the desired gradation to the corresponding pixel column . gates of the vt detection transistor tdet and the scanning transistor tscan are connected to the first scanning line lscan [ n ] selecting the display pixel pix including the vt detection transistor tdet and the scanning transistor tscan in common . accordingly , the vt detection transistor tdet and the scanning transistor tscan operate at the same timing . the first and second switching elements tems 1 and tems 2 are controlled by a signal vems propagated on a switching line lems . the signal vems is a signal activated if a current is applied to the light emitting element 21 to drive the light emitting element 21 to emit light . namely , the first and second switching elements tems 1 and tems 2 are switches that turn conductive when the light emitting element 21 emits light at the voltage held in the capacitor cap . with the configuration mentioned above , the display device according to the first embodiment applies a negative potential of the second scanning line lscan [ n + 1 ] to the gate of the drive transistor tdrv before the potential difference for driving the light emitting element 21 to emit light is held in the capacitor cap . it is thereby possible to return a shifted threshold voltage of the drive transistor tdrv to an original threshold voltage vth . while fig1 shows only the first and second scanning lines lscan [ n ] and lscan [ n + 1 ], the number of scanning lines can be larger than two . further , while fig1 shows only one data line ldata , the number of data lines can be larger than one . with reference to fig2 , an operation performed by the display device according to the first embodiment will be described . fig2 shows only the operation performed by one display pixel pix . since operations performed by the other display pixels pixs can be easily estimated from fig2 , they are not described herein . before t 10 , the scanning line driver sd selects a scanning line lscan [ n − 1 ]. this is a state where the pixel row corresponding to the scanning line lscan [ n − 1 ] is selected . a potential vdata of the data line ldata is vn − 1 and pixels pixs corresponding to the scanning line lscan [ n − 1 ] emit light based on the potential data vn − 1 . at this time , the first and second scanning lines lscan [ n ] and lscan [ n + 1 ] have a low level potential (− 10 v ). in the first embodiment , a high level potential of the scanning lines is set to + 10 v . however , the potentials of the scanning lines are not limited thereto . nevertheless , the low level potential of the scanning lines needs to be the negative potential to recover the threshold voltage vth of the drive transistor tdrv . at t 10 , the scanning line driver sd deactivates the potential vems [ n ] of the switching line lems [ n ] to the low level potential . the first and second switching elements tems 1 and tems 2 are thereby turned off , and a frame selected just previously ( before t 10 ) finishes its light emitting operation . right after t 10 , the reset driver sd activates the potential vrst of the reset line lrst to the high level potential . right after the activation , the scanning line driver sd raises the potential of the first scanning line lscan [ n ]. as a result , the third power supply potential vref is applied to the gate of the bias transistor tbias via the reset transistor trst and the vt detection transistor vdet . a potential of the node n 1 is set to the third power supply potential vref . the bias transistor tbias turns conductive to thereby apply the potential of the second scanning line lscan [ n + 1 ] to be selected next to the currently selected first scanning line lscan [ n ] to the gate of the drive transistor tdrv . that is , the second scanning line lscan [ n + 1 ] in a negative potential state is connected to the gate ( node n 3 ) of the drive transistor tdrv . as a result , a negative bias is applied to the gate of the drive transistor tdrv and the threshold voltage of the drive transistor tdrv is returned to the original threshold voltage vth . in this way , by applying the negative bias to the gate of the drive transistor tdrv , the threshold voltage of the drive transistor tdrv falling when the light emitting element 21 is previously driven can be raised up to near the original threshold voltage vth . at t 12 , the reset driver sd reduces the potential vrst of the reset line lrst to the low level potential , thereby disconnecting the node n 1 from the third power supply potential vref . thereafter , during a period from t 12 to t 13 , the scanning line driver sd raises the potential vscan [ n + 1 ] of the second scanning line lscan [ n + 1 ]. the potential of the node n 3 thereby rises to the high level potential according to the rising of the potential vscan [ n + 1 ]. however , if the potential difference between the nodes n 3 and n 2 exceeds the threshold voltage vth of the drive transistor tdrv , the drive transistor tdrv turns conductive . accordingly , the node n 1 is connected to the second power supply potential vss and a gate potential of the bias transistor tbias is set to the second power supply potential vss via the vt detection transistor vdet . the bias transistor tbias thereby turns nonconductive , so that the potential of the node n 3 ( potential of the first electrode of the capacitor cap ) is set to the threshold voltage vth of the drive transistor tdrv . since the threshold voltage vth of the drive transistor tdrv is already recovered during a period from t 11 to t 12 , the potential of the node n 3 is set to the original threshold voltage vth of the drive transistor tdrv . note that the high level potential of the second scanning line lscan [ n + 1 ] needs to be higher than the threshold voltage vth of the drive transistor tdrv . at t 13 , the scanning line driver sd reduces the potential vscan [ n ] of the first scanning line lscan [ n ]. by the falling of the potential vscan [ n ], the vt detection transistor tdet and the scanning transistor tscan turn nonconductive . accordingly , the node n 4 is kept in a state where a desired potential vn is to the potential of the node n 4 . the desired potential vn is potential data for driving the light emitting element 21 of the currently selected pixels pixs to emit light at the desired brightness and the desired gradation . the potential vn − 1 is potential data applied to the pixels pixs connected to the scanning line lscan [ n − 1 ] selected prior to the scanning line lscan [ n ]. a potential vn + 1 is potential data applied to the pixels pixs connected to the scanning line lscan [ n + 1 ] selected next to the scanning line lscan [ n ]. the potential of the first electrode of the capacitor cap ( potential of the node n 3 ) is kept vn and the potential of the second electrode ( potential of the node n 4 ) is kept vth . namely , the potential difference held in the capacitor cap is ( vth - vn ). the potential ( vth - vn ) held in the capacitor cap is used to drive the light emitting element 21 to emit light . right after t 13 , the data line driver dd changes the potential vdata of the data line ldata from the desired potential vn to the next potential vn + 1 . as can be seen , according to the first embodiment , the second scanning line lscan [ n + 1 ] selected next to the currently selected first scanning line lscan [ n ] is used . while the potential of the second scanning line lscan [ n + 1 ] is the low level potential ( negative bias ), this negative bias is applied to the gate of the drive transistor tdrv , thereby recovering the original threshold voltage vth of the drive transistor tdrv . when the potential of the second scanning line lscan [ n + 1 ] rises to the high level potential next time , the threshold voltage vth of the drive transistor tdrv is detected . thereafter , at t 14 , the scanning line driver sd raises a potential of the signal vems to the high level potential to thereby turn on the first and second switching elements tems 1 and tems 2 . the node n 4 is thereby connected to the node n 2 and the potential difference between the gate and the source of the drive transistor tdrv ( potential difference between the nodes n 2 and n 3 ) becomes equal to ( vth + vn ). further , the light emitting element 21 is connected to the drain of the drive transistor tdrv . the drive transistor tdrv thereby applies a current based on the potential ( vth + vn ) to the light emitting element 21 . the light emitting element 21 emits light at the brightness and the gradation based on this current applied thereto . according to the first embodiment , the negative bias of the second scanning line lscan [ n + 1 ] can be applied to the gate of the drive transistor tdrv . the display device according to the first embodiment can thereby return the shifted threshold voltage of the drive transistor tdrv to the original threshold voltage ( threshold voltage before shift ) vth . moreover , according to the first embodiment , during transition of the potential of the second scanning line lscan [ n + 1 ] from the low level potential to the high level potential , the threshold voltage vth of the drive transistor tdrv is set to the first electrode of the capacitor ( node n 3 ) using the potential rising of the second scanning line lscan [ n + 1 ]. at this time , the desired data potential vn is set to the second electrode of the capacitor cap ( node n 4 ). as can be understood , according to the first embodiment , the threshold voltage vth of the drive transistor tdrv can be recovered , a drain voltage of the drive transistor tdrv can be reset , and the threshold voltage vth of the drive transistor tdrv can be quickly set to one end of the capacitor cap using the scanning line lscan [ n + 1 ] selected after the currently selected scanning line lscan [ n ]. by applying the first embodiment to the active matrix display device , it is possible to realize a display device capable of maintaining stable display quality for long time and suitable for a large - sized , high - definition display . the power supply potential vref for resetting the potential vems can be replaced by the first power supply potential vdd . in a display device according to a second embodiment of the present invention shown in fig3 , a bias line and reset line driver brd controls the reset transistor trst and the negative bias is applied to the node n 3 without using the second scanning line lscan [ n + 1 ] selected next to the first scanning line lscan [ n ]. the reset line lrst is connected from the bias line and reset line driver brd to the gate of the reset transistor trst . the bias line and reset line driver brd controls the reset transistor trst via the reset line lrst . the bias line lbias is connected from the bias line and reset line driver brd to a drain of the bias transistor tbias . the bias line and reset line driver brd applies the negative bias to the node n 3 via the bias line lbias or controls a potential of the bias line lbias so as to raise the potential of the node n 3 up to the threshold voltage vth of the drive transistor tdrv . the other configurations of the display device according to the second embodiment are similar to those of the display device according to the first embodiment . with reference to fig4 , an operation performed by the display device according to the second embodiment will be described . before t 20 , the scanning line driver sd selects the scanning line lscan [ n − 1 ]. at t 20 , the scanning line driver sd deactivates the potential vems [ n ] of the switching line lems [ n ] to the low level potential . right after the deactivation , the bias line and reset line driver bsd raises the potential vrst of the reset line lrst to the high level potential . at t 21 , the scanning line driver sd raises the potential of the first scanning line lscan [ n ]. the third power supply potential vref is thereby applied to the gate of the bias transistor tbias via the reset transistor trst and the vt detection transistor tdet . the bias transistor tbias turns conductive to apply the potential vbias of the bias line lbias to the gate of the drive transistor tdrv . at this time , the bias line and reset line driver bsd outputs the negative bias as the bias potential vbias . as a result , the threshold voltage of the drive transistor tdrv is returned to the original threshold voltage vth . at t 22 , the bias line and reset line driver bsd reduces the potential vrst of the reset line lrst to the low level potential , thereby disconnecting the node n 1 from the third power supply potential vref . thereafter , during a period from t 22 to t 23 , the bias line and reset line driver bsd raises the potential vbias of the bias line lbias to a higher potential than the threshold voltage vth of the drive transistor tdrv . the potential of the node n 3 is thereby set to the threshold voltage vth of the drive transistor tdrv . since the threshold voltage vth of the drive transistor tdrv is already recovered during a period from t 21 to t 22 , the potential of the node n 3 is set to the original threshold voltage vth of the drive transistor tdrv . at t 23 , the scanning line driver sd reduces the potential vscan [ n ] of the first scanning line lscan [ n ]. the potential vn of the data line ldata at this time is set to the node n 4 . thereafter , at t 24 , the scanning line driver sd raises the potential vems of the switching line lems . the drive transistor tdrv thereby applies a current based on the potential difference ( vth + vn ) between the first and second electrodes of the capacitor cap to the light emitting element 21 . as a result , the light emitting element 21 emits light at a desired brightness and at a desired gradation . since the more detailed light emitting operation performed by the light emitting element 21 is similar to that according to the first embodiment , it will not be described herein . according to the second embodiment , the bias line and reset line driver bsd controls the potential of the reset line lrst and that of the bias line lbias without using the scanning lines lscan [ n + 1 ] selected after the currently selected first scanning line lscan [ n ]. therefore , according to the second embodiment , rising / falling timing of the reset potential and that of the bias potential can be arbitrarily set despite need to additionally provide the bias line and reset line driver bsd . accordingly , the second embodiment can attain the advantages of the first embodiment . moreover , the second embodiment can attain the advantages of recovering the threshold voltage vth of the drive transistor tdrv , resetting the drain voltage of the drive transistor tdrv , and quickly setting the threshold voltage vth of the drive transistor tdrv to one end of the capacitor cap similarly to the first embodiment . the third power supply potential vref for resetting the potential vems can be replaced by the first power supply potential vdd . in the first and second embodiments , the display element is the oled . however , the display element according to the present invention is not limited to the oled but an arbitrary current - driven light emitting element the luminous brightness of which changes according to a current value such as a charge - injection inorganic el element or a charge - injection electrochemical light emitting element can be used as the display element . additional advantages and modifications will readily occur to those skilled in the art . therefore , the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein . accordingly , various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents .