the disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like reference numerals indicate similar elements . it should be noted that references to “ an ” or “ one ” embodiment in this disclosure are not necessarily to the same embodiment , and such references mean “ at least one .” the reference “ a plurality of ” means “ at least two .” the figure shows an embodiment of a fan test device 10 of the present disclosure . the fan test device 10 can comprise a first connector j 1 , a second connector j 2 , a first electronic switch q 1 , a second electronic switch q 2 , a control chip u 1 , a resistor r 1 , a resistor r 2 , a diode d 1 , a diode d 2 , an alarm module 20 , a first power terminal v , a fuse fs 1 , and a fuse fs 2 . as illustrated , a first terminal of the first electronic switch q 1 can be connected to a control pin rc 5 of the control chip u 1 . a power pin 1 of the first connector j 1 is connected to a second terminal of the first electronic switch q 1 . a third terminal of the first electronic switch q 1 is connected to a cathode of the diode d 1 . an anode of the diode d 1 is coupled to the power pin 1 of the first connector j 1 through the fuse fs 1 . a signal pin 2 of the first connector j 1 is coupled to a signal pin tach 1 of the control chip u 1 through the resistor r 1 . a sensing pin 3 of the first connector j 1 is connected to a sensing pin sense 1 of the control chip u 1 . a ground pin 4 of the first connector j 1 is grounded . a first terminal of the second electronic switch q 2 is connected to a control pin rc 4 of the control chip u 1 . a power pin 1 of the second connector j 2 is connected to a second terminal of the second electronic switch q 2 . a third terminal of the second electronic switch q 2 is connected to the first power terminal v . the third terminal of the second electronic switch q 2 is also connected to a cathode of the diode d 2 . an anode of the diode d 2 is coupled to the power pin 1 of the connector j 2 through the fuse fs 2 . a signal pin 2 of the second connector j 2 is coupled to a signal pin tach 2 of the control chip through the resistor r 2 . a sensing pin 3 of the second connector j 2 is connected to a sensing pin sense 2 of the control chip u 1 . a ground pin 4 of the second connector j 2 is grounded . the fuse fs 1 and the fuse fs 2 are used to prevent damage from excess current . when the first connector j 1 is connected to a motherboard and the second connector j 2 is connected to a fan , the motherboard outputs a first signal to the sensing pin sense 1 of the control chip u 1 through the sensing pin 3 of the first connector j 1 . the control chip u 1 outputs a low level signal , such as logic 0 , to the first terminal of the first electronic switch q 1 . the first electronic switch q 1 is turned off . a voltage from the motherboard is output to the first power terminal v through the power pin 1 of the first connector j 1 , the fuse fs 1 , the anode of the diode d 1 , and the cathode of the diode d 1 in that order . the fan outputs a second signal to the sensing pin sense 2 of the control chip u 1 through the sensing pin 3 of the second connector j 2 . the control chip u 2 outputs a high level signal , such as logic 1 , to the first terminal of the second electronic switch q 2 through the control pin rc 4 . the second electronic switch q 2 is turned on . the voltage from the motherboard is input to the power pin 1 of the second connector j 2 through the first power terminal v . thus , the motherboard supplies power to the fan . the control chip u 1 receives a third signal of a speed of the fan through the signal pin 2 of the second connector j 2 and the signal pin tach 2 . the control chip u 1 outputs the third signal to the motherboard through the signal pin tach 1 and the signal pin 2 of the first connector j 1 when the control chip u 1 determines that the speed of the fan is abnormal . when the first connector j 1 is connected to the fan and the second connector j 2 is connected to the motherboard , the motherboard outputs the first signal to the sensing pin sense 1 of the control chip u 1 through the sensing pin 3 of the second connector j 2 . the control chip u 1 outputs a low level signal to the first terminal of the second electronic switch q 2 . the second electronic switch q 2 is turned off . the motherboard outputs the voltage to the first power terminal v through the power pin 1 of the second connector j 2 , the fuse fs 2 , the anode of the diode d 2 , and the cathode of the diode d 2 in that order . the fan outputs the second signal to the sensing pin sense 1 of the control chip u 1 . the control chip u 1 outputs a high level signal to the first terminal of the first electronic switch q 1 . the first electronic switch q 1 is turned on . the motherboard supplies power to the fan . the control chip u 1 receives the third signal through the signal pin 2 of the first connector j 1 and the signal pin tach 1 . the control chip u 1 outputs the third signal to the motherboard through the signal pin tach 2 and the signal pin 2 of the second connector j 2 when the control chip u 1 determines that the speed of the fan is abnormal . the alarm module 20 comprises a resistor r 3 and a light emitting diode ( led ) d 3 . an anode of the led d 3 is connected to a second power terminal p 5 v . the second power terminal p 5 v is used to input a high level signal . in the embodiment , the second power terminal p 5 v is connected to the first power terminal v . when the control chip u 1 determines that the speed of the fan is abnormal , the control chip u 1 outputs a low level signal through the alarm pin alarm . when the control chip u 1 determines that the speed of the fan is normal , the control chip u 1 outputs a high level signal through the alarm pin alarm . in the embodiment , the first and second electronic switches q 1 and q 2 are both n - channel filed effect transistors ( fets ). the fan test device operates normally either when the first connector j 1 is connected to the motherboard and the second connector j 2 is connected to the fan or when the first connector j 1 is connected to the fan and the second connector j 2 is connected to the motherboard . while the disclosure has been described by way of example and in terms of preferred embodiment , it is to be understood that the disclosure is not limited thereto . to the contrary , it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art . therefore , the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements .