now the present invention will be clarified in detail by embodiments thereof shown in the attached drawings . fig1 is a block diagram of a controller of the image recording apparatus constituting an embodiment of the present invention , wherein shown are an optional expansion memory unit 1 ; an extended ram 2 in the form of a dynamic random access memory ( dram ) loaded in the expansion memory unit 1 ; and a controller unit 3 of the image recording apparatus , connected by a connector 4 with the extended ram . information 190 from the expansion memory unit 1 is entered through the connector 4 to a detector unit 5 . the information 190 is status information concerning the extended ram 2 . in the detector unit 5 , based on the information 190 , a connection confirmation unit 6 detects the connection of the expansion memory unit 1 , and a memory capacity confirmation unit 7 senses the capacity of the extended ram 2 . then a signal 200 transmitted by the connection confirmation unit 6 and the capacity confirmation unit 7 of the detector unit 5 informs a memory capacity control unit 8 of the capacity of the extended ram 2 . the signal 200 is an extended memory status signal from the detector unit 5 . based on the received information on the capacity of the extended ram 2 , the memory control unit 8 varies the capacities of memory areas and informs a main control unit 9 of the image recording apparatus of memory capacity variation information 210 . the main control unit 9 , composed for example of a cpu ( central processing unit ) 10 and a rom ( read - only memory ) 11 , receives information from an external information processing apparatus such as a computer , develops the information on a bit map memory ( allocated in the internal ram and the extended ram as will be explained later in more details ), and sends thus developed information to a printing unit of the image recording apparatus . based on the received information , the printing unit records visible image information on a recording sheet . upon receiving the memory capacity variation information , the main control unit 9 thereafter effects development and storage of image information on the internal ram 12 and the extended ram 2 according to signals 220 and 230 , utilizing a new ram address map . the signal 220 is a control signal from the main control unit 9 to the internal ram 12 and bidirectional image information signals therebetween , and the signal 230 is a control signal from the main control unit 9 to the extended ram 2 and bidirectional image information signal therebetween . fig2 illustrates an example of the change in memory capacities . at first the internal ram 12 has a bit map memory of 0 . 5 mb and other areas of 1 . 0 mb . with the connection of the extended ram 2 ( 3 . 0 mb ), a half of the capacity thereof is assigned to the expansion of the bit map memory while the other half is used for the expansion of other areas , so that the bit map memory becomes 2 . 0 mb while other areas become 2 . 5 mb . fig3 is a block diagram of a part of the controller of the image recording apparatus constituting another embodiment of the present invention , wherein the same components as those in fig1 are represented by same numbers and will not be explained further . the detector unit 16 of the present embodiment is different from that in the foregoing embodiment , in the absence of the capacity confirmation unit . when the detector unit 16 identifies the connection of the expansion memory unit 1 to the connector 4 , the detector unit 16 supplies the memory capacity control unit 17 with a signal 240 , which is an extended memory status signal . the memory capacity control unit 17 expands the bit map memory capacity to a full page painting capacity ( about 1 mb with 300 dpi in letter size ), and supplies the main control unit 9 of the image recording apparatus with corresponding information 250 , which is memory capacity variation information . thereafter the main control unit 9 effects the development of image information with the bit map memory of a full page painting amount , and sends the thus developed image information in the form of signals 260 and 270 respectively to the internal ram 12 and the extended ram 2 . the signal 260 also serves as the control signal from the main control unit 9 to the internal ram 12 , and the signal 270 also serves as a control signal from the main control unit 9 to the extended ram 12 . fig4 illustrates an example of the change in memory capacities . as in the foregoing embodiment , the internal ram 12 is assumed to have a bit map memory of 0 . 5 mb and other areas of 1 . 0 mb , and an extended ram 2 of 3 . 0 mb is assumed to be connected . in the present embodiment , a part of the 3 . 0 mb is used for the expansion of the bit map memory until it reaches 1 . 0 mb , and the remaining part is used for expansion of other areas , so that the bit map memory has a capacity of 1 . 0 mb while other areas have a capacity of 3 . 5 mb . in the present embodiment , the increase in the capacity of the bit map memory is fixed regardless of the capacity of the expansion memory . consequently the detector unit lacks a part for sensing the capacity of the expansion memory , and is therefore made simpler in structure than in the foregoing embodiment . as explained in the foregoing , the present invention , capable of varying the allocation of memory areas by detecting the connection of an expansion memory , allows to securely and effectively utilize the connected expansion memory .