as noted , the present method is conducted to avoid or minimize contamination of the second surface of the receiving handle wafer . this method includes transferring from a top donor wafer a layer of material onto a receiving handle wafer , the top and receiving wafers comprising respective surfaces to be bonded . the method steps comprise a treatment step for treating at least a surface to be bonded , the treatment of a given surface of a wafer generating on the opposed surface of the wafer a contamination , a bonding step for direct bonding the surfaces to be bonded of the top and handle wafers , in order to form an intermediate multilayer wafer , and a removal step for removing excess material from the top wafer . the method reduces contamination by treating only the first bonding surface of the donor wafer prior to bonding , or by cleaning contamination from the second surface of the handle receiving wafer when present in the intermediate multilayer structure prior to detachment of the thin layer . preferred but non - limiting aspects of such a method are the following : the contamination of the wafer surface which is opposed to the activated surface corresponds to a metallic contaminants concentration above than 10 11 atoms / cm 2 , the treatment is carried out through the exposure of the surface ( s ) to be treated to a plasma , the removal step is carried out by detaching the excess material from the top wafer , the detachment is carried out at an embrittlement zone which has been made by introduction of at least one species in the top wafer , the introduction of species is carried out through an implantation of one or more species , the implantation is carried out with a global implantation dose of a few 10 16 atoms / cm 2 , the removal step is carried out through a splitting annealing carried out at temperatures remaining under 350 ° c ., and preferably between 200 ° c . and 300 ° c . during the treatment step only a surface of the top wafer is treated , the cleaning step is carried out before any high temperature thermal treatment , the cleaning step is carried out with a sc2 solution and / or a hf solution , the cleaning step is carried out with a mono face cleaning equipment , the top wafer is made of si , or sige , sic , or ge , the handle wafer is made of si , fused silica , sic , or glass , the method further comprises a high temperature thermal treatment of the structure which comprises the handle wafer and the part of the top wafer which has not been removed , the high temperature thermal treatment is carried out at a temperature greater than 900 ° c . it is specified that the two embodiments which shall be presented hereunder can be combined . it is also specified that on the figures which shall be commented hereunder , the elements and features which are identical or similar to those commented with reference to fig1 shall be associated to the same reference numeral . fig2 ( which comprises fig2 a - 2 e ) shows the main steps of a first embodiment of the invention . these steps reproduce some of the steps 1 a to 1 e are commented above in the description of fig1 . fig2 a thus shows a top wafer 10 with an implanted embrittlement zone 11 , and a handle wafer 20 . at this stage the front surfaces 100 and 200 of top wafer 10 and handle wafer 20 can undergo preliminary treatments for preparing the surfaces to be bonded . these preliminary treatments can include a chemical - mechanical polishing ( cmp ) and / or one or more cleanings with a cleaning solution ( such as rca , spm + rca , etc .). the top wafer 10 can be made of si , sige , ge , sic , or in any other semiconductor material . the handle wafer 20 can be made of si , fused silica , sic , glass ( all these materials being possibly in crystalline , polycrystalline or amorphous form ), or in any other semiconductor material . the embrittlement zone 11 can have been made by introduction of species in the top wafer ( this “ introduction being carried out e . g . as an implantation and / or by diffusion , or by any other known technique ). in the case where the “ introduction ” of species is an implantation of species , such implantation can be an implantation of only one species ( such as e . g . h or he ). it can also have been made by implantation of several species ( i . e . co - implantation ), for example h and he . here again , the front surface 100 of the top wafer is the surface of an oxide layer ( e . g . a deposit of si02 , or an oxidized region of the underlying material ). fig2 b illustrates an activation step , during which the front surface 100 of the top is exposed to a plasma . this activation step — like all activation steps mentioned in the different embodiments described in this text — more generally corresponds to a treatment step of a surface to be bonded , with a generation of a contamination on the surface of the wafer which is opposite to the surface treated . the back surface 110 of top 10 is therefore covered by a region 111 which is contaminated with metallic contaminants such as those mentioned above ( see fig2 c ). and as mentioned above , this contamination on the back surface of the top wafer corresponds to contaminant concentrations which is typically higher than the maximum concentration generally tolerated . it shall be noted that during this activation step , only the top wafer is exposed to a plasma in order to be activated . the handle wafer 20 is not exposed to any plasma . therefore , no contamination is deposited on the surfaces of the handle wafer . this selective exposure of the donor top wafer only is specific to this first embodiment of the invention . in the known experiments for using a plasma activation in a dbtp , both front surfaces of the top and of the handle wafers were exposed for activation by a plasma . in such experiments , the drawbacks associated to the contamination of a multilayer structure which could undergo further high temperature treatments had not been pointed out . it is to be noted that a reports on one of such experiments ( see the article entitled “ ultra - thin strained - silicon - on - insulator and sige - on - insulator created using low - temperature wafer bonding and metastable layers ”, taraschi et w ., j . electrochem . soc . vol . 151 , no 1 , p . 47 ( 2004 )) mentions the plasma activation of only one of the wafers to be bonded . but this mention makes reference to the activation of the handle wafer , and not of the top wafer . and not surprisingly , there is no mention in this article of any problem associated to the contamination resulting from the plasma activation . the following step is the direct bonding of the top wafer and the handle wafer , for making an intermediate multilayer wafer 30 ( fig2 d ). the excess material from the top is then removed . in the illustration of this first embodiment presented on fig2 a - 2 e , this removal is carried out by detaching the excess material as delimited in the top of 10 by the embrittlement zone 11 . in this particular case which refers to a smart - cut ®- type method , the remainder 15 of the top is detached from the intermediate wafer 30 . the removal can also be carried out according to any method known for btps . this removal can therefore be carried out by etching the back face of the top wafer 10 ( i . e ., the face of the top wafer which is opposed to the front surface 100 ), on the intermediate wafer 30 . in such case ( which corresponds to a besoi - type method ), it is not necessary that any implantation has been carried out on the top wafer . the removal step can also be performed in accordance with the eltran ® method . in such case , the embrittlement zone has previously been made by porous material , and here again no implantation is necessary . in the case of a smart - cut ®- type or eltran ®- type method , a remainder 15 shall be obtained . in every case ( i . e . whatever the method used for removing the excess material of the top ), the multilayer wafer 35 obtained does not comprise a heavy contamination generated on a back surface of a wafer whose front surface would have been exposed to a plasma for its activation . indeed , in all cases the heavy contamination region 111 which is on the back surface of the top wafer has been removed from the multilayer wafer 35 . this is particularly advantageous since this multilayer wafer shall then undergo additional thermal treatments , some of these thermal treatments being as mentioned before carried out at high temperatures ( e . g . smoothing annealing at temperatures above 1000 ° c .). and exposing a wafer comprising heavy concentrations of contaminants ( e . g . concentrations above 10 11 atoms / cm 2 ) would generate an unacceptable and irreversible diffusion of the contaminants into the wafer . in the case of a method generating a remainder 15 , the only heavy ion contamination ( region 111 ) is on the remainder , the multilayer wafer 35 being totally free of such heavy contamination . therefore , this first embodiment of the invention allows to make a multilayer wafer with a dbtp , without having the multilayer wafer polluted by a heavy concentration of contaminants . it is specified that the contaminant concentrations which can be observed on the front face of the exposed top after the activation step are in the order of 2 × 10 10 atoms / cm 2 , which is a generally acceptable concentration level . the removal step illustrated in fig2 e is carried out by detaching the top wafer at the implanted embrittlement zone 11 . this detachment can result from a mechanical and / or thermal action . in the case of a thermal action ( i . e . a splitting annealing ), the temperature should be kept at moderate values , in order to avoid any diffusion of contaminants which would have been generated on the front surfaces 100 , 200 ( and would therefore be located in the vicinity of the bonding interface ). typical values of moderated temperatures for such splitting annealing are 300 - 500 ° c ., for a multilayer wafer such as an soi and always in the specific case of the use of a smart - cut ®- type method as illustrated in fig1 a - 1 e , the implantation of the top for creating the embrittlement zone 11 can advantageously be made with more than one species ( co - implantation , e . g . of h and he ). indeed , such co - implantation allows a reduction of the temperature for the splitting annealing . the splitting at an embrittlement zone created by co - implantation ( e . g . h + he into a si top wafer ) occurs ( for a given global implantation dose — i . e . the sum of the doses of all implanted species which can typically be a “ standard ” implantation dose of e . g . 5 × 10 16 atoms / cm 2 and more generally a few 10 16 atoms / cm 2 ) at lower temperatures than it would have occurred in the same top wafer implanted with the same global implantation dose , but with only one species . for more details on the conditions of such a co - implantation which allows a reduction of the temperature for the splitting annealing , with a “ standard ” global dose , reference is made to wo / 042779 . a co - implantation ( e . g . with h + he ) therefore constitutes a favorable feature for performing a splitting annealing at moderated temperatures as mentioned above . and such co - implantation even allows a further reduction of the temperature for the splitting annealing . for a h + he co - implantation in a si top wafer with a global implantation dose of a few 10 16 atoms / cm 2 , this temperature can remain under 350 ° c . and in particular can be in a range as low as 200 - 300 ° c . fig3 ( which comprises fig3 a - 3 f ) shows the main steps of a second embodiment of the invention . fig3 a illustrates — as fig1 a and 2 a — a top wafer 10 and a handle wafer 20 . the materials of the top and the handle wafers can be the identical to the materials mentioned in reference to the first embodiment described above . here again , the top wafer has been implanted with one or more 30 species for generating an embrittlement zone 11 . but here again , such implanted embrittlement zone is only a particular illustration corresponding to the case where the invention is embodied with a smart - cut ®- type method , whereas any type of dbtp can be used . and more generally , unless otherwise specified , all information given above for the first embodiment is applicable to this second embodiment . fig3 b illustrates the step of activation through exposure to a plasma . during this step , the front surface of the top wafer 10 and / or of the handle wafer 20 can be exposed . if only the top wafer 10 is exposed to a plasma for activation , the first embodiment described above can be combined with the second embodiment . fig3 b - 3 d illustrate the particular case where both top and handle wafers are activated by a plasma . fig3 c thus illustrates highly contaminated regions 111 and 211 respectively associated to the back surfaces of the top and the handle wafers . of course , if only the top wafer is activated there would be only a region 111 and if only the handle wafer is activated there would be only a region 211 . fig3 d illustrates the direct bonding of the top and handle wafers , with their front surfaces contacted . in this second embodiment , the bonding is followed ( preferably immediately followed ) by a cleaning step ( fig3 e ) for removing the contaminants from the highly contaminated regions 111 and 211 on the intermediate multilayer wafer 30 ( or from the region 111 or 211 which has been formed , if only one such highly contaminated region has been formed because only one wafer was activated by a plasma before bonding ). the region 111 is the to be associated to a first “ main ” surface of the intermediate multilayer wafer 30 , and the region 211 is the to be associated to a second “ main ” surface of the intermediate multilayer wafer . this cleaning step is carried out on the intermediate multilayer wafer 30 which has been made by the direct bonding of the top and handle wafers , with a cleaning solution able to eliminate contaminants . a sc2 solution or a hf solution can be used for that purpose . the cleaning step is carried out before the wafer undergoes any high temperature treatment ( i . e . any thermal treatment above 900 ° c .). the cleaning step illustrated in fig3 e can be composed of several successive cleaning steps . such cleanings are carried out on the intermediate multilayer wafer 30 . this differs from the cleaning operations known in the art since these cleaning are usually carried out on single - layer wafers such as bulk silicon wafers . each cleaning of the cleaning step can be carried out as a wet cleaning , i . e . by immersing the wafer to be cleaned in a bath made of the cleaning solution . it is however also possible to perform such cleaning with a monoface cleaning equipment , which projects a controlled spray or jet of cleaning solution selectively , only on the surface to be cleaned . concerning the cleaning step it is to be noted that the method of the invention is contrary to what one might have expected , in that the use of a cleaning solution on a multilayer wafer 30 whose layers have already been bonded together produces very satisfactory results . indeed , the prior art tends to indicate that such cleaning should be avoided because the cleaning solution might be infiltrated at the bonding interface ( see e . g . “ semiconductor on wafer bonding : science and technology ’— tong and gosele , sponsored by the electrochemical society , inc ., a wiley - interscience publication , 1999 ). such infiltrations would be associated to risks of degrading the quality of the bonding , or even undo the bond between the bonded wafers . in addition , when considering the prior art one would consider that the manipulations associated to a cleaning step would favor debonding of the bonded wafers . moreover , one would also consider that the cleaning step would most probably lower the bonding energy at the edge of the bonding interface of the bonded wafer . therefore , a cleaning step carried out as in this second embodiment goes against the teachings of the prior art . and the specific process provided by this second embodiment , which has the cleaning performed after the bonding , further allows the inventive process to use a solution such as a sc2 or hf solution , which is known to efficiently remove metallic contaminants . a sc2 or hf solution would indeed have been associated with problems if used for cleaning the top and / or handle wafer before bonding them together : in such case , the sc2 or hf solution would have removed the undesirable contaminants , but would also have deactivated the surfaces to be bonded — thus losing the benefit of the plasma activation . it therefore appears that the specific method proposed in this second embodiment also corresponds to an advantageous process which allows the manufacturing of a multilayer wafer through a dbtp , with a lt bht . fig3 f illustrates the removal step of the excess material of the top wafer . here again , all comments made above about the first embodiment are applicable to this embodiment as well . an advantage of this second embodiment is that in the case of a removal carried out in a way which generates a remainder ( as illustrated in the left part of fig3 f ), this remainder has already been cleaned by the cleaning step . it is specified that if the description given above of embodiments of the invention is focused on the case of an activation ( or several activations ) carried out through the exposure to a plasma (“ plasma activation ”), such activation can alternatively be carried out under different forms ( e . g . oxidation and / or chemical activation , etc .). intended to enhance the bonding energy associated to a bonding of the surface which is activated ( the surface can generally be referred to as a “ front ” surface ), associated to the generation of a heavy contamination on the “ back ” surface which is opposed to the “ front ” surface to be activated ( with a “ heavy ” contamination being understood as corresponding to a contaminant concentration above 10 11 atoms / cm 2 ). and in all embodiments the invention ensures that no wafer surfaces can undergo high temperature thermal treatments if the surface is heavily contaminated .