the following description is presented to enable any person skilled in the art to make and use the invention , and is provided in the context of a particular application and its requirements . various modifications to the disclosed embodiments will be readily apparent to those skilled in the art , and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present invention . thus , the present invention is not limited to the embodiments shown , but is to be accorded the widest scope consistent with the principles and features disclosed herein . fig1 a presents a block diagram of a voltage - mode driver . it contains pull - up network 102 , pull - down network 104 , communication channel 106 , switches 108 and 112 , variable resistors 110 and 114 , termination 116 , and control signal 118 . when the voltage - mode driver transmits a high bit , control signal 118 closes switch 108 and current flows from the power supply , through variable resistor 110 to charge up communication channel 106 . note that switch 112 remains open when transmitting a high bit . similarly , when the voltage - mode driver transmits a low bit , control signal 118 closes switch 112 and current flows from the communication channel , through variable resistor 114 to ground . note that switch 108 remains open when transmitting a high bit . note that pull - up network 102 and pull - down network 104 can be implemented in any semiconductor technology , including : cmos , bicmos , gaas , etc . in a standard cmos process , the pull - up network includes a pmos transistor and the pull - down network includes a nmos transistor . note that more than one pmos and more than one nmos transistor can be used in the voltage - mode driver . in one embodiment of the present invention , the voltage - mode driver drives the voltage on the communication channel to half of the supply voltage ( i . e . vdd / 2 ). note that vdd is the positive power supply . in high - speed communications and applications where noise is a concern , the voltage - mode drivers are configured for differential - mode operation . fig1 b presents a block diagram of voltage - mode drivers configured for differential - mode operation . it contains pull - up networks 120 and 132 , pull - down networks 122 and 134 , switches 126 , 128 , 138 , and 140 , communication channels 124 and 136 , control signals 130 and 142 , and bridge - tied load 144 . when the differential voltage - mode driver transmits a high bit , control signal 130 closes switch 126 and leaves switch 128 open . control signal 142 closes switch 140 and leaves switch 138 open . current flows from the power supply in pull - up network 120 , through communication channel 124 , through bridge - tied load 144 , through communication channel 136 , and to ground in pull - down network 134 . similarly , when the differential voltage - mode driver transmits a low bit , control signal 130 closes switch 128 and leaves switch 126 open . control signal 142 closes switch 138 and leaves switch 140 open . current flows from the power supply in pull - up network 132 , through communication channel 136 , through bridge - tied load 144 , through communication channel 124 , and to ground in pull - down network 122 . note that the system can alternatively be configured so that the current flows in the opposite direction . for instance , when transmitting a high bit , control signal 130 closes switch 128 and leaves switch 126 open . control signal 142 closes switch 138 and leaves switch 140 open . therefore , current flows from the power supply in pull - up network 132 , through communication channel 136 , through bridge - tied load 144 , through communication channel 124 , and to ground in pull - down network 122 . note that voltage - mode drivers have a drive - level which is approximately a linear function of the source resistance . therefore , once the source resistance of the voltage - mode driver is set to match the impedance of the communication channel , the drive - level of the voltage - mode driver is fixed . in order to get a stronger drive - strength , the resistance of the voltage - mode driver must be reduced . unfortunately , by reducing the resistance of the voltage - mode driver , the impedance of the driver is no longer matched with the impedance of the communication channel , which can cause noise problems on the communication channel . note that noise results when the impedance mismatch causes electrical energy to reflect back and forth through the network . fig2 a presents a block diagram of a current - mode driver . it contains pull - up network 202 , pull - down network 204 , communication channel 206 , switches 208 , 210 , 214 , and 216 , current source 212 , current sink 218 , control signal 220 , and termination 222 and 224 . when the current - mode transmits a high bit , control signal 220 closes switches 210 and 214 and leaves switches 208 and 216 open . this causes current to flow from the power supply in pull - up network 202 into communication channel 206 . note that closing switch 214 provides a current path from the power supply to ground through pull - down network 204 . when the current - mirror - logic driver transmits a low bit , control signal 220 closes switches 208 and 216 and leaves switches 210 and 214 open . this causes current to flow from communication channel 206 to ground through pull - down network 204 . note that closing switch 208 provides a current path from the power supply to ground through pull - up network 202 . note that this current - mode driver has a source resistance that matches the line impedance of the communication channel . the current source is a norton - equivalent current source , which has a source resistance in parallel with the current source ( not shown in fig2 ). furthermore , this source resistance is set independently of the drive - level . hence , the drive - level of the current - mode driver can be adjusted without affecting the impedance of the current - mode driver . note that the act of closing switch 208 by itself dumps current from current source 212 to ground , which causes the circuit to consume power . also note that pull - up network 202 and pull - down network 204 can be implemented in any semiconductor technology , including : cmos , bicmos , gaas , etc . in a standard cmos process , the current source in the pull - up network includes a current mirror circuit that mirrors a current from a reference current source . similarly , current sink in the pull - down network also includes a current mirror circuit that mirrors a current from a reference current sink . note that these current sources and current sinks consume power at all times . fig2 b presents a block diagram of current - mode drivers configured for differential - mode operation . it contains current source 224 , communication channels 226 and 228 , bridge - tied load 230 , switches 232 , 234 , 236 , 238 , and 240 , control signal 242 , and terminations 242 and 244 . when transmitting a high bit , control signal 242 closes switches 234 and 236 and leaves switches 232 , 238 , and 240 open . this causes current to flow from current source 224 , through communication channel 226 , through bridge - tied load 230 , through communication channel 228 , and to ground . when transmitting a low bit , control signal 242 closes switches 238 and 240 and leaves switches 232 , 234 , and 236 open . this causes current to flow from current source 224 , through communication channel 228 , through bridge - tied load 230 , through communication channel 226 , and to ground . note that the system can alternatively be configured so that the current flows in the opposite direction . for instance , when transmitting a high bit , control signal 242 can close switches 238 and 240 and leave switches 232 , 234 , and 236 open . this causes current to flow from current source 224 , through communication channel 228 , through bridge - tied load 230 , through communication channel 226 , and to ground . note that since current is always flowing in the current - mode driver , it consumes more power than the voltage - mode driver . also note that closing switch 232 by itself dumps current from current source 224 to ground , which causes the circuit to consume power . fig3 a illustrates an idealized voltage - versus - time plot of a signal after transmission through a lossy communication channel . this plot illustrates a differential signaling scheme wherein the driver transmits three high bits , a low bit , and then a high bit . it contains rising edges 302 , 312 , and 314 , falling edges 304 , 310 , and 316 , and steady states 306 and 308 . the curve initially going high is the “ plus ” differential line and the curve initially going low is the “ minus ” differential line . when transmitting a high signal , the driver causes rising edge 302 in the “ plus ” differential line and falling edge 304 in the “ minus ” differential line . since the driver needs to transmit two more high bits , the driver holds the signal steady ( steady states 306 and 308 ) until the next transition . the driver then causes falling edge 310 in the “ plus ” differential line and rising edge 312 in the “ minus ” differential line to transmit a low bit . after transmitting the low bit , the “ plus ” differential line returns high ( rising edge 314 ) and the “ minus ” differential line returns low ( falling edge 316 ) to transmit a high bit . note that the voltage level for the “ plus ” differential line never crosses the voltage level for the “ minus ” differential line after the driver transmits a low bit because the frequency dependent losses in the communication channel attenuates the high - frequency components of the rising and falling edge signals so that the full voltage range is not reached prior to the next transition . hence , in this case , the differential lines do not have the correct voltages for the bits transmitted . also note that the communication channel does not attenuate steady state signals . furthermore , note that the transition from a high state to a low state occurs over several bit times . in fig3 a , each bit time is denoted by the vertical dashed - line . in one embodiment of the present invention , in order to boost the drive - strength of the voltage - mode driver , a current source is coupled to the voltage - mode driver . the resistance of the voltage - mode driver is set such that it matches the impedance of the communication channel . as mentioned previously , the current source can boost the signal without affecting the impedance of the driver . in order to compensate for the frequency dependent losses , during a signal transition , the current source boosts the drive - strength of the voltage - mode driver . after the signal transitions , the system turns off the current source and returns the drive - level to a lower value by only maintaining power to the voltage - mode driver . fig3 b illustrates an idealized voltage - versus - time plot of a signal after transmission through a lossy communication channel using a current source to boost the drive - level of the voltage - mode driver . this plot illustrates a differential signaling scheme wherein the driver transmits three high bits , a low bit , and then a high bit . it contains rising edges 318 , 328 , and 332 , falling edges 320 , 326 , and 330 , and steady states 322 and 324 . the curve initially going high is the “ plus ” differential line and the curve initially going low is the “ minus ” differential line . note that after causing rising edge 318 in the “ plus ” differential line and falling edge 320 in the “ minus ” differential line to transmit a high bit , the driver holds the signal steady to transmit the other two high bits ( steady states 322 and 324 ). note that the voltage levels of steady states 322 and 324 are lower than the voltage levels at steady states 306 and 308 in fig3 a . by doing so , when the driver transmits a low bit by causing falling edge 326 in the “ plus ” differential line and rising edge 328 in the “ minus ” differential line , the “ plus ” differential line crosses the voltage level of the “ minus ” differential line even though the driver subsequently transmits a high bit ( rising edge 332 and falling edge 330 ). in this case , the boost - enabled driver compensates for frequency dependent losses and yields the correct voltage levels for the bits transmitted . also note that the boost - enabled driver makes the signal eye larger and thereby facilitates easier detection of the signal . also , note that the transition from a high state to a low state occurs over several bit times . in fig3 b , each bit time is denoted by the vertical dashed - line . fig4 presents a block diagram of a current source coupled to a voltage - mode driver in accordance with an embodiment of the present invention . it contains pull - up networks 402 and 412 , pull - down networks 404 and 414 , switches 406 , 408 , 418 , 420 , 424 , 428 , control signals 410 and 430 , current source 416 , current sink 422 , communication channel 432 , and termination 434 . pull - up network 402 and pull - down network 404 form the voltage - mode driver . pull - up network 412 and pull - down network 414 form the current source . this circuit operates in a similar manner as described in fig1 a and fig2 a . the only difference is that when transmitting a bit which has a state different from the previously transmitted bit , the system activates the current source to boost the signal . for instance , when transmitting a high bit after transmitting a low bit , control signal 430 closes switches 420 and 424 and leaves switches 418 and 428 open . current flows from the power source in pull - up network 412 , through communication channel 432 to boost the signal transmitted by the voltage - mode driver . if the driver is transmitting the same bit , or in other words maintaining the same signal state , the current source is not used . in one embodiment of the present invention , the current source and current sink are sized in order to provide sufficient current to boost the voltage - level of the transmitted signal provided by the voltage - mode driver to compensate for frequency dependent losses in the communication channel . in this embodiment , the current source consumes less power than a pure current - mode driver because the current source provides a boost to the drive - strength of the voltage mode driver instead of providing the full drive - strength . fig5 presents a block diagram of a current source coupled to a voltage - mode driver configured for differential - mode operation in accordance with an embodiment of the present invention . it contains pull - up network 502 and 512 , pull - down network 504 and 514 , switches 506 , 508 , 516 , 518 , 524 , 526 , 528 , 530 , 532 , control signals 510 , 520 , and 534 , current source 522 , communication channels 536 and 538 , and bridge - tied load 540 . both the differential voltage - mode driver and the current source operate in a similar manner as described in fig1 b and fig2 b . the only difference is that when transmitting a bit which has a state different from the previously transmitted bit , the system activates the current source to boost the signal . for instance , when transmitting a high bit after transmitting a low bit , control signal 534 closes switches 526 and 528 and leaves switches 524 , 530 , and 532 open . current flows from current source 522 through communication channel 536 , through bridge - tied load 540 , through communication channel 538 , and to ground . if the driver is transmitting a bit with the same state as a previously transmitted bit , or in other words maintaining the same signal state , the current source is not used . in one embodiment of the present invention , the activation of the current source does not occur at the same time as the activation of the voltage - mode driver , thereby facilitating the optimization of the shape of the transmitted signal in addition to boosting the drive - level of the transmitted signal . in one embodiment of the present invention , multiple current sources are used to optimize the shape of the transmitted signal after traversing a channel with frequency dependent losses . fig6 presents a block diagram of multiple current sources used to optimize the shape of the transmitted signal in accordance with an embodiment of the present invention . it contains input 600 , flip - flops 602 , 604 , and 606 , decoder 608 , current sources 610 , 612 , 614 , and 616 , and output 618 . the current sources boost the signal strength generated by the voltage - mode driver by injecting current through output 618 , which is coupled to the communication channel . during operation , a bit stream enters at input 600 . the system compares the given bit at input 600 to the previously transmitted bit in flip - flop 602 . decoder 608 determines if the previously transmitted bit and the given bit have the same state . if the previously transmitted bit and the given bit have different states , decoder 608 activates the current sources to optimize the shape and to boost the drive - level of the transmitted signal . in one embodiment of the present invention , decoder 608 activates only one of the current sources . for instance , decoder 608 activates current source 610 . in one embodiment of the present invention , decoder 608 activates more than one of the current sources to boost the signal sent by the voltage - mode driver . for instance , decoder 608 activates current sources 612 and 616 . in one embodiment of the present invention , the system looks at more than just the previously transmitted bit in order to boost the signal sent by the voltage - mode driver . for instance , when comparing the history of the transmitted bits to the given bit at input 600 , the system looks at the previously transmitted bit stored in flip - flop 602 as well as the bit transmitted prior to the previously transmitted bit , which is stored in flip - flop 604 . decoder 608 then activates the current sources to optimize the shape and boost the drive - level of the transmitted signal . for instance , if the given bit is low , the previously transmitted bit was high , and bit prior to the previously transmitted bit was high , decoder 608 activates current sources 610 , 612 , and 614 . however , if the given bit is low , the previously transmitted bit is high , and the bit prior to the previously transmitted bit is low , decoder 608 only activates current sources 614 . in one embodiment of the present invention , the current sources have different drive strengths in order to facilitate the optimization of the shape and to boost the drive - level of the transmitted signal . in one embodiment of the present invention , the activation of the current sources does not occur at the same time as the activation of the voltage - mode driver . if more than one current source is coupled to the voltage - mode driver , the system can activate each current - mode - driver separately from the other drivers , thereby facilitating the optimization of the shape and to boost the drive - level of the transmitted signal . in one embodiment of the present invention , decoder 608 is a look - up - table . fig7 presents a flow chart illustrating process of activating the current source to boost the drive - level of the voltage - mode driver in accordance with an embodiment of the present invention . the process begins when the system reads the state of the given bit to be transmitted ( step 702 ). the system then reads the state of the previously transmitted bit ( step 704 ). next , the system determines if the given bit has the same state as the previously transmitted bit ( step 706 ). if so , the system does not activate the current source . otherwise , the system activates the current source to boost the signal of the transmitted bit ( step 708 ). note that this process can be enhanced to optimize the shape of the transmitted signal by using multiple previously transmitted bits . instead of reading the previously transmitted bit in step 704 , the system reads the history of previously transmitted bits . next , the system compares the history of previously transmitted bits to the given bit and determines which current sources to activate , replacing step 706 . the foregoing descriptions of embodiments of the present invention have been presented only for purposes of illustration and description . they are not intended to be exhaustive or to limit the present invention to the forms disclosed . accordingly , many modifications and variations will be apparent to practitioners skilled in the art . additionally , the above disclosure is not intended to limit the present invention . the scope of the present invention is defined by the appended claims .