the present disclosure describes an adjustment circuit for minimizing effects due to the threshold voltage variations for a metal oxide semiconductor field effect transistor ( mosfet ) switch . the mosfet switch includes a timer for closing the switch for a preset period of time . this is useful for applications such as when sense amplifiers of a dynamic random access memory ( dram ) chip sense a differential voltage between a corresponding pair of bit lines . the switch connects between the supply voltage node and a bit line high voltage node . when the switch is activated current flows through the switch to sense amplifiers which are connected to complementary pairs of bit lines . referring now in specific detail to the drawings in which like reference numerals identify similar or identical elements throughout the several views , and initially to fig2 a block diagram of a circuit of the present invention is shown . a timer circuit 16 sends a signal from a timer output 26 . an adjustment circuit 14 is connected to timer output 26 at adjustment circuit input 28 . the signal from output 26 enables adjustment circuit 14 . adjustment circuit 14 adjusts the voltage to an adjustment circuit output 24 . a mosfet switch 12 has a gate 22 connected to adjustment circuit output 24 . when the adjusted voltage is applied to gate 22 , current flows through switch 12 into the v blh node . v blh supplies sense amplifiers 6 to drive one of the complementary pair of bit lines 8 high . adjustment circuit 14 is designed to provide gate 22 with appropriate voltage to allow a predetermined amount of current flow through mosfet switch 12 to provide enough current to sense amplifiers 6 during activation . although shown as a pmosfet , mosfet switch may also be an nmosfet . referring to fig3 an adjustment circuit 14 in accordance with one embodiment of the invention is schematically illustrated . adjustment circuit 114 has an input 128 from a timer circuit 16 . input 128 is connected to a gate 139 of a transistor 140 , for example a mosfet . transistor 140 acts as an activation switch - for the adjustment circuit 114 . when the appropriate signal is received from - timer circuit 16 , gate 128 is activated allowing current to flow through transistor 140 . transistor 140 has its drain 141 connected to ground 143 and its source 145 connected to node 138 . a resistor r 2 is connected between node 138 and a node 124 . node 124 is connected to a transistor 132 , preferable a pmosfet . transistor 132 has a source 144 , a gate 134 and a drain 136 . both gate 134 and drain 136 are connected to node 124 . resistor r 1 connects between source 144 of transistor 132 and a node 142 . node 142 is at the supply voltage v sup potential . node 124 is connected to a gate 122 of a transistor switch 112 . transistor switch 112 is preferably a mosfet . transistor switch has a source 111 and a drain 113 . drain 113 is connected to v blh node , and source is connected to node 118 which remains at the supply voltage v sup potential . it is preferred to have switch 112 be of the same kind as transistor 134 , i . e . both of the transistors are pmosfet &# 39 ; s or both of the transistors are nmosfet &# 39 ; s . preferably , transistor 134 and transistor switch 112 can share the same doped regions for their respective sources and drains . in this way the threshold voltage v t across the transistor ( the voltage difference between the source and drain of a transistor ) is the same for both transistor 132 and transistor switch 112 . the resistors r 1 and r 2 and transistor 132 act as a voltage divider circuit . timer circuit 16 sends an enable signal to input 128 which applies a voltage to gate 139 . this allows current to flow from node 138 to ground 143 . this current draw causes current flow through resistor r 1 creating a potential drop across the resistor r 1 . this voltage is applied to gate 134 of transistor 132 allowing current to flow through resistor r 2 as well . the voltage at node 124 can be calculated as follows : v node   124 = v sup - v t r 1 + r 2 × r 2 v node 124 is the applied voltage to gate 122 . the voltage that is applied to the gate is sufficient to allow current to flow from source 111 to drain 113 . it is important that the charging current that passes through switch 112 be sufficient to enable operation of the sense amplifiers during their activation period . as such , the voltage that is applied to the gate is sufficiently high to achieve this goal . since transistor 132 and switch 112 share the same doped regions for their respective sources and drains , any threshold voltage v t changes across the transistors are the same . if , for example , the threshold voltage v t of transistor 134 and switch 112 is increased , than their current flow from source to drain decreases . consequently , the voltage at node 124 changes according to the formula : v node   124 + delta   v node   124  v sup - ( v t + delta   v t ) r 1 + r 2 × r 2  delta v node 124 represents the change voltage differential from the voltage prior to the increased threshold voltage v t ; and delta v t represents the increase in threshold voltage v t across the transistors . the gate voltage of switch 112 is decreased and by this , the current flow from source 111 to drain 113 is increased . the combination of these two effects leads to reduced influence of the threshold voltage variations on the current flow through switch 112 . the value of the voltage v node 124 can be controlled by dimensioning the resistors r 1 and r 2 . referring to fig4 another embodiment of the adjustment circuit includes the addition of transistors to further reduce the influence of threshold voltage changes on switch 112 . a plurality of transistors designated as fet 1 through fetn are connected serially between resistor r 1 and node 224 . each transistor is preferably the same type as a transistor switch 212 , i . e . all transistors are pmosfet &# 39 ; s , or all nmosfet &# 39 ; s . each of the plurality of transistors fet 1 through fetn has its drain connected to its gate . it is preferred to have all the sources and drains of the transistors fet 1 through fetn share the same doped regions for their respective sources and drains so that any threshold voltage v t changes across the transistors are the same for each transistor . the compensation effect on switch 212 is increased . this means that the voltage at node 224 is more reliably achieved making the current flow rate through switch 224 more efficient and repeatable . if n is used to denote the number of transistors used , the voltage at node 224 can be calculated according to the following formula : v node   224 + delta   v node   224 = v sup - ( v t + ( n × delta   v t ) ) r 1 + r 2 × r 2 delta v node 224 represents the change voltage differential from the voltage prior to the increased threshold voltage v t ; delta v t represents the increase in threshold voltage v t across the transistors . referring to fig5 another embodiment of an adjustment circuit 314 includes a two stage differential amplifier 310 . an input 346 to differential amplifier 310 is at reference voltage v ref . differential amplifier 310 maintains voltage v ref ′ at a node 326 . a feedback circuit 354 includes a transistor 342 of differential amplifier 310 , a transistor 332 , a transistor 330 and node 352 , node 326 and node 324 . since the voltage at node 326 is held constant by differential amplifier 310 , the current through resistor r 3 is constant . i 2 = v ref ′/ r 3 . transistor 332 is used to track changes in threshold voltage v t and adjusts the voltage in node 324 accordingly . transistor 332 has a source 334 , gate 336 and a drain 328 . drain 328 is connected to node 326 and gate 336 is connected to node 324 . transistor 330 connects node 352 to node 324 to complete feedback circuit 354 . transistor 330 has its gate 338 connected to node 352 and its drain 340 connected to node 324 . if , for example , the threshold voltage of transistor 332 increases , the voltage at node 324 is lowered in order to maintain the constant voltage v ref ′ at node 326 ( i 2 = v ref ′/ r 3 ). feedback loop 354 adjusts the voltage of gate 336 to maintain i 2 constant . this means that the voltage at node 324 is compensated for variations in the threshold voltage in transistor 332 , maintaining a predetermined voltage at node 324 . resistor r 4 keeps the voltage at node 324 regulated by allowing current form transistor 330 to flow to ground . transistors 332 and transistor switch 312 are of the same type , i . e . all pmosfet &# 39 ; s , or all nmosfet &# 39 ; s . so that tracking threshold voltage variations can be achieved in switch 312 . it is preferred that transistor 332 and transistor switch 312 are made to share the same doped region of the chip . it is desired to achieve similar current densities in transistor 332 and transistor switch 312 . the transition voltages would therefore be nearly the same for these transistors , hence threshold voltage variations can be more closely tracked . a transistor 328 receives an enable signal from timer circuit 16 begins the activation cycle in which current flows through transistor switch 312 from v sup . node 324 is connected to a gate 309 of switch 312 . this allows current to flow from v sup toward v blh . since the voltage at node 324 is compensated , effects due variations in threshold voltages are minimized , thereby improving the performance and efficiency of switch 312 . while this invention has been described in terms of several illustrative embodiments , there are alterations , permutations , and equivalents which fall within the scope of this invention . it should also be noted that there are many alternative ways of implementing the processes of the present invention . it is therefore intended that the following appended claims be interpreted as including all such alterations , permutations , and equivalents as fall within the true spirit and scope of the present invention .