Dielectric withstand test

A dielectric withstand test (or pressure test, high potential or hipot test) is an electrical test performed on a component or product to determine the effectiveness of its insulation. The test may be between mutually insulated sections of a part or energized parts and electrical ground. The test is a means to qualify a device's ability to operate safely during rated electrical conditions. If the current through a device under test is less than a specified limit at the required test potential and time duration, the device meets the dielectric withstand requirement. A dielectric withstand test may be done as a factory test on new equipment, or may be done on apparatus already in service as a routine maintenance test.
Voltage withstand testing is done with a high voltage source and voltage and current meters. A single instrument called a "pressure test set" or "hipot tester" is often used to perform this test. It applies the necessary voltages to a device and monitors leakage current. The current can trip a fault indicator. The tester has output overload protection. The test voltage may be either direct current or alternating current at power frequency or other frequency, like resonant frequency (30 to 300 Hz determined by load) or VLF (0.01 Hz to 0.1 Hz), when convenient. The maximum voltage is given in the test standard for the particular product. The application rate may also be adjusted to manage leakage currents resulting from inherent capacitive effects of the test object. The duration of the test is dependent on the test requirements of the asset owner but is normally up to 5 minutes. The applied voltage, rate of application and test duration depend on the specification requirements of the equipment. Different test standards apply for consumer electronics, military electrical devices, high voltage cables, switchgear and other apparatus.
Typical hipot equipment leakage current trip limit settings range between 0.1 and 20 mA and are set by the user according to test object characteristics and rate of voltage application. The objective is to choose a current setting that will not cause the tester to falsely trip during voltage application, while at the same time, selecting a value that minimizes possible damage to the device under test should an inadvertent discharge or breakdown occur.