OpenPOWER Microwatt

Microwatt is an open source soft processor core originally written in VHDL by Anton Blanchard at IBM, announced at the OpenPOWER Summit NA 2019 and published on GitHub in August 2019. It adheres to the Power ISA 3.0 instruction set and can be run on FPGA boards, booting Linux, MicroPython and Zephyr.
Design.
Microwatt is a tiny 64-bit bi-endian scalar integer processor core, implementing a subset of the Power ISA 3.0 instruction set. It has 32× 64-bit general purpose registers and 32x 64-bit floating-point registers. It uses Wishbone for the memory interface.
The initial development was done in a couple of months, included the entire integer processing functionality of the instruction set; the bare minimum to make it compliant, with no memory management unit (MMU) and no floating-point unit.
Later additions to the implementation includes JTAG debugger interface, divider instructions, 16 kB instruction and 32 kB data caches, a non-hypervisor-capable MMU, pipelining and floating-point support.
It's designed using VHDL 2008 and the GHDL simulation environment.
Chiselwatt.
A sibling project called Chiselwatt is another open processor core implementing the Power ISA 3.0 instruction set, written in the Scala-based Chisel instead of VHDL.
History.
It is the first processor written from scratch using the open Power ISA 3.0, and is released by the OpenPOWER Foundation as a reference design.
The project started as a demo, proof of concept and a reference implementation for the release of the opensource initiative regarding Power ISA 3.0. The goal for Blanchard was to see if he could make it, and as a software developer, taking on a very low level hardware project was a challenge.
Microwatt is set to be fabricated in 130 nm by Efabless "Open MPW Shuttle Program" in 2021.