Application-specific instruction set processor

An application-specific instruction set processor (ASIP) is a component used in system-on-a-chip design. The instruction set of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC.
Some ASIPs have a configurable instruction set. Usually, these cores are divided into two parts: "static" logic which defines a minimum ISA (instruction-set architecture) and "configurable" logic which can be used to design new instructions. The configurable logic can be programmed either in the field in a similar fashion to an field-programmable gate array (FPGA) or during the chip synthesis.
ASIPs can be used as an alternative of hardware accelerators for baseband signal processing or video coding. Traditional hardware accelerators for these applications suffer from inflexibility. It is very difficult to reuse the hardware datapath with handwritten finite-state machines (FSM). The retargetable compilers of ASIPs help the designer to update the program and reuse the datapath. Typically, the ASIP design is more or less dependent on the tool flow because designing a processor from scratch can be very complicated. One approach is to describe the processor using a high level language and then to automatically generate the ASIP's software toolset. There are some commercial tools to design ASIPs from a high-level language, for example ASIP Designer from Synopsys or Studio from Codasip. There is an open source tool as well, TTA-based co-design environment (TCE).