SmartSpice

SmartSpice is a commercial version of SPICE (Simulation Program with Integrated Circuit Emphasis) developed by Silvaco. SmartSpice is used to design complex analog circuits, analyze critical nets, characterize cell libraries, and verify analog mixed-signal designs. SmartSpice is compatible with popular analog design flows and foundry-supplied device models. It supports a reduced design space simulation environment. Among its usages in the electronics industry is Dynamic Timing Analysis.
Supported input formats.
Berkeley SPICE netlist, HSPICE netlist, W-element RLGC matrix files, S-parameter model files, Verilog-A and AMS, C/C++
Supported output formats.
Rawfiles, output listings, Analysis results, Measurement data, Waveforms (portable across unix/windows platforms)