On Optimal Subarchitectures for Quantum Circuit Mapping

Compiling a high-level quantum circuit down to a low-level description that can be executed on state-of-the-art quantum computers is a crucial part of the software stack for quantum computing. One step in compiling a quantum circuit to some device is quantum circuit mapping, where the circuit is transformed such that it complies with the architecture's limited qubit connectivity. Because the search space in quantum circuit mapping grows exponentially in the number of qubits, it is desirable to consider as few of the device's physical qubits as possible in the process. Previous work conjectured that it suffices to consider only subarchitectures of a quantum computer composed of as many qubits as used in the circuit. In this work, we refute this conjecture and establish criteria for judging whether considering larger parts of the architecture might yield better solutions to the mapping problem. Through rigorous analysis, we show that determining subarchitectures that are of minimal size, i.e., of which no physical qubit can be removed without losing the optimal mapping solution for some quantum circuit, is a very hard problem. Based on a relaxation of the criteria for optimality, we introduce a relaxed consideration that still maintains optimality for practically relevant quantum circuits. Eventually, this results in two methods for computing near-optimal sets of subarchitectures$\unicode{x2014}$providing the basis for efficient quantum circuit mapping solutions. We demonstrate the benefits of this novel method for state-of-the-art quantum computers by IBM, Google and Rigetti.


INTRODUCTION
Quantum computing [1] is an emerging technology where computations are governed by quantummechanical principles. Despite its relative infancy, even currently available quantum computers impose many challenges on quantum algorithm designers-increasing the need for design automation methods in the realm of quantum computing. One critical challenge (for devices based on superconducting qubits [2]) arises from the limited connectivity of the physical qubits on these quantum computers. Instead of allowing multi-qubit gates between arbitrary qubits, a coupling map dictates which pairs of qubits might interact with each other over the course of a computation. Any quantum circuit executed on an actual device needs to conform to those restrictions. Thus, similar to classical computing, high-level quantum algorithms need to be compiled to the target architecture-encompassing many individual steps, such as synthesis, qubit allocation/placement, qubit routing, optimization, and scheduling [3]- [12].
In the following, we focus on the steps dictated by the limited connectivity of the devices, i.e., qubit allocation/placement and routing, which is commonly referred to as quantum circuit mapping. Mapping a quantum circuit first requires to allocate the circuit's logical qubits on the device's physical qubits, i.e., to identify a subarchitecture of the whole device where the circuit shall be executed. Then, the logical qubits need to be routed on the physical qubits so that any operation in the circuit is executed on qubits that are connected on the device's coupling map. This is commonly conducted by inserting SWAP gates into the circuit which allow to dynamically change the logical-to-physical qubit assignment [11].
In order to ensure reliable execution of the resulting circuit, it is crucial to keep the overhead introduced through routing as small as possible. Unfortunately, determining optimal mappings of quantum circuits is an NP-hard problem [4], [13]-mainly due to the involved search space growing exponentially in the number of considered qubits. This is exacerbated by the fact that quantum computers are not available in arbitrary sizes. At the time of writing, e.g., IBM hosts systems using 1, 5, 7, 27, 65, and 127 qubits. This means that, in many cases, significantly more qubits are available arXiv:2210.09321v1 [quant-ph] 17 Oct 2022 on an architecture than are strictly needed for mapping a quantum circuit. This is going to become even more problematic as the size-gap between newer generations of quantum computers increases. For example, IBM plans to provide quantum computers with 433 qubits in 2022 and 1121 qubits in 2023 [14]. A quick solution for this problem is to just pick a subarchitecture of the device that contains as many qubits as needed. While this keeps the search space for qubit routing as small as possible, it could be possible that incorporating more qubits than needed-effectively increasing the search space-allows for solutions requiring less overhead. Experimental results on optimal quantum circuit mapping conjectured that this is not the case [10], [11]-suggesting that optimality is preserved by restricting the search space to the bare minimum.
In this work we comprehensively settle this question once and for all by showing that considering larger subarchitectures can indeed yield better mappings. Naturally, the next step is to ask which subarchitectures should be considered during mapping so that no essential parts of the search space are cut off. Unsurprisingly, determining subarchitectures that are as small and that contain all optimal mapping solutions for any quantum circuit of a specified size turns out to be a very hard problem. Luckily, the general notion of such optimal subarchitectures is hardly needed for mapping practical quantum circuits. This work defines and analyzes minimal sets of subarchitectures that allow for optimal mapping solutions for all but the most esoteric quantum circuits with a certain number of qubits, while drastically reducing the search space in many cases. To this end, the subarchitectures are ranked according to their coverage of optimality, i.e., the number of quantum circuits that can be optimally mapped to a given subarchitecture.
The resulting software, which is available at https://github.com/cda-tum/qmap, can be used to compute various sets of subarchitectures with a trade-off between complexity and coverage of optimality. For convenience, it includes a pre-computed library of subarchitectures for common quantum computing devices. Our results considering state-of-the-art quantum computers demonstrate the benefits of using the generated sets as the basis for quantum circuit mappers-allowing to significantly reduce the overall complexity of the search space-while still ensuring that essential parts of the search space are covered for most quantum circuits.
The rest of this paper is structured as follows. Section 2 provides the necessary background in graph theory and quantum circuit mapping required to present the ideas in this work. After Section 3 introduces the problem this work aims to address, Section 4 defines two criteria that allow for the existence of better mapping solutions on larger subarchitectures and gives a complete characterization of optimal subarchitectures. Two algorithms for constructing near-optimal subarchitectures are presented in Section 5. Section 6 demonstrates the benefits of this novel method for existing quantum computing architectures. Finally, Section 7 concludes this paper.

BACKGROUND
The connectivity of qubits in modern NISQ [15] devices is described via the architecture's coupling graph. Therefore, a lot of jargon related to graph theory will be used in the discussions on optimal subarchitectures. This section briefly introduces the relevant graph-theoretic concepts as well as the basics of quantum circuit mapping. For a comprehensive introduction into graph theory the reader is referred to any standard textbook such as [16].

Graph Theory
A graph = ( , ) is a pair of a set of vertices and a set of edges ⊆ × connecting vertices. The size of a graph is the number of vertices in the graph denoted | | = | |. is called undirected if ( , ) ∈ implies ( , ) ∈ , otherwise it is called directed.

Quantum Circuit Mapping
Although the topic of quantum computing is vast and fascinating, understanding its intricacies is not required in order to understand the contents of this work. All one needs to know about quantum computing is that, as in classical computing, there is a circuit model for quantum computing. Graphically, a quantum circuit is made up of wires representing qubits and gates representing transformations of qubits denoted on the respective wires. A quantum circuit can then be written as a sequence of gates = 0 · · · | |−1 , where | | denotes the number of gates in the circuit (also called the circuits size). Quantum gates can act on individual qubits or on multiple qubits simultaneously.
Existing quantum computers usually offer a native gate set comprised of a family of singe-qubit gates complemented with some two-qubit gate (e.g. the controlled not or CNOT gate). In addition, these quantum computers often do not allow execution of two-qubit gates between any qubit pair. Instead, the target device's architecture only allows interactions between certain qubits. This restricted connectivity is expressed through the device's coupling graph = ( , ), where are physical qubits and ( , ) ∈ if a two-qubit gate can be executed between and . Coupling graphs can be directed or undirected. In the former case, executing a gate like the two-qubit CNOT on a directed edge ( , ) can only be performed with as the first and as the second qubit. In the following, we only consider undirected coupling graphs as our ideas can be straightforwardly extended to the directed case. For the sake of brevity we will use the term architecture when referring to the coupling graph of a quantum computing architecture.
To run a quantum algorithm on a target device, the logical qubits first have to be mapped to the physical qubits . A qubit assignment is an injective function : → , i.e., a function that uniquely assigns each logical qubit a physical qubit. As long as | | ≤ | |, such a mapping can always be obtained. Executing a quantum circuit = 0 · · · | |−1 on a device with coupling graph and initial assignment is only possible if all two-qubit gates of the circuit act on qubits connected on the architecture. In case this is not possible, the assignment has to be changed dynamically throughout the circuit in order for each gate of to be executable. This is generally accomplished by adding SWAP gates to the circuit, which allow to permute two qubits in an assignment.
The mapping problem for a quantum circuit is to find an initial assignment and a (potentially empty) sequence of SWAP insertions such that the entire circuit can be executed on the target architecture. We denote the optimal, i.e. minimal, number of swaps when mapping a quantum circuit to architecture with opt ( , ). Example 1. Assume the circuit shown in Fig. 1a shall be mapped to the architecture defined by the coupling graph shown in Fig. 1b. No initial assignment exists such that this circuit can be executed without inserting SWAP gates. Taking the initial assignment depicted on the left-hand side of Fig. 1c allows the direct execution of the first three CNOT gates. However, the CNOT between logical qubits 3 and 0 cannot be executed with this assignment. Inserting a SWAP between physical qubits 1 and 0 followed by a SWAP between physical qubit 1 and 2 leads to the assignment Therefore, the CNOT between 3 and 0 translates to a between 3 and 2 which can be directly executed.
It is easy to see, that mapping a circuit can always be done by choosing some initial layout and greedily inserting SWAP gates. This leads to circuits with many SWAP gates-an undesirable property on NISQ devices due to relatively high error rate of two-qubit gates. However, finding good solutions to the mapping problem is a challenging task in general and has even been shown to be NP-hard [4], [13].

CONSIDERED PROBLEM
Given an -qubit quantum circuit and an architecture (with | | ≥ ), the search space of the mapping problem is spanned by: (1) Qubit allocation: Which subarchitecture ′ of consisting of at least qubits shall be considered for the subsequent routing? (2) Qubit routing: Assuming that | ′ | qubits have been allocated, which of the | ′ |! permutationsrealizing arbitrary transitions between assignments via sequences of SWAP gates-to consider in front of every two-qubit gate?
As evident from the above, the search space in quantum circuit mapping grows exponentially with respect to the number of physical qubits allocated for the mapping process, i.e., the size of the considered subarchitecture. Thus, pruning parts of this search space is absolutely crucial for aiding mapping methods in efficiently traversing the search space. However, while limiting the search space, in general, increases the efficiency of mapping techniques (since a smaller search space is easier to explore), it bears the risk of cutting off regions which contain optimal/efficient solutions. Consequently, extra care has to be taken when (1) reducing the number of allocated physical qubits | ′ |, or (2) limiting the considered permutations during qubit routing.
Most existing techniques that try to efficiently find good mapping solutions tend to focus on the second aspect, i.e., limiting the number of considered permutations or combinations of SWAPs during qubit routing [6], [10], [17]- [22]. On the other hand, the first aspect has hardly been considered thus far.
Example 2. In order to get an impression for the qubit allocation problem, Fig. 2 shows all nonisomorphic subgraphs of the 16-qubit ibmq_guadalupe architecture-grouped by their number of qubits. Assume that a 9-qubit circuit shall be mapped to this architecture. Then, every subgraph with at least 9 qubits is a potential candidate for mapping-amounting to a total of 91 options. Ideally, one would strive to allocate as few qubits as possible, in particular only as many as there are logical qubits in the circuit. This would entail the greatest search-space reduction as only as many qubits are allocated as are strictly necessary to ensure the existence of a mapping. Cutting off parts of the search space might, however, have the unwanted effect of eliminating optimal or even efficient solutions. Experimental evaluations on optimal quantum circuit mapping suggested that this is not the case [10], [11].
This work remedies this misconception by showing that considering larger than strictly necessary subarchitectures can be beneficial when searching for efficient solutions. This shows, once and for all, that considering subarchitectures of minimal size is not sufficient. However, instead of being content with a negative result, we then explore the following problem.
Central Problem. Let ′ and ′′ be two subarchitectures of an architecture . ′ is said to possess higher coverage than ′′ , i.e., ′′ < cov ′ with respect to ∈ N if: • Any quantum circuit over qubits can be optimally mapped to ′ with no more SWAPs than are needed for mapping to ′ , i.e., opt ( , ′ ) ≥ opt ( , ′′ ). • There is a quantum circuit over qubits that can be mapped to ′ using less SWAPs than required for mapping it to ′′ , i.e, opt ( , ′ ) < opt ( , ′′ ).
If only the first property is fulfilled we write ′′ ≤ cov ′ . The problem of finding the optimal subarchitectures of for a given size is the problem of finding the smallest (with respect to the size of the subarchitectures) maximal elements with respect to < cov , i.e.,

EXISTENCE OF BETTER MAPPINGS ON LARGER SUBARCHITECTURES
In this section, we show that considering larger subgraphs can, under certain circumstances, lead to better solutions for the mapping problem. To this end, Section 4.1 and Section 4.2 establish two criteria that allow for ranking subarchitectures according to their coverage. These criteria are constructive in the sense that they allow for the definition of a method for computing good subarchitectures (with respect to < cov )-trading off subarchitecture size and, by extension, search space size for the mapping problem, and likelihood of eliminating efficient mapping solutions. Afterwards, we give a complete characterization of the smallest maximal elements with respect to < cov among all the non-isomorphic subarchitectures of a given architecture. This proves that merely considering the subgraphs ′ of an architecture with as many qubits as the circuit to be mapped can lead to situations where the optimal solution to the mapping problem is no longer contained in the search space induced by the allocated qubits. The proofs in this work require somewhat technical circuit constructions. Instead of listing the details here, an intuition of these constructions will be given. These can be generalized to arbitrary (sub-)architectures.

Subarchitectures with Shorter Connections
The first criterion is based on the observation that subarchitectures with shorter connections between certain qubits potentially allow for better mappings-even if they involve more qubits. An example illustrates the idea: Example 3. Consider again the circuit shown in Fig. 1a and assume it shall be mapped to the 5-qubit ring architecture shown in Fig. 1b. Previously, in Example 1, the circuit has been mapped to the 4-qubit line 0 − 1 − 2 − 3 , which resulted in the addition of two SWAP gates in order to satisfy the coupling constraints (as illustrated in Fig. 1c). It can be shown that this is the optimal number of SWAP operations given that only four of the architecture's qubits are considered.
If, however, the whole architecture is considered (i.e., including the idle qubit 4 ), the optimal solution just requires a single SWAP. The resulting circuit is shown in Fig. 3.
Based on the previous example, it is clear that extending a subarchitecture to a larger one might admit a better mapping for a quantum circuit if the path between some qubits is shorter in the larger subgraph. This insight suggests a natural way of ordering the subarchitectures of an architecture: Definition 1. Let the (partial) order ⪯ be defined as a relation on graphs with the following properties: Let = ( , ) and ′ = ( ′, ′ ) be two graphs. Then, ′ ⪯ if and only if: • ′ is isomorphic to a subgraph of , i.e., ′ ⊑ with subgraph isomorphism ℎ.
If there are vertices such that the inequality in the last condition is strict, we write ′ ≺ (this can only be the case if ′ ).
This order has the desirable property that ′ ⪯ if and only if the optimal mapping of an arbitrary quantum circuit to the larger architecture is at least as good as the mapping of to subarchitecture ′ , i.e., ′ ≤ | ′ | cov . The reason for this is simple: Since ′ is a subarchitecture of , any quantum circuit mapped to ′ can be mapped to in exactly the same fashion.
Moreover, this partial ordering provides a way of ranking the subarchitectures of an architecture: Theorem 4.1. Let ′ be a subarchitecture of an architecture such that ′ ≺ . Then, a quantum circuit exists that is cheaper to map to instead of ′ , i.e., opt ( , ) < opt ( , ′ ) and, by extension, Proof Sketch. The intuition behind the proof is that, given ′ ≺ , there exist vertices and in ′ that have a shorter connection in . If, during mapping, an interaction between and is required, this interaction can be realized more efficiently in due to the shorter connection. □ Example 4. Consider again the scenario from Example 3. Then, the 4-qubit line is strictly smaller than the 5-qubit ring with respect to ⪯ (i.e., line ≺ ring) since it holds that As a consequence of Theorem 4.1, there exists a circuit (e.g., the one shown in Fig. 1a) which has a more efficient mapping solution on the 5-qubit ring (see Fig. 3) as compared to the 4-qubit line (see Fig. 1c).
For any graph and subgraph ′ , the set of desirable subarchitectures D ( ′ , ) is given by the maximal elements with respect to ≺, i.e., D ( ′ , ) = : ′ ⊑ ⊑ and ′ ⊑ : This set contains all subarchitectures worth considering during mapping due to their potential of providing a better mapping solution according to the ranking defined by the order ⪯.

Subarchitectures without Shorter Connections
As shown above, a better mapping can potentially be achieved if two qubits have a shorter connection on a larger subarchitecture than the one originally considered. The natural follow-up question is: Can a single additional qubit, that does not lead to a shorter connection between some qubits, bring any improvements in mapping a particular quantum circuit? In the following, we give an affirmative answer. The main idea is that, given an architecture and a subarchitecture ′ , a larger subarchitecture ′ ⊑ ′′ ⊑ can allow for a better mapping, if it contains at least one more subarchitecture of size | ′ | that is not isomorphic to ′ . Again, an example illustrates the idea: Example 5. Instead of a 5-qubit ring (as in Example 3), consider an architecture as shown on the bottom of Fig. 4. This architecture contains two non-isomorphic 4-qubit subarchitectures as shown in the middle of Fig. 4-a "line" and a "T"-shaped subarchitecture. The quantum circuits and ′ shown on top of the subarchitectures can be mapped to the respective subarchitecture without SWAPs, while they require a single SWAP to be realized on the other subarchitecture. Now, consider the quantum circuit 4 ′4 , i.e., a circuit composed of four repetitions of each of the two circuits described above. Mapping this circuit to either of the 4-qubit subarchitecture requires at least four SWAPs (since every repetition of the circuit which was not designed for the respective subarchitecture introduces a SWAP). However, it only takes three SWAPs to transform the qubit assignment on the "line" subarchitecture to a qubit assignment on the "T"-shaped subarchitecture on the whole architecture. Therefore, considering the whole architecture allows for a better mapping than mapping to either subarchitecture.  The following theorem formalizes this observation: Theorem 4.2. Let ′ , ′′ be equally-sized (i.e., | ′ | = | ′′ | = ), non-isomorphic (i.e., ′ ′′ ) proper induced subarchitectures of an architecture (i.e., ′ ⊏ and ′′ ⊏ ).Then there is a quantum circuit that is cheaper to map to than to each individual subarchitecture, i.e., ′ < cov and ′′ < cov .
Proof Sketch. The intuition behind this proof is that, similar to Example 5, for each subarchitecture, a circuit can be constructed, that does not require any SWAPs to be executed on that subarchitecture, but will require at least one SWAP on the other subarchitecture. In addition, there is a certain number of SWAPs that is needed to transform an assignment to ′ to an assignment to ′′ on the whole architecture. If ′ ( ′′ ) is the circuit corresponding to ′ ( ′′ ), then the circuit = ( ′ ) +1 ( ′′ ) +1 is cheaper to map to than to either ′ or ′′ . □ Thus, even a single additional qubit that does not induce a shorter connection may yield a better overall mapping.

Characterizing Optimal Subarchitectures
In the above, the benefit of an additional qubit is due to different parts of a circuit being more efficiently executable on different subarchitectures. This implies that all the desirable subarchitectures need to be covered in order to not lose optimality. The following example demonstrates, that extra care needs to be taken when determining such a covering. Example 6. The architecture shown in Fig. 5 has, among others, the three 5-qubit subarchitectures labeled ′ , ′′ and ′′′ . It is immediate that ′′ and ′′′ are isomorphic. According to Theorem 4.2, there exists a 5-qubit circuit that can be more efficiently mapped to a subarchitecture of containing ′ and ′′ than to each individual subarchitecture. There are two possible options for covering both subgraphs on by either connecting ′ − ′′ or ′ − ′′′ . However, since the connection between ′ and ′′ is shorter, it has to be ensured that this graph is chosen over the alternative.
Thus, a truly-optimal subarchitecture not only needs to cover any of the desirable subarchitectures but also has to allow for the shortest possible transformation between them. The last piece of the puzzle to characterize optimal subarchitectures of an architecture is that merely considering subarchitectures still does not suffice to guarantee that the optimal solution is not lost. Example 7. Consider again the circuit in Fig. 1a. Example 3 showed that this circuit can be more efficiently mapped to a 5-qubit ring than to a 4-qubit line. In Section 4.1, this was attributed to the shorter connection between two qubits in the larger architecture. A more general observation is that any arrangement of (logical) qubits on the device can potentially be permuted more efficiently on the larger architecture. Similarly, in Example 5, the 5-qubit architecture allows for the transformation of any linear arrangement of qubits to a "T"-shaped arrangement, which was not possible on either of it subgraphs.
This brings us to the final characterization and theorem for optimal subarchitectures. Unfortunately, the precise formulation and proof of this theorem are very technical. For the sake of brevity, an informal version of the theorem is listed here. Theorem 4.3. The -qubit optimal subarchitectures· of an architecture are those that allow to realize any sequence of -qubit arrangements as efficiently as it could be realized on the whole architecture. This is an extremely restrictive requirement! There are way more arrangements of qubits than there are -qubit subarchitectures of an architecture. For example, while there is only one 4-qubit "line" subarchitecture up to isomorphism, there are twelve non-unique ways to arrange four qubits on a line. Any sequence of these arrangements needs to be realizable as efficiently on the potential subarchitecture than it would be on the whole architecture. This makes the "hunt" for optimal subarchitectures of an architecture look grim. It seems that not much is gained by characterizing optimal subarchitectures according to Theorem 4.3 as it still does not suggest a method for computing optimal subarchitectures. The real insight of this theorem is that it demonstrates just how general optimal subarchitectures are and that qubits cannot easily be neglected for the purpose of reducing the search space in quantum circuit mapping.
One might even be tempted to conclude that on any given architecture one cannot neglect any physical qubits when mapping a quantum circuit over < | | qubits without potentially excluding essential parts of the search space. However, this pessimism is misplaced, as the following simple example shows. Example 8. Consider a 5-qubit "line" architecture. Then, the optimal mapping of any 4-qubit quantum circuit requires only four physical qubits. Theorem 4.3 explains why: None of the twelve possible arrangements of four qubits on a line can be transformed into each other more efficiently using the additional qubit.
Computing optimal subarchitectures according to Theorem 4.3 is an incredibly complex problem due to the sheer number of possible arrangements. Fortunately, the requirements of Theorem 4.3 are way to strict in practice and it generally suffices to cover only the subarchitectures suggested by Theorem 4.1 and/or Theorem 4.2. How these near-optimal sets of subarchitectures are computed, is shown next. Fig. 6. ibmq_guadalupe architecture, its non-isomorphic 9-qubit subarchitectures (marked as ) and the corresponding desirable subarchitectures (with additional qubits marked as )-forming the set of subarchitecture candidates for 9-qubit circuits.

COMPUTING NEAR-OPTIMAL SUBARCHITECTURES
Based on the criteria derived in the previous section, we now demonstrate two ways of computing sets of subarchitectures to be considered for mapping which only depend on the number of qubits of the circuit to be mapped. As a result, for any particular architecture, these subarchitecture candidates can be computed a-priori without any particular information about the circuits.
According to Theorem 4.1, this set of subarchitectures is probably not a set of optimal subarchitectures since the architecture might contain "better" subarchitectures. Instead, for each of its elements, the corresponding set of desirable subarchitectures should be considered. Thus, an initial set of subarchitecture candidates Cand ( ) is given by Example 9. Consider the 16-qubit ibmq_guadalupe architecture shown on the top left of Fig. 6 and assume that a 9-qubit circuit shall be mapped to this architecture. Then, Fig. 6 shows the architecture's seven non-isomorphic 9-qubit subarchitectures (marked as ). On this architecture, the only way to decrease the distance between two qubits is to close the central ring of the architecture. In four out of seven cases, closing the ring indeed shortens the path between two qubits (marked as ). Overall, the set of mapping candidates for 9-qubit circuits Cand 9 (ibmq_quadalupe) consists of five subarchitectures ranging from nine to thirteen qubits.
According to Theorem 4.2, if a subarchitecture subsumes two non-isomorphic smaller subarchitectures, then this larger subarchitecture needs to be considered in order to not lose out on optimality. Thus, the set of optimal subarchitecture candidates OptCand ( ) is given by the smallest subarchitectures of (with respect to ⊑) that contain all subarchitecture candidates for qubits, i.e., This set is never empty, since, in the worst case, it consists of itself (the entire architecture, per definition, has all subarchitecture candidates as subarchitectures). Although, in many cases, the elements of OptCand ( ) contain less qubits. Note that these candidates are optimal in the sense of Theorem 4.1 and Theorem 4.2 as no larger subarchitectures can be constructed using these criteria that are an improvement with respect to ≤ cov . Example 10. Consider again the ibmq_guadalupe architecture from the previous example. Then, Fig. 7 shows the optimal subarchitecture candidates for 9-qubit circuits. It is easy to check, that both indeed contain all five subarchitecture candidates illustrated in Fig. 6 and that removing any of their qubits would exclude one of them. While, in this case, only a single qubit is saved compared to the whole architecture, this still constitutes a significant reduction in the search space (e.g., by a factor of 16 due to only having to consider 15! instead of 16! possible permutations).
Using the resulting set of subarchitectures as a basis for subsequently mapping quantum circuits allows to significantly reduce the overall search space while still guaranteeing that barely any essential parts of the search space have been cut off.

Adaptively Covering Subarchitecture Candidates
Although OptCand ( ) describes exactly those subarchitectures of an architecture that are optimal with respect to Theorem 4.2 and Theorem 4.1, the requirement that these subarchitectures must contain all subarchitecture candidates is a very strong one. Since the resulting subarchitectures need to encompass many non-isomorphic subarchitectures, they frequently are large in size compared to the circuit to be mapped. Theorem 4.2 implies that this requirement cannot be dropped without potentially cutting away parts of the search space potentially containing optimal solutions. However, the structure of the circuits in the proof of Theorem 4.2 is still rather "artificial" since converting between different -qubit subarchitectures in a single circuit is hardly relevant in practice. Thus, this criterion might be deliberately dropped in order to reduce the size of the subarchitectures to be considered-leaving only the subarchitecture candidates for mapping.
The number of subarchitecture candidates Cand ( ) is, in general, bounded. In particular, if a architecture with qubits has diameter , at most ( −1) 2 ( −1) qubits can be added to improve the connectivity of the circuit. As architectures for currently existing devices exhibit low connectivity, the number of qubits that can be added to improve the connectivity of an architecture tends to be quite small. However, the sheer number of candidates can grow rather large and trying out every possible one can become exceedingly expensive-even if taking parallel execution into account. Thus, it might be desirable to find a collection of subarchitectures (with a limited number of elements) that covers all the subarchitecture candidates. Definition 2. Let be an architecture and let Cand ( ) denote the set of subarchitecture candidates for -qubit circuits. Then, the set of covering candidates CovCand ( ) is given by the subarchitectures  Moreover, a subarchitecture covering Cov ( ) is a subset of CovCand ( ) with the property that for every subarchitecture candidate, there is at least one element in the covering that contains that candidate as a subarchitecture, i.e., Cov ( ) ⊆ CovCand ( ) such that Finding a minimal subarchitecture covering (with respect to the number of elements) is actually very easy, since the entire architecture, per definition, covers all subarchitecture candidates-at the disadvantage of having the largest number of qubits. In contrast, the set of subarchitecture candidates trivially forms the maximal covering-having the least amount of qubits but the highest number of candidates. In order to determine a subarchitecture covering that is as small as possible while still containing subarchitectures over as few qubits as possible, we propose the greedy algorithm as sketched in Fig. 1.
The algorithm starts off with the subarchitecture candidates as a covering and then iteratively picks a covering candidate (from smallest to largest). If the candidate covers more than a single architecture in the currently considered covering, the candidate replaces all covered architectures. This process is repeated until the size of the covering has been reduced to the desired size. This algorithm is guaranteed to terminate since, in the worst case, the entire architecture is returned.
Example 11. Once more, consider the ibmq_guadalupe architecture from the previous examples.
Then, Fig. 8 shows a four-and a two-element subarchitecture covering for 9-qubit circuits as determined by Fig. 1. While the four-element covering shown in Fig. 8a contains smaller architectures (specifically, three 9-qubit, and one 13-qubit architecture), Fig. 8b shows that all three 9-qubit architectures can be covered by a single 11-qubit subarchitecture.
Overall, Fig. 1 allows to adaptively cover all the subarchitecture candidates-offering a tradeoff between the number of subarchitectures to consider and their respective size. The computed covering ensures that all practically relevant parts of the search space (i.e., excluding the pathological cases covered by Theorem 4.2 and Theorem 4.3) are considered during the subsequent mapping.

RESULTING TOOL
All of the above findings have been used to develop a Python tool that computes subarchitectures with a high coverage for a given architecture and size. In particular, this tool allows computing optimal subarchitecture candidates as discussed in Section 5.1 and minimal subarchitecture coverings using Fig. 1. All graph computations have been performed using the retworkx library [23] which uses the VF2 algorithm [24] to solve the (sub-)graph isomorphism problem. Since the subgraph isomorphism problem is NP-hard [25], Fig. 1 is inherently an exponential algorithm (at least as long as the question of P and NP is not settled). To compute all non-isomorphic subarchitecture of an architecture, one needs to first compute all subarchitectures of which there are an exponential number with respect to the size of the whole architecture.
This tool was used to compute optimal subarchitecture candidates and minimal subarchitecture coverings for three representative quantum computing architectures: the 16-qubit ibmq_guadalupe architecture, another 16-qubit architecture consisting of two connected 8-qubit rings that form the basis of quantum computing architectures by Rigetti and a 23-qubit part of the Sycamore chip developed by Google. More precisely, Table 1 lists the total number of connected subarchitectures and non-isomorphic subarchitectures for all three quantum computers as well as the optimal subarchitecture candidates and minimal subarchitecture coverings for two different number of qubits for each device. Computing these subarchitectures took between a few seconds for the ibmq_guadalupe and Rigetti architecture to a couple of hours for the Sycamore architecture on a consumer laptop. While this is certainly a long runtime, it is important to note that subarchitectures candidates need only be computed once for a given architecture. Once the subarchitecture candidates have been determined, computation of minimal subarchitecture coverings is very efficient and can be readily integrated into any quantum circuit mapper with negligible overhead.
First, results confirm the findings illustrated before concerning the ibmq_guadalupe architecture. Since it is based on a 12-qubit ring, the optimal candidates from 8 qubits onward are all at least of size 12 because that is the point at which there are shorter connections between qubits on the ring. Therefore it is quite hard to reduce the number of qubits of the considered subarchitectures during mapping on the ibmq_guadalupe. However, because the search space in quantum circuit mapping is exponential in the number of allocated qubits, every qubit saved by using Fig. 1 significantly reduces the complexity of the mapping problem.
Things get more interesting with the 16-qubit Rigetti architecture which has a nice symmetry to it. The two central elements of this architecture are the 4-qubit ring in the middle and the 8-qubit rings attached to it. This is reflected in the covering graphs shown in Table 1, which can be roughly separated into subgraphs containing the 4-qubit ring and subgraphs containing the 8-qubit ring.
Finally, the Sycamore architecture by Google is an extreme case as it has a higher connectivity than any other superconducting quantum circuit architecture considered here. This is reflected in the large number of non-isomorphic subarchitectures contained in the 23-qubit architecture. Because of this high connectivity, one would expect that, according to Theorem 4.1, subarchitectures can be improved by adding additional qubits to complete the many 4-qubit rings present in the Sycamore architecture. And, indeed, it can be observed that, even for 13 qubits, the optimal subarchitecture candidate uses all but one of the architecture's qubits. Furthermore, it is hard to compute a small set of covering architectures. This makes the trade-off between coverage of optimal mapping solutions, complexity, and number of subarchitectures that need to be considered during quantum circuit mapping tricky. Even for the 13 qubit case, no covering with less than 97 elements can be found that does not contain a subarchitecture with more than 18 qubits. However, this is still a significant reduction from the 1153 desirable subarchitectures for 13 qubits. Overall, Table 1 demonstrates just how hard it can be to reduce the size of subarchitectures considered for qubit allocation. This fact makes the theoretical findings provided in this work and the resulting tool especially appealing because they aid in understanding and tackling this difficult problem and provide a solid foundation for handling the enormous search space for future quantum circuit mapping techniques.

CONCLUSION AND FUTURE WORK
In this work, we introduced the notion of optimal subarchitectures for mapping -qubit quantum circuits and disproved a previous conjecture that all -qubit quantum circuits can be mapped to some -qubit subarchitecture of a quantum computing device without potentially eliminating optimal mapping solutions. In fact, quite the opposite is the case: trying to reduce the number of qubits considered in the qubit allocation process without cutting off essential parts of the search space in the subsequent mapping is incredibly difficult. Despite this theoretical result, the structure of the quantum circuits that require such large optimal subarchitectures is pretty artificial and the conditions for optimality can be relaxed a bit. Hence, we introduced an algorithm for computing subarchitectures that constitute a trade-off between coverage of optimality and architecture complexity. The resulting tool is available at https://github.com/cda-tum/qmap.
Based on this first method for computing near-optimal subarchitectures, there are several possible directions for improvements: • Quantum circuits used in real-world applications naturally possess a lot of structure. It might, therefore, be possible to compute optimal subarchitectures for certain classes of quantum circuits instead of any quantum circuit of a given size. These classes can probably be deduced from two-qubit interaction patterns repeatedly found in real-world quantum circuits.
• In this work no distinction was made between isomorphic subarchitectures of a quantum computing device In reality, neither the qubits on an architecture nor the connections between them are equally reliable. Consequently, placing a certain subarchitecture on a different part of the whole architecture might yield more reliable circuit executions. Tools like mapomatic [26] exist that search for low-noise subarchitectures given an already compiled quantum circuit. Such information could additionally be included in the methodology for determining suitable subarchitecture to provide for quantum compilers that consider noise. • In order to compute (near-)optimal subarchitectures of future large-scale quantum computers, more efficient algorithms than the one initially presented here will have to be developed. A promising approach is to take advantage of the highly symmetric structure of real-world quantum computing architectures. In summary, this work has laid the groundwork for investigating the problem of computing (near-)optimal subarchitectures of state-of-the-art quantum computers. This initial work provides a jumping-off point for further methods and improvements that can help in developing quantum circuit mappers that are able to efficiently handle the mapping problem for large-scale quantum computers.