page_title: Wafer dicing
section_title: Stealth dicing
hierarchical_section_title: Wafer dicing / Stealth dicing
caption_attribution_description: English: Cross sectional micrograph of cleavage plane after stealth dicing a Si wafer of 150 µm thickness, compare M. Birkholz, K.-E. Ehwald, M. Kaynak, T. Semperowitsch, B. Holz, S. Nordhoff&#32;(2010).&#32;"Separation of extremely miniaturized medical sensors by IR laser dicing". J. Opto. Adv. Mat.&#32;12: 479-483.
context_page_description: In the context of manufacturing integrated circuits, wafer dicing is the process by which die are separated from a wafer of semiconductor following the processing of the wafer. The dicing process can involve scribing and breaking, mechanical sawing or laser cutting. All methods are typically automated to ensure precision and accuracy.
  Following the dicing process the individual silicon chips are encapsulated into chip carriers which are then suitable for use in building electronic devices such as computers, etc.
  During dicing, wafers are typically mounted on dicing tape which has a sticky backing that holds the wafer on a thin sheet metal frame. Dicing tape has different properties depending on the dicing application. UV curable tapes are used for smaller sizes and non-UV dicing tape for larger die sizes. Once a wafer has been diced, the pieces left on the dicing tape are referred to as die, dice or dies. Each will be packaged in a suitable package or placed directly on a printed circuit board substrate as a "bare die". The areas that have been cut away, called die streets, are typically about 75 micrometres wide.
context_section_description: Dicing of silicon wafers may also be performed by a laser-based technique, the so-called stealth dicing process. It works as a two-stage process in which defect regions are firstly introduced into the wafer by scanning the beam along intended cutting lines and secondly an underlying carrier membrane is expanded to induce fracture.
  The first step operates with a pulsed Nd:YAG laser, the wavelength of which (1064 nm) is well adapted to the electronic band gap of silicon (1.11 eV or 1117 nm), so that maximum absorption may well be adjusted by optical focusing. Defect regions of about 10 µm width are inscribed by multiple scans of the laser along the intended dicing lanes, where the beam is focused at different depths of the wafer. The figure displays an optical micrograph of a cleavage plane of a separated chip of 150 µm thickness that was subjected to four laser scans, compare. The topmost defects are the best resolved and it is realized that a single laser pulse causes a defected crystal region that resembles the shape of candle flame. This shape is caused by the rapid melting and solidification of the irradiated region in the laser beam focus, where the temperature of only some µm³ small volumes suddenly rises to some 1000 K within nanoseconds and falls to ambient temperature again. The laser is typically pulsed by a frequency of about 100 kHz, while the wafer is moved with a velocity of about 1 m/s. A defected region of about 10 µm width is finally inscribed in the wafer, along which preferential fracture occurs under mechanical loading. The fracture is performed in the second step and operates by radially expanding the carrier membrane to which the wafer is attached. The cleavage initiates at the bottom and advances to the surface, from which it is understood that a high distortion density must be introduced at the bottom.
  It is the advantage of the stealth dicing process that it does not require a cooling liquid. Dry dicing methods inevitably have to be applied for the preparation of certain microelectromechanical systems (MEMS), in particular, when these are intended for bioelectronic applications. In addition, stealth dicing hardly generates debris and allows for improved exploitation of the wafer surface due to smaller kerf loss compared to wafer saw. Wafer grinding may be performed after this step, to reduce die thickness.
caption: Cross sectional micrograph of cleavage plane after stealth dicing a Si wafer of 150 µm thickness, compare Ref.[3]
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