Hybrid computing apparatus of automatic connection type
United States Patent 1191 Maio et al. Apr. 1, 1975 [54] HYBRID COMPUTING APPARATUS OF 3,443,074 5/1969 Schmid 235/1504 AUTOMATIC CONNECTION TYPE 3,470,362 9/1969 Miller 235/1504 3,493,731 2/1970 Lemonde.... 235/1505 Inventors: nj Maio. unji; Shigeru 3,582,628 6/1971 Brussolo 235/1505 Watanabe, Kodaira; Noi&#39;io 3,610,896 10/1971 Heid 235/1505 Yokozawa, Fuchu, all of Japan [73] Assignee Hitachi Ltd Tokyo Japan Primary E.\&#39;aminer.1oseph F. Ruggiero Attorney, Agent, or FirmCraig &amp; Antonelli [22] Filed: Sept. 1, 1972 211 Appl. No.: 285,908 [57] ABSTRACT A hybr1d computer automatlcally connectmg a plurality of computing elements, for example integrators of 1 1 Foreign Application Priority Data an analog computer by an instruction signal from a Sept. 2, 1971 Japan 46-67637 digital computer to perform a desired computation is equipped with an automatic control system for the [52] US. Cl. 235/1505, 235/150.51 mode control of the integrators of the analog com- [51] Int. Cl. G06j 1/00 puter. When the digital computer decodes a program [58] Field of Search 235/1505, 150.51, 150.52, written in a simulation language and supplies an in- 235/150.53, 197, 150.4; 340/1725 struction signal to the automatic control system, the  
  automatic control system controls the mode of the in- [56] References Cited tegrators of the analog computer based on the instruc- UNITED STATES PATENTS Iion Signal 3,406,379 10/1968 Palcvsky et al. 235/1505 4 Claims, 4 Drawing Figures FROM DIGITAL COMPUTER SIGNAL SYIET 2 BF 2 FIG. 3  
 GENERATOR VOLTAGE SOURCE &#39;L F I G. 4  
  AuToIvIATIc DIGITAL CONTROL COMPUTER SYSTEM ANALOG COMPUTER HYBRID COMPUTING APPARATUS OF AUTOMATIC CONNECTION TYPE BACKGROUND OF THE INVENTION 1. Field of the Invention the computing time is generally longer compared with the solution by an analog computer. Consequently, if the simulation languages can be utilized as input languages to a hybrid computer of the automatic connec- The present invention relates to a hybrid computer 5 i type h are easy to h dl d hi h Speed equipped with a novel circuit for performing the funcpumfion is possible, SUMMARY OF THE INVEN- tion of a simulation language with hardware. &#34;[[ON Deserlptioh of the Prior Art An object of the present invention is, in order to ena hybrid Computer of the automatic eehheetleh able the above-described languages for the specific type one considers not only control of the connections problems f a di i l computer i l i languages) between analog computing elemeht$- but also the to be utilized as languages for a hybrid computer of the Putatleh y an analog Computing Section, the Settmg of automatic connection type, to provide a hardware sys- 3. potentiometer, the connection a solution indica- {em including analog omputing elements ontrol detion device, the settings of the integration time constant vices d h lik f h i l i l ages. BRIEF and the repetition cycle of computation, and the like SCRlPTION OF THE DRAWING can be Performed y means of a digital Computer FIGS. 1 to 3 are diagrams of parts of the circuit of the However. in Order that such a System is y for users automatic control system according to the present into handle, a language suitable for specific problems for i realizing Such a System and hardwares Corresponding FIG. 4 is a block diagram showing the fundamental thereto are ssa y construction of the hybrid computer according to the There are several reports on hybrid computers of the present invention automatic connection type. However, these reported computers employ exclusive language for controlling DESCRIPTION OF THE PREFERRED the computers and exclusive hardwares corresponding EMBODIMENTS to the languages. Therefore, these computers lack flexl- An example f h function f a i l ti language bility. is listed in the following table. The computing elements on the other hand, as an appheatleh Program of a for realizing the function are also listed therein. For exdigital computer there are so-called simulation lanm an integrator is employed f [NT d 3 h g g for Simulating an analog computer wlth a-dlgltal tion switch element is employed for FSW. These funceomputet- To date Various slmulatloh languages are I tions are different in their description depending on the khowh- These Programs are Versatlle and easy to use type of simulation language, but the operation contents that y are applicable to almost all kinds of dtgttal thereof are almost identical. The integrators, function computers. However, they have the disadvantage that Switches, etc. l d are n known one5 Table Describing Function Form Computation Analog Computing Elements Addition A D D R A B Adder Subtraction S U B R A B Sign Changer Adder Multiplication M P Y R A X B Multiplier Division D l V R A/B Operational Amplifier Multiplier Multiplication M A D R A B C D Multiplier Adder and Addition Sign Change N E G R A Digital Potentiometer Equality Sign E Q R R A 4 Automatic Connecting Device Absolute Value A B S R &#39;lAl Absolute Value Element Square Root S Q R (A) R V A Operational Amplifier Multiplier Sine S l N (A) R Sin A Sine Function Generator Cosine C O S (A) R Cos A Cosine Function Generator Tangent A T N (A) R =Tan A Tangential Function Generator Exponential Function Exponential Exp (A, B) R B-4 Generator (When B 10) Logrithm L G (A, B) R log,,A Logrithmic Function Generator (When B 10) R B (for A 0) Function F S W (A, B, C (for A 0) Function Switch Switch C, D (for A 0) Logical L S W (A, B. R B (for A: true) Switch C) C (for A: false) A N D Afl D R All B Exclusive OR E O R R (An B)I&#39;1AII B) Inclusive OR l R R An B Complement CQM R A Name of Constant C O N Partial Digital Potentiometer Name of Parameter P A R Name of Constant C F N Function Name of Parameter P F N Function R False ABB tor A program written in a simulation language is processed by a digital computer 13 and performs connection between computing elements inan analog computer l5 necessary for executing the program by an instruction signal from the digital computer 13 to start a computation as shown in FIG. 4. In this case the mode control of the analog computing elements, in particular integrators is necessary. Hitherto this control has been effected manually or by a program prepared beforehand by an operator for each problem, and hence there has been no problem in this respect. The present invention employs an automatic control system 14 for automatically performing computation only by a program written in a simulation language. As the automatic control system 14, that one which can perform all the functions listed in the above table is most desirable Now consider, as an example,  
 R= INT (A, B, C D  
 Print Out O U T Print Headers H D R Pen Recorder and Typewriter Plot P L C X Y Recorder Others, Relative to Plot Sub Program (four kinds) Integration I N T (A, B, R B JAdt Integrator C D l O 1 Com- Hold (with Individual Mode Control) P -tation Reset Com- P tation R 0 for B C L I N (A, B, A for CsBsD Limited Integral C. D) 0 for B D LlM(A, R=BforA B Limiter B, C) R A for B$AC Saturation Characteristic R C for A C Element R A B for A B Dead Zone D S P (A, B, R 0 for BsAsC Dead Zone Characteristic C) R=ACforA C Element Time Delay TDL(A,B, R=A(t-B) C) First Order Delay F T R (A, B) R A(S)/(BS l (S: Laplace Transform Characteristic Operator Function F U N (A, B) R A (B) Arbitrary Function Generator Implicit l M P Operational Amplifier Function Max., Min. M A X, M I N Noise Generator R N G Noise Generator (Gaussian Distribution) Noise Generator R N U Noise Generator (Uniform distribution) Differentiation D E R (A, R dB/dA (R C B, C) at t 0) K 1 FSW 1 b 1 1) Mono-Stable M M V Multivibrator D FSW (M N 0 P Track and Store T A S 45 E m- 5 H id 5 l WhlCh are written in a simulation language, where the ero r er 0 Comm] Function F I N (A, B) R True A23 compam functions of INT and FSW are as described in the above table. In this case it is implied that the mode control of the integrator is indicated to be performed by the output from FSW.  
  The integrator is controlled in an operation state for example, computation state, holding state, reset state or the like. This control is called mode control. The means for the mode control is contained in the integrator. The mode control is effected by an instruction signal (C D from the digital computer in such a manner that if C, l and D 1 it implies computation These situations are well known (see the above table).  
  FIG. 1 shows a circuit part of the automatic control system 14 for performing the mode control. Reference characters la to 1i designate function switches FSWl to FSWi, reference numeral 2 designates a logical gate matrix arrangement for supplying an output of an arbitrary function switch FSW on the signal line C,- or D,- connected to an arbitrary integrator INT,- in the analog computer 15, reference characters A to A and B to B designate AND gates arranged in an matrix form, and reference characters M to M and N to N designate memories connected to one input terminal of the AND gates A to A,-,- and B to B,-,- in which memories various instruction signals M to M and N to N produced by decoding a simulation language from the digital computer 13 are stored. For example, if the memory M corrresponding to the intersection of the output of the function switch 1a and the signal line C and the memory N corresponding to the intersection of the output of the function switch lb and the signal line D, are selectively set (selected to be 1), the integrator corresponding thereto and the mode of the integrator are controlled depending on the condition controlling the signal lines C, and D, that is, the signs of the outputs (the mode control signal of the integrator INT 1) of the function switches 1a and 1b.  
  When C,, and D C,, D,-; are not clearly indicated in the simulation language, there is provided not such individual controls as controls integrators individually, but such a main control as controls a plurality of integrators simultaneously. Of course, the individually controlled integrators and the simultaneously controlled integrators may be present at a time. Hardware for performing these controls are shown in FIG. 1 additionally. Reference numeral 3 designates main control lines, to the terminals C and D of which an instruction signal from the digital computer 13 is applied Reference numeral 4 designates NOR circuits, and reference characters A to A designate AND circuits. For example, if any one of the instruction signals M to N is 1, then M,,,, O and if all of the instruction signals M to N are 0, then M,,,, l. Consequently, if C D C,-, D;; and are not clearly indicated, all of the output signals M to M,,,,- from the NOR circuits 4 are 1, so that a signal appears at the terminals C and D to control the modes of all the integrators simultaneously.  
  As another example, when the integrator INT 1 is separately controlled, the NOR output M, is O&#34;because at least one of the instruction signals M to N is l On the other hand, when the integrators are not individually controlled, the NOR output M is 1&#34;, and the control of the integrator INT 1 corre sponding to the NOR output M is a main control.  
  As a further example, logical switches LSW are considered. While the function switches FSW can take both analog and digital quantities, the control of the logical switches LSW can take only the digital quantity as shown in the afore-disclosed table. Since the function of the logical switches LSW is the same as that of the function switches FSW, the logical switches LSW can be used in a similar manner to that shown in FIG. 1.  
  A similar example of the simulation language will next be described.  
 R FIN (A. B)  
 where if A a B, R l,  
 R limplies the interruption of the computation, and R l&#34;implies the continuation of the computation. In the embodiment of the present invention, all the integrators were put in a hold mode when R l and at the same time their signals were input to the digital computer to indicate the completion of the computation. In this case, though the integrators were put in the hold mode, other modes which return the integrators to their initial condition (for example, reset mode or the like) will also be sufficient. The circuit part of the automatic control system 14 for performing this operation is shown in FIG. 2. As has been described before, this circuit is most frequently used when a simulation language is employed.  
  In FIG. 2, reference numeral 5 designates comparators for decision on the end results of the computation of, for example, the integrators. The comparators 5 are provided in the analog computer 15. Reference numeral 6 designates an OR gate, reference numeral 7 designates signal lines for mode control, reference numeral 8 designates the integrators in the analog com puter 15, and reference numeral 9 designates a switch The signal lines 7 are supplied with a signal from 2 mode control signal generator (now shown). In this circuit, when any one of the comparators 5 satisfies the condition of Equation (1) and produces an output l the switch 9 is actuated by the output of the OR gate 6 to immediately supply a mode control signal, for example, a hold signal to all the integrators 8 to put their computation mode in a hold mode.  
  As another example of the simulation language, there is the following representation:  
 R FIN (T, T,-)  
  (2) where T is the time measured in seconds. When the statement of the simulation language is executed, if the computation time T exceeds T,-, for example ten seconds, R l Then, the present computation is stopped and transferred to the next computation. FIG. 3 shows the circuit part of the automatic control system 14 for performing this function. A known ramp function generator 10 which converts a time signal t into a ramp voltage comprises a potentiometer 12 and an integrator 11. To the potentiometer 12 is connected a voltage source 17 the output of which is controlled by an instruction signal from the digital computer 13 so that the slope of the ramp function T is determined. A comparator 16 is supplied with a signal T,- from a reference time signal generator 18 comprising a variable voltage source and the ramp function T. When the condition of Equation (2) is satisfied, an output signal of the comparator 16 is supplied to the analog computer 15 to put all the integrators in a hold state.  
 We claim:  
  1. A hybrid computing apparatus of the automatic connection type comprising a digital computer for producing an instruction signal, an analog computer having a plurality of analog computing elements including integrators, and an automatic control system for controlling the mode of operation of selected ones of said integrators of said analog computer in accordance with the instruction signal from said digital computer, said automatic control system including comparators for decision on the end result of the computation of said integrators, means for supplying an output of said comparators to said digital computer, means for generating a mode of operation control signal for said integrators and a switch for supplying the mode of operation control signal to said integrators in accordance with outputs of said comparators.  
  2. A hybrid computing apparatus of the automatic connection type comprising a digital computer for producing an instruction signal, an analog computer having a plurality of analog computing elements including integrators, and an automatic control system for conconnection type comprising a digital computer for producing an instruction signal, an analog computer hav ing a plurality of analog computing elements including integrators, and an automatic control system for controlling the mode of operation of selected ones of said integrators of said analog computer in accordance with the instruction signal from said digital computer, said automatic control system including a comparator for decision on computation time, a reference time setter for generating a reference time setting signal, a ramp signal generator for generating a ramp signal, means for applying the reference time setting signal and the ramp signal to the comparator, means for controlling the slope of the ramp signal by the instruction signal from said digital computer, and means for feeding an output signal from said comparator to said integrators.  
  4. A hybrid computing apparatus of the automatic connection type comprising a digital computer for decoding a program written in a simulation language and producing an instruction signal, an analog computer having a plurality of first analog computing elements including integrators, and an automatic control system including second analog computing elements different from the first analog computing elements of said analog computer, said second analog computing elements of said automatic control system each corresponding to a respective one describing forms of the simulation language for controlling the mode of the operation of selected ones of said integrators of said analog computer in accordance with the instruction signal from said digital computer.