System for converting a ratio of two signals into a logarithmic value
United States Patent Uchida 5] Apr. 15, 1975 [54] iggg r ggi gig fii ggg 22 2: 2 FOREIGN PATENTS OR APPLICATIONS VALUE 2,019,323 11/1971 Germany 324/99 D [75] Inventor: Kozo Uchida, Tokyo, Japan Primary ExaminerFeliX D. Gruber [73] Assignee: Iwatsu Electric Co., Ltd., Tokyo, Attorney Agent or Flrm Maleson Kmmelman &amp;  
 Ja Ratner pan [22] Filed: Jan. 23, 1973 [57] ABSTRACT [21] Appl. No.: 325,995 A system for converting a ratio of two input signals into a logarithmic value comprises the steps of charging a capacitor with an electronic charge which is pro- [30] Foreign Apphcatlon Pnomy Data portional to said first input signal to be compared, dis- Feb. 2, 1972 Japan 47-11328 charging through a discharge resistance for discharging the electronic charge on said capacitor, detecting 235/92 NT; 235/197; the period of time between the beginning of said dis- 328/145 charge of said capacitor and the time when the voltage 1 E C (306% 7/18; (3063 7/24 across said capacitor intersects with the voltage which Fleld 0f Seal&#39;chm 3 197, 15053 151-35; is proportional to the second input signal to be compared, and integrating the voltage of an electrical power source with said capacitor and said discharge resistance during a period which is proportional to the above-mentioned period thereby determining the logarithmic value of the ratio between said second input signal and said first input signal as the ratio between the integrating voltage and said voltage of said electrical power source.  
 4 Claims, 11 Drawing Figures 1 23 COMPARATOR V] w H SW1 2O 1p swz R SW4 0 sws 0 -27 2 l 15 4 IO SW6 3 is \/R 6/ SW3 2,6 ri I i REVERSIBLE PULSE COUNTER *GENERATOR 2 SWITCH CONTROL CIRCUIT R ZTENTEU l 51975 3.878.383  
 Sail? u G? 6 LEVEL SHIFTER L. S, I 2, 3, 4  
 Fig 36 LEVEL SHIFTER +5v L.S. 5, 6  
 INVERTER NAND GATE SYSTEM FOR CONVERTING A RATIO OF TWO SIGNALS INTO A LOGARITI-IMIC VALUE The present invention relates to a method and apparatus for converting a ratio of two input signals into a logarithmic value.  
  In the conventional level meter, two means for converting a ratio of two input signals into a logarithmic value are utilized. One means makes use of the logarithmic characteristics of semi-conductor elements, such as diodes or transistors, and the other makes use of the discharge characteristics of a resistor and a capacitor. The former has the drawbacks of temperature variation due to the characteristics of the semiconductor elements, and dispersion due to the characteristics of the composed elements, and consequently precision can not be anticipated. The latter has the drawbacks that it requires resistors and capacitors with a high degree of accuracy in the value of their resistance and capacitance, respectively, and which react with only small variations due to temperature and time. It is very difficult to satisfy these requirements and, therefore, these drawbacks lead to high cost. Further, the required measurement of the discharge time in both of the above-mentioned means requires the technique of highly accurate time measurement, including a crystal oscillator which has high accuracy and low variation with time, and this also is a cause for the high cost of the measuring apparatus.  
  An object of the present invention is to provide a novel method for converting a ratio of two input signals to a logarithmic value which overcomes the abovementioned drawbacks.  
 Another object of the present invention is to provide a novel method for converting an input signal to a logarithmic value which removes the factors which become the causes of errors in measurement, suchas variation of the resistor, the capacitor, measuring time, etc., and has high accuracy and can maintain excellent reliability and accuracy over a long period of time.  
  A further object of the present invention is to provide a method for converting a ratio of two input signals into a logarithmic value which needs no special elements and can realize the conversion simply and with low cost.  
  Further features and advantages of the present invention will be apparent from the ensuing description with reference to the accompanying drawings to which, however, the scope of the invention is in no way limited.  
  FIGS. 1A and 1B show a principle of one example of the method of converting a ratio of two input signals to a logarithmic value;  
  FIG. 2 is a block diagram of one embodiment of a method of converting a ratio of two input signals to a logarithmic value according to the present invention;  
  FIGS. 3A to 3D are detailed circuit diagrams of the block diagram of FIG. 2;  
 FIG. 4 is a block diagram of a digital voltmeter;  
  FIG. 5 is a diagram explaining the function of the digital voltmeter shown in FIG. 4;  
  FIG. 6 is another embodiment of the method according to the present invention.  
  Referring to FIG. 1A, a conventional method for converting a ratio of two input signals to its logarithmic value uses capacitor C and resistor R connected in parallel to each other, a switch SW connected in series with above-mentioned parallel circuit, and an electric source V, connected between the switch SW and the parallel circuit composed of the capacitor C and the resistor R. We assume that a terminal voltage across capacitor C is V,. when the voltage V, is supplied via the switch SW to the parallel circuit of the capacitor C and the resistor R. When the switch is on, the electrical source voltage V, equals the terminal voltage across capacitor C. When the switch SW becomes off in time t the terminal voltage V,. across the capacitor C varies with respect to time t, as shown in FIG. 1B. That is, the terminal voltage V is:  
 Assuming that a voltage to be compared to the voltage V, is V the terminal voltage V,. of the capacitor C intersects with the voltage V, in time t, as shown in FIG. 1B. That is:  
  Accordingly, when the resistor R and the capacitor C are selected in suitable values, the time r, becomes the time which is convertedi to the logarithmic value. By counting the number of pulses generated in the time t, by a pulse generator which generates pulses having suitable repetition frequency, the time t, is obtained as a digital value. One of the problems of such conventional technique is the necessity of the high accuracy of the capacitor C and the resistor R. That is, the values of the capacitor C and the resistor R are required to have no variation with time, temperature and humidity. It is very difficult to satisfy such condition and this results in high cost. Further, a crystal oscillator having high accuracy and no variation with time is necessary for measuring the time 1,. This is also a factor which increases the cost of the measuring apparatus.  
  FIG. 2 shows one embodiment of the principle according to the present invention. The circuit shown in FIG. 2 comprises a first input terminal 11 to which the first input signal V, is supplied, a second input terminal 12 to which the second input signal V is supplied, a capacitor C14 for charging electric charges proportional to the first signal V,, a discharging circuit including a discharge resistor R15 for discharging the charges on said capacitor C and a reference signal source 16. The discharging circuit is connected to the first input terminal 23 of a comparator 21, the second input signal V to be compared is supplied to the second input terminal 22 of the comparator 21. The output of the comparator 21 is supplied to a reversible counter means 25, a pulse generator 26 which generates pulses with predetermined constant period is connected to the reversible counter 25, and the output of the reversible counter 25 is connected to a switch control circuit 24. The information of the switch control circuit 24 is fed back to the reversible counter means 25, a switching means SW -SW, or 1-6 is composed of a plurality of switches and is controlled by the output 30 of the switch control circuit 24. Converted logarithmic output V is obtained on a terminal and an electric source 16 is a reference voltage V The capacitor 14 and resistor 15 define a time constant CR. An amplifier has large gain and the phase of its input and its output are in reverse relation. The comparator 21 has two input terminals 22 and 23, and when two signals which are respectively applied to the terminals 22 and 23, become of equal level, an output signal is sent out to the line 27, and applied to a reversible counter 25. A pulse generator 26 generates a series of pulses with predetermined constant period, and the generated pulses are supplied to the reversible counter 25. The output of the reversible counter controls, via a conductor 28, a switch control circuit 24 whose information is fed back via a conductor means 29 to down count reversible counter 25. A group of switches shown in FIG. 2, that is, switches SW,SW.,, are controlled by the switch control circuit 24. Table 1 shows the time relations of switches SW,-SW with regard to each of the periods T -T,.  
  In the circuit shown in FIG. 2, in the period T as shown in Table 1, switches SW SW and SW are on, and the switches SW SW, and SW are off. This corresponds to a circuit construction similar to FIG. 1A but where switch SW is on. As a result of this, the terminal voltage V across the capacitor C equals to an input signal voltage V 2. Period T When, in the time 1,, the switch SW and switch SW become on and switches SW SW SW SW become off, the voltage V across the capacitor C begins the period T that is, to discharge with a time constant RC as shown in FIG. 1B and Equation 1. At the same time as the beginning of the period T,, a signal is sent out from the switch control circuit 24 via line 29 to the reversible counter 25, and the counting of the pulses sent from the pulse generator 26 is begun. After the time r, from beginning the period T the voltage V supplied to the input terminal 23 of the comparator 21 intersects with the voltage V At this time, the comparator 21 sends out the signal via the line 21 to the reversible counter 25, which stops the counting of the pulses from the pulse generator 26. We assume that the number of pulses counted by the reversible counter during theperiod T is n.  
 3. Period T In the period T switches SW SW andSW become on and switches SW SW and SW become off. During this period, the capacitor 14 is discharged, and the voltage V on the output terminal 10 is zero.  
 4. Period T During the period T switches SW and SW, become on and switches SW SW SW and SW become off. During this period, the capacitor 14, the resistor 15 and the amplifier 20 constitute an integrator having a time constant CR and integrate the output voltage V of the electrical power source 16 and the voltage appearing on the terminal 10 increases linearly. At the same time when the period T, begins, the switch control circuit 24 sends a signal via line 29 to the reversible counter 25 and activates the reversible counter 25. The reversible counter, which contains the number of counts n at the end of the period T,, reversibly counts said number of counts by using the pulses of the pulse generator 26. That is, by using the pulse of the pulse generator 26, the count proceeds from n to zero. Then, when the count becomes zero, the output voltage V on the terminal 10 When the count becomes zero, the reversible counter 25 sends a signal via the line 28 to the switch control circuit 24.  
 5. Period T,  
 That is, the logarithmic ratio between the voltages V, and V is converted to the voltage ratio between V and V As clearly shown in the Equation 5, the values of the capacitor 14, the resistor 15 and the time r, are eliminated. This means that the conversion accuracy is not affected by any factor if the value C of the capacitor 14, the value R of the resistor 15 and the period of the pulse generated in the pulse generator 26 are held constant during the periods T T T T and T As to this, it is very easy to hold these values constant during the very short time of one conversion and, therefore, the accuracies of the absolute values of the resistor R, the capacitor C and the period of the pulses are not necessary.  
  Then, by suitably selecting the value of the voltage V the output voltage V indicates the decible value itself. That is, from the Equation 5 the following relation can be obtained:  
 Further, the Equation 6 becomes:  
 As log 10 2.3026, then selecting the value of V as a reciprocal of log 10 that is:  
 V log e 0.4343  
 the Equation 7 becomes:  
 By selecting the value of V as mentioned above, the value of V is easily dealt with, as the thus obtained logarithmic output V can be converted to a digital value.  
  It should be clear from the explanation concerning FIG. 2, input and output of the signal from the comparator 21, the reversible counter 25 and the switch control circuit 24 is not limited to the example shown in FIG. 2. For example, the output of the comparator 21 can be applicable to the switch control circuit 24 at the same time that said output of the comparator 21 is supplied via the line 27 to the reversible counter 25. It is also possible that the output of the comparator 21 controls the switch control circuit 24 by connecting the line 27 from the output of the comparator to the switch control circuit 24 and the output of the switch control circuit 24 controls the reversible counter 25. Further, a hold circuit which holds the output voltage V obtained on the output terminal can be added.  
  FIGS. 3A-3E are descriptive of one embodiment of the block diagram shown in FIG. 2. Reference numerals correspond to those of FIG. 2. Referring to FIG. 3A, the output of the comparator 21 is supplied via line 27 to the switch control circuit 24. And V hold circuit which holds the output voltage V obtained on the output terminal 10 is added. Referring to FIG. 3A, 74190, 7490 and 7442 indicate the type number of the integrated circuit which are manufactured by Texas Instrument Co. Ltd., in the USA.  
  The ratio between voltages V and V can be obtained by using a well known dual slope type digital voltmeter [for example, Technical Report of the Institute of Electrical Engineers of Japan (Part II) No. 1 1, Committee of Digital Measuring Instruments of the Institute of Electrical Engineers of Japan, Digital Electric Voltmeter pages 3037, published September, 1970].  
  FIG. 4 will now be explained. The voltages V and V supplied to the input terminals 101 and 102 are respectively supplied via switches 103 and 104 to a preamplifier 105 having an amplification factor 11. The output of the preamplifier 105 is supplied to an integrator which is composed of a resistor 106 having a value of resistance R a capacitor 107 having a value of capacitance C and an amplifier 108 having a sufficiently large amplification factor. The output of the abovementioned integrator is applied via a comparator 109 to a counter 111. The output of a pulse generator 110 which generates pulses with constant period is applied to the counter 111 which counts said pulses. The output of the counter 111 is applied via a line 114 to a switch control circuit 115. The outputs 1 16 and 117 of the switch control circuit 115 respectively control the switches 103 and 104.  
  Referring to FIG. 4, the switch 103 is on and the switch 104 is off during the period T as shown in Table Then the voltage having a waveform shown in FIG. 5 appears on the output terminal of the amplifier 108. When the output of the amplifier intersects zero level, the comparator 109 sends a signal placing the counter in an operating condition so as to count the number of pulses generated by the pulse generator 110. When the number of the counted pulses reaches a predetermined numberN, the output of the counter 111 is supplied via line 114 to the switch control circuit 115. The switch 103 becomes on and the switch 104 becomes off as shown in Table 2, and the period T begins. Then the voltage V having a reverse polarity to the voltage V and being supplied to the terminal 102 is integrated and intersects zero line again. The counter 111 counts M pulses during the period T and the counted value M is obtained on the terminal 112. By the above-mentioned operation, the following equation is obtained from FIG. 5:  
 The Equation 10 becomes:  
 N =logl0log V2 (I I) When a suitable value of N is selected, the value M becomes the converted logarithmic value. For example, multiplying the equation (11) by 20/logl0 8.686  
 the Equation 11 becomes By selecting N 8686, that is, when the counter 111 counts 8686 of the pulses generated in the pulse generator the period ty transfers to the period I M indicates 0.00ldB (voltage ratio or current ratio) per 1 count. If we select N 869, M designates 0.01dB per 1 count.  
  Multiplying both sides of the Equation II by lO/loglO 4.343, the Equation 1 1 becomes:  
 ZIZ  
 can be realized by using the integrating digital voltmeter utilizing pulse width modulation [Technical Report of the Institute of Electrical Engineers of Japan (Part II) No. l 1, Committee of Digital Measuring Instruments of the Institute of Electrical Engineers of Japan Digital Electric voltmeter pages 34-38, published October, 1970] or the digital tester utilizing an analog to digital converter [Dempa Kagaku, Vol. 452, lchiro Haga: General View of VOAC 77 Fabricated in Iwatsu, pages 133-139, published by Japan Broadcast Publishing Company Ltd., April, 1971].  
  The digital voltmeter explained in FIGS. 4 and 5, the above-mentioned integrating digital voltmeter utilizing pulse modulation and the digital tester utilizing an analog to digital converter each include a pulse generator, a counter, a comparator etc., and these elements can be commonly used in the embodiments of the present invention.  
  FIG. 6 is another embodiment of the present invention for obtaining the logarithmic output V Referring to FIG. 6, 1-6 indicate switches, 17 is a resistor having a resistance value R 18 is a capacitor, and the other reference numerals used are the same as those of FIG. 2.  
  As shown in Table 3, in the period T switches 2, 4 and 6 are on and switches 1, 3 and 6 are off. Then the capacitor 18 is charged with the voltage and this charged value is stored.  
 During the period T switches 1 and 4 are on and switches 2, 3, 5 and 6 are off. Then the capacitor 14 is charged with the voltage.  
  Next, during the period T,, the switch 4 is on, and the other switches are off, the charge on the capacitor 14 is discharged by the resistor R as shown below,  
 and this voltage is supplied to the input terminal 22 of the comparator 21. When this voltage intersects with the voltage applied to the input terminal 23 of the comparator 21, that is, the voltage the comparator sends the output signal to the reversible counter 25. As a result of this, the following equation is obtained.  
  Referring to the above equation, the time t, concerns, as in the case of FIG. 2, the time that the comparator 21 sends the output signal to the reversible counter 25. This time t, is memorized in the reversible counter 25.  
  Next, during the period T the switch 5 is on, and the other switches l, 2, 3, 4 and 6 are off. Then the charge on the capacitor 14 is discharged.  
  In the period T the switch 3 is on and the other switches l, 2, 4, S and 6 are off. In this period, similar to the case of FIG. 2, the output voltage V of the electrical source 16 is integrated during the time T, by the operation of the reversible counter 25 and the pulse generator. Then the voltage V,, shown in the Equation 4 is obtained on the output terminal 10.  
  In the above-mentioned state, the period T, begins, all switches l-6 become off, and the voltage V shown in Equation 4 is held on the output terminal 10.  
  In the example shown in FIG. 2 and FIG. 6, the reversible counter 25 is utilized for counting the time 1,,  
 7 however, the counting means is not limited to the re- If the Equation 13 is inserted into the Equation 3, the following equation, corresponding to theEquation 5, can be obtained.  
 VII R Referring to FIGS. 2 and 6, the repetition&#39;frequencyf of the pulses which are supplied from the pulse generator 26 to the reversible counter 25 during the period T;, can be selected as 2 times the frequency f during the period T,, that is f3 fl then the value of k becomes k 0.5. Or it is also easy to select 2f =f,, that is, k 2.  
 The reversible counter 25 is used in FIGS. 2 and 6.  
 If we use one counter and one reversible counter, instead of the reversible counter 25 and the counter counts from O to 11 during the period T and the reversible counter counts from to n and from n to 0 during the period T the value of k can be selected as k 2.  
  Further, referring to the above explanation the voltages V, or V can be commonly used as the voltage V of the electrical power source 16.  
  As should be clear from the above explanation, according to the present invention, the variations of the values of the resistor and the capacitor, or the necessary condition for the accuracy of the time measure ment, which were the causes of the errors can be completely removed and a high accuracy can be anticipated. Further, very low cost also can be attained and, therefore, the effects of the present invention are considerable.  
  Considerable effects can be anticipated by applying the present invention to the conventional level meter, that is, to the portion where an input alternate signal converts to a direct current signal and this converted direct current signal to the logarithmic value.  
 What is claimed is:  
  1. Circuit arrangement for converting a ratio of two input signals to a logarithmic value comprising a first input terminal to which a first input signal is supplied, a second input terminal to which a second input signal is supplied, a common terminal for said first and second input terminals, a capacitor adapted to be charged to a value proportional to said first signal, a first switch (SW,) which is connected between said first input terminal and said capacitor, a discharging resistor which is connected to said capacitor for discharging said capacitor, a second switch (SW which is connected between said first switch and said discharging switch, a third switch (SW which is connected between said capacitor and ground, an amplifier whose input terminal is connected to a connection point of said resistor and said capacitor and whose output terminal is connected via a fourth switch (SW to a connection point of said capacitor and said third switch, a fifth switch (SW which is connected in parallel to said&#39;capacitor, a sixth switch (SW which is connected between ground and a connection point of said second switch and said discharging resistor, an output terminal which is a connection point of said capacitor and said third switch, a comparator whose first input terminal is connected to said first switch, whose second terminal is connected to said second terminal and whose output terminal is connected to a reversible counter, a pulse generator which generates pulses with a predetermined constant period and is connected to said reversible counter, a switch control circuit which is connected to said reversible counter and controls said switches (SW,SW in such a manner that:  
 PERIOD SW SW SW SW SW SW,  
 T,, ON OFF ON OFF OFF ON T, OFF OFF ON OFF OFF ON T- OFF OFF OFF ON ON ON T OFF ON OFF ON OFF OFF T, OFF OFF OFF ON OFF ON a. when the discharging circuit begins to discharge said capacitor, said switch control circuit sends a signal to said reversible counter which thereupon begins to count forwardly the pulses sent by said pulse generator,  
 b. when the voltages applied to said first and said second input terminals of said comparator reach an equal value, said comparator sends a signal to said reversible counter so as to stop said counter,  
 said switch control means constituting a circuit integrating the voltage from said power supply source, and said reversible counter begins to count in reverse the pulses sent by said pulse generator, when the count by said reversible counter becomes zero, the output voltage of said capacitor is held and then the logarithmic value of the ratio between said second input signal and said first input signal is determined by the ratio between the output of said capacitor and said voltage from said electric power source.  
 2. Circuit arrangement for converting a ratio of two input signals to a logarithmic value comprising a first input terminal to which a first input signal is supplied, a second input terminal to which a second input signal is supplied, a common terminal for said first and second terminal, a first capacitor coupled to said first input terminal for charging to a value proportional to said first input&#39;signal, a second capacitor coupled to said second input terminal for charging to a value proportional to said second input signal, a discharging resistor for discharging said second capacitor, a first switch which is connected to said first input terminal, a second switch which is connected to said second input terminal, an integrating resistor which is connected between said first switch and said second capacitor and said charging resistor, a third switch connected between a source of electrical power and said resistor, a fourth switch connected between said resistor and said capacitor, an amplifier whose input terminal is connected to a connection point of said second capacitor and said resistor and whose output terminal is connected to a connection point of said second resistor and said fourth switch, a fifth switch which is connected between said input and output of said amplifier, a sixth switch which is connected between said fifth switch and said first capacitor, a comparator whose first input terminal is connected to said first capacitor, whose second terminal is connected to said second capacitor, and whose output terminal is connected to a reversible counter, a pulse generator which generates pulses with a predetermined constant period and is connected to said reversible counter, a switch control circuit which is connected to said reversible counter and controls said switches (SW -SW in such a manner that:  
 PERIOD 1 2 3 4 5 6 T,, OFF ON OFF ON OFF ON said capacitor said switch control circuit sends a signal to said reversible counter and said reversible counter begins to count forwardly the pulses sent by said pulse generator,  
 when the voltages applied to said first and said second input terminals of said comparator reach an equal value. said comparator sends a signal to said reversible counter so as to stop said counter,  
 said switch control means constituting a circuit integrating the voltage from said power supply source, and said reversible counter begins to count in reverse the pulses sent by said pulse generator, when the count by said reversible counter becomes zero, the output voltage of said capacitor is held and then the logarithmic value of the ratio between said second input signal and said first input signal is determined by the ratio between the output of said capacitor and said voltage of said electric power source.  
 A system for converting a ratio of two input signals into a logarithmic value comprising the steps of:  
  charging a capacitor C to a voltage value proportional to the first input signal to be compared,  
  discharging said capacitor C and comparing the voltage on said capacitor and the voltage proportional to said second input signal,  
 counting constant frequency pulses from 0 to n between the time of the beginning of the discharge of said capacitor and the time when said compared voltages are equal,  
 d. then reversingly counting said pulses from n to 0,  
 and  
 f. integrating a reference voltage from an electrical power source during the period when said pulses are reversely counted from n to 0, thereby determining the logarithmic value of the ratio between said second and first input signals as the ratio between said integrated voltage and the voltage from said electrical power source.  
  4. A system for converting a ratio of two signals into a logarithmic value comprising the steps of:  
 a. beginning at the start of a given time interval the discharge of a circuit having a predetermined time constant,  
 b. producing a series of pulses having a predetermined constant period,  
 c. beginning the counting of said pulses at said start of said interval,  
 d. comparing said two input signals until simultaneous equal amplitudes in both signals are detected,  
 e. stopping the counting of said pulses at a number determined by said detection of said equal amplitudes,  
 f. beginning the integration of a reference voltage when said counting stops, and  
 g. counting said number of pulses from the beginning of said integration until said count is completed,  
 whereupon an output signal corresponding to said integrated voltage and being representative of said logarithmic value is obtained.  
  UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION PATENTJNO. 1 3,878,383 DATED 1 A ril 15, 1975 INVENTOR(S) Kozo Uchida it is certified that error appears in the ab0veidentitied patent and that said Letters Patent are hereby corrected as shown below:  
  Claim 1., line 12, delete &#34;first switch and said discharging switch&#34; and insert --discharging resistor and said common termina].--.  
 Claim 3, line l4, change f.&#34; to -e.-  
 Signed and Scaled this twenty-fifth Day of November 1975 [SEAL] A ttes t:  
 RUTH c. u sou c. MARSHALL DANN Arresting 0]]!(67 Commissioner ofPatenIs and Trademarks