Thin film resistor crossovers for integrated circuits
United States Patent H 1 [111 3,876,912  
 Sanders Apr. 8, 1975 [5 THIN FILM RESISTOR CROSSOVERS FOR 3.381.255 4/ i968 Youmans 338/308 INTEGRATED CIRCUITS 3392.051 7/ 1968 3.560.256 2/197] [75] Inventor: Thomas J. Sanders, lndialantic, Fla. 3, 15,949 10 1971 [731 Assignee: Harris-lntertype Corporation,  
  Cleveland, Ohio Primarv E.\&#39;aminer-E.&#39;A. Goldberg l d. 7,1 [22] e Aug 2 973 Attorney, Agent, or Fzrm-Ftdelman, Wolffe &amp; Leltner 211 Appl. No.: 391,572  
 Related US. Application Data [62] Division of Ser. No. 273,939. July 2], l972, Pat. No.  
 [57] ABSTRACT Thin film resistors with metal connector crossovers are fabricated on smooth nonconducting materials.  
  317/101 A; 3l7/l0l CE; 338/309; The thin film resistor crossover regions are delineated 5 I I Cl 3. by a photo-resist emulsion. After deposition of an ink &#39;gz A 101 CE sulator, the photo-resist material is chemically removed, leaving insulating material only in the crossover regions. Metal connectors and interconnectors are applied and delineated to the resistor and over the 338/308, 309, 254, 334; ll7/2l7 [56] References cued insulator respectively.  
 UNITED STATES PATENTS 3.200.326 10/1965 Pritikcn 3l7/l0l A 4 Claims, 3 Drawing Figures 34 2o Si 02 I0 SUBSTRATE FIG. I  
 SUBSTRATE |O FIG. 2  
 SUBSTRATE SUBSTRATE THIN FILM RESISTOR CROSSOVERS FOR INTEGRATED CIRCUITS This is a division of application Ser. No. 273,939, filed July 21, l972, now US. Pat. No. 3,779.841.  
 BACKGROUND OF THE INVENTION The invention relates generally to the field of microelectronics, and more particularly to a method for fabricating improved crossovers for thin film resistors.  
 DESCRIPTION OF THE PRIOR ART It is often desirable in integrated circuit design to use thin film resistors. However, the use of these resistors makes the chip layout quite difficult because metal interconnector lines cannot cross over them, since they are located on the surface of the substrate, without making an unwanted connection to the resistor. Diffused resistors do not have this problem since they lie below the insulating surface of a multilevel system. Multilevel interconnect systems can solve this problem on large complicated circuits including thin film resistors; however, on medium and small circuits the extra area needed for the first to second level metal feedthroughs and the extra processing needed makes multilevel interconnect impractical in many cases. The process of the present invention allows metal interconnect lines to crossover thin film resistors and does not have many of the disadvantages associated with multilevel interconnect.  
  Crossover techniques of the prior art have included point-to-point wiring and interlayer connections. Pointto-point wiring not only requires twice the time in manufacturing, but the possibility of technician error is great. Multi-layers of conduction patterns, each layer being insulated from the adjacent layer by an intervening dielectric layers, are commonly used in the innterconnection of regions of semiconductor chip. Such multilayer structures have had low yield due to the breaking of the conductors or due to the inadvertent shorting of one conductive layer to another conductive layer through pinholes or cracks in the intermediate dielectric.  
  A major problem in. the area is the cheap and effective production of a thin filmed circuit element with effective insulating barriers at crossover points. The insulator must be thick enough to isolate the crossing element from the thin filmed element and not be so thick as to cause irregularities in the conductor so as to make it susceptible to breaking.  
 SUMMARY OF THE INVENTIO The present invention overcomes the problems of the multilayer prior art devices in presenting thin filmed elements with insulating crossovers which are not susceptible to cracking. According of the present invention, crossovers are accomplished by depositing an insulator on the thin filmed resistor at the point of crossover. The crossing conductor is deposited over the insulator.  
  The entire process is accomplished ona smooth, nonconductive material as a base substrate. A thin film resistive material is applied and delineated by a direct or reverse etching technique. The next step is to apply a dielectric material which covers all of the resistor except the very ends where contact is made with metal connectors. Metal interconnectors can now cross over the resistor and not make contact with it except as connectors at the very ends. The metal interconnectors and the metal connectors are then deposited and delineated to complete the structure.  
  The dielectric between the thin film resistor and the interconnectors must be pinhole-free and have a breakdown voltage larger than the highest voltage applied to the circuit. The dielectric must also be thin enough so that the metal interconnectors ca&#39;n crossover it without causing discontinuities. The process described allows metal interconnectors to cross over thin film resistors and does not have many of the disadvantages associated with the multilevel interconnects of the prior art.  
 OBJECTS OF THE INVENTION An object of the present invention is to provide a simple highly reliable method of fabricating crossovers for microelectronic circuits.  
  It is another object of the present invention to provide a low cost crossover useful in integrated circuitry in which there is substantial reduction of fabrication steps and time.  
  It is a further object of the invention to provide a reliable circuit crossover of thin film elements like thin film resistors.  
  Other objects, advantages, and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawmgs.  
 BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1-3 perspective views of the successive stages of development in the fabrication of thin filmed resistors with insulated metal crossovers.  
 DESCRIPTION OF PREFERRED EMBODIMENT Referring to FIG. 1, a thin film resistor 30 is shown laminated to a smooth, nonconducting material 20 and substrate 10. The original substrate 10 is coated with a nonconductive material 20 such as SiO but any relatively smooth nonconductive material will work for this purpose. The SiO can be formed on a silicon substrate by oxidizing the silicon in a steam ambient at l,l00C. for about 1 hour. Alternative nonconductive materials can include glass and glazed or unglazed ceramic.  
  After insulating the substrate 10 with material 20, the fabrication of a thin film resistor is commenced. Preferably a nickel-chromium resistor 30 is deposited by vacuum evaporation to form a thin film. Alternatively, the thin film resistor may be formed by vapor plating tin oxide, by sputtering tantalum or vaccum evaporating aluminum or chromium. Film thickness in the range of 200-300 angstroms are typical. The final form of resistor 30 as shown in FIG. 1 can be obtained by delinearization using direct or reverse etching of the photoresist material. A layer of photo-resist is uniformly applied, developed to the desired pattern and chemically etched to remove unwanted resistive material. Alternate methods of forming the thin film resistor 30 are deposition using silk screen and evaporation through a mask. Other examples of resistor materials are CrSi and MoSi which are also deposited by vacuum evaporation.  
  The next step is to define the areas of the resistor which are to be insulated from the metal interconnectors. Preferably this is achieved by the application of a photo-resist emulsion and its delineation. A positive photo-resist such as Shipley can be used and has provided excellent results with glass substrates. The photoresist may be applied by brushing, dipping, spraying, spinning or other coating techniques. Once applied, the photo-resist is exposed using a mask and developed such as to define the areas to be insulated, which include the center of the resistor and a small adjoining part of the substrate. Thus the whole substrate, including the ends of the resistor, are covered by the photoresist material at this point in the process with a pattern defined thereon. A negative photo-resist can also be used.  
  Next a suitable insulating material is deposited over the entire structure at a temperature low enough so that the chemical properties of the photo-resist material are not appreciably disturbed. This process step is preferably carried out at 100C., but other temperatures below 200C. have been found to be satisfactory. The insulator chosen for this application is SiO, but other insulating materials such as MgO, BeO, A1 TiO SiO and Si N can be used. SiO is generally deposited by vacuum evaporation. The other insulators may be deposited by electron beam vacuum evaporation, sputtering, or by a spin-on emulsion technique. After the insulator deposition, the photo-resist emulsion is chemically removed from the substrate, taking with it the overlaying insulating material, and leaving an insulator on the substrate and resistor whose pattern corresponds to the pattern defined by the selective exposure of the photo-resist. In the case of Shipley photoresist, acetone is used to chemically remove the material.  
  Thus the configuration of FIG. 2 results with insulator 40 overlapping resistor 32 at the crossover points and leaving exposed ends 34 and 32 to which metal connectors will later be connected. The thickness of this insulator 40 need only be a few thousand angstroms for example, 1,000 to 3,000 angstroms so that the metal interconnectors which will cross over the resistor and the insulator can easily cross over the structure without breaking at the edges of the insulator. However, it must be thick enough so that good isolation is achieved between the resistor and the metal interconnectors crossing over it. The insulator must be pinhole-free and have a breakdown voltage larger than the highest voltage applied to the circuit.  
  In the final step, the interconnector and connector metals and deposited and delineated by conventional means, such as silk screening, physical masking, direct photo-resist or inverse photo-resist, resulting in the structure of FIG. 3. The metal crossing over the resistor at the insulator 40 are the metal interconnectors 52. Metal connectors connecting the ends 32 and 34 of the resistor to the appropriate points in the circuitry are connectors 54 and 56, respectively. The only restriction on the interconnectors and connectors process is that it be compatible with the resistive material and the insulator material used and that the interconnectors and connectors have sufficient adherence to the other materials used.  
  Typically, aluminum of approximately 10,000 angstroms is applied, but other conductive metals such as molymanganesegold combinations may be used. Alu- 6 minum is probably the most satisfactory contact metal for nickel-chromium resistors because the contact exhibits ohmic behavior and adheres satisfactorily to the resistor. Preferably, a direct photo-resist technique is used to apply and delineate the aluminum connectors and interconnectors. Aluminum is deposited over the entire substrate, followed by a coat of photo-resist. The photo-resist is exposed through a mask and etched to achieve the desired pattern for the connectors and interconnectors as shown in FIG. 3.  
  The crossovers produced by the present method have been evaluated to determine their effect on use in a high frequency, high impedance circuit. A typical thin film resistor achieved were linear and exactly 200 ohms-square, which was the design value. The breakdown voltage was approximately 200 volts. The above process produces thin film resistors with insulated metal interconnect crossovers without the use of multi layer interconnecting systems and without the associate disadvantages. The method of fabrication is efficient, simple and economical and produces a product of high reliability.  
  Although the invention has been described and illustrated in detail, it is to be clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of this invention being limited only by the terms of the appended claims.  
 What is claimed is:  
  1. An integrated circuit including a thin film resistor comprising:  
 a silicon substrate;  
 a first dielectric layer overlying said substrate and adherent thereto;  
 said thin film resistor in the form of a strip of electrical resistance material having substantially uniform thickness in the range of 200-300 angstroms and substantially uniform width throughout its length, overlying said first dielectric layer and adherent thereto;  
  second dielectric layer of substantially uniform thickness in the range of 1,000-3,000 angstroms overlying said thin film resistor intermediate the length thereof and adherent thereto, and having a substantially uniform width slightly greater than that of said thin film resistor to overlie said first dielectric layer in adherent relationship therewith at both sides of said thin film resistor, and said second dielectric layer having a length shorter than that of said thin film resistor to expose the end portions thereof; and a plurality of substantially parallel spaced apart electrically conductive strips extending transversely across said thin film resistor, two of said conductive strips overlying and in adherent electrical contact with the respective ends of said thin film resistor, and a further one of said plurality of conductive strips overlying said second dielectric layer and adherent thereto to form a conductive crossover for interconnecting desired points of said integrated circuit while electrically insulated from said thin film resistor, each of said conductive strips extending beyond the sides of said thin film resistor in direct adherent overlying relationship with said first dielectric layer thereat.  
  2. An integrated circuit as in claim 1 wherein said second dielectric layer is pinhole free.  
  3. An integrated circuit as in claim 1 wherein said thin film resistor is CrSi MoSi or NiCr.  
  4. An integrated circuit as in claim 1 wherein said first dielectric layer is SiO and said second dielectric layer is SiO PATENT NO.  
 DATED line 3, S110 UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION $3,876,912 April 8,1975  
 TINV&#39;ENTOMS)? Thomas J. Sanders It isrcertifi ed that error appears in the above-identified patent and that said Letters Patent 1 are hereby corrected as shown below:  
 In claim 4, line 2, &#34;SiO&#34; should be -SiO and in s hou1d be SiO-.  
 RUTH C. MASON C. MARSHALL DANN Arresting Officer Commissioner oflamus and Trademark;  
  UNITED STATES PATENT OFFICE CERTIFICATE OF (IORRECTION PATENT NO. 3 876 2 DATED April 8, 1975 INVENTOMS) 1 Thomas J. Sanders It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:  
 In claim 4, line 2, &#34;SiO&#34; should be SiO and in line 3, &#34;Si0 should be -.-SiO-.  
 Signal and ficalccl this twenty-second Day Of June 1976 [SEAL] RUTH C. MASON Arresting Officer C. MARSHALL DANN Commissioner nflatenls and Trademarks