Exposure control system for cameras
United States Patent [191 Ichinohe et al.  
 [111 3,877,039 1 Apr. 8, 1975 1 EXPOSURE CONTROL SYSTEM FOR CAMERAS [73] Assignee: Matsushita Electric Industrial Co., Ltd., Osaka, Japan [22] Filed: Nov. 20, 1972 [21] App]. No.: 307,969  
 [30] 1 Foreign Application Priority Data Nov. 24, 1971 Japan 46-94775 Nov. 24, 1971 Japan 46-94794 Nov. 24, 1971 Japan 46-94795 Nov. 24, 1971 Japan 46-94796 Aug. 9, 1972 Japan .l 47-80209 Aug. 9, 1972 Japan 47-80210 Aug. 9, 1972 Japan 47-80211 Aug. 9, 1972 Japan 47-80212 Aug. 9, 1972 Aug. 9,1972 Apr. 25,1972 Apr. 25, 1972 Apr. 25,1972 Apr. 25,1972 Apr. 25, 1972 Apr. 25, 1972 Apr. 25,1972 v Apr. 25,1972 Japan ..47-41844 [52] US. Cl 354/24; 354/51 [51] Int. Cl. G031) 7/08 [58] Field of Search 95/10 CT; 354/24, 51  
 R5| R52 R [56] References Cited UNITED STATES PATENTS 3,670,637 6/1972 Mori et a1 95/10 CT 3,678,826 7/1972 Mori et a1 95/10 CT 3.679.905 7/1972 Watanabc 95/10 CT 3,690,230 9/1972 Mori et a1 95/10 CT 3,736,851 6/1973 Ono et a1 95/10 CT FOREIGN PATENTS OR APPLICATIONS 44-19747 8/1969 Japan 95/10 CT OTHER PUBLICATIONS Hart &amp; Mulder, An All-Silicon Timing Circuit for Automatic Cameras,&#34; 1970, Microelectronics &amp; Reliability, pp. 335-340.  
 Primary Examiner-Samuel S. Matthews Assistant Examiner-Russell E. Adams, Jr. Attorney, Agent, or Firm-Stevens, Davis, Miller &amp; Mosher [57] ABSTRACT An exposure control system for use with single lens reflex cameras in which a photo-diode is connected across first and second inputs of a differential amplifier, and first and second variable resistors are connected at one end to the first and second differential amplifier inputs, respectively, and at the other ends in common with a power source. the resistors being variable as a function of film speed adjustment and lens aperture adjustment, respectively, the output of the differential amplifier being negatively fed back to one of its inputs such that the amplification factor of the photo-current generated by the photo-diode is the ratio of the firstand second resistors.  
 16 Claims, 8 Drawing Figures Vcc all L U552 R55 Rss GND PATENTEB-APR ems SHEET 1 UF 6 Vcc R53 Rag Jase A GND AMOUNT OF LIGHT PATENTEDAPR 8l975 13.877. 039  
  sumaqgej FIG,4  
 TO LIGHT MEASURING SECTION 4- PATENIEIJIPII eIsI s 3,877, 039  
 sIImIInfg F I G 5 I APERTURE MIRROR-RETURN 5 SETTING STOP MOVEMENT MIRROR-UP SEQUENCE OF &#39;5 l MOVEMENT PHOIOGRAPHINGl I 1 TIME OPERAT&#39;ON SHUTTER i&#39; STORAGE i HOTOGRAPT-IIIJG MEASUREMENT 0 ON g I MOVEMENT) I i l l I i I I l I I I I l ON I I I (g2) I I I l I I I l l i l I ($2) I I i d 3 g e I I l l I v i l I g I 5 I I I i I I (s4) i I I i I i I i W v 11,12 II I2 I 2 PATENTEBAPR 8i975 l EXPOSURE CONTROL SYSTEM FOR CAMERAS The present invention relates to an exposure control means for a camera or the like in which the amount of light is measured to determine the shutter speed in accordance with the measured amount of light.  
  In a single lens reflex camera having an electromagnetically controlled shutter means, it has been known to provide a photo sensing element in a light path of a finder optical system. However, in such an arrangement, since a reflecting mirror for reflecting the light through the object lens toward the finder optical system is pulled up just before the shutter is actuated, the incident light on the photo sensing element is interrupted so that it is impossible to obtain a correct exposure. In view of this fact, it has been proposed to memorize the amount of light just before the mirror flips up and determine the shutter speed in accordance with the memorized value. As the photo sensitive element, Cadmium Sulfide (CdS) is commonly used because it is highly sensitive and can be made compact. However, since CdS has a relatively long response time, when it is desired to take a picture by suddenly moving a camera from a bright position to a relatively dark position, it is impossible to obtain a correct exposure value if the shutter is immediately actuated.  
  It has also been known to use as the photo sensitive element a silicon photo diode which is sensitive to visible light. The silicon photo diode has a substantially improved response time as compared with CdS, and is excellent in reliability and compactness. However, it is disadvantageous in that it is less sensitive than CdS and the measurable range is limited by the dark current inherent thereto; this is because it no longer has a linear light to current characteristic under a relatively dark condition due to relative increase in the dark current.  
  Heretofore, where a silicon photo-diode was used as a photo-sensitive clement, either a reverse biasing voltage was applied thereto to produce a photo-current or a photo-emf was used to produce a forward voltage. In such cases, the silicon photo-diode always has an equivalent parallel resistance component (dark current or leak current) so that the detection of a weak incident light has not been possible, resulting in a narrow range of light intensity measurement. As a result, in a camera in which the lens aperture diaphragm is preset, it has been difficult to measure the amount of light while the lens aperture was reduced (so-called light amount measurement under reduced aperture diaphragm). Also, in the prior art system, depending on the change in the incident light which is required for effecting the light amount measurement under reduced aperture diaphragm, a fast output signal response has been restricted by the capacitance of the silicon photo-diode and hence the realization of the light amount measurement under reduced aperture diaphragm has been diffi cult. Furthermore, in the prior art system, since the photo-current or the photo-voltage is amplified to control the shutter time, the only factor that may be readily altered is the amplification factor of the amplifier. However, when a camera including three adjustable factors, such as preset and release of the lens aperture diaphragm, the film sensitivity or the like, is used, it has been difficult to change these factors simultaneously.  
  The present invention has an object to provide exposure control means for a camera which can eliminate the aforementioned disadvantages and provide a correct control of shutter speed under an increased light brightness range.  
  According to an aspect of the present invention, a silicon photo diode is inserted between two input terminals of the differential amplifier, the output of an amplifying circuit including the differential amplifier is fed back to one of the inputs in a negative feedback arrangement, so that the silicon photo diode is used under a substantially zero-bias whereby the photo current is amplified by the ratio of resistances respectively inserted between the electric power supply and two input terminals, and the amplified current is used to charge a timing capacitor to determine the shutter speed.  
 Furthermore, according to the present invention since the output of the differential amplifier is fed back to the silicon photo-diode, a rapid response is attained, which enables the light amount measurement to be obtained using a reduced aperture diaphragm.  
  Furthermore, according to the present invention, two resistors connected to the input terminal can be varied independently whereby the preset and release of the lens aperture diaphragm and the change of the film sensitivity are facilitated.  
  The above and other objects and features of the present invention will become apparent from the following descriptions of preferred embodiments of the present invention with reference to the accompanying drawings, in which;  
  FlG. 1 is a circuit diagram for explaining the principle of the exposure control means of the present invention;  
  FIG. 2 is a diagram showing the relationship between the amount of incident light and the photo current in the silicon photo diode;  
  FIG. 3 is a circuit diagram showing one embodiment of the exposure control circuit in accordance with the present invention;  
  FIG. 4 is a circuit diagram showing one example of comparing circuit;  
  FIG. 5 is a diagram showing timing relation in a photographing operation;  
  FIG. 6 is a circuit diagram of a further embodiment of the present invention;  
  FIG. 7 is a circuit diagram showing the essential part of the embodiment shown in FlG..6; and,  
  HG. 8 is a circuit diagram showing a further embodiment of the present invention.  
  The operation of the exposure control means in accordance with the present invention will now be described with respect to the example shown by a circuit diagram in FIG. 1. In the drawing, there is shown a differential amplifier comprising resistors R R R R R R and R and field effect transistors (F ET) Q and Q52, the output of the differential amplifier being amplified by a negative feedback amplifier A and fed back in the form of the output of the amplifier A through the resistor R into the gate of FET Q52. A photo diode D is connected between the gates of the field effect transistors Q51 and Q 2 with the polarity that the transistor Q52 is subjected to a positive potential when light is injected on the diode. Thus, when the photo diode D is illuminated, a photo current is allowed to flow therein, whereby the gate of the transistor Q is biased by a positive potential reducing the drain potential of the transistor Q This output is amplified by the amplifier A to be used for controlling shutter means. A portion of the output of the amplifier A is fed back through the resistor R to the gate of the transistor Q52. This feedback voltage is applied in the direction opposing the voltage produced in the photo diode D so that there is no remarkable change in the gate voltage of the transistor Q52.  
  The characteristic of the photo diode will now be described with reference to FIG. 2. When the photo diode is subjected to a reverse bias, the amount of the photo current I with respect to a predetermined amount of light increases and thus the apparent sensitivity of the photo diode is increased, however, this is usually accompanied by an increase in the dark current. Therefore, under a relatively dark condition, it is impossible to obtain a photo current proportional to the amount of light due to the effect of the dark current. Referring to FIG. 2, the relationship between the amount of light and the photo current under this condition is shown by the curve F At the point P, on the curve F the effect of the dark current appears and it becomes impossible to detect the change in the photo current. Thus, it is impossible to detect change in light under the amount of light below L When there is no bias on the photo diode, it becomes impossible to detect change in photo current at the point P corresponding to the amount of light L0 as shown by the curve F in FIG. 2. Thus, when the photo diode is used without any bias, the photo sensitive range of the diode is expanded as compared with the diode used with bias voltage from the point corresponding to the amount of light L0. to the point corresponding to the amount of light L0 In general, when a photo current is amplified, it is usually necessary to apply a bias to the photo diode in order to bring the current level to the amplifying zone of semi-conductor elements; however, according to the present invention, mutual compensation is expected at the opposite ends of the diode so that it is possible to make the bias substantially zero.  
  A preferred embodiment of the present invention will now be described with reference to FIG. 3. In the circuit shown in FIG. 3, an electric power supply (not shown) is provided for providing a voltage Vcc. Before a picture is taken, switch S, is brought into a position a, switch S into a position c, switch 8;, into a position e, and switch S, into a position g. Then, a shutter release button (not shown) is depressed. This operation causes the aperture stop of the camera to be moved to a predetermined position, so as to allow a predetermined amount of light to pass through the object lens of the camera. A photo diode receives at least a portion of the light and produces a photo current corresponding to the amount of the light. Representing the current by the character i,,, the following relation is established in the circuit shown in FIG. 3;  
 i3 i l in where, i, represents a current component through the photo diode other than the photo current.  
  Further, representing the gate voltage of field effect transistors Q and Q32 by the characters v and v,, respectively, and the gain of three stages of differential amplifiers comprising the field effect transistors Q and Q and transistors O35, O86 Q and 0:38 by the character A, the output voltage v of the transistor Q has the following relation with the voltage v, and r and the gain A:  
 Further, the voltages v, and v have the following relation with the power supply voltage Vcc;  
 v VCC R Xl v Vcc R;,;, x i  
 From the equations (3), (4) and (5), the following equation can be obtained;  
 ( 33 3 Zll l) a In the embodiment, since the gain A of the three stages of differential amplifiers is selected as being sufficiently high, the following relation can be obtained;  
  ash; sr i Since, in this instance, there is no potential difference between the opposite ends of the diode;  
 i,, i i,, 0  
 From the equations (1) and (7);  
 From the equations (7) and (9);  
 i =(l+2%)i3 (10) From the equations (8) and (10);  
 i2 Rag/R3 (ll) From the equation l l it will be apparent that a current proportional to the current 1&#34;,, through the photo diode flows through the transistor Q The output of the amplifier is fed back negatively through the transistor O to the input. Due to the negative feedback connection, the terminal voltage of a storage capacitor C connected to the gate of the transistor Q can be maintained at a predetermined voltage in accordance with the amount of light.  
  The time response in the present circuit will now be described. Assume that R represents a load resistance of the differential amplifier and A l) represents an amplification factor in the absence of the negative feedback. Also, assume that i, represents a photocurrent and R R represents a load resistance of the silicon photo-diode in the absence of negative feedback.  
  Then, the voltage across the silicon photo-diode is given by i, X(R;,, R,,,,). On the other hand, when negative feedback is provided, the voltage across the silicon photo-diode is given by l/A l.i,,.R,,,,. Accordingly, when negative feedback is applied, if R,-,,, R the voltage of the silicon diode that must be charged by the photo-current is reduced by the factor of approximately A and the response time is shortened by the factor of approximately A Thus, before the reflecting mirror of the camera is pulled up, the measurement of light is completed and an electrical charge corresponding to the measured light is stored in the capacitor C Thereafter, the switches 8,, S and S, are actuated to close the contacts b, d and f, respectively, leaving the switch S, in the position closing the contact g. Then the current substantially equal in amount with the current which has been flowing through the resistor R is allowed to flow through the switch S, to the transistor Q3.  
  When the reflecting mirror of the camera is pulled up, the light toward the photo diode is interrupted so that the photo diode allows only the dark current to pass therethrough. Representing the dark current which flows in this instance through the photo diode by the character i,,,,,,,-, the current through the transistor Q can be represented as follows.  
  Since the transistors Q,,,, and Q constitute a constant current driven differential amplifier, the sum of the collector current I, of the transistor Q31, and the collector current of the transistor 0312 is always constant. Therefore, the current I,, which flows through the collector of the transistor Qsrl during the Period from the completion of the measurement of the amount of light to the return of the reflecting mirror, will be l R.-;;,/R:,,)(i,, i,,,,,,,.) which is the difference between the current l R3;,/R,,,)i,, which is proportional to the amount oflight just before a picture is taken and the dark current. When the mirror is pulled up, the shutter is simultaneously opened and, at the same time, the switch S, is actuated to move from the position g to the position 11, so that the current through the switch S, and the transistor O is interrupted. Thus, the time integrating capacitor C is gradually charged. Representing the potential difference between the opposite ends of the capacitor C by the character Vc and the charging time by t, the following relationship is established.  
 When the voltage Vc reaches a predetermined value, a transistor in a time setting comparator is cut off, so as to initiate the closing movement of the shutter.  
  The comparator may comprise a circuit as shown in FIG. 4. In operation of the circuit, when the first curtain of the shutter mechanism is moved to open the shutter, the switch S, shown in FIG. 3 is moved to the position 11 so as to initiate the charging of the capacitor C In this instance, since the gate potential of the transistor 0,, is greater than the source potential of the transistor Q41, the transistor Q4, is pinched off and therefore the transistor Q is in the off condition while the transistor Q is in the on condition to allow the current to flow through the solenoid L. Thus, the shutter is held in the open position. As the voltage charged across the capacitor C increases, the gate potential is decreased and finally the transistor is turned on. Thus, the transistor 0, is brought into the on condition while the transistor 0,, is turned off to block the current to the solenoid L. Thus, the shutter is caused to close. Referring to FIG. 5, there are shown a change in the amount of light during operation of a camera, the operation of the switches 8,, S S and 5,, change in current flowing through the transistors Q3&#34; and Om and change in the voltage Vc across the time integrating capacitor, with time taken as a parameter.  
  Referring to FIG. 6, there is shown an electrical circuit in accordance with the second embodiment of the present invention, which includes a resistor R, connected at one end with a diode Q, and at the other end with ground. The characters F, and F designate P- channel junction type field effect transistors constituting a constant current driven differential amplifier having a constant current circuit including PNP type transistors Q and 0 disposed between the electric power supply and a common source. The common mode gain of the amplifier is sufficiently small as compared with the differential mode gain, and a sufficient compensation is provided for the variation of the power supply voltage. The compensation for the thermal effect is also provided in constituting the differential amplifier. A silicon photo diode Ph.D is inserted between the gate G, of the transistor F, and the gate G of the transistor F 2 with the P-terminal connected with the gate G and the N-terminal with the gate G,. When the light is measured with the lens aperture of a camera positioned at a preselected position, the resistor R may be a fixed resistor but, when the light is measured with the lens aperture fully opened, the resistor R must be a variable resistor which is interconnected with the lens aperture actuating mechanism. The resistors R, and R are respectively connected at one of their ends with the drain D of the transistor F, and the drain D of the transistor F with the other ends connected to the opposite ends of a variable resistor R The variable resistor R, is provided for adjusting the unbalance between the transistors F, and F as well as the unbalance between the resistors R, and R and has a central tap connected to the ground. The character Q, designates a diode, and Q Q and Q, NPN type transistors. The bases of the NPN type transistors Q and Q, are connected to the drains D, and D respectively, with the common emitter connected with the constant current circuit comprising the diode Q, and the NPN type transistor 0 The NPN type transistors Q and Q, also provide a constant current differential amplifier. A resistor R, is provided for determining the current to be directed through the constant current circuit for the differential amplifier comprising the transistors F, and F and that for the differential amplifier comprising the NPN transistors 0,,- and Q The collector of the NPN type transistor is directly connected to the power supply, and the collector of the NPN type transistor Q, to a resistor R, and the base of a NPN type transistor Q The emitter of the NPN type transistor 0,, is connected with the base of a NPN type transistor 0,, and the collector with the power supply. The arrangement of the NPN type transistors Q8 and 0,, are considered as a kind of Darlington type connection which receives the output voltage of the NPN type transistor Q, at a high input impedance to amplify it. The characters R and R,,, designate respectively an emitter resistor and a collector resistor for the NPN type transistor Q for taking out the output of the NPN transistor Q and applying it through the switch S to a storage capacitor C and the gate of the transistor F;,. A capacitor C is connected between the power supply and the gate of the transistor F for compensating leak current due to the self discharge of the capacitor C The capacitor C makes it possible to store the charge for an extended time. There is also provided a constant current driven differential amplifier including a circuit which comprises field effect transistors F 3 and F PNP type transistors Q and Q12. and diode Q and resistors R R and R in which the gate voltage of the transistor F is determined by resistors R R R and R The diode OH is provided for compensating thermal effect on the NPN type transistor Q The output of the constant current differential amplifier including the field effect transistors F and F are taken out from the drain of the transistor F and applied to the base of the NPN type transistor O The PNP type transistor O allows a constant current to pass therethrough due to the existence of the PNP type transistor Q12 and the resistor R The constant current is equal to the sum of the collector current of the NPN type transistor O and the base current of the NPN type transistor Q,,-,. In this arrangement, under a dark condition, the base potential of the NPN type transistor O increases, so that the collector potential of the transistor O and therefore the base potential of the NPN type transistor O are decreased. As a result, the collector current of the transistor Q is decreased. Under a bright condition, a reverse result is obtained. Thus. the collector current of the transistor Q15 is proportional to the amount of light. From the relationship between the light and the collector current, it should be noted that the shutter speed is increased under a bright condition and decreased under a dark condition. The collector of the NPN type transistor Q|.-, is connected through the position 1 of the switch S with the gate G of the transistor F to constitute a negative feedback circuit. Further, the contact 2 of the switch S is connected with the contact 1 of a selector switch 8;, which is provided for the selection of an automatic position in which the shutter speed is automatically determined and a manual&#34; position in which the shutter speed is manually determined as desired. The switch S is connected with one end of a time integrating capacitor C The other end of the time integrating capacitor C is connected with the power supply. A trigger switch S is disposed in parallel relation with the capacitor C The contact 2 of the switch S is connected with the central tap M of a manually operated variable resistor R for providing a manual selection of shutter speed. A resistor R and a switch S interconnected with the shutter release button are provided for a bulb operation circuit. An NPN type transistor on is provided for allowing indication on an indicator, and has a base connected to the base of the NPN type transistor Q15. Between the emitters of the transistors Q11 and Q15 there .is connected a negative feedback resistor R A level shifting diode Q is connected between the emitter of the transistor Q and ground, and an indicator A is disposed between the collector of the transistor Q and the power supply. A resistor R is provided between the collector of the NPN type transistor Q15 and the ground for closing the shutter in about ten seconds after it is opened, under the automatic position, even when the amount of light is insufficient to close the shutter. The output of the timing capacitor C is applied to the gate of the field effect transistor F t A resistor R is provided as the source resistor for the field effect transistor F and a variable resistor R is disposed between the source of the transistor F and ground for adjusting the trigger level. The character R designates a drain resistor for the transistor F through which the output of the transistor is taken out. The NPN type transistors Om and Q. the resistors R R R and R the solenoid Ry and the diode Q constitute a Schmitt trigger circuit which controls the supply of current to the solenoid Ry or the load of the collector of the NPN type transistor R in accordance with the output of the field effect transistor F The diode 20 is provided for preventing the NPN type transistor from being damaged due to the transient phenomenon produced during the switching of the Schmitt trigger circuit. A switch S is provided to be actuated by the shutter release button for completing a line to the power supply.  
  in the arrangement of the second embodiment. a typical operation for taking a picture will now be described.  
  Referring to the operation in which shutter speed is automatically determined in accordance with the amount of light from the object to be taken, the speed or sensitivity ofa film and the lens aperture opening, all of the switches are positioned at the position 1 before the shutter release button is depressed. The switch S is always in the position 1 irrespective of the actuation of the shutter release button. Since the switch S, has no contribution in this automatic photographing, it will not be described further. Before a picture is taken, an adjustment is made in accordance with the film speed by adjusting the resistor R through a film speed knob on the camera. Thereafter, the lens aperture opening is determined. In a camera having a lens with a manually operated aperture diaphragm, the light which has passed through the aperture opening is measured by the photo sensitive element. When the lens of the camera has a pre-set type aperture diaphragm, the light is measured with a full open lens aperture which is closed to a preset position just before the shutter is actuated. Therefore, in the former case, the resistor R 3 for determining the amplification factor of the photo current may be of a fixed type since the photo current changes in proportion to the lens aperture opening. However, in the latter case, the resistor R must be adjusted in accordance with the pre-set value of the aperture so that the current is proportional to the pre-set value.  
  After the lens aperture opening is determined, the shutter release button is depressed. Then, the switch S is actuated to close the position 2, so that the power supply is connected and the measurement is started. Thus, the photo current l corresponding to the amount of light is allowed to flow through the silicon photo diode Ph.D and then through the resistor R By this current, the gate G of the transistor F is subjected to a positive potential and the drain potential of the transistor F is decreased. This turns the collector potential of the NPN transistor Q, to a positive potential, the collector potential of the NPN transistor 09 and the gate potential of the field effect transistor F to negative potential, the drain potential of the field effect transistor F, and the base potential of the NPN transistor O to negative potential, the collector potential of the NPN type transistor Q14 and the base potential of the NPN type transistorQ to positive potentiaL&#39;and the collector potential of the&#39;NPN type transistor Q15 to a negative potential. The potential in the collector of the transistor Q1518 applied through the switch S to the gate G of the field effect transistor F so that there is no substantial change in the potential at the gate due to the negative feedback. Under a condition in which the open loop gain of the feedback amplifier is high, it may be considered that the input voltage between the transistor F, and F is substantially zero. Therefore. the current I flowing through the resistor R and the feedback loop can be represented by the following equation.  
 When the resistance value of the resistor R is large as compared with that of the film speed adjusting resistor R the photo current is amplified and thereafter introduced into the collector of the NPN type transistor Q15. In this instance, a voltage corresponding to the amount of light appears across the storage capacitor C,. As apparent from the equation (12), an adjustment can be made in accordance with the film speed by adjusting the resistor R to change the current gain.  
  In this instance. in the indicator A, there is indicated a shutter speed which is determined in accordance with the film speed, the lens aperture opening and the amount oflight. When the shutter release button is further depressed, the switch S, is actuated to close the contact 2 and also the switches S and S, to close the contacts 2 just before the mirror of the camera is pulled up. 1t should of course be noted that, in a camera in which measurement of light is performed with the lens aperture fully opened, the switch S, must be actuated before the lens aperture diaphragm is moved to a predetermined position during the shutter release. The switches S and S, may be actuated in this order after the switch S, is actuated. The memorizing function is started when the switch S, is actuated to the position 2, and when the switch S is actuated to the position 2, a current corresponding to the voltage stored in the storage capacitor C, flows from the power supply through the switch S, to the collector of the NPN transistor Q,,-,.  
 ,If the stored voltage is of a correct value, the current is equal to that which has been flowing through the negative feedback loop to the collector of the NPN type transistor Q, during the measurement of the amount of light. The trigger switch S, is actuated to the position 2 or to the open position when the shutter is opened. Then, the timing capacitor C is charged by the current corresponding to the stored voltage. As the voltage in the timing capacitor reaches a predetermined level, the  
 field effect transistor F becomes conductive and a cur-&#39; rent flows therethrough, so that the base potential of the NPN type transistor 0, is raised. Thus, the transistor 0, is turned on and the NPN. transistor 0, is turned off to interrupt the ,currentto the solenoid so as to close the shutter. The shutter speed corresponds to the time from theactuation of theswitchS, to the interruption of the solenoid current. This is-represented by the following equation; 4  
 where t is the shutter speed, V is the trigger voltage and I is the collector current of the NPN transistor 0,, which may be referred to as time integrating current.  
  Referring to the equation, the shutter speed I can be determined by the time integrating current I when the value C .V is constant. The error inherent in the capacitor C and the silicon photo diode Ph.D can be compensated for through the adjustment of the trigger voltage V The adjustment of the trigger voltage is performed through the variable resistor R which varies the voltage between the gate and source electrodes of the field effect transistor F A typical example of determining the shutter speed using the equation 13) will now be described. Assuming that capacitance of the time integrating capacitor is l,u. F and the trigger voltage is 3 V, the value C X V is equal to 3 X 10&#39; coulomb. With a film having a sensitivity of ASA 100, it is assumed that, under the amount of light L,, a suitable exposure can be obtained with the lens aperture opening F 1.4 and the shutter speed of 1/1000 second. lt is further assumed that the photo current in this instance is 3 ,u A. From the equation 13), it is noted that the time integrating current 1 must be 3 X l0 X 1000 3 mA in order to obtain the shutter speed of 1/1000 second. Thus, from the equation (12), it will be seen that the value R /R is 1000. Therefore, when the resistance value of the film speed adjusting resistor R is 1000, the resistance value of the resistor R is 1001). Under the same amount of light L,, with a film having a sensitivity of ASA 50, the resistance value of the resistor R is selected as 200!) to reduce the photo current amplification factor to one-half. Thus, the time integrating current 1 is divided by two and the shutter speed of 1/2000 is obtained to achieve the correct exposure. For a film having the sensitivity of ASA 200, the resistor R is adjusted to 509 to obtain a similar result.  
  Next, the effect of adjustment of lens aperture will be described. ln a camera having a lens with a manually operated aperture diaphragm, when the aperture is closed from F 1.4 to F 2, the amount of light incoming to the silicon photo diode Ph.D is reduced to one half, so that the photo current 1,, will become 1.5/LA. For a film having the sensitivity of ASA 100, the value R /R 1000, so that the time integrating current 1 becomes 1.5 mA and the shutter speed of 1&#39;/500 can be obtained. When the light is measured with a fully opened aperture diaphragm, the resistor R is interconnected with the aperture diaphragm so that the resistance value of the resistor is adjusted in accordance with the preset value of the lens aperture. For example, when the aperture is reduced to a pre-set value of F 2 when the picture is taken, the resistance value of the resistor R is reduced to SOkQ which is one half of the resistance value for the aperture pre-set value of F 1.4. Then, the time integrating current is correspondingly reduced for the same photo current 1,, so that theshutter speed of H500 can be attained to obtalin asuitable exposure. With the same aperture opening andthe same film speed, when the amount of light is increased from L, to 2 X L,, the photo current is doubled and therefore the shutter speed is reduced to onehalf, so that a suitable exposure is obtained. As described above, an automatic exposure control can be made.  
  A manual exposure control in which the shutter speed is manually determined through a shutter control knob will further be described. For this operation, the switch S is actuated to the position 2. During the manual operation, the feedback amplifying circuit operates only for indicating the shutter speed on the indicator. The shutter speed is determined by the product of the variable resistor R and the time integrating capacitor C The shutter speed I during the manual operation can be represented by the following equation. representing the power supply voltage by the character Vcc.  
 The sequence of actuation of the switches is the same as in the case of the automatic exposure control, and the time integrating capacitor C is charged through the resistor R From the above descriptions, it will be apparent that the time integrating capacitor C operates both in the automatic exposure control and in the manual exposure control.  
  .Next, a bulb&#34; operation is described in which the shutter is opened as long as the shutter release button is depressed. This operation is substantially the same as in the manual exposure control except that the switch S,-, is actuated to the position 2 before the switch S is moved to the position 2, so that the time integrating capacitor C is not charged even when the switch S is actuated and therefore the shutter is maintained in the open position. When the shutter release button is released, the switch S is returned to the position 1, so that the time integrating capacitor C is charged through the resistor R and, as the charged voltage reaches the trigger voltage V the shutter is closed.  
  In using a self-timer, since the mirror is pulled up when the shutter release button is depressed, it is necessary to start to memorize just before the mirror is pulled up and maintain the memory for about seconds. Since a tantalum solid electrolytic capacitor having less leak current is used as the storage capacitor C and one end of the capacitor is connected with the field effect transistor F which is a high input impedance element, the change in the stored voltage will have no problem in a normal operation in which the storing time is very short. However, due to the leak of the capacitor and the field effect transistor, it is very difficult to maintain the storage voltage for about ten seconds. Generally, the leak current of a junction type field effect transistor has a leak current of 10&#39; to 10 A which is sufficiently small as compared with the leak current 10&#39; to 10&#39; A of a tantalum solid electrolytic capacitor. Therefore, it may be sufficient to make a compensation only for the leak current of the capacitor. For this purpose, a capacitor C is connected in series with the storage capacitor C whereby the capacitor C is additionally charged from the power supply through the capacitor C to compensate for the voltage drop in the capacitor C due to the leak produced therein. Thus, it is possible to maintain the stored voltage for an extended time.  
  The operation of the indicating circuit comprising the resistor R,,,, the NPN type transistor Q and the indicator A will now be described. Representing the voltage between the base and the emitter of each of the transistors Q15 and Q by V,,,; and V respectively, the emitter current by l and l respectively, the following relation is established among the values V VI,- I and I h.- p (q m: lkT) where: q is the charge of an electron, T is the absolute temperature, k is Boltzmanns constant, 1,, is the dark current of the transistors Q15 and Q11. and R is the emitter resistance of the transistor O&#34;. From the equations (l5), (l6) and (17), the following equation can be obtained.  
 In 1,; IIIT&#39;RWIE +1 1,- (18) In the equation (18), if the first item of the right column is large in relation to the second item, the emitter current 1,; of the transistor Q is equal to the logarithmic compression of the emitter current I of the transistor Q, The emitter current of the transistor 0,; is equal to the collector current of the same transistor, that is, the time integrating current I, and the emitter current 1,,- is equal to the current in the indicator A, so that the time integrating current I is indicated on the indicator A in the form of a logrithmic compression due to the effect of the emitter resistance R of the transistor Q Under a condition in which the time integrating current I is zero or so small that it cannot charge the time integrating capacitor C as in the case in which the shutter release button is depressed with the lens cover on the lens or under insufficient light, the shutter may possibly be maintained in the open position or will not be closed until a very long time passes. In order to eliminate this undesirable result, the resistor R is inserted between the collector of the transistor Q and ground. When the shutter release button is depressed, the power switch S is closed, and thereafter the switch S is opened and the switch S is actuated from the position 1 to the position 2. If the amount of light is not sufficient, the collector current of the transistor Q can be considered as being substantially zero if the resistor R is not provided. However, due to the existence of the resistor R,,,, the time integrating capacitor C can be charged with a time constant corresponding to R X C even when the time integrating current is zero. Therefore, the shutter is closed after a predetermined time. It should of course be noted that the time constant R X C may produce an error in the shutter speed under a small amount of light, it should be sufficiently large in relation to the maximum shutter speed. In case of a camera having a maximum shutter speed of 1 second, the time constant may be about seconds.  
  FIG. 7 shows an essential portion of the amplifier used in the circuit shown in FIG. 6 which will now be described in detail. In the circuit including the NPN type transistors Q and 0 the PNP type transistor Q the resistors R R and R and the diodes Q, and 0 representing the current amplification factors of the NPN transistors Q14 and Q15 by h and h respectively, the base currents by i and respectively. the emitter resistances by R and R respectively. the input impedances by h and h respectively, the voltage gains by V and V and the collector current of the PNP type transistor Q by l the voltage gains V and V can be represented as follows.  
 Thus, the gain of the whole circuit V X V can be represented by the following equation.  
  ln&#39;l X 02 RHl The value of the resistance R,;, can be represented in terms of the emitter current of the transistor On by the equation R 26/1,; (mA) (I. Since the current I is substantially equal to the collector current I, of the transistor Q which is maintained at a substantially constant value, the emitter resistance of the transistor O can be considered as being substantially constant. Thus, as apparent from the equation (19), if the current amplification factor h is substantially constant irrespective of the current, the total gain of the circuit is also constant irrespective of the collector current of the transistor Q15.  
  FIG. 8 shows a third embodiment of the present in vention. The circuit is substantially the same as that shown in FIG. 6, so that the only differences between the arrangements of FIGS. 6 and 8 will now be described. In the arrangement of FIG. 8, a resistor R is inserted between the drain of the field effect transistor F and the resistor R for preventing the voltage, which is produced due to a slight difference between gm of the field effect transistors F and F when the gate voltages of the transistors F and F are reduced, from being fedback positively in the whole circuit to cause an oscillation.  
  The storage capacitor C, is inserted between the gates of the field effect transistors F and F the common source of the transistors F and F being connected to the collector of a PNP transistor Q10 which constitutes a constant current source by being connected at its base and emitter with the base and emitter of a PNP type transistor Q The collector of an NPN type transistor Q which constitutes a constant current source together with an NPN type transistor Q by being connected at its base and emitter with those of the transistor Q is connected to the drain of the field effect transistor F and to the base of an NPN type transistor Q65- A diode O is connected between the drain of the transistors F and diode 062- The gate of the field effect transistor F is connected to the junction of resistors R and R A resistor R is provided for determining the constant current through the transistors Q10 and Qrz, and is inserted between the junction of the base and collector of transistor Q and ground. The collector of the transistor 0 is connected to the gate G of the field effect transistor F and is directly fed back to the input stage. The emitter of the transistor Q is connected to the basecollector junction of a diode Q and to the bases of NPN type transistor Q67 and Q6. The collector of the transistor 06 is connected with the contact 1 of a selector switch 5;, which is provided for selecting an automatic position in which the shutter speed is automatically determined and a manual&#34; position in which the shutter speed is manually determined as desired. The switch S is connected to one end of a time integrating capacitor C the other end of the capacitor C being connected to the power supply. A trigger switch S is connected in parallel with the capacitor C and has a contact 2 connected with the central tap M of a variable resistor R for the purpose of allowing manual selection of shutter speed. A resistor R and a switch connected with a shutter release button (not shown) are provided for a bulb operation.  
  The collector of the NPN type transistor 068 is connected to a diode Q and the gates of a field effect transistor F so as to supply to the diode Q69 21 current equal to the collector corrent of the NPN type transistor Q15- Between the source of the field effect transistor F and the power supply, there is connected a diode Q having a constant terminal voltage due to the existence of a resistor R The field effect transistor F detects the differences between the terminal voltage of the diode Q69 and the constant terminal voltage of the transistor Q and produces an output current correspond-.  
 ing to the difference. The drain of the transistor F is connected to one end of an ammeter A, the other end of the ammeter A being connected with a variable resistor R for adjusting the maximum swing angle of the ammeter A. The variable resistor R is also connected to another variable resistor R A resistor R is provided as a source resistance of a field effect transistor F and a trigger level adjusting variable resistor R is connected between the source of the transistor F and ground. The character R designates a drain resistance for the field effect transistor F through which the output of the transistor F is taken out.  
  NPN type transistors Q and Q resistors R R R and R a solenoid Ry and a diode Q are provided for constituting a Schmitt trigger circuit which controls the current through the solenoid Ry which is the collector load of the NPN type transistor Q19 in accordance with the output of the field effect transistor F The diode Q 0 serves to prevent the NPN type transistor Q 9 from being damaged during a transient phenomenon produced by the switching of the Schmitt trigger circuit. A switch S is provided for establishing the line from the power supply and is actuated by the shutter release button of the camera.  
  In the arrangement as described above, a typical operation of the circuit will now be explained. The operations of the automatic exposure control and the manual exposure control are the same as those in the embodiment of FIG. 6, so that they will not be described further.  
  When a self-timer is used, since the reflecting mirror is pulled up as soon as the shutter release button is depressed, it is necessary to start to memorize before the mirror is pulled up and maintain the memory for about ten seconds. Since a tantalum solid electrolytic capacitor having a very low leak current is used as the storage capacitor C, and the capacitor is inserted between the gates of the field effect transistors F and F,. which gates constitute input terminals of the high input impedance differential amplifying circuit, the voltage applied to the capacitor C, is substantially zero as will be described later so that the leak current of the capacitor can be neglected. Therefore, it is possible to maintain the stored voltage during the operation of the selftimer.  
  Next, reference will be made to the indicating circuit comprising the diodes Q69 and Q the field effect transistor F the resistors R and R variable resistors R and R,,,,, the ammeter A and the NPN type transistor Om- The voltage across the base and the emitter of the transistor Q, is equal to the terminal voltage of the diode 016, so that there appears in the collector of the transistor Q6 and thereof in the diode Q69 11 current equal to the collector current of the transistor 0 Representing the voltage in the diode Q69 by V,,,;,, it can be represented by the following equation:  
 R the terminal voltage V appearing on the diode 0 due to the current I, can also be represented by the following equation.  
 V, T In T Since the voltage V across the gate and the source of the field effect transistor F is equal to V V the voltage can be represented by the following equation:  
 kT I  
  us&#39; im VIN-J2 From the equation (22), the drain current l of the field effect transistor F, can be written as follows:  
  ns gum VGA Hum q I:  
 where: g is the mutual conductance of the field effect transistor F and a and b are constants.  
  The current in the diode Q is substantially equal to the collector current of the NPN type transistor Q so that the drain current of the field effect transistor F is equal to a logarithmic compression of the collector current of the NPN transistor 0 subtracted by a certain current.  
  In the third embodiment described above, only one diode is inserted into the logarithmic compression circuit, however, it should be noted that other impedance element may be inserted in series with the diode or a plurality of diodes may be used so as to determine the compression ratio as desired.  
  By adjusting the variable resistor R to cancel the current corresponding to the constant b in the equation 23 and by adjusting the variable resistor R to suitably determine the constant a, the ammeter A can indicate the shutter speed very exactly throughout a desired range.  
  A portion of the amplifier used in the circuit will now be described in detail. In the circuit comprising the field effect transistors F and F,, the NPN type transistors Qm and Q65 the PNP type transistor 0, the diodes Q Q and Q12 the resistors R R,,, R and R, and the capacitor C&#39;,, representing the mutual conductance of the field effect transistors F and F, by g,,,, the input impedance including the drain of the transistor F and the base of the NPN type transistor Q65 by h,-,., and the current amplification factor of the transistor 0,, by h,,., the gain A of the circuit can be represented as follows.  
 VII A where; V is the output voltage of the transistor Q65 and I is the output current of the transistor Q6 Assuming that g,,, is l mv, h is 100, and i is luA to 10 mA, the  
 value V, is 10 to l0 V. Thus, the value V, is negligible. lngeneral, when a voltage is applied to a capacitor and thereafter removed, the leak current of the capacitor increases in proportion to the applied voltage. Therefore, when the applied voltage is substantially zero as in the aforementioned case, the leak current is negligibly small. Thus, it will be understood that it is possible to maintain the storage voltage for a time required for the operation of a self-timer.  
  According to the present invention, since a timing capacitor C is charged by the output current proportional to a photo current, the charged voltage changes linearly with respect to the charging time so that it is possible to determine the trigger level as desired for determining the shutter speed.  
  Although in a conventional exposure control device a correct shutter speed can be obtained only in the range in which the photo current is proportional to the amount of light, the circuit of the present invention makes it possible to obtain a correct shutter speed even under a dark condition in which the dark current cannot be neglected, by subtracting the dark current from the photo current. Further, according to the present invention, the photosensitive element is used with the voltage across the element being substantially zero, so that the measurable range can substantially be increased as compared with an arrangement in which the photosensitive element is used&#39;with a bias.  
  In a conventional device, particular means has been provided for performing logarithmic compression or expansion of current is order to make the shutter speed correspond to the amount of light. However, according to the present invention. it is possible to obtain a photo current proportional to the amount of light by simply disposing resistors at the opposite ends of the photosensitive element and providing a circuit for amplifying the output at the junction point whereby the output is fed back to said resistors to control the current through the resistors. The circuit may be either of voltage amplifying type or current amplifying type to provide the same result. According to the exposure control circuit of the present invention, the amount of light can easily be compressed logarithmically so as to provide an easy indication of the shutter speed. lt further appears that the present invention provides an effective means for compressing current. According to the present invention, the time integrating capacitor can be employed both in the automatic exposure control and in the manual exposure control, so that it is possible to reduce the number of components and to eliminate the error in the exposure value between the automatic and manual exposure controls.  
 According to a further aspect of the present invention the resistors which determine the amount of feedback in the amplifier having a negative feedback circuit are adjusted in accordance with the lens aperture or the film speed, so as to perform an exposure control by measuring the light with the lens aperture fully opened. Of course, by using a fixed resistance in lieu of the resistor which is adjusted in accordance with the lens aperture, it becomes possible to measure the light with lens aperture adjusted to a desired position.  
  According to the present invention, it is also possible to compensate for any error in the shutter speed which may be caused by the manufacturing error in the capacity of the time integrating capacitor or in the sensitivity of the photo sensitive element, simply by varying the trigger voltage. Therefore, the adjustment is very easy and a correct shutter speed can be obtained. According to a further feature of the present invention, an additional capacitor is disposed in series with the storage capacitor soas to compensate for the voltage drop caused by the leak in the storage capacitor. Therefore, it is possible to maintain the storage voltage for a sufficiently long time and thus to obtain a correct exposure time. Further, in the output current storage section of the present invention, the storage capacitor is connected between the control terminals of the high input impedance differential amplifier to reduce the potential difference between the opposite ends of the storage capacitor. Thus, it is possible to reduce the voltage drop due to the leakage in the storage capacitor to a substantially negligible value and therefore to maintain the storage voltage for a long time.  
  According to a further feature of the present invention, a constant current source isconnected to the junction point between a first transistor and a second transistor, so that even when the base current of the second transistor changes through a wide range, the  
 voltage gain obtained by the first and the second tran-.  
 sistors can be made substantially constant. Thus, it is possible to reduce the deviation of the output-to-input relationship froma linear relation. Further. according to the present invention, it is possible to easily obtain the bulb operation electrically by providing a switch interconnected with the shutter release button of camera.  
  ln the exposure control circuit of the present invention the trigger circuit is directly driven by the current in the output circuit, so that it is possible to obtain a correct trigger current which is equal to the output current irrespective of any change in the temperature and in the power supply voltage. Further, it is possible to perform a control through a wide range of current. Since the indicating circuit is also driven by the current in the output circuit, it is possible to obtain a correct indication on an indicator with an indicator current equal to the output current irrespective of the outside temperature and the power supply voltage. Thus, it is possible to obtain an indication which is substantially free from any influence of external conditions. Further, correct indication can be assured throughout a wide range. The indicating circuit can also be used as a portion of the exposure control circuit employing logarithmic compression or expansion.  
  In a conventional arrangement, the shutter speed control circuit can be controlled only by memorizing the output of the light measuring circuit. However. according to the present invention, the shutter speed control circuit can be controlled directly by the light measuring circuit. Therefore, the exposure control circuit of the present invention is not limited to an application to a camera in which exposure value is determined by measuring the light which has passed through the lens of the camera.  
  According to the present invention, even when there is a substantial change in the differential output, the gain of the circuit itself scarcely changes so that it is possible to reduce a deviation of the input-to-output relation from a linear relation.  
  Although the invention has thus been shown and described with reference to specific embodiments, such as an exposure control device for cameras, the principle and circuit arrangements disclosed and claimed in this application, have a wide application to fields other than cameras, for example, a photosensor device employed in facsimiles and duplicating apparatus, and a dimmer for a strobo. Therefore, it should be noted that the invention is in no way limited to the details of the embodiments but various changes, modification can be made without departing from the scope of the appended claims.  
 What is claimed is:  
  1. An exposure control system for use in a photographic camera, comprising: differential amplifier means having first and second inputs; a photoelectric transducer coupled across said first and second inputs; first impedance means coupled between said first input and an electrical supply source; second impedance means coupled between said second input and said sup ply source; means coupling an output of said differential amplifier means to one of said first and second inputs to negatively feed back a portion of the output signal from said amplifier means to said one input such that a photocurrent generated by&#39; said photoelectric transducer is amplified by the ratio of said first and second impedances; and means coupling said differential amplifier means to exposure control means of said camera to control the operation of the camera shutter as a function of the amplitude of said photocurrent.  
  2. An exposure control system as defined in claim 1. further comprising storage means coupled to the output of saidv differential amplifier means for storing an electrical signal representing the photocurrent generated by said photoelectric transducer.  
  3. An exposure control system as defined in claim 2, further comprising: a constant current source coupled to said storage means for producing a signal having a constant current characteristic; a time integrating circuit coupled to said constant current source; and means coupling said time integrating circuit to said exposure control means to control the closing of the shutter of said camera as a function of the rate of integration of said time integrating circuit.  
  4. An exposure control system as defined in claim 3, wherein said storage means comprises first capacitance means coupled to an input of said constant current source and said time integrating circuit comprises second capacitance means coupled to an output of said constant current source.  
  5. An exposure control system as defined in claim 3, wherein an output of said constant current source is coupled to said one input of said differential amplifier means to feed back said constant current signal to said differential amplifier means.  
  6. An exposure control system as defined in claim 5, further comprising means to switch the output of said constant current source between said one input of said differential amplifier means and the input of said time integrating circuit.  
  7. An exposure control system as defined in claim 1, further comprising: a transistor coupled to one output of said differential amplifier means; and a diode coupled to a second output of said differential amplifier means, said diode being connected across the base and emitter electrodes of said transistor; wherein said one output of said differential amplifier means is coupled to said negative feedback means.  
  8. An exposure control system as defined in claim 1, wherein said first impedance means comprises a variable resistance element coupled to the lens aperture setting mechanism of the camera.  
  9. An exposure control system as defined in claim 8, wherein said second impedance means comprises a variable resistance element coupled to the film speed setting mechanism of the camera.  
  10. An exposure control system as defined in claim 1, further comprising: a first transistor having its input coupled to the output of said differential amplifier means; a second transistor having its input coupled to the output of said first transistor and its output coupled to said exposure control means; and a constant current source coupled to the junction between the output of said first transistor and the input of said second transistor.  
  ll. The exposure control system as defined in claim 1, further comprising: a first transistor having its base electrode coupled to the output of said differential amplifier means and its output coupled to said exposure control means; a second transistor having its base electrode coupled in common with the base electrode of said first transistor; a resistance element coupled between the respective emitter electrodes of said first and second transistors; and an indicating means coupled to the output of said second transistor.  
  12. The exposure control system as defined in claim 1, further comprising: a first transistor having its base electrode coupled to the output of said differential amplifier means and its output coupled to said exposure control means; a second transistor having its base electrode coupled in common with the base electrode of said first transistor; a first diode coupled to the output of said second transistor; a field effect transistor having its gate electrode coupled to the junction between said first diode and the output of said second transistor; a second diode coupled to the source electrode of said field effect transistor; and wherein a constant current is supplied to one of said diodes and a logarithmically compressed variable current is supplied to the other diode.  
  13. The exposure control system as defined in claim 12, further comprising indicating means coupled to the output of said field transistor, said indicating means being driven by said logarithmically compressed variable current.  
  14. An exposure control system as defined in claim 1, further comprising: a constant current source coupled to said transducer; and a storage capacitor coupled betwen control terminals of a high input impedance amplifier constituting a portion of said amplifier means for storing a signal representing the photocurrent generated by said transducer.  
  15. An exposure control system as defined in claim 1, wherein said means coupling said amplifier means to said exposure control means comprises an exposure time conversion circuit including a time integrating capacitor. a trigger switch coupled in parallel with said capacitor, and a control switch coupled to said capacitor and having a first contact coupled to an output of said amplifier means and a second contact coupled to said supply source through a resistance element.  
  16. An exposure control system as defined in claim I, further comprising a flash bulb discharge circuit including a time-integrating capacitor, a trigger switch coupled in parallel with said capacitor, a high input impedance circuit adapted to be triggered by the charging or discharging current of said capacitor, and a control switch coupled in series between said capacitor and the input of said high input impedance circuit, the opening of said control switch being controlled by movement of the shutter release mechanism of said camera in a first direction, said trigger switch being opened after said control switch is opened, said capacitor being charged or discharged when said control switch is closed by movement of said shutter release mechanism in a second direction after the shutter of said camera and said trigger switch are opened.