Transmission of signals between a data processing system and input and output units
United States Patent Bettin et al.  
 1451 Apr. 22, 1975 [5 TRANSMISSION OF SIGNALS BETWEEN A 3.641.511 2/1972 Cricchi et al. t. 340/173 DATA PROCESSING SYSTEM AND INPUT g 328 AND OUTPUT UNITS c iewer I [75] Inventors: l-lubertus Bettin, Braunschweig; Primun. E.\.aminer Gareth Shaw Mind Foua made both of Assismiil Examiner-J. P. Vandenburg Germany Attorney, Agent, or Firm-Spencer &amp; Kaye [73] Assignee: Olympia Werke AG,  
  Wilhelmshaven, Germany [57] ABSTRACT [22] filed: 1973 A circuit arrangement for transmitting signals between [2|] Appl. No.: 407,132 a data processing unit and external input and output units The data processing unit has a plurality of terminals. A plurality of first switching circuits are pro- [30] Forms Apphcat&#39;on Pnomy Data vided, each being connected to a respective one of the Oct 1973 Germany 2251235 terminals. These first switching circuits in their normal position, connect the terminals to the output unit. US Cl. A control,circuit is conneced to the input unit and [5 l l 606i 3/12 provides control signals in response to a determination [58] Field of Search 340M725, 324, 336 that i f i to be supplied to the data processing unit is present at the input unit. The control circuit in 1 Rekrences Cited response to such a determination causes the switching UNITED STATES PATENTS circuits to temporarily switch so as to connect the 3,462,742 8/1969 Miller 340/1725 input unit 10 the dam Processing unit- 3 473.l60 Ill/1969 Wahlstrom 340/1715 3.510.201 5/1971 Langley 340/1725 8 l Drawmg 1 2 RECOIL (&#34;PF SUPPRESSION xsvsomo g,  
  21 22 23 CPRINTER l ?7 [7117 5 7, &#39;E&#39;n 231 25 ELZ &#39;EIN 29 28 9 co-rRoL CIRCUIT I I A! our  CLOCK PULSE A GENERATOR 1 2 N ZINTEGRATED cmcurr CHIP POWER SUPPLY ETC.  
 PMENTEDAFRZZIHTS 24 RECOIL EG HP SUPPRESSION KEYBOARD umr I \21 22 23 25 3 {PRINTER I k l I A13 AIN E11 H 25 L E 1 -E1N 31 1g!&#34;- x 5g J N I Y x t P B 9 fi T &#34;1 Y i k 9 CONTROL I CIRCUIT I AN} E1 l E2 E3 EN ARITHMETIC &#39;LINPUT fumr REGISTER V i J 19 I&#39;- CLOCK PULSE A A A GENERATOR Z2 ZINTEGRA TED POWER SUPPLY ETC.  
 CIRCUIT CHIP TRANSMISSION OF SIGNALS BETWEEN A DATA PROCESSING SYSTEM AND INPUT AND OUTPUT UNITS BACKGROUND OF THE INVENTION The present invention relates to a circuit arrangement for transmitting signals between a data processing unit and external input and output units for this system.  
  With the advent of modern semiconductor technology, it has become highly advantageous to be able to fully utilize the MOS processing techniques in the construction of circuit arrangements. Accordingly. it has become desirable to construct mainly all of the circuit elements of a table model calculator in a large scale integrated circuit. While it is possible to significantly reduce the size of the calculator by the use of integrated circuitry. a problem arises as to the maximum possible number of terminals which can be arranged in the available space on the integrated circuit chip.  
 SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit arrangement with which the terminals of a data processing unit. such as. for example. a calculator, can be utilized both as the input and output terminals of the system. even when input and output signals are simultaneously present. without the loss of any information.  
  This and other objects of the invention are accomplished by providing a circuit arrangement which selec tively switches the terminals between input and output units. A switching circuit is connected with each of the terminals of the data processing unit. The switching circuits. in their normal state. connect the terminals to the ouput unit and. when activated, connect the terminals to the input unit. A control circuit is coupled to the input unit and when the control circuit determines the presence at the input unit of information to be supplied to the data processing unit, the circuit activates the switching circuits so as to temporarily connect the terminals to the input unit. When the control signals from the control circuit are removed from the switching circuits. the terminals are automatically reconnected to the output unit.  
  The output unit. which is connected to the data processing unit. is an electromechanical unit, such as. for example, a printing unit. Such electromechanical units operate relatively slowly as compared with the input unit and. therefore. it is preferable to have the output unit normally connected to the terminals of the system. When both input and output signals are simultaneously present, the flow of the output signals can be temporarily interrupted for the duration of flow of the input signals. which is. for example, approximately 40 us. This process interrupts the flow of output signals for such a short time that none of the information content of the output signals is lost and thus there is no adverse influence on the operational dependability of the output unit.  
  The circuit arrangement, therefore. provides for maximum utilization of the terminals of the data processing unit, thereby permitting better utilization of the integrated circuitry of the system.  
 BRIEF DESCRIPTION OF THE DRAWINGS The single FIGURE is a schematic circuit diagram of one preferred embodiment of the present invention.  
 DESCRIPTION OF THE PREFERRED EMBODIMENTS In the single FIGURE, an integrated circuit chip 4 is shown which has terminals 11, 12, 13 N. X. Y. 2,, Z, Z the terminals 11, 12, 13 N being connected with the wiper sides of respective external electronic switches a,. a a;,, a,- and with the wiper sides of respective internal electronic switches b,, 1),. b by. The switches are shown in the drawing only symbolically and are intended to represent electronic change-over switches. The integrated circuit chip 4 preferably comprises circuitry of an electronic calculator. or any other type of a data processing system. Terminals X and Y are permanent control signal connec tions. and terminals Z Z are permanent connections to a power supply. or any other type of connections which may not be operated in a time multiplex fashion.  
  The electronic switches b.. b,. b are disposed in the integrated circuit chip 4 and are components of an internal switching circuit 5b. The electronic switches b,. 11 by each have one fixed contact connected to an internal output means 6, preferably an output register. via lines A1, A2, A3, AN. respectively. and each have their other fixed contact connected to an input means 7, preferably an input register, via lines E1, E2, E3, EN. respectively. The chip 4 also includes an arithmetic unit 8, a control circuit 9 and a clock pulse generator 10. The clock pulse generator I0 is connected to both the arithmetic unit 8 and the com trol circuit 9 and. therefore. the operations of both are synchronized. The arithmetic unit 8 is also connected in a known manner with the input register 7 and the output register. The control circuit 9, consisting of an AND-gate, 28 and a one-shot multivibrator 29, controls the operation of the internal switching circuit Sb. and thus of the electronic switches b,. b, by, by control signals applied via a line Y.  
  The terminals 11, 12, N of the chip 4 are externally connected with the electronic switches 0,. a a The electronic switches a,. a,. a which are components of an external switching circuit 50. are connected with the external output unit 1, preferably a printer, via connections Al 1, A12, A13, AlN. respectively. and with the external input unit 2, preferably an input keyboard. via connections E11, E12, E13, EIN respectively. Switches 0, to a are controlled by signals supplied by control circuit 9 via line Y.  
  The terminals 11, 12, N are switched between input and output states in a time multiplex operation as described below. The electronic switches a and the electronic switches b,. b by are in a state. when no data information is being fed in through the input keyboard 2, which keeps the output register 6 and the output unit 1 in a continuously conductively connected relationship. When one of the input keyboard contacts 21, 22, 23 of the input keyboard 2 has been actuated, the voltage potential of a bias source 24 is connected to the corresponding line E11. E12, E13 or EIN. Via an OR-gate 25 this signal also reaches a recoil suppression unit 3, consisting essentially of an R-C- delay circuit. After the vibrations of the keyboard contacts have died out. an output signal of the recoil suppression unit 3 enables input line X of the AND- gate 28 of control circuit 9. The other input of the AND-gate 28 is fed with clock pulse signals by the clock pulse generator 10, as is the arithmetic unit 8. The output signal triggers the one-shot multivibrator 29 which sends the corresponding switching control signals to the external electronic switches a,, a a via line Y and to the internal electronic switches b b r b via line Y. The terminals 11, 12, N, therefore. are temporarily switched to an input state in that the input keyboard 2 and the input register are conductively connected together After a relatively short period of time, which is sufficient to permit the input signals to pass to register 7, the one-shot multivibrator 28 is reset, and the electronic switches a,, a a and the electronic switches 1),, b by are switched back to their normal output state.  
  it will be understood that the above description of the present invention is susceptible to various modifications, changes and adaptations and the same are intended to be comprehended within the meaning and range of equivalents of the appended claims.  
 We claim:  
  1. A circuit arrangement for transmitting signals between a data processing means and external input means and external electromechanical output means, said arrangement comprising, in combination: a plurality of terminals connected to said data processing means; a plurality of first switching means, each associated with a respective one of said terminals, said first switching means normally connecting their respective terminals with said external electromechanical output means; and control means having its input coupled to said external input means to determine the presence, at said external input means, of information to be supplied to said data processing means and in response thereto switching said first switching means for causing said terminals to be temporarily connected to said external input means.  
  2. An arrangement as defined in claim I wherein said data processing means is in the form of an integrated circuit.  
  3. An arrangement as defined in claim 1 wherein said data processing means comprises an internal input means, an internal output means and a plurality of second switching means, each associated with a respective one of said terminals for selectively connecting one of said internal output and input means to said terminals, said second switching means normally connecting said internal output means to said terminals; and said control means being connected to said second switching means for causing said internal input means to be temporarily connected to said terminals during the times when said external input means are connected to said terminals.  
  4. An arrangement as defined in claim 3, wherein said internal output and input means are output and input registers, respectively.  
  5. A circuit arrangement as defined in claim 4, further comprising recoil suppression means, and wherein said external input means includes an input keyboard having a plurality of contacts. and said recoil suppression means connects said input keyboard to the input of said control means, so that said external input means only provides input signals to said control means after any vibrations of said contacts of said keyboard have died out.  
  6. A circuit arrangement for transmitting data signals between a data processing unit, including an internal data input means and an internal data output means, and external input and electromechanical output units, said arrangement comprising in combination:  
 a plurality of input/output data terminals for said data processing unit;  
 a like plurality of first switching means, each associated with a respective one of said data terminals, for connecting said data terminals to said external electromechanical output unit when in a first position and for connecting said data terminals to said external input unit when in a second position, each of said first switching means normally being in said first position;  
 a like plurality of second switching means. disposed within said data processing unit and each associated with a respective one of said data terminals, for connecting said data terminals to said internal data output means when in a first position and for connecting said data terminals to said internal data input means when in a second position, each of said second switching means normally being in said first position; and  
 control means coupled to said external input unit and responsive to the presence, at said external input unit. of data to be supplied to said data processing unit for temporarily switching all of said first and second switching means to said second position, thereby causing said data terminals to be temporarily connected between said external input unit and said internal data input means, and for thereafter returning all of said first and second switching means to said first position, thereby causing said data terminals to be connected between said external electromagnetic output unit and said internal data output means.  
  7. A circuit arrangement as defined in claim 6 wherein: said data processing unit includes a clock pulse generator means for controlling the operation of same; and  
 said control means includes an AND-gate having one input connected to the output of said clock pulse generator means and a second input connected to said external data input unit, and a control pulse generator means having its input connected to the output of said AND-gate and its output connected to all 05 said switching means, said control pulse generator means being responsive to an output signal from said AND-gate for providing an output pulse to control the position of said switching means.  
 8. A circuit arrangement defined in claim 7 wherein said control pulse generator means is a one shot multivibrator.