Capstan control for a tape drive system
BACKGROUND OF THE INVENTION 
     The present invention relates to systems for controlling the transport of an element of indeterminate length and, more particularly, to tape drives adapted for use with computer systems wherein intermittent but precisely located transport of the tape is necessary. 
     In many computer applications, it is necessary to record or retrieve intelligence from a medium comprising a length of magnetic tape. In performing the recordation or retrieval, it is commonly necessary to periodically stop the advance of the tape abruptly pursuant a command from the computer, and subsequently re-initiate the transportation of the tape so that further portions thereof may be driven past a magnetic read/write head. Typically this movement is accomplished through a capstan drive system wherein the tape is wrapped partially around a capstan, the friction therebetween serving to transfer the tape from a supply reel to a take-up reel. Take-up mechanisms are commonly provided for maintaining a certain amount of slack in the tape on either side of the capstan, to mitigate the stress on the tape which arises from the sudden acceleration and deceleration of the capstan drive. 
     The sudden acceleration and deceleration of the tape imposes severe requirements upon the capstan control system. Changes in tape speed must be accomplished rapidly in order to maximize the amount of tape available for recording information. It is necessary too that the tape be stopped in a precise position; if it is stopped short access time to the next record on the next start command will be unduly long. If transport of the tape is allowed to continue unduly, insufficient distance will be left to allow the tape to be brought up to speed before reading the subsequent intelligence recorded upon the tape. 
     Many attempts have been made to provide means for controllably accelerating and/or decelerating transported tape. It has been found, however, that by closely controlling the deceleration characteristics of the system in such a way as to avoid &#34;overrun&#34; of the driven tape, satisfactory transport system operation may be maintained without the necessity for providing complex acceleration waveforms. This is due to the fact that if stopping characteristics are precisely tailored adequate distance can then be left on the tape to allow for a known acceleration characteristic. 
     Many of the prior art control systems have concerned themselves only with monitoring tape velocity, based on the fact that distance traveled is the time integral of velocity. While this approach has been relatively successful, systems employing it have oftentimes lacked the precision desired in modern-day tape transport mechanisms. It will therefore be appreciated that it would be highly desirable to provide an improved tape transport mechanism which precisely controls the distance traversed by a transported length of tape during deceleration thereof. 
     It is therefore an object of the present invention to provide improved means for decelerating a transported tape. 
     It is another object of the invention to provide improved means for precisely regulating the position of a transported tape after it is brought to rest. 
     It is still another object to provide a tape transport control which will allow the reversing of a capstan drive should an overly long distance be required to stop a transported tape. 
     Another object of the invention is to achieve improved current limitation in a tape transport system having superior deceleration characteristics. 
     SUMMARY OF THE INVENTION 
     These and other objects are achieved through the provision of at least one train of pulses representative of capstan rotation. The pulses are counted and, upon the arising of a &#34;stop&#34; signal, converted into an analog signal representative of the instantaneous position of the tape. A function generator, also energized in response to the stop signal, produces a reference signal whose waveshape corresponds to a desired position-versus-time characteristic. The two signals are algebraically combined and the error signal employed to either plug or dynamic brake the drive motor. Additional control logic monitors the distance traveled by the tape subsequent to the initiation of the stop signal and, if it exceeds a predetermined value, applies a reversing signal to the motor to cause the tape to be returned to the desired position. A current limit circuit continually monitors the motor drive, disabling a portion of the power circuitry when the sensed current is too high and re-enabling the circuitry after the current drops below the desired level. Circuit time delays, hysteresis and motor inductance cause the current to assume a saw tooth waveform about the desired limit level. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic diagram illustrating a tape transport system utilizing the teachings of the present invention; 
     FIG. 2 depicts certain of the signals produced at various points within the system; 
     FIG. 3 is a detailed circuit schematic diagram setting forth details of certain elements of the system; and 
     FIG. 4 is a schematic circuit drawing showing details of the current limit circuit used in the system of FIG. 1. 
    
    
     DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT 
     FIG. 1 represents a capstan drive control system suitable for use in a modern-day computer. A capstan (not shown) frictionally engages an element of indeterminate length such as a tape or web, advancing the element as it is rotated by capstan motor 10. While motor 10 may be of any suitable type, it is preferably a D.C. motor whose armature has a relatively low inertia and a high torque-to-weight ratio. The motor may be energized by switching elements such as power transistors arranged in a bridge or H-configuration such that by energizing transistors in a first pair of diagonally opposed arms of the circuit the motor drives in a forward direction. Conversely, by energizing transistors in the other, opposed circuit arms the direction of motor torque may be reversed. Such an arrangement is disclosed in detail in U.S. Pat. No. 3,764,876, filed Oct. 1, 1971, and assigned to the assignee of the present invention. 
     Also as taught in the foregoing patent, a control circuit is provided for varying the degree of conduction of the various power transistors, and therefore the voltage impressed across motor 10 and so the speed thereof. This function is represented by power driver 11 which receives commands from a current limit control 12, a power driver logic unit 13, and an analog control circuit 14. Under normal operating conditions, power driver 11 operates to start and to maintain tape velocity by controlling the operation of the motor 10 in accordance with signals received from power driver logic 13 and from signals from velocity d/a converter 15. An optical encoder 16 is provided, and linked by means of photoelectric pick-up 17 to a rotating disk 18 having elements formed thereon which interrupt a beam of light directed upon the pick-up elements. The signals thus derived are converted into a train of pulses by encoder 16 and transmitted to a velocity counter 19 which outputs digitally encoded signals representative of the sensed velocity of the capstan drive system. Typically, such signals are derived by counting the pulses from oscillator 20 which arise between the pulses supplied from encoder 16. If more than a predetermined number of oscillator pulses are interspersed between the encoder pulses a correction signal is generated to raise the speed of the capstan drive motor. Conversely, if too few pulses are accrued the drive motor 10 is allowed to slow down. 
     Optical encoder 16 is advantageously constructed so as to output a double train of pulses in response to the rotation of disk 18. The pulses are displaced by some predetermined phase angle, advantageously 90° so that by comparing the relative timing of the pulses of the two trains the direction of rotation of the capstan motor 10 may be determined. The pulse trains are applied to a position counter 21 which outputs encoded signals representative of rotation of disk 18, and thus the advancement of the driven tape, subsequent to some specified event. The encoded signals are then applied to final position control logic element 22, and a position d/a converter 23 to produce an analog signal whose instantaneous value represents the distance traversed by the driven tape after the specified event. 
     The power driver logic unit 13 is adapted to receive a FORWARD signal from a Tape Control Unit (TCU) which is converted into an appropriate drive signal as indicated on the output leads of the logic unit. The GO signal from the TCU is conditioned to a GO-1 signal by the GO holdover logic 24 and used as a gating signal to the Power Driver Logic. Such signals are commonly available from the control units associated with the tape transport systems of the type illustrated, and are used for conventional tape drives such as the IBM 2420 Model 5 tape unit. 
     The discontinuance or &#34;dropping&#34; of the GO signal is utilized to initiate deceleration of the transported tape. The GO signal is applied to GO Holdover Logic 24 and position counter 21, which is thus preset. Upon the dropping of the GO signal and after receiving a predetermined number of pulses from encoder 16, the GO HOLDOVER logic acts to apply a GO-1 enabling signal to a stop control 26, power driver logic 13 and position counter 21. A function generator 25 is subsequently enabled by stop control 26 to apply a reference signal to a summing network 27, from whence the algebraic sum of the function generator signal and analog signal from converter 23 are applied to a comparator 28. When stop control 26 subsequently times out it disables function generator 25 and enables final position logic element 22. 
     The operation of the system will now be discussed in detail, making specific reference to the enumerated elements of FIG. 1. When it is desired to advance or transport the tape the power drive logic, block 13, is conditioned by the suitable FORWARD signal, and a GO-1 signal is applied for initiating the appropriate power signals to driver 11. As the operation of this portion of this system is fully described in U.S. Pat. No. 3,764,876, its operation will not be set forth in detail herein. When it is desired to stop the tape, and therefore, to begin an inter block gap (IBG) an appropriate signal, herein corresponding to an absence or &#34;dropping&#34; of the GO signal ocurs. The motor 10 continues to be driven at a nominal read/write velocity by the gain an compensation circuit 14. The absence of the GO signal causes position counter 21 to be reset to a value corresponding to a predetermined count. The absence or dropping of the GO signal also activtes GO HOLDOVER logic circuit 24 so that, depending upon the conditioning of element 24 by density and speed signals, the logic circuit produces a GO-1 signal after the application thereto of a number of pulses corresponding to a predetermined numer of lines counted from disk 18. After the disk has rotated a certain number of lines, corresponding to an advancement of the tape by a desired distance, GO HOLDOVER element 24 produces a GO-1 signal which is applied to position counter 21, stop control 26, and power driver logic 13. When the GO-1 signal drops it causes position counter 21 to begin producing step-wise pulses representative of counted pulses from encoder 16. Stop control 26, which comprises a time delay device, commences its timing cycle, a function generator 25 begins to output a characteristic waveform. The foregoing activities can be discerned from the waveforms of FIG. 2; waveform A corresponds to the GO signal, waveform B corresponds to the GO-1 signal, and waveform C corresponds to pulses of one of the wave trains outputted by encoder 16. Waveform D represents the output of d/a converter 23, whose starting value (that existing at termination of the GO-1 signal) corresponds to a predetermined count. Waveform E, on the other hand, represents the signal produced by function generator 25. The dotted portion denotes the balance of the function which would arise if operation of function generator 25 were not first terminated. The function is advantageously of parabolic form, having the form y = ax 2  + bx + c and corresponding to a desired instantaneous position-versus-time characteristic of the decelerating tape. 
     It will be seen that the output of converter 23 and the waveform of function generator 25 are substantially mirror images of one another. Should the position-versus-time characteristic of the decelerating tape correspond to the function generator output, the algebraic sum of the curves will be zero. This sum is taken at summing junction 27; any difference arising between the two signals is applied to comparator 28. A positive error signal, corresponding to insufficient deceleration, gives rise to a high or &#34;up&#34; logic level at the comparator output and the resultant signal is transmitted to the power drive logic 13. The applied signal is utilized to produce a BKWD H. P. drive signal for effecting the plugging, or reverse-torque operation, of motor 10. As motor speed diminishes, the instantaneous change of tape travel as a function of time declines until the error signal disappears. Waveform G of FIG. 2 depicts the discrete pulsed output of comprator 28, while signal H depicts the response of power drive logic 13. At this time comparator 28 ceases to produce a plugging signal and the motor 10 is allowed to be slowed under the influence of dynamic braking only. This activity continues, with the motor drive circuitry switching back and forth from plugging to dynamic braking modes to cause the position-versus-time characteristic of the motor to closely follow the signal output by function generator 25. 
     After a predetermined period of time has elapsed, stop control 26 times out as shown at curve F of FIG. 2 and disables function generator 25, allowing the signal produced thereby to retun to its quiescent level as shown in waveform E. The stop control signal also conditions the power drive logic 13 to accept an addional backward hign-power drive signal from final position control 22. During the deceleration process, final position control 22 receives encoded signals from position counter 21. Should the count received be in excess of that corresponding to the desired deceleration distance, control 22 outputs a signal which in conjunction with the stop control signal, effects a plugging or backward high-power drive signal for motor 10. While not necessary in practicing the instant invention, it may be desirable to apply less than full backward power to the motor; this may conveniently be accomplished by resetting the threshold of operation of current limit control 12. Since its forward rotation has ceased, the motor then reverses and translates the tape back past a point represented by the end of the desired deceleration distance. This activity is represented by waveform D of FIG. 2. 
     Upon next starting the inner block gap control 30 monitors the capstan velocity through velocity counter 19 and position from position counter 21. As the tape drive begins to accelerate the displacement of the tape causes position counter 21 to count up to its desired value, at which point an IBG count complete signal (waveform J) is applied to IBG logic circuit 30. If the velocity of the tape is within desired limits, the WRITE INHIBIT signal is disabled allowing a write operation to start (waveform K of FIG. 2). This assures that writing cannot be initiated until the distance between the previous record and the next one is no less than a predetermined length and that the tape velocity is close to the normal &#34;write&#34; velocity. IBG distance is then the sum of the write go-holdover, stop and start distances. 
     Turning now to FIG. 3, there is shown in detail certain of the elements comprising the d/a converter 23, summing junction 27, and comparator 28 of FIG. 1. Six inputs are shown, for receiving digitized signals from position counter 21 (not shown) in the usual binary fashion. Biasing resistors 32a-f apply a positive bias of 5 volts to the input terminals, while resistors 33a-4 and diodes 34a-f transmit the pulses to transistors 35a-f. The signals arising at the collector terminals of the transistors are passed through resistors 36a-f, which are weighted in the usual binary manner, to one input of an operational amplifier 37. This gives rise to an analog signal whose instantaneous value reflects the angular displacement of disk 18, and thus the displacement of the transported tape, from the time of energization of the counting system. In one successfully testd embodiment, the output of amplifier 37 ranged from -10 to +10 volts, covering a range of 64 &#34;counts&#34; or disk increments. The desired stop level, 0 volts, represents a count of 32 increments such that if it is wished to utilize, say, 20 increments in deceleration the system must first be conditioned to a value of 12 increments or approximately -6.3 volts as can be seen from waveform D of FIG. 2. 
     The conditioned analog signal produced by amplifier 37 is summed at element 27, which comprises resistors 38 and 39 and operational amplifier 52. Resistor 39 serves to couple the output of function generator 25 to the summing node. The function generator may advantageously be comprised of operational amplifiers 40, 41 connected as integrators by means of feedback capacitors 42 and 43 respectively and summing amplifier 48. Each of the capacitors is shunted by means of an analog switch 44, 45 operated in response to a &#34;stop&#34; signal from stop control 26. The analog switches are operative to shunt the capacitors through current limiting resistors 46 and 47. As will be appreciated by those skilled in the art, the cascading of amplifiers 40, 41 produces an increasing voltage whose curve is determined by the values of the various resistors and capacitors used in the networks associated therewith. The voltage waveforms thus produced are summed, along with the voltage supported across a zener diode 47&#39;, at a final amplifier 48 by way of a network of suitably sized resistors 49, 50 and 51 whose values are selected to tailor the resultant curve to the position-versus-time characteristic desired for the decelerating tape. 
     The signal appearing at the output of summing network 27 is applied to one input of a comparator 53 connected so as to produce an error signal when the algebraic sum of the signals produced by d/a converter 23 and function generator 25 exceeds some minimum positive value. As has been described hereinabove, the resulting signal outputted by the comparator triggers the plugging operation of drive motor 10. The plugging persists until the error signal declines below some threshold value, at which point it ceases and power driver 11 effects dynamic braking of the motor. 
     Turning now to FIG. 4, there is depicted a current limit circuit adapted for use with the capstan drive control system of FIG. 1 and containing portions of those elements designated therein as Nos. 11 and 12. 
     More specifically, a pre-driver transistor Q 1  receives a signal for allowing current flow through one arm of the bridge or H-type motor drive circuit. Again, the motor drive circuit is advantageously of the same type disclosed in U.S. Pat. No. 3,764,876 in which diagonally opposing arms of the bridge or H control circuit are energized to provide current flow through a motor. 
     In order to limit current in both the forward and reverse direction it is necessary to monitor two parallel circuit arms; however, since the circuits are substantially identical only the current limit for one arm will be described. Pre-drive transistor Q 1  receives a power drive signal constituted by a fixed-magnitude, high power (H.P.) signal to drive parallel output transistors Q 2 , Q 3 , for providing the requisite power to drive motor 10. Pre-drive transistor Q 1  is coupled between positive and negative voltage sources of 10 volts each through resistors R 1  and R 2  . The emitter terminals of output transistors Q 2 , Q 3 , are coupled to a source of reference potential, shown herein as ground, through resistors R 3  and R 4 , respectively, while the collectors thereof are coupled to one terminal of driver motor 10 (not shown). The voltage arising across resistor R 2  is coupled to the positive and negative terminals of an operational amplifier 60 through resistors R 5  and R 6 , respectively, while the emitter terminals of output transistors Q 2  and Q 3  are coupled to the negative terminal of the amplifier through resistors R 7 , R 8 . A feedback resistor R 10  is provided about amplifier 60 and a comparator 61, is coupled to amplifier 60 by means of a resistor R 11 . Resistor R 13  in combination with bias resistor R 12  provides hysteresis in the comparator 61. Resistor R 14  applies a suitable biasing potential to the negative input terminal of amplifier 60 for establishing the desired current level. 
     When comparator 61 is gated into operation it produces a negative logic signal which is fed back to the power driver logic, and acts to disable the drive signal applied to the base of the pre-drive transistor Q 1  in response to a current flow through the power transistors in excess of some predetermined amount. This amount can be easily determined by properly sizing resistors R 5 , R 6 , R 7  R 8  and R 9  in the following manner. 
     With the motor energized in the forward direction, and the depicted circuit arm conducting the motor current will be the sum of the emitter currents of transistors Q 2  and Q 3 , minus the base drive currents thereof. As will be appreciated by those skilled in the art, the base drive current is substantially equal to the emitter current of the drive transistor Q 1 . In order to facilitate the following explanation, the voltage appearing at the emitter terminal of transistor Q 1  will be denominated v 4  while the negative bias at the opposite side of resistor R 2  will be denominated v 5 . The reference potential shown herein as ground is denominated v 1 , while the emitter voltages of output transistors Q 2 , Q 3  are denominated v 2  and v 3 , respectively. Now motor current i m  may be equated to the expression ##EQU1## or ##EQU2## It is assumed that a balanced, non-saturated operational amplifier such as that shown at 60 will have zero volts at the input terminals thereof, so that the sum of the currents i s  appearing at the input terminals may be expressed as ##EQU3## It will now be apparent that there must be some constant K such that ##EQU4## KR 5  = R 2  ; KR 6  = R 2  ; KR 7  = R 3  ; and KR 8  = R 4 . 
     By properly sizing resistors R 5  through R 9  it will be understood that the current inputs to comparator 60 can be made to track motor current such that comparator 60 will output a signal in response to motor current above some predetermined limit. As set forth above, the effect of the actuation of comparator 61 is to apply an amplified disabling signal to the power drive circuitry for terminating motor current. After some time delay, whose value is primarily a function of transistor parameters, if current through the transistors has declined to an allowable level the drive signal is re-applied to transistor Q 1  and the output transistors re-energized. Due to the turnoff delay inherent in the drive transistors, the system has adequate hysteresis for satisfactory operation. The inductance of the motor, and the presence of the freewheel diodes connected thereabout in the usual fashion allow motor current to continue, though at a declining rate, during the off-times of the power transistors. 
     It will therefore be appreciated that the apparatus described hereinabove constitutes an improved capstan drive control system with superior stopping control characteristics, and providing limitations on transistor current for controlling and protecting the system. While it is contemplated that the system disclosed herein constitutes the best embodiment for present purposes, it should be understood that many modifications and applications can be made to the disclosed apparatus to suit particular conditions and applications. It is therefore anticipated that the claims hereof shall cover all such modifications and applications as do not substantially depart from the system disclosed herein.