Display of variable length vectors
DEDICATORY CLAUSE 
     The invention described herein was made under a contract with the Government and may be manufactured, used, and licensed by or for the Government for governmental purposes without the payment to us of any royalties thereon. 
    
    
     BACKGROUND OF THE INVENTION 
     Display systems often face the problem of painting a vector between any two points on a cathode ray tube screen. Depending on characteristics such as, time available to draw the vector, the refresh rate of the vector, the rate of change of the orientation of the vector, tube characteristics, and vector length; it is possible to get serious variations in intensity levels for individual vectors. The long vector being plotted may be hard to discern, while the short vector may exceed the safe operating point for the tube. In prior art systems, a simple charging voltage proportional to the X and Y coordinates of the vector is applied to integrators which are controlled by a fixed gate generator. Such a system can result in serious variations in writing speed and illumination intensity. 
     SUMMARY OF THE INVENTION 
     The variable length vector display system maintains a constant cathode ray tube illumination intensity when writing a vector of any length on the viewing screen of the cathode ray tube. The linear sweep outputs of X and Y operational amplifier sweep generators, integrators, are controlled by a variable gate generator which operates as a function of the combined coordinate input signal voltages to provide a vector length display having substantially uniform writing speed and illumination intensity. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The single FIGURE is a preferred embodiment of the variable length vector control circuit shown partially in block diagram and partially in schematic. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring to the drawing, a first pair of input voltages X 0  and X 1 , are applied to the input terminals of a comparator 11; and, a second pair of input voltages Y 0  and Y 1 , are applied to the input terminals of a comparator 13. These input voltages may come from a conventional radar receiver and may, for example, be indicative of the speed and direction of an aircraft. Voltages X 0  and Y 0  define the origin or start point of a vector to be displayed, while voltages X 1  and Y 1  define the end point, or head, of the vector to be displayed. The output signals from comparators 11 and 13 are ΔX and ΔY and represent the difference between the respective input voltages. Thus, ΔX = X 1  - X 0  and ΔY = Y 1  - Y 0 . The ΔX signal is simultaneously applied to a scaling amplifier 15 and to an arithmetic unit 17. The ΔY signal is simultaneously appled to a scaling amplifier 19 and to arithmetic unit 17. Arithmetic unit 17 is of conventional design and may include, for example, voltage multipliers employing feedback for forming an output signal, L v , indicative of the square root of the sum of the squares of the input signals. Thus, L v  =√ΔX 2  + ΔY 2 . The output signal from arithmetic unit 17 is coupled directly to a variable gate generator 21 and, is coupled by way of an invertor 23, to multipliers 25 and 27. 
     Scaling amplifiers 15 and 19 simply modify the input signals by a constant, K, which is a deflection factor. Thus, the output signals from scaling amplifiers 15 and 19 are K x  ΔX and K y  ΔY. It follows, therefore, that the output signals from multipliers 25 and 27 are, respectively, K x  Δ/l v  and K y  ΔY/L v . These signals are applied to respective integrators 29 and 31 whose integration time is controlled by variable gate generator 21 operating respective unijunction transistors 30 coupled across integrating amplifiers and capacitors C. The output signal from integrator 29 is applied to the deflection circuit 33 of a display tube 35, while the output signal from integrator 31 is applied to the deflection circuit 37 of tube 35. The coordinate voltages X 0  and Y 0  of the origin of the vector to be displayed are applied to deflection circuits 33 and 37 respectively. In response to the voltage input signals, the circuit is effective to control the intensity of the display on display tube 35 regardless of the length of the vector displayed. Prior art systems would simply apply a charging voltage, proportional to ΔX and ΔY, to integrators 29 and 31 which would be under the control of a fixed gate generator. Such prior art systems can result in serious variations in writing speed and illumination intensity. 
     Deflection circuits 33 and 37 may be electrostatic or electromagnetic deflection means, such as deflection plates or deflection coils, as is well established in the art. Summing amplifiers 32 and 34 are coupled to receive the outputs from integrators 29 and 31 respectively and to receive the respective X 0  and Y 0  inputs coupled to the deflection circuits for developing the respective deflection voltages across the tube 35. The effective writing speed (WS EFF ) on the face of tube 35 is a function of the individual writing speeds in the X and Y direction. Thus, 
     
         WS.sub.EFF =√(WS.sub.x).sup.2 + (WS.sub.y).sup.2 .  (1) 
    
     Assuming linearity and unity gain in the deflection system, the individual writing speeds WS x  and WS y  are directly related to the sweep integrator slope. Thus, ##EQU1## K x , K y , R, and C are known constants, therefore the writing speeds in the X and Y directions are directly proportional to ΔX and ΔY, and the effective writing speed is proportional to the vector length L v , where 
     
         L.sub.v =√(ΔX).sup.2 + (ΔY).sup.2 .     (3) 
    
     rearranging terms and defining or limiting K x  = K y  = K, it is apparent that ##EQU2## By solving equation 3, the compensation factor L v  is obtained from arithmetic unit 17 which corrects for writing speed variations. The respective X and Y charging voltages are multiplied by the inverse of this factor (1/L v ) so that the new writing speeds become ##EQU3## and, therefore, substituting equation 5 into 1, it is apparent that ##EQU4## 
     The vector length L v , calculated by arithmetic unit 17, is applied as an input to variable gate generator 21 wherein it is used to control the integration time of integrators 29 and 31. The total integration time Δt 1  is, therefore, Δt 1  = Δtl .sub. v where Δt is initially set for some minimum length vector. Thus, the voltages out of integrators 29 and 31 are, respectively, ##EQU5## 
     Thus the sweep generator output voltages supply the appropriate variable X and Y vector length signals and the sweep generators or integrators are variably controlled to provide uniform writing speed and illumination intensity of the cathode ray tube. 
     Although a particular embodiment and form of this invention has been illustrated, it is apparent that various modification and embodiments of the invention may be made by those skilled in the art without departing from the scope and spirit of the foregoing disclosure. Accordingly, the scope of the invention should be limited only by the claims appended hereto.