Static instantaneous overcurrent relay with low transient overreach
BACKGROUND OF THE INVENTION 
     The present invention relates to an instantaneous overcurrent relay, and more particularly to a static instantaneous relay with low transient overreach. 
     As a result of advancements in solid state technology, static protective relays have been developed. Exemplary static relays are disclosed in U.S. Pat. No. 4,092,690, entitled, &#34;Protective Relay Circuit Providing a Combined Distance and Overcurrent Function&#34;, issued May 30, 1978; and in U.S. Pat. No. 4,034,269, entitled, &#34;Protective Relay Circuits&#34;, issued July 5, 1977. 
     An overcurrent protective relay is employed when it is necessary to trip a circuit breaker when greater than a predetermined magnitude of current flows into a particular portion of a power system. Such overcurrent relays are broadly characterized as &#34;instantaneous&#34; or &#34;time delay&#34;, with &#34;time delay&#34; being further characterized as &#34;inverse&#34;; &#34;very inverse&#34;; or &#34;extremely inverse&#34;. An instantaneous overcurrent relay is generally provided with no intentional time delay whereas a time delay overcurrent relay is provided with various degrees of time delay. 
     Instantaneous overcurrent relays have a tendency to overreach. Overreach is generally defined as the tendency of a relay to pick up, i.e., operate, for fault currents less than one would expect; that is, if the effect of offset in the fault current wave were neglected. Percent overreach is a term which describes the degree to which this transient tendency exists, and may be defined as follows: 
     Percent overreach=100 (A-B)/A, 
     where 
     A=relay pickup current, in steady state rms amperes. 
     B=the steady-state rms amperes which, when fully offset initially, will just pick up the relay. 
     As an example of the foregoing, consider an application involving electro-mechanical instantaneous overcurrent relays having a typical 15% transient overreach. For a fault with a steady state component of 10 amps, if the relay is not to operate for such a fault, the value A, i.e., the relay pick-up setting, must exceed: 
     (100×10)/(100-15) amperes=11.8 amperes 
     However, referring now to the static instantaneous overcurrent relay, it is to be appreciated that such static relays operate much more quickly than the electromechanical instantaneous overcurrent relays. This is due in large measure to the fact that the electromechanical relays have a certain amount of inertia to overcome before operation whereas no such inertia must be overcome in a static relay. Accordingly, the transient overreach percentage for a static relay approaches the maximum value which is the value for a relay which is fast enough to respond to the instantaneous magnitude of the current. For example, in an exemplary power line having a line angle (θ) of 75°, the maximum transient overreach percentage approaches 33%. This transient overreach percentage can be responded to with the technique discussed above in the case of the 15% electromechanical transient overreach percentage. However, in the case of the 33% transient overreach situation, this technique is undesirable as it requires the pickup of the relay to be set 50% greater than the steady state fault current. Such a setting would be contrary to good protective relaying engineering practices which generally require that the relay be set as close to the steady state load current as possible because this permits more complete coverage of the line under fault conditions. 
     One proposed technique to employ in connection with this greater transient overreach problem in static overcurrent relays is to delay the operation of the relay for a time period sufficient to reduce the transient overreach percentage to an acceptable level. However, this technique is undesirable because excessive delays would be injected to cover all conditions. 
     One application for a static instantaneous overcurrent relay is for protecting an electrical power distribution line. Such a distribution line may have a typical line angle (θ), the angle between the system voltage and system current, of less than about 77°. It would be desirable to provide such a static instantaneous overcurrent relay having a transient overreach of less than 10% for line angles up to about 77°. 
     Accordingly, it is a general object of this invention to provide a static instantaneous overcurrent relay with low transient overreach. 
     It is another object of this invention to provide such a static instantaneous overcurrent relay having a transient overreach percentage of less than 8% for a protected line angle (θ) up to 75°. 
     It is another object of this invention to provide such a static instantaneous overcurrent relay having a transient overreach percentage of less than 8% for a protected line angle up to 75° with a three phase input signal and only one measuring unit. 
     SUMMARY 
     In carrying out one form of my invention, I provide a static instantaneous overcurrent relay for use in protecting an a-c power line from overcurrents wherein the relay receives an input signal representative of the magnitude of the current in the a-c power line and develops a relay output signal when the magnitude of the current in the a-c power line reaches a predetermined magnitude. The relay includes level detector circuit means for receiving the input signal representative of the magnitude of current in the a-c power line with the input signal being in the form of a pulsating waveform having substantially the same frequency as the frequency of the a-c power line, the pulsating waveform comprising a plurality of discrete pulses. The level detector circuit means develops a discrete level detector output signal in response to each one of the discrete pulses of the pulsating waveform which attains a magnitude representative of the predetermined magnitude of the current in the a-c power line. Output circuit means is coupled to receive the discrete level detector output signals. The output circuit includes temporary inhibit means for temporarily inhibiting the development of the relay output signal until the output circuit has received at least two of the discrete level detector signals representative of the predetermined magnitude of current in the a-c power line. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     While the specification concludes with claims particularly pointing out and distinctly claiming that which is regarded as the present invention, the objects and advantages of this invention can be more readily ascertained from the following description of preferred embodiments, when read in conjunction with the accompanying drawings, in which: 
     FIG. 1 is a functional block diagram of one form of static instantaneous overcurrent relay of the present invention. 
     FIGS. 2A-2F are representations of exemplary wave forms associated with the block diagram of FIG. 1. Vertical classifications I, II, III represent three fault conditions. 
     FIG. 3 is a plot of the transient overreach percentage (TOR) in two forms of static instantaneous overcurrent relay as a function of the line angle (θ). Curve 1 represents a static instantaneous overcurrent relay which operates on the instantaneous current greater than or equal to the pickup level. Curve 2 represents a static instantaneous overcurrent relay of the present invention which operates on the second current peak greater than or equal to pickup level. 
     FIG. 4 is a circuit diagram of a portion of the instantaneous overcurrent relay shown in FIG. 1. 
    
    
     BRIEF DESCRIPTION OF THE INVENTION 
     Referring initially to FIGS. 1 and 2, one form of static instantaneous overcurrent relay of the present invention is generally designated 10. The portion of the circuit 10 shown in dashed lines in FIG. 1 will be discussed later. For purposes of clarity, FIGS. 2A-2F are vertically classified I, II, III. Unless otherwise specified, reference simply to FIGS. 2A-2F represents the vertical classification I. 
     The relay circuit 10 includes a level detector 12 for receiving an input signal A. In one form of the present invention, the input signal A is representative of the absolute value of current in the protected a-c power line (not shown). Typically, a current transformer is coupled to the protected line (not shown). Preferably, the input signal A is in the form of a full wave rectified signal, as shown in FIG. 2A. The level detector 12 functions to develop a pulse signal output B shown in FIG. 2B, whenever the input signal A is equal to or greater than a predetermined magnitude. This predetermined magnitude is set to represent the desired pickup level and is shown in FIG. 2A as 1 pu. 
     The output signal B of the level detector 12 is coupled to intermediate signal processing means 14 which functions to fix the time duration of the pulse signal B of FIG. 2B for a predetermined time period T1 following the initiation of the pulse signal B. The predetermined time period T1 is shown in FIG. 2C. In view of its operation, the intermediate signal processing means 14 may be conveniently referred to as a multivibrator, or, as a &#34;one shot device&#34;. The output signal C of the one shot device 14 is coupled directly to AND circuit 16 and also coupled to AND circuit 16 through delay circuit 18. The delay circuit 18 receives the output signal C, and when signal C goes to zero, after predetermined time period T1, delay circuit 18 develops a delayed signal D. Delayed signal D is developed after a predetermined delay period T2, e.g., 1 ms. The duration of delayed signal D, hereinafter T3, is independent of signal input A. Typically, the duration T3 of delayed signal D is at least about 1 cycle or 20 ms, with about 25 ms being preferable. AND circuit 16 thus receives signals C and D and develops an output signal E, shown in FIG. 2E, during coincidence of signals C and D. 
     In FIG. 1, output signal E is shown directed to OR circuit 20 along with several other inputs which will be discussed later. The output of OR circuit 20 is output signal F, representing the output signal of the relay circuit 10. In order to employ this output signal F to trip a relay, seal-in means 22 are provided. The function of seal-in means 22 is merely to extend the duration of pulse signal E which is typically of about a millisecond in duration into the output signal F which is typically of about 20 ms. This 20 ms signal is generally sufficient to trip a coil. 
     The predetermined time periods of T1, T2, and T3 are preferably chosen such that the output signal E of FIG. 2E is developed on the second peak of the input signal A which is greater than or equal to the pick up value of 1 pu. This causes the relay output signal F to be developed on the second peak of the input signal A which is greater than or equal to 1 pu and results in relay pick-up on such second peak. To accomplish this second peak pick up in a typical 50 or 60 cycle power system, T1, T2, and T3 are typically related as follows: T1+T2&lt;8 ms, T3≧20 ms. In a preferred static instantaneous overcurrent relay of the present invention, for a 50-60 Hz power system, T1 is from about 1 to about 7 ms, T2 is about 0.5 ms, and T3 is about 25 ms. 
     In the vertical classification I of FIGS. 2A-2F previously referred to, the three consecutive peaks of the input signal A were of the same value, this value being the pick up value. Referring now to vertical classification II of FIGS. 2A-2F, note that in this case, the first two peaks of input signal A exceed the pick up value 1 pu for a greater time period than the third peak. As in classification I, the output signal E of FIG. 2E is developed at the second peak of input signal A which reaches the pick up value. 
     Referring now to classification III of FIGS. 2A-2F, here the input signal A is shown with a first peak greater than the pick up value, a second peak less than the pick up value, and a third peak greater than the pick up value. In this case, the level detector 12 develops its output signal B only for the first and third peaks, as shown in FIG. 2B. The intermediate signal processing means 14 (one shot device) thus develops its output signal C only in connection with the first and third peaks. The delay circuit 18 develops its output signal D at time T2 following the first shot output signal C. The output signals C and D are coupled to the AND circuit 16 which produces its output signal E when output signal C and D are coincident. In this case, such coincidence occurs at the second peak of input signal A which is greater than or equal to the pick up value. Note, however, that the second peak of A which is of pick up value is actually separated from the first peak of pick up value by a second peak of A which is less than pick up value. 
     The advantage of the above described second peak operation of the relay circuit 10 of FIG. 1 may be better appreciated by considering the following expression, representing the fault current I in the protected line: 
     
         (1) I=(E/Z)[sin(wt-λ-θ)-e.sup.-wt/tanθ sin(λ-θ)] 
    
     where 
     E=power system voltage 
     Z=power system impedance 
     λ=angle of the voltage at fault initiation 
     θ=characteristic angle between system voltage and system current 
     t=time 
     w=2πf; f being frequency 
     Expression (1) may be viewed as comprising a steady state portion: 
     (2) sin (wt-λ-θ), and a transient portion: 
     (3) -e -wt/tan θ sin (λ-θ). 
     Note that the transient portion of expression (3) approaches a zero value when t approaches infinity and approaches a maximum value when θ=90° and λ=0°. This corresponds to the maximum transient overreach of 50% for a relay fast enough to respond to the instantaneous magnitude of the current in the protected line. The worst case, or maximum transient value, is therefore found at λ=0°. Accordingly, the following expression represents the worst case transient form of expression (1), with E/Z being normalized to 1: 
     (4) I=sin (wt-θ)-e -wt/tan θ sin (-θ), 
     with t=0 at fault initiation. 
     Referring now to FIG. 3, expression (4) is solved for various line angles θ. The percent transient overreach (TOR) is then calculated at each of these line angles θ. More particularly, the dashed line, curve 1, in FIG. 3 represents the transient overreach percent (TOR) as a function of line angle θ when expression 4 is solved for a time t equal to the first peak greater than or equal to the pickup value, which has been taken as 1. Curve 2, the solid line, represents the transient over-reach percent (TOR) as a function of line angle θ when expression 4 is solved for a time t equal to the second peak greater than or equal to the pick up value, again taken at 1. Thus, it can be observed that curve 1 represents a static instantaneous over-current relay with a generally undesirably high transient overreach percentage while curve 2 represents one form of static instantaneous overcurrent relay of the present invention having a reduced transient over-reach percentage. 
     Referring now to a typical power distribution circuit, where the line angle θ is typically between 55° and 75°, and λ is typically between 0°-360°. Note in curve 2 (second peak pick up) that the worst case of transient overreach percentage (at λ=0°) is less than 8% while the instantaneous overcurrent relay shown in curve 1 (first peak pick up) has a transient overreach percentage over this same line angle range as great as 31%. It is to be appreciated that other incident angles λ from 0°-360°  will have a transient overreach percentage even lower than that shown in curve 2. It is to be further appreciated that the curve 2 depiction of the operation of one form of static instantaneous overcurrent relay of the present invention is quite similar to the type of transient overreach curve exhibited by electromechanical relays having the previously mentioned built-in inertial delay. 
     Referring again to FIG. 1, the portion thereof shown in dashed lines will now be discussed. Input signal A is also coupled to a second level detector 24 which is similar to first level detector 12. Second level detector 24 is set to detect high level currents so as to provide a minimum trip time for high level faults. Typically, if the setting on the level detector 12 is normalized to 1 pu, the setting on high level detector 24 will be set at about 2.1 pu. The output signal of the high level detector 24 is similar to the output signal of the level detector 12. For this reason, the output signal of the level detector 24 is designated B&#39;. The output signal B&#39; may be coupled to OR circuit 20 through an AND circuit 26. The AND circuit 26 may include as a second input thereto a control or supervision signal, such as a supervision signal from a time overcurrent relay circuit. Such a control signal is simply designated TOC. Thus, the dashed line portions of FIG. 1 represent a bypass circuit means for providing reduced trip time for high level faults. It is to be appreciated that AND circuit 26 may be omitted wherein the high level detector output signal B&#39; may be coupled directly to OR circuit 20. This latter configuration will still provide the above mentioned bypass operation for high level fault conditions. 
     Referring now to FIG. 4, a circuit diagram, generally designated 30, of a portion of the static overcurrent relay 10 shown in FIG. 1 will now be discussed. 
     The circuit 30 includes a first resistor R to receive the current signal from the protected line (not shown) and to convert this signal into a voltage signal (input signal A). Resistor R1 couples this voltage signal to the inverting input of a voltage comparator 32, with a non-inverting input being coupled to a variable voltage source (V pu ) for setting the level of detection. The voltage comparator 32 functions as the first level detector 12 of FIG. 1. The output of voltage comparator 32 is coupled to a positive dc potential through pull-up resistor R2. The function of the positive potential and pull-up resistor R2 is to cause the level detector output signal to reach a value of about 15 V d.c. when the predetermined level (V pu ) is obtained. The output signal of voltage comparator 32 is filtered through an RC network comprising resistor R3 and capacitor C1. The now-filtered signal is further squared by coupling resistor R4 to the inverting input of a second voltage comparator 34. Voltage comparator 34 is set at a level less than the previously mentioned 15 volts d.c., e.g., V R  about 5 volts d.c. The output of voltage comparator 34 is provided with a pull-up resistor, such as R2. The output signal of voltage comparator 34 represents the signal output B of FIGS. 1 and 2B. 
     The output signal B of voltage comparator 34 is coupled through resistor R5 to pulse processing means 36 (one shot device). The presence of output signal B at the input of one shot device 36 causes one shot device 36 to develop an output signal C which continues for a time period T1 determined by the RC network R6-C2. This time period T1 is shown in FIG. 2C. To ensure that the output signal C of the one shot device 36 is present only when the level detector signal B is present, another output signal C of one shot device 36 is coupled to a second input (Io) of the one shot device through an OR device. This coupling may be in the form of the arrangement shown in FIG. 4 wherein resistors Ro, capacitor Co, and an OR device are employed. The output signal C of one shot device 36 is next divided into two branches, each of which is coupled through an AND gate which comprises diodes D2, D3. One branch of the output signal C of one shot device 36 is coupled directly through diode D2 while a second branch of the output signal C of one shot device 36 is coupled through resistor R8 into the base of transistor T 1 . The collector of transistor T 1  is coupled to positive potential through an RC network comprising R9 and C3. RC network R9C3 provides the previously discussed time delay T2 (see FIG. 2D). The collector of transistor T 1  is further coupled to the inverting input of voltage comparator 38 which is set at a threshold level (V R ) of about 5 volts. The output of voltage comparator 38 is coupled through resistor R10 to a second one shot device 40. The one shot device 40 is similar to the one shot device 36. The one shot device 40 develops its output signal, which is actually signal output D of FIG. 1 and FIG. 2D. The time duration (T3) of output signal D is determined by RC network R11C4. 
     The delayed output signal D of the second one shot device 40 and the output signal C are coupled through AND gate D2, D3 to pull-up resistor R12 and the base of transistor T 2 . The collector of transistor T 2  is coupled to positive potential through another RC network R13C5. The purpose of this RC network is to take the pulse signal (output signal E) appearing at the base of transistor T 2  and to convert it into a longer time period signal. Note that the presence of output signal E represents a condition where two peaks of input signal A have reached the pick-up value. More particularly, the pulse signal (output signal E) appearing at the base of transistor T 2  is generally ineffective in time duration to trip a relay coil, i.e., output signal E is typically about 1-7 ms. Accordingly, the RC network R13C5 is provided to extend the duration of the pulse signal for about T1+15 ms, i.e., a total time of about 20 ms. This extended duration signal appearing at the collector of transistor T 2   is coupled to voltage comparator 42 which is set at a level (V R ) of about 5 volts to provide a squaring effect to the trip signal. The output of voltage comparator 42 is coupled to positive potential through another pull up resistor R14, resulting in signal output F (see FIG. 2F). As mentioned previously, such pull up resistors assume that the output of each device so connected assumes one of two discrete levels. 
     Although the circuit 30 of FIG. 4 has been illustrated in connection with discrete devices, it is to be appreciated that commercially available integrated circuits may be conveniently employed to provide the functions depicted therein. In this connection, a single integrated circuit designated #239, commercially available from: Fairchild Camera &amp; Instrument Corp., Mountain View, Ca.; National Semiconductor Corp., Santa Clara, Ca.; and Signetics Corp., Sunnyvale, Ca., may be employed to provide the four voltage comparators 32, 34, 38, 42. Similarly, a single integrated circuit designated #4538, commercially available from: Fairchild Camera &amp; Instrument Corp.; Motorola Semiconductor Inc., Az.; and Solid State Scientific Inc., Pa., may be employed to provide the two &#34;one shot&#34; signal processing means 36, 40. 
     Although the present invention has been illustrated in connection with the processing of an input signal A, representative of the current in a single protected a-c power line, other embodiments are available. For example, input signal A may comprise a three phase input signal. In such an application, for 50-60 hertz, three phase operation, the time period T1 can be set at about 7 ms so as to discriminate between peaks such that the relay circuit would operate no sooner than the second peak in the same phase. Further, after the first peak of pick up level on one phase, this relay will operate on a second peak of pick up level from the other two phases. An advantage of this three phase embodiment is that only a single measuring unit, i.e., relay circuit, need be employed. Similarly, the present invention may be employed in other multi-phase applications. 
     Also, as previously indicated, the static instantaneous overcurrent relay of the present invention may include further signal processing means, such as additional supervision signals. Similarly, the output signal of the relay of the present invention may include further signal processing means such as inhibit means for temporarily inhibiting the development of the output signal for a predetermined time period. This temporary inhibition of the relay output signal (signal F of FIG. 1) may be desirable for system coordination purposes. Typically, this temporary inhibition is in the order of about 1 ms to about 1 sec. 
     It is to be appreciated that the reduced transient overreach percentage provided by the static instantaneous overcurrent relay of the present invention does not suffer from disadvantages associated with the previously mentioned technique of simply delaying the operation of the relay for a time period sufficient to reduce the transient overreach percentage to an acceptable level. For example, referring again to vertical classification III of FIGS. 2A-2F, note that, if a fixed delay time period of 10 ms were inserted after the first peak of pick up level, the relay would not operate properly because the second peak of pick up level in III occurs 20 ms later than the first peak of pick up level. Further, if, instead of 10 ms, a fixed delay time period of 20 ms were inserted, although the relay would now operate properly under the classification III fault condition, such a relay would have an operating time of no less than 20 ms. However, the static instantaneous overcurrent relay of the present invention provides proper operation for the fault condition in III with a minimum operating time of 10 ms, i.e., 1/2 cycle of source frequency. 
     While I have shown and described a particular embodiment of my invention, it will be obvious to those skilled in the art that various changes and modifications may be made without departing from the invention in its broader aspects; and I, therefore, intended in the appended claims to cover all such changes and modifications as fall within the true spirit and scope of my invention.