Pulse width modulated binary rebalance rate capture loop control for two-degree-of-freedom dry tuned gyro
PRIOR ART 
     U.S. Pat. No. 3,354,726, Nov. 1967, W. J. Krupick et al. 
     U.S. Pat. No. 3,902,374, Sept. 1975, Jay Hoffman et al. 
     This invention is related to a dry tuned two-degree-of-freedom gyro. More particularly, this invention is related to a dry tuned two-degree-of-freedom gyro having a pluse width modulated binary rebalance rate capture loop control. 
     BACKGROUND OF THE INVENTION 
     U.S. Pat. No. 3,354,726 describes a two axis device in which all flotation fluids and their accompanying disadvantages have been eliminated. In addition, this invention teaches that by the use of a unique mechanical hinge, critical tolerances on parts normally associated with devices of inertial quality have been reduced. Heretofore, capture loops have required an analogue-to-digital converter (A/D) in order to torque the gyro to reduce torquer error. The elimination of the A/D reduces the cost of the gyro. 
     BRIEF DESCRIPTION OF THE INVENTION 
     The present invention describes a dry tuned two-degree-of-freedom gyro having a pulse-rebalanced rate capture loop control. This configuration eliminates the need for analogue-to-digital converter since the gyro is torqued at a pulse rate using a constant current source. Changes in the two gyro input axes are sensed by the X and Y pickoffs. These signals are amplified and demodulated in the X and Y channels. From the X and Y demodulator, the signals are applied to filters and thence to a shaping network. The output of the filters are also applied to a cross-channel damping network to provide electronic damping of the error signals. The outputs of the cross channel damping networks and the shaping networks are applied to X and Y comparators. These X and Y comparators also have as input signals ramp generator signals. At the output of the comparator, signals representing the summation of the signals from their inputs are pulsed width modulated signals which through logic circuits provide switchover from positive to negative torquing current. 
     Accordingly, it is an object of this invention to provide a pulse width modulated capture loop for a two-degree-of-freedom gyro. 
    
    
     This and other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings wherein: 
     FIG. 1 is a block diagram of the pulse rebalanced rate capture loop circuit of the two axis dry tuned gyro of the invention; 
     FIG. 2 is a diagram illustrating and timing relationships between the pulse width modulated and the quantization waveforms; 
     FIG. 3a is a detailed block diagram of the logic block 30 shown in FIG. 1; and 
     FIG. 3b is a graphical representation of the logic signals. 
    
    
     Turning to FIG. 1, there is shown a block diagram of the two axis dry tuned gyro pulse rebalanced rate capture loop control scheme of the invention. Any component of rate along either the X or Y input axes of gyro 10 produces a gyroscopic torque about these sensing axes causing the wheel of gyro 10 to precess. The gyro pickoffs 13 and 14 sense the wheel position and provide a proportional electrical signal to ac amplifiers 16 and 17. From the amplifiers 16 and 17, the signal is sent through demodulators 18 and 19, notch filters 20 and 21, and cross channel damping compensation networks 24 and 25. The outputs of the main channel shaping networks 22 and 23 are summed in comparators 27 and 28 with both the outputs of the cross-channel damping networks and a ramp generator signal 26. The ramp generator signal is required in order to produce a pulse width modulated signal whose fundamental frequency is the frequency of the forced limit cycle. Main channel shaping networks 22 and 23 provide for loop stabilization and bandwidth adjustment. The purpose of the cross channel damping compensation networks 24 and 25 as the name implies is to provide for electronic damping which is novel in a dry-tuned gyro. Notch filters 20 and 21 are required in order to minimize any pickoff signal induced by wheel motion. 
     The variable pulse width modulated signals which is derived from the summation of both the ramp generator signal and the main and cross-channel network output signals are sent through logic circuits 29 and 30 which control switchover from positive to negative torquing current. This switchover is designed to occur in synchronism with a high frequency pulse train. As a result, each portion of the pulse width modulated signal contains an integral number of high frequency clock pulses. For example, at 50% duty cycle, each positive and negative half of the pulse width modulated signal contains equal data pulses. 
     FIG. 2 illustrates the timing relationships between the pulse width modulated signal and the quantization waveforms. The ramp generator signal has a zero average value and a frequency equal to the frequency of the forced limit cycle. This signal, which is initially negative but becomes positive halfway through the period, is summed with the combined error signal from both the main and cross channel network outputs in summing amplifiers 27 and 28. The summing amplifier outputs are applied to comparator circuits in blocks 29 and 30 which switches from a logic &#34;0&#34; to a logic &#34;1&#34; level when the summing amplifier output crosses from negative to positive. For a zero error signal, the comparator output signal switches logic status at a point midway through the ramp period (at which point the ramp crosses through zero) to produce a 50 percent duty cycle signal. For non-zero error signals, the comparator output is a logic signal with duty cycle proportional to the error. 
     Referring to FIG. 3, the comparator output is gated with a high frequency clock signal in gate 33 of timing circuit 30 (refer to FIG. 1) to produce a binary signal at the frequency of the ramp generator signal and with switching points very tightly controlled. This signal is sent to the strobe circuit (not shown) which produces readout on two separate data lines (difference between the pulse current on the two lines is proportional to input rate) and to the control flip flop 36. The output of the control flip flop 36 goes to the two high speed transistor switches 37 and 38 (shown here as mechanical switches for simplicity). These switches apply either the positive B+ supply or the negative b- supply to the output current source as per the state of the control flip flop 36 as shown in FIG. 3b. The output current sources 31 and 32 of FIG. 1 are very accurate, high speed supplies which drive directly into the gyro torquers 11 and 12 of FIG. 1 and have one end referenced to ground. The current sources 31 and 32 themselves are not referenced to ground but float between the positive or negative switches D.C. supplier and the gyro torquer. Current is continually flowing in the current sources and always in the same direction with the direction of current in the torquer controlled by the two commutating diodes CR1 and CR2 and the two high speed switches 37 and 38. Thus, the current through the torquer is constant in magnitude (which means constant power in the torquer) in pulse width modulated, binary format, with repetition rate equal to the ramp frequency. 
     Although specific embodiments of the invention have been shown and described, it will be obvious to those skilled in the art that various modifications may be made without departing from the spirit of the invention which is intended to be limited solely by the appended claims.