Method and device for measuring phase jitter on a transmission channel
DESCRIPTION 
     1. Technical Field 
     This invention relates to data transmission systems and, more particularly, to a method and device for measuring the phase jitter that affects data sent over a transmission channel. 
     2. Background Art 
     A typical data transmission system comprises a transmitter and a receiver interconnected by means of a transmission channel. The transmitter receives from an associated data terminal equipment (DTE) the data to be transmitted, converts same into pulses suitable for transmission and then transmits the pulses over the channel. The receiver converts the pulses received from the channel back into data, and then transfers the data to an associated DTE. In practice, mainly for reasons of cost, common carrier telephone lines are generally used as a transmission channel. However, voiceband lines are poorly suited to the transmission of pulses where it is desired to achieve high speeds and very low error rates. It will readily be appreciated that the design of the transmitting and receiving equipment, and particularly the selection of the pulse characteristics to be used and the techniques to be employed to extract data from the received pulses, are largely dependent on the transmission channel parameters affecting transmission of the pulses. 
     Group delay distortion, frequency shift and phase jitter are some of the parameters affecting the transmission of signals over a voiceband channel. These parameters are described, for example, in the Bell System Technical Reference entitled &#34;Transmission Parameters Affecting Voiceband Data Transmission--Description of Parameters&#34;, PUB 41008, July 1974. Said parameters affect the transmission of signals to varying degrees, and data transmitters and receivers usually are designed to compensate for their effects, at least within well-defined limits. 
     In high-speed data transmission systems, phase jitter is an important parameter whose effects must be compensated for. One of the techniques used at the present time to continuously compensate for phase jitter during normal data transmission is described in French Patent FR-A-2,296,322. A disadvantage of these techniques is that they compensate for phase jitter only if it varies within known limits, typically when its amplitude does not exceed 15° peak-to-peak. If it exceeds this limit, a large number of errors will occur and the transmission of data must be interrupted to make a diagnosis of the system. 
     Recent developments in the fields of integrated circuits and microprocessors have made it possible to incorporate diagnostic systems in modems (including each a transmitter and a receiver) so that data transmission system operations can be monitored and malfunctions diagnosed. Such a diagnostic system is described in an article by S. Huon and R. Smith entitled &#34;Network Problem Determination Aids in Microprocessor-Based Modems&#34;, in IBM Journal of Research and Development, Vol. 25, No. 1, January 1981. In this system, measurements of the received signal are continuously taken to determine its quality and the latter is reported to the host system controlling the network into which the data transmission system is incorporated. However, no specific indication of the magnitude of the phase jitter is provided, and it was found desirable to complement the information relating to the quality of the received signal by means of an accurate phase jitter measurement to enable transmission system malfunctions to be correctly diagnosed. 
     CCITT Recommendation 091 entitled &#34;Essential Clauses for An Instrument to Measure Phase Jitter on Telephone Circuits&#34; proposes a method of measuring phase jitter which consists, in particular, in sending a test signal over the transmission channel to be tested and in then determining the amount of phase jitter from the received test signal. This phase jitter measurement includes the steps of: 
     band limiting the received signal around the test signal frequency; 
     amplifying and limiting the signal to remove incident amplitude modulation therefrom; and 
     detecting the zero crossings of an error signal supplied by a phase-locked loop. 
     The main disadvantage of the above method is that it does not make it possible to achieve a sufficient degree of accuracy if used with digital techniques; for example, zero crossings are difficult to detect accurately by digital means. 
     SUMMARY OF THE INVENTION 
     It is the object of this invention to provide a method and a device for taking very accurate phase jitter measurements and which can readily be implemented in a digital environment. 
     The present method of measuring phase jitter on a transmission channel is characterized in that it includes the steps of: 
     applying a sinusoidal test signal of a given frequency to an end of the transmission channel, 
     determining the phase of the test signal received at the other end of the transmission channel, 
     generating a phase value representative of that of the transmitted test signal, 
     subtracting said phase value from that of the received test signal, thereby providing a first signal termed phase signal, 
     filtering said first phase signal to remove therefrom the phase intercept and frequency shift components, thereby providing a second phase signal, 
     passing said second phase signal through a low-pass filter, thereby providing a third phase signal, and 
     passing said third phase signal through a predictive filter to derive therefrom an estimated phase jitter value. 
     In accordance with another aspect of the invention, the determination of the phase of the received test signal includes the steps of: 
     determining the in-phase and quadrature components of said received test signal, and 
     deriving the phase of the received test signal from said components. 
     The invention also provides a device for implementing the inventive method. 
     The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention as illustrated in the drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic illustration of a measuring device in accordance with the invention. 
     FIG. 2 is a diagram illustrating the operation of phase computing device 26 of FIG. 1. 
     FIG. 3 shows an exemplary embodiment of phase filter 36 of FIG. 1. 
     FIG. 4 shows an exemplary embodiment of predictive filter 40 of FIG. 1. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring now to FIG. 1, block 10 represents the transmission channel whose phase jitter is to be measured. 
     The method of the present invention basically consists in applying a test signal to one end of the channel and in analyzing the signal received at the other end. The test signal used is a sine wave of a given frequency, preferably in the band of channel frequencies in which attenuation is minimal, that is, in the band of 1000-2000 Hz. This test signal can be generated by any suitable means such as the signal generator shown as block 12 in FIG. 1. 
     The signal received from transmission channel 10 is fed to an analog bandpass filter (BPF) 14 which limits the passband of the signal to the voiceband. Such a filter is well known in the art and is provided, for example, at the input of all voiceband modems. The output from filter 14 is sampled by a sampling device 16 and converted into digital form by an analog-to-digital converter (ADC) 18. The output form ADC 18 is fed to a Hilbert transformer 20 which generates the in-phase and quadrature components of the sampled signal. These two components are respectively sampled at periodic intervals by a couple of decimation devices 22 and 24, and are then fed to a phase computing device 26, to be described in connection with FIG. 2. 
     The output from device 26 is applied to the (+) input of a digital subtractor 28 whose (-) input is connected to the output of a delay element 30. The input of delay element 30 is connected to the output of a digital adder 32 which has an input connected to the output of delay element 30 and whose other input receives the content of a register 34. 
     The output from subtractor 28 is fed via a line 35 to a second-order phase filter 36, to be described in connection with FIG. 3. The output from phase filter 36 is fed via a line 37 to a low-pass digital filter (LPF) 38, which has a cutoff frequency of 300 Hz. The output from LPF 38 is fed via a line 39 to a digital predictive filter 40, to be described in connection with FIG. 4. The output from predictive filter 40 is fed via a line 41 to a peak value detector 42 which provides the peak-to-peak value of the phase jitter. 
     All devices shown in FIG. 1, other than those described with reference to FIGS. 2 to 4, are well known in the art and employed in most modems. In view of their conventional nature, these devices will not be described in greater detail hereafter. 
     The operation of the device schematically shown in FIG. 1 will now be described. The test signal, written s(t), generated by signal generator 12 can be expressed as 
     
         s(t)=A.sub.o cos 2πf.sub.o t                            (1) 
    
     where 
     A o  and f o  are the amplitude and the phase, respectively, of the transmitted test signal. 
     Because of disturbances introduced by the channel, the received test signal, written r(t), is different from the transmitted test signal, s(t). In the absence of nonlinear distortions, signal r(t) can be expressed as 
     
         r(t)=A.sub.1 (1+m(t)) cos (2πf.sub.o t+φ.sub.1 +φ(t))+n(t) (2) 
    
     where 
     A 1  and φ 1  are the amplitude and the phase of the channel at frequency f o , respectively, 
     m(t) is the incident amplitude modulation introduced by the channel, 
     φ(t) is the incident phase modulation introduced by the channel, 
     and n(t) represents noise. 
     The incident phase modulation can be written as ##EQU1## where φ o  is a constant representing the phase intercept introduced by the channel, 
     Δf is the frequency shift introduced by the channel, and 
     j k , f k  and φ k  represent N independent components of the phase jitter. 
     Relations (2) and (3) above are well-known in the art and are discussed, for example, in the Bell System publication mentioned earlier, in which the terms of relations (2) and (3) (respectively designated (4.2) and (4.3) therein) are defined and described. 
     The problem addressed by the invention is the measurement of the extremes of the sum ##EQU2## in relation (3). 
     the test signal received from transmission channel 10 is passed through bandpass filter (BPF) 14 which limits the signal to its components in the voiceband. The received signal, r(t), is then sampled at a rate which satisfies the sampling theorem and is, in the example shown in FIG. 1, equal to 6/T, with 1/TA=2400 Hz. The sampled signal is then fed to Hilbert transformer 20, which derives therefrom in a known manner the in-phase and quadrature components. These components are in turn fed to phase computation device 26, which derives therefrom the phase of the received test signal. Since the passband of the signal representative of the phase of the received signal is less than that of the received signal, 6/T phase signal samples per second are unnecessary. This is the reason why decimation devices 22 and 24 have been inserted between Hilbert transformer 20 and phase computation device 26. Devices 22 and 24 use only one out of every six samples supplied by Hilbert transformer 20 and thus provide the in-phase and quadrature components, respectively, at the rate of 1/T. These components are respectively written x n  and y n , where n is the time index, with n=1, 2, 3,  . . . Phase computation device 26 supplies samples of the phase of the received signal, as will be later described with reference to FIG. 2. 
     At time t=nT, the phase value supplied by device 26 takes the form ##EQU3## where Δφ (nT) is the influence of noise n(t). 
     In relation (4), which expresses the phase of the transmitted signal, the term 2πf o  nT is generated by the assembly consisting of delay element 30, which introduces a T-sec. delay, adder 32 and register 34, and is subtracted from phase value φ(nT) by subtractor 28. Phase difference 2πf o  T is a constant whose value, converted into digital form, is stored in register 34 and added every T seconds to the content of delay element 30 by adder 32. Thus, phase value φ&#39;(nT) is obtained at the output of subtractor 28: ##EQU4## Phase value φ&#39;(nT) is fed to phase filter 36, which removes therefrom the terms φ o  and 2πΔfnT representing the phase intercept and the frequency shift, respectively. After convergence, there is obtained at the output of the filter a phase value θ(nT) defined as: ##EQU5## where Δθ(nT) is the residual noise. 
     Since the phase jitter components are concentrated in the band of 20-300 Hz., low-pass filter (LPF) 38 is provided to limit θ(nT) to its components of less than 300 Hz. In the exemplary embodiment of FIG. 1, LPF 38 is a 15-tap digital symmetrical transversal filter. The output from LPF 38 contains the phase jitter components of interest as well as residual noise. In some cases, a measurement of the output from LPF 38 may suffice to provide a good indication of the phase jitter, but where the transmission channel is used by very high speed modems (12,000 bps and up), phase jitter is an important impairment which must be measured with greater accuracy. Accordingly, predictive filter 40 has been provided to remove residual noise from the output signal from filter 38, and supplies a phase value which is an accurate representation of the phase jitter. The peak-to-peak amplitude of the phase jitter is measured by detector 42 which compares with one another the successive samples supplied by predictive filter 40 during the test, the indicates upon completion of the test the maximum amplitude variation between the samples. 
     An exemplary embodiment of phase computing device 26 will now be described with reference to FIG. 2, which is a diagram illustrating the method used by that device. In said method, the phase φ(nT) of the signal defined by its in-phase and quadrature components, x n  and y n , is determined by successively rotating the vector of coordinates (x n , y n ) around π/4. 
     When a couple of components such as (x n , y n ) are fed to device 26, the sign of x n  is tested. 
     If x n  is positive, the sign of y n  is tested. If y n  is positive, a variable φ is forced to zero and two intermediate variables x&#39; and y&#39; take on values x n  and y n , respectively. If y n  is negative, φ is forced to 3π/2 while variables x&#39; and y&#39; take on values x n  and -y n , respectively. 
     If x n  is negative, the sign of y n  is tested as above. If y n  is positive, φ is forced to 3π/2 while variables x&#39; and y&#39; take on values y n  and -x n , respectively. If y n  is negative, φ is forced to π while variables x&#39; and y&#39; take on values -x and -y, respectively. After the values of variables x&#39; and y&#39; have been initialized as defined above, a counting variable I is forced to 2 and x&#39; and y&#39; are compared. If y&#39; is higher than or equal to x&#39;, variable φ takes on the value defined during the preceding step plus π/2 I . The vector of components x&#39; and y&#39; is then rotated through an angle equal to -π/2 I+1 , which yields new values of x&#39; and y&#39;, as shown below: 
     
         new x&#39;←old x&#39; cos π/2.sup.I+1 +old y&#39; sin π/2.sup.I+1 
    
     
         new y&#39;←old y&#39; cos π/2.sup.I+1 -old x&#39; sin π/2.sup.I+1 
    
     If y&#39; is less than x&#39;, the vector of components x&#39; and y&#39; is rotated through π/2 I+1 , resulting in new values of x&#39; and y&#39;: 
     
         new x&#39;←old x&#39; cos π/2.sup.I+1 -old y&#39; sin π/2.sup.I+1 
    
     
         new y&#39;←old y&#39; cos π/2.sup.I+1 -old x&#39; sin π/2.sup.I+1 
    
     When new values of x&#39; and y&#39; have been obtained as a result of either of the above rotations, counting variable I is increased by unity. The value of I is tested, and if found to be less than some threshold, set to 10 in this example, x&#39; and y&#39; are compared and the subsequent operations are performed, using the new values of I, x&#39; and y&#39;. When I reaches the threshold, the operation is complete, with the last value of φ being the phase value it was desired to find. Those skilled in the art will appreciate that phase computing device 26 can be implemented in any suitable manner using the method illustrated by the diagram of FIG. 2 just described. 
     An exemplary embodiment of phase filter 36 will now be described with reference to FIG. 3. Phase value φ&#39;(nT) is applied via line 35 to the (+) input of a binary subtractor 50 whose output is connected to output line 37 of phase filter 36 and to an input of a multiplier 52 whose other input receives the value of a coefficient A converted to digital form. The output from multiplier 52 is applied to an input of an adder 54 whose output is fed to a delay element 56 which introduces a T-second delay and whose output is connected to the other input of adder 54 and to an input of a multiplier 58, whose other input receives the value of coefficient A converted to digital form. The output from multiplier 58 is fed to an input of 3-input adder 60 whose output is fed to a delay element 62 which introduces a T-second delay. The output from delay element 62 is fed to the (-) input of subtractor 50 and to another input of adder 60. The output from subtractor 50 is additionally applied to an input of a multiplier 64 whose other input receives the value of a coefficient B converted to digital form and whose output is connected to the third input of adder 60. 
     Pulse filter 36 is a second-order recursive filter whose transfer function is defined as ##STR1## where Z -1  corresponds to a T-second delay. 
     The coefficients of this filter are such that: 
     it will pass the phase jitter components; 
     it will suppress the phase intercept and frequency shift components; and 
     its convergence speed will not be excessively slow. 
     From these three characteristics, the value of the coefficients can be derived using conventional methods such as those described in the articles entitled &#34;Equiripple and Minima Approximation for Recursive Digital Filters&#34;, in IEEE Transactions on Acoustics, Speech, Signal Processing, Vol. ASSP-22, pp. 99-111, April 1974, and &#34;A Design Algorithm for Constrained Equiripple Digital Filters&#34;, in the same reference, Vol. ASSP-30, pp. 206-211, April 1982. In the exemplary embodiment shown in FIG. 3, the following values were used: 
     A=0.09961 
     B=0.049805 
     T=1/2400 
     Referring now to FIG. 4, an exemplary embodiment of predictive filter 40 of FIG. 1 will be described. Let Ψ(nT) be the output signal from low-pass filter 38. From relation (6), since frequencies f k  are less than 300 hz, the output from filter 38 can be written ##EQU6## where ΔΨ is simply the filtered version of residual noise Δθ(nT) in relation (6). 
     The signal defined by relation (8) is band limited to 300 Hz and, therefore, can be observed at a rate lower than 1/T, such as 1/τ=1/4T in this example. Note that the transfer function of the cascaded phase filter 36 and low-pass filter 38 is flat over the band from 0 to 300 Hz, except for a sharp null at the DC component. The correlation between successive noise samples is, consequently, very small. On the other hand, the phase jitter components are highly correlated. The effects of noise can be smoothed out by deriving an estimated value Ψ(nτ) of Ψ(nτ) from previous samples of the output signal from low-pass filter 38. 
     The estimated value Ψ(nτ) of Ψ(nτ) is written in the form ##EQU7## where Cp represents the real-valued coefficients of a transversal filter whose taps have a τ-second spacing, with the center coefficient set at zero. The value of the coefficients is adaptively adjusted to minimize the mean-squared error Ee n   2 , where E is the mathematical expectation, or mean value, and error e n  is defined as 
     
         e.sub.n =Ψ(nτ)-Ψ(nτ)                       (10) 
    
     The value of coefficients Cp is adjusted in successive iterations, using the stochastic method defined as 
     
         Cp(n+1)=Cp(n)+1e.sub.n Ψ[(n-p)τ],p≠0 
    
     where 1 is the iteration step whose value will be discussed later. The predictive filter shown in FIG. 4 is a conventional Wiener filter which uses the above relations. The output from low-pass filter 38 is fed via line 39 to a decimation device 70 which passes only one out of every four samples supplied by filter 38. The output from decimation device 70 is applied to a digital delay line 72 comprising 2M+1 taps with a r-sec spacing. The outputs from all taps except the center tap are respectively fed to an input of 2M multipliers 74-1 to 74-2M, the other input of each of which receives the 2M coefficients C -M , . . . ,C -1 , . . . ,C 1 , . . . ,C M , respectively. The outputs from multipliers 74-1 to 74-2M are fed to the inputs of a summing device 76 whose output is fed via line 41 to the detector 42 of FIG. 1. The output from device 76 is also applied to the (-) input of a subtractor 78 whose (+) input is connected to the center tap of delay line 72 and whose output is fed to a coefficient adjusting device 80 which provides the values of the coefficients applied to multipliers 74-1 to 74-2M. 
     The initial value of the coefficients is zero. At the time coefficient Ψ(nτ) reaches the center tap, the samples 
     
         Ψ[(n-M)τ], . . . Ψ[(n-1)τ],Ψ[(n+1)τ], . . . Ψ[(n+M)τ] 
    
     are distributed among the other taps of delay line 72 as shown in FIG. 4, and the coefficients take on values Cp(n). 
     The estimated value Ψ(nτ), determined in accordance with relation (9), is then obtained at the output of summing device 76. This estimated value is subtracted from Ψ(nτ) in subtractor 78, which supplies error e n  as its output. Error e n  is fed to adjusting device 80 which computes the new coefficient values in accordance with relation (9). 
     At the next sampling instant, sample Ψ[(n+1)τ] has reached the center tap and an estimated value Ψ[(n+1)τ] of Ψ[(n+1)τ] is computed using the coefficient values Cp(n+1) derived from error e n  during the preceding iteration. The iteration process continues in a similar manner. 
     For best results, delay line 72 should have as many taps as possible. Very good results have been obtained with a 27-tap delay line. The value of the iteration step is chosen empirically in a conventional manner by making a compromise between the desired degree of accuracy and the desired period of time within which convergence of the iterative process is to be achieved. 
     Note that most of the components of the present system already exist in conventional modems, and that the invention only requires a minimum of additional equipment. Also note that the sampling rates mentioned earlier are compatible with those used in most modems; for example, the rate of 1/T=2400 is widely used in modems. 
     While the invention has been shown and described with reference to a preferred embodiment thereof it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.