High precision voltage-to-current converter, particularly for low supply voltages
BACKGROUND OF THE INVENTION 
     The present invention relates to a high precision voltage-to-current converter, particularly for low supply voltages. 
     The electronic arts include different fields in which it is necessary to operate with low supply voltages. One of these is the telephonic field, wherein the lower the voltage, the greater the line length with which a circuit can operate. 
     For such uses it is obviously necessary to have circuits specifically suitable for low voltages. 
     The present invention is specifically concerned with voltage-to-current converters, which in the prior art were not able to provide the utmost precision for low supply voltages. In particular, there exists a prior art converter which is based on the use of a differential stage with two oppositely arranged transistors with a coupling resistance among the common emitter terminals, wherein the input signal is constituted by a voltage applied between the two bases of the transistors and the output signal is constituted by the current which passes through one of said transistors. The precision of this known converter is poor, primarily because the conversion ratio depends on the sum of non-homogeneous resistances, such as the coupling resistance (of the static kind) on the one hand, and the inner resistances of the two transistors (of the dynamic kind) on the other hand. Any changes of the supply current of the two transistors, comprising corresponding changes of the inner resistances of the same transistors, in turn negatively influence the precision of the conversion ratio. 
     SUMMARY OF THE INVENTION 
     The object of the present invention is to realize a voltage-to-current converter, particularly for low supply voltages, which modifies the circuit configuration of the above-mentioned known converter so as to considerably increase its precision. 
     According to the invention such object is achieved by means of a voltage-to-current converter, comprising a differential stage with two opposite transistors with an input signal represented by the voltage applied between the bases of said transistors and with a coupling resistance interposed between the common emitter terminals of the same transistors, also comprising two further transistors interposed between said common emitter terminals and ground and controlled by the current which passes through said opposite transistors, the output signal being represented by the current which passes through one of said further transistors. 
     The two added transistors quickly influence the conversion ratio, thus increasing the precision. Specifically, their effect is to reduce, by factors equal to the the gains of the two added transistors, the contribution of the inner resistances of the two opposite transistors of the differential stage to the resistances which make up the denominator of the conversion ratio. Possible errors due to non-homogeneity of the resistances and to changes of the supply current are thus avoided or, in any case, very reduced. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The features of the present invention will be better comprehended by making reference, by way of example, to the enclosed drawings, in which: 
     FIG. 1 shows the basic circuit diagram of a voltage-to-current converter according to the invention; 
     FIGS. 2-4 show different examples of use of said converter. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     With reference to FIG. 1, there is illustrated a voltage-to-current converter according to the invention, which comprises a differential stage CP formed by two PNP transistors T 1  and T 2  disposed in opposition with the respective emitters connected to each other through a coupling resistance R E  and also connected to a supply line A through respective current generators G 1  and G 2  (which can be substituted with resistances of suitable value), which generate a current I E . Between the bases of the two transistors T 1  and T 2  there is applied a voltage v i , which constitutes the input signal of the converter. The collectors of the above-mentioned transistors in turn are connected to ground through current generators G 3  and G 4  (these also can be substituted with resistances of suitable value), which generate a current I C . The emitters of the transistors T 1  and T 2  are finally connected to ground through respective NPN transistors T 3  and T 4 , whose bases are connected to the collectors of the transistors T 1  and T 2 . The current i s  =I E  - I C  which passes through one of the transistors T 3  and T 4  constitutes the standby current on which the output signal of the converter is superimposed. 
     As can be easily verified with mathematic calculation, the output current i s  of the converter of FIG. 1 is given by the following relation: ##EQU1## where r e1  and r e2  are the inner resistances of the transistors T 1  and T 2  and β 3  and β 4  are the gains of the transistors T 3  and T 4 . 
     From the above-mentioned relation it is evident that the effects of r e1  and r e2  on the conversion ratio is minimized by the factors β 3  and β 4  with consequent elimination of any possible inexactness due to the non-homogeneity of such dynamic resistances with the static resistance R E  and due to the influence exerted on them by a possible change of I E  and I C . The conversion ratio substantially depends on R E , which is a static resistance: it which does not change with the work condition. The converter of FIG. 1 therefore displays great precision. 
     FIG. 2 illustrates how a mirror S can be associated with a voltage-to-current converter such as that shown in FIG. 1, here indicated by C, for the formation of a current amplifier. The converter C is equivalent to that of FIG. 1 with only the addition of two resistances R 3  and R 4  on the emitter of the transistors T 3  and T 4  (which are not essential for operation), while the mirror S comprises two NPN transistors T 5  and T 6  with the bases respectively connected to the bases of the transistors T 4  and T 3 , the emitters connected to ground through resistances R 5  and R 6  and the collectors connected to the supply line A through a diode D 1  and, respectively, through a PNP transistor T 7  with the base connected to the collector of the transistor T 5 . The collector current of the transistor T 6  constitutes the output signal of the current amplifier and is i o  =ni s , where n is a constant depending on the features of the mirror S. 
     FIG. 3 shows how a linearization circuit can be associated with a voltage-to-current converter such as that depicted in FIG. 1, still indicated by C, for the formation of a signal multiplier. The converter C is equivalent to that of FIG. 1 with only the addition of a diode D 3  between the emitters of the transistors T 3  and T 4  and ground, with diode D 3  serving only as a bias for current generator G 5 . The linearization circuit L is in turn formed by two NPN transistors T 9  and T 10 , which have their emitters connected to ground through a current generator G 5 , their bases respectively connected to the bases of the transistors T 4  and T 3  and their collectors connected to the supply line A through a diode D 2  and, respectively, through a PNP transistor T 8 , with the base of transistor T 8  connected to the collector of the transistor T 9 . The collector current of the transistor T 10  constitutes the output signal i o  of the multiplier. 
     Finally, FIG. 4 shows the combination of a voltage-to-current converter C such as that shown in FIG. 1 and of a linearization circuit L&#39;, which is slightly modified with respect to the circuit L of FIG. 3, for the formation of a multiplier suitable for operation with a particularly low supply line voltage A. The differences in FIG. 4 with respect to FIG. 3 are that the diode D 3  is absent from the converter C, and two PNP transistors T 11  and T 12  are inserted in the linearization circuit L&#39;. The transistors T 11  and T 12  have their collectors connected to ground, their bases respectively connected to the bases of the transistors T 4  and T 3  and their emitters connected to the bases of the transistors T 9  and T 10  and, through current generators G 6  and G 7 , to the line A.