Power switch control circuit for television apparatus
This invention relates to a deflection scanning or power switching circuit. 
     Generally, a horizontal scanning circuit applies the pulse signal delivered from a horizontal oscillation circuit to the base, or control electrode of a horizontal power transistor that operates as a switch. The collector of the horizontal power transistor is connected in series to the primary winding of a flyback transformer. The turning on and off of the horizontal power transistor in response to the pulse signal from the horizontal oscillation circuit causes a scanning current flow into a horizontal deflection winding. 
     Usually, the base electrode current required to excite the horizontal power transistor is relatively large; therefore, in some prior art circuits, the output signal from horizontal oscillation circuit, that is required to provide the base electrode current drive, has to provide substantial power. Such base electrode driving circuits consume, generally, a substantial amount of power and they are bulky. Such bulky construction poses a significant hurdle for the miniaturization of a television set or reduction of manufacturing cost. 
     In accordance with an aspect of the invention, the base or control electrode driving current, that causes the power transistor switch to be conductive, is obtained from a feedback current produced by the power transistor switch itself. Thus, the circuit of the invention does not require a bulky driving circuit. In particular, the circuit of the invention obtains the base electrode turn-on driving current from an additional winding of a flyback transformer. The other flyback transformer windings may perform similar functions as in other prior art circuits. Therefore, the added cost and increased volume associated with incorporating this additional winding are relatively small. 
     In some prior art circuits, the base electrode current drive waveform is generally flat, downramping, or downward drooping, during the collector-to-emitter conduction period of the power transistor. Since the collector-to-emitter current is mainly an upramping current during the power transistor conduction time, the base electrode current in such circuits substantially exceeds, at least in the beginning of the conduction time, what is required for sustaining the upramping collector-to-emitter current. This excessive base electrode current causes undesirable power dissipation in such prior art circuits. 
     In accordance with another aspect of the invention, the base electrode current drive of the power transistor that causes the power transistor switch to be conductive is an unramping current that sustains the corresponding upramping collector-to-emitter current. Thus, the power supplied by the base electrode current driving circuit may be, advantageously, lower than in some prior art circuits. Furthermore, in the circuit of the invention the base electrode current is substantially a reactive current as it is formed in an inductance that is in series with the base-emitter junction. Therefore, the power dissipation caused by such reactive current is relatively small. 
     Another problem that some prior art circuits suffer from is a slow turn-off time of the power transistor. This slow turn-off time occurs in such circuits because the charge in the base electrode region of the power transistor is not discharged fast enough. When the turn-off time is slow, the maximum scanning frequency of such deflection circuit is reduced. With the advent of requirements for higher deflection frequencies, such as in a double frequency scanning format, this upper frequency limitation reduces the usefulness of such prior art deflection circuits in high frequency deflection applications. 
     Therefore, in accordance with yet another aspect of the invention, the base electrode potential is actively pulled down by a second switching device that substantially couples a voltage source across the base-emitter junction of the power transistor switch. This pull-down voltage source causes the charge in the base electrode region to be discharged quickly. The pull-down voltage is coupled to the base electrode in response to an input signal of the horizontal oscillation circuit that controls the second switching device. Thus, the circuit of the invention is capable of operating at high switching frequencies. 
     In accordance with a further aspect of the invention, the pull-down voltage provides an added advantage in that it increases the peak voltage that the collector-to-base junction can tolerate without junction breakdown. This is so because the breakdown voltage of the power transistor increases when the base-emitter voltage is sufficiently negative when the power transistor is non-conductive. Thus, the reliability and versatility of the circuit is superior relative to some prior art circuit in which the base-emitter junction is not back-biased by such pull-down voltage. 
     Some prior art circuits include dedicated components for starting-up the operation of the circuit. In accordance with an aspect of the invention, the switched pull-down voltage that is coupled to the upramping current generating inductance also guarantees start-up, such as during power turn-on. Thus, start-up is achieved without the need for additional dedicated components. 
     In accordance with yet a further aspect of the invention, a power transistor switch switches an output current in an inductive load. A control switch responsive to a periodic input signal couples a source of reverse biasing voltage, during a first interval of a given period of the input signal, to turn off the power transistor switch. The reverse biasing voltage is applied to an inductance to generate an inductive current in the inductance that is coupled to the base electrode of the power transistor switch. During a second interval of the given period, the control switch decouples the reverse biasing voltage from the base and enables the inductive current to flow into the base to turn on the power transistor switch. 
    
    
     FIG. 1 illustrates a deflection circuit embodying the invention; 
     FIGS. 2a-2c illustrate waveforms useful in explaining the normal operation of the circuit of FIG. 1; and 
     FIGS. 3a-3c illustrate waveforms useful in explaining the start-up operation of the circuit of FIG. 1. 
    
    
     In a deflection circuit 200, illustrated in the FIG. 1 that may be used in double frequency scanning format television system, a filtered DC voltage V B  at a terminal 48 is supplied by a power supply 45 that is separate from circuit 200 and that may be of the switched mode type. Terminal 48 is coupled through primary winding 53a of a horizontal output or flyback transformer 53 to a terminal 90 of horizontal deflection circuit 200. A horizontal deflection winding 81 is coupled to horizontal deflection generator 86 for generating scanning current i y  in deflection winding 81. Generator 86 comprises a linearity inductor 83 in series with a trace capacitor 62 and in series with a parallel arrangement of a retrace capacitor 80, and a trace switch 87. Trace switch 87 includes the parallel arrangement of a horizontal output power transistor 88 and a damper diode 89. 
     A high voltage winding 53c of flyback transformer 53 is coupled to a conventional high voltage circuit 63 for developing an ultor accelerating potential. 
     A synchronized horizontal oscillator and predriver circuit 85, that is energized by a voltage V HO  of power supply 45, provides through a capacitor C 0  a switching control signal voltage V 84b , that appears as a square wave superimposed on a negative direct current voltage, to the control base electrode of a transistor switch 84. The period of voltage V 84b  is H/2, where H/2 represents one line scan interval in a 2f H  deflection system. Note that H is the conventional horizontal period of e.g. 63.5 microseconds. 
     When voltage V 84b  forward-biases the base-emitter junction of transistor switch 84, in accordance with a first level of the superimposed square wave, transistor switch 84 is conductive; conversely, when voltage V 84b  back-biases the base-emitter junction, in accordance with the other, or second, level of the superimposed square wave, transistor switch 84 is non-conductive. The emitter electrode of transistor switch 84 is coupled to a negative pull-down voltage source V NEG . The collector electrode of transistor switch 84 is coupled through a current limiting resistor 91 to the base electrode of horizontal output power transistor 88. A terminal 46 of a secondary winding 53b of flyback transformer 53 is coupled through a current limiting resistor 92 to a terminal 82b of an inductor 82. A terminal 47, the other end terminal of inductor 82, is coupled at the junction between resistor 91 and the collector electrode of transistor switch 84. 
     In normal operation, deflection switch 87 is closed during the trace interval. When deflection switch 87 is closed, it isolates transformer 53 from deflection winding 81. An upramping primary current i 2  in primary winding 53a increases the energy stored in flyback transformer 53 during the trace interval. This stored energy replenishes losses in deflection circuit 86 and energizes high voltage circuit 63 when switch 87 is opened during the retrace interval. Deflection winding 81 forms with transformer 53, and with retrace capacitor 80 a retrace resonant circuit. The energy stored in transformer 53 and deflection winding 81, during the trace interval, is transferred into retrace capacitor 80 to produce a retrace voltage V R  across capacitor 80, during the retrace interval, that is illustrated in FIG. 2c. 
     The voltage across primary winding 53a of FIG. 1 is coupled by a transformer action to secondary winding 53b for developing a voltage V S  at terminal 46. During the trace interval, voltage V S  is positive. During the retrace interval, voltage V S  is negative. Negative voltage V S  occurs when retrace voltage V R  at terminal 90 is more positive than voltage V B  at terminal 48. 
     Positive voltage V S , across secondary winding 53b, causes the flow of an upramping current i s  in inductor 82, as illustrated in FIG. 2a, from time t re , at the end of retrace, to time t 0  &#39;, at the end of trace. 
     During a first portion of trace, transistor switch 84 of FIG. 1 is conductive, in accordance with the occurrence of the first level of the waveform of voltage V 84b . Therefore, voltage V 84c  at terminal 47 of inductor 82 is negative and substantially equal to voltage V NEG . During the first portion of trace, from time t re  to time t 1  of FIG. 2a, power transistor 88 of FIG. 1 is non-conductive because voltage V 84c , that is coupled to its base electrode, is negative. Negative voltage V 84c  causes the rate of increase of current i s  of FIG. 2a to be higher during the interval t re  -t 1 . Simultaneously, deflection current i y  of FIG. 1 flows through damper diode 89. 
     Prior to the center of the trace interval, voltage V 84b  at the base electrode of transistor switch 84 becomes more negative when the transition from the first to the second level of the superimposed square wave occur, causing transistor switch 84 to be non-conductive. When transistor switch 84 is non-conductive, current i s  flows entirely to the base electrode of power transistor 88 in the form of base electrode current i b , thus causing the conduction, or turn-on, of power transistor 88. Afterward, during the rest of trace, current i b , or i s , as illustrated in FIG. 2b or 2a, respectively, between times t 1  and t 0  &#39;, continues to ramp up because of positive voltage V S  of FIG. 1 at terminal 46 of secondary winding 53b. 
     In accordance with an aspect of the invention, upramping current i b  of FIG. 2b provides the base electrode drive for sustaining the corresponding upramping current in the collector electrode of power transistor 88 of FIG. 1. 
     Near the end of trace interval, voltage V 84b  at the base electrode of transistor 84 becomes more positive, causing transistor switch 84 to close, or to become conductive. The closing of transistor switch 84 couples voltage V NEG , that is generated by power supply 45, to junction terminal 47 for producing voltage V 84c  that is negative. Negative voltage, V 84c  at junction terminal 47 produces a negative base electrode current i b  in power transistor 88, having a peak of -4A as illustrated in FIG. 2b, resulting in a fast turn-off of power transistor 88 of FIG. 1 to initiate, thereby, the retrace interval. Thus, current i b  rapidly sweeps out the charge from the base electrode, to render power transistor 88 non-conductive. When switch 84 is conductive it shunts current i s  away from the base electrode of power transistor 88. Retrace voltage V R  across capacitor 80 is developed when power transistor 88 becomes non-conductive. Voltage V 84c  has a negative average direct current voltage component. Resistor 92 limits the direct current component of current i s  that is caused by voltage V 84c . 
     Prior to the beginning time of a start-up interval, none of transformer 53, winding 81 and capacitors 62 and 80 is energized. Assume, illustratively, that prior to the start-up interval beginning time, voltages V HO  and V NEG  of power supply 45 are at their respective normal operating levels and that voltage V 84b  has the normal operating waveform; whereas voltage V B  is turned on at the start-up interval beginning time. At the start-up interval beginning time, there is no voltage V S  available across flyback transformer winding 53b for generating positive current i b  to switch on power transistor 88 at the initiation of start-up. 
     In accordance with another aspect of the invention, during the start-up interval, current i s  is generated in inductor 82 by the switching operation of transistor switch 84 that couples voltage V NEG  to terminal 47. During the start-up interval, when transistor switch 84 is conductive, voltage V 84c  is negative, in accordance with the occurrence of the first level of the square wave voltage V 84b . The voltage at terminal 82b is more positive than that at terminal 84c cause terminal 82b is coupled to ground potential through winding 53b. Furthermore, at start-up, no voltage is being developed across winding 53b. Therefore, inductive current i s  in inductor 82 flows into junction terminal 47 in an upramping manner during start-up when transistor 84 is conductive. Upramping current i s  stores inductive energy in inductor 82. 
     FIGS. 3a-3c illustrate waveforms obtained when only voltage V B  of power supply 45 is zero so as to simulate the beginning of the start-up operation. The other voltages of power supply 45 are at the normal levels, respectively. Similar numerals and symbols in FIGS. 1, 2a-2c and 3a-3c indicate similar items or functions. 
     As illustrated in FIG. 3a, between times t 0  and t 1 , the interval when transistor 84 is conductive, current i s  is upramping. When transistor switch 84 of FIG. 1 becomes non-conductive, in accordance with the occurrence of the second level of the square wave voltage V 84b , current i s  that results from the stored magnetic energy in inductor 82 is a downramping current that is diverted to the base electrode of power transistor 88 to form positive base electrode current i b , as illustrated in FIG. 3b between times t 1  and t 0  &#39;. Positive base electrode current i b  of FIG. 3b causes power transistor 88 of FIG. 1 to be conductive by developing a positive base voltage V bs  of FIGS. 1 and 3c between times t 1  and t 0  &#39;. When voltage V B  begins to be developed, after the initiation of start-up, alternating periods of conduction and non-conduction of power transistor 88 of FIG. 1 initiate normal deflection circuit switching operation, thereby generating deflection rate voltage V s . After voltage V S  is generated, the normal switching drive to horizontal output transistor 88, illustrated in FIG. 2b, can take place. 
     It should be understood that an arrangement similar to that of deflection circuit 200 of FIG. 1 in which deflection winding 81 is replaced by an inductor may be used as part of a switching power supply that generates output voltages from an arrangement similar to high voltage circuit 63. The operating frequency of the switching power supply power transistor may be the deflection frequency or a multiple thereof.