Device for complementary input signals using two circuits with different threshold voltages
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a differential switching circuit, more particularly a differential switching circuit comprising a pair of transistors having commonly coupled emitters used for a digital to-analog (D/A) convertor. 
     2. Description of the Prior Art 
     Prior art differential switching circuits, composed of a pair of transistors having commonly coupled emitters with a fixed current source connected to the emitters, suffer from the defect of an unstable output potential due to temperature-based variations of the current amplification. Additionally, there is the problem, in D/A converters etc., using a plurality of such differential switching circuits, of variation of current amplification factors hFE due to manufacturing differences in the elements in the circuits. 
     A conventional technique used to overcome the fluctuations, in a circuit used for a D/A converter with a resolution above 12 bits has been to provide an additional transistor for each transistor in the pair of transistors in a so-called &#34;Darlington connection.&#34; The Darlington Connections, however, reduce the operating speed of the circuit. To raise the speed, a resistor has been inserted between the two transistors in each of the Darlington connections. However, this results in current fluctuation through the resistor. 
     In summary, the prior art differential switching circuit has had the defect of reduced operating speed when there is stable current amplification, and unstable current amplification when the operating speed is increased. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is to provide a differential switching circuit with both stable current amplification and increased operating speed. 
     The above-mentioned object can be achieved by a differential switching circuit which includes a first current switching circuit having a first input terminal; a second current switching circuit having a second input terminal and a threshold different from that of the first circuit; and a constant current source commonly connected to the first and second circuits, complementary input signals being applied to the first and second input terminals. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Further features and advantages of the present invention will be apparent from the ensuing description with reference to the accompanying drawings, wherein: 
     FIGS. 1, 2a and 2b are circuit diagrams of conventional differential switching circuits; 
     FIG. 3a is a circuit diagram of an embodiment of the present invention; 
     FIGS. 3b and 3c are waveform diagrams of the signals applied to the circuit of FIG. 3a; 
     FIGS. 4a to 4d are functional views of the circuit diagram in FIG. 3a; and 
     FIG. 5 is a circuit diagram of another embodiment of the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Before describing the preferred embodiments, an explanation of some prior art circuits will be given for comparison. FIG. 1 is a circuit diagram of one type of conventional circuit. This circuit consists of a pair of transistors T r2  and T r3  having commonly connected emitters. Resistors R 2  and R 3  are connected to the collectors of the transistors T r2  and T r3 , respectively. A constant current source, connected to the commonly connected emitters, consists of a transistor T r1   and a resistor R 1  connected to a voltage source V. A constant voltage V ref  is applied to the base of the transistor T r1 . 
     When the base potential of the transistor T r3  is higher than that of the transistor T r2 , the transistor T r3  is on and a current flows through the resistor R 3 . Therefore, the potential of the output terminal OUT is low. On the other hand, when the base potential of the transistor T r3  is lower than that of the transistor T r2 , current cannot flow through the resistor R 3  and thus the potential of the output terminal OUT is high. 
     The above circuit has the defect that the output potential fluctuates along with temperature-based a variation in the current amplification factor hFE. That is, even though a constant current is passed through the emitter of the transistor T r3  when the transistor T r3  is on, the ratio of the currents of the collector and base changes along with the temperature. 
     To overcome these and other fluctuations, as shown in FIG. 2(a), additional transistors T r4 , T r6   and T r5  have been provided for the transistors T r3 , T r2  and T r1 , respectively, each in a Darlington connection with their respective transistors. Assuming, the current amplification factors hFE of the transistors T r3  and T r4  are equal, the current amplification factor hFE of the Darlington connection circuit consisting of the transistors T r3  and T r4  is (hFE) 2 . This reduces the influence of fluctuations of the current amplification factor hFE on the current passing through the resistor R 3 . The same applies to the Darlington connection circuits consisting of the transistors T r2  and T r6  and the transistors T r1  and T r5 . 
     The differential switching circuit illustrated in FIG. 2a, however, has the defect of reduced operating speed as both the left switch consisting of the transistors T r2  and T r6  and the right switch consisting of the transistors T r3  and T r4  are Darlington connection circuits. Specifically, the speed is reduced since the potentials at connections ○7 ,  ○4 , and  ○8  are not determined immediately upon input of the signal to terminals  ○2  and  ○5 . To overcome this defect, a resistor R 4  has been inserted between the emitters of the transistors T r6  and T r2  in another circuit partially illustrated in FIG. 2b. This, however, results in fluctuation of the current. 
     The differential switching circuit of the present invention comprises a first current switching circuit having a first input terminal; a second current switching circuit having a second input terminal and a switching threshold different from that of the first circuit; and a constant current source commonly connected to the first and second circuits. Complementary input signals are applied to the first and second input terminals. 
     FIG. 3a is a diagram of a circuit in accordance with an embodiment of the invention. In the circuit of FIG. 3a, complementary signals illustrated in FIG. 3b and 3c are input to the left transistor T r2  and the right transistors T r3  and T r4  at  ○2  and  ○5 , respectively. The on-and-off switching of these transistors changes the potential at a connection  ○4 . When a high &#34;H&#34; voltage V 2  is applied to a terminal  ○5  and a low &#34;L&#34; voltage V 1  is applied to a terminal  ○2 , the transistors T r3  and T r4  are on, and the transistor T r2  is off. In this case, the relationship V 2  -V 1  &gt;0.8 V must be satisfied, the value 0.8 V being the voltage drop from the base to the emitter in each of the transistors T r2 , T r3  and T r4 . Therefore, the potential at the connection  ○4   is about V 2  -1.5 V. 
     When the &#34;L&#34; voltage V 1  is applied to the terminal  ○5  and the &#34;H&#34; voltage V 2  is applied to the terminal  ○2 , the transistor T r2  is on and the transistors T r3  and T r4  are off. In this case, the potential at the connection  ○4  is V 2  -0.8 V, which is higher than V 2  -1.5 V in the first case where the transistors T r3  and T r4  are on. Therefore, as the electrons in the emitter of the transistor T r3  are pulled to the emitter of the transistor T r2 , the transistor T r3  is cut off immediately. In this circuit, the flow of electrons between the transistors T r2  and T r3  contributes to high speed switching. 
     This circuit will be explained further in reference to FIGS. 4a to 4d, wherein n-p-n type transistors are depicted. When the voltage V 1  is applied to the base of the transistor T r2  and the voltage V 2  is applied to the base of the transistor T r4  i.e., in the steady state where the transistors T r3  and T r4  are on and the transistor T r2  is off (see FIG. 4a), the base-emitter junction of the transistor T r3  is forward biased and the potential of the emitter side of the junction face  ○13  is about V 2  -1.5 V. On the other hand, because of the steady state, the base-emitter junction of the transistor T r2  is reverse biased. Thus, the potential of the emitter side of the junction face  ○12  and the connection  ○4  are also V 2  -1.5 V. 
     When the voltage V 2  is applied to the transistor T r2  and the voltage V 1  is applied to the transistor T r4  (see FIG. 4b), the base-emitter junction of the transistor T r2  is forward biased. The transistor T r2  starts to turn on, and the potential of the emitter side of the base-emitter junction of the transistor T r2  immediately starts to become V 2  -0.8 V. On the other hand, the voltage V 1  applied to the base of the transistor T r4  tries to reverse bias the base-emitter junctions of the transistors T r3  and T r4 . The time necessary for this reverse bias is longer than that for the forward bias between the base and emitter of the transistor T r2 . Therefore, even though the potential of the emitter side face  ○12  of the base-emitter junction of the transistor T r2  approaches V 2  -0.8 V, the potential of the face  ○13  of the transistor T r3  is near V 2  -1.5 V. 
     In this transient state, illustrated in FIG. 4(b), the potential difference between the junction faces  ○12  and  ○13  is about 0.7 V, by which difference the electrons of the majority carrier are moved from the emitter of the transistor T r3  to that of the transistor T r2 . The result is that the transistor T r2  starts to turn on as the emitter of the transistor T r2  pulls more electrons from the emitter of the transistor T r3 . Meanwhile, the transistor T r3  starts to turn off, and the potential of the emitter of the transistor T r3  approaches V 2  -0.8 V as time passes. During this time, T r3  and T r4  act together and both turn off more completely. 
     FIG. 4c shows a steady state where the transistor T r2  is on and the transistors T r3  and T r4  are off. In this state, the potentials of the faces  ○12  and  ○13  and the connection  ○4 are all V 2  -0.8 V. When the voltage V 1  is applied to the transistor T r2  and the voltage V 2  is applied to the transistor T r4 , the transistor T r2  starts to turn off and the transistors T r3  and T r4  start to turn on (FIG. 4d). However, while the potential of the emitter of the transistor T r2  is changed immediately, the potential of the emitter of the transistor T r3  does not. That is to say, as the voltage V 1  is applied to the base of the transistor T r2  in the on state, the potential of the junction face ○12  starts to fall to V 2  -0.8-V. In this case, the potential of the face  ○13   is V 2  -0.8 V. Therefore, the potential difference V(&gt;0) moves the electrons from the emitter of the transistor T r2  to that of the transistor T r3 . The result is that the transistor T r2  is off and the transistor T r3  is on. 
     As is clear from the above explanation, when the transistors T r3  and T r4  turn on or off, the transistor T r2  supplies or pulls electrons. In other words, the transistor T r2  assists the operation of the transistors T r3  and T r4 . As a result, a circuit constructed in accordance with this invention can operate at a high speed even with small complementary signals. 
     In the circuit of FIG. 3, unlike conventional switching circuits of the left-and-right symmetric type, the potential at the connection  ○4 changes at about 0.7 V depending on whether the transistor T r2  or the transistors T r3  and T r4  are on. The 0.7 V fluctuation in the potential at the connection causes the voltage difference V be2  between the base of the transistor T r5  and the emitter of the transistor T r1  to fluctuate due to the so-called &#34;early effect&#34;. As a result, the potential at the emitter of the transistor T r1  also fluctutates. In an actual circuit, the fluctuation is about 2 mV. Therefore, the current I R1  through the resistor R 1  fluctuates, which adversely affects the stability of the circuit. This current I R1  is expressed by the following equation: 
     
         I.sub.R1 =1/R{(V.sub.ref -V.sub.be2)-V} 
    
     where 
     V ref  is the reference potential applied to base of transistor T r5 , 
     V be2  is the voltage difference between base of transistor T r5  and emitter of transistor T r1  and 
     V is the potential at the terminal of resistor R 1 . 
     FIG. 5 shows another embodiment of the present invention, in which the current fluctuation is prevented. In the circuit in FIG. 5, buffer transistors T r5  and T r1  and T r8  and T r7  are inserted in two stages to stabilize the current source. Three or more stages are also possible. As illustrated in FIG. 5, a reference voltage is also used to stabilize the voltage of the current source resistor R 1  and to stabilize the output current I R1 . If the reference voltage is V R , the current I R1  can be expressed by the following equation: ##EQU1## 
     Applying Ohm&#39;s Law, ##EQU2## and the following inequality must be met for the reasons set forth above with respect to V b1  and V b2  : 
     
         V.sub.b2 -1.5 V&gt;V.sub.ref. 
    
     If the base current component in a bipolar type transistor is desired to be deleted, part or all of the transistors in FIG. 5 may be replaced with field effect transistors.