Transistor circuit having a plurality of constant current sources
FIELD OF THE INVENTION 
     This invention relates to a transistor circuit having a plurality of constant current sources, and more particularly to a transistor circuit which includes a plurality of circuit portions each portion being connected to a respective constant current source wherein the D.C. potential at an output terminal of each circuit portion is required to be accurately controlled. 
     BACKGROUND OF THE INVENTION 
     A typical example of a circuit in accordance with the prior art is a color demodulator circuit in a color television receiver. This circuit includes three circuit portions which respectively demodulate color signals of red, blue and green components. The demodulator circuit further includes constant current sources, and each of the demodulating circuit portions is connected to the respective constant current sources. Each demodulating circuit portion has an output terminal from which a demodulated color signal is derived, and the D.C. potential at the output terminals of the three demodulating circuit portions is required to be the same so that highly accurate color reproduction, notably reproduction of white colors, can be secured on a screen of the color television receiver. This requirement must be met, in the prior art, by controlling relative values of the output currents of the respective constant current sources. However, it is quite difficult to accurately control the relative values of the output currents of prior art constant current sources, as is detailed hereinafter. 
     The relative values of the output currents, in the prior art, are determined by the value of the current gain α, or its factorial, of the transistor or transistors in the respective circuit portions connected to the constant current sources. However, since the current gain α is 0.98-0.99, i.e., nearly equal to unity, accurate control of the relative output current values is very hard and is not suited to mass-production techniques. This is especially true where the circuit is realized as a semiconductor integrated circuit. In such a circuit reliziation, accurate control is impossible. In addition, even if accurate control of the relative values of the output currents can be achieved for one specific value of the current gain α, the controlled relationship of the output D.C. potentials will be lost with variations of the current gain α due to operating temperature fluctuation or manufacturing error. 
     Difficulties similar to those just described will also occur in the circuit of a direct-coupled amplifier, direct-coupled modulator, direct-coupled demodulator or other circuits which generate two or more outputs and require the accurately controlled output D.C. potentials. 
     It is therefore a principle object of the present invention to provide a transistor circuit generating at least two output potential having accurately controlled D.C. currents. 
     It is another object of the present invention to provide a transistor circuit, having two or more constant current sources and generating two or more output potentials, having D.C. currents, the relation of which, is maintained irrespective of the current gain α of transistors employed. 
     It is still another object of the present invention to provide a transistor circuit including two or more circuit portions, each connected to a respective constant current source and generating outputs having the same D.C. potential irrespective of the current gain α of the transistor employed in the circuit portion. 
     According to the present invention, there is provided a transistor circuit comprising: 
     a power supply terminal; 
     a reference constant voltage supply terminal; 
     a first constant current source having a first transistor with a base connected to said reference constant voltage supply terminal, an emitter connected to a common potential by way of a first resistor, and a collector generating a first constant current; 
     a first circuit portion including a series connection of a third transistor connected to the collector of the first transistor and a first resistive load connected to the power supply terminal; 
     a second constant current source having a second transistor with an emitter connected to the common potential by way of a second resistor, a collector generating a second constant current, and a base connected by way of a third resistor to said reference voltage supply terminal; and 
     a second circuit portion including a second resistive load connected between the collector of the second transistor and the power supply terminal. 
     It is a feature of the invention that a compensating resistor is inserted between the base of the transistor of one of the constant current sources and the reference voltage supply terminal. 
     In accordance with the invention, one or more transistors may be inserted in a series-connection relationship between the thid transistor of the first circuit portion and the collector of the first transistor. Further, one or more series-connected transistors may be inserted between the second resistive load of the second circuit portion and the collector of the second transistor, provided that the number of the inserted transistor or transistors is less than that of the series-connected transistors in the first circuit portion. The resistance of the compensating resistor is determined so as to equalize the variation of the currents flowing through the first and second resistive loads. Such variation is caused by operating temperature fluctuation or manufacturing error. 
     It is another feature of the invention that in the case where the difference &#34;K&#34; in the number of transistors between the first and second circuit portions, is equal to 3, the resistance of the compensating resistor is selected so as to be &#34;K&#34; times as large as the resistance of the second resistor. 
     According to another aspect of the present invention, as will be described in more detail hereinafter, D.C. currents flowing through the first and second resistive loads may be equally affected from the first and second circuit portions irrespective of the difference in numbers of the series-connected transistors in these circuit portions. Therefore the relation of these currents is kept uniform irrespective of the variation of the current gain α of the transistor due to temperature fluctuation or manufacturing error. 
     It is a further feature of the invention that in the case where the resistances of the first and second resistors in the first and second constant current sources are designed to be equal to each other and where the resistances of the first and second resistive loads in the first and second circuits are designed to be equal to each other, the same D.C. voltage drop appears across the first and the second resistive loads irrespective of the variation of the current gain α due to temperature fluctuation or manufacturing error. 
     It is another feature of the invention that the resistance of the compensating resistor may be set to be an integral number of times as large as that of the second resistor, so that the circuit arrangement may be simplified. Although difficulty is encountered with adjustment of an absolute value, of a resistance in a semiconductor integrated circuit, it is quite easy to multiply a ratio of resistance an integral number of times, so that the present invention may be readily practiced in a semiconductor integrated circuit. 
    
    
     The above and other objects and features of the invention will become apparent from the following description taken in conjunction with the accompanying drawings, wherein: 
     FIG. 1 is a circuit diagram showing prior art constant current sources; 
     FIG. 2 is a circuit diagram showing a differential amplifier with the prior art constant current sources of FIG. 1; 
     FIG. 3 is a circuit diagram showing a differential amplifier with constant current sources according to a first embodiment of the invention; 
     FIG. 4 is a circuit diagram showing a color demodulator circuit for a color television receiver including constant current sources according to a second embodiment of the invention; and 
     FIG. 5 is a circuit diagram illustrative of the concept of the present invention. 
    
    
     DETAILED DESCRIPTION 
     FIG. 1 shows one typical example of the prior art constant current sources used in an integrated circuit, which includes transistors Q 1  and Q 2  and emitter resistors R 1  and R 2 . D.C. constant voltage V 0  is impressed on the bases of the transistors Q 1  and Q 2  to obtain constant currents at their collectors. 
     Satisfactory matching of the electrical characteristics between elements may be achieved in a semiconductor integrated circuit having elements formed on the same semiconductor substrate. For instance, in the case where resistances r 1  and r 2  of the emitter resistors R 1  and R 2  are equal to each other, then base-emitter voltages V BE1  and V BE2  and the current gains α 1  and α 2  of the transistors Q 1  and Q 2  may be taken as being equal to each other, so that collector currents of the transistors Q 1  and Q 2  will be equalized and may be expressed as follows: 
     
         α.sub.1 = α 2I.sub.2 = α(V.sub.0 - V.sub.BE)/r.sub.1 (1) 
    
     wherein 
     
         V.sub.BE1 = V.sub.BE2 ≡ V.sub.BE α.sub.1 = α.sub.2 ≡ α 
    
     constant current sources which generate two well balanced currents due to the matching of elements in such an integrated circuit find an application in a direct-coupled amplifier, a modulating circuit or a demodulating circuit which requires a highly controlled D.C. output potential, with the aid of a differential amplifier, resistance loads, and the like. 
     FIG. 2 shows a prior art example of the constant current sources of FIG. 1, which are applied to a direct-coupled differential amplifier. In FIG. 2, a collector of a transistor Q 1  is connected to a common emitter of transistors Q 3  and Q 4 , while a collector of the transistor Q 3  is connected to a power supply terminal 1, and a collector of the transistor Q 4  is connected by way of a load resistor R 3  to the power supply terminal 1. In addition, the bases of transistors Q 3 , Q 4  are connected by way of resistors R 3&#34; , and R 4&#34;   to a base bias terminal 2, respectively, thereby constituting a differential amplifier. The collector of the transistor Q 2  is connected by way of resistor R 4  to the power supply terminal. The first and second output terminals 3 and 4 are connected to the collectors of the transistor Q 4  and Q 2 , respectively. An input signal is applied across the base terminals of transistors Q 3  and Q 4 , and then derived from the output terminal 3. An output terminal D.C. potential V 1  at the time of absence of the input signal may be given by the following equation, assuming that the transistors Q 3  and Q 4  are maintained in equalibrium, and current gains thereof are equally α, as in the case of the transistors Q 1  and Q 2  : ##EQU1## wherein V cc  is a voltage applied to the power supply terminal 1. As can be seen from the equation (2), the output terminal D.C. potential V 1  is dependent on the potential drop between the opposite ends of the load resistors R 3  due to an output current of α 2  I 1  /2, which has been influenced by base currents of the transistors Q 1  and Q 4 . 
     Turning to the other constant current source, the collector of the transistor Q 2  is connected by way of a load resistor R 4  to the power supply terminal 1, thereby supplying an output D.C. potential V 2  to an output terminal 4. Assume that a resistance r 3  = 2r 4 , so that the output D.C. potentials V 1  and V 2  at the terminals 3, 4 may be nearly equal to each other, then the output D.C. potential V 2  is given as follows: ##EQU2## 
     In case a difference between the output D.C. potentials V 1  and V 2  is used as an output voltage, a null voltage is required for the aforesaid difference voltage, and in case the output terminals 3, 4 are directly coupled to the subsequent circuit, a highly accurate adjustment is required for the aforesaid difference voltage. 
     From the equations (2), (3), ##EQU3## 
     As in an example of FIG. 1, I 2  =I 1 , then the equation (4) is given by: ##EQU4## 
     There may be obtained a difference voltage due to (1-- α) which is a difference of current gain α of the transistor from &#34;1.&#34; 
     One attempt for reducing a difference voltage to zero is that a difference is given to the resistances r 1  and r 2  of the emitter resisstors R 1  and R 2  in a constant current source, beforehand, so that I 2  - αI 1  = 0. In this case, a difference of V BE  due to a difference in emitter currents may be essentially neglected, and thus the resistances are set to r 2  = r 1  /α. However, in this attempt, even if the aforesaid prerequisite is satisfied at a given value of the current gain α, the aforesaid prerequisite can no longer be satisfied, when α fluctuates. As a result, this attempt can not sufficiently compensate for variations due to manufacturing error or a variation of α due to the temperature-dependency thereof. These variatons are inevitable in the semiconductor intergrated circuits. Further, since the current gains in general fall in a range of 0.98 to 0.99, it is quite difficult to derive a resitance ratio, r 1  r 2  = α, with high accuracy. 
     FIG. 3 shows a first embodiment, in which the present invention is applied to the case of FIG. 2. A resistor R 5  is additionally inserted between the source of the D.C. constant voltage V 0  and the base of the transistor Q 2  in the circuit of FIG. 2. A base current (1 - α)I 2  of the transistor Q 2  flows through the resistor R 5  (resistance r 5 ), so that an equation for constant currents I 1  and I 2  is given as follows: 
     
         V.sub.0 = V.sub.BE1 + I.sub.1 r.sub.1 = V.sub.BE2 + (1- α) I.sub.2 r.sub. 5 + I.sub.2 r.sub.2 . . . .                        (6) 
    
     Assume that r 1  = r 2 , then a difference between base-emitter voltages V BE1  and V BE2 , due to a difference between I 1  and I 2 , may be neglected, so that equation (6) may be simplified into the following equation (6&#39;): 
     
         I.sub.2 r.sub.1 =I.sub.1 r.sub.1 -(1- α)I.sub.2 r.sub.5 (6)&#39; 3 
    
     Assume that the resistance r 5  of the resistor R 5  is r 5  =I 1  /I 2  r 1 , then the equation (6&#39;) will be I 2  =αI 1 . This means that the relation I 2  - αI 1  = 0 is realized and the aforesaid equation (4) is kept to zero. The above relationship may be established, irrespective of the fluctuation in absolute value of a current gain α, as long as the current gains α of the respective transistor constituting the circuit of FIG. 3 are all equal to each other, with the result that a difference voltage between the output D.C. voltages V 1  and V 2  may be nullified, irrespective of the value of current gain α of the transistor. The condition r 5  = I 1  /I 2  × r 1  = 1/α r 1  may be approximated to r 5  = r 1 , so that resistances r 1 , r 2  and r 5  of the resistors R 1 , R 2  and R 5  may be made equal. In addition, uniformity in electrical characteristics of elements in a semiconductor integrated circuit may  be easily attained, so that the difference voltage may be easily nullified, irrespective of a variation in current gain α of transistors in the integrated circuit due to manufacturing error, or fluctuation of electrical characteristics due to temperature dependency, as has been described earlier. The resistances r 1 , r 2  and r 5  are only required to be equal, which can be easily met when manufacturing a semiconductor integrated circuit. 
     FIG. 4 shows a circuit diagram of a second embodiment of the present invention, in which the present invention is applied to color demodulation circuits in a color television receiver. In FIG. 4, there is illustrated a power source terminal 11, supplying a power voltage V cc , an (R-Y) demodulation circuit block 5, consisting of transistors Q 21  and Q 23  L to Q 28 , and resistors R 21 , R 23 , R 26  and R 27 , a (B-Y) demodulation circuit block 6, consisting of transistors Q 31  and Q 33  to Q 38 , and resistor R 31 , R 33 , R 36  and R 37 , (G-Y) demodulation circuit block 7, consisting of transistors Q 22 , and resistors R 22 , R 25 , R 14 , R 24  and R 34 , an (R-Y) demodulated signal output terminal 23, a (B-Y) demodulated signal output terminal 13, and a (G-Y) demodulated signal output terminal 14. D.C. constant voltage V 0  is impressed on transistors Q 21 , Q 22  and Q 31 , respectively, thus serving as constant current source for producing constant currents from the collectors of the above transistors. Emitters of transistors Q 23  and Q 24  are connected to the collector of transistor Q 21  by way of emitter resistors R 26  and R 27  and emitters of transistors Q 33  and Q 34  are conected to the collector of transistor Q 31  by way of emitter resistors R 36  and R 37 . Transistors Q 23  and Q 24  and transistors Q 33  and Q 34  constitute first differential amplifiers, respectively. A carrier chrominance signal is applied across the bases of transistors Q 23  and Q 24  as well as across the bases of transistors Q 33  and Q 34 . Connected to the collectors of the transistors Q 23  and Q 24  is a second stage differential amplifier consisting of transistors Q 25 , Q 26 , Q 27  and Q 28 , as well as the collectors of the transistors Q 33  and Q 34  to another second stage differential amplifier consisting of transistors Q 35 , Q 36 , Q 37  and Q 38 , so that the aforesaid carrier chrominance signal may be demodulated by a reference signal. The color difference signals thus demodulated are derived through output terminals 23 and 13 from one end of each of load resistors R 23  and R 33 . More particularly, an (R-Y) demodulation output signal having a D.C. potential V 23  is derived at the outut terminals 23, while a (B-Y) demodulation signal having a D.C. potential V 13  is derived from the output terminal 13. On the other hand, the other outputs of the second stage differential amplifiers are impressed on the junctions of resistors R 14 , R 34  and R 24 , connected in series to a collector of the transistor Q 22 , so that these outputs are synthesized, and then a (G-Y) demodulation output signal having a D.C. potential V 14   is derived from the output terminal 14. A resistor R 25  is inserted so as to equalize the D.C. potentials of output terminals 23, 13 and 14 with each other, as will be described in detail hereinafter. In the color demodulator in FIG. 4, one of the functions required is to maintain equality between the D.C. potentials at the three output terminals 23, 13 and 14. However, this functon directly effects the color reproduction, particularly white reproduction on a screen of a color television receiver, so that equality of the D.C. potentials of an extremely high accuracy is required. A.D.C. potential V 23  at the (R-Y) output terminal 23 and a D.C. potential V 13  at the (B-Y) output terminal 13 may be given by the following equation, assuming that the current gains of transistors in the circuit are all equal to a gain α, the resistances of the resistors R 23  and R 33  are r 23  and r 33 , respectively, and currents flowing through the resistors R 21  and R 31  are I 21  and I 31 , respectively: ##EQU5## 
     In case the respective resistances r 21  and r 31  of the emitter resistors R 21  and R 31  are set to be equal to each other so as to provide the relationships r 23  = r 33 , and I 21  =I 31 , then V 23  = V 13  may be maintained. 
     A D.C. potential V 14  at the (G-Y) output terminal 14 may be given by the following equation for D.C. potentials at the output terminals 23 and 13 under the condition I 21  = I 31  : ##EQU6## Signals I 21  and I 22  are currents flowing through the resistors R 21  and R 22 , and r 21 , r 34 , r 14  and r 24  are resistances of the resistors R 21 , R 34 , R 14  and R 24 , respectively. If the relationship, I 22  = α 2 . I 21  may be maintained, where I 22  is a current flowing through the resistor R 22 , so as to supply a constant current to the (G-Y) matrix, then the equality amount the D.C. potentials V 23 , V 14  and V 13  at the three output terminals 23, 14 and 13 may be established (i.e., V 23  = V 13 ) by setting the relationship of resistances in a manner that 3r 34  + 2r 14  + r 24  = r 23 . The aforesaid relationship I 22  = α 2  I 21  may be maintained by suitably determining the resistance r 25  of the resistor R 25  which has been inserted into the base of the transistor Q 22 , as in the case of FIG. 3.  Assume that 
     r 25  = (1 + α) I 21  /I 22 )· r 21 , 
     and then the equation (6) is substituted thereby, so that 
     
         I.sub.22 r.sub.21 = I.sub.21 r.sub.21 - (1--α)(1++ α) I.sub.21 r.sub.21                                                  (10) 
    
     Accordingly, 
     
         I.sub.22 = I.sub.21 - I.sub.21 + α.sup.2 I.sub.21 = α.sup.2 I.sub.21                                                  (11) 
    
     thus, a constant current may be obtained, satisfying the aforesaid prerequisite. 
     The resistance 
     
         r.sub.25 = (1 +α) (I.sub.21 /I.sub.22) r.sub.21 = (1+ α) (r.sub.21 /.sub.α 2) 
    
     thus 
     obtained provides the same results as above, even if r 25  = 2r 21 . Thus, it suffices to insert the resistor R 25 , whose resistance r 25  is set to a resistance of r 25  = 2 r 21 , thereby readily achieving the intended objective. 
     As mentioned above, an output current of a constant current source can be controlled by inserting a resistor between the constant voltage source and the base of the transistor. This results in output potential of a circuit portion, driven by a constant current source, being easily controlled. Similarly the output potentials of other circuit portions, wherein the number of transistors are different from each other and which are driven by respective constant current sources, may be kept equal to each other irrespective of the change in the current gain α due to manufacturing error and/or the fluctuation of the operating temperature. The circuit arrangement to obtain such a result is very simple and is suitable for fabrication with a semiconductor integrated circuit. 
     FIG. 5 is a circuit diagram illustrative of the present invention. In FIG. 5, a circuit portion 50, which is a D.C. equivalent to a series connection of transistors of `N` number, is connected to a constant current source including a transistor Q 51 . In this respect, a differential amplifier consisting of transistors Q 3 , Q 4  of FIG. 3 and a double balanced differential circuit consisting of transistors Q 23  to Q 28  of FIG. 4 corresponds to this circuit portion 50, respectively. In FIG. 3, N is equal to 1, and in FIG. 4, N equals 2. Accordingly, a first output current I 50  from the circuit portion 50 is affected by a base current from `N` transistors, and thus may be derived as a current proportional to α N+1 · I 51 . In the circuit of FIG. 5, another circuit portion 60, which is a D.C. equivalent to the series connection of (N-K) transistors, is connected to another constant current source including a transistor Q 52 . The resistor R 4  in FIG. 3 and the series connection of the resistor R 14 , R 24  and R 34  in FIG. 4 correspond respectively  to the circuit portion 60. In these examples, N-K= 0. In order that the second output current I 60  from the circuit portion 60 is influenced by the base currents of `N` transistors, under the condition of K= 1, the output current from the collector of the transistor Q 52  has to compensate by the additional resistor R 55  so as to be influenced by the base currents of `K` transistors. 
     The resistance r 55  of the resistor R 55  will now be calculated. The relation of the currents I 51  and I 52  flowing through the resistors R 51  and R 52  can be expressed as follows: 
     
         r.sub.51 · I.sub.51 = r.sub.55· (1-α)I.sub.52 + r.sub.52 ·I.sub.52                               (12) 
    
     
         α.sup.n+1 · i.sub.51 = r.sub.52 /r.sub.51 · α.sup.N-K+1 I.sub.52                                (13) 
    
     where r 52 , r 52  and r 55  denote the resistances of the resistors R 51 , R 52  and R 55 , respectively. 
     From equation (12), ##EQU7## By inserting I 52  of equation (14) into equation (13), ##EQU8## Therefore, ##EQU9## 
     For instance, in the case where α = 0.98 (coresponding to an emitter grounded current gain of 49), from the equation (17), the following results are obtained: 
     When K= 1, 
     r.sub. 55 = (1/α) r 52  = 1.02 r 52   
     When K= 2, 
     
         r.sub.55 = (1+α/.sub.60 2) r.sub.52 = 2.06 r.sub.52 
    
     When K= 3, 
     
         r.sub. 55 = (1+ α + α.sup.2 /.sub.α 3 · r.sub.52 = 3.12 r.sub.52 
    
     Therefore, it follows that in the range of K= 1 to 3 the resistance r 55  can be practically selected to be about `K` times as large as the resistance r 52 . 
     Description has been given thus far of a circuit arrangement, in which compensating resistors R 5 , R 25  and R 55  are inserted in the constant current source, assuming that the resistances r 1 , r 21  and r 51  of the emitter resistors R 1 , R 21  and R 51  are equal to r 2 , r 22  and r 52  of the emitter resistors R 2 , R 22  and R 52 . However, it would be apparent from the above calculation that the resistances of the emitter resistors should not necessarily be equal to each other, in contrast to the above embodiments. Generally, the compensating resistor has a function corresponding to the addition of the series connection of transistors to the constant current source. Therefore, in the case where some circuit portions, each having a different number of series connected transistors are driven by the respective constant current sources, the relationship of the respective output currents of these circuit portions can be compensated so as to be equal irrespective of the current gain α of the transistors, by use of the compensating resistor of the invention. In the special case, such as the above embodiments, the output potentials of the plural number of circuit portions can be made equal to each other. 
     It would be also apparent that, in order to obtain the same result, a plural number of compensating resistors can be inserted in the bases of some constant current sources, rather than into one constant current source. 
     Although specific embodiments of this invention have been shown and described, it will be understood that various modifications may be made without departing from the spirit of this invention.