Transistor slope reversing circuit for digital clock display brightness control
BACKGROUND OF THE INVENTION 
     A problem exists with respect to digital clocks as used in automobiles which must have their display output brightness selectively varied in accordance with ambient light conditions. This adjustability must extend over a range of voltage greater than that normally used in the standard dashboard or headlight brightness adjustment circuits. It is further important that this adjustment of voltage be substantially linear throughout the adjustment range. The present invention will be seen to achieve these objectives and offer these advantages even though the circuit is a simple one employing a single transistor and two-terminal elements such that the circuit is economical to build and use. The circuit, it will be appreciated, has a large number of applications in addition to the one shown in the preferred embodiment. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be described in the appended specification and in the several drawings in which like numerals and letters are used to identify like elements as they may appear throughout the several different views: 
     FIG. 1 is a schematic showing the inventive circuit in a simplified form to illustrate its principles of operation; 
     FIG. 2 is a voltage waveform diagram illustrating the operation of the circuit of FIG. 1; and 
     FIG. 3 is a combined schematic, block diagrammatic representation of the inventive circuit as it is included in a brightness control system including a digital clock and display therefore. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     With reference to the FIG. 1 drawing, it includes a single NPN transistor 10 which is of the high current gain (β) type such that: ##EQU1## In the circuit of FIG. 1 the importance of the circuit and its operation is that the slope of the output voltage V C  as a function of the input voltage V R  as set, for example, by a rheostat 12 with a change of sign for a monotonically varying input voltage V R . Mathematically this relationship is as follows: ##EQU2## where V RR  is here defined as the value of input voltage, V R  where slope reversal occurs as shown in FIG. 2. 
     Values of the final output voltage (V CF ), minimum output voltage (V CM ), and slope reversal voltage (V RR ) are design selectable by proper selection of values for V B , R C , R B , and R E . The following two approximate circuit equations aid in the selection of these values: ##EQU3## 
     Equation (1) represents the active transistor region given by: 
     
         V.sub.BEON ≦V.sub.R &lt;V.sub.RR 
    
     Equation (2) represents the saturated transistor region given by: 
     
         V.sub.R &gt;V.sub.RR 
    
     The above equations assume a high current gain (β) transistor such that: ##EQU4## 
     FIG. 3 shows an automotive clock radio and display system in which the inventive circuit is included and is shown on the right hand side of the drawing. The input at the upper left hand side at terminal B represents a voltage input when the ignition switch is closed. The B+ voltage input from the ignition is passed through a diode 22 and a resistor 24 to the upper terminal &#34;IGN enable&#34; input terminal of a block diagram used to represent a digital clock circuit for generating vacuum fluorescent anode segment data voltages. The block is identified by the numeral 26. The block 26 may be embodied as a monolithic MOS integrated digital clock circuit utilizing P-channel low-threshold enhancement mode and ion-implanted depletion mode devices. One type of such device usable along with my invention is Model MM5377 manufactured and sold by the National Semiconductor Corporation, of Santa Clara, Calif. This circuit is interfaced directly with a vacuum fluorescent display 28 also shown in block form. At the lower end of block diagram 26 is shown a crystal oscillator 30 required for its operation. The frequency of operation of the crystal oscillator is selectively adjustable through a resistor capacitor network including a resistor 32, a capacitor 34 and a variable capacitor 36. The required DC supply is provided through a battery 38, diode 40, resistor 42 and a regulation zener diode 44 which in turn is shunted by a capacitor 46. At the left hand side of the digital clock 26 circuit are included a first switch S 1  for setting the hours and a second switch S 2  for setting the minutes. The direct interfacing between the two circuits includes a plurality of hour data outputs numbered 2 through 9, a colon output 10 and minute data outputs 11 through 24. It will be understood that a number of different vacuum fluorescent display circuits may be used. One which is suitable for incorporation in connection with my invention is commercial Model LD8164 which is a seven segment, four digit display panel that can indicate numerals 0 through 9 adding colons. This model is manufactured and sold by the Nippon Electric Company, Ltd., Tokyo, Japan. The brightness control is a function of the output voltage of the transistor 10 as shown in FIG. 3. The output voltage is labeled as V C  in FIG. 1. 
     With respect to the system as shown in FIG. 3, the point V RR  of FIG. 2 represents the minimum rheostat voltage as set by the rheostat 12 with the ignition switch on. V B  represents the maximum rheostat voltage and also is substantially equal to the voltage output from the battery 38. It will be understood that the rheostat voltage is of 0 value with the ignition switch IGN off.