Circuit for improving the frequency characteristic of a color television signal
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a circuit for improving the frequency characteristic of a color television signal, and particularly of the chrominance component thereof. 
     2. Description of the Prior Art 
     The signal bandwidth of the chrominance component of a color television signal according to the NTSC system is 1.5 MHz and is narrower than the bandwidth of the luminance component which is about 4.0 MHz. Therefore, when the signal generated by a television camera is transmitted and demodulated in the receiver, the resulting color signals may not be reproduced in exact registration with the luminance component and blurring of the color image may result. 
     For purposes of illustration, if it is assumed that a received television signal represents the transition between a sharp-edged red primary color area and adjacent portions of a television picture, both the luminance component and the demodulated red color-difference signal should be step-shaped signals at such transition. However, due to the above noted limitation of the frequency band of the chrominance component, the desired step-shaped configuration of the color-difference signal is degraded to a more slowly rising or falling ramp signal. In contrast, the wider bandwidth of the luminance component permits a better approximation of the step-shaped configuration to be attained. Consequently, in a reproduced color television picture, there may be mis-registration of the color image with respect to the luminance image so that there is blurring or poor resolution of the color image. 
     OBJECTS AND SUMMARY OF THE INVENTION 
     Accordingly, it is an object of this invention to improve the frequency characteristics of a color television signal, and particularly of the chrominance component thereof when the latter is provided with a bandwidth substantially narrower than that of the luminance component. 
     Another object is to avoid mis-registration and resulting blurring of a reproduced color television picture due to differences in the bandwidths of the chrominance and luminance components of a color television signal. 
     In general, the chrominance and luminance components of a color television signal are related or undergo correlated excursions. As described in the preceding example, in signifying a sharp edged transition to an area of primary red, both the demodulated red color-difference signal and luminance component signal should exhibit step-shaped changes or excursions. The present invention maintains this correlation by deriving from the wide-bandwidth luminance component a control signal which is employed to artificially sharpen the demodulated color-difference signal and thereby gives to it a frequency characteristic which could otherwise only be achieved with a much wider bandwidth chrominance component. 
     More particularly, in accordance with an aspect of this invention, the luminance component is separated into low and high frequency portions, so that the low frequency portion of the luminance component may be employed as an analogue of the relatively narrow bandwidth chrominance component. The low frequency portion of the luminance component is differentiated and the resulting differentiated low frequency portion is divided into the high frequency portion. The resulting quotient or ratio constitutes a control signal corresponding to the extent by which the low frequency portion leads or lags the high frequency portion of the luminance component. This control signal is applied to a delay controller which, in effect, proportionately advances or retards the chrominance component by decreasing or increasing, respectively, a delay imparted thereto. Due to this selective advancement and retardation of the chrominance signal, a sloped leading edge, for example, due to degradation of a desired step-shaped excursion of the chrominance component, is sharpened to more closely approximate the original or desired step-shaped configuration. The resulting chrominance component has a frequency response characteristic comparable to one transmitted with a significantly wider bandwidth. Of equal significance is the fact that the chrominance and luminance images are brought into closer registration in the reproduced picture. 
     In addition to improving television reproduction in a television receiver, the above technique according to the invention can also be employed in a video tape recorder (VTR) to permit reallocation of bandwidths for the luminance and chrominance components of the recorded color video signal. For example, the recorded chrominance bandwidth may be reduced below the NTSC standard and the bandwidth of the recorded luminance component may remain the same or be proportionately increased. Upon reproduction, the present invention can be employed for sharpening the chrominance component by the even wider luminance bandwidth so that the chrominance component quality or frequency characteristic is brought back to, or above that which would be achieved by the original chrominance bandwidth. 
     The above, and other objects, features and advantages of the present invention, will become clear from the following description of preferred embodiments when read in connection with the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIGS. 1A to 1E show waveforms illustrating the cause of faulty registration between a narrow bandwidth chrominance component and a wide bandwidth luminance component of a color television signal; 
     FIG. 2 shows a simplified block diagram of a circuit according to one embodiment of the present invention; 
     FIG. 2A shows a second embodiment of a control signal generator; 
     FIGS. 3A to 3F show waveform diagrams of signals to which reference will be made in explaining the operation of the circuit shown in FIG. 2; 
     FIG. 4 shows a schematic diagram of the delay controller employed in FIG. 2; 
     FIG. 5 shows a detailed schematic diagram of a divider circuit; 
     FIG. 6 shows an expanded waveform diagram of the correction signal generated by the control signal generator; 
     FIG. 7 shows a schematic diagram of a practical embodiment of current control circuits employed in the divider circuits of FIG. 5. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The manner in which the frequency characteristic of a color television signal is degraded due to limitations in the bandwidths of the chrominance and luminance components will first be described with reference to FIGS. 1A-1E. The luminance component signal Y W  (FIG. 1) and red color-difference signal R W  -Y W  (FIG. 2) ideally generated in a camera to represent a scan across a region of primary red color are shown to have sharp, step-shaped configurations. For perfect television reproduction, the step-shaped waveforms of FIGS. 1A and 1B should be transmitted and demodulated in the television receiver. However, due to necessary limitation of the frequency bandwidth of the transmitted luminance signal, the step-shaped configuration of FIG. 1A is slightly degraded to the signal of Y W  of FIG. 1C in which the sharp transitions are rounded. In addition, the step-shaped configuration of the color-difference signal R W  -Y W  of FIG. 1B is degraded in transmission and reproduction to the color-difference signal R N  -Y N  shown on FIG. 1D. The difference between the rise times and fall times of the signals in FIGS. 1C and 1D is due to the fact that, in a color television signal according to the NTSC standard, the luminance component has a bandwidth of about 4 MHz whereas each color difference signal in the chrominance component has a bandwidth of only 1.5 MHz. When the red color signal R is extracted from the color-difference and luminance signals by adding the signal of FIG. 1C to the signal of FIG. 1D, the result is shown in solid lines on FIG. 1E. It will be noted that the leading and trailing edges of such red color signal R are significantly displaced from the ideal reproduced red color signal shown in dashed lines on FIG. 1E. 
     Turning now to FIG. 2, there is shown generally at 9 a block diagram of the present invention. The narrow band chrominance signal S C  is connected to a delay controller 10. The chrominance signal S C  is connected directly to one input of a delay mixer 12 and to the input of a fixed delay 11 having a delay time of τ. The delay signal S CD  delayed by a period τ is connected to the second input of delay mixer 12. 
     The delay time τ of fixed delay 11 is selected to be an integral number of times the period of the 3.58 MHz color subcarrier signal. Thus the delay time satisfies the following equation: 
     
         τ=n×1/3.58 MHz                                   (1) 
    
     where: n is an integer. 
     It is preferred that the delay time τ not shift the chrominance signal so far that there arises significant errors. Consequently, delay time τ is selected to be from about 0.5 to about 1.0 microseconds. Thus, n is preferably selected to be between 2 and 4 which yields delay time of from 0.559 to 1.117 microseconds. By selecting delay time τ to be an integral number of periods of the color subcarrier signal, combining the direct and delayed chrominance signals in the delay mixer does not deleteriously effect the phase characteristics of the signal delivered to subsequent circuits. 
     A control signal generator 20 receives the luminance signal Y W  at one input and generates a control signal S P  at one of its outputs. The luminance signal Y W  is connected to fixed delay 22 having a delay of Δ and to low pass filter 21L. The delay time Δ of fixed delay 22 is preferably equal to the delay time τ of fixed delay 11. Low pass filter 21L passes a narrow frequency band Y N  having approximately the same bandwidth as the chrominance signal S C . As previously discussed, the luminance and chrominance signals have a high degree of correlation. Consequently, the narrow frequency portion Y N  of the luminance signal should also have a high degree of correlation with the chrominance signal. 
     The delayed luminance signal Y WD  is connected to the additive input of a subtractor 23 and the narrow frequency portion of the chrominance signal Y N  is connected to the subtractive input of subtractor 23. Subtractor 23 produces a signal Y H  which is equal to the chrominance signal Y WD  less the low frequency portion of the chrominance signal Y N . The high frequency chrominance signal Y H  is connected to one input of a divider 25. The low frequency portion Y N  is also connected to differentiator 24. Differentiator 24 produces a signal Y&#39; N  which is equal to the time derivative of the high frequency portion Y H . The differentiated signal Y&#39; N  is connected to a second input of divider 25. Divider 25 divides the high frequency portion Y H  by the time derivative Y&#39; N  of the low frequency portion Y N  and produces a control signal S P  which is connected to delay mixer 12. Delay mixer 12 applies more or less of the delayed chrominance signal S CD  to the corrected chrominance output S CO  depending on whether the low frequency portion Y N  of the chrominance signal is leading or lagging respectively the signal in the high frequency portion Y H . 
     The corrected chrominance output S CO  is connected to a color demodulator 2 which produces the three color difference signals R N  -Y N , G N  -Y N  and B N  -Y N . The color difference signals are combined in a decoder matrix 3 with the delayed luminance signal Y WD  to produce the three color outputs red, green and blue. 
     Turning now to FIGS. 3A-3F, FIG. 3A shows in dashed line the original position of a luminance step function Y W  and in solid line the delayed luminance signal Y WD  which has been delayed a period Δ. FIG. 3B shows the low frequency portion Y N  of the luminance signal Y W . Note that the approximate mid-points of the sloping leading and trailing edges of Y N  are intersected in time by the sharp leading and trailing edges of Y WD . FIG. 3C shows the high frequency portion Y H  of the delayed luminance signal Y WD  obtained by subtracting the low frequency portion Y N  from the delayed luminance signal Y WD  in subtractor 23. 
     The time derivative Y&#39; N  of the low frequency portion Y N  is shown in FIG. 3D. The quotient obtained by dividing Y H  by Y&#39; N  is shown in FIG. 3E. This quotient is the control signal S P  connected to delay mixer 12. 
     Delay mixer 12 has the characteristic that, when control signal S P  is zero, the corrected chrominance output S CO  has a delay intermediate between the undelayed chrominance signal S C  and the delayed chrominance signal S CD . When the control signal S P  is negative, delay mixer 12 applies more delay and when control signal S P  is positive, it applies less delay. Thus, the initial rising portion of the signal in FIG. 3F indicated is delayed by including more of delayed signal S CD  and less of signal S C  to align it with the steeply rising desired shape. The later rising portion experiences increasingly reduced delay to align that portion with the desired signal by increasing S C  and reducing S CD . Thus, the corrected chrominance output S CO  is forced to assume the sharply rising signal characteristic aligned with delayed luminance signal Y WD  shown in FIG. 3A. The trailing edge of the corrected chrominance output S CO  is also forced to follow the desired steeply falling signal by selective increase and decrease in the delay applied to the corrected chrominance output S CO . When the color difference signal R N  -Y N , for example, is demodulated in demodulator 2, its waveshape and timing are both very closely aligned with the delayed luminance signal Y WD  which is applied to the matrix 3 to result in the red color signal. Consequently, the degradation in color due to the narrowness of the transmitted chrominance bandwidth is substantially reduced. 
     Referring now to FIG. 2A, there is shown a second embodiment of the control signal generator 20. In this embodiment, the high frequency portion Y H  is produced by high pass filter 14 which has a low frequency cut-off approximately equal to the high frequency cut-off of low pass filter 21L. The function of the remainder of the control signal generator 20 remains the same as the circuit shown in FIG. 2. 
     Turning to FIG. 5, an embodiment of the divider 25 is described. In FIG. 5, there are provided a first divider circuit 25A which is used when the divisor is positive and a second divider circuit 25B which is used when the divisor is negative. Since both the divider circuits 25A and 25B are identical, only the first divider circuit 25A is described. 
     The first divider circuit 25A includes a first differential amplifier circuit made up of differential transistors Q 1  and Q 2  and a second differential amplifier circuit made up of transistors Q 4  and Q 5 . 
     The emitters of the transistors Q 1  and Q 2  are connected together through identical resistors R 1  to a current control circuit 41a illustrated as transistor Q 3  and a resistor R 3   which forms a current source for the two differential amplifiers. Transistor Q 3  is supplied with the divisor Y N , which is the positive differentiated output of differentiator 24 (FIG. 2), through terminal 43a. First differential amplifier transistors Q 1  and Q 2  are supplied with a dividend which is the direct and inverted high frequency portions Y H  and -Y H  of luminance signal Y W . Inversion of the signal Y H  to yield the signal -Y H  is performed in circuits well known in the art and thus not described. 
     The bases of second differential amplifier transistors Q 4  and Q 5  are respectively connected to the collectors of the transistors Q 1  and Q 2 . The emitters of second differential amplifier transistors Q 4  and Q 5  are connected together to ground through a resistor R O . Identical load resistors 45a and 45b are connected from the collectors of the transistors Q 4  and Q 5  to the power source V CC  respectively. The signals developed across load resistors 45a and 45b are fed to the two inputs a third differential amplifier circuit 47. Third differential amplifier 47 removes common voltages which occur on its two inputs as will be explained. The output 47a of third differential amplifier 47 is the control signal S P . 
     Transistors Q 6  and Q 7  are collector loads for transistors Q 1  and Q 2  and are connected to the bases of transistors Q 4  and Q 5  respectively. The relationship of resistors R 1 , R 2 , R 3  and R 4  (resistors R 2  and R 4 , located the second divider circuit member 25B correspond, to resistors R 1  and R 3  in the first divider circuit 25A respectively) are selected such that R 1  /R 3  =R 2  /R 4 . 
     In the following description of operation of divider circuit 25A, it is assumed that the high frequency band luminance signal Y H  which will become the dividend is constant, and that the base-emitter voltages and emitter currents of the respective transistors Q 1  to Q 7  are identified as shown in FIG. 5. 
     If it is assumed that the emitter current of a transistor is taken as i E  and the base-emitter voltage thereof is taken as V BE , the base-emitter voltage-current characteristic of the transistor is expressed by the following well known equation: ##EQU1## 
     When the currents and voltages are selected as shown in FIG. 5, the relations between the emitter currents i 4 , i 5  and i 6 , i 7  can be respectively expressed by using equation (2) as follows: 
     
         i.sub.4 /i.sub.5 =exp{q/K·T(V.sub.BE4 -V.sub.BE5)} (3) 
    
     
         i.sub.6 /i.sub.7 =exp{q/K·T(V.sub.BE6 -V.sub.BE7)} (4) 
    
     From equations (3) and (4), the following equation is derived: 
     
         i.sub.4 /i.sub.5 =i.sub.7 /i.sub.6                         (5) 
    
     The above equation (5) can be transformed as follows: 
     
         (i.sub.4 /i.sub.4 +i.sub.5)=(i.sub.7 /i.sub.6 +i.sub.7)    (6) 
    
     The voltage applied to the transistor Q 3  is Y&#39; N . The emitter currents i 6  and i 7  are expressed as follows: 
     
         i.sub.6 +i.sub.7 =(Y&#39;.sub.N -V.sub.BE3 /R.sub.3)≈Y&#39;.sub.N /R.sub.3 (7) 
    
     The voltage of the signal applied to the transistors Q 1  and Q 2  is Y H , so that the collector currents i 6  and i 7  of transistors Q 1  and Q 7  are expressed by the following equations (8) and (9), respectively. 
     
         i.sub.6 =1/2·Y&#39;.sub.N /R.sub.3 +Y.sub.H /2R.sub.1 (8) 
    
     
         i.sub.7 =1/2·Y&#39;.sub.N /R.sub.3 -Y.sub.H /2R.sub.1 (9) 
    
     From equation (6), the emitter current i 4  of transistor Q 4  is expressed as follows: 
     
         i.sub.4 /i.sub.0 =(i.sub.7 /i.sub.6 +i.sub.7)=1/2-R.sub.3 /2R.sub.1 ·Y.sub.H /Y&#39;.sub.N                               (10) 
    
     Further, if the base voltage of the transistors Q 6  and Q 7  is taken as V C , the current i 0  flowing through resistor R 0  is expressed as follows: 
     
         i.sub.0 =V.sub.C -2V.sub.BE /R.sub.0 ≈V.sub.C /R.sub.0 (11) 
    
     Therefore, equation (10) can be expressed as follows: ##EQU2## 
     If the emitter currents i 4  and i 5  thus obtained are applied to the third differential amplifier 47 shown in FIG. 5, the term V C  /R which is common to both inputs in the above equations is cancelled. As a result, an output current proportional to the term Y H  /Y&#39; N  is obtained at output terminal 47a. This signal is the desired control signal S P . 
     When voltage Y&#39; N  is zero (Y&#39; N  =0), the currents i 6  and i 7  do not flow. Thus, the control signal S P  is zero. When the voltage Y H  is positive and constant (Y H  &gt;0), control signal S P  is varied by the voltage Y&#39; N  as indicated by a curve l 1  in the graph of FIG. 6. When Y N  &lt;0, current control circuit 41B begins to operate and current control circuit 41A is cut off. Thus second divider circuit 25B performs the division controlled by inverted signal -Y&#39; N  which is positive under the condition specified. The control signal S P  becomes negative as indicated in the left half of the curve l 1  in the graph of FIG. 6. 
     In the case of Y H  &lt;0, the control signal S P  is opposite to that in the above case as shown in curve l 2  of FIG. 6. 
     According to the preceding, divider 25 is capable of producing a control signal S P  even when the divisor approaches zero, without being saturated. Further, even in the case where the voltages Y H  and Y&#39; N  are both changing, the control signal S P  can still be obtained. 
     A practical embodiment of the current control circuits 41A and 41B, shown in FIG. 5 as simple transistors with emitter resistors, is shown in FIG. 7. Since the two current control circuits are identical, only current control circuit 41A is described in detail. 
     Transistors Q 10  and Q 11  form a differential amplifier circuit whose emitters are connected together through a resistor R 5 . The emitter of the transistor Q 11  is connected directly to a constant current source formed by transistor Q 12  and a resistor R 6 . A reference voltage source V REF  is connected to the base of transistor Q 12 . The collector of the transistor Q 10  is connected through terminal 48a to the junction of resistors R1/R1 (shown in FIG. 5). 
     The bases of the transistors Q 13  and Q 10  are connected together and to the direct differentiated signal Y&#39; N . The bases of transistors Q 11  and Q 14  are connected together and to the inverted differentiated signal -Y&#39; N . The collectors of the transistors Q 13  and Q 11  are connected directly to power source V CC . In this example, resistors R 5  and R 7  are selected to be equal in resistance but could be different with appropriate adjustment of values elsewhere in the circuit. 
     Operation of the current control circuits 41A and 41B are described in the following. Since resistors R 5  and R 7  are connected to the emitters of the transistors Q 10  and Q 14 , respectively, the emitter currents of the transistors Q 10  and Q 11  and Q 13  and Q 14  are unbalanced. Thus, with no signal, there is almost no emitter current in the transistors Q 10  and Q 14 . There is substantial emitter current in transistors Q 11  and Q 13 . Therefore, if direct signal Y&#39; N  is positive and is applied to make the bases of the transistors Q 13  and Q 10  positive, no change takes place in Q 14  but the positive signal Y&#39; N  increases the base and collector currents of transistor Q 10 . Thus, current control circuit 41A performs the function of a variable current source responsive to positive values of Y&#39; N . 
     When the input signal Y&#39; N  is negative, current control circuit 41B performs the function of a variable current source whereas current control circuit 41A remains cut off. Thus circuits 41A and 41B shown in FIG. 7 permit controlling the current on both positive and negative input signals Y&#39; N  without the need for mechanical switching. 
     Referring now to FIG. 2A, a practical example of delay controller 10 is described. Delay mixer 12 contains first 30A and second 30B differential amplifiers made up of transistors Qa, Qb, and Qc, Qd and variable current sources 31A and 31B. Since the differential amplifiers and their associated variable current sources are identical, only differential amplifier 30A and variable current source 31A are described in detail. 
     Variable current source 31A is represented by transistor Qe and resistor Ra in series to ground with the commonly connected emitters of differential amplifier transistors Qa and Qb. The direct control signal S P  is connected to the base of Qb and the inverted control signal -S P  is connected to the base of Qa. The base of variable current source transistor Qe is supplied with the undelayed chrominance signal S C . 
     When control signal S P  is zero, the two differential amplifiers are balanced. Consequently, the gain of the delay mixer 12 for the direct chrominance signal S C  and the delayed chrominance signal S CD  is equal. Therefore, the corrected chrominance output S CO  is approximately an equal mixture of direct and delayed components. When control signal S P  is positive, the gain of differential amplifier 30A is increased while the gain of differential amplifier 30B is decreased. Consequently, the corrected chrominance output S CO  contains more of the direct chrominance signal S C  than it does of the delayed chrominance signal S CD . When the control signal S P  is negative, the opposite result occurs. 
     Through the operation of delay mixer 12, the corrected chrominance output S CO  contains more or less of the direct and delayed components, S C  and S CD  respectively of the chrominance signal according to the amplitude and polarity of the control signal S P . As previously explained, this control of delay is in a direction to align the corrected chrominance output S CO  with the delayed luminance signal Y WD  (see FIG. 2). 
     Although illustrative embodiments of the invention have been described in detail herein with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or spirit of the invention as defined in the appended claims.