Current amplifier
This invention relates, in general, to current amplifiers, and more particularly, to a fast response current amplifier having high current output capability. 
     Current amplifiers are well known and are frequently used in electronic systems. However, many of such current amplifiers suffer from one or more shortcomings such as having wide voltage swings thus being slower in response, not being critically damped, or not providing a sufficient output current capability. 
     Accordingly, it is an object of the present invention to provide an improved current amplifier having high current gain. 
     Another object of the present invention is to provide a current amplifier which has a limited amount of swing on an output node which increases speed without loss of phase. 
     Yet a further object of the present invention is to provide a current amplifier which is fast in response time while remaining critically damped. 
     SUMMARY OF THE INVENTION 
     The above and other objects and advantages of the present invention are provided by using a current mirror arrangement as an amplifier receiving inputs at the emitters of the current mirror. A plurality of series connected diodes are coupled to an output node of the current mirror arrangement and to a control input. The control input is coupled to the output node also. The series connected diodes serve to limit the swing at the output node of the current mirror amplifier. The output node drives a Darlington arrangement to provide a high current output for the current amplifier. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     The single FIGURE illustrates in schematic form an embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE DRAWING 
     The single FIGURE illustrates in schematic form a current amplifier having a current mirror arrangement 10 serving as an amplifier. Current mirror arrangement 10 has a transistor 11 and a transistor 12 with their bases connected together. The emitter of transistor 12 is coupled to a voltage terminal 28 by series connected resistors 24 and 25. The emitter of transistor 11 is connected to voltage terminal 28 by series connected resistors 21, 22, and 23. The base electrodes of transistors 11 and 12 are connected to the collector of transistor 11. The collector of transistor 11 is also connected to the collector of transistor 13 which has an emitter coupled to voltage terminal 27 by resistor 14. The collector of transistor 12 is connected to the collector of transistor 16 which also has an emitter which is coupled to voltage terminal 28 by a resistor 17. Voltage terminals 27 and 28 serve as the power supply terminals wherein terminal 27 is at a more positive voltage than terminal 28. In a preferred embodiment, voltage terminal 28 will be at ground potential. The collectors of transistors 12 and 16 form an output node 18 which serves as an output node for the current mirror amplifier arrangement. 
     An input to the amplifier arrangement is applied on line 39 to the junction of resistors 24 and 25. This input is a reference current (I REF ) for the current mirror amplifier. A second input appears at the junction between resistors 22 and 23, and if current mirror amplifier 10 is considered as an operational amplifier, the input to resistor 25 would be the non-inverting input and the input to resistor 23 would be the inverting input which in the preferred embodiment receives a feedback signal from the current amplifier output. Transistor 13 and resistor 14 serve as a current source for transistor 11, and transistor 16 and resistor 17 serve as a current source for transistor 12. 
     A control input is received at input 34 which is connected to an emitter of transistor 33. Transistor 33 is a diode connected transistor by having its base connected to its collector which is also connected to an emitter of transistor 32. Transistor 32 has two emitters, the second emitter is connected to output node 18. The base electrode of transistor 32 is connected to its collector which is also connected to the collector of transistor 31. Transistor 31 has its emitter connected to voltage terminal 27 through resistor 30. The base electrode of transistor 31 is connected in common with the base of transistors 13 and 16 to line 29 which serves as the bias input for the current sources formed by these transistors. In other words, transistor 31 and resistor 30 form a current source for diode connected transistors 32 and 33. Control input 34 is also connected to the base electrode of transistor 36 which has its collector connected to voltage terminal 27. The emitter of transistor 36 is connected to the base electrode of transistor 37 and to a resistor 38. Transistor 37 has its collector connected to output node 18, and its emitter is connected to voltage terminal 28. Resistor 38 is connected between the base electrode of transistor 37 and voltage terminal 28. Transistors 36 and 37 serve as coupling means for the control input signal appearing at line 34. Resistor 38 is a bleed off resistor to insure that transistor 37 turns off faster when an enabling input is removed from input 34. 
     Output node 18 is coupled to voltage terminal 28 by capacitor 41 which serves as loop compensation for the current amplifier. Output node 18 is also connected to the base of transistor 42 which has a collector which is connected to voltage terminal 27. The emitter of transistor 42 is connected to the base of transistor 43 which has its collector connected to the collector of transistor 42. The emitter of transistor 43 is coupled to voltage terminal 28 by resistor 49. Transistors 42 and 43 serve as a Darlington arrangement and have a bleed off resistor 47 connected from the base of transistor 43 to the emitter of transistor 43. The emitter of transistor 43 is also connected to the base of transistor 44 which has an emitter connected to the base of transistor 45. Bleed off resistor 48 is connected from the base of transistor 45 to the emitter of transistor 45. The collectors of transistors 44 and 45 are connected together to output terminal 50. The emitter of transistor 45 is also connected to the inverting input of the current mirror arrangement 10, which input is the junction between resistors 22 and 23. This serves as feedback for the current amplifier. Transistors 44 and 45 also form a Darlington arrangement and resistors 47, 48 and 49 are used as bleed off resistors to allow the high current gain Darlington arrangement to shut off or cease conduction faster. 
     The control input at input 34 only has to be two diode drops or 2 V BE  (base to emitter voltage) drops above ground in order to enable transistor 36 which in turn enables transistors 37. When transistor 37 is enabled, output nose 18 is pulled down to a level which is just 3 V BE  drops above ground. When output node 18 is clamped to this level, transistors 42 and 43 will remain enabled; however, transistors 44 and 45 will not be enabled and therefore Darlington arrangement 44 and 45 cannot sink any current from output terminal 50. When the control input at input 34 goes below 2 V BE  voltage drops then transistors 36 and 37 will not be enabled and node 18 will rise to a voltage level equal to 4 V BE  plus the voltage developed across resistor 25 due to the reference current at input 39. When output node 18 rises to this level then transistors 44 and 45 are enabled and output terminals 50 can sink current. The arrangement of series connected diodes 32 and 33 plus input coupling transistors 36 and 37 insure that output node 18 has a limited swing. It should also be noted that the anode of a diode can be connected to the collector of transistor 13 and the cathode of the diode can be connected to a series of switchable diodes which can be switched in conjunction with the control input at input 34. This would clamp the collector of transistor 11 between two voltage levels to prevent transistor 12 from going into saturation. 
     In a preferred embodiment, the total resistance of resistors 21, 22, and 23 will equal the total resistance of resistors 24 and 25. Resistors 21 and 22 are illustrated as being two different resistors because of the preferred manner in obtaining these resistance values in a fully integrated circuit. Resistors 21 and 24 will be of a much larger value than resistors 22, 23, and 25. As an example, resistors 21 and 24 can be one thousand ohms whereas resistor 25 can be seventy-five ohms and resistor 22 will then be seventy-two ohms and resistor 23 will be three ohms. In a preferred embodiment, resistors 21 and 24 are P material resistors while resistors 22, 23, and 25 are N+ material resistors. The current sinking capability developed at output terminal 50 will be the ratio of resistor 25 to resistor 23 times the current reference (I REF ) provided at input 39. 
     The current amplifier illustrated in the single FIGURE is well suited for use in a magnetic bubble memory operational driver for driving coils. In such an application the voltage applied to voltage terminal 27 could be 5 volts, the voltage terminal 28 would be ground, and output terminal 50 could be coupled to a 12 volt power supply through a coil. In a magnetic bubble memory circuit it is necessary that the trailing edge of the output current decrease gradually to prevent the generation of double bubbles. An output signal from a ramp generator can be applied to output node 18. This is accomplished by having a collector of a transistor connected to output node 18, the emitter of the transistor connected to voltage terminal 28, and the base electrode of the transistor receiving the ramp generator output. In such an application the control input signal at input 34 can be used to enable output 50 while the output of the ramp generator can be used to turn off the output at output 50. 
     By now it should be appreciated that there has been provided a current amplifier which has a limited amount of swing on an output node thereby increasing speed without loss of phase. The current amplifier provides a high output current capability, has fast response, and yet remains critically damped.