Indicating apparatus for a camera
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a camera that is specifically capable of selecting a self-timer mode and a bulb mode. 
     2. Description of the Prior Art 
     Normally in the case of the self-timer mode, the release button is depressed for a moment so as to start the exposure. 
     On the other hand, in the case of bulb photography the release button is continuously depressed, thus, the operation is quite different from that of the self-timer mode. 
     Consequently, until now, the selection position for the self-timer mode and the bulb mode were provided on the same dial in order to avoid the simultaneous selection thereof which would result in a misoperation. 
     However, in the case of bulb photography, the exposure lasts for a long time and the camera should be held firmly while the release button is depressed. Thus, normally a cable release or the like is applied in order to avoid the shock which occurs when depressing the release button by hand. 
     Concerning the manual shock in the case of bulb photography if carried out in the self-timer mode; even if manual shock occurs during a time when the release button is depressed, the shock takes place while the self-timer is in operation, which means that the exposure does not actually begin until the manual shock is no longer felt. Basically, the problem of manual shock can be solved to some extent even without use of the cable release. Therefore, it is desirable that the self-timer mode and the bulb mode can be selected at the same time. 
     SUMMARY OF THE INVENTION 
     It is accordingly, an object of the present invention to allow for bulb photography in the self-timer mode, whereby the timing of the self-timer and that of the bulb operation are made clearly distinguishable from each other so as to improve the operability. 
     It is another object of the present invention to avoid any inconvenience that may arise if the photographer accidentally selects the self-timer mode and the bulb mode at the same time, by making it impossible to carry out the exposure operation even if a normal operation in the self-timer mode is made (the instantaneous depression of the release button). 
     Further purposes and features of the present invention will become apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram showing an embodiment of a camera according to the present invention. 
     FIG. 2 is a circuit diagram showing another embodiment of the camera according to the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Below, the camera of this invention will be described. FIG. 1 shows the circuit of an embodiment of the camera of the present invention. In the drawing, 1 is a self-timer selecting switch to be closed by selecting the self-release mode with the mode selecting slider (not shown), 2 is a release switch to be closed by depressing the release button, 3 is a bulb selecting switch to be closed by selecting the bulb release with the shutter dial (not shown), 4 is a D-type flip flop (hereinafter called DFF) which stores the self-operation signal until the termination of the self-operation, and 5 is an AND gate for obtaining the non-self release signal from the non-self operation signal obtained from the self-operation signal from the DFF 4 through an inverter 6 and from the release signal from the release switch 2. 
     The AND gate 5 of the above construction delivers a high level signal (hereinafter called H) as the release operation signal when the release button is depressed in the non-self mode. 
     7 is a DFF and 8 is an AND gate, both of which constitute a chattering prevention circuit for transmitting the H as the release signal to a release control circuit 10 via an OR gate 9 when the release operation signal continues to be delivered for longer than 1 clock period from an oscillator 23. 
     The release control circuit 10 starts the release with the rising up of the release signal obtained via the OR gate 9 when the bulb selecting switch 3 is opened, and carries out the release operation. When the bulb selecting switch 3 is closed, the shutter remains opened until the signal falls down at which point the release is terminated. The circuit 10 continues to deliver the in-release signal from the start until the termination of the release. 11 is an AND gate for obtaining the in-bulb-release signal from the above in-release signal and the bulb selecting signal from the bulb selecting switch 3, and 12 is a NOR gate for obtaining the counter clear release signal from the self mode signal from the DFF 4 and the in-bulb-release signal from the AND gate 11. 13 is a DFF and 14 is an AND gate, which together constitute a one shot circuit which receives the self operation signal from the DFF 4 and the clock pulse from the oscillator 23 so as to produce a counter set signal during a one clock period from the production of the self operation signal. 15 is a NOR gate for decoding that the outputs of the counters 19 and 20 are &#34;0&#34; and delivering the result to an AND gate 16. The AND gate 16 detects the output of the NOR gate 15 in the self mode and produces H as the self count termination signal when the outputs of the counters 19 and 20 become &#34;0&#34; after the counter is set. Basically, the self count is terminated, and 17 is a one shot pulse producing circuit which transmits H as the release signal to the producing control circuit 10 via the OR gate 9 to be triggered in response to the self count termination signal. 18 is a NAND gate which decodes &#34;60&#34; so as to deliver the counter stop signal to the counter 19. 19 and 20 are respectively a BCD up/down counter of 1 figure to be reset by the clear signal, the initial value is input at the input IN with the load signal, the up/down mode is changed over by the terminal up/down and the input clock pulses from the terminal CK are counted when H is applied to the terminal &#34;carry in&#34;. Further, the count value of the counter always appears at the output terminal &#34;out&#34; in BCD code and the output at the terminal &#34;carry out&#34; is H when &#34;9&#34; is counted up to &#34;0&#34; or when &#34;0&#34; is counted down to &#34;9&#34;. 21 and 22 are the indicators which convert the value input in the BCD code into the 7-segment lamp signal so as to indicate the input value by 7 segments, whereby the driving clocks for the indicating elements are obtained from a frequency divider 24. The counter 19 and the indicator 21 count and indicate the first figures, and the counter 20 and the indicator 22 count and indicate the second figures thus counting and indicating the two figures. 23 is a pulse oscillator, 24 is a frequency divider which divides the frequency of the clock pulses of the oscillator 23 to be delivered to a frequency divider 25 and the indicators 21 and 22. 25 is a frequency divider which divides the frequency only when the NOR gate 12 delivers the clear release signal, so as to deliver the clock pulses of 1 Hz to the counters 19 and 20. 
     Below, the operation of the camera of the present invention shown in FIG. 1 will be explained. 
     First, the case of ordinary photography will be explained. 
     In this case, both the self release mode and the bulb release mode are in the non-selected state such that both the self selecting switch 1 and the bulb selecting switch 3 are in an opened state. Thus, when the release button is depressed for the purpose of closing the release switch 2, the output DFF is kept as a low level signal (hereinafter called L) because the self selecting switch 1 is opened. Thus, the output of the inverter 6 becomes H, as well as the output of the AND gate 5 with the closure of the release switch 2 in such a manner that when the switch 2 is closed longer than 1 clock period of the oscillator 23 a release signal is delivered from the chattering preventing circuit composed of the DFF 7 and the AND gate 8 to the release control circuit 10 via the OR gate 9 so as to carry out the release. 
     Further, when the release if effected by the release control circuit 10, the exposure is controlled by the conventional shutter control circuit and the conventional exposure mechanism. After the lapse of a predetermined shutter time the shutter tail curtain starts to run thus terminating the exposure. 
     Further, in the case of ordinary photography the gate 12 delevers H so that the counters 19 and 20 remain in the cleared state and no figures are indicated by the indicators 21 and 22. 
     Now, the case of bulb photography will be explained. 
     In this mode the self selecting switch 1 is opened, while the bulb selecting switch 3 is closed. When in this state, the release button is depressed so as to close the release switch 2, and the release signal is delivered from the gate 8 to the release control circuit 10 in the same way as in the case of the above-mentioned ordinary photography. Because the bulb selecting switch 3 is closed, the release control circuit 10 is in the bulb mode so that with the rising up of the release signal the release operation is actuated, thus starting the exposure. Meanwhile, the shutter is kept in an opened state so as to continue the bulb release while the release signal is being given. Further, because the circuit 10 delivers the in-release signal during the bulb release, the signal and the close signal of the bulb selecting switch 3 are input into the AND gate 11, which delivers the above in-bulb-release signal to the NOR gate 12. Thus, the NOR gate 12 delivers the clear signal to the counters 19 and 20 and the frequency divider 25 so as to actuate then in synchronization with the release. Further, because at this time the DFF 4 delivers L, the &#34;up&#34; signal is given to the terminal &#34;up/down&#34; of the counters 19 and 20 so that the count operation of the counter by the above clear signal is in the clear state, namely that the value is counted up from the counter value &#34;0&#34; by the pulses of 1 Hz from the frequency divider 25. 
     Because the &#34;up&#34; count value is displayed in figures in the indicators 21 and 22, the display can be visually acknowledged as 0, 1, 2 . . . for every second of the bulb time. 
     When the depression of the button stops after the above display value reaches the bulb time desired by the photographer the release switch 2 is opened and the release signal from the gate 8 disappears, namely, the signal becomes L, the release control circuit 10 stops operation and the tail shutter curtain starts to run so as to terminate the exposure. Further, because the in-release signal disappears with the disappearance of the above release signal, the gate 11 delivers L and the gate 12 delivers H. Thus, the counters 19 and 20 and the frequency divider 25 stop counting, and are again cleared. The display stops with the termination of the bulb photography. 
     Further, when in the case of bulb photography the release button is depressed for a long time to keep the release switch 2 closed, H is delivered from the outputs B and C of the counter 20 when the count value of the counters 19 and 20 reach &#34;60&#34; so that the NAND gate 18 delivers L to the carry-in terminal of the counter 19 for the first figures thus stopping the count operation. However, in this state, the counters 19 and 20 are not cleared, and therefore the indicator continues to display &#34;60&#34;, namely, the lapse of 60 seconds until the release switch is opened. 
     Now, the self mode will be explained. 
     In this mode, the self selecting switch 1 is closed, while the bulb selecting switch 3 is opened. In this state, the release button is depressed so as to close the release switch 2 and the output of the DFF 4 becomes H and is latched. Thus, the counters 19 and 20 assume the down count state, while the NOR gate 12 delivers the release signal and the reset and the clear of the counters are released together with the frequency divider 25. Further, H of the DFF 4 is transmitted to the DFF 13 and the AND gate 14, whereby one shot pulse for one clock period of the oscillator 23 is delivered as the load signal from the gate 14 to the terminal LOAD of the counters 19 and 20. Thus, in the counters 19 and 20 the data &#34;10&#34; is via the input terminal IN. Thus &#34;10&#34; set in the counters 19 and 20 is counted down by the above-mentioned pulses of 1 Hz until it reaches &#34;0&#34;, when the NOR gate 15 delivers H as the count termination signal. On the other hand, the Q output of the DFF 13 is input to the AND gate 16, this Q output of the DFF 13 being H in the self mode, so that the count termination signal is given to the one shot pulse producing circuit 17 via the gate 16, while the circuit 17 gives the release signal to the release control circuit 10 via the OR gate 9. Thus, the release control circuit 10 carries out the above release operation. Further, the count termination signal is input into the DFF 4 via the AND gate 16 so as to reset the DFF 4, whereby the NOR gate 12 delivers H. Basically, the clear release signal disappears so that the counters 19 and 20 and the frequency divider 25 assume the cleared state so as to terminate the counting. Namely, in the self mode, the value &#34;10&#34; set in the indicator is counted down at every second with the depression of the release button until the displayed value reaches &#34;0&#34;, when the release operation is carried out. 
     Now, a case in which both the bulb mode and the self mode are selected, will be explained. In this state, the release button is depressed so as to close the switch 2 while both the self selecting switch 1 and the bulb selecting switch 3 are in the closed state. The same operation as in the case of the above self mode is carried out, and the displayed value &#34;10&#34; in the indicators 21 and 22 is counted down. Because the DFF 4 is reset when the value is counted down to &#34;0&#34;, the count mode is changed over into the up count mode. Further, with the resetting of the DFF 4, H is applied to one input of the AND gate 5 via the inverter 6. Into the other input of the gate 5 the close signal for the switch 2 is input. Also, the release signal is input from the gate 8 after the lapse of the self time as mentioned above so as to carry out the release operation. Further, the circuit 10 delivers the in-release signal during the release in the bulb mode so that even when the DFF 4 is reset the gate 12 produces the clear release signal when the release operation is carried out. Thus, the counters again start the counting operation when the release operation starts after the lapse of the above self time. Because in this case the counter mode has been changed over from the down count to the up count as mentioned above, the counters 19 and 20 carry out the up counting when the bulb exposure starts, whereby at the same time the start of the exposure the lapse of time is displayed from &#34; 0&#34; like 0→1→2 at every second in the indicator. After that in the same way as in the case of the above-mentioned bulb photography, when the release button stops being depressed the tail shutter curtain starts to run so as to terminate the exposure. 
     FIG. 2 showns a circuit of another embodiment of the present invention. In the drawing, the members having the same figures as in FIG. 1 are the same members. The only difference is that in the case of the embodiment in FIG. 2 an AND gate 30 for obtaining the AND of the close signals for the switches 1 and 3, an inverter 31 constituting the selector, AND gates 32, 33 and an OR gate 34 are provided in such a manner that when both the switches 1 and 3 are closed the output pulses of the frequency divider 25 are transmitted to the clock terminal CK of the counters 19 and 20 via the gate 32. 
     Below, the operation of the embodiment in FIG. 2 will be explained. 
     Because in the case of this circuit the output of the gate is L when both the switches 1 and 3 are not closed the gate 33 is selected. And, becaue the gate 33 serves to transmit the output of the frequency divider 25 to the clock terminal CK of the counters 19 and 20, the operation of the selected gate 33 is quite similar to that of the embodiment in FIG. 1 and therefore an explanation thereof will be omitted. 
     Further, when the bulb mode and the self mode are both selected the switches 1 and 3 are closed, the gate 30 delivers H, and the gate 32 is selected in place of the gate 33. Because the gate 32 is connected to the release switch 2, the output pulses of the frequency divider 25 are input to the clock terminal CK of the counters 19 and 20 only when the switch 2 is closed. 
     Thus, if the release button continues to be depressed during the self time, the bulb exposure is carried out after the lapse of the self time, the bulb exposure is carried out after the lapse of the self time in quite the same way as in the case of the embodiment in FIG. 1 and the corresponding display is made. However, when the desression of the release button stops during the self time so as to open the switch 2, the gate 32 is prohibited, whereby the count operation of the counters 19 and 20 is also phohibited. Thus, even if the release button is closed for a moment when selecting the self time mode, forgetting that the mode is set in the bulb mode, the clock of the self time and the exposure are phohibited. thus, in the case of this embodiment, even if an ordinary operation in the self mode is carried out (the release button being depressed for a moment), and it is forgotten that both the bulb mode and the self mode are selected, as in the case of the present embodiment, the photographing procedure of a bulb exposure being carried out in the self mode will not occur, and therefore the misphotographing due to a misoperation in the ordinary self mode can be prevented. 
     As stated above, according to the present invention bulb photography is made possible in the self mode, while the lapse of the self time and the bulb time as well as the change-over between the self mode and the bulb mode can be clearly recognized by the displyed value, which improves the operability. Instead of the 7-segment figure indicator being used as the indicator in the present embodiment, a plural number of dot marks or bar marks are arranged in a row and lit in sequence by the count value of the counter. Further, as the indicator, the accoustic means can be used, whereby the mode of the sound is made different between the self time and the bulb time.