Multiplexed tracking converter
FIELD OF THE INVENTION 
     This invention relates to synchro-to-digital tracking converters in general and more particularly to means for digitally encoding multiple channels of synchro-analog information through use of a multiplexed tracking converter. 
     BRIEF DESCRIPTION OF THE PRIOR ART 
     Synchro-to-digital tracking converters are commonly used to translate analog synchro information to digital binary angle magnitude information, especially in applications requiring high dynamic accuracy, quadrature rejection, and the signal conditioning characteristics of such devices. 
     Synchro-to-digital tracking converters are used most commonly to accept analog synchro information and translate that information into a digital format which can be understood by a digital computer. The net result of this translation is the ability of a computer to, for example, interrogate a synchro to determine the angular position of its shaft. A tracking converter differs from the other types of converters, i.e., successive approximation and sampling, in that there is no minimum conversion time required to generate the angular information. Furthermore, tracking converters most commonly have a feedback loop which simulates a Type II servo loop, which allows it to track a constantly changing input with no lag errors (the velocity constant approaches infinity until the maximum tracking speed is reached). 
     Basic to all tracking converters is the ability to accurately generate a steering voltage whose magnitude and phase contain information which causes the Type II control loop to null itself when the digital output angle β is representative of the analog input information θ. Most commonly, the steering voltage is proportional to sin (θ-β) because this expression does null itself as θ approaches β. 
     Most commonly, the function which is actually implemented is the trigonometric expression: 
     
         sin (θ-β)=sin θ cos β-cos θ sin β 
    
     Sin θ and cos θ are given analog inputs to the converter. They are either provided directly, when the inputs are four wire resolver signals, or are generated by standard Scott &#34;T&#34; transformers from three wire synchro inputs. In order to implement the expression, it is necessary to generate information representing sin β and cos β. 
     The non-linear functions sin β and cos β are generated from the linear digital output angle β by means of an approximation which forms the &#34;heart&#34; of the converter. 
     Prior state of the art converters most typically generated the sin β, cos β approximation by use of two sets of precision ladder networks and two sets of switches. 
     The use of two ladder networks and two sets of switches represents duplication of the most costly and critical components in the converter. 
     U.S. Pat. No. 4,164,729, assigned to the present assignee, improved the art which existed previous thereto by implementing an approximation technique utilizing simplified single ladder circuitry. Although this patent discloses circuitry which was an advance in the art, it would be desirable to achieve multiplexing for multiple channels thereby further lowering costs and circuit complexities. 
     Although schemes have been employed to multiplex multiple synchro inputs to a single track converter, they have typically suffered from the long settling times required for the Type II control loop to acquire a step change at its input. Known multiplexing schemes have commonly tracked only one input at a time, while the other inputs go unserviced. Since typical 180° step change settling times of 14 to 16 bit resolution converters are on the order of 100 to 300 milliseconds, these staleness errors are usually too large for use in dynamic systems. Techniques have been employed to reduce large signal settling time by use of coarse resolution slewing/fine resolution tracking. However, despite considerable cost and component complexity, the settling times remain in the order of 20 to 50 milliseconds. 
     BRIEF DESCRIPTION OF THE PRESENT INVENTION 
     The present invention provides a means of digitally encoding multiple channels of synchro angle information through use of a multiplexed tracking converter utilizing steering voltage circuitry as set forth in the previously mentioned patent. Also, a multiple of Type II control loops are used to maintain the desired dynamic accuracy and signal conditioning for each tracked channel. Each control loop is also of the type disclosed in the aforementioned patent. Thus, it is not the particular steering voltage circuitry or control loop presently employed which is the crux of the invention. Rather, it is the concept of multiplexing such circuitry with multiple control loops. In fact, the multiplexing concept of the present invention is utilizeable regardless of the particular type of approximation technique employed. 
     The ability to multiplex the disproportionally expensive and complex steering voltage circuitry results in substantial cost and performance advantages. 
     Use of individual Type II control loops eliminates large signal settling time restrictions encountered when use of one multiplex control loop is considered. Each Type II control loop becomes part of a sampled data system which still allows the digital output β to track a constantly changing analog input θ without lag errors. 
    
    
     The above-mentioned objects and advantages of the present invention will be more clearly understood when considered in conjunction with the accompanying drawings, in which: 
     BRIEF DESCRIPTION OF THE FIGURES 
     FIG. 1 is a block diagram of a prior art single channel track converter. 
     FIG. 2 is a block diagram of an alternate embodiment of a single channel tracking converter. 
     FIG. 3 is a block diagram of the present invention illustrating a multiplexed tracking converter. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 herein is identical to the overall block diagram of FIG. 3 in the aforementioned patent and will be described. In order to maintain consistency, reference numerals identical with those used in the previous patent will be used in the discussion of present FIG. 1. 
     Assuming that the input is from a synchro rather than a resolver, the synchro outputs S 1 , S 2  and S 3  are provided to Scott &#34;T&#34; transformer 101, the output of which will be cos θ and sin θ on lines 103 and 104, respectively. These outputs are coupled to an octant selection module 103 providing an output -cos θ signal on line 13 and a sin θ signal on line 11. These form inputs to a sine/cosine generator 109, the primary purpose of the octant select circuit being to maintain opposite phasing between sin θ and cos θ in any given octant. The output of the sine/cosine generator 109 is coupled into a summer 111 which takes the difference of θ and β, θ being the analog angle from the synchro and β being the digital angle. This output is coupled into a demodulator 113 having a reference input on line 115 obtained from a reference isolation transformer 117, through a comparator 120 which converts it to a square wave. The sin (θ-β) signal is demodulated and forms an input to an integrator and voltage controlled oscillator unit 119. This module provides two outputs, a clock signal and a directional signal, respectively, on lines 121 and 123. These are inputs to an up-down counter 125. The output of the up-down counter 125 is the digital angle β. The third through nth. bits thereof are coupled into a digital complement module 127, the output of which is the input angle β to the sine/cosine generator 109. The third bit is the complement bit. In other words, when that bit is absent, the digital angle is coupled through directly and when that bit is present, the complement of the angle is coupled through. The third bit is the 45° bit and thus complementing takes place in every other octant. 
     In general terms, in operation the sine/cosine generator 109 and the summing means 111 generate an error signal representative of the error between the actual angle θ and the digital output and β. This error is demodulated in the demodulator 113 and provided to the integrator in the VCO unit 119. The integrator adjusts itself in accordance with the error, the output of the integrator driving the voltage controlled oscillator. The output of the voltage controlled oscillator in turn increments the counter up and down to bring the angle β into agreement with the angle θ. 
     Because the only constraint on the octant select circuit is to maintain opposite phasing between sin θ and cos θ in the same octants, a positive error or steering voltage would indicate a &#34;positive&#34; angular error, in other octants the same voltage would indicate a &#34;negative&#34; error. This would seemingly indicate that the phasing of the steering voltage was not containing the correct information. This phase information is interpreted by the phase sensitive demodulator 113 of FIG. 1, which is referenced by the phase of the reference voltage. The phasing of the reference voltage is changed versus the octant so that the phasing information of the steering voltage is always correctly interpreted by the phase sensitive demodulator by a reference phase module 118. The steering voltage is used to provide the required magnitude and phasing information to the feedback loop illustrated in FIG. 1, which typically simulates a Type II servo loop. 
     Thus the phase sensitive demodulator 113 generates a polarity sensitive d-c voltage from the steering voltage on line 112. This d-c voltage is integrated by a conventional operational amplifier integrator in block 119. The appropriate loop frequency stabilization can be incorporated into the same operational amplifier. The output is fed into a voltage controlled oscillator also in VCO unit 119, which generates pulses at the appropriate frequency and which is used to increment the up-down counts in the appropriate direction. The output of the counter 125 contains the output angle β which is used to control the ladder network in generator 109 generating the steering voltage. This circuitry displays the capability of maintaining a null for the steering voltage even when the counter is being rapidly changed, i.e., when the converter is tracking a constantly changing input. 
     A more detailed description of the block diagram is furnished in U.S. Pat. No. 4,164,729 and is incorporated herein by reference. 
     FIG. 2 shows an alternate embodiment of a tracking converter utilizing a different approximation technique. Identical reference numerals are used to denote identical components. As opposed to the octant selector circuit 103 of FIG. 1, the structurally similar octant select circuit 128 produces the signal sin (45°-θ) on line 130 as contrasted with -cos θ produced from the previously described octant select circuit 103, on line 13 (FIG. 1). The outputs from the octant select circuit 128 are coupled to a sine function generator 134 which is in the nature of a non-linear ladder network and switches of the type incorporated in the sine/cosine generator 109 (FIG. 1), but with circuit values adjusted to generate the steering voltage signal sin (θ-β) on line 112. 
     The sine function generator 134 receives signals from the digital complement module 127 in the same fashion as was the case with the sine/cosine generator 109 (FIG. 1). A summer 111 operates upon the sine function signals present on lines 136 and 138 to actually produce the steering voltage signal on line 112. 
     The steering voltage signal on line 112 serves as a first input to demodulator 113 while the output from reference phase module 118 serves as a second input to the demodulator 113, in a manner identical with that disclosed in connection with FIG. 1. The integration and voltage controlled oscillator unit 119 drives an up-down counter 125 in a manner previously described in connection with FIG. 1. The output from the counter serves as the digital output for the tracking converter and also serves as a means for introducing digital feedback to the digital complement module 127 and the octant select circuit 128. The tracking converter embodiment of FIG. 2 is also similar to the first-described embodiment of FIG. 1 in that they both function as Type II servo loops. 
     It is to be stressed that the multiplexing concept of the present invention, to be explained hereinafter, is not limited to octant select. Accordingly, the multiplexing scheme is equally applicable to quadrant select. Also, approximation techniques other than those discussed in connection with FIGS. 1 and 2 are applicable. 
     FIG. 3 is a block diagram of the invention illustrating the inventive concept of digitally encoding multiple channels of synchro angle information through use of a multiplexed steering voltage circuitry and multiple Type II control loops which maintain the desired dynamic accuracy and signal conditioning for each tracked channel. In the block diagram of FIG. 3, three channels are illustrated. However, it is to be understood that the invention is not so limited and three channels have been selected for purposes of illustration only. 
     Considering, for example, the first input channel dealing with angular information θ 1 , a Scott &#34;T&#34; transformer 101a is seen to accept analog information at its input and produces sin θ 1  and cos θ 1  at its output. The function and operation of transformer 101a is identical to that previously discussed in connection with Scott &#34;T&#34; transformer 101 discussed in connection with FIGS. 1 and 2. The dual output from the Scott &#34;T&#34; transformer is coupled to the input of an octant select circuit 103a which is similar in design and operation to the octant select circuit 103 discussed in connection with FIG. 1. The outputs from the octant select circuit 103a are a positive sine function and negative cosine function of θ 1 . As in the case of the octant select circuit 103 of FIG. 1, the digital output angle β 1 , relating to the first channel, is coupled to a second input of the octant select circuit 103. In a preferred embodiment only the three most significant bits of the digital output angle are coupled. As will be seen from FIG. 3, the second and third input channels likewise include respective Scott &#34;T&#34; transformers 101b and 101c as well as corresponding octant select circuits 103b and 103c. 
     The conventional analog MUX 140 has all of the octant select outputs coupled to its input. On a channel-by-channel basis, the output of the analog MUX will produce signals corresponding to +sin θ and -cos θ along respective lines 142 and 144. The MUX 140 switches to the outputs of each octant select circuit on a rotating basis as controlled by the MUX control 148 along control line 150. This latter-mentioned circuit has an a-c reference connected to its input, along line 146. The MUX control 148 may simply be a three state ring counter causing the analog MUX 140 to synchronously switch between the octant select circuit outputs. Accordingly, during a first sampling period, the output of analog MUX 140 carries signals +sin θ 1  and -cos θ 1 . During the next two subsequent sampling periods, similar signals will be generated for θ 2  then θ 3 . The MUX control 148 then recycles the analog MUX 140 to accept the signals from the octant select circuit 103a corresponding with the first channel. 
     At this point in the circuitry, a sine/cosine generator 109, such as previously discussed in connection with FIG. 1, is multiplexed between the three input channels. Alternatively, the generator illustrated and explained in connection with FIG. 2 may be employed if approximation technique functions of sin θ and sin (45°-θ) are desired. It is critical to understand that circuitry relating to a particular approximation technique is not the inventive concept, per se. Rather, it is the utilization of a single circuit for producing a steering voltage by any appropriate approximation technique, on a multiplexed basis as described, which is the inventive concept. Thus, the steering voltage as a function of sin (θ-β) appears at the output of summer 111 and serves as a first input to full wave demodulator 113. The second input of the demodulator is serially connected to the reference transformer 117, comparator 120 and reference phase module 118, as was the case in connection with FIG. 1. It should be understood that different reference circuits may be utilized to generate a synthetic reference at the second input of demodulator 113. The primary design objective remains the same, namely, the generation of a demodulator output that may be employed by the output circuitry to be discussed, to achieve emulation of a Type II servo loop. 
     Analog MUX 152 is connected in circuit between the output of demodulator 113 and three output channels of digitizing circuitry, each of which includes an integrator/voltage controlled oscillator such as 119a and an up-down counter 125a, which are configured and operate in a manner previously explained in connection with corresponding circuits 119 and 125 in FIG. 1. Thus, for the first output channel, digital angle information (β 1 ) is generated at the output of up-down counter 125a. Likewise, digital angle information β 2  is produced by integrator/voltage controlled oscillator circuit 119b and up-down counter 125b. Finally, the third digital angle information β 3  is generated by the serially connected integrator/voltage controlled oscillator 119c and up-down counter 125c. The analog MUX 152 has a control input connected to MUX control 148 and may be considered as three normally opened parallel connected single pole switches which sequentially close one at a time, in synchronism with MUX control 148, to permit the generation at the output of the converter of β 1  followed by β 2  and finally β 3  after which there is a return to β 1  (the first output channel). MUX 152, in the nature of a simple switch, allows the integrator of each circuit 119a-119c to be configured as an &#34;integrate and hold&#34; amplifier. 
     Digital MUX 156 is connected to the MUX control 148 so that the MUX inputs are synchronized with the outputs of the corresponding up-down counters 125a, 125b and 125c. The output from digital MUX 156 is connected to the input of a digital complement module 127 identical to the same circuit shown and discussed in connection with FIG. 1. Digital angle information β and its complement, on a channel-by-channel basis, forms a second input to the sine/cosine generator 109 thereby completing a Type II servo loop. 
     It should be understood that the invention is not limited to the exact details of construction shown and described herein for obvious modifications will occur to persons skilled in the art.