Low-dead-time interval timer
BACKGROUND OF THE INVENTION 
     The present invention is directed to interval timers. 
     There are many applications in which it is desired to measure the time interval between two events. The occurrences of the events are typically indicated by start and stop trigger signals. A common method of making such a measurement is to provide a counter and a high-frequency clock signal and to gate the clock signal to the counter with a gating signal that begins on the occurrence of the start trigger and ends on the occurrence on the stop trigger. The counter output at the end of the timing interval is then an indication of the length of the interval. 
     In this method, it is the period of the clock signal that determines the resolution with which the interval can be measured. Speed limitations of available counters impose limitations on the shortness of the clock period. However, various methods have been employed to increase the resolution over that provided by the counter output alone. In most such arrangements, a high-current source charges a capacitor from the beginning of a clock interval until the occurrence of a trigger pulse. The capacitor is then discharged with a small current, and the discharge interval is timed. This &#34;stretches&#34; the interval between the last clock pulse and the trigger signal so that the interval is measured with greater resolution. 
     Unfortunately, pulse-stretching techniques result in significant dead time; the system cannot make a new interval measurement while the capacitor is slowly discharging. Moreover, measurements made near the beginning of a clock-pulse interval are subject to inaccuracies because switching transients can cause non-linearities in capacitor charging. 
     SUMMARY OF THE INVENTION 
     The present invention greatly reduces dead time, and it is not subject to the switching transients with which pulse-stretching arrangements are afflicted. According to the present invention, a sinusoidal reference signal either provides or is synchronized with the clock transitions that increment the counter. Start and stop triggers begin and end the gating of counter clock pulses in the usual manner. Additionally, however, the start trigger causes an analog-to-digital converter to sample the value that the sinusoidal signal assumes at the time of the start trigger. The sinusoidal signal is similarly sampled upon the occurrence of the stop trigger, and inverse trigonometric functions are employed to determine the phases of the sinusoidal signal at the beginning and end of the interval. The difference between these phases serves as a fine measurement, which is added to the coarse measurement that results from the counter output. Since the sinusoidal signal can be generated with relatively high accuracy and is constantly in a steady state, transient effects are not a problem. Moreover, since no pulse stretching occurs, the dead time is limited only by the time required to sample and/or convert the value of the sinusoidal signal. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     These and further features and advantages of the present invention are described in connection with the accompanying drawings, in which: 
     FIG. 1 is a block diagram of a simple embodiment of the present invention; 
     FIGS. 2a-e are plots of signals present at various points in the circuit of FIG. 1; 
     FIG. 3 is a block diagram of part of another embodiment of the present invention; and 
     FIG. 4 is a block diagram of part of a third embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS 
     The interval timer 10 depicted in FIG. 1 measures the duration of an interval defined by START and STOP signals on lines 12 and 14. A counter 16 provides a coarse duration measurement by counting the number of cycles of an oscillator 18 that occur within the interval. To refine the duration measurement, the timer 10 employs a pair of analog-to-digital converters 20 and 22, which make measurements from which the phases of the oscillator signal at the occurrence of the START and STOP pulses can be determined. Calculation circuitry 24, typically a microprocessor, then uses the outputs of the counter 16 and the two analog-to-digital converters 20 and 22 to determine the interval duration T i . 
     The interval timer 10 of FIG. 1 bases its fine-measurement operation on a sine-wave reference signal, which is advantageous because a sine wave can be produced more cleanly and easily at high frequencies than signals of other shapes can. The timer 10 may employ a class-A oscillator, whose output is naturally a relatively clean sine wave. More typically, the timer would employ a more-conventional oscillator 18 and use a low-pass or band-pass filter 26 to remove the harmonics present in the oscillator output. The filter output is the clean sine wave depicted in FIG. 2a, and the analog-to-digital converters 20 and 22 sample and convert to digital form the values that the filter output signal assumes at the leading edges of the start and stop signals depicted respectively in FIGS. 2b and 2c. The analog-to-digital converters 20 and 22 store these values, which we will refer to as V 1  and V 2 , in respective V 1  and V 2  memories 30 and 32. 
     The phases of the filter output at the beginning and the end of the interval can be determined from the V 1  and V 2  values by using inverse trigonometric functions; that is, the phases at the beginning and the end of the interval are arcsin V 1  and arcsin V 2 . The interval timer 10 makes the fine-measurement part of the interval determination by subtracting the phase measurements. 
     To make the coarse-measurement part of the duration determination, the timer 10 employs a comparator 34, which receives the filter output and converts it into a square wave, depicted in FIG. 2d, that the counter 16 uses as its increment signal. The oscillator 18 and filter 28 thus serve not only as a reference-signal source but also, together with the comparator 34, as a clock, the clock pulses coinciding with the undulations of the filter output. Although the comparator 34 is shown as comparing the filter output with a ground reference level, those skilled in the art will recognize that it may be desirable to compare it with a different reference, typically a voltage slightly below ground, to compensate for inaccuracies that might otherwise occur because of delays in the comparator 34 and/or counter 16. 
     The counter 16 receives its enable signal from an AND gate 35, whose inputs are the Q output of a D-type start flip-flop 36 and the Q-complement output of a D-type stop flip-flop 37. The start and stop flip-flops 36 and 37 are interconnected so that the reset input of the stop flip-flop 37 is the Q-complement output of the start flip-flop 36, while the reset input of the start flip-flop 36 is the Q output of the stop flip-flop 37. 
     Initially, flip-flops 36 and 37 are both in their reset state, so the high Q-complement output of the start flip-flop 36 keeps the stop flip-flop 37 disabled, but the low Q output of the stop flip-flop 37 does not disable the start flip-flop 36. Accordingly, when the start flip-flop 36 receives a trigger pulse in its clock input, namely, the START signal, its high D input causes the start flip-flop 36 to go high and enable the AND gate 35, thereby causing the counter 16 to begin counting its clock pulses. 
     The setting of the start flip-flop 36 also results in a low value of its Q-complement output, which thereby enables the stop flip-flop 37 to respond to a stop trigger. When the stop trigger arrives, the Q-complement output of the stop flip-flop 37 goes low and thereby disables the AND gate 35, whose output thereby causes the counter 16 to stop counting clock pulses. FIG. 2e depicts the output of the AND gate 35. The counter 16 stores the resultant count, which we will refer to as N, in an N memory 38. 
     To compute the duration T i  of the interval, the calculation circuit 24 fetches the values N, V 1 , and V 2  and computes T i  in accordance with the following formula: 
     
         T.sub.i ={N+[arcsin (V.sub.2 /A)-arcsin (V.sub.1 /A)]/2π}T, k 
    
     where T is the oscillator period and A is the amplitude of the filter output. 
     The arrangement of FIG. 1 greatly reduces dead time because the reference signal used for the fine-measurement operation simply operates in a steady-state manner; unlike the capacitor charged in pulse-stretching systems, it does not have to be initialized after each measurement. Although some time is required to calculate the duration, such calculations do not have to be performed in real time; the raw data V 1 , V 2 , and N are stored in the memories 30, 32, and 38, respectively, and these memories can be sized to contain a plurality of measurements. 
     The dead time therefore is at most the convert time of the analog-to-digital converters 20 and 22, and there typically is no dead time at all. Specifically, if the first digital-to-analog converter 20 completes its conversion before the subsequent pulse in the STOP signal occurs, the next interval measurement can begin immediately--i.e., there is no dead time--and the meter can thus be used for purposes such as digital FM demodulation, in which the duration of each cycle is measured. Moreover, convert times can be made very small if the analog-to-digital converters are &#34;flash converters.&#34; An n-bit flash converter is one that makes comparisons with 2 n  voltage references simultaneously rather than with n reference voltages sequentially. 
     Although my invention as embodied in the interval timer of FIG. 1 provides significant dead-time advantages, it can require a relatively high analog-to-digital-converter resolution for a given desired duration resolution. Specifically, the value of the sine wave changes only very slightly with time when its phase is near π/2 or 3π/2. Thus, a much higher analog-to-digital-conversion resolution is required to obtain a given interval-measurement resolution near those phases than is required near 0 and π. For this reason, it may be preferable in some situations to embody my invention in an arrangement of the type depicted in FIG. 3, which uses two sine waves, one of which is 90° out of phase with the other so that one will be in the high-resolution part of its curve if the other is in the low-resolution part. 
     FIG. 3 does not show the part of the circuitry for determining the value of N, since that part is the same as in the embodiment of FIG. 1. FIG. 3 does show analog-to-digital converters 20&#39; and 22&#39; and memories 30&#39; and 32&#39;, which together generate outputs V 1  and V 2  in a manner the same as that in which the elements with corresponding unprimed reference numerals in FIG. 1 generate them. In addition, the arrangement of FIG. 3 includes a parallel combination of analog-to-digital converters 40 and 42 and memories 44 and 46, which operate in a manner the same as that in which corresponding elements 20&#39;, 22&#39;, 30&#39;, and 32&#39; operate, with the exception that the sinusoidal signal that they receive is in quadrature with the sinusoidal signal that analog-to-digital converters 20&#39; and 22&#39; receive. These two phase-quadrature signals can be generated in any desired manner, one of which is depicted in FIG. 3. 
     In FIG. 3, an oscillator 18&#39; drives a high-speed buffer 48, which generates complementary square-wave outputs. Two divide-by-two circuits 50 and 52 receive these square waves and toggle on each positive-going transition. Each divide-by-two circuit thereby divides the frequency of its input by two. The result is two square waves that are 90° out of phase with each other, and filters 28&#39; and 54 remove the harmonics from these signals to produce sine-wave outputs in phase quadrature. One of these outputs, namely, that of filter 28&#39;, increments the counter just as the output of filter 28 of FIG. 1 does. 
     The calculation circuit could operate in manner essentially the same as that employed by the calculation circuit 24 of FIG. 1. Specifically, it could use essentially the same formula to determine the duration T i  of the time interval. The difference would be that, whenever the absolute value of V 1  or V 2  is greater than, say, 85% of its peak value, the calculation circuit 24&#39; would determine arcsin V 1  or arcsin V 2  indirectly by substituting arccos V 3  or arccos V 4 . In this way, the resolution of the system would not suffer when the beginning or end of the transition happens to occur during a low-resolution part of one of the reference signals. 
     However, one might employ a different formula, which enables the system to be calibrated for differences in reference-signal amplitudes and for differences in the delays imposed by filters 28&#39; and 54. To explain the alternate method of calculation, we assume that the sinusoidal signals that filters 28&#39; and 54 produce are out of phase quadrature by a phase error p and that their amplitudes differ. To compensate for these factors, the user calibrates the system from time to time, say, once per week. 
     To calibrate the system, the user applies a CAL signal to the calculation circuit to cause it to assume a calibration mode. He then applies START and STOP signals separated by a known phase difference f. The resultant voltage measurements are given by the following expressions if the START pulse for the calibration interval occurs when the output of filter 28&#39; has a phase x: 
     
         V.sub.1 =A.sub.1 sin x                                     (1) 
    
     
         V.sub.2 =A.sub.1 sin (x+f)                                 (2) 
    
     
         V.sub.3 =A.sub.2 cos (x+p)                                 (3) 
    
     
         V.sub.4 =A.sub.2 cos (x+p+f)                               (4) 
    
     where A 1  and A 2  are the peak values of the outputs of filters 28&#39; and 54, respectively. It may be necessary to perform the measurement step more than once; a perusal of equations (5) and (6) below reveals that it is desirable to avoid values of x for which the values of V 1  and/or V 3  are near zero. 
     The goal of the calibration operation is to determine the values of the phase error p and the amplitude ratio A 1  /A 2 . The first step in this determination is to find x, the phase of the reference signal when the STOP pulse was received. If we rewrite equation (2) by using the trigonometric identity for the sine of a sum, divide the result by equation (1), and rearrange terms, we obtain: 
     
         cot x=(V.sub.2 /V.sub.1 sin f)-cot f.                      (5) 
    
     Clearly, x is the inverse cotangent of the expression on the right side of equation (5). 
     We then rewrite equation (4) by using the trigonometric identity for the cosine of a sum, divide by equation (3), and rearrange terms to yield the following equation: 
     
         tan (x+p)=cot f-V.sub.4 /V.sub.3 sin f.                    (6) 
    
     By subtracting the value of x derived from equation (5) from the inverse tangent of the expression on the right side of equation (6), we obtain the value for the phase error p. Once p is known, the ratio A 1  /A 2  can readily be determined. 
     The user then releases the CAL signal, and the timer 10&#39; is ready to determine the duration T i  of the interval defined by the next START and STOP pulses. When the next START and STOP pulses occur, the timer makes measurements of V 1 , V 2 , V 3 , and V 4  as before, and it uses the calibration values p and A 1  /A 2  to determine the phases p 1  and p 2  that the reference output of filter 28&#39; assumes upon the occurrences of the START and STOP pulses, respectively. 
     Specifically, it determines these phases in accordance with the following formulas: 
     
         p.sub.1 =arctan (tan p+A.sub.1 V.sub.3 /A.sub.2 V.sub.1 cos p) (7) 
    
     
         p.sub.2 =arctan (tan p+A.sub.1 V.sub.4 /A.sub.2 V.sub.2 cos p). (8) 
    
     The timer then employs the number N of count pulses received during the interval to compute the total duration: 
     
         T.sub.i =[(N+p.sub.2 -p.sub.1)/2π]T. 
    
     The arctangent function, employed in equations (7) and (8), is single-valued only if its range is limited to π. For the calculations here, of course, the range must be 2π, so the arctangent function is double-valued. For this reason, the polarity of one of the measurements will be used to determine which of the values to employ. 
     To simplify illustration of the principle that the invention employs, the embodiments of FIGS. 1 and 3 are arranged with their oscillator and sinusoid frequencies equal. However, the teachings of the present invention can also be practiced in arrangements in which the clock frequency is, say, a multiple of the sinusoid frequency. In fact, there are practical reasons why the use of a higher clock frequency may be preferable. 
     Consider an event that occurs when the sinusoid phase is 0, i.e., an event that is coincident with a clock transition. In such a situation, the counter may or may not count the clock pulse that coincides with the event. The measured phase at the START event is 0, and we will assume that the measured phase at the STOP event is π/4 and that the counter output N is 1. In the arrangements of FIGS. 1 and 3, such measurements indicate that the time interval between the START and STOP triggers is 1.125 times the clock period. Since the phase measurement at the START event was 0, however, the counter might have counted the clock pulse that coincided with the START event, and the interval may actually only have been 0.125 times the clock period. If the START and STOP events both occur very near to clock transitions, the counter may count neither, one, or both of the nearly coincident transitions. This results in three possible counts for essentially the same-duration time interval. Every combination of actual duration and measured phase difference is thus associated with a group of two or three possible counts. When the clock and sinusoid frequencies are equal, this results in ambiguity because a group associated with a given phase difference can have a count in common with another group associated with the same phase difference but a different actual duration. If the clock frequency is four times the frequency of the sinusoidal reference signal, however, no two groups of possible counts associated with a given measured phase difference have any counts in common, so the result is unambiguous. FIGS. 4 and 5 illustrate an embodiment for taking advantage of this effect. 
     FIG. 4 depicts a replacement for the part of the circuit of FIG. 3 upstream of the filters 28&#39; and 54. In FIG. 4, the output of the oscillator 18&#34; is the counter clock input. In this particular, the arrangement of FIG. 4 differs from that of FIG. 3, since in FIG. 3 it is the output of filter 28&#39; rather than of oscillator 18&#39; that provides the counter increment signal. That is, the clock signal is the same as one of the sinusoidal reference signals in the FIG. 3 arrangement, while the clock and reference signals in FIG. 4 are different and, indeed, are of different frequencies, although they are in synchronism with each other. 
     The arrangement of FIG. 4 further differs from that of FIG. 3 in that the arrangement of FIG. 4 includes a divide-by-two circuit 56 interposed between its oscillator 18&#34; and its high-speed buffer 48&#39;. The functions of the high-speed buffer 48&#39; and two divide-by-two circuits 50&#39; and 52&#39; are the same as those of the high-speed buffer 48 and divide-by-two circuits 50 and 52 of FIG. 3, and subsequent circuitry not shown in FIG. 4 performs functions substantially identical to the subsequent circuitry of FIG. 3. A further difference is that the calculation circuit 24&#34; of FIG. 4 employs a different calculation routine. The purpose of the difference in calculator routines is to take advantage of the fact that the counter clock frequency is four times the sinusoid frequency. 
     Specifically, the calculation circuit 24&#34; of FIG. 4 employs substantially the same formula for determining the time interval, but it replaces the counter output N in that formula with a new coarse-duration quantity N&#39; determined in accordance with the following formula: 
     
         N&#39;=trunc[(N+2)/4-(p.sub.2 -p.sub.1)/2π], 
    
     where trunc(x) is the integer part of x; e.g., trunc(21/2)=2. This formula serves as a sort of error-correcting routine; it takes into account the fact that, for any phase difference, there is a group of two or three possible values of N that can result from the same number of complete sinusoid periods. It implicitly assigns a single value of N&#39; to each group of two or three values of N, identifies the group into which N falls, and uses the single value of N&#39; associated with that group to calculate the interval duration. 
     For example, suppose that the START and STOP events are separated by almost exactly two periods of the sinusoid. Suppose further that the measured starting phase p 1  is very near to 0 and the measured stop phase p 2  is very near to 2π. The START and STOP pulses then would both very nearly coincide with clock pulses, and the counter could be incremented by one, both, or neither of the coincident clock pulses. There are thus three possible values for N: 7, 8, and 9. 
     Since the value of p 2  -p 1  is almost 2π, however, the formula for N&#39; yields a value of unity regardless of whether N is 7, 8, or 9. The single sinusoid period represented by N&#39;=1, together with the single period represented by the phase difference of 2π, yields the proper two-period interval when employed in the formula for T i . 
     Consider another example, this one being the reverse of the previous one. In this example, the values of p 1  and p 2  are reversed: the first event occurs on a phase of nearly 2π, while the second event occurs on a phase of nearly 0. Assume again that the time interval is almost exactly two sinusoid periods. In this case, the possible values for N are again 7, 8, and 9, but the value of p 2  -p 1  is -2π rather than 2π. Accordingly, the formula for N&#39; yields a value of 3 rather than 1. The resultant value of T i  remains the same, however, because the phase difference in this example is -2π rather than 2π, so the single sinusoid period represented by this value is subtracted from, rather than added to, the value of N&#39;. 
     It is apparent from the foregoing description that the general concept of refining an interval measurement by using a sinusoidal reference and employing an inverse trigonometric function of its values at the beginning and end of the interval can be employed in a wide range of embodiments that differ from the specific embodiments illustrated above. For instance, although both of the embodiments above employ different analog-to-digital converters for the START and STOP signals, such an arrangement is not necessary; the same converter can be used for both. Additionally, it will be apparent that one can employ the teachings of the present invention not only with the inverse trigonometric functions mentioned above but also with others. The present invention thus constitutes a significant advance in the art.