referring now to the drawings , the system used for performing myocardial tissue ablation according to the method of the present invention is generally illustrated in fig1 and designated at 10 . the system generally includes a microprocessor based controller 12 , a network of drivers 14 , an ultrasound array 16 and a phase detection subsystem 18 , which can be of several varieties . the array 16 is a specialized source of ultrasound energy and is based on multiple ultrasound transducers 20 ( see fig2 ) arranged in a two dimensional array such that each transducer 20 is driven separately by the drivers 14 . experimental studies of the present inventors have shown that through use of the controller 12 , drivers 14 and phase detection subsystem 18 , the phase of the ultrasound waves produced by each transducer 20 can be adjusted to form a highly focused ultrasound beam , generally designated at 22 , which can be formed on a predetermined portion of myocardial tissue ( the treatment volume 24 ) on the heart 26 of the patient 28 . these studies have also shown that through the present system 10 , the beam 22 can also be adjusted to compensate for acoustic aberrations encountered during transmission through the treatment window in the patient 28 and can be adjusted to follow movement of the treatment volume 24 during the cardiac cycle or movement of the patient 28 . the focused position of the beam 22 is therefore determined by the phase distribution of all of the transducers 20 of the array 16 , hence the term &# 34 ; phased array &# 34 ;. the array 16 consists of numerous small individual ultrasonic transducers 20 and is designed so that its shape will fit a particular &# 34 ; window &# 34 ; into the treatment volume 24 of interest inside the body of the patient 28 . depending on the particular application , the geometry of overall array 16 can therefore vary greatly . where the treatment volume 24 consists of a myocardial target , the window consists of that part of the body surface where ultrasound propagation from the array 16 to the target volume 24 will occur . as seen in fig1 and 2 , the window may include a complex set of contiguous , non - contiguous and inhomogeneous tissues such as those formed by skin tissue 30 , muscle tissue 32 , bone tissue ( herein illustrated as and referred to ribs ) 34 and the intercostal spaces 36 between the ribs 34 . because of the inhomogeneous nature of the various tissues , the individual ultrasonic waves produced by the transducers 20 are caused to defract , refract and reflect when transmitted therethrough . this results in an unfocused or distorted beam generally designated by the dashed - dot lines at 48 in fig2 . in addition to the distorted beam which is transmitted , additional waves are scattered and reflected back toward the array 16 . this is representatively designated at 49 in fig1 . the number of transducers 20 in the array 16 can vary , preferably from 30 to greater than 1000 , and each is separately driven . as further described herein , the phased array 16 includes 512 individual transducers 20 . the individual ultrasound transducers 20 of the array 16 are small enough to allow a broad dispersion of ultrasound energy coming usually from a fraction of an acoustic wavelength at the operation frequency ( preferably from 0 . 5 - 2 . 0 mhz ) to three or four wavelengths . the individual transducers 20 are constructed of a piezoelectric material in the form of blocks or tiles which are bonded to the back of a substrate 38 . in the illustrated embodiment of fig2 the transducers 20 have a monolithic , flat rectangular shape and are individually bonded to the substrate 38 . the substrate 38 can be constructed from a variety of materials , including ceramics or metallic materials , such as aluminum or magnesium , and is formed in the desired geometric shape of the array 16 . as seen in fig2 the substrate 38 is formed with a plurality of flat mounting areas 40 which are oriented relative to one another so as to provide the array 16 with a generally curved configuration that geometrically provides a degree of focusing to the array 16 . in addition to providing a mounting for the transducers 20 , the substrate 38 can also serve as a waterproof mounting and as an acoustic impedance matching layer . if constructed of metal , the substrate 38 can additionally act as the common ground electrode for all of the transducers 20 . alternative fabrication methods than those discussed above can be used to construct the array 16 . one illustrative example is that a piezoelectric composite can be molded into the desired final geometry of the array 16 so as to form a continuously curving surface . in addition to the electronic phased focusing of the array , this type of array typically has additional focusing built into its construction as a result of the geometric shape of the array itself . as mentioned above , the shape of the array 16 can also be varied based on design considerations relating to obtaining a good fit with the treatment window into the treatment volume 24 . since phased arrays 16 and their construction are generally known within the industry , one skilled in this technology will appreciate the various possible choices of construction materials and methods for an array 16 used in a particular application and further in accordance with the teachings of the present invention as described elsewhere herein . for this reason , additional details relating to the construction of the array 16 are not discussed herein . in order for the system 10 of the present invention to perform cardiac ablation on the treatment volume 24 , the system 10 must be able to correct for the acoustic aberrations mentioned above , as well as the movement of the heart 26 and tissue present between array 16 and the treatment volume 24 . if the phase relationship between the ultrasound wave from each element transducer 20 and a point in the treatment volume is measured and known , the beam can be refocused by compensating for the presence of the aberrations . since movement can be considered as a form of aberration , the beam 22 can be periodically refocused as the treatment volume 24 moves thus allowing the focused beam 22 to follow the motion of the treatment volume 24 . obviously , the movement correction of the beam 22 has to be sufficiently fast to allow the beam to accurately follow the treatment volume 24 . the hardware and signal processing algorithms which allow for the refocusing of the beam 22 and tracking of the cardiac treatment volume 24 will now be described in greater detail . by knowing the location of the treatment volume 24 within the heart 26 and the distance of the treatment volume 24 from the array 16 , the phase of each transducer 20 is adjusted so that the array 16 focuses the ultrasound beam 22 on the treatment volume 24 . in order to locate the treatment volume 24 , the phase detection subsystem 18 includes a catheter based sensor array 42 is inserted into the heart 26 by either an arterial or venous route . such sensor arrays 42 are well known in the industry and includes a number of sensors or hydrophones 44 located along a length of a catheter 46 . a separate set of electrodes are initially used to electrically map the conduction pattern in the heart 26 by well known and established procedures . in this manner , the specific location of the myocardia tissue creating the arrhythmia and in need of treatment is identified and located . using this information , which is fed back into the controller 12 through line 50 , the beam 22 can be initially focused on the treatment volume 24 . also , non - invasive ultrasound imaging techniques which sense temperature increases can be used to initially locate the beam 22 on the treatment volume . during transmission through the treatment window into the patient 28 , the individual ultrasound waves generated by the array 16 will be refracted and reflected as a result of the tissues 30 , 32 and 34 and intercostal spaces 36 . the result is the defocused beam 48 which is sufficiently defocused so as to preclude ablation of the treatment volume 24 . utilizing appropriate hydrophones 44 in the sensor array 42 and knowing the distance from the sensor array 42 to the individual transducers 20 of the array 16 , it is possible to measure the aberrated phased distribution 24 of the beam 48 after encountering the inhomogeneous tissues of the window into the treatment volume 24 . the distorted phase distribution ( or phase error distribution ) caused by the aberrations within the window into the treatment volume 24 is communicated through line 50 to the controller 12 . utilizing this information , the controller 12 calculates a compensating driving phase distribution which results in the formation of the focused beam 22 on the treatment volume 24 . known methods for calculating the compensated driving phase distribution are utilized and therefore only generally described below . after refocusing , the intensity of the beam 22 on the treatment volume 24 will be such that ablation of the treatment volume 24 can be performed . as a completely non - invasive alternative to the above method for determining the effect of the aberrations , appropriate sensors 49 can be positioned within the array 16 itself and used to measure the scattered or reflected phase distribution of the ultrasound waves . alternatively , the array itself could be used as the appropriate sensors by incorporating receive circuitry into the design . this information is in turn communicated to the controller 12 where a compensating phase distribution is calculated and determined in similar fashion using known non - invasive aberration correction methods . movement of the treatment volume 24 , as a result of the cardiac cycle or movement of the patient 28 , is compensated for by correcting the focus of the beam 22 such that it follows the movement of the treatment volume . this is again achieved through the hydrophone array 42 and is more specifically accomplished by using the array 42 to measure the movement of treatment volume 24 relative to the location of the focused beam 22 . signals corresponding to the relative change in position of beam 22 are then communicated to the controller 12 which accordingly adjusts the phase distribution of the transducers 20 in the array 16 to cause movement of the focused beam 22 to the new location of the treatment volume 24 . since the above measurements and feedback signals are performed at electronic speeds and the cardiac cycle is relatively slow in comparison , it is possible for the refocused beam 22 to remain on target with the movement of the treatment volume 24 throughout the cardiac cycle . as generally outlined , non - invasive ultrasound imaging techniques can be employed to determine the &# 34 ; moved &# 34 ; position of the treatment volume 24 relative to the known position of the refocused beam 22 . aberration correction and motion compensation can be achieved through implementation of variously known algorithms in the relevant technical field , as will be appreciated by one skilled in this technological field . for example , aberration compensation and movement correction can be generally accomplished by the following procedure : measuring the magnitude and phase of the acoustic pressure at each focal point produced by each individual transducer 20 of the array after encountering an aberration or movement ; calculating a full rank matrix based on the acoustic pressure measurement to include phase errors due to the aberrations and movement ; setting a weighing matrix as an identity matrix and specifying the required intensity distribution at the focal points ; calculating the driving signal for one transducer 20 based on the measured data ; and repeating the above for each additional transducer 20 . actual driving of the array 16 is performed by the controller 12 and the drivers 14 , while refocusing and motion tracking is assisted through the phase detection system 18 . generally , these components can be referred to as the phased array driving portion of the system 10 . electronically , the former components can be seen as including three major subsystems ; a digital subsystem , an analogue subsystem and a power supply subsystem . the digital subsystem consists of the controller 12 , which includes a 486 dx computer 51 , an interface board 52 , buffer boards 54 and fifo boards 56 that cooperate to generate up to 512 channels of square waves with specified phases and amplitudes per duty cycles . while only 512 channels are implemented in the following discussion , it will be understood that additional channels are possible . each channel is amplified and matched in the analog subsystem to the impedance of the corresponding transducer 20 which will be driven by that channel . the interface board 52 is a 4 . 8 inch by 6 . 5 inch custom printed circuit ( pc ) board that is plugged in the appropriate slot of the controller 12 . this board 52 serves as an interface between the computer 51 and the buffer boards 54 and fifo boards 56 which are located in a card cage 58 . as seen in fig4 on the interface board 52 , two latches , 100 and 102 , latch the i / o data bus from the computer . one of eight decoders , 104 , inputs three address lines , a1 - a3 , and decodes eight outputs to select eight 3 - input nor gates 106 , 108 , 110 , 112 , 114 , 116 , 118 and 120 . the outputs of the nor gates connect to the chip -- select inputs of eight output latches 122 , 124 , 126 , 128 , 130 , 132 , 134 , 136 , four of which 122 , 124 , 126 , 128 are used to latch the 32 - bit data bus , d0 - d31 , three 130 , 132 , 134 to a latch the 24 - bit address bus , a0 - a23 , ( only part of them are use in this system ) and one 136 to latch 8 - bit control bus comprising : oe -- , rs -- , ren -- , wen -- , clken -- , clksel -- , plsctrl -- , fbctrl -- , where : ______________________________________oe . sub .-- : output . sub .-- enable line for the parallel syncfifosrs . sub .-- : reset line for the parallel syncfifosren . sub .-- : read . sub .-- enable line for the parallel syncfifoswen . sub .-- : write . sub .-- enable line for the parallel syncfifosclken . sub .-- : the input of the d flip - flop , 152 , on the buffer boardsclksel : clock select : to select between two kinds of clock signals for the parallel syncfifos . when high , the clock for the parallel syncfifos is low fre - quency and data is written into the parallel sync - fifos . when low , the clock for the parallel syncfifos is high frequency and the parallel syncfifos output data . plsctrl . sub .-- : pulse . sub .-- control line : when low , the outputs of the parallel syncfifo boards are enabled in tri - state . when high , the outputs of the parallel syncfifo boards are enabled in tri - state . fbctrl . sub .-- : feedback . sub .-- control line : when low , the output of the parallel syncfifos is feedback to input . ______________________________________ the buffer boards 54 , a representative one of which is shown in fig5 buffer the data bus , the clock and the control bus going to the fifo boards 56 . each buffer board 54 can drive up to eight fifo boards 56 . but in the present system , for design convenience , one buffer board 54 is used to drive two fifo boards 56 . one decoder of sixteen , 140 , inputs four address lines , a1 - a4 , and outputs a 16 - bit board -- enable bus . each output enables one fifo board 56 when writing data into the parallel syncfifos . address lines a4 and a5 are used to chip -- select the decoder 140 . the buffer boards 54 also generate and buffer the clock . the original clock source can be provided in two ways . one is to use a crystal oscillator 142 on the board 54 and the other way is to input an external clock signal 144 from a signal generator . a switch , 146 , on board 54 allows the user to select either . the clock generation circuit is made up of two inverters , 148 and 150 , one d flip - flop , 152 , one 2 - input multiplexer , 154 and one and gate , 156 . two kinds of clock signals need to be generated . the first is a lower frequency clock signal used when writing the data into the parallel syncfifos . in this case , the clksel 158 is high ( 1 ) and the output of the multiplexer 154 is the same as the strobe signal 160 . when the clken -- signal is enabled ( low 0 ), the output of the clock generation circuit 164 is equal to the strobe signal 160 , i . e . low frequency clock . the other clock signal is a high frequency clock used when the parallel syncfifos are outputting the data . in this case , the clksel 158 is low ( 0 ) and output of multiplexer 154 is the same as original clock source , either the external source 144 or the internal source 142 . when the clken -- signal 162 is enabled ( low , 0 ), the output of the clock generation circuit 164 is equal to the original clock source , i . e . high frequency clock . in either case , as long as the clken -- signal 162 is disabled ( high , 1 ), the output of the clock generation circuit 164 is low ( 0 ). to assure the same clock signal controlling all fifo boards 56 , there should be only one clock source from a master buffer board 54 ( either internal or external ). all the other buffer boards 54 ( slave buffer boards ) receive the clock signal from the master board 54 . a switch 166 on each buffer board allows the user to specify the board as a master or slave board . six 8 - bit buffers 168 , 170 , 172 , 174 , 176 and 178 are provided on the buffer board 54 . one , 168 , buffers the clock signal exclusively while the others , 172 , 174 , 176 and 178 , buffer the 32 - bit data bus and one , 170 , buffers the modified control bus , oe -- , rs -- , ren -- , wen -- , a6 , a7 , fbctrl -- and plsctrl -- . a6 and a7 originate from the address bus and are used as control lines for the fifo boards 56 . the fifo boards 56 are generally responsible for waveform generation and each board is constructed to generate 32 channels of square wave with specified phases and magnitudes ( duty cycles ). each channel , after being amplified and matched to the impedance of its corresponding array transducer 20 , will drive that particular transducer 20 of the array 16 . the specified phase and magnitude data are stored in the parallel syncfifos and each square wave is generated by repeatedly reading this data from the parallel syncfifos . referring now to fig6 each fifo board 56 consists of four 512 × 8 - bit parallel syncfifos , 180 , 182 , 184 and 186 , with four 8 - bit input buffers , 188 , 190 , 192 and 194 and four 8 - bit output latches , 196 , 198 , 200 and 202 , some control logic and some feedback logic . the control logic is made up of four 2 - input nand gates , 204 , 206 , 208 and 210 , and two 8 - bit latches , 212 and 214 . a6 , mentioned above , serves as a control line to control the output -- enable of the four 8 - bit input buffers , 188 , 190 , 192 and 194 , i . e . when a6 is high ( 1 ) and the board -- enable line 216 is enabled ( low , 0 ), the output -- enables of the four input buffers 188 , 190 , 192 and 194 are activated ( low , 0 ) so that data can flow into the buffers . when a6 is low ( 0 ), the output -- enable of the four input buffers 188 , 190 , 192 and 194 are inactivated and data cannot flow into the buffers . a7 , mentioned above , serves as an all channel control line . this is used when finishing writing data into all the parallel syncfifos 180 , 182 , 184 and 186 and all the parallel syncfifos 180 , 182 , 184 and 186 need to start outputting data at the same time . when writing data into a particular board , its board -- enable line 216 is activated ( low , 0 ) and a7 has no effect regardless of its status . when all parallel syncfifos 180 , 182 , 184 and 186 start outputting data at the same time , all the board -- enable lines 216 are inactivated ( high , 1 ) and a7 is low ( 0 ) so that the control bus latch 212 on each fifo board 56 is selected and all the parallel syncfifos 180 , 182 , 184 and 186 are acting the same . the core of each fifo board 56 includes the four 512 × 8 - bit parallel syncfifos , 180 , 182 , 184 and 186 ; the four 8 - bit input buffers , 188 , 190 , 192 and 194 ; and the four 8 - bit output latches 196 , 198 , 200 and 202 , which cooperate to generate 32 channels of square waves , simultaneously . the input buffers 188 , 190 , 192 and 194 buffer the data prior to the parallel syncfifos 180 , 182 , 184 and 186 and output latches 196 , 198 , 200 and 202 latch the output data from the parallel syncfifos 180 , 182 , 184 and 186 . each output bit of a parallel syncfifo makes one channel of square wave and every fl words makes a complete waveform ( log 2 fl - bit resolution ), where the number fl ( fifo length ), is related to the frequency of the square waves by the following formula : where 48 mhz is the frequency of the original clock source from the buffer board 54 . accordingly , the frequency of the square waves can be changed by either changing the frequency of the original clock source or the number fl . it should be noted that the number fl should not be less than 32 in order to guarantee no less than 5 - bit resolution and should not be greater than 512 , which is the total depth of the fifo boards . the value of number fl is specified so that , using 48 mhz as the original clock source , the frequency range of the square waves generated is 93 . 75 khz to 1 . 5 mhz . the square waves are generated as follows . first , write one complete waveform with specified phases and amplitudes into the four parallel syncfifo 180 , 182 , 184 and 186 on board # 0 , i . e . fl words . at this moment , the write -- pointer of the each parallel syncfifo is located fl while the read -- pointer remains at location 0 . second , do the same procedure for all the other boards until the parallel syncfifos on each fifo board 56 is written in one complete waveform . third , start all channel control action ( all board -- enable lines 214 high , a7 low ) and let all fifos 56 start synchronous reading and writing so the fifos 56 repeat reading and writing the same waveform data and output continuous square waves . feedback logic is used as a self - test circuit for fifo boards 56 . prior to using the fifo boards , data is written into the parallel syncfifos 180 , 182 , 184 and 186 and , by checking the internal feedback signals , we can tell if the fifo boards 56 are properly functioning . the feedback logic includes four 8 - input nand gates , 218 , 220 , 222 , 224 , 32 pull - up resistors 228 through 292 and one feedback buffer , 294 . each nand gate inputs , through nine corresponding output latches , the outputs of each parallel syncfifo to the feedback buffer 294 . by initially writing all 1 &# 39 ; s into the parallel syncfifos 180 , 182 , 184 and 186 , if the feedback signals are 0 , it means that the fifo boards 56 are working properly . the digital subsystem needs only a + 5 v power supply 58 . the output square wave has a magnitude ( note : this is different from the duty cycle ) of 5 v and a wide frequency range . the analog subsystem contains the amplifier boards 60 and the matching boards 62 , which respectively amplify the square waves generated by the digital subsystem and match them to the impedance of the array &# 39 ; s individual transducers 20 . each amplifier board 62 , as seen in fig7 contains the power drivers 296 and 298 , as well as shod circuit protection circuit 300 , and each board drives sixteen channels of the array 16 . the output of the boards 62 is driven by a pair of n - channel mosfets irf510 transistors 296 and 298 . in case a short circuit occurs ( on or beyond the amplifier output ), a short circuit protection circuit 300 cuts the main dc supply 66 current ( to the corresponding pair of channels ) to a low ( i . e . safe ) level . there are eight of these protection circuits for the sixteen channels . also , an leds on the backplane board can be provided to light up , indicating a short circuit presence on the corresponding amplifier board &# 39 ; s output . depending on the maximum supply voltage that the circuit will have to work under , two resistors are 302 and 304 accordingly provided . the maximum voltage must be established such that a amplifier board 62 will supply 10 watts ( or less ) per transducer 20 ( on average ) at the maximum voltage per the table below : ______________________________________max . volt . r1 ( 302 ) rp ( 304 ) ______________________________________40 82 k 2 . 7 k , 3 w50 120 k 3 . 3 k , 3 w60 270 k 4 k , 3 w70 680 k 5 . 6 k , 3 w______________________________________ the circuitry of the amplifier boards 62 converts the transistor - transistor logic ( ttl ) level digital control signal to a level which is high enough to drive the piezoelectric transducers 20 of the array 16 . two opposite ttl signals 306 and 308 are the inputs to the mosfet driver 310 , which converts the signals into two opposite cmos level ( 0 - 15 v ) signals 313 and 314 . these signals drive the gates of the two mosfet power transistors 296 and 298 that compose the output stage of the amplifier circuit as a class e amplifier . in the class e amplifier , the two transistors 296 and 298 should not be allowed to be on simultaneously . if both transistors are on , an effective short circuit occurs between the dc power supply 66 and the ground , with only fractions of 1ω ( transistors drain - source on - state resistors ) in the way . this short circuit lowers the efficiency of the amplifier and heats up the transistors 296 and 298 . to prevent the simultaneous conduction , beside the fact that the inverted ttl signal 308 suffers some delay compared to the non - inverted one 306 , two other measures are taken . first , the mosfet drivers have a turn on delay that is 25 ns . longer than the turn off delay . the transistors turn off delay is & lt ; 25 ns . second , each gate of the transistors are driven through a parallel circuit of a diode 316 and 318 and a 20ω resistor 320 and 322 . accordingly , this circuit provides a one - way delay . the resistors 320 and 322 increase the rc time constant of the corresponding transistor gate , this causes some delay in the turn - on time , but does not effect the turn - off time due to the negligible forward resistance of the diodes 316 and 318 . heat sinks are used with the transistors 296 and 298 to help dissipating any excessive heat . short circuit protection in the amplifier boards 60 consist of a power p - n - p transistor 324 a small signal n - p - n transistor 326 and three resistors 302 , 304 and 328 . the p - n - p transistor 324 limits the main dc supply 66 current , which is always on under normal running conditions . the base current of the p - n - p transistor 324 is sunk through the collector of the n - p - n transistor 326 . when a short circuit occurs on or beyond the amplifier output , the p - n - p transistor 324 turns off , because the n - p - n transistor 326 cannot sink the required base current of the p - n - p transistor 324 . this current is controlled by power ( rp ) resistor 304 between the emitter of the n - p - n transistor 326 and the ground 330 . when a short circuit happens , a corresponding red light - emitting diode on the back panel board lights up . matching boards 64 are coupled between the amplifier boards 62 and the array 16 . the matching boards 64 are used to match the impedance of the transducers 20 with their respective square wave signals . since the impedance of transducers 20 has capacitance part , the matching boards 64 are designated to have inductance part . this is so that the overall impedance of the load to amplifiers tends to pure resistance . each matching board 64 has sixteen channels and the basic circuit 70 for each channel is as shown in fig8 . the circuit 332 is made up of a 0 . 1μ , 100 v capacitor 334 , a custom - wound inductor 336 and a custom - wound transformer 338 . the primary - to - secondary ratio of the transformer 338 is decided according to the impedance of the transducers 20 . once the transformer 338 has been chosen , user can adjust the turns of the indicator to make best match . in the presently described system , the ratio of the transformers was 1 : 2 to 1 : 4 . while the above description constitutes the preferred embodiment of the present invention , it will be appreciated that the invention is susceptible to modification , variation and change without departing from the proper scope and fair meaning of the accompanying claims .
an ultrasound system and method for performing relatively non - invasive cardiac ablation on a patient . the system of the present invention includes a plurality of ultrasound transducers forming a phased array that is to be located externally of the patient . the array a focused beam of sufficient energy to ablate a predetermined cardiac tissue volume . the system is capable of refocusing the beam so that acoustical aberrations encountered by the beam , as it is transmitted through inhomogeneous body tissues between the array and the treatment volume , are taken into account and will not impede operation of the system . to refocus the beam , the system includes a senor which senses the phase distribution caused by the aberrations allowing a controller to calculate a compensating driving phase distribution and accordingly drive the array . the system also allows for real time correction of the beam &# 39 ; s position enabling the beam to follow a moving myocardial target volume .