memcpy(&hal->ah_capabilities.cap_regdomain.reg_hw, &ieee_regdomain, sizeof(ieee80211_regdomain_t));
hal->ah_capabilities.cap_regdomain.reg_hw = ieee_regdomain;
ath_hal_attach(device, sc, st, sh, status)	u_int16_t device;	void *sc;	bus_space_tag_t st;	bus_space_handle_t sh;	int *status;{	ieee80211_regdomain_t ieee_regdomain;	HAL_RATE_TABLE rt_11a = AR5K_RATES_11A;	HAL_RATE_TABLE rt_11b = AR5K_RATES_11B;	HAL_RATE_TABLE rt_11g = AR5K_RATES_11G;	HAL_RATE_TABLE rt_turbo = AR5K_RATES_TURBO;	u_int16_t regdomain;	struct ath_hal *hal = NULL;	ar5k_attach_t *attach = NULL;	u_int8_t mac[IEEE80211_ADDR_LEN];	int i;	*status = EINVAL;	/*	 * Call the chipset-dependent attach routine by device id	 */	for (i = 0; i < AR5K_ELEMENTS(ar5k_known_products); i++) {		if (device == ar5k_known_products[i].device &&		    ar5k_known_products[i].attach != NULL)			attach = ar5k_known_products[i].attach;	}	if (attach == NULL) {		*status = ENXIO;		AR5K_PRINTF("device not supported: 0x%04x\n", device);		return (NULL);	}        if ((hal = malloc(sizeof(struct ath_hal),		 M_DEVBUF, M_NOWAIT)) == NULL) {		*status = ENOMEM;		AR5K_PRINT("out of memory\n");		return (NULL);	}	bzero(hal, sizeof(struct ath_hal));	hal->ah_sc = sc;	hal->ah_st = st;	hal->ah_sh = sh;	hal->ah_device = device;	hal->ah_sub_vendor = 0; /* XXX unknown?! */	/*	 * HAL information	 */	hal->ah_abi = HAL_ABI_VERSION;	hal->ah_country_code = CTRY_DEFAULT;	hal->ah_capabilities.cap_regdomain.reg_current = AR5K_TUNE_REGDOMAIN;	hal->ah_op_mode = HAL_M_STA;	hal->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;	hal->ah_turbo = AH_FALSE;	hal->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;	hal->ah_txpower.txp_max = AR5K_TUNE_MAX_TXPOWER;	hal->ah_imr = 0;	hal->ah_atim_window = 0;	hal->ah_aifs = AR5K_TUNE_AIFS;	hal->ah_cw_min = AR5K_TUNE_CWMIN;	hal->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;	hal->ah_software_retry = AH_FALSE;	hal->ah_ant_diversity = AR5K_TUNE_ANT_DIVERSITY;	if (attach(device, hal, st, sh, status) == NULL)		goto failed;	/*	 * Get card capabilities, values, ...	 */ 	if (ar5k_eeprom_init(hal) != 0) { 		AR5K_PRINT("unable to init EEPROM\n"); 		goto failed; 	}	/* Set regulation domain */	if ((regdomain =	    (u_int16_t)hal->ah_capabilities.cap_eeprom.ee_regdomain) != 0) {		ieee_regdomain = *ar5k_regdomain_to_ieee(regdomain);		memcpy(&hal->ah_capabilities.cap_regdomain.reg_current,		    &ieee_regdomain, sizeof(ieee80211_regdomain_t));	} else {		ieee_regdomain =		    hal->ah_capabilities.cap_regdomain.reg_current;		/* Try to write default regulation domain to EEPROM */ 		ar5k_eeprom_regulation_domain(hal, AH_TRUE, &ieee_regdomain);	}	memcpy(&hal->ah_capabilities.cap_regdomain.reg_hw,	    &ieee_regdomain, sizeof(ieee80211_regdomain_t));	/* Get misc capabilities */	if (hal->ah_get_capabilities(hal) != AH_TRUE) {		AR5K_PRINTF("unable to get device capabilities: 0x%04x\n",		    device);		goto failed;	}	/* Get MAC address */	if ((*status = ar5k_eeprom_read_mac(hal, mac)) != HAL_OK) {		AR5K_PRINTF("unable to read address from EEPROM: 0x%04x\n",		    device);		goto failed;	}	hal->ah_setMacAddress(hal, mac);	/* Get rate tables */	if (hal->ah_capabilities.cap_mode & HAL_MODE_11A)		ar5k_rt_copy(&hal->ah_rt_11a, &rt_11a);	if (hal->ah_capabilities.cap_mode & HAL_MODE_11B)		ar5k_rt_copy(&hal->ah_rt_11b, &rt_11b);	if (hal->ah_capabilities.cap_mode & HAL_MODE_11G)		ar5k_rt_copy(&hal->ah_rt_11g, &rt_11g);	if (hal->ah_capabilities.cap_mode & HAL_MODE_TURBO)		ar5k_rt_copy(&hal->ah_rt_turbo, &rt_turbo);	*status = HAL_OK;	return (hal); failed:	free(hal, M_DEVBUF);	return (NULL);}