sec = subseg_new (".reginfo", (subsegT) 0);   (void) bfd_set_section_flags (stdoutput, sec, (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_DATA)); (void) bfd_set_section_alignment (stdoutput, sec, 2);
if (! mips_64) { sec = subseg_new (".reginfo", (subsegT) 0);   (void) bfd_set_section_flags (stdoutput, sec, (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_DATA)); (void) bfd_set_section_alignment (stdoutput, sec, 2);
md_begin (){  boolean ok = false;  register const char *retval = NULL;  register unsigned int i = 0;  if (mips_isa == -1)    {      const char *cpu;      char *a = NULL;      cpu = TARGET_CPU;      if (strcmp (cpu + (sizeof TARGET_CPU) - 3, "el") == 0)	{	  a = xmalloc (sizeof TARGET_CPU);	  strcpy (a, TARGET_CPU);	  a[(sizeof TARGET_CPU) - 3] = '\0';	  cpu = a;	}      if (strcmp (cpu, "mips") == 0)	{	  mips_isa = 1;	  if (mips_cpu == -1)	    mips_cpu = 3000;	}      else if (strcmp (cpu, "r6000") == 0	       || strcmp (cpu, "mips2") == 0)	{	  mips_isa = 2;	  if (mips_cpu == -1)	    mips_cpu = 6000;	}      else if (strcmp (cpu, "mips64") == 0	       || strcmp (cpu, "r4000") == 0	       || strcmp (cpu, "mips3") == 0)	{	  mips_isa = 3;	  if (mips_cpu == -1)	    mips_cpu = 4000;	}      else if (strcmp (cpu, "r4400") == 0)	{	  mips_isa = 3;	  if (mips_cpu == -1)	    mips_cpu = 4400;	}      else if (strcmp (cpu, "mips64orion") == 0	       || strcmp (cpu, "r4600") == 0)	{	  mips_isa = 3;	  if (mips_cpu == -1)	    mips_cpu = 4600;	}      else if (strcmp (cpu, "r4650") == 0)	{	  mips_isa = 3;	  if (mips_cpu == -1)	    mips_cpu = 4650;	  if (mips_4650 == -1)	    mips_4650 = 1;	}      else if (strcmp (cpu, "mips64vr4300") == 0)	{	  mips_isa = 3;	  if (mips_cpu == -1)	    mips_cpu = 4300;	}      else if (strcmp (cpu, "mips64vr4100") == 0)        {          mips_isa = 3;          if (mips_cpu == -1)            mips_cpu = 4100;          if (mips_4100 == -1)            mips_4100 = 1;        }      else if (strcmp (cpu, "r4010") == 0)	{	  mips_isa = 2;	  if (mips_cpu == -1)	    mips_cpu = 4010;	  if (mips_4010 == -1)	    mips_4010 = 1;	}      else if (strcmp (cpu, "r8000") == 0	       || strcmp (cpu, "mips4") == 0)	{	  mips_isa = 4;	  if (mips_cpu == -1)	    mips_cpu = 8000;	}      else if (strcmp (cpu, "r10000") == 0)	{	  mips_isa = 4;	  if (mips_cpu == -1)	    mips_cpu = 10000;	}      else	{	  mips_isa = 1;	  if (mips_cpu == -1)	    mips_cpu = 3000;	}      if (a != NULL)	free (a);    }  if (mips_4650 < 0)    mips_4650 = 0;  if (mips_4010 < 0)    mips_4010 = 0;  if (mips_4100 < 0)    mips_4100 = 0;  if (mips_4650 || mips_4010 || mips_4100)    interlocks = 1;  else    interlocks = 0;  if (mips_isa < 2 && mips_trap)    as_bad ("trap exception not supported at ISA 1");  switch (mips_isa)    {    case 1:      ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 3000);      break;    case 2:      ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 6000);      break;    case 3:      ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 4000);      break;    case 4:      ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 8000);      break;    }  if (! ok)    as_warn ("Could not set architecture and machine");  file_mips_isa = mips_isa;  op_hash = hash_new ();  for (i = 0; i < NUMOPCODES;)    {      const char *name = mips_opcodes[i].name;      retval = hash_insert (op_hash, name, (PTR) &mips_opcodes[i]);      if (retval != NULL)	{	  fprintf (stderr, "internal error: can't hash `%s': %s\n",		   mips_opcodes[i].name, retval);	  as_fatal ("Broken assembler.  No assembly attempted.");	}      do	{	  if (mips_opcodes[i].pinfo != INSN_MACRO	      && ((mips_opcodes[i].match & mips_opcodes[i].mask)		  != mips_opcodes[i].match))	    {	      fprintf (stderr, "internal error: bad opcode: `%s' \"%s\"\n",		       mips_opcodes[i].name, mips_opcodes[i].args);	      as_fatal ("Broken assembler.  No assembly attempted.");	    }	  ++i;	}      while ((i < NUMOPCODES) && !strcmp (mips_opcodes[i].name, name));    }  mips_no_prev_insn ();  mips_gprmask = 0;  mips_cprmask[0] = 0;  mips_cprmask[1] = 0;  mips_cprmask[2] = 0;  mips_cprmask[3] = 0;  /* set the default alignment for the text section (2**2) */  record_alignment (text_section, 2);  if (USE_GLOBAL_POINTER_OPT)    bfd_set_gp_size (stdoutput, g_switch_value);  if (OUTPUT_FLAVOR == bfd_target_elf_flavour)    {      /* Sections must be aligned to 16 byte boundaries.  */      (void) bfd_set_section_alignment (stdoutput, text_section, 4);      (void) bfd_set_section_alignment (stdoutput, data_section, 4);      (void) bfd_set_section_alignment (stdoutput, bss_section, 4);      /* Create a .reginfo section for register masks and a .mdebug	 section for debugging information.  */      {	segT seg;	subsegT subseg;	segT sec;	seg = now_seg;	subseg = now_subseg;	sec = subseg_new (".reginfo", (subsegT) 0);	/* The ABI says this section should be loaded so that the	   running program can access it.  */	(void) bfd_set_section_flags (stdoutput, sec,				      (SEC_ALLOC | SEC_LOAD				       | SEC_READONLY | SEC_DATA));	(void) bfd_set_section_alignment (stdoutput, sec, 2);#ifdef OBJ_ELF	mips_regmask_frag = frag_more (sizeof (Elf32_External_RegInfo));#endif	if (ECOFF_DEBUGGING)	  {	    sec = subseg_new (".mdebug", (subsegT) 0);	    (void) bfd_set_section_flags (stdoutput, sec,					  SEC_HAS_CONTENTS | SEC_READONLY);	    (void) bfd_set_section_alignment (stdoutput, sec, 2);	  }	subseg_set (seg, subseg);      }    }  if (! ECOFF_DEBUGGING)    md_obj_begin ();}