dprintf(("dartattach: resetting port A\n"));
dprintf(("\ndartattach: resetting port A\n"));
dartattach(parent, self, aux)struct device *parent;struct device *self;void *aux;{	struct dartsoftc *sc = (struct dartsoftc *)self;	struct confargs *ca = aux;	int i;	union dartreg *addr; /* pointer to DUART regs */	union dart_pt_io *ptaddr; /* pointer to port regs */	int port;	/* port index */	/* set up dual port memory and registers and init*/	sc->dart_reg = (union dartreg *)ca->ca_vaddr;	sc->sc_ipl = ca->ca_ipl = IPL_TTY; /* always... hard coded ipl */	ca->ca_vec = SYSCV_SCC;	/* hard coded vector */	sc->sc_vec = ca->ca_vec; 	addr = sc->dart_reg;	/* save standard initialization */	dart_sv_reg.sv_mr1[A_PORT] = PARDIS | RXRTS | CL8;	dart_sv_reg.sv_mr2[A_PORT] = /* TXCTS | */ SB1;	dart_sv_reg.sv_csr[A_PORT] = BD9600;	dart_sv_reg.sv_cr[A_PORT]  = TXEN | RXEN;	dart_sv_reg.sv_mr1[B_PORT] = PARDIS | RXRTS | CL8;	dart_sv_reg.sv_mr2[B_PORT] = /* TXCTS | */ SB1;	dart_sv_reg.sv_csr[B_PORT] = BD9600;	dart_sv_reg.sv_cr[B_PORT]  = TXEN | RXEN;	dart_sv_reg.sv_acr  = BDSET2 | CCLK16 | IPDCDIB | IPDCDIA;	/* Start out with Tx and RX interrupts disabled */	/* Enable input port change interrupt */	dart_sv_reg.sv_imr  = IIPCHG;	dprintf(("dartattach: resetting port A\n"));	/* reset port a */	addr->write.wr_cra  = RXRESET     | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_cra  = TXRESET     | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_cra  = ERRRESET    | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_cra  = BRKINTRESET | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_cra  = MRRESET     | TXDIS | RXDIS;	dprintf(("dartattach: resetting port B\n"));	/* reset port b */	addr->write.wr_crb  = RXRESET     | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_crb  = TXRESET     | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_crb  = ERRRESET    | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_crb  = BRKINTRESET | TXDIS | RXDIS;	DELAY_CR;	addr->write.wr_crb  = MRRESET     | TXDIS | RXDIS;	DELAY_CR;	/* initialize ports */	for (port = 0, ptaddr = (union dart_pt_io *)addr;	    port < MAXPORTS;	    port++, ptaddr++) {		dprintf(("dartattach: init port %c\n", 'A' + port));		ptaddr->write.wr_mr  = dart_sv_reg.sv_mr1[port];		ptaddr->write.wr_mr  = dart_sv_reg.sv_mr2[port];		ptaddr->write.wr_csr = dart_sv_reg.sv_csr[port];		ptaddr->write.wr_cr  = dart_sv_reg.sv_cr [port];	}	dprintf(("dartattach: init common regs\n"));	/* initialize common register of a DUART */	addr->write.wr_oprset = OPDTRA | OPRTSA | OPDTRB | OPRTSB;	addr->write.wr_ctur  = SLCTIM>>8;	addr->write.wr_ctlr  = SLCTIM & 0xFF;	addr->write.wr_acr  = dart_sv_reg.sv_acr;	addr->write.wr_imr  = dart_sv_reg.sv_imr;	addr->write.wr_opcr = OPSET;	addr->write.wr_ivr = sc->sc_vec;	/* enable interrupts */	sc->sc_ih.ih_fn = dartintr;	sc->sc_ih.ih_arg = sc;	sc->sc_ih.ih_ipl = ca->ca_ipl;	sc->sc_ih.ih_wantframe = 0;	intr_establish(ca->ca_vec, &sc->sc_ih);	evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);	printf("\n");}