if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA) sc->sc_wdcdev.UDMA_cap = 2; sc->sc_wdcdev.set_modes = sis_setup_channel;
sis_chip_map(sc, pa)	struct pciide_softc *sc;	struct pci_attach_args *pa;{	struct pciide_channel *cp;	int channel;	u_int8_t sis_ctr0 = pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_CTRL0);	pcireg_t interface = PCI_INTERFACE(pa->pa_class);	pcireg_t rev = PCI_REVISION(pa->pa_class);	bus_size_t cmdsize, ctlsize;	pcitag_t pchb_tag;	pcireg_t pchb_id, pchb_class;	if (pciide_chipen(sc, pa) == 0)		return;	printf(": DMA");	pciide_mapreg_dma(sc, pa);	/* get a PCI tag for the host bridge (function 0 of the same device) */	pchb_tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 0);	/* and read ID and rev of the ISA bridge */	pchb_id = pci_conf_read(sc->sc_pc, pchb_tag, PCI_ID_REG);	pchb_class = pci_conf_read(sc->sc_pc, pchb_tag, PCI_CLASS_REG);	sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |	    WDC_CAPABILITY_MODE;	if (sc->sc_dma_ok) {		sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;		sc->sc_wdcdev.irqack = pciide_irqack;		/*		 * controllers with rev > 0xd0 support UDMA 2 at least		 * controllers associated to a rev 0x2 530 Host to PCI Bridge		 * have problems with UDMA		 */		if (rev >= 0xd0 &&		    (PCI_PRODUCT(pchb_id) != PCI_PRODUCT_SIS_530 ||		    PCI_REVISION(pchb_class) >= 0x03))			sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;	}	sc->sc_wdcdev.PIO_cap = 4;	sc->sc_wdcdev.DMA_cap = 2;	if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA)		sc->sc_wdcdev.UDMA_cap = 2;	sc->sc_wdcdev.set_modes = sis_setup_channel;	sc->sc_wdcdev.channels = sc->wdc_chanarray;	sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;	pciide_print_channels(sc->sc_wdcdev.nchannels, interface);	pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_MISC,	    pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_MISC) |	    SIS_MISC_TIM_SEL | SIS_MISC_FIFO_SIZE);	for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {		cp = &sc->pciide_channels[channel];		if (pciide_chansetup(sc, channel, interface) == 0)			continue;		if ((channel == 0 && (sis_ctr0 & SIS_CTRL0_CHAN0_EN) == 0) ||	 	    (channel == 1 && (sis_ctr0 & SIS_CTRL0_CHAN1_EN) == 0)) {			printf("%s: %s ignored (disabled)\n",			    sc->sc_wdcdev.sc_dev.dv_xname, cp->name);			continue;		}		pciide_map_compat_intr(pa, cp, channel, interface);		if (cp->hw_ok == 0)			continue;		pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,		    pciide_pci_intr);		if (cp->hw_ok == 0) {			pciide_unmap_compat_intr(pa, cp, channel, interface);			continue;		}		if (pciide_chan_candisable(cp)) {			if (channel == 0)				sis_ctr0 &= ~SIS_CTRL0_CHAN0_EN;			else				sis_ctr0 &= ~SIS_CTRL0_CHAN1_EN;			pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_CTRL0,			    sis_ctr0);		}		if (cp->hw_ok == 0) {			pciide_unmap_compat_intr(pa, cp, channel, interface);			continue;		}		sis_setup_channel(&cp->wdc_channel);	}}