s = splimp();
s = splnet();
int ste_mii_writereg(sc, frame)	struct ste_softc		*sc;	struct ste_mii_frame	*frame;	{	int			s;	s = splimp();	/*	 * Set up frame for TX.	 */	frame->mii_stdelim = STE_MII_STARTDELIM;	frame->mii_opcode = STE_MII_WRITEOP;	frame->mii_turnaround = STE_MII_TURNAROUND;		/* 	 * Turn on data output.	 */	MII_SET(STE_PHYCTL_MDIR);	ste_mii_sync(sc);	ste_mii_send(sc, frame->mii_stdelim, 2);	ste_mii_send(sc, frame->mii_opcode, 2);	ste_mii_send(sc, frame->mii_phyaddr, 5);	ste_mii_send(sc, frame->mii_regaddr, 5);	ste_mii_send(sc, frame->mii_turnaround, 2);	ste_mii_send(sc, frame->mii_data, 16);	/* Idle bit. */	MII_SET(STE_PHYCTL_MCLK);	DELAY(1);	MII_CLR(STE_PHYCTL_MCLK);	DELAY(1);	/*	 * Turn off xmit.	 */	MII_CLR(STE_PHYCTL_MDIR);	splx(s);	return(0);}