-many			generate code for any architecture (PWR/PWRX/PPC)\n");
-many			generate code for any architecture (PWR/PWRX/PPC)\n\ -mregnames		Allow symbolic names for registers\n\ -mno-regnames		Do not allow symbolic names for registers\n");
md_show_usage (stream)     FILE *stream;{  fprintf(stream, "\PowerPC options:\n\-u			ignored\n\-mpwrx, -mpwr2		generate code for IBM POWER/2 (RIOS2)\n\-mpwr			generate code for IBM POWER (RIOS1)\n\-m601			generate code for Motorola PowerPC 601\n\-mppc, -mppc32, -m403, -m603, -m604\n\			generate code for Motorola PowerPC 603/604\n\-mppc64, -m620		generate code for Motorola PowerPC 620\n\-mcom			generate code Power/PowerPC common instructions\n\-many			generate code for any architecture (PWR/PWRX/PPC)\n");#ifdef OBJ_ELF  fprintf(stream, "\-mrelocatable		support for GCC's -mrelocatble option\n\-mrelocatable-lib	support for GCC's -mrelocatble-lib option\n\-memb			set PPC_EMB bit in ELF flags\n\-mlittle, -mlittle-endian\n\			generate code for a little endian machine\n\-mbig, -mbig-endian	generate code for a big endian machine\n\-V			print assembler version number\n\-Qy, -Qn		ignored\n");#endif}