s = splimp();
s = splnet();
int wb_mii_writereg(sc, frame)	struct wb_softc		*sc;	struct wb_mii_frame	*frame;	{	int			s;	s = splimp();	/*	 * Set up frame for TX.	 */	frame->mii_stdelim = WB_MII_STARTDELIM;	frame->mii_opcode = WB_MII_WRITEOP;	frame->mii_turnaround = WB_MII_TURNAROUND;		/* 	 * Turn on data output.	 */	SIO_SET(WB_SIO_MII_DIR);	wb_mii_sync(sc);	wb_mii_send(sc, frame->mii_stdelim, 2);	wb_mii_send(sc, frame->mii_opcode, 2);	wb_mii_send(sc, frame->mii_phyaddr, 5);	wb_mii_send(sc, frame->mii_regaddr, 5);	wb_mii_send(sc, frame->mii_turnaround, 2);	wb_mii_send(sc, frame->mii_data, 16);	/* Idle bit. */	SIO_SET(WB_SIO_MII_CLK);	DELAY(1);	SIO_CLR(WB_SIO_MII_CLK);	DELAY(1);	/*	 * Turn off xmit.	 */	SIO_CLR(WB_SIO_MII_DIR);	splx(s);	return(0);}