if (proctype != 0 && procvers < 2) {
if (proctype == 0 && procvers < 2) {
m8820x_cpu_configuration_print(int master){	struct m8820x_cmmu *cmmu;	int pid = read_processor_identification_register();	int proctype = (pid & 0xff00) >> 8;	int procvers = (pid & 0xe) >> 1;	int mmu, cnt, cpu = cpu_number();	struct simplelock print_lock;#ifdef M88200_HAS_SPLIT_ADDRESS	int aline, abit, amask;#endif	if (master)		simple_lock_init(&print_lock);	simple_lock(&print_lock);	printf("cpu%d: ", cpu);	if (proctype != 0) {		printf("unknown model arch 0x%x rev 0x%x\n",		    proctype, procvers);		simple_unlock(&print_lock);		return;	}	printf("M88100 rev 0x%x", procvers);#if 0	/* not useful yet */	if (max_cpus > 1)		printf(", %s", master ? "master" : "slave");#endif	printf(", %d CMMU", 1 << cmmu_shift);	mmu = cpu << cmmu_shift;	cmmu = m8820x_cmmu + mmu;	for (cnt = 1 << cmmu_shift; cnt != 0; cnt--, mmu++, cmmu++) {		int idr = cmmu->cmmu_regs[CMMU_IDR];		int mmuid = CMMU_TYPE(idr);		if (mmu % 2 == 0)			printf("\ncpu%d: ", cpu);		else			printf(", ");		if (mmutypes[mmuid][0] == 'U')			printf("unknown model id 0x%x", mmuid);		else			printf("%s", mmutypes[mmuid]);		printf(" rev 0x%x,", CMMU_VERSION(idr));#ifdef M88200_HAS_SPLIT_ADDRESS		/*		 * Print address lines		 */		amask = cmmu->cmmu_addr_mask;		if (amask != 0) {			aline = 0;			while (amask != 0) {				abit = ff1(amask);				if ((cmmu->cmmu_addr & (1 << abit)) != 0)					printf("%cA%02d",					    aline != 0 ? '/' : ' ', abit);				else					printf("%cA%02d*",					    aline != 0 ? '/' : ' ', abit);				amask ^= 1 << abit;			}		} else#endif			printf(" full");		printf(" %ccache", CMMU_MODE(mmu) == INST_CMMU ? 'I' : 'D');	}	printf("\n");#ifndef ERRATA__XXX_USR	{		static int errata_warn = 0;		if (proctype != 0 && procvers < 2) {			if (!errata_warn++)				printf("WARNING: M88100 bug workaround code "				    "not enabled.\nPlease recompile the kernel "				    "with option ERRATA__XXX_USR !\n");		}	}#endif	simple_unlock(&print_lock);}