bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC268_REG0, 0x0b); cable = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC268_REG1) & 0x04;
cable = pdc268_config_read(chp, 0x0b) & PDC268_CABLE;
pdc20268_setup_channel(chp)	struct channel_softc *chp;{	struct ata_drive_datas *drvp;	int drive, cable;	u_int32_t idedma_ctl;	struct pciide_channel *cp = (struct pciide_channel*)chp;	struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;	/* check 80 pins cable */	bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC268_REG0, 0x0b);	cable = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,	    PDC268_REG1) & 0x04;	/* setup DMA if needed */	pciide_channel_dma_setup(cp);	idedma_ctl = 0;		for (drive = 0; drive < 2; drive++) {		drvp = &chp->ch_drive[drive];		/* If no drive, skip */		if ((drvp->drive_flags & DRIVE) == 0)			continue;		if (drvp->drive_flags & DRIVE_UDMA) {			/* use Ultra/DMA */			drvp->drive_flags &= ~DRIVE_DMA;			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);			if (cable && drvp->UDMA_mode > 2)				drvp->UDMA_mode = 2;		} else if (drvp->drive_flags & DRIVE_DMA) {			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);		}	}	/* nothing to do to setup modes, the controller snoop SET_FEATURE cmd */	if (idedma_ctl != 0) {		/* Add software bits in status register */		bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,		    IDEDMA_CTL(chp->channel), idedma_ctl);	}	pciide_print_modes(cp);}