s = splimp();
s = splnet();
int sis_mii_writereg(sc, frame)	struct sis_softc	*sc;	struct sis_mii_frame	*frame;	{	int			s; 	s = splimp(); 	/* 	 * Set up frame for TX. 	 */  	frame->mii_stdelim = SIS_MII_STARTDELIM; 	frame->mii_opcode = SIS_MII_WRITEOP; 	frame->mii_turnaround = SIS_MII_TURNAROUND; 	 	/*  	 * Turn on data output. 	 */ 	SIO_SET(SIS_MII_DIR);  	sis_mii_sync(sc);  	sis_mii_send(sc, frame->mii_stdelim, 2); 	sis_mii_send(sc, frame->mii_opcode, 2); 	sis_mii_send(sc, frame->mii_phyaddr, 5); 	sis_mii_send(sc, frame->mii_regaddr, 5); 	sis_mii_send(sc, frame->mii_turnaround, 2); 	sis_mii_send(sc, frame->mii_data, 16);  	/* Idle bit. */ 	SIO_SET(SIS_MII_CLK); 	DELAY(1); 	SIO_CLR(SIS_MII_CLK); 	DELAY(1);  	/* 	 * Turn off xmit. 	 */ 	SIO_CLR(SIS_MII_DIR);  	splx(s);  	return(0);}