if((port = DART_PORT(dev)) > 1)
port = DART_PORT(dev); if (dart_cd.cd_ndevs == 0 || port > NDARTPORTS)
dartstart(tp)	struct tty *tp;{	dev_t dev;	struct dartsoftc *sc;	int s, cc;	union dart_pt_io *ptaddr;	union dartreg *addr;	int port;	int c;	dev = tp->t_dev;	if((port = DART_PORT(dev)) > 1)		return;		sc = (struct dartsoftc *) dart_cd.cd_devs[0];	addr = sc->dart_reg;	ptaddr = sc->port_reg[port];	if ((tp->t_state & TS_ISOPEN) == 0)		return;		s = spltty();		if (tp->t_state & (TS_TIMEOUT |TS_BUSY | TS_TTSTOP))		goto bail;		if (tp->t_outq.c_cc <= tp->t_lowat) {		if (tp->t_state & TS_ASLEEP) {			tp->t_state &= ~TS_ASLEEP;			wakeup((caddr_t)&tp->t_outq);		}		if (tp->t_outq.c_cc == 0)			goto bail;		selwakeup(&tp->t_wsel);	}	if (tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP))		goto bail;	dprintf(("dartstart: dev(%d, %d)\n", major(dev), minor(dev)));	if (port != dart_cons)		dprintf(("dartstart: ptaddr = 0x%08x from uart at 0x%08x\n",			 ptaddr, addr));	if (tp->t_outq.c_cc != 0) {		tp->t_state |= TS_BUSY;		cc = tp->t_outq.c_cc;		/* load transmitter until it is full */		while (ptaddr->read.rd_sr & TXRDY) {                        if(cc == 0)				 break;			c = getc(&tp->t_outq);			cc--;			if (tp->t_flags & CS8 || c <= 0177) {				if (port != dart_cons)					dprintf(("dartstart: writing char \"%c\" (0x%02x) to port %d\n",						 c & 0xff, c & 0xff, port));				ptaddr->write.wr_tb = c & 0xff;								if (port != dart_cons)					dprintf(("dartstart: enabling Tx int\n"));				if (port == A_PORT)					dart_sv_reg.sv_imr = dart_sv_reg.sv_imr | ITXRDYA;				else					dart_sv_reg.sv_imr = dart_sv_reg.sv_imr | ITXRDYB;				addr->write.wr_imr = dart_sv_reg.sv_imr;			} else {				tp->t_state &= ~TS_BUSY;				if (port != dart_cons)					dprintf(("dartxint: timing out char \"%c\" (0x%02x)\n",					 c & 0xff, c % 0xff));				timeout_add(&tp->t_rstrt_to, 1);				tp->t_state |= TS_TIMEOUT;			}		}	}bail:	splx(s);	return;}