append_insn (place, &insn, ep, r);
append_insn (place, &insn, ep, r, false);
macro_build (place, counter, ep, name, fmt, va_alist)     char *place;     int *counter;     expressionS *ep;     const char *name;     const char *fmt;     va_dcl#endif{  struct mips_cl_insn insn;  bfd_reloc_code_real_type r;  va_list args;#ifdef USE_STDARG  va_start (args, fmt);#else  va_start (args);#endif  /*   * If the macro is about to expand into a second instruction,   * print a warning if needed. We need to pass ip as a parameter   * to generate a better warning message here...   */  if (mips_warn_about_macros && place == NULL && *counter == 1)    as_warn ("Macro instruction expanded into multiple instructions");  if (place == NULL)    *counter += 1;		/* bump instruction counter */  r = BFD_RELOC_UNUSED;  insn.insn_mo = (struct mips_opcode *) hash_find (op_hash, name);  assert (insn.insn_mo);  assert (strcmp (name, insn.insn_mo->name) == 0);  while (strcmp (fmt, insn.insn_mo->args) != 0	 || insn.insn_mo->pinfo == INSN_MACRO	 || ((insn.insn_mo->pinfo & INSN_ISA) == INSN_ISA2	     && mips_isa < 2)	 || ((insn.insn_mo->pinfo & INSN_ISA) == INSN_ISA3	     && mips_isa < 3)	 || ((insn.insn_mo->pinfo & INSN_ISA) == INSN_ISA4	     && mips_isa < 4)	 || ((insn.insn_mo->pinfo & INSN_ISA) == INSN_4650	     && ! mips_4650)	 || ((insn.insn_mo->pinfo & INSN_ISA) == INSN_4010	     && ! mips_4010)	 || ((insn.insn_mo->pinfo & INSN_ISA) == INSN_4100	     && ! mips_4100))    {      ++insn.insn_mo;      assert (insn.insn_mo->name);      assert (strcmp (name, insn.insn_mo->name) == 0);    }  insn.insn_opcode = insn.insn_mo->match;  for (;;)    {      switch (*fmt++)	{	case '\0':	  break;	case ',':	case '(':	case ')':	  continue;	case 't':	case 'w':	case 'E':	  insn.insn_opcode |= va_arg (args, int) << 16;	  continue;	case 'c':	case 'T':	case 'W':	  insn.insn_opcode |= va_arg (args, int) << 16;	  continue;	case 'd':	case 'G':	  insn.insn_opcode |= va_arg (args, int) << 11;	  continue;	case 'V':	case 'S':	  insn.insn_opcode |= va_arg (args, int) << 11;	  continue;	case 'z':	  continue;	case '<':	  insn.insn_opcode |= va_arg (args, int) << 6;	  continue;	case 'D':	  insn.insn_opcode |= va_arg (args, int) << 6;	  continue;	case 'B':	  insn.insn_opcode |= va_arg (args, int) << 6;	  continue;	case 'b':	case 's':	case 'r':	case 'v':	  insn.insn_opcode |= va_arg (args, int) << 21;	  continue;	case 'i':	case 'j':	case 'o':	  r = (bfd_reloc_code_real_type) va_arg (args, int);	  assert (r == BFD_RELOC_MIPS_GPREL		  || r == BFD_RELOC_MIPS_LITERAL		  || r == BFD_RELOC_LO16		  || r == BFD_RELOC_MIPS_GOT16		  || r == BFD_RELOC_MIPS_CALL16		  || (ep->X_op == O_subtract		      && now_seg == text_section		      && r == BFD_RELOC_PCREL_LO16));	  continue;	case 'u':	  r = (bfd_reloc_code_real_type) va_arg (args, int);	  assert (ep != NULL		  && (ep->X_op == O_constant		      || (ep->X_op == O_symbol			  && (r == BFD_RELOC_HI16_S			      || r == BFD_RELOC_HI16))		      || (ep->X_op == O_subtract			  && now_seg == text_section			  && r == BFD_RELOC_PCREL_HI16_S)));	  if (ep->X_op == O_constant)	    {	      insn.insn_opcode |= (ep->X_add_number >> 16) & 0xffff;	      ep = NULL;	      r = BFD_RELOC_UNUSED;	    }	  continue;	case 'p':	  assert (ep != NULL);	  /*	   * This allows macro() to pass an immediate expression for	   * creating short branches without creating a symbol.	   * Note that the expression still might come from the assembly	   * input, in which case the value is not checked for range nor	   * is a relocation entry generated (yuck).	   */	  if (ep->X_op == O_constant)	    {	      insn.insn_opcode |= (ep->X_add_number >> 2) & 0xffff;	      ep = NULL;	    }	  else	    r = BFD_RELOC_16_PCREL_S2;	  continue;	case 'a':	  assert (ep != NULL);	  r = BFD_RELOC_MIPS_JMP;	  continue;	default:	  internalError ();	}      break;    }  va_end (args);  assert (r == BFD_RELOC_UNUSED ? ep == NULL : ep != NULL);  append_insn (place, &insn, ep, r);}