case CPU_187: case CPU_197: curspl = *int_mask_level;
case BRD_187: case BRD_197: curspl = *md.intr_mask;
spl(void){	unsigned curspl;	m88k_psr_type psr; /* proccessor status register */#ifdef MVME188	int cpu = 0;	/* prevent warning */#endif 	psr = disable_interrupts_return_psr();	switch (cputyp) {#ifdef MVME188	case CPU_188:		cpu = cpu_number();		curspl = m188_curspl[cpu];		break;#endif /* MVME188 */#if defined(MVME187) || defined(MVME197)	case CPU_187:	case CPU_197:		curspl = *int_mask_level;		break;#endif /* defined(MVME187) || defined(MVME197) */	}	set_psr(psr);	return curspl;}