cl->car = 0x00; cl->cor1 = 0x17;	 cl->cor2 = 0x00; cl->cor3 = 0x02;	 cl->cor4 = 0x00; cl->cor5 = 0x00; cl->cor6 = 0x00; cl->cor7 = 0x00; cl->schr1 = 0x00; cl->schr2 = 0x00; cl->schr3 = 0x00; cl->schr4 = 0x00; cl->scrl = 0x00; cl->scrh = 0x00; cl->lnxt = 0x00; cl->cpsr = 0x00; #else  #ifdef NOT_ALREADY_SETUP cd_base[CD2400_TFTC] = 0x10; cd_base[CD2400_TPR] = CL_TIMEOUT;  cd_base[CD2400_RPILR] = 0x03; cd_base[CD2400_TPILR] = 0x02; cd_base[CD2400_MPILR] = 0x01;   cd_base[CD2400_CAR] = 0x00; cd_base[CD2400_COR1] = 0x17;	 cd_base[CD2400_COR2] = 0x00; cd_base[CD2400_COR3] = 0x02;	 cd_base[CD2400_COR4] = 0x00; cd_base[CD2400_COR5] = 0x00; cd_base[CD2400_COR6] = 0x00; cd_base[CD2400_COR7] = 0x00; cd_base[CD2400_SCHR1] = 0x00; cd_base[CD2400_SCHR2] = 0x00; cd_base[CD2400_SCHR3] = 0x00; cd_base[CD2400_SCHR4] = 0x00; cd_base[CD2400_SCRl] = 0x00; cd_base[CD2400_SCRh] = 0x00; cd_base[CD2400_LNXT] = 0x00; cd_base[CD2400_CPSR] = 0x00;
cl_reg->cl_car   = 0x00; cl_reg->cl_cor1  = 0x17;	 cl_reg->cl_cor2  = 0x00; cl_reg->cl_cor3  = 0x02;	 cl_reg->cl_cor4  = 0x00; cl_reg->cl_cor5  = 0x00; cl_reg->cl_cor6  = 0x00; cl_reg->cl_cor7  = 0x00; cl_reg->cl_schr1 = 0x00; cl_reg->cl_schr2 = 0x00; cl_reg->cl_schr3 = 0x00; cl_reg->cl_schr4 = 0x00; cl_reg->cl_scrl  = 0x00; cl_reg->cl_scrh  = 0x00; cl_reg->cl_lnxt  = 0x00; cl_reg->cl_cpsr  = 0x00;
clcninit(cp)	struct consdev *cp;{#ifdef MAP_DOES_WORK	int size = (0x1ff + PGOFSET) & ~PGOFSET;	int pcc2_size = (0x3C + PGOFSET) & ~PGOFSET;#endif	volatile u_char *cd_base;		cl_cons.cl_paddr = (void *)0xfff45000;#ifdef MAP_DOES_WORK	cl_cons.cl_vaddr = mapiodev(cl_cons.cl_paddr, size);	cd_pcc2_base = mapiodev(0xfff42000, pcc2_size);#else	cl_cons.cl_vaddr = cl_cons.cl_paddr;	cl_cons.pcctwoaddr = (void *)0xfff42000;#endif	cd_base = cl_cons.cl_vaddr;	/* reset the chip? */#ifdef CLCD_DO_RESET#endif#ifdef NEW_CLCD_STRUCT	/* set up globals */	cl->tftc = 0x10;	cl->tpr = CL_TIMEOUT; /* is this correct?? */	cl->rpilr = 0x03;	cl->tpilr = 0x02;	cl->mpilr = 0x01;	/* set up the tty00 to be 9600 8N1 */	cl->car = 0x00;	cl->cor1 = 0x17;	/* No parity, ignore parity, 8 bit char */	cl->cor2 = 0x00;	cl->cor3 = 0x02;	/* 1 stop bit */	cl->cor4 = 0x00;	cl->cor5 = 0x00;	cl->cor6 = 0x00;	cl->cor7 = 0x00;	cl->schr1 = 0x00;	cl->schr2 = 0x00;	cl->schr3 = 0x00;	cl->schr4 = 0x00;	cl->scrl = 0x00;	cl->scrh = 0x00;	cl->lnxt = 0x00;	cl->cpsr = 0x00;#else	/* set up globals */#ifdef NOT_ALREADY_SETUP	cd_base[CD2400_TFTC] = 0x10;	cd_base[CD2400_TPR] = CL_TIMEOUT; /* is this correct?? */	cd_base[CD2400_RPILR] = 0x03;	cd_base[CD2400_TPILR] = 0x02;	cd_base[CD2400_MPILR] = 0x01;	/* set up the tty00 to be 9600 8N1 */	cd_base[CD2400_CAR] = 0x00;	cd_base[CD2400_COR1] = 0x17;	/* No parity, ignore parity, 8 bit char */	cd_base[CD2400_COR2] = 0x00;	cd_base[CD2400_COR3] = 0x02;	/* 1 stop bit */	cd_base[CD2400_COR4] = 0x00;	cd_base[CD2400_COR5] = 0x00;	cd_base[CD2400_COR6] = 0x00;	cd_base[CD2400_COR7] = 0x00;	cd_base[CD2400_SCHR1] = 0x00;	cd_base[CD2400_SCHR2] = 0x00;	cd_base[CD2400_SCHR3] = 0x00;	cd_base[CD2400_SCHR4] = 0x00;	cd_base[CD2400_SCRl] = 0x00;	cd_base[CD2400_SCRh] = 0x00;	cd_base[CD2400_LNXT] = 0x00;	cd_base[CD2400_CPSR] = 0x00;#endif#endif	return (0);}