int s;
u_int32_t cmd, hcr; int s, i;
ehci_power(int why, void *v){	ehci_softc_t *sc = v;	//u_int32_t ctl;	int s;#ifdef EHCI_DEBUG	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));	ehci_dump_regs(sc);#endif	s = splhardusb();	switch (why) {	case PWR_SUSPEND:	case PWR_STANDBY:		sc->sc_bus.use_polling++;#if 0OOO		ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;		if (sc->sc_control == 0) {			/*			 * Preserve register values, in case that APM BIOS			 * does not recover them.			 */			sc->sc_control = ctl;			sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);		}		ctl |= EHCI_HCFS_SUSPEND;		OWRITE4(sc, EHCI_CONTROL, ctl);#endif		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);		sc->sc_bus.use_polling--;		break;	case PWR_RESUME:		sc->sc_bus.use_polling++;#if 0OOO		/* Some broken BIOSes do not recover these values */		OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));		OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);		OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);		if (sc->sc_intre)			OWRITE4(sc, EHCI_INTERRUPT_ENABLE,				sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));		if (sc->sc_control)			ctl = sc->sc_control;		else			ctl = OREAD4(sc, EHCI_CONTROL);		ctl |= EHCI_HCFS_RESUME;		OWRITE4(sc, EHCI_CONTROL, ctl);		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);		ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;		OWRITE4(sc, EHCI_CONTROL, ctl);		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);		sc->sc_control = sc->sc_intre = 0;#endif		sc->sc_bus.use_polling--;		break;#if defined(__NetBSD__)	case PWR_SOFTSUSPEND:	case PWR_SOFTSTANDBY:	case PWR_SOFTRESUME:		break;#endif	}	splx(s);}