printf(": 274x ", ahc->sc_dev.dv_xname);
printf("%s: 274x ", ahc->sc_dev.dv_xname);
ahc_init(ahc)	struct ahc_softc *ahc;{	int iobase = ahc->sc_iobase;	u_char scsi_conf, sblkctl, i;	int intdef, max_targ = 16, wait;	/*	 * Assume we have a board at this stage	 * Find out the configured interupt and the card type.	 */#ifdef AHC_DEBUG	printf("%s: scb %d bytes; SCB_SIZE %d bytes, ahc_dma %d bytes\n",	    ahc->sc_dev.dv_xname, sizeof(struct ahc_scb), SCB_DOWN_SIZE,	    sizeof(struct ahc_dma_seg));#endif /* AHC_DEBUG */	/*printf("%s: reading board settings\n", ahc->sc_dev.dv_xname);/**/		/* Save the IRQ type before we do a chip reset */		ahc->unpause = (inb(HCNTRL + iobase) & IRQMS) | INTEN;	ahc->pause = ahc->unpause | PAUSE;	outb(HCNTRL + iobase, CHIPRST | ahc->pause);		/*	 * Ensure that the reset has finished	 */	wait = 1000;	while (wait--) {		delay(1000);		if (!(inb(HCNTRL + iobase) & CHIPRST))		    break;	}	if (wait == 0) {		printf("\n%s: WARNING - Failed chip reset!  "		       "Trying to initialize anyway.\n", ahc->sc_dev.dv_xname);		/* Forcibly clear CHIPRST */		outb(HCNTRL + iobase, ahc->pause);	}	switch (ahc->type) {	case AHC_274:		printf(": 274x ", ahc->sc_dev.dv_xname);		ahc->maxscbs = 0x4;		break;	case AHC_284:		printf(": 284x ", ahc->sc_dev.dv_xname);		ahc->maxscbs = 0x4;		break;	case AHC_AIC7870:	case AHC_294:		if (ahc->type == AHC_AIC7870)			printf(": aic7870 ", ahc->sc_dev.dv_xname);		else			printf(": 294x ", ahc->sc_dev.dv_xname);		ahc->maxscbs = 0x10;		#define DFTHRESH        3		outb(DSPCISTATUS + iobase, DFTHRESH << 6);		/*		 * XXX Hard coded SCSI ID until we can read it from the		 * SEEPROM or NVRAM.		 */		outb(HA_SCSICONF + iobase, 0x07 | (DFTHRESH << 6));		/* In case we are a wide card */		outb(HA_SCSICONF + 1 + iobase, 0x07);		break;	}		/* Determine channel configuration and who we are on the scsi bus. */	switch ((sblkctl = inb(SBLKCTL + iobase) & 0x0f)) {	case 0:		ahc->ahc_scsi_dev = (inb(HA_SCSICONF + iobase) & HSCSIID);		printf("Single Channel, SCSI Id=%d, ", ahc->ahc_scsi_dev);		outb(HA_FLAGS + iobase, SINGLE_BUS);		break;	case 2:		ahc->ahc_scsi_dev = (inb(HA_SCSICONF + 1 + iobase) & HWSCSIID);		printf("Wide Channel, SCSI Id=%d, ", ahc->ahc_scsi_dev);		ahc->type |= AHC_WIDE;		outb(HA_FLAGS + iobase, WIDE_BUS);		break;	case 8:		ahc->ahc_scsi_dev = (inb(HA_SCSICONF + iobase) & HSCSIID);		ahc->ahc_scsi_dev_b = (inb(HA_SCSICONF + 1 + iobase) & HSCSIID);		printf("Twin Channel, A SCSI Id=%d, B SCSI Id=%d, ",		    ahc->ahc_scsi_dev, ahc->ahc_scsi_dev_b);		ahc->type |= AHC_TWIN;		outb(HA_FLAGS + iobase, TWIN_BUS);		break;	default:		printf(" Unsupported adapter type.  %x Ignoring\n",sblkctl);		return(-1);	}	/*	 * Take the bus led out of diagnostic mode	 */	outb(SBLKCTL + iobase, sblkctl);	/*	 * Number of SCBs that will be used. Rev E aic7770s and	 * aic7870s have 16.  The rest have 4.	 */	if (!(ahc->type & AHC_AIC7870)) {		/*		 * See if we have a Rev E or higher		 * aic7770. Anything below a Rev E will		 * have a R/O autoflush disable configuration		 * bit.		 */		u_char sblkctl_orig;		sblkctl_orig = inb(SBLKCTL + iobase);		sblkctl = sblkctl_orig ^ AUTOFLUSHDIS;		outb(SBLKCTL + iobase, sblkctl);		sblkctl = inb(SBLKCTL + iobase);		if (sblkctl != sblkctl_orig) {			printf("aic7770 >= Rev E, ");			/*			 * Ensure autoflush is enabled			 */			sblkctl &= ~AUTOFLUSHDIS;			outb(SBLKCTL + iobase, sblkctl);		} else			printf("aic7770 <= Rev C, ");	} else		printf("aic7870, ");	printf("%d SCBs\n", ahc->maxscbs);		if (ahc->pause & IRQMS)		printf("%s: Using Level Sensitive Interrupts\n",		    ahc->sc_dev.dv_xname);	else		printf("%s: Using Edge Triggered Interrupts\n",		    ahc->sc_dev.dv_xname);		if (!(ahc->type & AHC_AIC7870)) {		/*		 * The 294x cards are PCI, so we get their interrupt from the		 * PCI BIOS.		 */		intdef = inb(INTDEF + iobase);		switch (intdef & 0xf) {		case 9:			ahc->sc_irq = 9;			break;		case 10:			ahc->sc_irq = 10;			break;		case 11:			ahc->sc_irq = 11;			break;		case 12:			ahc->sc_irq = 12;			break;		case 14:			ahc->sc_irq = 14;			break;		case 15:			ahc->sc_irq = 15;			break;		default:			printf("illegal irq setting\n");			return (EIO);		}	}		/* Set the SCSI Id, SXFRCTL1, and SIMODE1, for both channels */	if (ahc->type & AHC_TWIN) {		/*		 * The device is gated to channel B after a chip reset,		 * so set those values first		 */		outb(SCSIID + iobase, ahc->ahc_scsi_dev_b);		scsi_conf = inb(HA_SCSICONF + 1 + iobase) & (ENSPCHK|STIMESEL);		outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN);		outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIPERR);		/* Select Channel A */		outb(SBLKCTL + iobase, 0);	}	outb(SCSIID + iobase, ahc->ahc_scsi_dev);	scsi_conf = inb(HA_SCSICONF + iobase) & (ENSPCHK|STIMESEL);	outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN);	outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIPERR);		/*	 * Look at the information that board initialization or	 * the board bios has left us.  In the lower four bits of each	 * target's scratch space any value other than 0 indicates	 * that we should initiate syncronous transfers.  If it's zero,	 * the user or the BIOS has decided to disable syncronous	 * negotiation to that target so we don't activate the needsdr	 * flag.	 */	ahc->needsdtr_orig = 0;	ahc->needwdtr_orig = 0;	if (!(ahc->type & AHC_WIDE))		max_targ = 8;	for (i = 0; i < max_targ; i++) {		u_char target_settings = inb(HA_TARG_SCRATCH + i + iobase);#if 0 /* XXXX */		target_settings |= 0x8f;#endif		if (target_settings & 0x0f) {			ahc->needsdtr_orig |= (0x01 << i);			/* Default to a asyncronous transfers (0 offset) */			target_settings &= 0xf0;		}		if (target_settings & 0x80) {			ahc->needwdtr_orig |= (0x01 << i);			/*			 * We'll set the Wide flag when we			 * are successful with Wide negotiation,			 * so turn it off for now so we aren't			 * confused.			 */			target_settings &= 0x7f;		}		outb(HA_TARG_SCRATCH + i + iobase, target_settings);	}	/*	 * If we are not a WIDE device, forget WDTR.  This	 * makes the driver work on some cards that don't	 * leave these fields cleared when the BIOS is not	 * installed.	 */	if (!(ahc->type & AHC_WIDE))		ahc->needwdtr_orig = 0;	ahc->needsdtr = ahc->needsdtr_orig;	ahc->needwdtr = ahc->needwdtr_orig;	ahc->sdtrpending = 0;	ahc->wdtrpending = 0;	ahc->tagenable = 0;		/*	 * Clear the control byte for every SCB so that the sequencer	 * doesn't get confused and think that one of them is valid	 */	for (i = 0; i < ahc->maxscbs; i++) {		outb(SCBPTR + iobase, i);		outb(SCBARRAY + iobase, 0);	}#ifdef AHC_DEBUG	printf("NEEDSDTR == 0x%x\nNEEDWDTR == 0x%x\n", ahc->needsdtr,		ahc->needwdtr);#endif	/*	 * Set the number of availible SCBs	 */	outb(HA_SCBCOUNT + iobase, ahc->maxscbs);	/* We don't have any busy targets right now */	outb(HA_ACTIVE0 + iobase, 0);	outb(HA_ACTIVE1 + iobase, 0);		/* We don't have any waiting selections */	outb(WAITING_SCBH + iobase, SCB_LIST_NULL);	outb(WAITING_SCBT + iobase, SCB_LIST_NULL);	/*	 * Load the Sequencer program and Enable the adapter.	 * Place the aic7770 in fastmode which makes a big	 * difference when doing many small block transfers.	 */		printf("%s: Downloading Sequencer Program...", ahc->sc_dev.dv_xname);	ahc_loadseq(iobase);	printf("Done\n");		if (!(ahc->type & AHC_AIC7870))		outb(BCTL + iobase, ENABLE);		/* Reset the bus */	outb(SCSISEQ + iobase, SCSIRSTO);	delay(1000);	outb(SCSISEQ + iobase, 0);		RESTART_SEQUENCER(ahc);		return (0);}