p->p_addr->u_pcb.pcb_wcookie = 0;	   switch (p->p_addr->u_pcb.pcb_wcookie % 3) { case 0:  p->p_addr->u_pcb.pcb_wcookie |= 0x3; break; case 1:  p->p_addr->u_pcb.pcb_wcookie = 1 | (p->p_addr->u_pcb.pcb_wcookie & ~0x3); break; case 2:  p->p_addr->u_pcb.pcb_wcookie = 2 | (p->p_addr->u_pcb.pcb_wcookie & ~0x3); break; }
setregs(p, pack, stack, retval)	struct proc *p;	struct exec_package *pack;	u_long stack;	register_t *retval;{	struct trapframe *tf = p->p_md.md_tf;	struct fpstate *fs;	int psr;	/* Don't allow misaligned code by default */	p->p_md.md_flags &= ~MDP_FIXALIGN;	/*	 * The syscall will ``return'' to npc or %g7 or %g2; set them all.	 * Set the rest of the registers to 0 except for %o6 (stack pointer,	 * built in exec()) and psr (retain CWP and PSR_S bits).	 */	psr = tf->tf_psr & (PSR_S | PSR_CWP);	if ((fs = p->p_md.md_fpstate) != NULL) {		/*		 * We hold an FPU state.  If we own *the* FPU chip state		 * we must get rid of it, and the only way to do that is		 * to save it.  In any case, get rid of our FPU state.		 */		if (p == cpuinfo.fpproc) {			savefpstate(fs);			cpuinfo.fpproc = NULL;		}		free((void *)fs, M_SUBPROC);		p->p_md.md_fpstate = NULL;	}	bzero((caddr_t)tf, sizeof *tf);	tf->tf_psr = psr;	tf->tf_npc = pack->ep_entry & ~3;	tf->tf_global[1] = (int)PS_STRINGS;	tf->tf_global[2] = tf->tf_global[7] = tf->tf_npc;	stack -= sizeof(struct rwindow);	tf->tf_out[6] = stack;	retval[1] = 0;}