{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_PBC756_ISA,
{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_PBC756_PMC,
struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int));int	pciintr_bitmap_count_irq __P((int, int *));SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list;const struct pciintr_icu_table {	pci_vendor_id_t	piit_vendor;	pci_product_id_t piit_product;	int (*piit_init) __P((pci_chipset_tag_t,		bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *,		pciintr_icu_handle_t *));} pciintr_icu_table[] = {	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371MX,	  piix_init },	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371AB_ISA,	  piix_init },	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371FB_ISA,	  piix_init },	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371SB_ISA,	  piix_init },	{ PCI_VENDOR_INTEL,     PCI_PRODUCT_INTEL_82801AA_LPC,	  piix_init },	{ PCI_VENDOR_OPTI,	PCI_PRODUCT_OPTI_82C558,	  opti82c558_init },	{ PCI_VENDOR_OPTI,	PCI_PRODUCT_OPTI_82C700,	  opti82c700_init },	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C596A,	  via82c586_init, },	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C586_ISA,	  via82c586_init, },	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C686A_ISA,	  via82c586_init, },	{ PCI_VENDOR_SIS,	PCI_PRODUCT_SIS_85C503,	  sis85c503_init },	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_PBC756_ISA,	  amd756_init },	{ 0,			0,	  NULL },};const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t));const struct pciintr_icu_table *pciintr_icu_lookup(id)	pcireg_t id;{	const struct pciintr_icu_table *piit;	for (piit = pciintr_icu_table; piit->piit_init != NULL; piit++)		if (PCI_VENDOR(id) == piit->piit_vendor &&		    PCI_PRODUCT(id) == piit->piit_product)			return (piit);	return (NULL);}struct pciintr_link_map *pciintr_link_lookup(link)	int link;{	struct pciintr_link_map *l;	for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;	     l = SIMPLEQ_NEXT(l, list))		if (l->link == link)			return (l);	return (NULL);}static __inline struct pciintr_link_map *pciintr_link_alloc(pci_chipset_tag_t pc, struct pcibios_intr_routing *pir, int pin){	int link = pir->linkmap[pin].link, clink, irq;	struct pciintr_link_map *l, *lstart;	if (pciintr_icu_tag != NULL) {		/*		 * Get the canonical link value for this entry.		 */		if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle,		    link, &clink) != 0) {			/*			 * ICU doesn't understand the link value.			 * Just ignore this PIR entry.			 */			PCIBIOS_PRINTV(("pciintr_link_alloc: bus %d device %d: "			    "ignoring link 0x%02x\n", pir->bus,			    PIR_DEVFUNC_DEVICE(pir->device), link));			return (NULL);		}		/*		 * Check the link value by asking the ICU for the		 * canonical link value.		 * Also, determine if this PIRQ is mapped to an IRQ.		 */		if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle,		    clink, &irq) != 0) {			/*			 * ICU doesn't understand the canonical link value.			 * Just ignore this PIR entry.			 */			PCIBIOS_PRINTV(("pciintr_link_alloc: "			    "bus %d device %d link 0x%02x: "			    "ignoring PIRQ 0x%02x\n", pir->bus,			    PIR_DEVFUNC_DEVICE(pir->device), link, clink));			return (NULL);		}	}	if ((l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT)) == NULL)		return (NULL);	memset(l, 0, sizeof(*l));	l->link = link;	l->bitmap = pir->linkmap[pin].bitmap;	if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */		l->clink = clink;		l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */	} else {		l->clink = link;		l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;	}	lstart = SIMPLEQ_FIRST(&pciintr_link_map_list);	if (lstart == NULL || lstart->link < l->link)		SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list);	else		SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list);	return (l);}struct pcibios_intr_routing *pciintr_pir_lookup(bus, device)	int bus, device;{	struct pcibios_intr_routing *pir;	int entry;	if (pcibios_pir_table == NULL)		return (NULL);	for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {		pir = &pcibios_pir_table[entry];		if (pir->bus == bus &&		    PIR_DEVFUNC_DEVICE(pir->device) == device)			return (pir);	}	return (NULL);}