return (0);
return 0;
LIST_HEAD(xfer_free_list, wdc_xfer) xfer_free_list;int	wdcprobe	__P((struct device *, void *, void *));int	wdcprint	__P((void *, const char *));void	wdcattach	__P((struct device *, struct device *, void *));int	wdcintr		__P((void *));struct cfattach wdc_ca = {	sizeof(struct wdc_softc), wdcprobe, wdcattach};struct cfdriver wdc_cd = {	NULL, "wdc", DV_DULL};int	wdc_ata_intr	__P((struct wdc_softc *,struct wdc_xfer *));void	wdcstart	__P((struct wdc_softc *));void	wdc_ata_start	__P((struct wdc_softc *,struct wdc_xfer *));int	wait_for_phase	__P((struct wdc_softc *, int));int	wait_for_unphase __P((struct wdc_softc *, int));void	wdc_atapi_start	__P((struct wdc_softc *,struct wdc_xfer *));int	wdcreset	__P((struct wdc_softc *));void	wdcrestart	__P((void *arg));void	wdcunwedge	__P((struct wdc_softc *));void	wdctimeout	__P((void *arg));int	wdccontrol	__P((struct wd_link *));void	wdc_ata_done	__P((struct wdc_softc *, struct wdc_xfer *));void	wdc_free_xfer	__P((struct wdc_xfer *));void	wdcerror	__P((struct wdc_softc*, char *));void	wdcbit_bucket	__P(( struct wdc_softc *, int));int	wdc_atapi_intr	__P((struct wdc_softc *, struct wdc_xfer *));void	wdc_atapi_done	__P((struct wdc_softc *, struct wdc_xfer *));#ifdef ATAPI_DEBUGstatic int wdc_nxfer;#endif#ifdef WDDEBUG#define WDDEBUG_PRINT(args)	printf args#else#define WDDEBUG_PRINT(args)#endifintwdcprobe(parent, match, aux)	struct device *parent;	void *match, *aux;{	bus_space_tag_t iot;	bus_space_handle_t ioh;	struct wdc_softc *wdc = match;	struct isa_attach_args *ia = aux;#if NISADMA == 0	if (ia->ia_drq != DRQUNK) {		printf("cannot support dma wdc devices\n");		return 0;	}#endif	wdc->sc_iot = iot = ia->ia_iot;	if (bus_space_map(iot, ia->ia_iobase, 8, 0, &ioh))		return (0);	wdc->sc_ioh = ioh;	/* Check if we have registers that work. */	/* Error register not writable, */	bus_space_write_1(iot, ioh, wd_error, 0x5a);	/* but all of cyl_lo are. */	bus_space_write_1(iot, ioh, wd_cyl_lo, 0xa5);	if (bus_space_read_1(iot, ioh, wd_error) == 0x5a ||	    bus_space_read_1(iot, ioh, wd_cyl_lo) != 0xa5) {		/*		 * Test for a controller with no IDE master, just one		 * ATAPI device. Select drive 1, and try again.		 */		bus_space_write_1(iot, ioh, wd_sdh, WDSD_IBM | 0x10);		bus_space_write_1(iot, ioh, wd_error, 0x5a);		bus_space_write_1(iot, ioh, wd_cyl_lo, 0xa5);		if (bus_space_read_1(iot, ioh, wd_error) == 0x5a ||		    bus_space_read_1(iot, ioh, wd_cyl_lo) != 0xa5)			return 0;		wdc->sc_flags |= WDCF_ONESLAVE;	}	if (wdcreset(wdc) != 0) {		delay(500000);		if (wdcreset(wdc) != 0)			return 0;	}	/* Select drive 0 or ATAPI slave device */	if (wdc->sc_flags & WDCF_ONESLAVE)		bus_space_write_1(iot, ioh, wd_sdh, WDSD_IBM | 0x10);	else		bus_space_write_1(iot, ioh, wd_sdh, WDSD_IBM);	/* Wait for controller to become ready. */	if (wait_for_unbusy(wdc) < 0)		return 0;    	/* Start drive diagnostics. */	bus_space_write_1(iot, ioh, wd_command, WDCC_DIAGNOSE);	/* Wait for command to complete. */	if (wait_for_unbusy(wdc) < 0)		return 0;	ia->ia_iosize = 8;	ia->ia_msize = 0;	return 1;}