{ ERROR,	CORE,	KA,	KB,	MC,	XA,	CA }, { CORE,	CORE,	KA,	KB,	MC,	XA,	CA }, { KA,	KA,	KA,	KB,	MC,	XA,	ERROR }, { KB,	KB,	KB,	KB,	MC,	XA,	ERROR }, { MC,	MC,	MC,	MC,	MC,	XA,	ERROR }, { XA,	XA,	XA,	XA,	XA,	XA,	ERROR }, { CA,	CA,	ERROR,	ERROR,	ERROR,	ERROR,	CA },
{ ERROR,	CORE,	KA,	KB,	MC,	XA,	CA,	JX,	HX }, { CORE,	CORE,	KA,	KB,	MC,	XA,	CA,	JX,	HX }, { KA,	KA,	KA,	KB,	MC,	XA,	ERROR,	ERROR,	ERROR}, { KB,	KB,	KB,	KB,	MC,	XA,	ERROR, 	ERROR,	ERROR}, { MC,	MC,	MC,	MC,	MC,	XA,	ERROR,	ERROR,	ERROR}, { XA,	XA,	XA,	XA,	XA,	XA,	ERROR,	ERROR,	ERROR}, { CA,	CA,	ERROR,	ERROR,	ERROR,	ERROR,	CA,	ERROR,	ERROR}, { JX,	JX,	ERROR,	ERROR,	ERROR,	ERROR,	ERROR,  JX,	HX }, { HX,	HX,	ERROR,	ERROR,	ERROR,	ERROR,	ERROR,	HX,	HX },
compatible (a,b)     const bfd_arch_info_type *a;     const bfd_arch_info_type *b;{  /* The i960 has distinct subspecies which may not interbreed:	CORE CA          	CORE KA KB MC XA     Any architecture on the same line is compatible, the one on     the right is the least restrictive.            We represent this information in an array, each machine to a side */#define ERROR	0#define CORE	bfd_mach_i960_core  /*1*/  #define KA 	bfd_mach_i960_ka_sa /*2*/ #define KB 	bfd_mach_i960_kb_sb /*3*/#define MC 	bfd_mach_i960_mc    /*4*/#define XA 	bfd_mach_i960_xa    /*5*/#define CA 	bfd_mach_i960_ca    /*6*/#define MAX_ARCH ((int)CA)  static CONST unsigned long matrix[MAX_ARCH+1][MAX_ARCH+1] =     {      { ERROR,	CORE,	KA,	KB,	MC,	XA,	CA },      { CORE,	CORE,	KA,	KB,	MC,	XA,	CA },      { KA,	KA,	KA,	KB,	MC,	XA,	ERROR },      { KB,	KB,	KB,	KB,	MC,	XA,	ERROR },      { MC,	MC,	MC,	MC,	MC,	XA,	ERROR },      { XA,	XA,	XA,	XA,	XA,	XA,	ERROR },      { CA,	CA,	ERROR,	ERROR,	ERROR,	ERROR,	CA },    };  if (a->arch != b->arch || matrix[a->mach][b->mach] == ERROR)     {    return NULL;    }  else     {    return (a->mach  ==  matrix[a->mach][b->mach]) ?  a : b;    }}