mpc_ether_hw_addr(p) u_int8_t *p;
mpc_ether_hw_addr(p, b, s) u_int8_t *p, b, s;
mpc_ether_hw_addr(p)	u_int8_t *p;{	int i;	for(i = 0; i < 128; i++)		p[i] = 0x00;	p[18] = 0x03;	/* Srom version. */	p[19] = 0x01;	/* One chip. */	/* Next six, ethernet address. */	bcopy(ofw_eth_addr, &p[20], 6);	p[26] = 0x00;	/* Chip 0 device number */	p[27] = 30;		/* Descriptor offset */	p[28] = 00;	p[29] = 00;		/* MBZ */					/* Descriptor */	p[30] = 0x00;	/* Autosense. */	p[31] = 0x08;	p[32] = 0xff;	/* GP cntrl */	p[33] = 0x01;	/* Block cnt */#define GPR_LEN 0#define	RES_LEN 0	p[34] = 0x80 + 12 + GPR_LEN + RES_LEN;	p[35] = 0x01;	/* MII PHY type */	p[36] = 0x00;	/* PHY number 0 */	p[37] = 0x00;	/* GPR Length */	p[38] = 0x00;	/* Reset Length */	p[39] = 0x00;	/* Media capabilities */	p[40] = 0x78;	/* Media capabilities */	p[41] = 0x00;	/* Autoneg advertisment */	p[42] = 0x78;	/* Autoneg advertisment */	p[43] = 0x00;	/* Full duplex map */	p[44] = 0x50;	/* Full duplex map */	p[45] = 0x00;	/* Treshold map */	p[46] = 0x18;	/* Treshold map */	i = (srom_crc32(p, 126) & 0xFFFF) ^ 0xFFFF;	p[126] = i;	p[127] = i >> 8;	return(1);}