h = mx_calchash(etherbroadcastaddr);
h = mx_calchash(sc, (caddr_t)&etherbroadcastaddr);
void mx_setfilt(sc)	struct mx_softc		*sc;{	struct mx_desc		*sframe;	u_int32_t		h, *sp;	struct arpcom *ac = &sc->arpcom;	struct ether_multi *enm;	struct ether_multistep step;	struct ifnet		*ifp;	int			i;	ifp = &sc->arpcom.ac_if;	MX_CLRBIT(sc, MX_NETCFG, MX_NETCFG_TX_ON);	MX_SETBIT(sc, MX_ISR, MX_ISR_TX_IDLE);	sframe = &sc->mx_cdata.mx_sframe;	sp = (u_int32_t *)&sc->mx_cdata.mx_sbuf;	bzero((char *)sp, MX_SFRAME_LEN);	sframe->mx_next = vtophys(&sc->mx_ldata->mx_tx_list[0]);	sframe->mx_data = vtophys(&sc->mx_cdata.mx_sbuf);	sframe->mx_ctl = MX_SFRAME_LEN | MX_TXCTL_TLINK |			MX_TXCTL_SETUP | MX_FILTER_HASHPERF;	/* If we want promiscuous mode, set the allframes bit. */	if (ifp->if_flags & IFF_PROMISC)		MX_SETBIT(sc, MX_NETCFG, MX_NETCFG_RX_PROMISC);	else		MX_CLRBIT(sc, MX_NETCFG, MX_NETCFG_RX_PROMISC);	if (ifp->if_flags & IFF_ALLMULTI)		MX_SETBIT(sc, MX_NETCFG, MX_NETCFG_RX_ALLMULTI);	ETHER_FIRST_MULTI(step, ac, enm);	while (enm != NULL) {		h = mx_calchash(enm->enm_addrlo);		ETHER_NEXT_MULTI(step, enm);	}	if (ifp->if_flags & IFF_BROADCAST) {		h = mx_calchash(etherbroadcastaddr);		sp[h >> 4] |= 1 << (h & 0xF);	}	sp[39] = ((u_int16_t *)sc->arpcom.ac_enaddr)[0];	sp[40] = ((u_int16_t *)sc->arpcom.ac_enaddr)[1];	sp[41] = ((u_int16_t *)sc->arpcom.ac_enaddr)[2];	CSR_WRITE_4(sc, MX_TXADDR, vtophys(sframe));	MX_SETBIT(sc, MX_NETCFG, MX_NETCFG_TX_ON);	sframe->mx_status = MX_TXSTAT_OWN;	CSR_WRITE_4(sc, MX_TXSTART, 0xFFFFFFFF);	/*	 * Wait for chip to clear the 'own' bit.	 */	for (i = 0; i < MX_TIMEOUT; i++) {		DELAY(10);		if (sframe->mx_status != MX_TXSTAT_OWN)			break;	}	if (i == MX_TIMEOUT)		printf("mx%d: failed to send setup frame\n", sc->mx_unit);	MX_SETBIT(sc, MX_ISR, MX_ISR_TX_NOBUF|MX_ISR_TX_IDLE);	return;}