pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG));
int interface;   if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_IDE) { interface = PCIIDE_INTERFACE_SETTABLE(0) | PCIIDE_INTERFACE_SETTABLE(1); if (pciide_pci_read(pa->pa_pc, pa->pa_tag, CMD_CONF) & CMD_CONF_DSA1) interface |= PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); } else { interface = PCI_INTERFACE(pa->pa_class); }
cmd_channel_map(pa, sc, channel)	struct pci_attach_args *pa;	struct pciide_softc *sc;	int channel;{	struct pciide_channel *cp = &sc->pciide_channels[channel];	bus_size_t cmdsize, ctlsize;	u_int8_t ctrl = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_CTRL);	pcireg_t interface =	    PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG));	sc->wdc_chanarray[channel] = &cp->wdc_channel;	cp->name = PCIIDE_CHANNEL_NAME(channel);	cp->wdc_channel.channel = channel;	cp->wdc_channel.wdc = &sc->sc_wdcdev;	if (channel > 0) {		cp->wdc_channel.ch_queue =		    sc->pciide_channels[0].wdc_channel.ch_queue;	} else {		cp->wdc_channel.ch_queue =		    malloc(sizeof(struct channel_queue), M_DEVBUF, M_NOWAIT);	}	if (cp->wdc_channel.ch_queue == NULL) {		printf(		    "%s: %s cannot allocate memory for command queue",		    sc->sc_wdcdev.sc_dev.dv_xname, cp->name);		return;	}	/*	 * with a CMD PCI64x, if we get here, the first channel is enabled:	 * there's no way to disable the first channel without disabling	 * the whole device	 */	 if (channel != 0 && (ctrl & CMD_CTRL_2PORT) == 0) {		printf("%s: %s ignored (disabled)\n",		    sc->sc_wdcdev.sc_dev.dv_xname, cp->name);		return;	}	pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, cmd_pci_intr);	if (cp->hw_ok == 0)		return;	if (channel == 1) {		if (pciide_chan_candisable(cp)) {			ctrl &= ~CMD_CTRL_2PORT;			pciide_pci_write(pa->pa_pc, pa->pa_tag,			    CMD_CTRL, ctrl);		}	}	pciide_map_compat_intr(pa, cp, channel, interface);}