tmp |= RAL_RXCSR0_DROP_CTL | RAL_RXCSR0_DROP_TODS | RAL_RXCSR0_DROP_BAD_VERSION;
tmp |= RAL_RXCSR0_DROP_CTL | RAL_RXCSR0_DROP_BAD_VERSION; if (ic->ic_opmode != IEEE80211_M_HOSTAP) tmp |= RAL_RXCSR0_DROP_TODS;
ral_init(struct ifnet *ifp){#define N(a)	(sizeof (a) / sizeof ((a)[0]))	struct ral_softc *sc = ifp->if_softc;	struct ieee80211com *ic = &sc->sc_ic;	uint32_t tmp;	int i;	/* for CardBus, power on the socket */	if (sc->sc_enable != NULL)		(*sc->sc_enable)(sc);	ral_stop(ifp, 0);	/* setup tx rings */	tmp = RAL_PRIO_RING_COUNT << 24 |	      RAL_ATIM_RING_COUNT << 16 |	      RAL_TX_RING_COUNT   <<  8 |	      RAL_TX_DESC_SIZE;	RAL_WRITE(sc, RAL_TXCSR2, tmp);	RAL_WRITE(sc, RAL_TXCSR3, sc->txq.physaddr);	RAL_WRITE(sc, RAL_TXCSR4, sc->atimq.physaddr);	RAL_WRITE(sc, RAL_TXCSR5, sc->prioq.physaddr);	RAL_WRITE(sc, RAL_TXCSR6, sc->bcnq.physaddr);	/* setup rx ring */	tmp = RAL_RX_RING_COUNT << 8 | RAL_RX_DESC_SIZE;	RAL_WRITE(sc, RAL_RXCSR1, tmp);	RAL_WRITE(sc, RAL_RXCSR2, sc->rxq.physaddr);	/* initialize MAC registers to default values */	for (i = 0; i < N(ral_def_mac); i++)		RAL_WRITE(sc, ral_def_mac[i].reg, ral_def_mac[i].val);	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));	ral_set_macaddr(sc, ic->ic_myaddr);	/* set power mode (CAM) */	RAL_WRITE(sc, RAL_TXCSR7, 0);	/* set supported basic rates (1, 2, 6, 12, 24) */	RAL_WRITE(sc, RAL_ARCSR1, 0x153);	ral_update_slot(sc);	ral_update_plcp(sc);	ral_update_led(sc, 0, 0);	/* set soft reset and host ready */	RAL_WRITE(sc, RAL_CSR1, RAL_CSR1_SOFT_RESET);	RAL_WRITE(sc, RAL_CSR1, RAL_CSR1_HOST_READY);	if (ral_bbp_init(sc) != 0) {		ral_stop(ifp, 1);		return 1;	}	/* set default BSS channel */	ic->ic_bss->ni_chan = ic->ic_ibss_chan;	ral_set_chan(sc, ic->ic_bss->ni_chan);	/* kick Rx */	tmp = RAL_RXCSR0_DROP_PHY | RAL_RXCSR0_DROP_CRC;	if (ic->ic_opmode != IEEE80211_M_MONITOR) {		tmp |= RAL_RXCSR0_DROP_CTL | RAL_RXCSR0_DROP_TODS |		    RAL_RXCSR0_DROP_BAD_VERSION;		if (!(ifp->if_flags & IFF_PROMISC))			tmp |= RAL_RXCSR0_DROP_NOT_TO_ME;	}	RAL_WRITE(sc, RAL_RXCSR0, tmp);	/* clear old FCS and Rx FIFO errors */	RAL_READ(sc, RAL_CNT0);	RAL_READ(sc, RAL_CNT4);	/* clear any pending interrupts */	RAL_WRITE(sc, RAL_CSR7, 0xffffffff);	/* enable interrupts */	RAL_WRITE(sc, RAL_CSR8, RAL_CSR8_MASK);	ifp->if_flags &= ~IFF_OACTIVE;	ifp->if_flags |= IFF_RUNNING;	if (ic->ic_opmode == IEEE80211_M_MONITOR)		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);	else		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);	return 0;#undef N}