rem: for (i = 0; i < RATES; i++) { for (j = 0; j < (RATES - 1); j++) { if (rates[j] > rates[j + 1]) { uint32 temp = rates[j]; rates[j] = rates[j + 1]; rates[j + 1] = temp; } } }  for (i = 0; i < RATES; i++) LOG(("ich_clock_calibrate: rate %ld\n", rates[i]));  rate = 0; for (i = 3; i < (RATES - 3); i++) rate += rates[i]; rate /= (RATES - 6);  LOG(("ich_clock_calibrate: finished, rate %ld\n", rate));
add: rate = ich_clock_get(); LOG(("ich_clock_calibrate: rate %ld\n", rate));
context: ich_clock_calibrate(){	int i, j;	#define RATES 20	uint32 rates[RATES];	uint32 rate;	if (!ac97_set_rate(config->ac97, AC97_PCM_FRONT_DAC_RATE, 48000)) {		LOG(("ich_clock_calibrate: can't set default clock rate\n"));		return;	}	if (!chan_po->running)		start_chan(chan_po);	for (i = 0; i < RATES; i++)		rates[i] = ich_clock_get();//	for (i = 0; i < RATES; i++)//		LOG(("ich_clock_calibrate: rate %ld\n", rates[i]));//	LOG(("ich_clock_calibrate: =========\n"));		for (i = 0; i < RATES; i++) {		for (j = 0; j < (RATES - 1); j++) {			if (rates[j] > rates[j + 1]) {				uint32 temp = rates[j];				rates[j] = rates[j + 1];				rates[j + 1] = temp;			}		}	}	for (i = 0; i < RATES; i++)		LOG(("ich_clock_calibrate: rate %ld\n", rates[i]));	rate = 0;	for (i = 3; i < (RATES - 3); i++)		rate += rates[i];	rate /= (RATES - 6);	LOG(("ich_clock_calibrate: finished, rate %ld\n", rate));	if (rate > (44100 - 1000) && rate < (44100 + 1000)) {		LOG(("ich_clock_calibrate: setting clock 44100\n"));		ac97_set_clock(config->ac97, 44100);	} else if (rate > (48000 - 1000) && rate < (48000 + 1000)) {		LOG(("ich_clock_calibrate: setting clock 48000\n"));		ac97_set_clock(config->ac97, 48000);	} else if (rate > (55930 - 1000) && rate < (55930 + 1000)) {		LOG(("ich_clock_calibrate: setting clock 55930\n"));		ac97_set_clock(config->ac97, 55930);	} else {		LOG(("ich_clock_calibrate: NOT setting clock\n"));	}	if (	!ac97_set_rate(config->ac97, AC97_PCM_FRONT_DAC_RATE, 44100)		&&	!ac97_set_rate(config->ac97, AC97_PCM_FRONT_DAC_RATE, 48000)) {		LOG(("ich_clock_calibrate: setting rates doesn't work with clock %d\n", config->ac97->clock));		LOG(("ich_clock_calibrate: reset clock\n"));		ac97_set_clock(config->ac97, 48000);		ac97_set_rate(config->ac97, AC97_PCM_FRONT_DAC_RATE, 48000);	}}