rem: target->timing.h_sync_start = 744; target->timing.h_sync_end = 744+144;
add: if (si->ps.tv_encoder.type <= BT869) {  target->timing.h_sync_start = 744; target->timing.h_sync_end = 744+144; } else {   target->timing.h_sync_start = 728; target->timing.h_sync_end = 728+160; }
context: static status_t BT_update_mode_for_gpu(display_mode *target, uint8 tvmode){	//fixme if needed:	//pixelclock is not actually pgm'd because PLL is pgm' earlier during setmode...	switch (tvmode)	{	case NTSC640:	case NTSC640_TST:		target->timing.h_display = 640;		target->timing.h_sync_start = 640;		if (si->ps.card_type == NV05M64)		{			target->timing.h_sync_end = 648;			target->timing.h_total = 696;		}		else		{			//fixme if possible:			//see if tweaking h_sync_end can shift picture 8 pixels right to fix			//ws tv's tuning fault (always going for max. compatibility :)			target->timing.h_sync_end = 656;			target->timing.h_total = 688;		}		target->timing.v_display = 480;		target->timing.v_sync_start = 480;		target->timing.v_sync_end = 555;	//This prevents 'cursor trash' on TNT1's		target->timing.v_total = 556;		//Above 525 because mode scales down		if (si->ps.card_type == NV05M64)			target->timing.pixel_clock = ((696 * 556 * 60) / 1000);		else			target->timing.pixel_clock = ((688 * 556 * 60) / 1000);		break;	case NTSC800:		target->timing.h_display = 800;		target->timing.h_sync_start = 800;		if (si->ps.card_type == NV05M64)		{			target->timing.h_sync_end = 808;			target->timing.h_total = 856;		}		else		{			target->timing.h_sync_end = 816;			target->timing.h_total = 848;		}		target->timing.v_display = 600;		target->timing.v_sync_start = 600;		target->timing.v_sync_end = 685;	//This prevents 'cursor trash' on TNT1's		target->timing.v_total = 686;		//Above 525 because mode scales down		if (si->ps.card_type == NV05M64)			target->timing.pixel_clock = ((856 * 686 * 60) / 1000);		else			target->timing.pixel_clock = ((848 * 686 * 60) / 1000);		break;	case PAL640:		target->timing.h_display = 640;		target->timing.h_sync_start = 640;		if (si->ps.card_type == NV05M64)		{			target->timing.h_sync_end = 648;			target->timing.h_total = 696;		}		else		{			target->timing.h_sync_end = 656;			target->timing.h_total = 688;		}		target->timing.v_display = 480;		target->timing.v_sync_start = 480;		target->timing.v_sync_end = 570;	//This prevents 'cursor trash' on TNT1's		target->timing.v_total = 571;		//Below 625 because mode scales up		if (si->ps.card_type == NV05M64)			target->timing.pixel_clock = ((696 * 571 * 50) / 1000);		else			target->timing.pixel_clock = ((688 * 571 * 50) / 1000);		break;	case PAL800:	case PAL800_TST:		target->timing.h_display = 800;		target->timing.h_sync_start = 800;		if (si->ps.card_type == NV05M64)		{			target->timing.h_sync_end = 808;			target->timing.h_total = 856;		}		else		{			target->timing.h_sync_end = 816;			target->timing.h_total = 848;		}		target->timing.v_display = 600;		target->timing.v_sync_start = 600;		target->timing.v_sync_end = 695;	//This prevents 'cursor trash' on TNT1's		target->timing.v_total = 696;		//Above 625 because mode scales down		if (si->ps.card_type == NV05M64)			target->timing.pixel_clock = ((856 * 696 * 50) / 1000);		else			target->timing.pixel_clock = ((848 * 696 * 50) / 1000);		break;	case NTSC640_OS:		target->timing.h_display = 640;			//BT H_ACTIVE		target->timing.h_sync_start = 744;		//set for CH/BT compatible TV output		target->timing.h_sync_end = 744+20;		//delta is BT H_BLANKI		target->timing.h_total = 784;			//BT H_CLKI		target->timing.v_display = 480;			//BT  V_ACTIVEI		target->timing.v_sync_start = 490;		//set for centered sync pulse		target->timing.v_sync_end = 490+25;		//delta is BT V_BLANKI		target->timing.v_total = 525;			//BT V_LINESI (== 525: 1:1 scaled mode)		target->timing.pixel_clock = ((784 * 525 * 60) / 1000); //refresh		break;	case PAL800_OS:		target->timing.h_display = 768;			//H_ACTIVE		if (si->ps.tv_encoder.type <= BT869)		{			/* confirmed on TNT1 using 4:3 TV and 16:9 TV */			target->timing.h_sync_start = 856;		//set for centered TV output			target->timing.h_sync_end = 856+20;		//delta is BT H_BLANKI		}		else		{			//fixme if needed (added 8 for BT)..			target->timing.h_sync_start = 848;		//set for centered TV output			target->timing.h_sync_end = 848+20;		//delta is BT H_BLANKI		}		target->timing.h_total = 944;			//BT H_CLKI		target->timing.v_display = 576;			//V_ACTIVEI		target->timing.v_sync_start = 579;		//set for centered sync pulse		target->timing.v_sync_end = 579+42;		//delta is BT V_BLANKI		target->timing.v_total = 625;			//BT V_LINESI (== 625: 1:1 scaled mode)		target->timing.pixel_clock = ((944 * 625 * 50) / 1000); //refresh		break;	case NTSC720:		/* (tested on TNT2 with BT869) */		target->timing.h_display = 720;			//H_ACTIVE		target->timing.h_sync_start = 744;		//do not change!		target->timing.h_sync_end = 744+144;	//delta is H_sync_pulse		target->timing.h_total = 888;			//BT H_TOTAL		target->timing.v_display = 480;			//V_ACTIVEI		target->timing.v_sync_start = 490;		//set for centered sync pulse		target->timing.v_sync_end = 490+26;		//delta is V_sync_pulse		target->timing.v_total = 525;			//CH V_TOTAL (== 525: 1:1 scaled mode)		target->timing.pixel_clock = ((888 * 525 * 60) / 1000); //refresh		break;	case PAL720:		target->timing.h_display = 720;			//BT H_ACTIVE		target->timing.h_sync_start = 744;		//set for centered sync pulse		target->timing.h_sync_end = 744+140;	//delta is BT H_BLANKI		target->timing.h_total = 888;			//BT H_CLKI		target->timing.v_display = 576;			//BT  V_ACTIVEI		target->timing.v_sync_start = 579;		//set for centered sync pulse		target->timing.v_sync_end = 579+42;		//delta is BT V_BLANKI		target->timing.v_total = 625;			//BT V_LINESI (== 625: 1:1 scaled mode)		target->timing.pixel_clock = ((888 * 625 * 50) / 1000); //refresh		break;	default:		return B_ERROR;	}	return B_OK;}//end BT_update_mode_for_gpu.