rem: if (exec_type1_script(rom, init1, &size) != B_OK) result = B_ERROR;
add: if (exec_type1_script(rom, init1, &size, ram_tab) != B_OK) result = B_ERROR;
context: static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 init_size){	status_t result = B_OK;	int16 size = init_size;	LOG(8,("INFO: executing coldstart...\n"));	/* select colormode CRTC registers base adresses */	NV_REG8(NV8_MISCW) = 0xcb;	/* unknown.. */	NV_REG8(NV8_VSE2) = 0x01;	/* enable access to primary head */	set_crtc_owner(0);	/* unlock head's registers for R/W access */	CRTCW(LOCK, 0x57);	CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));	/* disable RMA as it's not used */	/* (RMA is the cmd register for the 32bit port in the GPU to access 32bit registers	 *  and framebuffer via legacy ISA I/O space.) */	CRTCW(RMA, 0x00);	if (si->ps.secondary_head)	{		/* enable access to secondary head */		set_crtc_owner(1);		/* unlock head's registers for R/W access */		CRTC2W(LOCK, 0x57);		CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));	}	/* turn off both displays and the hardcursors (also disables transfers) */	nv_crtc_dpms(false, false, false);	nv_crtc_cursor_hide();	if (si->ps.secondary_head)	{		nv_crtc2_dpms(false, false, false);		nv_crtc2_cursor_hide();	}	/* execute BIOS coldstart script(s) */	if (init1 || init2)	{		if (init1)			if (exec_type1_script(rom, init1, &size) != B_OK) result = B_ERROR;		if (init2 && (result == B_OK))			if (exec_type1_script(rom, init2, &size) != B_OK) result = B_ERROR;		/* now enable ROM shadow or the card will remain shut-off! */		NV_REG32(0x00001800 + NVCFG_ROMSHADOW) |= 0x00000001;	}	else	{		result = B_ERROR;	}	if (result != B_OK)		LOG(8,("INFO: coldstart failed.\n"));	else		LOG(8,("INFO: coldstart execution completed OK.\n"));	return result;}