rem: BESW(NV10_0MEMMASK, ((si->ps.memory_size << 20) - 1));
add: BESW(NV10_0MEMMASK, (si->ps.memory_size - 1));
context: status_t nv_bes_init(){	if (si->ps.card_arch < NV10A)	{		/* disable overlay ints (b0 = buffer 0, b4 = buffer 1) */		BESW(NV04_INTE, 0x00000000);		/* setup saturation to be 'neutral' */		BESW(NV04_SAT, 0x00000000);		/* setup RGB brightness to be 'neutral' */		BESW(NV04_RED_AMP, 0x00000069);		BESW(NV04_GRN_AMP, 0x0000003e);		BESW(NV04_BLU_AMP, 0x00000089);		/* setup fifo for fetching data */		BESW(NV04_FIFOBURL, 0x00000003);		BESW(NV04_FIFOTHRS, 0x00000038);		/* unknown, but needed (registers only have b0 implemented) */		/* (program both buffers to prevent sync distortions) */		BESW(NV04_0OFFSET, 0x00000000);		BESW(NV04_1OFFSET, 0x00000000);	}	else	{		/* >= NV10A */		/* disable overlay ints (b0 = buffer 0, b4 = buffer 1) */		BESW(NV10_INTE, 0x00000000);		/* shut off GeForce4MX MPEG2 decoder */		BESW(DEC_GENCTRL, 0x00000000);		/* setup BES memory-range mask */		BESW(NV10_0MEMMASK, ((si->ps.memory_size << 20) - 1));		/* unknown, but needed */		BESW(NV10_0OFFSET, 0x00000000);		/* setup brightness, contrast and saturation to be 'neutral' */		BESW(NV10_0BRICON, ((0x1000 << 16) | 0x1000));		BESW(NV10_0SAT, ((0x0000 << 16) | 0x1000));	}	return B_OK;}