rem: dprintf("PCI:   ROM base host %08lx, pci %08lx, size %08lx\n", info->u.h0.rom_base, info->u.h0.rom_base_pci, info->u.h0.rom_size); dprintf("PCI:   cardbus_CIS %08lx, subsystem_id %04x, subsystem_vendor_id %04x\n", info->u.h0.cardbus_cis, info->u.h0.subsystem_id, info->u.h0.subsystem_vendor_id); dprintf("PCI:   interrupt_line %02x, interrupt_pin %02x, min_grant %02x, max_latency %02x\n", info->u.h0.interrupt_line, info->u.h0.interrupt_pin, info->u.h0.min_grant, info->u.h0.max_latency);
add: TRACE(("PCI:   ROM base host %08lx, pci %08lx, size %08lx\n", info->u.h0.rom_base, info->u.h0.rom_base_pci, info->u.h0.rom_size)); TRACE(("PCI:   cardbus_CIS %08lx, subsystem_id %04x, subsystem_vendor_id %04x\n", info->u.h0.cardbus_cis, info->u.h0.subsystem_id, info->u.h0.subsystem_vendor_id)); TRACE(("PCI:   interrupt_line %02x, interrupt_pin %02x, min_grant %02x, max_latency %02x\n", info->u.h0.interrupt_line, info->u.h0.interrupt_pin, info->u.h0.min_grant, info->u.h0.max_latency));
context: print_generic_info(pci_info *info, bool verbose){	dprintf("PCI:   ROM base host %08lx, pci %08lx, size %08lx\n",			info->u.h0.rom_base, info->u.h0.rom_base_pci, info->u.h0.rom_size);	dprintf("PCI:   cardbus_CIS %08lx, subsystem_id %04x, subsystem_vendor_id %04x\n",			info->u.h0.cardbus_cis, info->u.h0.subsystem_id, info->u.h0.subsystem_vendor_id);	dprintf("PCI:   interrupt_line %02x, interrupt_pin %02x, min_grant %02x, max_latency %02x\n",			info->u.h0.interrupt_line, info->u.h0.interrupt_pin, info->u.h0.min_grant, info->u.h0.max_latency);	for (int i = 0; i < 6; i++)		dprintf("PCI:   base reg %d: host %08lx, pci %08lx, size %08lx, flags %02x\n",			i, info->u.h0.base_registers[i], info->u.h0.base_registers_pci[i],			info->u.h0.base_register_sizes[i], info->u.h0.base_register_flags[i]);}