rem: dprintf( "rtl8139_nielx open_hook(): memory allocation for ringbuffer failed\n" );
add: TRACE( "rtl8139_nielx open_hook(): memory allocation for ringbuffer failed\n" );
context: open_hook(const char *name, uint32 flags, void** cookie){	rtl8139_properties_t *data;	uint8 temp8;	uint16 temp16;	uint32 temp32;	unsigned char cmd;	dprintf( "rtl8139_nielx open_hook()\n" );	// Check if the device name is ours	if ( strcmp( name , rtl8139_name[0] ) != 0 )		return EINVAL;			if ( m_isopen == 1 )	{		dprintf( "rtl8139_nielx open_hook(): Device already in use\n" );		return B_BUSY;	}		//We are now officially opening (don't know if it is possible that there	//are multiple calls, however, this could prevent some ugly bugs)	m_isopen = 1;		//Create a structure that contains the internals	if (!(*cookie = data = (rtl8139_properties_t *)malloc(sizeof(rtl8139_properties_t)))) 	{		dprintf( "rtl8139_nielx open_hook(): Out of memory\n" );		m_isopen = 0;		return B_NO_MEMORY;	}		//Clear memory	memset( data , 0 , sizeof( rtl8139_properties_t ) );		// Create lock	data->lock = create_sem( 1 , "rtl8139_nielx data protect" );	set_sem_owner( data->lock , B_SYSTEM_TEAM );	data->input_wait = create_sem( 0 , "rtl8139_nielx read wait" );	set_sem_owner( data->input_wait , B_SYSTEM_TEAM );		//Set up the cookie	data->pcii = m_device;		//Enable the registers	rtl8139_init_registers( data );		/* enable pci address access */		cmd = m_pcimodule->read_pci_config(data->pcii->bus, data->pcii->device, data->pcii->function, PCI_command, 2);	cmd = cmd | PCI_command_io | PCI_command_master | PCI_command_memory;	m_pcimodule->write_pci_config(data->pcii->bus, data->pcii->device, data->pcii->function, PCI_command, 2, cmd );		// Check for the chipversion -- The version bits are bits 31-27 and 24-23	temp32 = READ_32( TxConfig );		if ( temp32 == 0xFFFFFF )	{		dprintf( "rtl8139_nielx open_hook(): Faulty chip\n" );		m_isopen = 0;		put_module( B_PCI_MODULE_NAME );		return EIO;	}		temp32 = temp32 & 0x7cc00000;	switch( temp32 )	{	case 0x74000000:		dprintf( "rtl8139_nielx open_hook(): Chip is the 8139 C\n" );		data->chip_type = RTL_8139_C;		break;		case 0x74400000:		dprintf( "rtl8139_niels open_hook(): Chip is the 8139 D\n" );		data->chip_type = RTL_8139_D;		break;		default:		dprintf( "rtl8139_nielx open_hook(): Unknown chip, assuming 8139 C\n" );		data->chip_type = RTL_8139_C;	}	/* TODO: Linux driver does power management here... */	/* Reset the chip -- command register;*/	WRITE_8 ( Command , Reset );	temp16 = 10000;	while ( ( READ_8( Command ) & Reset ) && temp16 > 0 )		temp16--;		if ( temp16 == 0 )	{		dprintf( "rtl8139_nielx open_hook(): Reset failed... Bailing out\n" );		m_isopen = 0;		free( data );		return EIO;	}	dprintf( "rtl8139_nielx open_hook(): Chip reset: %u \n" , temp16 );		/* Enable writing to the configuration registers */	WRITE_8( _9346CR , 0xc0 );	/* Since the reset was succesful, we can immediately open the transmit and receive registers */	WRITE_8( Command , EnableReceive | EnableTransmit );				/* Reset Config1 register */	WRITE_8( Config1 , 0 );		// Turn off lan-wake and set the driver-loaded bit	WRITE_8( Config1, ( READ_8( Config1 )& ~0x30) | 0x20);	// Enable FIFO auto-clear	WRITE_8( Config4, READ_8( Config4) | 0x80);	// Go to normal operation	WRITE_8( _9346CR , 0 );		/* Reset Rx Missed counter*/	WRITE_16( MPC , 0 );		/* Configure the Transmit Register */	//settings: Max DMA burst size per Tx DMA burst is 1024 ( = 110 )	//settings: Interframe GAP time according to IEEE standard ( = 11 )	WRITE_32( TxConfig , 			READ_32( TxConfig ) | MXDMA_2 | MXDMA_1 );		/* Configure the Receive Register */	//settings: Early Rx Treshold is 1024 kB ( = 110 ) DISABLED	//settings: Max DMA burst size per Rx DMA burst is 1024 ( = 110 )	//settings: The Rx Buffer length is 64k + 16 bytes ( = 11 )	//settings: continue last packet in memory if it exceeds buffer length.	WRITE_32( RxConfig , /*RXFTH2 | RXFTH1 | */		RBLEN_1 | RBLEN_0 | WRAP | MXDMA_2 | MXDMA_1 | APM | AB);		//Disable blocking	data->nonblocking = 0;	//Allocate the ring buffer for the receiver. 	// Size is set above: as 16k + 16 bytes + 1.5 kB--- 16 bytes for last CRC (a	data->receivebuffer = alloc_mem( &(data->receivebufferlog) , &(data->receivebufferphy) , 1024 * 64 + 16 , "rx buffer" );	if( data->receivebuffer == B_ERROR )	{		dprintf( "rtl8139_nielx open_hook(): memory allocation for ringbuffer failed\n" );		return B_ERROR;	}	WRITE_32( RBSTART , (int32) data->receivebufferphy );	data->receivebufferoffset = 0;  //First packet starts at 0		//Disable all multi-interrupts	WRITE_16( MULINT , 0 );	//Allocate buffers for transmit (There can be two buffers in one page)	data->transmitbuffer[0] = alloc_mem( &(data->transmitbufferlog[0]) , &(data->transmitbufferphy[0]) , 4096 , "txbuffer01" );	WRITE_32( TSAD0 , (int32)data->transmitbufferphy[0] );	data->transmitbuffer[1] = data->transmitbuffer[0];	data->transmitbufferlog[1] = data->transmitbufferlog[0] + 2048;	data->transmitbufferphy[1] = data->transmitbufferphy[0] + 2048;	WRITE_32( TSAD1 , (int32)data->transmitbufferphy[1] );		data->transmitbuffer[2] = alloc_mem( &(data->transmitbufferlog[2]) , &(data->transmitbufferphy[2]) , 4096 , "txbuffer23" );	WRITE_32( TSAD2 , (int32)data->transmitbufferphy[2] );	data->transmitbuffer[3] = data->transmitbuffer[2];	data->transmitbufferlog[3] = data->transmitbufferlog[2] + 2048;	data->transmitbufferphy[3] = data->transmitbufferphy[2] + 2048;	WRITE_32( TSAD3 , (int32)data->transmitbufferphy[3] );		if( data->transmitbuffer[0] == B_ERROR || data->transmitbuffer[2] == B_ERROR )	{		dprintf( "rtl8139_nielx open_hook(): memory allocation for transmitbuffer failed\n" );		return B_ERROR;	}	data->nexttransmitstatus = 0;			// Receive hardware MAC address	// Suggestion by Marcus Overhagen: Make it a nice for loop...	temp8 = 0;	do 	{		data->address.ebyte[ temp8 ] = READ_8( IDR0 + temp8  );		temp8++;	} while ( temp8 < 6 );		dprintf( "rlt8139_nielx open_hook(): MAC address: %x:%x:%x:%x:%x:%x\n",	data->address.ebyte[0] , data->address.ebyte[1] , data->address.ebyte[2] ,	data->address.ebyte[3] , data->address.ebyte[4] , data->address.ebyte[5] );		/* Receive physical match packets and broadcast packets */	WRITE_32( RxConfig ,			(READ_32( RxConfig )) | APM | AB );		//Clear multicast mask	WRITE_32( MAR0 , 0 );	WRITE_32( MAR0 + 4 , 0 );		/* We want interrupts! */	if ( install_io_interrupt_handler( data->pcii->u.h0.interrupt_line , rtl8139_interrupt , data , 0 ) != B_OK )	{		dprintf( "rtl8139_nielx open_hook(): Error installing interrupt handler\n" );		return B_ERROR;	}	WRITE_16( IMR , 		ReceiveOk | ReceiveError | TransmitOk | TransmitError | 		ReceiveOverflow | ReceiveUnderflow | ReceiveFIFOOverrun |		TimeOut | SystemError );	      	/* Enable once more */	WRITE_8( _9346CR , 0 );	WRITE_8( Command , EnableReceive | EnableTransmit );		//Check if Tx and Rx are enabled	if( !( READ_8( Command ) & EnableReceive ) || !( READ_8( Command ) & EnableTransmit ) )		dprintf( "TRANSMIT AND RECEIVE NOT ENABLED!!!\n" );	else		dprintf( "TRANSMIT AND RECEIVE ENABLED!!!\n" );			dprintf( "rtl8139_nielx open_hook(): Basic Mode Status Register: 0x%x ESRS: 0x%x\n" ,		READ_16( BMSR ) , 		READ_8( ESRS ) );			return B_OK;}