rem: TRACE("uhci_nielx init_hardware(): found at IRQ %u \n", item->u.h0.interrupt_line);
add: TRACE("USB UHCI: init_hardware(): found at IRQ %u \n", item->u.h0.interrupt_line);
context: init_hardware(){	status_t status;	pci_info *item;	int i;		// Try if the PCI module is loaded (it would be weird if it wouldn't, but alas)	if( ( status = get_module( B_PCI_MODULE_NAME, (module_info **)&m_pcimodule )) != B_OK) 	{		TRACE( "uhci_nielx init_hardware(): Get PCI module failed! %lu \n", status);		return status;	}	// TODO: in the future we might want to support multiple host controllers.	item = (pci_info *)malloc( sizeof( pci_info ) );	for ( i = 0 ; m_pcimodule->get_nth_pci_info( i , item ) == B_OK ; i++ )	{		//class_base = 0C (serial bus) class_sub = 03 (usb) prog_int: 00 (UHCI)		if ( ( item->class_base == 0x0C ) && ( item->class_sub == 0x03 ) &&			 ( item->class_api  == 0x00 ) )		{			if ((item->u.h0.interrupt_line == 0) || (item->u.h0.interrupt_line == 0xFF)) 			{				TRACE( "uhci_nielx init_hardware(): found with invalid IRQ - check IRQ assignement\n");				continue;			}			TRACE("uhci_nielx init_hardware(): found at IRQ %u \n", item->u.h0.interrupt_line);			m_device = item;			break;		}	}		if ( m_device == 0 )	{		TRACE( "uhci_nielx init hardware(): no devices found\n" );		put_module( B_PCI_MODULE_NAME );		return ENODEV;	}		//Initialise the host controller	m_data = (uhci_properties_t *)malloc( sizeof( uhci_properties_t ) );	m_data->pcii = m_device;	m_data->reg_base = m_device->u.h0.base_registers[0];		{		/* enable pci address access */			unsigned char cmd;		cmd = m_pcimodule->read_pci_config(m_data->pcii->bus, m_data->pcii->device, m_data->pcii->function, PCI_command, 2);		cmd = cmd | PCI_command_io | PCI_command_master | PCI_command_memory;		m_pcimodule->write_pci_config(m_data->pcii->bus, m_data->pcii->device, m_data->pcii->function, PCI_command, 2, cmd );	}		//Do a host reset//	m_pcimodule->write_io_16( m_data->reg_base + UHCI_USBCMD , UHCI_USBCMD_HCRESET );//	spin(50);		return B_OK;}