rem: ISAGRPHW(CRTC_PITCHE, ((offset & 0xff00) >> 8));
add: if (si->ps.card_type != NM2070) ISAGRPHW(CRTC_PITCHE, ((offset & 0xff00) >> 8));
context: status_t nm_crtc_set_display_pitch() {	uint32 offset;	LOG(4,("CRTC: setting card pitch (offset between lines)\n"));	/* figure out offset value hardware needs: same for all Neomagic cards */	offset = si->fbc.bytes_per_row / 8;	LOG(2,("CRTC: offset register set to: $%04x\n", offset));			/* program the card */	ISACRTCW(PITCHL, (offset & 0xff));	//fixme: test for max supported pitch if possible,	//not all bits below will be implemented.	//NM2160: confirmed b0 and b1 in register below to exist and work.	ISAGRPHW(CRTC_PITCHE, ((offset & 0xff00) >> 8));	return B_OK;}