add: if (*vt > (*vd_e + 0xff)) *vt = (*vd_e + 0xff);
context: status_t nv_crtc_validate_timing(	uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht,	uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt){/* horizontal */	/* make all parameters multiples of 8 */	*hd_e &= 0xfff8;	*hs_s &= 0xfff8;	*hs_e &= 0xfff8;	*ht   &= 0xfff8;	/* confine to required number of bits, taking logic into account */	if (*hd_e > ((0x01ff - 2) << 3)) *hd_e = ((0x01ff - 2) << 3);	if (*hs_s > ((0x01ff - 1) << 3)) *hs_s = ((0x01ff - 1) << 3);	if (*hs_e > ( 0x01ff      << 3)) *hs_e = ( 0x01ff      << 3);	if (*ht   > ((0x01ff + 5) << 3)) *ht   = ((0x01ff + 5) << 3);	/* NOTE: keep horizontal timing at multiples of 8! */	/* confine to a reasonable width */	if (*hd_e < 640) *hd_e = 640;	if (si->ps.card_type > NV04)	{		if (*hd_e > 2048) *hd_e = 2048;	}	else	{		if (*hd_e > 1920) *hd_e = 1920;	}	/* if hor. total does not leave room for a sensible sync pulse, increase it! */	if (*ht < (*hd_e + 80)) *ht = (*hd_e + 80);	/* make sure sync pulse is not during display */	if (*hs_e > (*ht - 8)) *hs_e = (*ht - 8);	if (*hs_s < (*hd_e + 8)) *hs_s = (*hd_e + 8);	/* correct sync pulse if it is too long:	 * there are only 5 bits available to save this in the card registers! */	if (*hs_e > (*hs_s + 0xf8)) *hs_e = (*hs_s + 0xf8);/*vertical*/	/* confine to required number of bits, taking logic into account */	//fixme if needed: on GeForce cards there are 12 instead of 11 bits...	if (*vd_e > (0x7ff - 2)) *vd_e = (0x7ff - 2);	if (*vs_s > (0x7ff - 1)) *vs_s = (0x7ff - 1);	if (*vs_e >  0x7ff     ) *vs_e =  0x7ff     ;	if (*vt   > (0x7ff + 2)) *vt   = (0x7ff + 2);	/* confine to a reasonable height */	if (*vd_e < 480) *vd_e = 480;	if (si->ps.card_type > NV04)	{		if (*vd_e > 1536) *vd_e = 1536;	}	else	{		if (*vd_e > 1440) *vd_e = 1440;	}	/*if vertical total does not leave room for a sync pulse, increase it!*/	if (*vt < (*vd_e + 3)) *vt = (*vd_e + 3);	/* make sure sync pulse is not during display */	if (*vs_e > (*vt - 1)) *vs_e = (*vt - 1);	if (*vs_s < (*vd_e + 1)) *vs_s = (*vd_e + 1);	/* correct sync pulse if it is too long:	 * there are only 4 bits available to save this in the card registers! */	if (*vs_e > (*vs_s + 0x0f)) *vs_e = (*vs_s + 0x0f);	return B_OK;}