rem: memcpy (si->rom_mirror, pd->di[index].si->rom_mirror, 32768);
add: memcpy (si->rom_mirror, pd->di[index].rom_mirror, 32768);
context: static status_t map_device(device_info *di){	char buffer[B_OS_NAME_LENGTH]; /*memory for device name*/	shared_info *si = di->si;	uint32	tmpUlong;	pci_info *pcii = &(di->pcii);	system_info sysinfo;	/*storage for the physical to virtual table (used for dma buffer)*///	physical_entry physical_memory[2];//	#define G400_DMA_BUFFER_SIZE 1024*1024	/*variables for making copy of ROM*/	uint8 *rom_temp;	area_id rom_area;	/* MIL1 has frame_buffer in [1], control_regs in [0], and nothing in [2], while	 * MIL2 and later have frame_buffer in [0], control_regs in [1], pseudo_dma in [2] */	int frame_buffer = 0;	int registers = 1;	int pseudo_dma = 2;	/* correct layout for MIL1 */	//fixme: checkout Mystique 170 and 220...	if (di->pcii.device_id == 0x0519)	{		frame_buffer = 1;		registers = 0;	}	/* enable memory mapped IO, disable VGA I/O - this is standard*/	tmpUlong = get_pci(PCI_command, 4);	tmpUlong |= 0x00000002;	tmpUlong &= 0xfffffffe;	set_pci(PCI_command, 4, tmpUlong); 	/*work out which version of BeOS is running*/ 	get_system_info(&sysinfo); 	if (0)//sysinfo.kernel_build_date[0]=='J')/*FIXME - better ID version*/ 	{ 		si->use_clone_bugfix = 1; 	} 	else 	{ 		si->use_clone_bugfix = 0; 	} 	/* work out a name for the register mapping */	sprintf(buffer, DEVICE_FORMAT " regs",		di->pcii.vendor_id, di->pcii.device_id,		di->pcii.bus, di->pcii.device, di->pcii.function);	/* get a virtual memory address for the registers*/	si->regs_area = map_physical_memory(		buffer,		(void *) di->pcii.u.h0.base_registers[registers],		di->pcii.u.h0.base_register_sizes[registers],		B_ANY_KERNEL_ADDRESS, 		B_USER_CLONEABLE_AREA | (si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),		(void **)&(di->regs)); 	si->clone_bugfix_regs = (uint32 *) di->regs;	/* if mapping registers to vmem failed then pass on error */	if (si->regs_area < 0) return si->regs_area;	/* work out a name for the ROM mapping*/	sprintf(buffer, DEVICE_FORMAT " rom",		di->pcii.vendor_id, di->pcii.device_id,		di->pcii.bus, di->pcii.device, di->pcii.function);	/*place ROM over the fbspace (this is definately safe)*/	tmpUlong = di->pcii.u.h0.base_registers[frame_buffer];	tmpUlong |= 0x00000001;	set_pci(PCI_rom_base, 4, tmpUlong);	rom_area = map_physical_memory(		buffer,		(void *)di->pcii.u.h0.base_registers[frame_buffer],		32768,		B_ANY_KERNEL_ADDRESS,		B_READ_AREA,		(void **)&(rom_temp)	);	/* if mapping ROM to vmem failed then clean up and pass on error */	if (rom_area < 0) {		delete_area(si->regs_area);		si->regs_area = -1;		return rom_area;	}	/* if we have a MMS card which only has a BIOS on the primary card, copy the	 * primary card's BIOS for our reference too if we aren't primary ourselves.	 * (confirmed OK on 'quad' G200MMS.) */	if ((di->pcii.class_base == PCI_display) &&		(di->pcii.class_sub == PCI_display_other) &&		((rom_temp[0] != 0x55) || (rom_temp[1] != 0xaa)) && di->pcii.device)	{		/* locate the main VGA adaptor on our bus, should sit on device #0		 * (MMS cards have a own bridge: so there are only graphics cards on it's bus). */		uint8 index = 0;		bool found = false;		for (index = 0; index < pd->count; index++)		{			if ((pd->di[index].pcii.bus == di->pcii.bus) &&				(pd->di[index].pcii.device == 0x00))			{				found = true;				break;			}		}		if (found)		{			/* make the copy from the primary VGA card */			memcpy (si->rom_mirror, pd->di[index].si->rom_mirror, 32768);		}		else		{			/* make a copy of 'non-ok' ROM area for future reference just in case */			memcpy (si->rom_mirror, rom_temp, 32768);		}	}	else	{		/* make a copy of ROM for future reference */		memcpy (si->rom_mirror, rom_temp, 32768);	}	if (current_settings.dumprom) dumprom (si->rom_mirror, 32768, di->pcii);	/*disable ROM and delete the area*/	set_pci(PCI_rom_base,4,0);	delete_area(rom_area);	/* (pseudo)DMA does not exist on MIL1 */	//fixme: checkout Mystique 170 and 220...	if (di->pcii.device_id != 0x0519)	{		/* work out a name for the pseudo dma mapping*/		sprintf(buffer, DEVICE_FORMAT " pseudodma",			di->pcii.vendor_id, di->pcii.device_id,			di->pcii.bus, di->pcii.device, di->pcii.function);		/* map the pseudo dma into vmem (write-only)*/		si->pseudo_dma_area = map_physical_memory(			buffer,			(void *) di->pcii.u.h0.base_registers[pseudo_dma],			di->pcii.u.h0.base_register_sizes[pseudo_dma],			B_ANY_KERNEL_ADDRESS,			B_WRITE_AREA,			&(si->pseudo_dma));		/* if there was an error, delete our other areas and pass on error*/		if (si->pseudo_dma_area < 0) {			delete_area(si->regs_area);			si->regs_area = -1;			return si->pseudo_dma_area;		}		/* work out a name for the a dma buffer*///		sprintf(buffer, DEVICE_FORMAT " dmabuffer",//			di->pcii.vendor_id, di->pcii.device_id,//			di->pcii.bus, di->pcii.device, di->pcii.function);		/* create an area for the dma buffer*///		si->dma_buffer_area = create_area(//			buffer,//			&si->dma_buffer,//			B_ANY_ADDRESS,//			G400_DMA_BUFFER_SIZE,//			B_FULL_LOCK|B_CONTIGUOUS,//			B_READ_AREA|B_WRITE_AREA);		/* if there was an error, delete our other areas and pass on error*///		if (si->dma_buffer_area < 0) {//			delete_area(si->pseudo_dma_area);//			si->pseudo_dma_area = -1;//			delete_area(si->regs_area);//			si->regs_area = -1;//			return si->dma_buffer_area;//		}		/*find where it is in real memory*///		get_memory_map(si->dma_buffer,4,physical_memory,1);//		si->dma_buffer_pci = physical_memory[0].address; /*addr from PCI space*/ 	}	/* work out a name for the framebuffer mapping*/	sprintf(buffer, DEVICE_FORMAT " framebuffer",		di->pcii.vendor_id, di->pcii.device_id,		di->pcii.bus, di->pcii.device, di->pcii.function);	/* map the framebuffer into vmem, using Write Combining*/	si->fb_area = map_physical_memory(		buffer,		(void *) di->pcii.u.h0.base_registers[frame_buffer],		di->pcii.u.h0.base_register_sizes[frame_buffer],		B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,		B_READ_AREA | B_WRITE_AREA,		&(si->framebuffer));	/*if failed with write combining try again without*/	if (si->fb_area < 0) {		si->fb_area = map_physical_memory(			buffer,			(void *) di->pcii.u.h0.base_registers[frame_buffer],			di->pcii.u.h0.base_register_sizes[frame_buffer],			B_ANY_KERNEL_BLOCK_ADDRESS,			B_READ_AREA | B_WRITE_AREA,			&(si->framebuffer));	}			/* if there was an error, delete our other areas and pass on error*/	if (si->fb_area < 0)	{		/* (pseudo)DMA does not exist on MIL1 */		//fixme: checkout Mystique 170 and 220...		if (di->pcii.device_id != 0x0519)		{			delete_area(si->dma_buffer_area);			si->dma_buffer_area = -1;			delete_area(si->pseudo_dma_area);			si->pseudo_dma_area = -1;		}		delete_area(si->regs_area);		si->regs_area = -1;		return si->fb_area;	}	/* remember the DMA address of the frame buffer for BDirectWindow?? purposes */	si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[frame_buffer];	// remember settings for use here and in accelerant	si->settings = current_settings; 	/* in any case, return the result */	return si->fb_area;}