rem: ich_reg_write_16(chan->regbase + ICH_REG_X_SR, SR_FIFOE | SR_BCIS | SR_LVBCI);
add: ich_reg_write_16(chan->regbase + GET_REG_X_SR(config), SR_FIFOE | SR_BCIS | SR_LVBCI);
context: void start_chan(ich_chan *chan){	int32 civ;		if (chan->running)		return;	#if DEBUG > 2		dump_chan(chan);	#endif	civ = ich_reg_read_8(chan->regbase + ICH_REG_X_CIV);	chan->lastindex = civ;	chan->played_frames_count = -BUFFER_FRAMES_COUNT; /* gets bumped up to 0 in the first interrupt before playback starts */	chan->played_real_time = 0;	// step 1: clear status bits	ich_reg_write_16(chan->regbase + ICH_REG_X_SR, SR_FIFOE | SR_BCIS | SR_LVBCI); 	// step 2: prepare buffer transfer	ich_reg_write_8(chan->regbase + ICH_REG_X_LVI, (civ + 28) % ICH_BD_COUNT);	// step 3: enable interrupts & busmaster transfer	ich_reg_write_8(chan->regbase + ICH_REG_X_CR, CR_RPBM | CR_LVBIE | CR_IOCE);	chan->running = true;}