rem: { DACW(PLLSEL, (DACR(PLLSEL) | 0x00030000)); }
add: DACW(PLLSEL, 0x20030f00);
context: static status_t BT_start_tvout(void){	/* enable access to primary head */	set_crtc_owner(0);	/* CAUTION:	 * On the TNT1, TV_SETUP and PLLSEL cannot be read (sometimes), but	 * write actions do succeed ... (tested on both ISA and PCI bus!) */	/* setup TVencoder connection */	/* b1-0 = %01: encoder type is MASTER;	 * b24 = 1: VIP datapos is b0-7 */	//fixme if needed: setup completely instead of relying on pre-init by BIOS..	//(it seems to work OK on TNT1 although read reg. doesn't seem to work)	DACW(TV_SETUP, ((DACR(TV_SETUP) & ~0x00000002) | 0x01000001));	/* tell GPU to use pixelclock from TVencoder instead of using internal source */	/* (nessecary or display will 'shiver' on both TV and VGA.) */	if (si->ps.secondary_head)	{		DACW(PLLSEL, (DACR(PLLSEL) | 0x00030000));	}	else	{		/* confirmed PLLSEL to be a write-only register on TNT1! */		DACW(PLLSEL, 0x00030700);	}	/* Set overscan color to 'black' */	/* note:	 * Change this instruction for a visible overscan color if you're trying to	 * center the output on TV. Use it as a guide-'line' then ;-) */	ATBW(OSCANCOLOR, 0x00);	/* set CRTC to slaved mode (b7 = 1) and clear TVadjust (b3-5 = %000) */	CRTCW(PIXEL, ((CRTCR(PIXEL) & 0xc7) | 0x80));	/* select TV encoder, not panel encoder (b0 = 0).	 * Note:	 * Both are devices (often) using the CRTC in slaved mode. */	CRTCW(LCD, (CRTCR(LCD) & 0xfe));	/* HTOTAL, VTOTAL and OVERFLOW return their default CRTC use, instead of	 * H, V-low and V-high 'shadow' counters(?)(b0, 4 and 6 = 0) (b7 use = unknown) */	CRTCW(TREG, 0x80);	return B_OK;}//end BT_start_tvout.