if ((ahc->features & AHC_ULTRA2) != 0) ahc_outb(ahc, SCSIOFFSET, offset);
tinfo->scsirate = scsirate; tinfo->current.period = period; tinfo->current.offset = offset;   ahc_update_pending_syncrates(ahc); }   if (done) { if (offset != 0) { printf("%s: target %d synchronous at %sMHz, " "offset = 0x%x\n", ahc_name(ahc), devinfo->target, syncrate->rate, offset); } else { printf("%s: target %d using " "asynchronous transfers\n", ahc_name(ahc), devinfo->target);
ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,		 struct ahc_syncrate *syncrate, u_int period,		 u_int offset, u_int ppr_options, u_int type, int paused){	struct	ahc_initiator_tinfo *tinfo;	struct	ahc_tmode_tstate *tstate;	u_int	old_period;	u_int	old_offset;	u_int	old_ppr;	int	active;	int	update_needed;	active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;	update_needed = 0;	if (syncrate == NULL) {		period = 0;		offset = 0;	}	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,				    devinfo->target, &tstate);	if ((type & AHC_TRANS_USER) != 0) {		tinfo->user.period = period;		tinfo->user.offset = offset;		tinfo->user.ppr_options = ppr_options;	}	if ((type & AHC_TRANS_GOAL) != 0) {		tinfo->goal.period = period;		tinfo->goal.offset = offset;		tinfo->goal.ppr_options = ppr_options;	}	old_period = tinfo->curr.period;	old_offset = tinfo->curr.offset;	old_ppr	   = tinfo->curr.ppr_options;	if ((type & AHC_TRANS_CUR) != 0	 && (old_period != period	  || old_offset != offset	  || old_ppr != ppr_options)) {		u_int	scsirate;		update_needed++;		scsirate = tinfo->scsirate;		if ((ahc->features & AHC_ULTRA2) != 0) {			scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);			if (syncrate != NULL) {				scsirate |= syncrate->sxfr_u2;				if ((ppr_options & MSG_EXT_PPR_DT_REQ) != 0)					scsirate |= ENABLE_CRC;				else					scsirate |= SINGLE_EDGE;			}		} else {			scsirate &= ~(SXFR|SOFS);			/*			 * Ensure Ultra mode is set properly for			 * this target.			 */			tstate->ultraenb &= ~devinfo->target_mask;			if (syncrate != NULL) {				if (syncrate->sxfr & ULTRA_SXFR) {					tstate->ultraenb |=						devinfo->target_mask;				}				scsirate |= syncrate->sxfr & SXFR;				scsirate |= offset & SOFS;			}			if (active) {				u_int sxfrctl0;				sxfrctl0 = ahc_inb(ahc, SXFRCTL0);				sxfrctl0 &= ~FAST20;				if (tstate->ultraenb & devinfo->target_mask)					sxfrctl0 |= FAST20;				ahc_outb(ahc, SXFRCTL0, sxfrctl0);			}		}		if (active) {			ahc_outb(ahc, SCSIRATE, scsirate);			if ((ahc->features & AHC_ULTRA2) != 0)				ahc_outb(ahc, SCSIOFFSET, offset);		}		tinfo->scsirate = scsirate;		tinfo->curr.period = period;		tinfo->curr.offset = offset;		tinfo->curr.ppr_options = ppr_options;		ahc_send_async(ahc, devinfo->channel, devinfo->target,			       CAM_LUN_WILDCARD, AC_TRANSFER_NEG, NULL);		if (1 /*bootverbose*/) {			if (offset != 0) {				printf("%s: target %d synchronous at %sMHz%s, "				       "offset = 0x%x\n", ahc_name(ahc),				       devinfo->target, syncrate->rate,				       (ppr_options & MSG_EXT_PPR_DT_REQ)				       ? " DT" : "", offset);			} else {				printf("%s: target %d using "				       "asynchronous transfers\n",				       ahc_name(ahc), devinfo->target);			}		}	}	update_needed += ahc_update_neg_request(ahc, devinfo, tstate,						tinfo, /*force*/FALSE);	if (update_needed)		ahc_update_pending_scbs(ahc);}