nic->ufo_in_band_v = kmalloc((sizeof(u64) * size), GFP_KERNEL); if (!nic->ufo_in_band_v) return -ENOMEM;
static int init_shared_mem(struct s2io_nic *nic){	u32 size;	void *tmp_v_addr, *tmp_v_addr_next;	dma_addr_t tmp_p_addr, tmp_p_addr_next;	RxD_block_t *pre_rxd_blk = NULL;	int i, j, blk_cnt, rx_sz, tx_sz;	int lst_size, lst_per_page;	struct net_device *dev = nic->dev;	unsigned long tmp;	buffAdd_t *ba;	mac_info_t *mac_control;	struct config_param *config;	mac_control = &nic->mac_control;	config = &nic->config;	/* Allocation and initialization of TXDLs in FIOFs */	size = 0;	for (i = 0; i < config->tx_fifo_num; i++) {		size += config->tx_cfg[i].fifo_len;	}	if (size > MAX_AVAILABLE_TXDS) {		DBG_PRINT(ERR_DBG, "%s: Requested TxDs too high, ",			  __FUNCTION__);		DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);		return FAILURE;	}	lst_size = (sizeof(TxD_t) * config->max_txds);	tx_sz = lst_size * size;	lst_per_page = PAGE_SIZE / lst_size;	for (i = 0; i < config->tx_fifo_num; i++) {		int fifo_len = config->tx_cfg[i].fifo_len;		int list_holder_size = fifo_len * sizeof(list_info_hold_t);		mac_control->fifos[i].list_info = kmalloc(list_holder_size,							  GFP_KERNEL);		if (!mac_control->fifos[i].list_info) {			DBG_PRINT(ERR_DBG,				  "Malloc failed for list_info\n");			return -ENOMEM;		}		memset(mac_control->fifos[i].list_info, 0, list_holder_size);	}	for (i = 0; i < config->tx_fifo_num; i++) {		int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,						lst_per_page);		mac_control->fifos[i].tx_curr_put_info.offset = 0;		mac_control->fifos[i].tx_curr_put_info.fifo_len =		    config->tx_cfg[i].fifo_len - 1;		mac_control->fifos[i].tx_curr_get_info.offset = 0;		mac_control->fifos[i].tx_curr_get_info.fifo_len =		    config->tx_cfg[i].fifo_len - 1;		mac_control->fifos[i].fifo_no = i;		mac_control->fifos[i].nic = nic;		mac_control->fifos[i].max_txds = MAX_SKB_FRAGS + 1;		for (j = 0; j < page_num; j++) {			int k = 0;			dma_addr_t tmp_p;			void *tmp_v;			tmp_v = pci_alloc_consistent(nic->pdev,						     PAGE_SIZE, &tmp_p);			if (!tmp_v) {				DBG_PRINT(ERR_DBG,					  "pci_alloc_consistent ");				DBG_PRINT(ERR_DBG, "failed for TxDL\n");				return -ENOMEM;			}			/* If we got a zero DMA address(can happen on			 * certain platforms like PPC), reallocate.			 * Store virtual address of page we don't want,			 * to be freed later.			 */			if (!tmp_p) {				mac_control->zerodma_virt_addr = tmp_v;				DBG_PRINT(INIT_DBG, 				"%s: Zero DMA address for TxDL. ", dev->name);				DBG_PRINT(INIT_DBG, 				"Virtual address %p\n", tmp_v);				tmp_v = pci_alloc_consistent(nic->pdev,						     PAGE_SIZE, &tmp_p);				if (!tmp_v) {					DBG_PRINT(ERR_DBG,					  "pci_alloc_consistent ");					DBG_PRINT(ERR_DBG, "failed for TxDL\n");					return -ENOMEM;				}			}			while (k < lst_per_page) {				int l = (j * lst_per_page) + k;				if (l == config->tx_cfg[i].fifo_len)					break;				mac_control->fifos[i].list_info[l].list_virt_addr =				    tmp_v + (k * lst_size);				mac_control->fifos[i].list_info[l].list_phy_addr =				    tmp_p + (k * lst_size);				k++;			}		}	}	/* Allocation and initialization of RXDs in Rings */	size = 0;	for (i = 0; i < config->rx_ring_num; i++) {		if (config->rx_cfg[i].num_rxd %		    (rxd_count[nic->rxd_mode] + 1)) {			DBG_PRINT(ERR_DBG, "%s: RxD count of ", dev->name);			DBG_PRINT(ERR_DBG, "Ring%d is not a multiple of ",				  i);			DBG_PRINT(ERR_DBG, "RxDs per Block");			return FAILURE;		}		size += config->rx_cfg[i].num_rxd;		mac_control->rings[i].block_count =			config->rx_cfg[i].num_rxd /			(rxd_count[nic->rxd_mode] + 1 );		mac_control->rings[i].pkt_cnt = config->rx_cfg[i].num_rxd -			mac_control->rings[i].block_count;	}	if (nic->rxd_mode == RXD_MODE_1)		size = (size * (sizeof(RxD1_t)));	else		size = (size * (sizeof(RxD3_t)));	rx_sz = size;	for (i = 0; i < config->rx_ring_num; i++) {		mac_control->rings[i].rx_curr_get_info.block_index = 0;		mac_control->rings[i].rx_curr_get_info.offset = 0;		mac_control->rings[i].rx_curr_get_info.ring_len =		    config->rx_cfg[i].num_rxd - 1;		mac_control->rings[i].rx_curr_put_info.block_index = 0;		mac_control->rings[i].rx_curr_put_info.offset = 0;		mac_control->rings[i].rx_curr_put_info.ring_len =		    config->rx_cfg[i].num_rxd - 1;		mac_control->rings[i].nic = nic;		mac_control->rings[i].ring_no = i;		blk_cnt = config->rx_cfg[i].num_rxd /				(rxd_count[nic->rxd_mode] + 1);		/*  Allocating all the Rx blocks */		for (j = 0; j < blk_cnt; j++) {			rx_block_info_t *rx_blocks;			int l;			rx_blocks = &mac_control->rings[i].rx_blocks[j];			size = SIZE_OF_BLOCK; //size is always page size			tmp_v_addr = pci_alloc_consistent(nic->pdev, size,							  &tmp_p_addr);			if (tmp_v_addr == NULL) {				/*				 * In case of failure, free_shared_mem()				 * is called, which should free any				 * memory that was alloced till the				 * failure happened.				 */				rx_blocks->block_virt_addr = tmp_v_addr;				return -ENOMEM;			}			memset(tmp_v_addr, 0, size);			rx_blocks->block_virt_addr = tmp_v_addr;			rx_blocks->block_dma_addr = tmp_p_addr;			rx_blocks->rxds = kmalloc(sizeof(rxd_info_t)*						  rxd_count[nic->rxd_mode],						  GFP_KERNEL);			for (l=0; l<rxd_count[nic->rxd_mode];l++) {				rx_blocks->rxds[l].virt_addr =					rx_blocks->block_virt_addr +					(rxd_size[nic->rxd_mode] * l);				rx_blocks->rxds[l].dma_addr =					rx_blocks->block_dma_addr +					(rxd_size[nic->rxd_mode] * l);			}			mac_control->rings[i].rx_blocks[j].block_virt_addr =				tmp_v_addr;			mac_control->rings[i].rx_blocks[j].block_dma_addr =				tmp_p_addr;		}		/* Interlinking all Rx Blocks */		for (j = 0; j < blk_cnt; j++) {			tmp_v_addr =				mac_control->rings[i].rx_blocks[j].block_virt_addr;			tmp_v_addr_next =				mac_control->rings[i].rx_blocks[(j + 1) %					      blk_cnt].block_virt_addr;			tmp_p_addr =				mac_control->rings[i].rx_blocks[j].block_dma_addr;			tmp_p_addr_next =				mac_control->rings[i].rx_blocks[(j + 1) %					      blk_cnt].block_dma_addr;			pre_rxd_blk = (RxD_block_t *) tmp_v_addr;			pre_rxd_blk->reserved_2_pNext_RxD_block =			    (unsigned long) tmp_v_addr_next;			pre_rxd_blk->pNext_RxD_Blk_physical =			    (u64) tmp_p_addr_next;		}	}	if (nic->rxd_mode >= RXD_MODE_3A) {		/*		 * Allocation of Storages for buffer addresses in 2BUFF mode		 * and the buffers as well.		 */		for (i = 0; i < config->rx_ring_num; i++) {			blk_cnt = config->rx_cfg[i].num_rxd /			   (rxd_count[nic->rxd_mode]+ 1);			mac_control->rings[i].ba =				kmalloc((sizeof(buffAdd_t *) * blk_cnt),				     GFP_KERNEL);			if (!mac_control->rings[i].ba)				return -ENOMEM;			for (j = 0; j < blk_cnt; j++) {				int k = 0;				mac_control->rings[i].ba[j] =					kmalloc((sizeof(buffAdd_t) *						(rxd_count[nic->rxd_mode] + 1)),						GFP_KERNEL);				if (!mac_control->rings[i].ba[j])					return -ENOMEM;				while (k != rxd_count[nic->rxd_mode]) {					ba = &mac_control->rings[i].ba[j][k];					ba->ba_0_org = (void *) kmalloc					    (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);					if (!ba->ba_0_org)						return -ENOMEM;					tmp = (unsigned long)ba->ba_0_org;					tmp += ALIGN_SIZE;					tmp &= ~((unsigned long) ALIGN_SIZE);					ba->ba_0 = (void *) tmp;					ba->ba_1_org = (void *) kmalloc					    (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);					if (!ba->ba_1_org)						return -ENOMEM;					tmp = (unsigned long) ba->ba_1_org;					tmp += ALIGN_SIZE;					tmp &= ~((unsigned long) ALIGN_SIZE);					ba->ba_1 = (void *) tmp;					k++;				}			}		}	}	/* Allocation and initialization of Statistics block */	size = sizeof(StatInfo_t);	mac_control->stats_mem = pci_alloc_consistent	    (nic->pdev, size, &mac_control->stats_mem_phy);	if (!mac_control->stats_mem) {		/*		 * In case of failure, free_shared_mem() is called, which		 * should free any memory that was alloced till the		 * failure happened.		 */		return -ENOMEM;	}	mac_control->stats_mem_sz = size;	tmp_v_addr = mac_control->stats_mem;	mac_control->stats_info = (StatInfo_t *) tmp_v_addr;	memset(tmp_v_addr, 0, size);	DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,		  (unsigned long long) tmp_p_addr);	return SUCCESS;}