s3vPriv.chip == S3_ViRGE_GX2 || s3vPriv.chip == S3_ViRGE_MX) {
S3_ViRGE_GX2_SERIES(s3vPriv.chip) || S3_ViRGE_MX_SERIES(s3vPriv.chip)) {
S3VAdjust(x, y)int x, y;{int Base, hwidth;unsigned char tmp;   if(s3vPriv.STREAMSRunning == FALSE ||      s3vPriv.chip == S3_ViRGE_GX2 || s3vPriv.chip == S3_ViRGE_MX) {      Base = ((y * vga256InfoRec.displayWidth + x)		* (vgaBitsPerPixel / 8)) >> 2;      if (vgaBitsPerPixel == 24) 	Base = Base+2 - (Base+2) % 3;      /* Now program the start address registers */      outw(vgaCRIndex, (Base & 0x00FF00) | 0x0C);      outw(vgaCRIndex, ((Base & 0x00FF) << 8) | 0x0D);      outb(vgaCRIndex, 0x69);      outb(vgaCRReg, (Base & 0x0F0000) >> 16);         }   else {          /* Change start address for STREAMS case */      VerticalRetraceWait();      if(s3vPriv.chip == S3_ViRGE_VX)	((mmtr)s3vMmioMem)->streams_regs.regs.prim_fbaddr0 =	  ((y * vga256InfoRec.displayWidth + (x & ~7)) * vgaBitsPerPixel / 8);      else	((mmtr)s3vMmioMem)->streams_regs.regs.prim_fbaddr0 =	((y * vga256InfoRec.displayWidth + (x & ~3)) * vgaBitsPerPixel / 8);      }   if (!OFLG_ISSET(OPTION_SW_CURSOR, &vga256InfoRec.options))     S3VRepositionCursor(NULL);#ifdef XFreeXDGA   if (vga256InfoRec.directMode & XF86DGADirectGraphics) {      /* Wait until vertical retrace is in progress. */      VerticalRetraceWait();   }#endif   return;}