if ((info->Clone) && (info->CloneType == MT_DFP)) { OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN); OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON); if (info->ChipFamily >= CHIP_FAMILY_R200) { OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_DV0_EN, ~RADEON_FP2_DV0_EN);
if (info->Clone) { if (info->CloneType == MT_DFP) { OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN); OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON); if (info->ChipFamily >= CHIP_FAMILY_R200) { OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_DV0_EN, ~RADEON_FP2_DV0_EN); } } else if (info->CloneType == MT_CRT) { RADEONDacPowerSet(pScrn, TRUE, !pRADEONEnt->ReversedDAC);
static void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,					    int PowerManagementMode,					    int flags){    RADEONInfoPtr  info       = RADEONPTR(pScrn);    unsigned char *RADEONMMIO = info->MMIO;#ifdef XF86DRI    if (info->CPStarted) DRILock(pScrn->pScreen, 0);#endif    if (info->accelOn) info->accel->Sync(pScrn);    if (info->FBDev) {	fbdevHWDPMSSet(pScrn, PowerManagementMode, flags);    } else {	int             mask1     = (RADEON_CRTC_DISPLAY_DIS |				     RADEON_CRTC_HSYNC_DIS |				     RADEON_CRTC_VSYNC_DIS);	int             mask2     = (RADEON_CRTC2_DISP_DIS |				     RADEON_CRTC2_VSYNC_DIS |				     RADEON_CRTC2_HSYNC_DIS);	/* TODO: additional handling for LCD ? */	switch (PowerManagementMode) {	case DPMSModeOn:	    /* Screen: On; HSync: On, VSync: On */	    if (info->IsSecondary)		OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);	    else {		if (info->Clone)		    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);		OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1);	    }	    break;	case DPMSModeStandby:	    /* Screen: Off; HSync: Off, VSync: On */	    if (info->IsSecondary)		OUTREGP(RADEON_CRTC2_GEN_CNTL,			RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS,			~mask2);	    else {		if (info->Clone)		    OUTREGP(RADEON_CRTC2_GEN_CNTL,			    RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS,			    ~mask2);		OUTREGP(RADEON_CRTC_EXT_CNTL,			RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS,			~mask1);	    }	    break;	case DPMSModeSuspend:	    /* Screen: Off; HSync: On, VSync: Off */	    if (info->IsSecondary)		OUTREGP(RADEON_CRTC2_GEN_CNTL,			RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS,			~mask2);	    else {		if (info->Clone)		    OUTREGP(RADEON_CRTC2_GEN_CNTL,			    RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS,			    ~mask2);		OUTREGP(RADEON_CRTC_EXT_CNTL,			RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS,			~mask1);	    }	    break;	case DPMSModeOff:	    /* Screen: Off; HSync: Off, VSync: Off */	    if (info->IsSecondary)		OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);	    else {		if (info->Clone)		    OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);		OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1);	    }	    break;	}	if (PowerManagementMode == DPMSModeOn) {	    if (info->IsSecondary) {		if (info->DisplayType == MT_DFP) {		    OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);		    OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON);		    if (info->ChipFamily >= CHIP_FAMILY_R200) {			OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_DV0_EN, ~RADEON_FP2_DV0_EN);		    }		}	    } else {		if ((info->Clone) && (info->CloneType == MT_DFP)) {		    OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);		    OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON);		    if (info->ChipFamily >= CHIP_FAMILY_R200) {			OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_DV0_EN, ~RADEON_FP2_DV0_EN);		    }		}		if (info->DisplayType == MT_DFP) {		    OUTREGP (RADEON_FP_GEN_CNTL, (RADEON_FP_FPON | RADEON_FP_TMDS_EN),			     ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));		} else if (info->DisplayType == MT_LCD) {		    OUTREGP (RADEON_LVDS_GEN_CNTL, RADEON_LVDS_BLON, ~RADEON_LVDS_BLON);		    usleep (info->PanelPwrDly * 1000);		    OUTREGP (RADEON_LVDS_GEN_CNTL, RADEON_LVDS_ON, ~RADEON_LVDS_ON);		}	    }	} else if ((PowerManagementMode == DPMSModeOff) ||		   (PowerManagementMode == DPMSModeSuspend) ||		   (PowerManagementMode == DPMSModeStandby)) {	    if (info->IsSecondary) {		if (info->DisplayType == MT_DFP) {		    OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);		    OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_ON);		    if (info->ChipFamily >= CHIP_FAMILY_R200) {			OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_DV0_EN);		    }		}	    } else {		if ((info->Clone) && (info->CloneType == MT_DFP)) {		    OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);		    OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_ON);		    if (info->ChipFamily >= CHIP_FAMILY_R200) {			OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_DV0_EN);		    }		}		if (info->DisplayType == MT_DFP) {		    OUTREGP (RADEON_FP_GEN_CNTL, 0, ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));		} else if (info->DisplayType == MT_LCD) {		    unsigned long tmpPixclksCntl = INPLL(pScrn, RADEON_PIXCLKS_CNTL);		    if (info->IsMobility || info->IsIGP) {			/* Asic bug, when turning off LVDS_ON, we have to make sure			   RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off			*/			OUTPLLP(pScrn, RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);		    }		    OUTREGP (RADEON_LVDS_GEN_CNTL, 0,			     ~(RADEON_LVDS_BLON | RADEON_LVDS_ON));		    if (info->IsMobility || info->IsIGP) {			OUTPLL(RADEON_PIXCLKS_CNTL, tmpPixclksCntl);		    }		}	    }	}    }#ifdef XF86DRI    if (info->CPStarted) DRIUnlock(pScrn->pScreen);#endif}