u32 *ctx = MAILBOX_ALIGN(mailbox);
u32 *ctx = mailbox->buf;
void mthca_free_cq(struct mthca_dev *dev,		   struct mthca_cq *cq){	void *mailbox;	int err;	u8 status;	might_sleep();	mailbox = kmalloc(sizeof (struct mthca_cq_context) + MTHCA_CMD_MAILBOX_EXTRA,			  GFP_KERNEL);	if (!mailbox) {		mthca_warn(dev, "No memory for mailbox to free CQ.\n");		return;	}	err = mthca_HW2SW_CQ(dev, MAILBOX_ALIGN(mailbox), cq->cqn, &status);	if (err)		mthca_warn(dev, "HW2SW_CQ failed (%d)\n", err);	else if (status)		mthca_warn(dev, "HW2SW_CQ returned status 0x%02x\n",			   status);	if (0) {		u32 *ctx = MAILBOX_ALIGN(mailbox);		int j;		printk(KERN_ERR "context for CQN %x (cons index %x, next sw %d)\n",		       cq->cqn, cq->cons_index, !!next_cqe_sw(cq));		for (j = 0; j < 16; ++j)			printk(KERN_ERR "[%2x] %08x\n", j * 4, be32_to_cpu(ctx[j]));	}	spin_lock_irq(&dev->cq_table.lock);	mthca_array_clear(&dev->cq_table.cq,			  cq->cqn & (dev->limits.num_cqs - 1));	spin_unlock_irq(&dev->cq_table.lock);	if (dev->mthca_flags & MTHCA_FLAG_MSI_X)		synchronize_irq(dev->eq_table.eq[MTHCA_EQ_COMP].msi_x_vector);	else		synchronize_irq(dev->pdev->irq);	atomic_dec(&cq->refcount);	wait_event(cq->wait, !atomic_read(&cq->refcount));	mthca_free_mr(dev, &cq->mr);	mthca_free_cq_buf(dev, cq);	if (mthca_is_memfree(dev)) {		mthca_free_db(dev, MTHCA_DB_TYPE_CQ_ARM,    cq->arm_db_index);		mthca_free_db(dev, MTHCA_DB_TYPE_CQ_SET_CI, cq->set_ci_db_index);	}	mthca_table_put(dev, dev->cq_table.table, cq->cqn);	mthca_free(&dev->cq_table.alloc, cq->cqn);	kfree(mailbox);}