case PCI_CLASS_BRIDGE: if ( ++hostbridges > 1) { pcr._pcibuses[pcr._pcinumbus] = pcr._pcinumbus; pcr._pcinumbus++; } break;
main(int argc, unsigned char *argv[]){    unsigned long tmplong1, tmplong2, config_cmd;    unsigned char tmp1, tmp2;    unsigned int idx;    struct pci_config_reg pcr;    int ch, verbose = 0, do_mode1_scan = 0, do_mode2_scan = 0;    int func;    while((ch = getopt(argc, argv, "v12")) != EOF) {     	switch((char)ch) {	case '1':		do_mode1_scan = 1;		break;	case '2':		do_mode2_scan = 1;		break;	case 'v':		verbose = 1;		break;	default :		printf("Usage: %s [-v12] \n", argv[0]);		exit(1);        }    }#if !defined(MSDOS)    if (getuid()) {	printf("This program must be run as root\n");	exit(1);    }#endif    enable_os_io();#if !defined(__alpha__) && !defined(__powerpc__)    pcr._configtype = 0;    outb(PCI_MODE2_ENABLE_REG, 0x00);    outb(PCI_MODE2_FORWARD_REG, 0x00);    tmp1 = inb(PCI_MODE2_ENABLE_REG);    tmp2 = inb(PCI_MODE2_FORWARD_REG);    if ((tmp1 == 0x00) && (tmp2 == 0x00)) {	pcr._configtype = 2;        printf("PCI says configuration type 2\n");    } else {        tmplong1 = inl(PCI_MODE1_ADDRESS_REG);        outl(PCI_MODE1_ADDRESS_REG, PCI_EN);        tmplong2 = inl(PCI_MODE1_ADDRESS_REG);        outl(PCI_MODE1_ADDRESS_REG, tmplong1);        if (tmplong2 == PCI_EN) {	    pcr._configtype = 1;            printf("PCI says configuration type 1\n");	} else {            printf("No PCI !\n");	    disable_os_io();	    exit(1);	}    }#else    pcr._configtype = 1;#endif    /* Try pci config 1 probe first */    if ((pcr._configtype == 1) || do_mode1_scan) {    printf("\nPCI probing configuration type 1\n");    pcr._ioaddr = 0xFFFF;    pcr._pcibuses[0] = 0;    pcr._pcinumbus = 1;    pcr._pcibusidx = 0;    idx = 0;    do {        printf("Probing for devices on PCI bus %d:\n\n", pcr._pcibusidx);        for (pcr._cardnum = 0x0; pcr._cardnum < MAX_DEV_PER_VENDOR_CFG1;		pcr._cardnum += 0x1) {	  func = 0;	  do { /* loop over the different functions, if present */#if !defined(__alpha__) && !defined(__powerpc__)	    config_cmd = PCI_EN | (pcr._pcibuses[pcr._pcibusidx]<<16) |                                  (pcr._cardnum<<11) | (func<<8);            outl(PCI_MODE1_ADDRESS_REG, config_cmd);         /* ioreg 0 */            pcr._device_vendor = inl(PCI_MODE1_DATA_REG);#else	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,		PCI_ID_REG, 4, &pcr._device_vendor);#endif            if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF))                break;   /* nothing there */	    printf("\npci bus 0x%x cardnum 0x%02x function 0x%04x: vendor 0x%04x device 0x%04x\n",	        pcr._pcibuses[pcr._pcibusidx], pcr._cardnum, func,		pcr._vendor, pcr._device);#if !defined(__alpha__) && !defined(__powerpc__)            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x04);	    pcr._status_command  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x08);	    pcr._class_revision  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x0C);	    pcr._bist_header_latency_cache = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x10);	    pcr._base0  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x14);	    pcr._base1  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x18);	    pcr._base2  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x1C);	    pcr._base3  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x20);	    pcr._base4  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x24);	    pcr._base5  = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x30);	    pcr._baserom = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x3C);	    pcr._max_min_ipin_iline = inl(PCI_MODE1_DATA_REG);            outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x40);	    pcr._user_config = inl(PCI_MODE1_DATA_REG);#else	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_CMD_STAT_REG, 4, &pcr._status_command);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_CLASS_REG, 4, &pcr._class_revision);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_HEADER_MISC, 4, &pcr._bist_header_latency_cache);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_REG_START, 4, &pcr._base0);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_REG_START + 0x04, 4, &pcr._base1);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_REG_START + 0x08, 4, &pcr._base2);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_REG_START + 0x0C, 4, &pcr._base3);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_REG_START + 0x10, 4, &pcr._base4);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_REG_START + 0x14, 4, &pcr._base5);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_MAP_ROM_REG, 4, &pcr._baserom);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_INTERRUPT_REG, 4, &pcr._max_min_ipin_iline);	    pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3,			PCI_REG_USERCONFIG, 4, &pcr._user_config);#endif            /* check for pci-pci bridges */#define PCI_CLASS_MASK 		0xff000000#define PCI_SUBCLASS_MASK 	0x00ff0000#define PCI_CLASS_BRIDGE 	0x06000000#define PCI_SUBCLASS_BRIDGE_PCI	0x00040000	    switch(pcr._class_revision & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) {		case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI:		    if (pcr._secondary_bus_number > 0) {		        pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number;		    }			break;		default:			break;	    }	    if((func==0) && ((pcr._header_type & PCI_MULTIFUNC_DEV) == 0)) {	        /* not a multi function device */		func = 8;	    } else {	        func++;	    }	    if (idx++ >= MAX_PCI_DEVICES)	        continue;	    identify_card(&pcr, verbose);	  } while( func < 8 );        }    } while (++pcr._pcibusidx < pcr._pcinumbus);    }#if !defined(__alpha__) && !defined(__powerpc__)    /* Now try pci config 2 probe (deprecated) */    if ((pcr._configtype == 2) || do_mode2_scan) {    outb(PCI_MODE2_ENABLE_REG, 0xF1);    outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */    printf("\nPCI probing configuration type 2\n");    pcr._pcibuses[0] = 0;    pcr._pcinumbus = 1;    pcr._pcibusidx = 0;    idx = 0;    do {        for (pcr._ioaddr = 0xC000; pcr._ioaddr < 0xD000; pcr._ioaddr += 0x0100){	    outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */            pcr._device_vendor = inl(pcr._ioaddr);	    outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */            if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF))                continue;            if ((pcr._vendor == 0xF0F0) || (pcr._device == 0xF0F0))                continue;  /* catch ASUS P55TP4XE motherboards */	    printf("\npci bus 0x%x slot at 0x%04x, vendor 0x%04x device 0x%04x\n",	        pcr._pcibuses[pcr._pcibusidx], pcr._ioaddr, pcr._vendor,                pcr._device);	    outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */            pcr._status_command = inl(pcr._ioaddr + 0x04);            pcr._class_revision = inl(pcr._ioaddr + 0x08);            pcr._bist_header_latency_cache = inl(pcr._ioaddr + 0x0C);            pcr._base0 = inl(pcr._ioaddr + 0x10);            pcr._base1 = inl(pcr._ioaddr + 0x14);            pcr._base2 = inl(pcr._ioaddr + 0x18);            pcr._base3 = inl(pcr._ioaddr + 0x1C);            pcr._base4 = inl(pcr._ioaddr + 0x20);            pcr._base5 = inl(pcr._ioaddr + 0x24);            pcr._baserom = inl(pcr._ioaddr + 0x30);            pcr._max_min_ipin_iline = inl(pcr._ioaddr + 0x3C);            pcr._user_config = inl(pcr._ioaddr + 0x40);	    outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */            /* check for pci-pci bridges (currently we only know Digital) */            if ((pcr._vendor == 0x1011) && (pcr._device == 0x0001))                if (pcr._secondary_bus_number > 0)                    pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number;	    if (idx++ >= MAX_PCI_DEVICES)	        continue;	    identify_card(&pcr, verbose);	}    } while (++pcr._pcibusidx < pcr._pcinumbus);    outb(PCI_MODE2_ENABLE_REG, 0x00);    }#endif /* __alpha__ */    disable_os_io();}