if ((ahc->qoutfifonext & 0x03) == 0x03) { u_int modnext;   modnext = ahc->qoutfifonext & ~0x3; *((uint32_t *)(&ahc->qoutfifo[modnext])) = 0xFFFFFFFFUL; ahc_dmamap_sync(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap, modnext, 4, BUS_DMASYNC_PREREAD); } ahc->qoutfifonext++;  scb = ahc_lookup_scb(ahc, scb_index); if (scb == NULL) {
ahc->qoutfifo[ahc->qoutfifonext++] = SCB_LIST_NULL;  scb = &ahc->scb_data->scbarray[scb_index]; if (scb_index >= ahc->scb_data->numscbs || (scb->flags & SCB_ACTIVE) == 0) {
ahc_run_qoutfifo(struct ahc_softc *ahc){	struct scb *scb;	u_int  scb_index;	ahc_sync_qoutfifo(ahc, BUS_DMASYNC_POSTREAD);	while (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL) {		scb_index = ahc->qoutfifo[ahc->qoutfifonext];		if ((ahc->qoutfifonext & 0x03) == 0x03) {			u_int modnext;			/*			 * Clear 32bits of QOUTFIFO at a time			 * so that we don't clobber an incoming			 * byte DMA to the array on architectures			 * that only support 32bit load and store			 * operations.			 */			modnext = ahc->qoutfifonext & ~0x3;			*((uint32_t *)(&ahc->qoutfifo[modnext])) = 0xFFFFFFFFUL;			ahc_dmamap_sync(ahc, ahc->shared_data_dmat,					ahc->shared_data_dmamap,					/*offset*/modnext, /*len*/4,					BUS_DMASYNC_PREREAD);		}		ahc->qoutfifonext++;		scb = ahc_lookup_scb(ahc, scb_index);		if (scb == NULL) {			printf("%s: WARNING no command for scb %d "			       "(cmdcmplt)\nQOUTPOS = %d\n",			       ahc_name(ahc), scb_index,			       ahc->qoutfifonext - 1);			continue;		}		/*		 * Save off the residual		 * if there is one.		 */		ahc_update_residual(scb);		ahc_done(ahc, scb);	}}