dump_hw_addr(0, dev, "HW Address ", dev->dev_addr);
dump_hw_addr(0, dev, "%s: HW Address ", __FUNCTION__, dev->dev_addr);
static int __init gt96100_probe1(struct pci_dev *pci, int port_num){	struct gt96100_private *gp = NULL;	struct gt96100_if_t *gtif = &gt96100_iflist[port_num];	int phy_addr, phy_id1, phy_id2;	u32 phyAD;	int retval;	unsigned char chip_rev;	struct net_device *dev = NULL;    	if (gtif->irq < 0) {		printk(KERN_ERR "%s: irq unknown - probing not supported\n",		      __FUNCTION__);		return -ENODEV;	}    	pci_read_config_byte(pci, PCI_REVISION_ID, &chip_rev);	if (chip_rev >= REV_GT96100A_1) {		phyAD = GT96100_READ(GT96100_ETH_PHY_ADDR_REG);		phy_addr = (phyAD >> (5*port_num)) & 0x1f;	} else {		/*		 * not sure what's this about -- probably a gt bug		 */		phy_addr = port_num;		phyAD = GT96100_READ(GT96100_ETH_PHY_ADDR_REG);		phyAD &= ~(0x1f << (port_num*5));		phyAD |= phy_addr << (port_num*5);		GT96100_WRITE(GT96100_ETH_PHY_ADDR_REG, phyAD);	}		// probe for the external PHY	if ((phy_id1 = read_MII(phy_addr, 2)) <= 0 ||	    (phy_id2 = read_MII(phy_addr, 3)) <= 0) {		printk(KERN_ERR "%s: no PHY found on MII%d\n", __FUNCTION__, port_num);		return -ENODEV;	}		if (!request_region(gtif->iobase, GT96100_ETH_IO_SIZE, "GT96100ETH")) {		printk(KERN_ERR "%s: request_region failed\n", __FUNCTION__);		return -EBUSY;	}	dev = alloc_etherdev(sizeof(struct gt96100_private));	if (!dev)		goto out;	gtif->dev = dev;		/* private struct aligned and zeroed by alloc_etherdev */	/* Fill in the 'dev' fields. */	dev->base_addr = gtif->iobase;	dev->irq = gtif->irq;	if ((retval = parse_mac_addr(dev, gtif->mac_str))) {		err("%s: MAC address parse failed\n", __FUNCTION__);		retval = -EINVAL;		goto out1;	}	gp = netdev_priv(dev);	memset(gp, 0, sizeof(*gp)); // clear it	gp->port_num = port_num;	gp->io_size = GT96100_ETH_IO_SIZE;	gp->port_offset = port_num * GT96100_ETH_IO_SIZE;	gp->phy_addr = phy_addr;	gp->chip_rev = chip_rev;	info("%s found at 0x%x, irq %d\n",	     chip_name(gp->chip_rev), gtif->iobase, gtif->irq);	dump_hw_addr(0, dev, "HW Address ", dev->dev_addr);	info("%s chip revision=%d\n", chip_name(gp->chip_rev), gp->chip_rev);	info("%s ethernet port %d\n", chip_name(gp->chip_rev), gp->port_num);	info("external PHY ID1=0x%04x, ID2=0x%04x\n", phy_id1, phy_id2);	// Allocate Rx and Tx descriptor rings	if (gp->rx_ring == NULL) {		// All descriptors in ring must be 16-byte aligned		gp->rx_ring = dmaalloc(sizeof(gt96100_rd_t) * RX_RING_SIZE				       + sizeof(gt96100_td_t) * TX_RING_SIZE,				       &gp->rx_ring_dma);		if (gp->rx_ring == NULL) {			retval = -ENOMEM;			goto out1;		}			gp->tx_ring = (gt96100_td_t *)(gp->rx_ring + RX_RING_SIZE);		gp->tx_ring_dma =			gp->rx_ring_dma + sizeof(gt96100_rd_t) * RX_RING_SIZE;	}    	// Allocate the Rx Data Buffers	if (gp->rx_buff == NULL) {		gp->rx_buff = dmaalloc(PKT_BUF_SZ*RX_RING_SIZE,				       &gp->rx_buff_dma);		if (gp->rx_buff == NULL) {			retval = -ENOMEM;			goto out2;		}	}    	dbg(3, "%s: rx_ring=%p, tx_ring=%p\n", __FUNCTION__,	    gp->rx_ring, gp->tx_ring);	// Allocate Rx Hash Table	if (gp->hash_table == NULL) {		gp->hash_table = (char*)dmaalloc(RX_HASH_TABLE_SIZE,						 &gp->hash_table_dma);		if (gp->hash_table == NULL) {			retval = -ENOMEM;			goto out3;		}	}    	dbg(3, "%s: hash=%p\n", __FUNCTION__, gp->hash_table);	spin_lock_init(&gp->lock);    	dev->open = gt96100_open;	dev->hard_start_xmit = gt96100_tx;	dev->stop = gt96100_close;	dev->get_stats = gt96100_get_stats;	//dev->do_ioctl = gt96100_ioctl;	dev->set_multicast_list = gt96100_set_rx_mode;	dev->tx_timeout = gt96100_tx_timeout;	dev->watchdog_timeo = GT96100ETH_TX_TIMEOUT;	retval = register_netdev(dev);	if (retval)		goto out4;	return 0;out4:	dmafree(RX_HASH_TABLE_SIZE, gp->hash_table_dma);out3:	dmafree(PKT_BUF_SZ*RX_RING_SIZE, gp->rx_buff);out2:	dmafree(sizeof(gt96100_rd_t) * RX_RING_SIZE		+ sizeof(gt96100_td_t) * TX_RING_SIZE,		gp->rx_ring);out1:	free_netdev (dev);out:	release_region(gtif->iobase, GT96100_ETH_IO_SIZE);	err("%s failed.  Returns %d\n", __FUNCTION__, retval);	return retval;}