fecp->fec_ievent = 0xffc0;
fecp->fec_ievent = 0xffc00000;
fec_restart(struct net_device *dev, int duplex){	struct fec_enet_private *fep;	volatile cbd_t *bdp;	volatile fec_t *fecp;	int i;	fep = netdev_priv(dev);	fecp = fep->hwp;	/* Whack a reset.  We should wait for this.	*/	fecp->fec_ecntrl = 1;	udelay(10);	/* Enable interrupts we wish to service.	*/	fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB |				FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII);	/* Clear any outstanding interrupt.	*/	fecp->fec_ievent = 0xffc0;	fec_enable_phy_intr();	/* Set station address.	*/	fecp->fec_addr_low = fep->mac_addr[3] | (fep->mac_addr[2] << 8) |		(fep->mac_addr[1] << 16) | (fep->mac_addr[0] << 24);	fecp->fec_addr_high = (fep->mac_addr[5] << 16) |		(fep->mac_addr[4] << 24);	for (i=0; i<ETH_ALEN; i++)		dev->dev_addr[i] = fep->mac_addr[i];	/* Reset all multicast.	*/	fecp->fec_hash_table_high = 0;	fecp->fec_hash_table_low = 0;	/* Set maximum receive buffer size.	*/	fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;	fec_localhw_setup();	/* Set receive and transmit descriptor base.	*/	fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base));	fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base));	fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;	fep->cur_rx = fep->rx_bd_base;	/* Reset SKB transmit buffers.	*/	fep->skb_cur = fep->skb_dirty = 0;	for (i=0; i<=TX_RING_MOD_MASK; i++) {		if (fep->tx_skbuff[i] != NULL) {			dev_kfree_skb_any(fep->tx_skbuff[i]);			fep->tx_skbuff[i] = NULL;		}	}	/* Initialize the receive buffer descriptors.	*/	bdp = fep->rx_bd_base;	for (i=0; i<RX_RING_SIZE; i++) {		/* Initialize the BD for every fragment in the page.		*/		bdp->cbd_sc = BD_ENET_RX_EMPTY;		bdp++;	}	/* Set the last buffer to wrap.	*/	bdp--;	bdp->cbd_sc |= BD_SC_WRAP;	/* ...and the same for transmmit.	*/	bdp = fep->tx_bd_base;	for (i=0; i<TX_RING_SIZE; i++) {		/* Initialize the BD for every fragment in the page.		*/		bdp->cbd_sc = 0;		bdp->cbd_bufaddr = 0;		bdp++;	}	/* Set the last buffer to wrap.	*/	bdp--;	bdp->cbd_sc |= BD_SC_WRAP;	/* Enable MII mode.	*/	if (duplex) {		fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;/* MII enable */		fecp->fec_x_cntrl = 0x04;		  /* FD enable */	}	else {		/* MII enable|No Rcv on Xmit */		fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x06;		fecp->fec_x_cntrl = 0x00;	}	fep->full_duplex = duplex;	/* Set MII speed.	*/	fecp->fec_mii_speed = fep->phy_speed;	/* And last, enable the transmit and receive processing.	*/	fecp->fec_ecntrl = 2;	fecp->fec_r_des_active = 0x01000000;}