address reloads altogether.  */ if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]))
address reloads altogether.  Do not do this if both reloads are optional since the result would be an optional reload which could potentially leave unresolved address replacements.  It is not sufficient to call transfer_replacements since choose_reload_regs will remove the replacements for address reloads of inherited reloads which results in the same problem.  */ if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]) && ! (reload_optional[i] && optional))
static struct decomposition decompose PROTO((rtx));static int immune_p		PROTO((rtx, rtx, struct decomposition));static int alternative_allows_memconst PROTO((const char *, int));static rtx find_reloads_toplev	PROTO((rtx, int, enum reload_type, int, int, rtx));static rtx make_memloc		PROTO((rtx, int));static int find_reloads_address	PROTO((enum machine_mode, rtx *, rtx, rtx *,				       int, enum reload_type, int, rtx));static rtx subst_reg_equivs	PROTO((rtx, rtx));static rtx subst_indexed_address PROTO((rtx));static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,					 int, enum reload_type,int, rtx));static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,					     enum machine_mode, int,					     enum reload_type, int));static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,					      int, rtx));static int find_inc_amount	PROTO((rtx, rtx));static int loc_mentioned_in_p	PROTO((rtx *, rtx));#ifdef HAVE_SECONDARY_RELOADS/* Determine if any secondary reloads are needed for loading (if IN_P is   non-zero) or storing (if IN_P is zero) X to or from a reload register of   register class RELOAD_CLASS in mode RELOAD_MODE.  If secondary reloads   are needed, push them.   Return the reload number of the secondary reload we made, or -1 if   we didn't need one.  *PICODE is set to the insn_code to use if we do   need a secondary reload.  */static intpush_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,		       type, picode)     int in_p;     rtx x;     int opnum;     int optional;     enum reg_class reload_class;     enum machine_mode reload_mode;     enum reload_type type;     enum insn_code *picode;{  enum reg_class class = NO_REGS;  enum machine_mode mode = reload_mode;  enum insn_code icode = CODE_FOR_nothing;  enum reg_class t_class = NO_REGS;  enum machine_mode t_mode = VOIDmode;  enum insn_code t_icode = CODE_FOR_nothing;  enum reload_type secondary_type;  int s_reload, t_reload = -1;  if (type == RELOAD_FOR_INPUT_ADDRESS      || type == RELOAD_FOR_OUTPUT_ADDRESS      || type == RELOAD_FOR_INPADDR_ADDRESS      || type == RELOAD_FOR_OUTADDR_ADDRESS)    secondary_type = type;  else    secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;  *picode = CODE_FOR_nothing;  /* If X is a paradoxical SUBREG, use the inner value to determine both the     mode and object being reloaded.  */  if (GET_CODE (x) == SUBREG      && (GET_MODE_SIZE (GET_MODE (x))	  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))    {      x = SUBREG_REG (x);      reload_mode = GET_MODE (x);    }  /* If X is a pseudo-register that has an equivalent MEM (actually, if it     is still a pseudo-register by now, it *must* have an equivalent MEM     but we don't want to assume that), use that equivalent when seeing if     a secondary reload is needed since whether or not a reload is needed     might be sensitive to the form of the MEM.  */  if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER      && reg_equiv_mem[REGNO (x)] != 0)    x = reg_equiv_mem[REGNO (x)];#ifdef SECONDARY_INPUT_RELOAD_CLASS  if (in_p)    class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);#endif#ifdef SECONDARY_OUTPUT_RELOAD_CLASS  if (! in_p)    class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);#endif  /* If we don't need any secondary registers, done.  */  if (class == NO_REGS)    return -1;  /* Get a possible insn to use.  If the predicate doesn't accept X, don't     use the insn.  */  icode = (in_p ? reload_in_optab[(int) reload_mode]	   : reload_out_optab[(int) reload_mode]);  if (icode != CODE_FOR_nothing      && insn_operand_predicate[(int) icode][in_p]      && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))    icode = CODE_FOR_nothing;  /* If we will be using an insn, see if it can directly handle the reload     register we will be using.  If it can, the secondary reload is for a     scratch register.  If it can't, we will use the secondary reload for     an intermediate register and require a tertiary reload for the scratch     register.  */  if (icode != CODE_FOR_nothing)    {      /* If IN_P is non-zero, the reload register will be the output in 	 operand 0.  If IN_P is zero, the reload register will be the input	 in operand 1.  Outputs should have an initial "=", which we must	 skip.  */      char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];      enum reg_class insn_class	= (insn_letter == 'r' ? GENERAL_REGS	   : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));      if (insn_class == NO_REGS	  || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')	  /* The scratch register's constraint must start with "=&".  */	  || insn_operand_constraint[(int) icode][2][0] != '='	  || insn_operand_constraint[(int) icode][2][1] != '&')	abort ();      if (reg_class_subset_p (reload_class, insn_class))	mode = insn_operand_mode[(int) icode][2];      else	{	  char t_letter = insn_operand_constraint[(int) icode][2][2];	  class = insn_class;	  t_mode = insn_operand_mode[(int) icode][2];	  t_class = (t_letter == 'r' ? GENERAL_REGS		     : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));	  t_icode = icode;	  icode = CODE_FOR_nothing;	}    }  /* This case isn't valid, so fail.  Reload is allowed to use the same     register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but     in the case of a secondary register, we actually need two different     registers for correct code.  We fail here to prevent the possibility of     silently generating incorrect code later.     The convention is that secondary input reloads are valid only if the     secondary_class is different from class.  If you have such a case, you     can not use secondary reloads, you must work around the problem some     other way.     Allow this when MODE is not reload_mode and assume that the generated     code handles this case (it does on the Alpha, which is the only place     this currently happens).  */  if (in_p && class == reload_class && mode == reload_mode)    abort ();  /* If we need a tertiary reload, see if we have one we can reuse or else     make a new one.  */  if (t_class != NO_REGS)    {      for (t_reload = 0; t_reload < n_reloads; t_reload++)	if (reload_secondary_p[t_reload]	    && (reg_class_subset_p (t_class, reload_reg_class[t_reload])		|| reg_class_subset_p (reload_reg_class[t_reload], t_class))	    && ((in_p && reload_inmode[t_reload] == t_mode)		|| (! in_p && reload_outmode[t_reload] == t_mode))	    && ((in_p && (reload_secondary_in_icode[t_reload]			  == CODE_FOR_nothing))		|| (! in_p &&(reload_secondary_out_icode[t_reload]			      == CODE_FOR_nothing)))	    && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)	    && MERGABLE_RELOADS (secondary_type,				 reload_when_needed[t_reload],				 opnum, reload_opnum[t_reload]))	  {	    if (in_p)	      reload_inmode[t_reload] = t_mode;	    if (! in_p)	      reload_outmode[t_reload] = t_mode;	    if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))	      reload_reg_class[t_reload] = t_class;	    reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);	    reload_optional[t_reload] &= optional;	    reload_secondary_p[t_reload] = 1;	    if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],				opnum, reload_opnum[t_reload]))	      reload_when_needed[t_reload] = RELOAD_OTHER;	  }      if (t_reload == n_reloads)	{	  /* We need to make a new tertiary reload for this register class.  */	  reload_in[t_reload] = reload_out[t_reload] = 0;	  reload_reg_class[t_reload] = t_class;	  reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;	  reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;	  reload_reg_rtx[t_reload] = 0;	  reload_optional[t_reload] = optional;	  reload_nongroup[t_reload] = 0;	  reload_inc[t_reload] = 0;	  /* Maybe we could combine these, but it seems too tricky.  */	  reload_nocombine[t_reload] = 1;	  reload_in_reg[t_reload] = 0;	  reload_out_reg[t_reload] = 0;	  reload_opnum[t_reload] = opnum;	  reload_when_needed[t_reload] = secondary_type;	  reload_secondary_in_reload[t_reload] = -1;	  reload_secondary_out_reload[t_reload] = -1;	  reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;	  reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;	  reload_secondary_p[t_reload] = 1;	  n_reloads++;	}    }  /* See if we can reuse an existing secondary reload.  */  for (s_reload = 0; s_reload < n_reloads; s_reload++)    if (reload_secondary_p[s_reload]	&& (reg_class_subset_p (class, reload_reg_class[s_reload])	    || reg_class_subset_p (reload_reg_class[s_reload], class))	&& ((in_p && reload_inmode[s_reload] == mode)	    || (! in_p && reload_outmode[s_reload] == mode))	&& ((in_p && reload_secondary_in_reload[s_reload] == t_reload)	    || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))	&& ((in_p && reload_secondary_in_icode[s_reload] == t_icode)	    || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))	&& (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)	&& MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],			     opnum, reload_opnum[s_reload]))      {	if (in_p)	  reload_inmode[s_reload] = mode;	if (! in_p)	  reload_outmode[s_reload] = mode;	if (reg_class_subset_p (class, reload_reg_class[s_reload]))	  reload_reg_class[s_reload] = class;	reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);	reload_optional[s_reload] &= optional;	reload_secondary_p[s_reload] = 1;	if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],			    opnum, reload_opnum[s_reload]))	  reload_when_needed[s_reload] = RELOAD_OTHER;      }  if (s_reload == n_reloads)    {#ifdef SECONDARY_MEMORY_NEEDED      /* If we need a memory location to copy between the two reload regs,	 set it up now.  Note that we do the input case before making	 the reload and the output case after.  This is due to the 	 way reloads are output.  */      if (in_p && icode == CODE_FOR_nothing	  && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))	get_secondary_mem (x, reload_mode, opnum, type);#endif      /* We need to make a new secondary reload for this register class.  */      reload_in[s_reload] = reload_out[s_reload] = 0;      reload_reg_class[s_reload] = class;      reload_inmode[s_reload] = in_p ? mode : VOIDmode;      reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;      reload_reg_rtx[s_reload] = 0;      reload_optional[s_reload] = optional;      reload_nongroup[s_reload] = 0;      reload_inc[s_reload] = 0;      /* Maybe we could combine these, but it seems too tricky.  */      reload_nocombine[s_reload] = 1;      reload_in_reg[s_reload] = 0;      reload_out_reg[s_reload] = 0;      reload_opnum[s_reload] = opnum;      reload_when_needed[s_reload] = secondary_type;      reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;      reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;      reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;       reload_secondary_out_icode[s_reload]	= ! in_p ? t_icode : CODE_FOR_nothing;      reload_secondary_p[s_reload] = 1;      n_reloads++;#ifdef SECONDARY_MEMORY_NEEDED      if (! in_p && icode == CODE_FOR_nothing	  && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))	get_secondary_mem (x, mode, opnum, type);#endif    }  *picode = icode;  return s_reload;}#endif /* HAVE_SECONDARY_RELOADS */#ifdef SECONDARY_MEMORY_NEEDED/* Return a memory location that will be used to copy X in mode MODE.     If we haven't already made a location for this mode in this insn,   call find_reloads_address on the location being returned.  */rtxget_secondary_mem (x, mode, opnum, type)     rtx x;     enum machine_mode mode;     int opnum;     enum reload_type type;{  rtx loc;  int mem_valid;  /* By default, if MODE is narrower than a word, widen it to a word.     This is required because most machines that require these memory     locations do not support short load and stores from all registers     (e.g., FP registers).  */#ifdef SECONDARY_MEMORY_NEEDED_MODE  mode = SECONDARY_MEMORY_NEEDED_MODE (mode);#else  if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)    mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);#endif  /* If we already have made a MEM for this operand in MODE, return it.  */  if (secondary_memlocs_elim[(int) mode][opnum] != 0)    return secondary_memlocs_elim[(int) mode][opnum];  /* If this is the first time we've tried to get a MEM for this mode,      allocate a new one.  `something_changed' in reload will get set     by noticing that the frame size has changed.  */  if (secondary_memlocs[(int) mode] == 0)    {#ifdef SECONDARY_MEMORY_NEEDED_RTX      secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);#else      secondary_memlocs[(int) mode]	= assign_stack_local (mode, GET_MODE_SIZE (mode), 0);#endif    }  /* Get a version of the address doing any eliminations needed.  If that     didn't give us a new MEM, make a new one if it isn't valid.  */  loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);  mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));  if (! mem_valid && loc == secondary_memlocs[(int) mode])    loc = copy_rtx (loc);  /* The only time the call below will do anything is if the stack     offset is too large.  In that case IND_LEVELS doesn't matter, so we     can just pass a zero.  Adjust the type to be the address of the     corresponding object.  If the address was valid, save the eliminated     address.  If it wasn't valid, we need to make a reload each time, so     don't save it.  */  if (! mem_valid)    {      type =  (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS	       : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS	       : RELOAD_OTHER);      find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),			    opnum, type, 0, 0);    }  secondary_memlocs_elim[(int) mode][opnum] = loc;  return loc;}/* Clear any secondary memory locations we've made.  */voidclear_secondary_mem (){  bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);}#endif /* SECONDARY_MEMORY_NEEDED *//* Find the largest class for which every register number plus N is valid in   M1 (if in range).  Abort if no such class exists.  */static enum reg_classfind_valid_class (m1, n)     enum machine_mode  m1;     int n;{  int class;  int regno;  enum reg_class best_class;  int best_size = 0;  for (class = 1; class < N_REG_CLASSES; class++)    {      int bad = 0;      for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)	if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)	    && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)	    && ! HARD_REGNO_MODE_OK (regno + n, m1))	  bad = 1;      if (! bad && reg_class_size[class] > best_size)	best_class = class, best_size = reg_class_size[class];    }  if (best_size == 0)    abort ();  return best_class;}/* Return the number of a previously made reload that can be combined with   a new one, or n_reloads if none of the existing reloads can be used.   OUT, CLASS, TYPE and OPNUM are the same arguments as passed to   push_reload, they determine the kind of the new reload that we try to   combine.  P_IN points to the corresponding value of IN, which can be   modified by this function.   DONT_SHARE is nonzero if we can't share any input-only reload for IN.  */static intfind_reusable_reload (p_in, out, class, type, opnum, dont_share)     rtx *p_in, out;     enum reg_class class;     enum reload_type type;     int opnum, dont_share;{  rtx in = *p_in;  int i;  /* We can't merge two reloads if the output of either one is     earlyclobbered.  */  if (earlyclobber_operand_p (out))    return n_reloads;  /* We can use an existing reload if the class is right     and at least one of IN and OUT is a match     and the other is at worst neutral.     (A zero compared against anything is neutral.)      If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are     for the same thing since that can cause us to need more reload registers     than we otherwise would.  */     for (i = 0; i < n_reloads; i++)    if ((reg_class_subset_p (class, reload_reg_class[i])	 || reg_class_subset_p (reload_reg_class[i], class))	/* If the existing reload has a register, it must fit our class.  */	&& (reload_reg_rtx[i] == 0	    || TEST_HARD_REG_BIT (reg_class_contents[(int) class],				  true_regnum (reload_reg_rtx[i])))	&& ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share	     && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))	    ||	    (out != 0 && MATCHES (reload_out[i], out)	     && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))	&& (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))	&& (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)	    && MERGABLE_RELOADS (type, reload_when_needed[i],				 opnum, reload_opnum[i]))      return i;  /* Reloading a plain reg for input can match a reload to postincrement     that reg, since the postincrement's value is the right value.     Likewise, it can match a preincrement reload, since we regard     the preincrementation as happening before any ref in this insn     to that register.  */  for (i = 0; i < n_reloads; i++)    if ((reg_class_subset_p (class, reload_reg_class[i])	 || reg_class_subset_p (reload_reg_class[i], class))	/* If the existing reload has a register, it must fit our	   class.  */	&& (reload_reg_rtx[i] == 0	    || TEST_HARD_REG_BIT (reg_class_contents[(int) class],				  true_regnum (reload_reg_rtx[i])))	&& out == 0 && reload_out[i] == 0 && reload_in[i] != 0	&& ((GET_CODE (in) == REG	     && (GET_CODE (reload_in[i]) == POST_INC		 || GET_CODE (reload_in[i]) == POST_DEC		 || GET_CODE (reload_in[i]) == PRE_INC		 || GET_CODE (reload_in[i]) == PRE_DEC)	     && MATCHES (XEXP (reload_in[i], 0), in))	    ||	    (GET_CODE (reload_in[i]) == REG	     && (GET_CODE (in) == POST_INC		 || GET_CODE (in) == POST_DEC		 || GET_CODE (in) == PRE_INC		 || GET_CODE (in) == PRE_DEC)	     && MATCHES (XEXP (in, 0), reload_in[i])))	&& (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))	&& (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)	&& MERGABLE_RELOADS (type, reload_when_needed[i],			     opnum, reload_opnum[i]))      {	/* Make sure reload_in ultimately has the increment,	   not the plain register.  */	if (GET_CODE (in) == REG)	  *p_in = reload_in[i];	return i;      }  return n_reloads;}/* Record one reload that needs to be performed.   IN is an rtx saying where the data are to be found before this instruction.   OUT says where they must be stored after the instruction.   (IN is zero for data not read, and OUT is zero for data not written.)   INLOC and OUTLOC point to the places in the instructions where   IN and OUT were found.   If IN and OUT are both non-zero, it means the same register must be used   to reload both IN and OUT.   CLASS is a register class required for the reloaded data.   INMODE is the machine mode that the instruction requires   for the reg that replaces IN and OUTMODE is likewise for OUT.   If IN is zero, then OUT's location and mode should be passed as   INLOC and INMODE.   STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.   OPTIONAL nonzero means this reload does not need to be performed:   it can be discarded if that is more convenient.   OPNUM and TYPE say what the purpose of this reload is.   The return value is the reload-number for this reload.   If both IN and OUT are nonzero, in some rare cases we might   want to make two separate reloads.  (Actually we never do this now.)   Therefore, the reload-number for OUT is stored in   output_reloadnum when we return; the return value applies to IN.   Usually (presently always), when IN and OUT are nonzero,   the two reload-numbers are equal, but the caller should be careful to   distinguish them.  */static intpush_reload (in, out, inloc, outloc, class,	     inmode, outmode, strict_low, optional, opnum, type)     rtx in, out;     rtx *inloc, *outloc;     enum reg_class class;     enum machine_mode inmode, outmode;     int strict_low;     int optional;     int opnum;     enum reload_type type;{  register int i;  int dont_share = 0;  int dont_remove_subreg = 0;  rtx *in_subreg_loc = 0, *out_subreg_loc = 0;  int secondary_in_reload = -1, secondary_out_reload = -1;  enum insn_code secondary_in_icode = CODE_FOR_nothing;  enum insn_code secondary_out_icode = CODE_FOR_nothing;  /* INMODE and/or OUTMODE could be VOIDmode if no mode     has been specified for the operand.  In that case,     use the operand's mode as the mode to reload.  */  if (inmode == VOIDmode && in != 0)    inmode = GET_MODE (in);  if (outmode == VOIDmode && out != 0)    outmode = GET_MODE (out);  /* If IN is a pseudo register everywhere-equivalent to a constant, and      it is not in a hard register, reload straight from the constant,     since we want to get rid of such pseudo registers.     Often this is done earlier, but not always in find_reloads_address.  */  if (in != 0 && GET_CODE (in) == REG)    {      register int regno = REGNO (in);      if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0	  && reg_equiv_constant[regno] != 0)	in = reg_equiv_constant[regno];    }  /* Likewise for OUT.  Of course, OUT will never be equivalent to     an actual constant, but it might be equivalent to a memory location     (in the case of a parameter).  */  if (out != 0 && GET_CODE (out) == REG)    {      register int regno = REGNO (out);      if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0	  && reg_equiv_constant[regno] != 0)	out = reg_equiv_constant[regno];    }  /* If we have a read-write operand with an address side-effect,     change either IN or OUT so the side-effect happens only once.  */  if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))    {      if (GET_CODE (XEXP (in, 0)) == POST_INC	  || GET_CODE (XEXP (in, 0)) == POST_DEC)	in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));      if (GET_CODE (XEXP (in, 0)) == PRE_INC	  || GET_CODE (XEXP (in, 0)) == PRE_DEC)	out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));    }  /* If we are reloading a (SUBREG constant ...), really reload just the     inside expression in its own mode.  Similarly for (SUBREG (PLUS ...)).     If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still     a pseudo and hence will become a MEM) with M1 wider than M2 and the     register is a pseudo, also reload the inside expression.     For machines that extend byte loads, do this for any SUBREG of a pseudo     where both M1 and M2 are a word or smaller, M1 is wider than M2, and     M2 is an integral mode that gets extended when loaded.     Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where     either M1 is not valid for R or M2 is wider than a word but we only     need one word to store an M2-sized quantity in R.     (However, if OUT is nonzero, we need to reload the reg *and*     the subreg, so do nothing here, and let following statement handle it.)     Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;     we can't handle it here because CONST_INT does not indicate a mode.     Similarly, we must reload the inside expression if we have a     STRICT_LOW_PART (presumably, in == out in the cas).     Also reload the inner expression if it does not require a secondary     reload but the SUBREG does.     Finally, reload the inner expression if it is a register that is in     the class whose registers cannot be referenced in a different size     and M1 is not the same size as M2.  If SUBREG_WORD is nonzero, we     cannot reload just the inside since we might end up with the wrong     register class.  But if it is inside a STRICT_LOW_PART, we have     no choice, so we hope we do get the right register class there.  */  if (in != 0 && GET_CODE (in) == SUBREG      && (SUBREG_WORD (in) == 0 || strict_low)#ifdef CLASS_CANNOT_CHANGE_SIZE      && class != CLASS_CANNOT_CHANGE_SIZE#endif      && (CONSTANT_P (SUBREG_REG (in))	  || GET_CODE (SUBREG_REG (in)) == PLUS	  || strict_low	  || (((GET_CODE (SUBREG_REG (in)) == REG		&& REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)	       || GET_CODE (SUBREG_REG (in)) == MEM)	      && ((GET_MODE_SIZE (inmode)		   > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))#ifdef LOAD_EXTEND_OP		  || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD		      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))			  <= UNITS_PER_WORD)		      && (GET_MODE_SIZE (inmode)			  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))		      && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))		      && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)#endif#ifdef WORD_REGISTER_OPERATIONS		  || ((GET_MODE_SIZE (inmode)		       < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))		      && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==			  ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)			   / UNITS_PER_WORD)))#endif		  ))	  || (GET_CODE (SUBREG_REG (in)) == REG	      && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER	      /* The case where out is nonzero		 is handled differently in the following statement.  */	      && (out == 0 || SUBREG_WORD (in) == 0)	      && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD		   && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))		       > UNITS_PER_WORD)		   && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))			/ UNITS_PER_WORD)		       != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),					    GET_MODE (SUBREG_REG (in)))))		  || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))					    + SUBREG_WORD (in)),					   inmode)))#ifdef SECONDARY_INPUT_RELOAD_CLASS	  || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS	      && (SECONDARY_INPUT_RELOAD_CLASS (class,						GET_MODE (SUBREG_REG (in)),						SUBREG_REG (in))		  == NO_REGS))#endif#ifdef CLASS_CANNOT_CHANGE_SIZE	  || (GET_CODE (SUBREG_REG (in)) == REG	      && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER	      && (TEST_HARD_REG_BIT		  (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],		   REGNO (SUBREG_REG (in))))	      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))		  != GET_MODE_SIZE (inmode)))#endif	  ))    {      in_subreg_loc = inloc;      inloc = &SUBREG_REG (in);      in = *inloc;#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)      if (GET_CODE (in) == MEM)	/* This is supposed to happen only for paradoxical subregs made by	   combine.c.  (SUBREG (MEM)) isn't supposed to occur other ways.  */	if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))	  abort ();#endif      inmode = GET_MODE (in);    }  /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where     either M1 is not valid for R or M2 is wider than a word but we only     need one word to store an M2-sized quantity in R.     However, we must reload the inner reg *as well as* the subreg in     that case.  */  /* Similar issue for (SUBREG constant ...) if it was not handled by the     code above.  This can happen if SUBREG_WORD != 0.  */  if (in != 0 && GET_CODE (in) == SUBREG      && (CONSTANT_P (SUBREG_REG (in))	  || (GET_CODE (SUBREG_REG (in)) == REG	      && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER	      && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))					+ SUBREG_WORD (in),					inmode)		  || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD		      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))			  > UNITS_PER_WORD)		      && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))			   / UNITS_PER_WORD)			  != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),					       GET_MODE (SUBREG_REG (in)))))))))    {      /* This relies on the fact that emit_reload_insns outputs the	 instructions for input reloads of type RELOAD_OTHER in the same	 order as the reloads.  Thus if the outer reload is also of type	 RELOAD_OTHER, we are guaranteed that this inner reload will be	 output before the outer reload.  */      push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,		   find_valid_class (inmode, SUBREG_WORD (in)),		   VOIDmode, VOIDmode, 0, 0, opnum, type);      dont_remove_subreg = 1;    }  /* Similarly for paradoxical and problematical SUBREGs on the output.     Note that there is no reason we need worry about the previous value     of SUBREG_REG (out); even if wider than out,     storing in a subreg is entitled to clobber it all     (except in the case of STRICT_LOW_PART,     and in that case the constraint should label it input-output.)  */  if (out != 0 && GET_CODE (out) == SUBREG      && (SUBREG_WORD (out) == 0 || strict_low)#ifdef CLASS_CANNOT_CHANGE_SIZE      && class != CLASS_CANNOT_CHANGE_SIZE#endif      && (CONSTANT_P (SUBREG_REG (out))	  || strict_low	  || (((GET_CODE (SUBREG_REG (out)) == REG		&& REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)	       || GET_CODE (SUBREG_REG (out)) == MEM)	      && ((GET_MODE_SIZE (outmode)		   > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))#ifdef WORD_REGISTER_OPERATIONS		  || ((GET_MODE_SIZE (outmode)		       < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))		      && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==			  ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)			   / UNITS_PER_WORD)))#endif	          ))	  || (GET_CODE (SUBREG_REG (out)) == REG	      && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER	      && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD		   && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))		       > UNITS_PER_WORD)		   && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))			/ UNITS_PER_WORD)		       != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),					    GET_MODE (SUBREG_REG (out)))))		  || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))					    + SUBREG_WORD (out)),					   outmode)))#ifdef SECONDARY_OUTPUT_RELOAD_CLASS	  || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS	      && (SECONDARY_OUTPUT_RELOAD_CLASS (class,						 GET_MODE (SUBREG_REG (out)),						 SUBREG_REG (out))		  == NO_REGS))#endif#ifdef CLASS_CANNOT_CHANGE_SIZE	  || (GET_CODE (SUBREG_REG (out)) == REG	      && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER	      && (TEST_HARD_REG_BIT		  (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],		   REGNO (SUBREG_REG (out))))	      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))		  != GET_MODE_SIZE (outmode)))#endif	  ))    {      out_subreg_loc = outloc;      outloc = &SUBREG_REG (out);      out = *outloc; #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)     if (GET_CODE (out) == MEM	  && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))	abort ();#endif      outmode = GET_MODE (out);    }  /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where     either M1 is not valid for R or M2 is wider than a word but we only     need one word to store an M2-sized quantity in R.     However, we must reload the inner reg *as well as* the subreg in     that case.  In this case, the inner reg is an in-out reload.  */  if (out != 0 && GET_CODE (out) == SUBREG      && GET_CODE (SUBREG_REG (out)) == REG      && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER      && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),				outmode)	  || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD	      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))		  > UNITS_PER_WORD)	      && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))		   / UNITS_PER_WORD)		  != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),				       GET_MODE (SUBREG_REG (out)))))))    {      /* This relies on the fact that emit_reload_insns outputs the	 instructions for output reloads of type RELOAD_OTHER in reverse	 order of the reloads.  Thus if the outer reload is also of type	 RELOAD_OTHER, we are guaranteed that this inner reload will be	 output after the outer reload.  */      dont_remove_subreg = 1;      push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),		   &SUBREG_REG (out),		   find_valid_class (outmode, SUBREG_WORD (out)),		   VOIDmode, VOIDmode, 0, 0,		   opnum, RELOAD_OTHER);    }  /* If IN appears in OUT, we can't share any input-only reload for IN.  */  if (in != 0 && out != 0 && GET_CODE (out) == MEM      && (GET_CODE (in) == REG || GET_CODE (in) == MEM)      && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))    dont_share = 1;  /* If IN is a SUBREG of a hard register, make a new REG.  This     simplifies some of the cases below.  */  if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG      && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER      && ! dont_remove_subreg)    in = gen_rtx_REG (GET_MODE (in),		      REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));  /* Similarly for OUT.  */  if (out != 0 && GET_CODE (out) == SUBREG      && GET_CODE (SUBREG_REG (out)) == REG      && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER      && ! dont_remove_subreg)    out = gen_rtx_REG (GET_MODE (out),		       REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));  /* Narrow down the class of register wanted if that is     desirable on this machine for efficiency.  */  if (in != 0)    class = PREFERRED_RELOAD_CLASS (in, class);  /* Output reloads may need analogous treatment, different in detail.  */#ifdef PREFERRED_OUTPUT_RELOAD_CLASS  if (out != 0)    class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);#endif  /* Make sure we use a class that can handle the actual pseudo     inside any subreg.  For example, on the 386, QImode regs     can appear within SImode subregs.  Although GENERAL_REGS     can handle SImode, QImode needs a smaller class.  */#ifdef LIMIT_RELOAD_CLASS  if (in_subreg_loc)    class = LIMIT_RELOAD_CLASS (inmode, class);  else if (in != 0 && GET_CODE (in) == SUBREG)    class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);  if (out_subreg_loc)    class = LIMIT_RELOAD_CLASS (outmode, class);  if (out != 0 && GET_CODE (out) == SUBREG)    class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);#endif  /* Verify that this class is at least possible for the mode that     is specified.  */  if (this_insn_is_asm)    {      enum machine_mode mode;      if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))	mode = inmode;      else	mode = outmode;      if (mode == VOIDmode)	{	  error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");	  mode = word_mode;	  if (in != 0)	    inmode = word_mode;	  if (out != 0)	    outmode = word_mode;	}      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)	if (HARD_REGNO_MODE_OK (i, mode)	    && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))	  {	    int nregs = HARD_REGNO_NREGS (i, mode);	    int j;	    for (j = 1; j < nregs; j++)	      if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))		break;	    if (j == nregs)	      break;	  }      if (i == FIRST_PSEUDO_REGISTER)	{	  error_for_asm (this_insn, "impossible register constraint in `asm'");	  class = ALL_REGS;	}    }  /* Optional output reloads are always OK even if we have no register class,     since the function of these reloads is only to have spill_reg_store etc.     set, so that the storing insn can be deleted later.  */  if (class == NO_REGS      && (optional == 0 || type != RELOAD_FOR_OUTPUT))    abort ();  i = find_reusable_reload (&in, out, class, type, opnum, dont_share);  if (i == n_reloads)    {      /* See if we need a secondary reload register to move between CLASS	 and IN or CLASS and OUT.  Get the icode and push any required reloads	 needed for each of them if so.  */#ifdef SECONDARY_INPUT_RELOAD_CLASS      if (in != 0)	secondary_in_reload	  = push_secondary_reload (1, in, opnum, optional, class, inmode, type,				   &secondary_in_icode);#endif#ifdef SECONDARY_OUTPUT_RELOAD_CLASS      if (out != 0 && GET_CODE (out) != SCRATCH)	secondary_out_reload	  = push_secondary_reload (0, out, opnum, optional, class, outmode,				   type, &secondary_out_icode);#endif      /* We found no existing reload suitable for re-use.	 So add an additional reload.  */#ifdef SECONDARY_MEMORY_NEEDED      /* If a memory location is needed for the copy, make one.  */      if (in != 0 && GET_CODE (in) == REG	  && REGNO (in) < FIRST_PSEUDO_REGISTER	  && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),				     class, inmode))	get_secondary_mem (in, inmode, opnum, type);#endif      i = n_reloads;      reload_in[i] = in;      reload_out[i] = out;      reload_reg_class[i] = class;      reload_inmode[i] = inmode;      reload_outmode[i] = outmode;      reload_reg_rtx[i] = 0;      reload_optional[i] = optional;      reload_nongroup[i] = 0;      reload_inc[i] = 0;      reload_nocombine[i] = 0;      reload_in_reg[i] = inloc ? *inloc : 0;      reload_out_reg[i] = outloc ? *outloc : 0;      reload_opnum[i] = opnum;      reload_when_needed[i] = type;      reload_secondary_in_reload[i] = secondary_in_reload;      reload_secondary_out_reload[i] = secondary_out_reload;      reload_secondary_in_icode[i] = secondary_in_icode;      reload_secondary_out_icode[i] = secondary_out_icode;      reload_secondary_p[i] = 0;      n_reloads++;#ifdef SECONDARY_MEMORY_NEEDED      if (out != 0 && GET_CODE (out) == REG	  && REGNO (out) < FIRST_PSEUDO_REGISTER	  && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),				      outmode))	get_secondary_mem (out, outmode, opnum, type);#endif    }  else    {      /* We are reusing an existing reload,	 but we may have additional information for it.	 For example, we may now have both IN and OUT	 while the old one may have just one of them.  */      /* The modes can be different.  If they are, we want to reload in	 the larger mode, so that the value is valid for both modes.  */      if (inmode != VOIDmode	  && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))	reload_inmode[i] = inmode;      if (outmode != VOIDmode	  && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))	reload_outmode[i] = outmode;      if (in != 0)	{	  rtx in_reg = inloc ? *inloc : 0;	  /* If we merge reloads for two distinct rtl expressions that	     are identical in content, there might be duplicate address	     reloads.  Remove the extra set now, so that if we later find	     that we can inherit this reload, we can get rid of the	     address reloads altogether.  */	  if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]))	    {	      /* We must keep the address reload with the lower operand		 number alive.  */	      if (opnum > reload_opnum[i])		{		  remove_address_replacements (in);		  in = reload_in[i];		  in_reg = reload_in_reg[i];		}	      else		remove_address_replacements (reload_in[i]);	    }	  reload_in[i] = in;	  reload_in_reg[i] = in_reg;	}      if (out != 0)	{	  reload_out[i] = out;	  reload_out_reg[i] = outloc ? *outloc : 0;	}      if (reg_class_subset_p (class, reload_reg_class[i]))	reload_reg_class[i] = class;      reload_optional[i] &= optional;      if (MERGE_TO_OTHER (type, reload_when_needed[i],			  opnum, reload_opnum[i]))	reload_when_needed[i] = RELOAD_OTHER;      reload_opnum[i] = MIN (reload_opnum[i], opnum);    }  /* If the ostensible rtx being reload differs from the rtx found     in the location to substitute, this reload is not safe to combine     because we cannot reliably tell whether it appears in the insn.  */  if (in != 0 && in != *inloc)    reload_nocombine[i] = 1;#if 0  /* This was replaced by changes in find_reloads_address_1 and the new     function inc_for_reload, which go with a new meaning of reload_inc.  */  /* If this is an IN/OUT reload in an insn that sets the CC,     it must be for an autoincrement.  It doesn't work to store     the incremented value after the insn because that would clobber the CC.     So we must do the increment of the value reloaded from,     increment it, store it back, then decrement again.  */  if (out != 0 && sets_cc0_p (PATTERN (this_insn)))    {      out = 0;      reload_out[i] = 0;      reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);      /* If we did not find a nonzero amount-to-increment-by,	 that contradicts the belief that IN is being incremented	 in an address in this insn.  */      if (reload_inc[i] == 0)	abort ();    }#endif  /* If we will replace IN and OUT with the reload-reg,     record where they are located so that substitution need     not do a tree walk.  */  if (replace_reloads)    {      if (inloc != 0)	{	  register struct replacement *r = &replacements[n_replacements++];	  r->what = i;	  r->subreg_loc = in_subreg_loc;	  r->where = inloc;	  r->mode = inmode;	}      if (outloc != 0 && outloc != inloc)	{	  register struct replacement *r = &replacements[n_replacements++];	  r->what = i;	  r->where = outloc;	  r->subreg_loc = out_subreg_loc;	  r->mode = outmode;	}    }  /* If this reload is just being introduced and it has both     an incoming quantity and an outgoing quantity that are     supposed to be made to match, see if either one of the two     can serve as the place to reload into.     If one of them is acceptable, set reload_reg_rtx[i]     to that one.  */  if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)    {      reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,					     inmode, outmode,					     reload_reg_class[i], i,					     earlyclobber_operand_p (out));      /* If the outgoing register already contains the same value	 as the incoming one, we can dispense with loading it.	 The easiest way to tell the caller that is to give a phony	 value for the incoming operand (same as outgoing one).  */      if (reload_reg_rtx[i] == out	  && (GET_CODE (in) == REG || CONSTANT_P (in))	  && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),				  static_reload_reg_p, i, inmode))	reload_in[i] = out;    }  /* If this is an input reload and the operand contains a register that     dies in this insn and is used nowhere else, see if it is the right class     to be used for this reload.  Use it if so.  (This occurs most commonly     in the case of paradoxical SUBREGs and in-out reloads).  We cannot do     this if it is also an output reload that mentions the register unless     the output is a SUBREG that clobbers an entire register.     Note that the operand might be one of the spill regs, if it is a     pseudo reg and we are in a block where spilling has not taken place.     But if there is no spilling in this block, that is OK.     An explicitly used hard reg cannot be a spill reg.  */  if (reload_reg_rtx[i] == 0 && in != 0)    {      rtx note;      int regno;      for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))	if (REG_NOTE_KIND (note) == REG_DEAD	    && GET_CODE (XEXP (note, 0)) == REG	    && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER	    && reg_mentioned_p (XEXP (note, 0), in)	    && ! refers_to_regno_for_reload_p (regno,					       (regno						+ HARD_REGNO_NREGS (regno,								    inmode)),					       PATTERN (this_insn), inloc)	    /* If this is also an output reload, IN cannot be used as	       the reload register if it is set in this insn unless IN	       is also OUT.  */	    && (out == 0 || in == out		|| ! hard_reg_set_here_p (regno,					  (regno					   + HARD_REGNO_NREGS (regno,							       inmode)),					  PATTERN (this_insn)))	    /* ??? Why is this code so different from the previous?	       Is there any simple coherent way to describe the two together?	       What's going on here.  */	    && (in != out		|| (GET_CODE (in) == SUBREG		    && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))			 / UNITS_PER_WORD)			== ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))			     + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))	    /* Make sure the operand fits in the reg that dies.  */	    && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))	    && HARD_REGNO_MODE_OK (regno, inmode)	    && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))	    && HARD_REGNO_MODE_OK (regno, outmode)	    && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)	    && !fixed_regs[regno])	  {	    reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);	    break;	  }    }  if (out)    output_reloadnum = i;  return i;}/* Record an additional place we must replace a value   for which we have already recorded a reload.   RELOADNUM is the value returned by push_reload   when the reload was recorded.   This is used in insn patterns that use match_dup.  */static voidpush_replacement (loc, reloadnum, mode)     rtx *loc;     int reloadnum;     enum machine_mode mode;{  if (replace_reloads)    {      register struct replacement *r = &replacements[n_replacements++];      r->what = reloadnum;      r->where = loc;      r->subreg_loc = 0;      r->mode = mode;    }}/* Transfer all replacements that used to be in reload FROM to be in   reload TO.  */voidtransfer_replacements (to, from)     int to, from;{  int i;  for (i = 0; i < n_replacements; i++)    if (replacements[i].what == from)      replacements[i].what = to;}/* IN_RTX is the value loaded by a reload that we now decided to inherit,   or a subpart of it.  If we have any replacements registered for IN_RTX,   cancel the reloads that were supposed to load them.   Return non-zero if we canceled any reloads.  */intremove_address_replacements (in_rtx)     rtx in_rtx;{  int i, j;  char reload_flags[MAX_RELOADS];  int something_changed = 0;  bzero (reload_flags, sizeof reload_flags);  for (i = 0, j = 0; i < n_replacements; i++)    {      if (loc_mentioned_in_p (replacements[i].where, in_rtx))	reload_flags[replacements[i].what] |= 1;      else	{	  replacements[j++] = replacements[i];	  reload_flags[replacements[i].what] |= 2;	}    }  /* Note that the following store must be done before the recursive calls.  */  n_replacements = j;  for (i = n_reloads - 1; i >= 0; i--)    {      if (reload_flags[i] == 1)	{	  deallocate_reload_reg (i);	  remove_address_replacements (reload_in[i]);	  reload_in[i] = 0;	  something_changed = 1;	}    }  return something_changed;}/* Return non-zero if IN contains a piece of rtl that has the address LOC */static intloc_mentioned_in_p (loc, in)     rtx *loc, in;{  enum rtx_code code = GET_CODE (in);  char *fmt = GET_RTX_FORMAT (code);  int i, j;  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)    {      if (loc == &XEXP (in, i))	return 1;      if (fmt[i] == 'e')        {	  if (loc_mentioned_in_p (loc, XEXP (in, i)))	    return 1;        }      else if (fmt[i] == 'E')	for (j = XVECLEN (in, i) - 1; i >= 0; i--)	  if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))	    return 1;    }  return 0;}/* If there is only one output reload, and it is not for an earlyclobber   operand, try to combine it with a (logically unrelated) input reload   to reduce the number of reload registers needed.   This is safe if the input reload does not appear in   the value being output-reloaded, because this implies   it is not needed any more once the original insn completes.   If that doesn't work, see we can use any of the registers that   die in this insn as a reload register.  We can if it is of the right   class and does not appear in the value being output-reloaded.  */static voidcombine_reloads (){  int i;  int output_reload = -1;  int secondary_out = -1;  rtx note;  /* Find the output reload; return unless there is exactly one     and that one is mandatory.  */  for (i = 0; i < n_reloads; i++)    if (reload_out[i] != 0)      {	if (output_reload >= 0)	  return;	output_reload = i;      }  if (output_reload < 0 || reload_optional[output_reload])    return;  /* An input-output reload isn't combinable.  */  if (reload_in[output_reload] != 0)    return;  /* If this reload is for an earlyclobber operand, we can't do anything.  */  if (earlyclobber_operand_p (reload_out[output_reload]))    return;  /* Check each input reload; can we combine it?  */  for (i = 0; i < n_reloads; i++)    if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]	/* Life span of this reload must not extend past main insn.  */	&& reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS	&& reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS	&& reload_when_needed[i] != RELOAD_OTHER	&& (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])	    == CLASS_MAX_NREGS (reload_reg_class[output_reload],				reload_outmode[output_reload]))	&& reload_inc[i] == 0	&& reload_reg_rtx[i] == 0#ifdef SECONDARY_MEMORY_NEEDED	/* Don't combine two reloads with different secondary	   memory locations.  */	&& (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0	    || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0	    || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],			    secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))#endif	&& (SMALL_REGISTER_CLASSES	    ? (reload_reg_class[i] == reload_reg_class[output_reload])	    : (reg_class_subset_p (reload_reg_class[i],				   reload_reg_class[output_reload])	       || reg_class_subset_p (reload_reg_class[output_reload],				      reload_reg_class[i])))	&& (MATCHES (reload_in[i], reload_out[output_reload])	    /* Args reversed because the first arg seems to be	       the one that we imagine being modified	       while the second is the one that might be affected.  */	    || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],						      reload_in[i])		/* However, if the input is a register that appears inside		   the output, then we also can't share.		   Imagine (set (mem (reg 69)) (plus (reg 69) ...)).		   If the same reload reg is used for both reg 69 and the		   result to be stored in memory, then that result		   will clobber the address of the memory ref.  */		&& ! (GET_CODE (reload_in[i]) == REG		      && reg_overlap_mentioned_for_reload_p (reload_in[i],							     reload_out[output_reload]))))	&& (reg_class_size[(int) reload_reg_class[i]]	    || SMALL_REGISTER_CLASSES)	/* We will allow making things slightly worse by combining an	   input and an output, but no worse than that.  */	&& (reload_when_needed[i] == RELOAD_FOR_INPUT	    || reload_when_needed[i] == RELOAD_FOR_OUTPUT))      {	int j;	/* We have found a reload to combine with!  */	reload_out[i] = reload_out[output_reload];	reload_out_reg[i] = reload_out_reg[output_reload];	reload_outmode[i] = reload_outmode[output_reload];	/* Mark the old output reload as inoperative.  */	reload_out[output_reload] = 0;	/* The combined reload is needed for the entire insn.  */	reload_when_needed[i] = RELOAD_OTHER;	/* If the output reload had a secondary reload, copy it.  */	if (reload_secondary_out_reload[output_reload] != -1)	  {	    reload_secondary_out_reload[i]	      = reload_secondary_out_reload[output_reload];	    reload_secondary_out_icode[i]	      = reload_secondary_out_icode[output_reload];	  }#ifdef SECONDARY_MEMORY_NEEDED	/* Copy any secondary MEM.  */	if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)	  secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]	    = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];#endif	/* If required, minimize the register class.  */	if (reg_class_subset_p (reload_reg_class[output_reload],				reload_reg_class[i]))	  reload_reg_class[i] = reload_reg_class[output_reload];	/* Transfer all replacements from the old reload to the combined.  */	for (j = 0; j < n_replacements; j++)	  if (replacements[j].what == output_reload)	    replacements[j].what = i;	return;      }  /* If this insn has only one operand that is modified or written (assumed     to be the first),  it must be the one corresponding to this reload.  It     is safe to use anything that dies in this insn for that output provided     that it does not occur in the output (we already know it isn't an     earlyclobber.  If this is an asm insn, give up.  */  if (INSN_CODE (this_insn) == -1)    return;  for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)    if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='	|| insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')      return;  /* See if some hard register that dies in this insn and is not used in     the output is the right class.  Only works if the register we pick     up can fully hold our output reload.  */  for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))    if (REG_NOTE_KIND (note) == REG_DEAD	&& GET_CODE (XEXP (note, 0)) == REG	&& ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),						 reload_out[output_reload])	&& REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER	&& HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])	&& TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],			      REGNO (XEXP (note, 0)))	&& (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])	    <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))	/* Ensure that a secondary or tertiary reload for this output	   won't want this register.  */        && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1            || (! (TEST_HARD_REG_BIT		    (reg_class_contents[(int) reload_reg_class[secondary_out]],		     REGNO (XEXP (note, 0))))		&& ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1		    ||  ! (TEST_HARD_REG_BIT			   (reg_class_contents[(int) reload_reg_class[secondary_out]],			    REGNO (XEXP (note, 0)))))))	&& ! fixed_regs[REGNO (XEXP (note, 0))])      {	reload_reg_rtx[output_reload]	  = gen_rtx_REG (reload_outmode[output_reload],			 REGNO (XEXP (note, 0)));	return;      }}/* Try to find a reload register for an in-out reload (expressions IN and OUT).   See if one of IN and OUT is a register that may be used;   this is desirable since a spill-register won't be needed.   If so, return the register rtx that proves acceptable.   INLOC and OUTLOC are locations where IN and OUT appear in the insn.   CLASS is the register class required for the reload.   If FOR_REAL is >= 0, it is the number of the reload,   and in some cases when it can be discovered that OUT doesn't need   to be computed, clear out reload_out[FOR_REAL].   If FOR_REAL is -1, this should not be done, because this call   is just to see if a register can be found, not to find and install it.   EARLYCLOBBER is non-zero if OUT is an earlyclobber operand.  This   puts an additional constraint on being able to use IN for OUT since   IN must not appear elsewhere in the insn (it is assumed that IN itself   is safe from the earlyclobber).  */static rtxfind_dummy_reload (real_in, real_out, inloc, outloc,		   inmode, outmode, class, for_real, earlyclobber)     rtx real_in, real_out;     rtx *inloc, *outloc;     enum machine_mode inmode, outmode;     enum reg_class class;     int for_real;     int earlyclobber;{  rtx in = real_in;  rtx out = real_out;  int in_offset = 0;  int out_offset = 0;  rtx value = 0;  /* If operands exceed a word, we can't use either of them     unless they have the same size.  */  if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)      && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD	  || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))    return 0;  /* Find the inside of any subregs.  */  while (GET_CODE (out) == SUBREG)    {      out_offset = SUBREG_WORD (out);      out = SUBREG_REG (out);    }  while (GET_CODE (in) == SUBREG)    {      in_offset = SUBREG_WORD (in);      in = SUBREG_REG (in);    }  /* Narrow down the reg class, the same way push_reload will;     otherwise we might find a dummy now, but push_reload won't.  */  class = PREFERRED_RELOAD_CLASS (in, class);  /* See if OUT will do.  */  if (GET_CODE (out) == REG      && REGNO (out) < FIRST_PSEUDO_REGISTER)    {      register int regno = REGNO (out) + out_offset;      int nwords = HARD_REGNO_NREGS (regno, outmode);      rtx saved_rtx;      /* When we consider whether the insn uses OUT,	 ignore references within IN.  They don't prevent us	 from copying IN into OUT, because those refs would	 move into the insn that reloads IN.	 However, we only ignore IN in its role as this reload.	 If the insn uses IN elsewhere and it contains OUT,	 that counts.  We can't be sure it's the "same" operand	 so it might not go through this reload.  */      saved_rtx = *inloc;      *inloc = const0_rtx;      if (regno < FIRST_PSEUDO_REGISTER	  /* A fixed reg that can overlap other regs better not be used	     for reloading in any way.  */#ifdef OVERLAPPING_REGNO_P	  && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))#endif	  && ! refers_to_regno_for_reload_p (regno, regno + nwords,					     PATTERN (this_insn), outloc))	{	  int i;	  for (i = 0; i < nwords; i++)	    if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],				     regno + i))	      break;	  if (i == nwords)	    {	      if (GET_CODE (real_out) == REG)		value = real_out;	      else		value = gen_rtx_REG (outmode, regno);	    }	}      *inloc = saved_rtx;    }  /* Consider using IN if OUT was not acceptable     or if OUT dies in this insn (like the quotient in a divmod insn).     We can't use IN unless it is dies in this insn,     which means we must know accurately which hard regs are live.     Also, the result can't go in IN if IN is used within OUT,     or if OUT is an earlyclobber and IN appears elsewhere in the insn.  */  if (hard_regs_live_known      && GET_CODE (in) == REG      && REGNO (in) < FIRST_PSEUDO_REGISTER      && (value == 0	  || find_reg_note (this_insn, REG_UNUSED, real_out))      && find_reg_note (this_insn, REG_DEAD, real_in)      && !fixed_regs[REGNO (in)]      && HARD_REGNO_MODE_OK (REGNO (in),			     /* The only case where out and real_out might				have different modes is where real_out				is a subreg, and in that case, out				has a real mode.  */			     (GET_MODE (out) != VOIDmode			      ? GET_MODE (out) : outmode)))    {      register int regno = REGNO (in) + in_offset;      int nwords = HARD_REGNO_NREGS (regno, inmode);      if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)	  && ! hard_reg_set_here_p (regno, regno + nwords,				    PATTERN (this_insn))	  && (! earlyclobber	      || ! refers_to_regno_for_reload_p (regno, regno + nwords,						 PATTERN (this_insn), inloc)))	{	  int i;	  for (i = 0; i < nwords; i++)	    if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],				     regno + i))	      break;	  if (i == nwords)	    {	      /* If we were going to use OUT as the reload reg		 and changed our mind, it means OUT is a dummy that		 dies here.  So don't bother copying value to it.  */	      if (for_real >= 0 && value == real_out)		reload_out[for_real] = 0;	      if (GET_CODE (real_in) == REG)		value = real_in;	      else		value = gen_rtx_REG (inmode, regno);	    }	}    }  return value;}/* This page contains subroutines used mainly for determining   whether the IN or an OUT of a reload can serve as the   reload register.  *//* Return 1 if X is an operand of an insn that is being earlyclobbered.  */static intearlyclobber_operand_p (x)     rtx x;{  int i;  for (i = 0; i < n_earlyclobbers; i++)    if (reload_earlyclobbers[i] == x)      return 1;  return 0;}/* Return 1 if expression X alters a hard reg in the range   from BEG_REGNO (inclusive) to END_REGNO (exclusive),   either explicitly or in the guise of a pseudo-reg allocated to REGNO.   X should be the body of an instruction.  */static inthard_reg_set_here_p (beg_regno, end_regno, x)     register int beg_regno, end_regno;     rtx x;{  if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)    {      register rtx op0 = SET_DEST (x);      while (GET_CODE (op0) == SUBREG)	op0 = SUBREG_REG (op0);      if (GET_CODE (op0) == REG)	{	  register int r = REGNO (op0);	  /* See if this reg overlaps range under consideration.  */	  if (r < end_regno	      && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)	    return 1;	}    }  else if (GET_CODE (x) == PARALLEL)    {      register int i = XVECLEN (x, 0) - 1;      for (; i >= 0; i--)	if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))	  return 1;    }  return 0;}/* Return 1 if ADDR is a valid memory address for mode MODE,   and check that each pseudo reg has the proper kind of   hard reg.  */intstrict_memory_address_p (mode, addr)     enum machine_mode mode;     register rtx addr;{  GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);  return 0; win:  return 1;}/* Like rtx_equal_p except that it allows a REG and a SUBREG to match   if they are the same hard reg, and has special hacks for   autoincrement and autodecrement.   This is specifically intended for find_reloads to use   in determining whether two operands match.   X is the operand whose number is the lower of the two.   The value is 2 if Y contains a pre-increment that matches   a non-incrementing address in X.  *//* ??? To be completely correct, we should arrange to pass   for X the output operand and for Y the input operand.   For now, we assume that the output operand has the lower number   because that is natural in (SET output (... input ...)).  */intoperands_match_p (x, y)     register rtx x, y;{  register int i;  register RTX_CODE code = GET_CODE (x);  register char *fmt;  int success_2;        if (x == y)    return 1;  if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))      && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG				  && GET_CODE (SUBREG_REG (y)) == REG)))    {      register int j;      if (code == SUBREG)	{	  i = REGNO (SUBREG_REG (x));	  if (i >= FIRST_PSEUDO_REGISTER)	    goto slow;	  i += SUBREG_WORD (x);	}      else	i = REGNO (x);      if (GET_CODE (y) == SUBREG)	{	  j = REGNO (SUBREG_REG (y));	  if (j >= FIRST_PSEUDO_REGISTER)	    goto slow;	  j += SUBREG_WORD (y);	}      else	j = REGNO (y);      /* On a WORDS_BIG_ENDIAN machine, point to the last register of a	 multiple hard register group, so that for example (reg:DI 0) and	 (reg:SI 1) will be considered the same register.  */      if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD	  && i < FIRST_PSEUDO_REGISTER)	i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;      if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD	  && j < FIRST_PSEUDO_REGISTER)	j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;      return i == j;    }  /* If two operands must match, because they are really a single     operand of an assembler insn, then two postincrements are invalid     because the assembler insn would increment only once.     On the other hand, an postincrement matches ordinary indexing     if the postincrement is the output operand.  */  if (code == POST_DEC || code == POST_INC)    return operands_match_p (XEXP (x, 0), y);  /* Two preincrements are invalid     because the assembler insn would increment only once.     On the other hand, an preincrement matches ordinary indexing     if the preincrement is the input operand.     In this case, return 2, since some callers need to do special     things when this happens.  */  if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)    return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; slow:  /* Now we have disposed of all the cases      in which different rtx codes can match.  */  if (code != GET_CODE (y))    return 0;  if (code == LABEL_REF)    return XEXP (x, 0) == XEXP (y, 0);  if (code == SYMBOL_REF)    return XSTR (x, 0) == XSTR (y, 0);  /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.  */  if (GET_MODE (x) != GET_MODE (y))    return 0;  /* Compare the elements.  If any pair of corresponding elements     fail to match, return 0 for the whole things.  */  success_2 = 0;  fmt = GET_RTX_FORMAT (code);  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)    {      int val, j;      switch (fmt[i])	{	case 'w':	  if (XWINT (x, i) != XWINT (y, i))	    return 0;	  break;	case 'i':	  if (XINT (x, i) != XINT (y, i))	    return 0;	  break;	case 'e':	  val = operands_match_p (XEXP (x, i), XEXP (y, i));	  if (val == 0)	    return 0;	  /* If any subexpression returns 2,	     we should return 2 if we are successful.  */	  if (val == 2)	    success_2 = 1;	  break;	case '0':	  break;	case 'E':	  if (XVECLEN (x, i) != XVECLEN (y, i))	    return 0;	  for (j = XVECLEN (x, i) - 1; j >= 0; --j)	    {	      val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));	      if (val == 0)		return 0;	      if (val == 2)		success_2 = 1;	    }	  break;	  /* It is believed that rtx's at this level will never	     contain anything but integers and other rtx's,	     except for within LABEL_REFs and SYMBOL_REFs.  */	default:	  abort ();	}    }  return 1 + success_2;}/* Describe the range of registers or memory referenced by X.   If X is a register, set REG_FLAG and put the first register    number into START and the last plus one into END.   If X is a memory reference, put a base address into BASE    and a range of integer offsets into START and END.   If X is pushing on the stack, we can assume it causes no trouble,    so we set the SAFE field.  */static struct decompositiondecompose (x)     rtx x;{  struct decomposition val;  int all_const = 0;  val.reg_flag = 0;  val.safe = 0;  val.base = 0;  if (GET_CODE (x) == MEM)    {      rtx base, offset = 0;      rtx addr = XEXP (x, 0);      if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC	  || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)	{	  val.base = XEXP (addr, 0);	  val.start = - GET_MODE_SIZE (GET_MODE (x));	  val.end = GET_MODE_SIZE (GET_MODE (x));	  val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;	  return val;	}      if (GET_CODE (addr) == CONST)	{	  addr = XEXP (addr, 0);	  all_const = 1;	}      if (GET_CODE (addr) == PLUS)	{	  if (CONSTANT_P (XEXP (addr, 0)))	    {	      base = XEXP (addr, 1);	      offset = XEXP (addr, 0);	    }	  else if (CONSTANT_P (XEXP (addr, 1)))	    {	      base = XEXP (addr, 0);	      offset = XEXP (addr, 1);	    }	}      if (offset == 0)	{	  base = addr;	  offset = const0_rtx;	}       if (GET_CODE (offset) == CONST)	offset = XEXP (offset, 0);      if (GET_CODE (offset) == PLUS)	{	  if (GET_CODE (XEXP (offset, 0)) == CONST_INT)	    {	      base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));	      offset = XEXP (offset, 0);	    }	  else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)	    {	      base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));	      offset = XEXP (offset, 1);	    }	  else	    {	      base = gen_rtx_PLUS (GET_MODE (base), base, offset);	      offset = const0_rtx;	    }	}      else if (GET_CODE (offset) != CONST_INT)	{	  base = gen_rtx_PLUS (GET_MODE (base), base, offset);	  offset = const0_rtx;	}      if (all_const && GET_CODE (base) == PLUS)	base = gen_rtx_CONST (GET_MODE (base), base);      if (GET_CODE (offset) != CONST_INT)	abort ();      val.start = INTVAL (offset);      val.end = val.start + GET_MODE_SIZE (GET_MODE (x));      val.base = base;      return val;    }  else if (GET_CODE (x) == REG)    {      val.reg_flag = 1;      val.start = true_regnum (x);       if (val.start < 0)	{	  /* A pseudo with no hard reg.  */	  val.start = REGNO (x);	  val.end = val.start + 1;	}      else	/* A hard reg.  */	val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));    }  else if (GET_CODE (x) == SUBREG)    {      if (GET_CODE (SUBREG_REG (x)) != REG)	/* This could be more precise, but it's good enough.  */	return decompose (SUBREG_REG (x));      val.reg_flag = 1;      val.start = true_regnum (x);       if (val.start < 0)	return decompose (SUBREG_REG (x));      else	/* A hard reg.  */	val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));    }  else if (CONSTANT_P (x)	   /* This hasn't been assigned yet, so it can't conflict yet.  */	   || GET_CODE (x) == SCRATCH)    val.safe = 1;  else    abort ();  return val;}