"	.set	mips0					\n"
static inline void set_bit(unsigned long nr, volatile unsigned long *addr){	unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);	unsigned long temp;	if (cpu_has_llsc && R10000_LLSC_WAR) {		__asm__ __volatile__(		"1:	" __LL "%0, %1			# set_bit	\n"		"	or	%0, %2					\n"		"	"__SC	"%0, %1					\n"		"	beqzl	%0, 1b					\n"		: "=&r" (temp), "=m" (*m)		: "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));	} else if (cpu_has_llsc) {		__asm__ __volatile__(		"1:	" __LL "%0, %1			# set_bit	\n"		"	or	%0, %2					\n"		"	"__SC	"%0, %1					\n"		"	beqz	%0, 1b					\n"		: "=&r" (temp), "=m" (*m)		: "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));	} else {		volatile unsigned long *a = addr;		unsigned long mask;		__bi_flags;		a += nr >> SZLONG_LOG;		mask = 1UL << (nr & SZLONG_MASK);		__bi_local_irq_save(flags);		*a |= mask;		__bi_local_irq_restore(flags);	}}