void	*dec_eb64plus_intr_establish __P((void *, pci_intr_handle_t, int, int (*func)(void *), void *, char *)); void	dec_eb64plus_intr_disestablish(void *, void *);  #define	EB64PLUS_MAX_IRQ	32 #define	PCI_STRAY_MAX		5  struct alpha_shared_intr *eb64plus_pci_intr;  bus_space_tag_t eb64plus_intrgate_iot; bus_space_handle_t eb64plus_intrgate_ioh;  void	eb64plus_iointr(void *arg, unsigned long vec); extern void	eb64plus_intr_enable(int irq);   extern void	eb64plus_intr_disable(int irq);   void pci_eb64plus_pickintr(acp) struct apecs_config *acp; { bus_space_tag_t iot = &acp->ac_iot; pci_chipset_tag_t pc = &acp->ac_pc; int i;  pc->pc_intr_v = acp; pc->pc_intr_map = dec_eb64plus_intr_map; pc->pc_intr_string = dec_eb64plus_intr_string; pc->pc_intr_establish = dec_eb64plus_intr_establish; pc->pc_intr_disestablish = dec_eb64plus_intr_disestablish;   pc->pc_pciide_compat_intr_establish = NULL;  eb64plus_intrgate_iot = iot; if (bus_space_map(eb64plus_intrgate_iot, 0x804, 3, 0, &eb64plus_intrgate_ioh) != 0) panic("pci_eb64plus_pickintr: couldn't map interrupt PLD"); for (i = 0; i < EB64PLUS_MAX_IRQ; i++) eb64plus_intr_disable(i);  eb64plus_pci_intr = alpha_shared_intr_alloc(EB64PLUS_MAX_IRQ); for (i = 0; i < EB64PLUS_MAX_IRQ; i++) { alpha_shared_intr_set_maxstrays(eb64plus_pci_intr, i, PCI_STRAY_MAX); }  #if NSIO sio_intr_setup(pc, iot); #endif set_iointr(eb64plus_iointr); }  int dec_eb64plus_intr_map(acv, bustag, buspin, line, ihp) void *acv; pcitag_t bustag; int buspin, line; pci_intr_handle_t *ihp; { struct apecs_config *acp = acv; pci_chipset_tag_t pc = &acp->ac_pc; int bus, device, function;  if (buspin == 0) {  return 1; } if (buspin > 4) { printf("dec_eb64plus_intr_map: bad interrupt pin %d\n", buspin); return 1; }  alpha_pci_decompose_tag(pc, bustag, &bus, &device, &function);   if (line == 0xff) { printf("dec_eb64plus_intr_map: no mapping for %d/%d/%d\n", bus, device, function); return (1); }  if (line >= EB64PLUS_MAX_IRQ) panic("dec_eb64plus_intr_map: eb64+ irq too large (%d)\n", line);  *ihp = line; return (0); }  const char * dec_eb64plus_intr_string(acv, ih) void *acv; pci_intr_handle_t ih; { static char irqstr[15];            if (ih > EB64PLUS_MAX_IRQ) panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx\n", ih); sprintf(irqstr, "eb64+ irq %ld", ih); return (irqstr); }  void *
void	*dec_eb64plus_intr_establish __P((void *, pci_intr_handle_t,	    int, int (*func)(void *), void *, char *));void	dec_eb64plus_intr_disestablish(void *, void *);#define	EB64PLUS_MAX_IRQ	32#define	PCI_STRAY_MAX		5struct alpha_shared_intr *eb64plus_pci_intr;bus_space_tag_t eb64plus_intrgate_iot;bus_space_handle_t eb64plus_intrgate_ioh;void	eb64plus_iointr(void *arg, unsigned long vec);extern void	eb64plus_intr_enable(int irq);  /* pci_eb64plus_intr.S */extern void	eb64plus_intr_disable(int irq); /* pci_eb64plus_intr.S */voidpci_eb64plus_pickintr(acp)	struct apecs_config *acp;{	bus_space_tag_t iot = &acp->ac_iot;	pci_chipset_tag_t pc = &acp->ac_pc;	int i;        pc->pc_intr_v = acp;        pc->pc_intr_map = dec_eb64plus_intr_map;        pc->pc_intr_string = dec_eb64plus_intr_string;        pc->pc_intr_establish = dec_eb64plus_intr_establish;        pc->pc_intr_disestablish = dec_eb64plus_intr_disestablish;	/* Not supported on the EB64+. */	pc->pc_pciide_compat_intr_establish = NULL;	eb64plus_intrgate_iot = iot;	if (bus_space_map(eb64plus_intrgate_iot, 0x804, 3, 0,	    &eb64plus_intrgate_ioh) != 0)		panic("pci_eb64plus_pickintr: couldn't map interrupt PLD");	for (i = 0; i < EB64PLUS_MAX_IRQ; i++)		eb64plus_intr_disable(i);		eb64plus_pci_intr = alpha_shared_intr_alloc(EB64PLUS_MAX_IRQ);	for (i = 0; i < EB64PLUS_MAX_IRQ; i++) {		alpha_shared_intr_set_maxstrays(eb64plus_pci_intr, i,			PCI_STRAY_MAX);	}#if NSIO	sio_intr_setup(pc, iot);#endif	set_iointr(eb64plus_iointr);}int     dec_eb64plus_intr_map(acv, bustag, buspin, line, ihp)	void *acv;	pcitag_t bustag;	int buspin, line;        pci_intr_handle_t *ihp;{	struct apecs_config *acp = acv;	pci_chipset_tag_t pc = &acp->ac_pc;	int bus, device, function;	if (buspin == 0) {		/* No IRQ used. */		return 1;	}	if (buspin > 4) {		printf("dec_eb64plus_intr_map: bad interrupt pin %d\n", buspin);		return 1;	}	alpha_pci_decompose_tag(pc, bustag, &bus, &device, &function);	/*	 * The console places the interrupt mapping in the "line" value.	 * A value of (char)-1 indicates there is no mapping.	 */	if (line == 0xff) {		printf("dec_eb64plus_intr_map: no mapping for %d/%d/%d\n",		    bus, device, function);		return (1);	}	if (line >= EB64PLUS_MAX_IRQ)		panic("dec_eb64plus_intr_map: eb64+ irq too large (%d)\n",		    line);	*ihp = line;	return (0);}const char *dec_eb64plus_intr_string(acv, ih)	void *acv;	pci_intr_handle_t ih;{        static char irqstr[15];          /* 11 + 2 + NULL + sanity */        if (ih > EB64PLUS_MAX_IRQ)                panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx\n", ih);        sprintf(irqstr, "eb64+ irq %ld", ih);        return (irqstr);}void *dec_eb64plus_intr_establish(acv, ih, level, func, arg, name)        void *acv;        pci_intr_handle_t ih;        int level;        int (*func)(void *);	void *arg;	char *name;{	void *cookie;	if (ih > EB64PLUS_MAX_IRQ)		panic("dec_eb64plus_intr_establish: bogus eb64+ IRQ 0x%lx\n",		    ih);	cookie = alpha_shared_intr_establish(eb64plus_pci_intr, ih, IST_LEVEL,	    level, func, arg, name);	if (cookie != NULL && alpha_shared_intr_isactive(eb64plus_pci_intr, ih))		eb64plus_intr_enable(ih);	return (cookie);}