pci_read_config_byte(dev, PCI_LATENCY_TIMER, &test); if (test != 0x78) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78);
if (hpt_revision(dev) >= 3) ret = init_hpt37x(dev); else ret = init_hpt366(dev);
static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name){	int ret = 0;	u8 test = 0;	if (dev->resource[PCI_ROM_RESOURCE].start)		pci_write_config_byte(dev, PCI_ROM_ADDRESS,			dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);	pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &test);	if (test != (L1_CACHE_BYTES / 4))		pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,			(L1_CACHE_BYTES / 4));	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &test);	if (test != 0x78)		pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78);	pci_read_config_byte(dev, PCI_MIN_GNT, &test);	if (test != 0x08)		pci_write_config_byte(dev, PCI_MIN_GNT, 0x08);	pci_read_config_byte(dev, PCI_MAX_LAT, &test);	if (test != 0x08)		pci_write_config_byte(dev, PCI_MAX_LAT, 0x08);	if (hpt_minimum_revision(dev, 3)) {		ret = init_hpt37x(dev);	} else {		ret =init_hpt366(dev);	}	if (ret)		return ret;	return dev->irq;}