set_current_state(TASK_UNINTERRUPTIBLE); schedule_timeout(1);
schedule_timeout_uninterruptible(1);
static int rx_sync_cmd(struct aac_dev *dev, u32 command,	u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,	u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4){	unsigned long start;	int ok;	/*	 *	Write the command into Mailbox 0	 */	rx_writel(dev, InboundMailbox0, command);	/*	 *	Write the parameters into Mailboxes 1 - 6	 */	rx_writel(dev, InboundMailbox1, p1);	rx_writel(dev, InboundMailbox2, p2);	rx_writel(dev, InboundMailbox3, p3);	rx_writel(dev, InboundMailbox4, p4);	/*	 *	Clear the synch command doorbell to start on a clean slate.	 */	rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);	/*	 *	Disable doorbell interrupts	 */	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);	/*	 *	Force the completion of the mask register write before issuing	 *	the interrupt.	 */	rx_readb (dev, MUnit.OIMR);	/*	 *	Signal that there is a new synch command	 */	rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);	ok = 0;	start = jiffies;	/*	 *	Wait up to 30 seconds	 */	while (time_before(jiffies, start+30*HZ)) 	{		udelay(5);	/* Delay 5 microseconds to let Mon960 get info. */		/*		 *	Mon960 will set doorbell0 bit when it has completed the command.		 */		if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {			/*			 *	Clear the doorbell.			 */			rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);			ok = 1;			break;		}		/*		 *	Yield the processor in case we are slow 		 */		set_current_state(TASK_UNINTERRUPTIBLE);		schedule_timeout(1);	}	if (ok != 1) {		/*		 *	Restore interrupt mask even though we timed out		 */		if (dev->new_comm_interface)			rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);		else			rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);		return -ETIMEDOUT;	}	/*	 *	Pull the synch status from Mailbox 0.	 */	if (status)		*status = rx_readl(dev, IndexRegs.Mailbox[0]);	if (r1)		*r1 = rx_readl(dev, IndexRegs.Mailbox[1]);	if (r2)		*r2 = rx_readl(dev, IndexRegs.Mailbox[2]);	if (r3)		*r3 = rx_readl(dev, IndexRegs.Mailbox[3]);	if (r4)		*r4 = rx_readl(dev, IndexRegs.Mailbox[4]);	/*	 *	Clear the synch command doorbell.	 */	rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);	/*	 *	Restore interrupt mask	 */	if (dev->new_comm_interface)		rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);	else		rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);	return 0;}