if(!(address & 0x10000))   *((u16 *)&vram[address & 0xFFFE]) = (b << 8) | b;
if ((address & 0xFFFFFF) < objTilesAddress[((DISPCNT&7)+1)>>2]) *((u16 *)&vram[address & 0x1FFFE]) = (b << 8) | b;
void CPUWriteByte(u32 address, u8 b){  switch(address >> 24) {  case 2:#ifdef SDL      if(freezeWorkRAM[address & 0x3FFFF])        cheatsWriteByte(address & 0x203FFFF, b);      else#endif          workRAM[address & 0x3FFFF] = b;    break;  case 3:#ifdef SDL    if(freezeInternalRAM[address & 0x7fff])      cheatsWriteByte(address & 0x3007fff, b);    else#endif      internalRAM[address & 0x7fff] = b;    break;  case 4:    if(address < 0x4000400) {      switch(address & 0x3FF) {      case 0x301:	if(b == 0x80)	  stopState = true;	holdState = 1;	holdType = -1;	cpuNextEvent = 0;	break;      case 0x60:      case 0x61:      case 0x62:      case 0x63:      case 0x64:      case 0x65:      case 0x68:      case 0x69:      case 0x6c:      case 0x6d:      case 0x70:      case 0x71:      case 0x72:      case 0x73:      case 0x74:      case 0x75:      case 0x78:      case 0x79:      case 0x7c:      case 0x7d:      case 0x80:      case 0x81:      case 0x84:      case 0x85:      case 0x90:      case 0x91:      case 0x92:      case 0x93:      case 0x94:      case 0x95:      case 0x96:      case 0x97:      case 0x98:      case 0x99:      case 0x9a:      case 0x9b:      case 0x9c:      case 0x9d:      case 0x9e:      case 0x9f:      	soundEvent(address&0xFF, b);	break;      default:	if(address & 1)	  CPUUpdateRegister(address & 0x3fe,			    ((READ16LE(((u16 *)&ioMem[address & 0x3fe])))			     & 0x00FF) |			    b<<8);	else	  CPUUpdateRegister(address & 0x3fe,			    ((READ16LE(((u16 *)&ioMem[address & 0x3fe])) & 0xFF00) | b));      }      break;    } else goto unwritable;    break;  case 5:    // no need to switch    *((u16 *)&paletteRAM[address & 0x3FE]) = (b << 8) | b;    break;  case 6:    // no need to switch     // byte writes to OBJ VRAM are ignored    if(!(address & 0x10000))      //      *((u16 *)&vram[address & 0x17FFE]) = (b << 8) | b;      //    else      *((u16 *)&vram[address & 0xFFFE]) = (b << 8) | b;    break;  case 7:    // no need to switch    // byte writes to OAM are ignored    //    *((u16 *)&oam[address & 0x3FE]) = (b << 8) | b;    break;      case 13:    if(cpuEEPROMEnabled) {      eepromWrite(address, b);      break;    }    goto unwritable;  case 14:    if(!eepromInUse | cpuSramEnabled | cpuFlashEnabled) {      (*cpuSaveGameFunc)(address, b);      break;    }    // default  default:  unwritable:#ifdef DEV_VERSION    if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {      log("Illegal byte write: %02x to %08x from %08x\n",          b,          address,          armMode ? armNextPC - 4 : armNextPC -2 );    }#endif    break;  }}