value =  READ16LE(((u16 *)&ioMem[address & 0x3fe]));
{ if (((address & 0x3fe)>0xFF) && ((address & 0x3fe)<0x10E)) { if (((address & 0x3fe) == 0x100) && timer0On) value = 0xFFFF - ((timer0Ticks-cpuTotalTicks) >> timer0ClockReload); else if (((address & 0x3fe) == 0x104) && timer1On && !(TM1CNT & 4)) value = 0xFFFF - ((timer1Ticks-cpuTotalTicks) >> timer1ClockReload); else if (((address & 0x3fe) == 0x108) && timer2On && !(TM2CNT & 4)) value = 0xFFFF - ((timer2Ticks-cpuTotalTicks) >> timer2ClockReload); else if (((address & 0x3fe) == 0x10C) && timer3On && !(TM3CNT & 4)) value = 0xFFFF - ((timer3Ticks-cpuTotalTicks) >> timer3ClockReload); } else value =  READ16LE(((u16 *)&ioMem[address & 0x3fe])); }
inline u32 CPUReadHalfWord(u32 address){#ifdef DEV_VERSION        if(address & 1) {    if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {      log("Unaligned halfword read: %08x at %08x\n", address, armMode ?          armNextPC - 4 : armNextPC - 2);    }  }#endif    u32 value;    switch(address >> 24) {  case 0:    if (reg[15].I >> 24) {      if(address < 0x4000) {#ifdef DEV_VERSION        if(systemVerbose & VERBOSE_ILLEGAL_READ) {          log("Illegal halfword read: %08x at %08x\n", address, armMode ?              armNextPC - 4 : armNextPC - 2);        }#endif        value = READ16LE(((u16 *)&biosProtected[address&2]));      } else goto unreadable;    } else      value = READ16LE(((u16 *)&bios[address & 0x3FFE]));    break;  case 2:    value = READ16LE(((u16 *)&workRAM[address & 0x3FFFE]));    break;  case 3:    value = READ16LE(((u16 *)&internalRAM[address & 0x7ffe]));    break;  case 4:    if((address < 0x4000400) && ioReadable[address & 0x3fe])      value =  READ16LE(((u16 *)&ioMem[address & 0x3fe]));    else goto unreadable;    break;  case 5:    value = READ16LE(((u16 *)&paletteRAM[address & 0x3fe]));    break;  case 6:    value = READ16LE(((u16 *)&vram[address & 0x1fffe]));    break;  case 7:    value = READ16LE(((u16 *)&oam[address & 0x3fe]));    break;  case 8:  case 9:  case 10:  case 11:  case 12:    if(address == 0x80000c4 || address == 0x80000c6 || address == 0x80000c8)      value = rtcRead(address);    else      value = READ16LE(((u16 *)&rom[address & 0x1FFFFFE]));    break;      case 13:    if(cpuEEPROMEnabled)      // no need to swap this      return  eepromRead(address);    goto unreadable;  case 14:    if(cpuFlashEnabled | cpuSramEnabled)      // no need to swap this      return flashRead(address);    // default  default:  unreadable:#ifdef DEV_VERSION    if(systemVerbose & VERBOSE_ILLEGAL_READ) {      log("Illegal halfword read: %08x at %08x\n", address, armMode ?          armNextPC - 4 : armNextPC - 2);    }#endif    if(cpuDmaHack) {      value = cpuDmaLast & 0xFFFF;    } else {      if(armState) {        value = CPUReadHalfWordQuick(reg[15].I + (address & 2));      } else {        value = CPUReadHalfWordQuick(reg[15].I);      }    }    break;  }  if(address & 1) {    value = (value >> 8) | (value << 24);  }    return value;}