return CPUReadByteQuick(reg[15].I+(address & 1));
if(armState) { return CPUReadByteQuick(reg[15].I+(address & 3)); } else { return CPUReadByteQuick(reg[15].I+(address & 1)); }
inline u8 CPUReadByte(u32 address){  switch(address >> 24) {  case 0:    if (reg[15].I >> 24) {      if(address < 0x4000) {#ifdef DEV_VERSION        if(systemVerbose & VERBOSE_ILLEGAL_READ) {          log("Illegal byte read: %08x at %08x\n", address, armMode ?              armNextPC - 4 : armNextPC - 2);        }#endif        return biosProtected[address & 3];      } else goto unreadable;    }    return bios[address & 0x3FFF];  case 2:    return workRAM[address & 0x3FFFF];  case 3:    return internalRAM[address & 0x7fff];  case 4:    if((address < 0x4000400) && ioReadable[address & 0x3ff])      return ioMem[address & 0x3ff];    else goto unreadable;  case 5:    return paletteRAM[address & 0x3ff];  case 6:    return vram[address & 0x1ffff];  case 7:    return oam[address & 0x3ff];  case 8:  case 9:  case 10:  case 11:  case 12:    return rom[address & 0x1FFFFFF];          case 13:    if(cpuEEPROMEnabled)      return eepromRead(address);    goto unreadable;  case 14:    if(cpuSramEnabled | cpuFlashEnabled)      return flashRead(address);    if(cpuEEPROMSensorEnabled) {      switch(address & 0x00008f00) {      case 0x8200:        return systemGetSensorX() & 255;      case 0x8300:        return (systemGetSensorX() >> 8)|0x80;      case 0x8400:        return systemGetSensorY() & 255;      case 0x8500:        return systemGetSensorY() >> 8;      }    }    // default  default:  unreadable:#ifdef DEV_VERSION        if(systemVerbose & VERBOSE_ILLEGAL_READ) {          log("Illegal byte read: %08x at %08x\n", address, armMode ?              armNextPC - 4 : armNextPC - 2);        }#endif        if(armState) {      return CPUReadByteQuick(reg[15].I+(address & 3));    } else {      return CPUReadByteQuick(reg[15].I+(address & 1));    }    //    return 0xFF;    break;  }}