[srs@cs.utexas.edu: UTCS Computer Architecture Seminar Announcement, Monday, October 6, 2003] One more good one for next Monday too! Steve Keckler                     Computer Architecture and Technology Lab Assistant Professor               Tel:    (512) 471-9763 Department of Computer Sciences   Dept:   (512) 471-7316 1 University Station C0500        Fax:    (512) 232-1413 The University of Texas at Austin E-mail:  skeckler@cs.utexas.edu Austin, TX 78712-1188             http://www.cs.utexas.edu/users/skeckler                                    ------- Start of forwarded message ------- Reply-To: srs@cs.utexas.edu From: "Stephanie Shaffer"  To: CS-Announcements:; Subject: UTCS Computer Architecture Seminar Announcement, Monday, October 6, 2003 Date: Mon, 29 Sep 2003 15:37:12 -0500 Content-Type: text/plain; 	charset="iso-8859-1" X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Importance: Normal X-MIME-Autoconverted: from quoted-printable to 8bit by mail.cs.utexas.edu id h8TKavAq022500 Content-Length: 2518 Event:    Computer Architecture Seminar Series           http://www.cs.utexas.edu/users/cart/arch Speaker:  Carl Anderson           IBM Title:    "Physical Design of High Performance Microprocessors"  Date:     Monday, October 6, 2003 Time:     3:30 pm  Place:    ACES 2.402 Coffee:   3:00 pm Host:     Chuck Moore ABSTRACT: The design methodology used for designing the Power4 and Power5 microprocessors will be described. How the methodology dealt with the challenges of discipline, 170 to 250 million transistors, high frequency, tight schedules, etc will be  detailed.  The barriers of wire resistance, leakage, cost to future high  performance processors will be discussed. BIOGRAPHY: Carl J. Anderson received his BS in physics from the University of Missouri in 1974 and his PhD. in Physics from the University Wisconsin in 1979.  He joined IBM Research in 1979 where he did circuit design, package design and test on the Josephson Superconducting Computer program.  From 1983 to 1992 he worked in GaAs and Optoelectronics design and fabrication. In 1992 Carl became the Si circuit design manager and was responsible for the conversion of the S/390 high-end mainframe from bipolar technology to custom CMOS technology.  In 1997 Carl started work on the Power4 microprocessor responsible for the physical design.  Carl was appointed an IBM Fellow in 2000 and received and Honorary Doctor of Science Degree of the University of Wisconsin in 2003.  Presently Carl is working on the next generation of IBM processors and helping near term programs meet their performance goals. The Computer Architecture Seminar Series is sponsored jointly by the Departments of Computer Science and Electrical & Computer Engineering and is supported by a grant from SUN. - ---------------------------------------------------------------------------- - - Scalable Yahoo Map of 24th & Speedway: http://maps.yahoo.com/py/maps.py?Pyt=Tmap&addr=2400+Speedway&csz=Austin%2C+T X&Get+Map=Get+Map  Parking for off-campus visitors: We suggest that you park in parking garage 1  (PG1) at 24th & San Jacinto.  Parking validation will be available. Please  contact the host for this seminar or stop by the refreshment cart to have you  parking validated. Submap including Parking Garage #1 (PG1): http://www.utexas.edu/maps/main/areas/law.html Submap including ACES: http://www.utexas.edu/maps/main/areas/eastmall.html Please contact Gem Naivar at gem@cs.utexas.edu if you need any further  information to attend the seminar. ------- End of forwarded message -------