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1999-12-16 Assigned to 3COM CORPORATION reassignment 3COM CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HENRIE, JAMES B.
A method and apparatus for a dual power supply on a universal serial bus system using an overcurrent detect circuit. Dual power supplies in the universal serial bus system allows for greater flexibility of operation and is based on two separate power systems. The first power system is achieved using the power line on the bus connecting to the universal serial bus controller. The second power system is a separate power supply to power the downstream ports. Moreover, the universal serial bus system has an overcurrent and thermal error detect circuit based on the power system in order to achieve an efficient and cost effective method and apparatus in which to notify the universal serial bus controller of any error in the power system.
This invention relates to the operation of a communication network, and more particularly relates to a method and apparatus for powering components on the communication network.
The universal serial bus (USB) is a protocol for a serial bus. USB supports data exchange between a host computer and a wide range of simultaneously accessible peripherals. The attached peripherals share USB bandwidth through a host scheduled token based protocol. The USB allows peripherals to be attached, configured, used and detached while the host and other peripherals are in operation.
The USB transfers signal and power over a four wire cable with two wires for power (+5 Volts) and ground and the other two wires for data signaling. The USB in one configuration is 12 megabits per second and supports up to 128 devices. One of the purposes behind the universal serial bus is to provide ease of use to add PC peripherals. The USB is designed to handle a broad range of devices such as telephones (both analog, digital, and proprietary), modems, printers, mice, joysticks, scanners, keyboards, and tablets. Therefore, removed from the personal computer are the parallel, serial, graphics, modem, sound/game and mouse ports. The USB is designed so that external devices, such as a mouse or a keyboard may be correctly detected and properly configured upon attachment. Ordinarily, the topology of the USB system is tiered star. At each star is a universal serial bus repeater providing power for the devices, routing of signals in each direction and providing terminations for each line.
The universal serial bus repeater is a device which has one upstream port, a universal serial bus controller, and several downstream ports. The upstream port is toward the host, such as connected to a computer or other data communication device, and the downstream ports is toward a device. The universal serial bus controller performs the following functions: routing of the signals from the upstream port to the downstream ports and from the downstream ports to the upstream port; and error detection and recovery. The universal serial bus controller supports two power source modes (bus-powered or self-powered). Ordinarily, if the power required for the downstream ports and embedded functions is equal to or less than the power the bus can supply, the universal serial bus controller can be powered by the bus. If the power required for the downstream ports and embedded functions is more than what the bus can supply, the universal serial bus controller and the downstream ports are self-powered.
When the universal serial bus controller is self powered, the operator of the system must follow a special sequence in configuring the system. The operator must first connect the power source for the universal serial bus controller and the downstream ports. Then, the operator must connect the universal serial bus controller to the port on the computer. Otherwise, if the bus is connected to the universal serial bus controller without the universal serial bus controller being powered, the computer may determine that there is a problem with the universal serial bus controller since the computer detects that the universal serial bus controller is connected, but it is not responding due to a lack of power. Thus, the sequence of connecting the power supply and then the connector to the bus must be followed to avoid any potential errors.
Further, all self-powered universal serial bus controllers should implement overcurrent and thermal error protection for safety reasons. The universal serial bus controller should have a way to detect faults in the system such as an overcurrent or thermal error condition and report it to the universal serial bus software. Should the aggregate current drawn by a single downstream port or group of downstream ports exceed a preset value or the thermal value of the power supply be too high, the power should be removed from the downstream ports and the condition should be reported through the universal serial bus controller to the computer. Fault detect circuits, detecting overcurrent and thermal errors, are used to protect from catastrophic device failures, software errors that turn on devices when the current budget has been exceeded, and operator actions such as shorting out the connector pins. Known overcurrent limiting methods include poly fuses, standard fuses, or a solid state switch.
Moreover, the power supply which supplies power to the universal serial bus controller and the downstream ports in the self-powered mode are designed either with expensive power switches such as power transistors or switching chips. In this manner, the power which is supplied by the power supply can be turned on upon power up or turned off when an overcurrent is detected. Also, the power can be turned on or turned off by the software on the computer through the universal serial bus controller, which is contained within the universal serial bus controller.
Finally, when the universal serial bus controller and the downstream ports are in the self-powered mode, this limits the overall operation of the system. In the event of an overcurrent thermal error or other condition which requires the power supply to be removed, the power to the universal serial bus controller is removed as well. Thus, in order to have a reliable universal serial bus system, the power to the universal serial bus controller and the downstream ports should be reliable. It would therefore be desirable to have an improved method and apparatus for powering components on the communication network.
In accordance with a first aspect of the invention, a universal serial bus apparatus is provided. The universal serial bus apparatus has a universal serial bus controller which is connected to a first power source. The universal serial bus controller is also connected to at least one downstream port, the downstream port receiving power from a second power source. The universal serial bus apparatus also includes an overcurrent detect circuit.
In accordance with a second aspect of the invention, a method of powering a universal serial bus controller and at least one port downstream of the universal serial bus controller is provided. The universal serial bus controller has one power source and the at least one port downstream of the universal serial bus controller has a second power source separate from the first power source. The method includes the step of connecting the universal serial bus controller to the first power source. Moreover, the method includes the step of checking the connection to the universal serial bus controller to determine that the universal serial bus controller is connected and is powered. The method also includes the step of connecting the second power source to the at least one downstream port. And, the method includes the step of powering the at least one downstream port via the second power source, the powering of the at least one downstream port being done after connecting the universal serial bus controller to the bus, powering the universal serial bus controller, and connecting the second power source to the at least one downstream port.
In accordance with a third aspect of the invention, a universal serial bus apparatus is provided. The universal serial bus apparatus has a universal serial bus controller, a first power source, a second power source, and a first means for determining whether the first power source or the second power source powers the universal serial bus controller, the first means connected to the first power source and the second power source.
In accordance with a fourth aspect of the invention, a method of powering a universal serial bus controller and at least one port downstream of the universal serial bus controller is provided. The method includes powering a universal serial bus controller with a first power source. The method further includes powering at least one downstream port which is connected to the universal serial bus controller with a second power source. And, the method includes switching the power to the universal serial bus controller from the first power source to the second power source when the voltage on the first power source is less than a predetermined value.
In accordance with a fifth aspect of the invention, a fault detect system for a power supply apparatus is provided. The fault detect system has a power supply, the power supply having a line which outputs the fault status of the power supply, the line also inputting a value to turn the power supply on or off. The fault detect system also has a fault detect circuit, with the fault detect circuit including a means for determining if there is a fault on the power supply, the means for determining being connected to the line on the power supply. The fault detect circuit further includes means for turning the power supply on or off, the means for turning the power supply on or off also being connected to the line on the power supply.
In accordance with a sixth aspect of the invention, a method for determining the fault on a power supply is provided. The method includes the step of sensing a line on the power supply to determine the fault status on the power supply. The method further includes the step of determining whether there is a fault on the power supply. And, the method includes the step of turning off the power supply by sending a signal to the power supply on the same line on the power supply.
In accordance with a seventh aspect of the invention, a compound universal serial bus apparatus is provided. The compound universal serial bus apparatus includes a universal serial bus controller, an upstream port which is connected to the universal serial bus controller, at least one downstream port which is connected to the universal serial bus controller, an external device which is connected to the universal serial bus controller, a power supply connected to the at least one downstream port for supplying power to the at least one downstream port and a fault detect circuit connected to the universal serial bus controller for indicating an error to the universal serial bus controller.
Accordingly, a primary object of the invention is to provide the universal serial bus controller with a fault detect circuit.
Another object of the invention is to provide an overcurrent and thermal error circuit to the universal serial bus controller using the circuitry of the power supply.
Another object of the invention is to maintain normal operation of the universal serial bus controller in the event of an overcurrent or thermal error condition or other catastrophic failure from the power supply.
A further object of the invention is to remove power from the power supply in an inexpensive manner in the event of an overcurrent condition or other catastrophic failure from the power supply.
Yet a further object of the invention is to make the fault detect circuitry easy to manufacture and reliable.
Still yet a further object of the invention is to provide a redundant power supply for the universal serial bus controller and the downstream ports.
Still yet another object of the invention is to provide a compound universal serial bus repeater with a fault detect circuit.
These and other objects, features, and advantages of the present invention are discussed or apparent in the following detailed description.
FIG. 9b is a block diagram of the downstream port supporting an embedded device as shown in FIG. 9a.
FIG. 1a shows the architecture of a universal serial bus repeater 5 which includes a universal serial bus controller 10 connected to a number of outside ports. The universal serial bus controller 10 controls the routing of the signals from the upstream port to the downstream ports and from the downstream ports to the upstream port and error detection and recovery. Universal Serial Bus (USB) Port 0 (12) is the universal serial bus upstream port which is typically connected to a host computer. Universal Serial Bus Ports 1 to 7 (18) are universal serial bus downstream ports which are typically connected to universal serial bus devices. D+ and D- signify signals which are sent to and from both the upstream and downstream ports. At the connection to the universal serial bus port 0 (12), there is a 5 Volt bus voltage signified as VBUSIN. The VBUSIN voltage is input to the 5 V to 3.3 V Regulator 14, with the output of the regulator being sent to power the universal serial bus controller 10, the fault detect circuit 24, and the power-on reset circuit 17 (i.e., resetting the controller during power-up) (shown in FIG. 5). The universal serial bus controller 10 also has a crystal input (XTAL) 16 which operates at 48 MHz for purposes of timing.
The AC/AC adapter 20 is supplied with power from a typical wall outlet. The output of the AC/AC (20) adapter is 20 Volts AC which is input to a rectifier 22. The output of the rectifier 22 is 30 V rectified which is used to power two switching power supplies 26A, 26B and used as an input to the fault detect circuit 24, described hereinafter. The two switching power supplies 26A, 26B switch the rectified 30 V input to 5 VDC to power the downstream ports 18. In the event that four ports or less are needed downstream of the universal serial bus controller 10, only one switching power supply 26A is necessary. In an alternative embodiment, a single high current switching power supply may be used in place of the two switching power supplies 26A, 26B to power all seven downstream ports. The fault detect circuit 24 connects to the universal serial bus controller 10 and the two switching power supplies 26A, 26B.
In an alternative embodiment, the AC/AC adapter 20 is replaced with an AC/DC adapter. The AC/DC adapter is supplied with power from a typical wall outlet and provides 5 VDC at 4 Amps. In addition, the Switching Power Supplies 26A and 26B are replaced by a linear regulator, similar to the regulator as shown in FIG. 7 except with higher current capabilities and with an ON/OFF switch. The fault detect circuit, as shown in FIG. 3, with the OFF/ON output is inverted and connected to the ON/OFF switch of the linear regulator. In particular, the fault detect circuit is modified so that R59, as shown in FIG. 4, is changed from connection to pin6-- 2 to the connection to the 5 V OUT of the linear regulator (pin 1 of the linear regulator). A resistor is added from the transistor side of R59, as shown in FIG. 4, to ground, providing a voltage driver to measure the voltage out of 5 V OUT.
The configuration, as shown in FIG. 1a, allows for the universal serial bus controller 10 to have power independent from the downstream ports 18. So that, in the event of a failure in the AC adapter or in the switching power supplies 26A, 26B, the power to the universal serial bus controller 10 remains unaffected. Because of this method of powering the universal serial bus controller 10, the user can plug in either the cable connector to port 0 or the AC/AC adapter 20 first. Thus, the sequence of requiring the AC power to be connected first is eliminated.
In an alternative configuration, some of the downstream ports 18 may be powered by VBUSIN via connection, through a relay. The limitation on the number of downstream ports powered by VBUSIN depends on the power requirements of the downstream ports. Typically, VBUSIN can support a maximum current of five loads. If the total load requirement for the universal serial bus controller 10 and the selected downstream ports 18 is equal to or less than five loads, the power supplied for the downstream ports 18 can be divided between VBUSIN and switching power supplies 26A, 26B.
Referring to FIG. 1b, there is shown a block diagram of the connectivity of universal serial bus repeaters. Repeater 6 has an upstream port which is connected to a computer. Repeater 6 also has three downstream ports, with port 2 connected to the upstream port of Repeater 7. Repeater 7 has three downstream ports, which in one embodiment may be connected to a printer, keyboard and a mouse.
Referring to FIG. 2, there is shown a block diagram of a switching power supply chip 28 for either of the switching power supplies 26A, 26B. The switching power supply chip 28 is current limited and thermally protected. The switching power supply chip 28 also has an external soft start pin (pin6-- 1) connected to the reset of the pulse width modulator (pwm) 36, an overcurrent detect 42 and a thermal shutdown 40. In this manner, the soft start pin (pin6-- 1) indicates the operation of the switching power supply 26A in various modes of operation, including indicating the fault status of the switching power supply 26A. For example, during power up of the switching power supply chip 28, this soft start pin (pin6-- 1) is designed to go from low to high with the time constant from the external capacitor Csoft. This slowly turns on the pulse width modulator 36 to allow the storage elements to charge up without drawing too much current. If the soft start pin (pin6-- 1) goes low for any reason, then the pulse width modulator reset (pwm) 36 is disabled and Vout 48 is turned off. A transistor (Q1 as shown in FIGS. 2, 4 and 6) is added to the soft start pin (pin6-- 1) to turn on and off the switching power supply 26A. In alternative embodiments, the transistor is replaced by a relay, any other type of switching device, or any device to drive the soft start pin high or low.
When the transistor Q1 is turned on, the soft start pin changes from 5 V to about 0 V. The pulse width modulator 36 is reset, shutting off Vout 48. Alternatively, for switching power supplies with an On/Off pin, that pin may be used to turn the power supply on or off instead of using transistor Q1. Moreover, in an alternative embodiment, the switching power supply chip 28 tests for other fault conditions on the switching power supply chip 28, including testing for undervoltage and overvoltage at its output. During instances of undervoltage or overvoltage, the switching power supply chip 28 signifies an error.
Moreover, if the switching power supply chip 28 detects either an overcurrent or an over temperature, the voltage level at the soft start pin (pin6-- 1) goes low, or about 1.5 V. When the soft start pin voltage goes low, the pulse width modulator 36 inside the switching power supply chip 28 is reset, shutting down the power to the downstream ports 18. If the overcurrent or the over temperature conditions are removed, the voltage level of soft start pin (pin6-- 1) goes high and normal operations resume. The fault detect circuit 24 uses the soft start pin (pin6-- 1) in order to determine when the switching power supply 26A has had an overcurrent or a thermal error. Using the soft start pin (pin6-- 1) in the fault detect circuit 24 to detect an overcurrent condition eliminates expensive components to measure the current of Vout 48 in the switching power supply 26A. In this manner, the design of fault detect circuit 24 and the switching power supply chip 28 allow for a reduced pin configuration. The soft start pin (pin6-- 1) is used both as an input and as an output. For example, the soft start pin is used for sensing the status of the switching power supply chip 28 and for turning on/off the switching power supply chip 28. This input/output use allows for easier manufacture and higher reliability.
Referring to FIG. 3, there is shown a block diagram of the fault detect circuit 24 shown as a block in FIG. 1a. The fault detect circuit 24 is used to protect against catastrophic device failures, software errors that turn on devices when the current budget has been exceeded, and user actions such as shorting out the connector pins. The fault detect circuit 24 determines whether there has been a change in the condition of the switching power supplies 26A, 26B. In order to do this, two comparators 50 are used. The inputs to the two comparators 50 are: pin6-- 1 and pin6-- 2 which are connected to the soft start pin of each of the switching power supplies 26A, 26B; and VREF which is set to about 3 Volts. When a voltage at the soft start pin goes low (which is about 1.5 Volts), the output of the corresponding comparator 50 changes from low to high. The outputs of the two comparators 50 are thereafter logically ORed together. Thus, if the voltage at either switching power supply soft start pin (pin6-- 1 or pin6-- 2) goes low, the corresponding comparator 50 goes high and the output of the OR gate 52 is high. Other means for determining if there is a fault on the power supply include using a switch, such as a transistor switch. When the soft start pin goes low, which is input to the switch, the switch turns off. Further, when the soft start pin goes high, the switch turns on. In addition, other means for determining if there is a fault on the power supply include circuitry which uses the soft start pin as an input, such as a logic circuit.
Four conditions cause the voltage at the soft start pin (pin6-- 1) on the switching power supply chip 28 to go low: (1) no AC power; (2) the universal serial bus controller 10 turned off the switching power supply chip 28; (3) an overcurrent was detected; or (4) a thermal shutdown occurred. The first two conditions are false overcurrent conditions and should not be reported to the universal serial bus controller 10. The last two conditions are true overcurrent conditions and must cause an overcurrent to be reported to the universal serial bus controller 10. The universal serial bus controller 10 then reports an overcurrent condition to the host computer through port 0 (12).
In order to indicate to universal serial bus controller 10 the two true overcurrent conditions, there are two additional inputs to the fault detect circuit 24. First, the 30 VON, which is the output of the rectifier 22, indicates to the fault detect circuit 24 when the AC/AC adapter 20 is plugged in. Second, the /PWRON input to the fault detect circuit 24 is output from the universal serial bus controller 10. It indicates whether the universal serial bus controller 10 has turned on or off the power to the downstream ports 18. /PWRON indicates that the line is active low so that it must be inverted through an inverter 56.
The conditions under which an overcurrent or a thermal error occurs is when the AC/AC adapter 20 is plugged in and when the downstream ports 18 are turned on. Therefore, the 30 VON and the /PWRON are NANDed together using a NAND gate 58 to form the OFF/ON signal. The OFF/ON signal is delayed through a delay circuit 60 to give the soft start capacitor Csoft a chance to charge up and forcing the /OVRCURR line signal high, thus preventing a false overcurrent while powering on the switching power supplies 26A, 26B. The delayed output of the OFF/ON line is then NANDed using a NAND gate 54 with the output of the comparators 50 to form the /OVRCURR signal. /OVRCURR is an input to the universal serial bus controller 10 and is used to report an over current condition. In this manner, /OVRCURR indicates when there is an overcurrent or a thermal error to the universal serial bus controller 10 at the proper time.
The OFF/ON line signal is used to turn on and off the Switching Power Supplies 26A, 26B. The 30 VON (AC power on) and /PWRON (from the universal serial bus controller 10) are NANDed together to generate the signal that turns on and off the Switching Power Supply 26A through Q1 (and Switching Power Supply 26B through Q3). As described above, the switching power supply 26A may be turned on by allowing the soft start pin to go high (pin6-- 1). However, the switching power supplies 26A, 26B should be turned on only when both the AC power and the power to the downstream ports 18 are turned on.
In the event of an overcurrent condition, the switching power supplies 26A, 26B must be turned off. The switching power supply chip 28 turns off the output of the switching power supply chip (Vout) in the event of an overcurrent or thermal error. Other means by which to limit the current include poly fuses, standard fuses, or some other type of solid state switch.
The switching power supply chip 28 may be turned off by driving the soft start pin (pin6-- 1) low. The transistor Q1 (See FIGS. 2, 4 or 6) may drive the soft start pin (pin6-- 1) low thereby turning off the output of the switching power chip 28. The switching power supply chip 28 for switching power supply 26A can be turned on by allowing the soft start pin (pin6-- 1) to go high using the transistor Q1. This circuitry eliminates the need to use an expensive FET or transistor to turn on or off the high current Vout. This transistor also allows for an inexpensive switching power supply to be used, rather than a switching power supply with an ON/OFF pin. Other means, in addition to transistor Q1, to turn on or off the switching power supply chip 28 include using any other type of switch. Any number of downstream ports 18 may be integrated into the fault detect circuit 24.
Referring to FIG. 4, there is shown a circuit diagram of the fault detect circuit 24. The output of AC/AC wall adapter 20 (as shown in FIG. 1a) is plugged into connector J8. This AC/AC wall adapter 20 converts the standard 120 VAC to 20 VAC up to 1.5 A. Because the wall adapter 20 is current limited, no fuse is needed. After connector J8, the 20 VAC passes through a pie filter 27 to reduce the noise. The pie filter 27 consists of two capacitors C53, C54 and two inductors L4 and L5. The 20 VAC then passes through a full bridge rectifier 29. The full bridge rectifier 29 consists of four diodes D3, D4, D5, D6 and capacitors C3 and C4. The diodes D3-D6 convert the negative portion of the 20 VAC sine wave to a positive portion, and the capacitors C3 and C4 add filtering, resulting in a 30 V input to the switching power supplies 26A and 26B. The switching power supplies 26A and 26B switch this voltage down to 5 V at 2A to provide power to the downstream ports 18, shown in FIG. 1a. Switching power supply 26A provides 2A to downstream ports 1 to 4 and switching power supply 26B provides 2A to downstream ports 5 to 7.
Transistors in the fault detect circuit 24 reduce the current consumption to below 100 uA. The fault detect circuit 24 may be used on any configuration for a universal serial bus controller 10, with any number of ports regardless of the number of downstream ports. The four port universal serial bus repeater uses fewer components that the seven port universal serial bus repeater. The four port universal serial bus repeater circuit can be made from the seven port universal serial bus repeater circuit by deleting the following parts: switching power supply 26B, transistors Q3, Q8, resistors R59, R44, R25, and capacitors C4, C65. The universal serial bus controller draws power from port 0 via the 5 Volt to 3.3 Volt regulator 14. Capacitor C81 reduces potential noise on OFF/ON which may be sent to the switching power supplies. Moreover, resistor R24 is added to limit the current.
The following is a list of parts by manufacturer and part number for the fault detect circuit: Q1, Q2, Q3, Q4, Q5 (3904 transistor by National Semiconductor, model number MMBT3904); Q6, Q7, Q8, Q9 (3906 transistor by National Semiconductor, model number MMBT3906); D3, D4, D5, D6 (diodes by Diodes, Inc., model number SK34); C59, C63, C64, C65 (2.2 μF capacitor by AVX, model number TAJS225K010R); C3, C4 (220 μF capacitor by Nichicon, model number UPL1J221MHH6); C53, C54, C81 (0.0022 μF capacitor by AVX, model number 08051C222JATMA); R24, R25, R51, R61, R63, R64 (340 KΩ resistor by NIC, model number NRC06F3403TR); R43, R44 (1.5 KΩ resistor by NIC, model number NRC06152JTR); R57, R58, R59, R60 (470 KΩ resistor by NIC, model number NRC06474JTR); R9, R10 (84.5 KΩ resistor by NIC, model number NRC06F8452TR); R4, R5 (49.9 KΩ resistor by NIC, model number NRC06F4992JTR); R52, R53, R54 (150 KΩ resistor by NIC, model number NRC06F1503TR); L4, L5 (inductor by Murata Erie BLM31P500SPT); J8 (connector by Technical Devices, model number D-0202); AC/AC wall adapter 20 by Ault, model number TS7201500A010G.
The fault detect circuit 24 may be modified so that the connection to R59 is changed from connection to pin6-- 2 (the soft start pin (pin6-- 2) of switching power supply chip 26B) to connection to the 5 V OUT of the switching power supply chip 26B. A resistor is added from the transistor side of R59 to ground, providing a voltage divider to measure the voltage out of 5 V OUT. If the switching power supply (26A or 26B) has an overcurrent, 5 V OUT will drop to about 1 V. Likewise, the connection to R58 may be changed from its connection to pin6-- 1 to the connection to the 5 V OUT of the switching power supply chip 26A. Moreover, the circuitry (Q1, R43 and R24; Q3, R44 and R25) to turn either switching power supply 26A or 26B on and off may be replaced by a switching power supply 26A or 26B with an ON/OFF pin. The inverted OFF/ON output from the fault detect circuit 24 is connected directly to the switching power supply ON/OFF pin. Further, logic gates rather than transistors can be used to implement the fault detect circuit 24 as shown in the block diagram in FIG. 3. These logic gates could be implemented in discrete parts or in an application specific integrated circuit chip (ASIC).
Referring to FIG. 5, there is shown a circuit diagram for the universal serial bus controller 10. The universal serial bus controller 10 has as inputs and outputs: data lines D+ and D- at pins 1 and 2 from universal serial bus port 0 (12) (port 0 is bi-directional); overcurrent inputs (pins 12, 27, 33, 38, 42, 46, and 48 of the universal serial bus controller 10) for each of the seven downstream ports which are connected to the output of the overcurrent circuit as shown in FIGS. 3 and 4; /RESET (pin 29) which is connected to a reset chip 17, manufactured by Seiko Instruments, model number S-80728AL-AR; /BUSPWR input (pin 10 of the universal serial bus controller 10) which receives the input power from the 5 V to 3.3 V regulator 14 or receives an alternative power input as described in FIGS. 8a, 8b, and 8c; and crystal input and output (pins 34 and 35 of the universal serial bus controller 10 for the output and input, respectively). The inputs and outputs for the universal serial bus controller 10 include: the data lines for the seven downstream ports (pins 6, 7, 13, 14, 18, 19, 23, 24); and the /PWRON pin (pin 47) to turn on or off power to the downstream ports, which is used by the fault detect circuit in FIGS. 3 and 4.
Referring to FIG. 6, the switching power supply 26A is shown. Power is input from the 30 V rectified and filtered voltage to the input of the switching power supply chip 28. The switching power supply chip 28, as described previously, has a soft start pin (pin6-- 1) which turns the switching power supply chip 28 on and off and which indicates whether an overcurrent or a thermal error has occurred. The soft start pin (pin6-- 1) is pulled either low or allowed to go high based on the state of the transistor Q1.
The switching power supply chip 28 is preferably an SGS-Thompson L4960 chip with heat sink. The switching power supply 26A supplies each downstream port 18 with up to 500 mA of current. As shown in FIG. 6, the switching power supply 26A supplies power to up to four downstream ports (e.g., ports 1-4). Further, FIG. 6 also has a VBUSOUT switch 64, which is described subsequently with respect to FIGS. 8a and 8c.
As shown in FIG. 2, the RC circuit oscillator 32 is connected to the switching power supply chip 28. In FIG. 6, the RC circuit from the RC circuit oscillator 32 includes a resistor, R55 and a capacitor C52. Other connections to the switching power supply chip 28 include the 30 V rectified input connected to pin 1, the RC Frequency Compensation 33, as shown in FIG. 2, connected to pin 3, and the output at pin 7. As shown in FIGS. 3 and 4, pin6-- 1 is connected to the fault detect circuit 24. Storage elements 46 includes inductor L3, diode D1, capacitor C49 and resistor R12. FB-- INPUT (pin 2 of the switching power supply chip 28) is connected to voltage divider R47 and R45. The FB-- INPUT provides feedback to the switching power supply chip 28 as to the actual voltage at the output. If the output voltage goes below/above 5 V, the feedback directs the switching power supply chip 28 to provide more/less current for the correct voltage. Because the design of the system should provide 5 V at the output ports, and because of resistance in the cables and the drop in voltage across inductor L10, the output voltage from the switching power supply chip 28 should be designed to be slightly higher than 5 V. The voltage divider R47 and R45 accomplishes this by having the switching power supply chip 28 output a slightly higher voltage than 5 V at pin 7.
A universal serial bus repeater that is capable of supporting 7 ports downstream is manufactured by Texas Instruments, model number TUSB2070. A universal serial bus repeater that is capable of supporting 4 ports downstream is manufactured by Texas Instruments, model number TUSB2040.
Referring to FIG. 7, there is shown a circuit diagram of the 5 Volt to 3.3 Volt regulator 14. The 5 volt input is taken from port 0 (12, as shown in FIG. 1a) and input to pin 8 of the voltage regulator 14, manufactured by National Semiconductor, model number LM2931. The output of the voltage regulator 14, pin 1, sends the 3.3 Volts to pin 10 of the universal serial bus controller 10. ADJ (pin 4 of the 5 V to 3.3 Volt regulator 14) is connected to resistors R1 and R8 which act as a voltage divider. This connection provides feedback to the regulator 14 to ensure that the output voltage is 3.3 V.
Referring to FIG. 8a, there is shown a block diagram of a universal serial bus repeater with four downstream ports 18. The configuration of FIG. 8a is similar to FIG. 1a with the addition of circuitry to switch the source of power for the universal serial bus repeater and the downstream ports. In particular, VBUSIN SWITCH 62 determines the selection of the power source for the universal serial bus controller 10 and VBUSOUT SWITCH 64 determines the selection of the power source for the downstream ports 18. SW1OUT is the output for the switching power supply 26A which is sent both to VBUSIN SWITCH 62 and VBUSOUT SWITCH 64.
Referring to FIG. 8b, there is shown a circuit diagram for VBUSIN SWITCH 62. In order to increase the reliability of the universal serial bus controller 10, the power supplied to the universal serial bus controller 10 must be reliable. In order to ensure reliability, the input to the universal serial bus controller 10 must at least be a certain voltage level. In accordance with a preferred embodiment, if the input voltage falls below a certain level, the input voltage is switched to an alternate source. Comparator U12 has as inputs VBUSIN and a reference voltage. The reference voltage is determined based on the voltage at SW1OUT (which is 5 V) and the resistors R89 and R90. If VBUSIN drops below the reference voltage, Q20 is turned on, which in turn switches relay K2 so that the power to the 5 V to 3.3 V regulator 14 is switched from VBUSIN to SW1OUT. In alternative embodiments, the relay is replaced by a transistor or any other type of switching device.
For example, if the current draw on VBUSIN exceeds normal parameters, VBUSIN may be unable to maintain sufficient voltage to power the universal serial bus controller 10. In that event, alternate means of powering the universal serial bus controller 10 may be used, such as SW1OUT. Further, in the event that power is not available on SW1OUT, the switch to SW1OUT is not made. Additionally, the reference voltage for the input of the comparator may be chosen by varying the values of R89 and R90 depending on the needs of the circuit. In an alternative embodiment, the primary means for power is obtained from the switching power supply 26A through SW1OUT. In this manner, when SW1OUT is unable to maintain sufficient voltage to power the universal serial bus controller 10, the power source is switched to the alternate means of power, which in this embodiment is VBUSIN. Thus, depending on the design parameters of the system, the system is designed for maximum reliability. Other means for determining if power should be switched include using a switch, such as a transistor switch. When the SW1OUT goes low, which is input to the switch, the switch turns off. Further, when the SW1OUT goes high, the switch turns on.
Referring to FIG. 8c, there is show a circuit diagram for VBUSOUT SWITCH 64 for switching the power supplied to the downstream ports in the event of a failure in the switching power supply 26A. Similar to the power system for the universal serial bus controller 10 as shown in FIG. 8b, redundancy in the power system for the downstream ports 18 increases reliability. In the event of a failure in the switching power supply 26A (e.g. an overcurrent or a thermal error) shown in FIG. 8a, the power supplied to the downstream ports 18 may be switched so that the VBUSINS (which is described subsequently with respect to FIG. 8d) powers the downstream ports 18. Under normal operation, SW1OUT is at 5 V so that the relay switch K1 connects SW1OUT to VBUSOUT1. When SW1OUT drops to 0 V, the relay switch K1 switches so that VBUSINS is connected to VBUSOUT1.
No comparator is used in FIG. 8c since the output of SW1OUT is ordinarily either 5 V or 0 V. Whereas, because of current draw, VBUSIN may have a voltage somewhere between 5 V and 0 V so that a comparator is necessary in FIG. 8b to determine whether VBUSIN has sufficient power to power the universal serial bus controller 10. In addition, when SW1OUT powers the downstream ports, /BUSPWR is high. /BUSPWR, which is pin 10 on the universal serial bus controller 10, indicates to the universal serial bus controller 10 that the downstream ports 18 are not bus powered. When the power is switched to VBUSIN, the /BUSPWR goes low indicating that the ports are powered by the bus. As the power availability is currently configured for VBUSIN, VBUSIN is able to support a maximum of four downstream ports; however, depending on additional power availability for VBUSIN, additional ports may be supported downstream. In an alternative embodiment, the primary means for power is obtained from VBUSINS. In this manner, when VBUSIN is unable to maintain sufficient voltage to power the downstream ports 18, the power source is switched to the alternate means of power which in this embodiment is SW1OUT through switching power supply 26A. Thus, depending on the design parameters of the system, the system is designed for maximum reliability.
Referring to FIG. 8d, there is shown a circuit diagram for turning off the power source to the downstream ports as shown in FIG. 8a. In the event that the universal serial bus repeater wishes to turn off the power to the downstream ports, the universal serial bus controller 10 sends a signal via the /PWRON2 pin (which provides the same output as the /PWRON pin) to indicate that the power to the downstream ports should be shut off. The /PWRON signal is sent to the switching power supply 26A to shut it off. After the switching power supply 26A is shut off, the circuitry of the VBUSOUT SWITCH 64 would switch the power to VBUSIN. In order to shut down the power to the downstream ports, VBUSIN OFF/ON 63 is used. As shown in FIG. 8d, when the /PWRON2 signal (which is active low) is sent to shut off the power to the downstream ports, relay K3 switches VBUSIN to a no connection so that VBUSINS, the output of VBUS ON/OFF 63, has no power. Otherwise, VBUSINS is equal to VBUSIN. Therefore, when the universal serial bus controller 10 tells the downstream ports to shut off, power from both the switching power supply 26A and the VBUSIN is removed.
Referring to FIG. 9a, there is shown an alternative embodiment of the universal serial bus repeater. In accordance with this alternative embodiment, the compound universal serial bus repeater 66 includes both a universal serial bus repeater 66B and a universal serial bus device 66A (e.g., printer, keyboard, monitor, mouse, or the like). In this manner, the compound universal serial bus repeater 66 performs both the function of the universal serial bus repeater 66B, as previously described, as well as the functions of a universal serial bus device 66A. The universal serial bus repeater 66B, which includes a universal serial bus controller 10, provides an interface upstream to a USB host or other universal serial bus repeater or downstream to a USB device or a universal serial bus repeater. With this configuration, as an example, rather than buying a universal serial bus monitor and a separate universal serial bus repeater, a compound device, which includes both universal serial bus monitor 66A and a built-in universal serial bus repeater 66B, may be used. In this manner, there are less connectors, less cables, less power supplies necessary for the configuration.
Moreover, the universal serial bus device 66A may be powered by an external power supply, as shown in FIG. 9a as switching power supply 26B, or be powered by VBUSIN, depending on the power requirements of the universal serial bus device 66A. For example, if the universal serial bus device 66A is a monitor, the universal serial bus device 66A is powered by an external power supply. If the universal serial bus device 66A is a keyboard, with lower power requirements, the universal serial bus device 66A may be powered by VBUSIN, as shown by the dotted line in FIG. 9a.
As shown in FIG. 9b, the compound universal serial bus repeater 66 includes a universal serial bus controller 10 and a universal serial bus interface 67. An example of a universal serial bus device that performs both functions of a controller and an interface is the Texas Instruments TUSB2140 4-port device with Inter-Integrated Circuit (I2C) bus circuitry. The I2C bus circuitry serves as the universal serial bus interface 67, that can be used to control a PC monitor. The universal serial bus interface 67 (using the Inter-Integrated Circuit (I2C)) allows control of the monitor's brightness, contrast, vertical/horizontal hold as well as other operating characteristics of the monitor. Port0 of the compound universal serial bus repeater 66 is connected to a universal serial bus port of a universal serial bus computer 68. The universal serial bus computer 68 is a standard computer with a universal serial bus port. Further, downstream ports on the compound universal serial bus repeater 66 can be connected to other external devices, such as a mouse and an external video. The external devices, in turn, may be compound universal serial bus devices so that the universal serial bus devices may be daisy-chained together.
From the foregoing detailed description, it will be appreciated that numerous changes and modifications can be made to the aspects of the invention without departure from the true spirit and scope of the invention. This true spirit and scope of the invention is defined by the appended claims, to be interpreted in light of the foregoing specification.
a fault detect circuit connected to the universal serial bus controller and connected to the source of power for the power supply for indicating an overcurrent or thermal error to the universal serial bus controller and for turning on the power supply.
wherein the fault detect circuit is connected to the power line of the upstream port, the fault detect circuit turning on the power supply after there is power on the power line and on the source of power.
3. A universal serial bus apparatus as claimed in claim 2 wherein the power supply includes a switching power supply, the switching power supply having an input for turning on the switching power supply, the input being connected to the fault detect circuit.
4. A universal serial bus apparatus as claimed in claim 2 wherein the fault detect circuit does not signal an error unless both the source of power for the power supply and the universal serial bus controller are powered.
5. A universal serial bus apparatus as claimed in claim 4 wherein the fault detect circuit further comprises a delay circuit and wherein the fault detect circuit comprises a power logic circuit, the power logic circuit connected to the power signal and the source of power and the delay circuit connected to the output of the logic circuit.
6. A universal serial bus apparatus as claimed in claim 1 wherein the fault detect circuit includes a comparator connected to the signal from the power supply and to a predetermined value.
a fault detect circuit connected to the fault signal and to the second power source, the fault detect circuit indicating to the universal serial bus controller an error.
8. A universal serial bus apparatus as claimed in claim 7 wherein the fault detect circuit includes a comparator, the comparator connected to the fault signal and to a predetermined value.
9. A universal serial bus apparatus as claimed in claim 7 wherein the fault detect circuit is connected to the first power source, the fault detect circuit activating means for turning on the second power source after power is available on the first power source and second power source.
10. A universal serial bus apparatus as claimed in claim 9 wherein the means for turning on the second power source is a switch, the switch being activated by the fault detect circuit.
11. A universal serial bus apparatus as claimed in claim 7 further comprising an upstream port which is connected to the universal serial bus controller and wherein the first power source includes a line for power on the upstream port.
12. A universal serial bus apparatus as claimed in claim 11 wherein the second power source includes a switching power supply, the switching power supply having an input for turning on the switching power supply, the input connected to the fault detect circuit.
an overcurrent detect circuit connected to the overcurrent signal, to the first power source and to the second power source, the overcurrent detect circuit including a delay circuit and indicating to the universal serial bus controller an overcurrent when the first power source and second power source have power and when the overcurrent signal indicates an overcurrent condition.
14. A universal serial bus apparatus as claimed in claim 13 further comprising an upstream port which is connected to the universal serial bus controller, and wherein the first power source includes a line for power on the upstream port for supplying the universal serial bus controller with power.
15. A universal serial bus apparatus as claimed in claim 14 wherein the overcurrent detect circuit includes a comparator, the comparator connected to the overcurrent signal and to a reference value.
16. A universal serial bus apparatus as claimed in claim 15 wherein the overcurrent detect circuit delays the determination of whether the first power source and the second power source have power.
fault detect circuitry connected to the first power source and to the second power source, the fault detect circuitry including means for determining the sufficiency of power from the first power source and means for transferring power from the second power source to the universal serial bus controller in the event that the power from the first power source falls below a predetermined value.
18. A universal serial bus apparatus as claimed in claim 17 wherein the means for determining the sufficiency of power from the first power source includes a comparator.
19. A universal serial bus apparatus as claimed in claim 18 wherein the means for transferring power from the second power source to the universal serial bus controller includes a switch.
20. A universal serial bus apparatus as claimed in claim 19 further comprising means for transferring power from the first power source to the at least one downstream port.
a first means for determining whether the first power source or the second power source powers the universal serial bus controller, the first means connected to the first power source and the second power source, the first means also connected to the universal serial bus controller.
22. A universal serial bus apparatus as claimed in claim 21 further comprising at least one downstream port which is connected to the universal serial bus controller and a second means for determining whether the first power source or the second power source powers the at least one downstream port, the second means connected to the first power source and the second power source.
23. A universal serial bus apparatus as claimed in claim 22 wherein the second means for determining whether the first power source or the second power source powers the at least one downstream port includes a second switch.
24. A universal serial bus apparatus as claimed in claim 23 wherein the second power source is a power supply.
25. A universal serial bus apparatus as claimed in claim 24 wherein the second switch connects the power supply to the at least one downstream port when the voltage on the power supply is above a predetermined value.
26. A universal serial bus apparatus as claimed in claim 21 wherein the first means for determining whether the first power source or the second power source powers the universal serial bus controller includes a first switch.
27. A universal serial bus apparatus as claimed in claim 26 further comprising an upstream port which is connected to the universal serial bus controller and wherein the first power source is a power line on the upstream port.
28. A universal serial bus apparatus as claimed in claim 27 wherein the first switch connects the power line on the upstream port to the universal serial bus controller when the voltage on the power line is above a predetermined value.
29. A universal serial bus apparatus as claimed in claim 28 wherein the first means for determining whether the first power source or the second power source powers the universal serial bus controller further includes a comparator, the comparator has as inputs the power line and the predetermined value, the comparator comparing the voltage on the power line with the predetermined value, the comparator further signaling the switch to connect the second power source to the universal serial bus controller when the voltage on the power line is less than the predetermined value.
a fault detect circuit connected to the universal serial bus controller and connected to the power supply for indicating an overcurrent or thermal error to the universal serial bus controller and for turning on the power supply.
31. A compound universal serial bus apparatus as claimed in claim 30 wherein the external device is a monitor.
wherein the fault detect circuit is connected to the power line of the upstream port the fault detect circuit turning on the power supply after there is power on the power line and on the source of power.
33. A compound universal serial bus apparatus as claimed in claim 30 wherein the external device is connected to the power line on the upstream port.
34. A compound universal serial bus apparatus as claimed in claim 30 wherein the external device is connected to the power supply.
delaying the powering of the at least one downstream port via the second power source until after connecting the universal serial bus controller to the bus, powering the universal serial bus controller, and connecting the second power source to the at least one downstream port.
36. A method as claimed in claim 35 further comprising the step of protecting the at least one downstream port from the power supply unit in the event of an increase in current on the power supply over a predetermined limit.
37. A method as claimed in claim 36 wherein the step of protecting the at least one downstream port from the power supply unit includes the step of removing power from the downstream ports.
38. A method as claimed in claim 37 wherein the step of removing power from the downstream ports is done after removing the power supplied to the universal serial bus controller.
notifying the universal serial bus system of the overcurrent or the thermal error after the steps of sensing of the signal on the power subsystem, determining whether the power subsystem is powered and delaying the sending of the determination of whether the system is powered.
40. A method as claimed in claim 39 further comprising the step of comparing the signal with a value to determine whether an overcurrent or thermal error has occurred.
notifying the universal serial bus system of an overcurrent or a thermal error after the steps of sensing of the signal on a power subsystem, comparing the signal with a value to determine whether an overcurrent or thermal error has occurred and delaying the sending of the determination of whether the system is powered.
switching the power to the universal serial bus controller from the first power source to the second power source when the voltage on the first power source is less than a predetermined value.
43. A method as claimed in claim 42 further comprising the step of switching the power to the at least on downstream port from the second power source to the first power source when the voltage on the second power source is less than a predetermined value.
44. A method as claimed in claim 43 wherein the step of powering at least one downstream port which is connected to the universal serial bus controller with a second power source includes powering the at least one downstream port with a power supply.
45. A method as claimed in claim 44 wherein the step of switching the power to the at least on downstream port from the second power source to the first power source when the voltage on the second power source is less than a predetermined value includes switching the power when the power supply is approximately zero volts.
46. A method as claimed in claim 42 wherein the step of powering a universal serial bus controller with a first power source includes connecting the universal serial bus controller to an upstream port, the upstream port having a power line which connects with the universal serial bus controller.
47. A method as claimed in claim 46 wherein the step of switching the power to the universal serial bus controller from the first power source to the second power source when the voltage on the first power source is less than a predetermined value includes comparing the voltage on the power line with a predetermined value and switching the power from the first power source to the second power source when the voltage on the power line is less than the predetermined value.
"Micrel MIC2525 USB High-Side Power Switch Advance Information" (4 sheets).
"Micrel MIC2526 Dual USB High-Side Power Switch Advance Information" (6 sheets).
Belkin brochure regarding Express Bus™ Hub; undated.
CATC brochure regarding Andromeda™ USB Hub and Orion™ self-powered USB Hub; (2 sheets); undated.
Cherry Electrical Products brochure regarding G80-3000HXMUS Keyboard; Aug. 29, 1997.
Intel Manual entitled "8x931HA USB Customer Hub Preliminary Datasheet;" pp. 1-12; Nov. 1997.
Intel Manual entitled "Advance Information--8x930Hx Universal Serial Bus Hub Peripheral Controller;" pp. iii-33; May 1997.
Manual entitled "Universal Serial Bus Specification" Revision 1.0; pp. 1-10, 217-268; Jan. 15, 1996.
National Semiconductor Manual entitled "USBN9602 (Universal Serial Bus) Full Speed Function Controller With DMA Support;" pp. 1-43; Nov. 1997.
Solectron Texas Blueprint 9806020-001 C (2 sheets).
Solectron Texas Blueprints (9 sheets); 1996-1997.
Texas Instruments Manual entitled "(EVM) Evaluation Module Documentation--TUSBEM 2140 (USB 4-Port Hub & I2 C Interface)" (11 sheets); Aug. 1, 1997.
Texas Instruments Manual entitled "SN75240 Dual Universal Serial Bus Port Transient Suppressor;" pp. 1-4; Feb. 1997.
Texas Instruments Manual entitled "TPS2010, TPS2011, TPS2012, TPS2013, TPS2010Y Power-Distribution Switches;" pp. 6-1 through 6-18; Aug. 1995.
Texas Instruments Manual entitled "TPS2014, TPS2015 Power Distribution Switches;" pp. 1-21; Aug. 1997.
Texas Instruments Manual entitled "TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q, TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y Low-Droput Voltage Regulators;" pp. 1-14, 18-32; Jan. 1997.
Texas Instruments Manual entitled "TUSB2040 4-Port Hub for the Universal Serial Bus;" pp. 1-13; Aug. 1997.
Texas Instruments Manual entitled "TUSB2070 7-Port Hub for the Universal Serial Bus;" pp. 1-12; Aug. 1997.
Texas Instruments Manual entitled "TUSB2140 Data Manual--4-Port Hub With an Embedded Function for the Universal Serial Bus;" pp. iii through B-2 (63 sheets); Nov. 1997.

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A dog bite victim in Tennessee can recover compensation under a special statute and the doctrines of negligence, negligence per se, scienter, and intentional tort. The dog bite statute has an unusual limitation: it does not necessarily apply to injuries occuring on the dog owner's property, although it can possibly apply there. The law was written by Attorney Kenneth M. Phillips, the author of Dog Bite Law, except for the "residential exclusion" which was an amendment to his draft.
In 2007 Tennessee established strict liability for canine-inflicted injuries (bites and other injuries) under specific circumstances. Attorney Kenneth M. Phillips, the author of Dog Bite Law (this website), wrote the original bill on which the law was based, and testified about dogs and the law before the Senate Judiciary Committee. See the video of him testifying about the need to abandon the "one bite rule," below.
There is no liability for an attack that occurs on residential, farm or other noncommercial property owned, rented or leased by the dog owner, or occupied by the dog owner with permission, unless the victim proves scienter (see below). This last exception is referred to as the "residential exclusion."
The residential exclusion is a significant shortcoming of the Tennessee statute. It requires a victim to prove scienter (i.e., that the dog's owner knew or should have known of the dog's "dangerous propensities") if the injury-producing incident happened on residential, farm or other noncommercial property that the dog owner owned, leased, rented or was upon by virtue of the property owner's invitation. To learn more about the scienter requirement, see Scienter, Common Law Strict Liability (below), and also The One Bite Rule.
Tennessee is the only USA state that has a "residential exclusion" in its dog liability statute. The exclusion was not in the bill which was drafted by Attorney Phillips. It is a large loophole in the statute because over 50 percent of bites occur on the dog owner's property. (See Insurance Information Institute, Dog Bite Liability, accessed 8/4/08.) This means that the residential exclusion leaves over 50% of otherwise-qualified victims in Tennessee without compensation. Guests in a dog owner's home are not covered by his insurance, while strangers he encounters on the street are fully covered. For example, a dog owner's 6-year-old neice, bitten in the face, would not receive the necessary money for cosmetic surgery in years to come, while an unknown person bitten outside the house would. This is the type of legal loophole that the insurance industry puts into laws because no thinking, honest or compassionate person would do so.
If you are not a lawyer, but are a dog bite victim or a dog owner whose dog bit a person, the complexity of this law requires that you consult an attorney before talking to the other party's insurance adjuster.
"The owner or keeper of the dog is not answerable for injuries done by it when in a place it had a right to be, unless the dog was in fact vicious or otherwise dangerous, the owner or keeper knew, or under the circumstances should have known, of the dangerous disposition of the animal, and the injuries resulted from the known vicious or dangerous propensity of the animal. The basic key to recovery of damages for injuries caused by a dog is the knowledge of the owner or keeper that the animal is vicious or has mischievous propensities."
Plaintiffs suing for injuries or death caused by a dog bite must prove three elements. "First, they must prove that the defendant owned the dog. Second, they must prove that the defendant's dog caused the injuries. Third, they must prove that the defendants knew or should have known about the dog's dangerous propensities." Eden v. Johnson, No. 01A01-9603-CV-00141, 1996 WL 474428, at *2 (Tenn. Ct. App., Aug. 21, 1996) (citing Thompson v. Thompson, 749 S.W.2d 468, 470 (Tenn. Ct. App. 1988)); See Fletcher v. Richardson, 603 S.W.2d 734, 735 (Tenn. 1980) ("the basic key to recovery of damages for injuries caused by a dog is the knowledge of the owner or keeper that the animal is vicious or has mischievous propensities").
The state allows dog bite victims to recover damages caused by negligent dog owners. There must be proof of negligence. This can be difficult to prove, especially where the dog bite victim is a child and there were no witnesses, or where a person is killed and there are no witnesses.
The owner or keeper of domestic animals is liable for injuries inflicted by them only where he has been negligent, the animals were wrongfully in the place where they inflicted the injuries, or the injuries are the result of known vicious tendencies or propensities. A person has a right to own or keep domestic animals of any kind provided they are so restrained as to not expose others engaged in their ordinary or lawful pursuits to danger. The owner or keeper of a domestic animal is bound to take notice of the general propensities of the class to which it belongs, and also of any particular propensities peculiar to the animal itself of which he has knowledge or is put on notice; and in so far as such propensities are of a nature likely to cause injury he must exercise reasonable care to guard against them and to prevent injuries which are reasonably to be anticipated from them. McAbee v. Daniel, 445 S.W.2d 917, 923 (Tenn. App. 1968).
The violation of a statute or regulation is negligence per se as to members of the class that the statute or regulation is intended to protect. Alex v. Armstrong, 215 Tenn. 276, 385 S.W.2d 110 (1964); Traylor v. Coburn, 597 S.W.2d 319, 322 (Tenn. App. 1980); Berry v. Whitworth, 576 S.W.2d 351, 353 (Tenn. App. 1978). See Further Research (below) for a link that will enable you to research local laws on which this cause of action is based.
Langford v. Darden, No. M2004-00158-COA-R3-CV (Tenn.App. 02/16/2005) was a dog bite case against an absent landlord. The plaintiff argued that owing to the pervasive publicity about the viciousness of the tenants' dog, the landlord had constructive notice of its propensity to violence and should therefore be held liable. Summary judgment was granted to the landlord. The court of appeals affirmed. It stated that since Quarles was neither the owner nor the harborer of the dog, he could be held liable for the acts of the dog only upon proof that he had knowledge of the propensity of the dog to violence, and that he retained sufficient control over the leased premises to afford an opportunity for the landlord to require the tenant to remove the dog.
Dog owners shall, at all times, keep their animals on a leash or other suitable restraint or confined by a fence on their property or the private property of another, with the permission of the owner of that property so as to prevent the animal from being at large, biting or harassing any person engaged in a lawful act, interfering with the use of public property or with the use of another person's private property, or being in violation of any other section of this Code. No animal shall be allowed to run at large even on the property of the owner of such animal, unless confined by a fence or other suitable restraint.
State statutes and related materials can be found at the Tennessee section of Laws.com. City and county laws can be found at MTAS Municipal Codes. Always read both the city and county laws, not one or the other, because both can apply to the same case.

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December 19, 1980. Rehearing Denied January 27, 1981.
Appeal from the Circuit Court, Pinellas County, David F. Patterson, J.
Robert C. Ward of Adams Ward, Miami, for appellant.
H. Shelton Philips of Kaleel Kaleel, P.A., St. Petersburg, for appellees.
This is an appeal from an order finding Allstate Insurance Company and one of its employees in contempt and as a consequence entering a default against Allstate.
On September 28, 1978, Raymond Biddy and his wife obtained a judgment in an automobile accident case against Fallon an Carr for $240,000 and against their liability insurer, Allstate, for $100,000, the limits of the Allstate policy. The Biddys then sued Allstate for the excess alleging that Allstate had failed to settle the case as the result of negligence and bad faith.
On August 31, 1979, the Biddys' counsel served a notice of taking deposition on William Holloway, the regional vice president of Allstate for the region which includes Florida. The notice requested that Holloway produce Allstate's claim files relating to the Biddy v. Fallon case. Allstate filed a motion for a protective order on the ground that Holloway knew nothing about the matter. The Biddys' counsel responded by stating that he wanted to depose Holloway because he wanted the main officer of Allstate in Pinellas County to produce the records. He renoticed Holloway and again requested the same files. Allstate through Holloway and its attorney, A.C. Shields, then produced all of Allstate's master file except for a posttrial report of its trial attorney, Don Bulleit, which it withheld on the ground that Bulleit prepared the report after the verdict.
On October 24, 1979, the Biddys' counsel filed a motion to compel discovery, alleging that Allstate had failed to produce all of its files, including the field claims representative's trial summary. The court granted the motion on January 10, 1980, and ordered production of all the documents specified in the notice of Mr. Holloway's deposition. The court further ruled that if no other material existed, Allstate should file an affidavit so stating. Pursuant to the order, Mr. Shields and Herbert Varneran, Allstate's claims agent in Wellsley, Massachusetts, who had handled the Biddy v. Fallon case, filed affidavits stating that additional material (Bulleit's posttrial report) had now been furnished but that there was no field claims representative's trial summary.
On February 26, 1980, the Biddys' counsel took the deposition of Wayne Dowling, a former employee of Allstate who had been the field claims representative monitoring the Biddy v. Fallon trial. Dowling produced a field claims representative's trial summary. Mr. Shields then sought to withdraw his affidavit, and the Biddys filed a motion to compel discovery and to take further depositions. The court entered orders to show cause against Mr. Varneran, Mr. Holloway and Allstate for their failure to produce the field claims representative's trial summary.
At the hearing on the show cause order, the evidence presented showed that Allstate handles suits in the district claims office in the district in which its insured resides. Thus, although the accident in the case of Biddy v. Fallon occurred in Pinellas County, Florida, the Massachusetts district office handled the case because Fallon resided in Massachusetts. The district claim office handling the claim opens what is known as a master file which should contain all correspondence, memoranda and documents pertaining to the case. If the district claim office handling the suit desires, it may request the district claims office in the area in which the suit is pending to monitor the case. When a district claims office is requested to do this, it opens an accommodation file.
Biddy v. Fallon was scheduled for trial in September 1978 in St. Petersburg. Just prior to trial, Mr. Varneran requested that the St. Petersburg district claims office designate a field claims representative to monitor the trial and report to him. Mr. Dowling was the representative chosen. Varneran testified that after the trial ended he told Dowling that since he had made notes of their several telephone conversations during the trial and since he was receiving a full trial report from Mr. Bulleit, there was no need for him to send a trial report. Varneran also said that he did not see Dowling's trial summary until March or April of 1980 after Dowling's deposition. He stated that under no circumstances should a trial summary be directed to personnel in St. Petersburg in a case handled by his office in Massachusetts.
Mr. Varneran further testified that in September 1979 he came to Florida to bring the master file to Mr. Shields for the Holloway deposition and to look at the accommodation file in the St. Petersburg office to see that everything in that file was in his master file. He found nothing there that was not in the master file. He then turned the master file over to Shields for delivery to the Biddys' counsel. He said that while at the St. Petersburg office he did not check with Mrs. Galeener, the casualty unit manager, or with Robert Fletcher, the field unit manager, because he did not know that they had any connection with the Biddy file.
After Mr. Varneran had delivered the master file to Mr. Shields, Shields and Mr. Holloway went to the deposition and produced the file. Holloway testified that prior to this deposition he had no contact with the Biddy v. Fallon case. He stated that he understood that he was delivering a complete file.
Mr. Holloway further testified that after Mr. Dowling's employment with Allstate had been terminated on February 9, 1979, Dowling had requested a conference to discuss a number of grievances he had against Allstate. This meeting was held in May 1979, at which Holloway, Walter Maule, the southeastern zone security manager, Dowling, and Katherine Carr, a friend of Dowling, were present. Holloway said that the Biddy v. Fallon case was not discussed. Dowling testified that the case was not discussed by name, but Miss Carr stated that she thought the case was briefly mentioned as the Biddy case in the context of Dowling's complaint that Mrs. Galeener and others had tried to set him up to be fired.
Mr. Holloway also testified concerning his receipt of a letter dealing with some of Mr. Dowling's complaints against Allstate, to which a copy of Dowling's trial summary was attached. The letter dated June 6, 1979, was from D.R. Matte, the Florida regional claims manager, to Maule, with a copy to Holloway. Holloway said that since the letter had nothing to do with what he had discussed with Dowling and seemed to relate only to the claims division with which he was not involved, he did not think any more about it. Because the letter and the trial summary were not in his files, Holloway assumed that he threw them away, as he did with copies of most correspondence between two other department heads. He stated that he first heard of the existence of the Dowling summary after Dowling's deposition and that he immediately directed the attorneys to furnish it. He said he didn't question Mrs. Galeener before taking the master file, because it would not be standard procedure for her to have any file under the circumstances. He did not think of asking Dowling who was no longer employed by the company.
Sanford Shahan, a Florida regional claim analyst employed in the St. Petersburg office, testified that he had nothing to do with the Biddy v. Fallon file in the original suit. He said that his first contact with the Biddy v. Allstate excess case was when he received a call from K.D. Koenig, the home office staff counsel in Chicago, Illinois, who asked if an answer had been filed to the Biddys' complaint. Koenig's office had apparently become interested in the matter because of Allstate's potential exposure in the excess suit. Shahan then received a letter from Koenig dated July 12, 1979, which contained the observation that any portion of the file subsequent to the verdict should not ordinarily be subject to discovery. Koenig requested that Shahan have the accommodation file separated into two files, one for preverdict and one for postverdict material. Shahan said he instructed Robert Fletcher to start the second file. Fletcher kept the two files for a few weeks and then gave the postverdict volume to Shahan, who kept it in his office. Shahan never read the file and he did not know anything about Mr. Holloway's deposition or the dispute over the existence of the Dowling trial summary. When Mr. Shields came to see him after the Dowling deposition, he then looked in the postverdict volume and found Dowling's trial summary.
Wayne Dowling testified that Mrs. Galeener had requested him to prepare the trial summary and address it to her. He said that he thought this request was out of the ordinary, because under normal procedure the summary should have been directed to Mr. Varneran. He said he took Mrs. Galeener's request to be a part of a continuing scheme to have him fired.
Linda Galeener testified that she had requested Mr. Dowling to make a summary. She thought that Mr. Fletcher had asked her to do so. She recalled receiving the report but said she did not know what she had done with it. She said that even though it would be normal procedure for the person in charge of the master file to receive a trial summary report, she did not remember forwarding it to Mr. Varneran. Fletcher, on the other hand, testified that he did not ask Mrs. Galeener for a trial summary.
Mr. Shields testified that he talked to both Mr. Varneran and Mr. Bulleit about any field claims representative's trial summary that might have been prepared. Neither were aware of any, and Varneran advised him that he had not requested Dowling to make one. Shields said he found the original of the summary at the Allstate office after Dowling's deposition.
Following the hearing, the court entered an order in which it determined that Mr. Varneran was not guilty of contempt of court, that Mr. Holloway was guilty of contempt which was technical in nature and required no penalties, and that Allstate was also guilty of contempt of court. The court struck Allstate's answer to count I of Biddy's amended complaint (compensatory damages) and entered a default judgment against Allstate on count I. It also awarded the Biddys attorney's fees incurred in connection with the discovery proceedings.
The trial court's order leaves us with three separate matters to consider: (1) the citation of contempt against Mr. Holloway, (2) the citation of contempt against Allstate, and (3) the penalties imposed upon Allstate.
Had Holloway, with diligence, exercised the authority vested in him it can be concluded, absent collusion or concealment by subordinate employees, that the trial summary would have been produced. Holloway contends he acted reasonably in relying upon Allstate's counsel to furnish to him the materials he was required to produce without the necessity of any additional effort on his part. His position in this regard is untenable. It was unusual for Holloway to appear at such a deposition. This fact, together with the fact that this action seeks substantial damages to be awarded against Allstate itself and that Holloway's regional office was involved in the case is sufficient to put a reasonable man on notice of a necessity to investigate.
After a careful review of the evidence, we have reached the conclusion that it does not support the findings made by the trial court. Holloway had nothing to do with the Biddy v. Fallon case which was handled by the Massachusetts claims department with the help of the claims department in St. Petersburg with which he was not involved. It was Mr. Varneran who had charge of the Biddy v. Fallon case, and he did look in the accommodations file before turning the material over to Mr. Shields and Holloway. Moreover, Varneran later signed an affidavit along with Shields to the effect that there was no trial summary. Thus, it was reasonable for Holloway to assume that Allstate was producing all there was to produce. The fact that Holloway may have actually seen the trial summary several months earlier when he read a copy of a letter to which it was attached cannot alter this conclusion. The letter dealt not with the Biddy v. Fallon case but with a personnel matter concerning Mr. Dowling. Consequently, Holloway would not have had any reason to later connect the copy of the letter which he did not keep with the Biddy matter. Simply put, there was no evidence that Holloway wilfully ignored any order of the court. Therefore, the court was in error in holding him to be in contempt.
The court's finding of contempt against Allstate is another matter. While there is evidence that no one employee of Allstate purposefully attempted to conceal the trial summary knowing that it should be produced, nonetheless Allstate must bear some responsibility for the fact that it had the trial summary in its possession and yet did not produce it after being ordered to do so. Perhaps it can be said that the failure to produce was linked to confusion among some of Allstate's employees as to whether the trial summary, being a document prepared after the verdict in the Biddy v. Fallon case, was protected from discovery. Even so Allstate was under order to produce a category of documents which included the trial summary. While the employees of Allstate directly involved in the production of documents may not have had personal knowledge of the trial summary, they were on notice of the possibility of its existence. It is incumbent upon a company the size of Allstate to structure its organization in such a way that the right hand knows what the left hand is doing.
See Stone v. Travelers Ins. Co., 326 So.2d 241 (Fla. 3d DCA 1976), in which the court held that in a bad faith suit all materials in the insurance company's file prepared after final judgment in the original action are subject to production upon a showing of good cause or pursuant to an order of court following an in camera inspection.
[The rule] is not penal. It is not punitive. It is not aimed at punishment of the litigant. The objective is compliance-compliance with the discovery Rules. The sanctions are set up as a means to an end, not the end itself. The end is compliance. The sanctions should be invoked only in flagrant cases, certainly in no less than aggravated cases, and then only after the court has given the defaulting party a reasonable opportunity to conform after originally failing or even refusing to appear. This is unmistakably the trend of judicial thinking in Florida on the "sanction" Rule.
Hurley v. Werly, 203 So.2d 530, 537 (Fla. 2d DCA 1967). See also Ramos v. Sanchez, 375 So.2d 51 (Fla. 2d DCA 1979); Travelers Insurance Co. v. Rodriguez, 357 So.2d 464 (Fla. 2d DCA 1978); In re Estate of Ulm, 345 So.2d 1099 (Fla. 2d DCA 1977). Viewed in light of this standard, it is clear that this portion of the court's order cannot be sustained. Compliance had already been obtained because long before the default was entered, Allstate had delivered the trial summary into the hands of the Biddy's attorney.
The sanction of declaring a default should be reserved for the most egregious conduct. From a corporate standpoint, Allstate wilfully represented that it had furnished its entire file at a time when it had not exercised reasonable care to determine the existence of additional documents. But the record does not support the court's conclusion that Allstate embarked upon a calculated effort to conceal Dowling's trial summary. The most suspicious aspect of Allstate's conduct involved the removal of the trial summary into a separate file. Yet, compliance with Koenig's request to separate the postverdict papers from the balance of the file occurred before the Biddys' counsel ever began discovery and at a time when the existence of the summary had not come into dispute. It is evident that Allstate's failure to acknowledge the existence of Dowling's trial summary stemmed from a bureaucratic breakdown rather than a conscious design to deceive the court or opposing counsel.
Part of the court's indignance can probably be traced to testimony that shortly after Dowling had submitted his trial summary. Mrs. Galeener directed him to omit two paragraphs concerning Allstate's refusal to settle within the limits during the trial. However, the addition of these two paragraphs to the trial summary does not materially strengthen the Biddys' excess claim, and Dowling fully developed Allstate's refusal to settle when he gave his deposition. In any event, Allstate was held in contempt for failing to produce the trial summary, not for causing its alteration.
In summary, we reverse the adjudication of contempt against Mr. Holloway, the striking of Allstate's pleadings, and the entry of a default judgment against Allstate. However, we affirm the adjudication of contempt against Allstate and remand the case in order that the trial judge may, if he determines it appropriate, impose a fine upon Allstate in an amount not to exceed $2,000. We also affirm the assessment of attorney's fees, and further award the Biddys attorney's fees incurred in connection with this appeal. On remand, the trial judge should set the amount of these fees to be paid by Allstate.
SCHEB and BOARDMAN, JJ., concur.

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