A Brief Overview of Novel Approaches in Designing High Performance VCOs <s> A. Phase Noise <s> A complete six-order CMOS differential ring voltage-controlled oscillator (VCO) is designed with a 0.35/m CMOS process in this paper. The circuit has been successfully applied in a CPPLL of a high-speed high-resolution DAC, and has been successfully taped out and passed the test. The relative factors that influence the VCO phase noise are analyzed comprehensively to instruct the circuit design. The designed differential ring oscillator includes the VCO unit circuit, the bias circuit for the tail current source, the start-up circuit, and the wave shaping circuit. The oscillation frequency of the designed VCO ranges from 96MHz to 400MHz. An improved VCO unit circuit was adopted to reduce the process influence and the coupling between the output and the ground, as well as to lower the phase noise by connecting a sub-pF magnitude capacitance to the output terminal. Moreover, the start-up circuit is designed to ensure that the VCO could start to oscillate quickly, and the optimal layout is designed to lower the influence of the noise. The circuit is simulated using 0.35μm CMOS process, the simulation results illustrate that the K VCO exhibits an ideal linearity with a value of 467MHz/V and the phase noise has been lowered effectively with a value of −135dBc/Hz@1MHz in the typical operation condition. The test results show that the designed VCO could work properly and the CPPLL could be locked quickly. The designed VCO circuit could be applied in the electronic measurement equipments, providing a controllable and stable frequency signal for the system. <s> BIB001 </s> A Brief Overview of Novel Approaches in Designing High Performance VCOs <s> A. Phase Noise <s> A transformer-based cross-coupled complementary LC voltage-controlled oscillator (VCO) is investigated which is capable of operating at the Ku-band frequency range with low power consumption. The VCO simultaneously achieves low phase noise and low power consumption. The VCO demonstrates a measured tuning range of 12.1–13.1 GHz and a phase noise of −116.4 dBc/Hz at 1 MHz at a centre frequency of 12.4 GHz. The VCO consumes 0.96 mW from a 0.45 V supply voltage with a figure of merit of 198.4. It is implemented in a standard 0.13 µm CMOS process with an area of 0.23 mm2. <s> BIB002 </s> A Brief Overview of Novel Approaches in Designing High Performance VCOs <s> A. Phase Noise <s> The impact of CMOS technology scaling, on the tuning range and phase noise performance of mm-wave LC voltage controlled oscillators (LC-VCOs) is presented. As a preliminary step, the fundamental LC-VCO elements (i) tank inductor, (ii) fixed and variable capacitor elements, and (iii) cross-coupled transistor pair are analytically modeled across the frequency range 10-50GHz. These models are then exploited to analyze the tuning range and phase noise revealing the ultimate performance bounds for simultaneously achieving low phase noise and wide tuning range in mm-wave CMOS LC-VCOs across the CMOS technology scaling (from 130nm down to 45nm) are explored. The analysis demonstrates the improvement of the maximum achievable tuning range, phase noise, and figures-of-merit (FoM and FoMT) with the technology down scaling. Finally, the performance trend of the mm-wave CMOS LC-VCOs implemented using both thin and thick gate cross-coupled pair is compared. The analysis indicates that thick gate cross-coupled pair VCOs achieve better phase noise at the expense of power consumption and maximum tuning range. HighlightsMotivations and challenges of mm-wave CMOS LC-VCOs.Study of the limitations imposed by the LC-VCO elements across the CMOS processes.Tuning range quantitative analysis and minimum bounds for phase noise, FoM, FoMT.Comparing thin and thick gate cross-coupled pairs LC-VCOs across the CMOS nodes. <s> BIB003
In the existing phase noise models, the power supply and the substrate noises have not usually been taken into account. However, in high-speed systems, power supply and substrate noises are higher than the device noise, and therefore for a precise design of a VCO, a detailed look into the phase noise analysis is mandatory BIB001 . According to Leeson's model, phase noise can be presented as follow  : where F is noise factor, k is the Boltzmann's constant, T is the temperature, Ps is the average consumed power in the tank circuit, L Q is the quality factor of the tank with all load elements included, 0 f is the oscillation frequency, f  is frequency offset and 1 f is the corner frequency. In BIB002 , a modification for Leeson's model is presented which shows that the Q factor has a direct impact on the phase noise of a VCO. The modified equation is shown in Eq. (2) which it can be seen that the phase noise is inversely proportional to the Q, thus increasing the Q factor will result in better phase performance.  Although Eq. (2) shows the relationship between Q and phase noise, a more detailed modification of Leeson's model is presented in  , which is shown in Eq. (3). In Eq. (3), a new factor fc, has been introduced which corresponds to the flicker frequency, K0 is the modulation sensitivity expressed in (Hz/V) and Q0 gives the unloaded quality factor of the tank circuit. In BIB003 it is shown that the technology scaling also has impact on the phase noise and tuning range. Nowadays, in the manufacturing of VCO, a combination of both thin and thick gates transistor are used in a similar technology in order to simultaneously operate in both low and high voltage applications. By utilizing the thick gate transistors, it is possible to exploit higher supply voltages which lead to a lower thermal phase noise. On the other hand, improving the phase noise by using the mentioned method results in lower operating frequency, narrower tuning range, and higher power consumption. 