A Review of Near-Memory Computing Architectures: Opportunities and Challenges <s> Microarchitecture-Independent Workload Characterization <s> Robust and powerful software instrumentation tools are essential for program analysis tasks such as profiling, performance evaluation, and bug detection. To meet this need, we have developed a new instrumentation system called Pin. Our goals are to provide easy-to-use, portable, transparent, and efficient instrumentation. Instrumentation tools (called Pintools) are written in C/C++ using Pin's rich API. Pin follows the model of ATOM, allowing the tool writer to analyze an application at the instruction level without the need for detailed knowledge of the underlying instruction set. The API is designed to be architecture independent whenever possible, making Pintools source compatible across different architectures. However, a Pintool can access architecture-specific details when necessary. Instrumentation with Pin is mostly transparent as the application and Pintool observe the application's original, uninstrumented behavior. Pin uses dynamic compilation to instrument executables while they are running. For efficiency, Pin uses several techniques, including inlining, register re-allocation, liveness analysis, and instruction scheduling to optimize instrumentation. This fully automated approach delivers significantly better instrumentation performance than similar tools. For example, Pin is 3.3x faster than Valgrind and 2x faster than DynamoRIO for basic-block counting. To illustrate Pin's versatility, we describe two Pintools in daily use to analyze production software. Pin is publicly available for Linux platforms on four architectures: IA32 (32-bit x86), EM64T (64-bit x86), Itanium®, and ARM. In the ten months since Pin 2 was released in July 2004, there have been over 3000 downloads from its website. <s> BIB001 </s> A Review of Near-Memory Computing Architectures: Opportunities and Challenges <s> Microarchitecture-Independent Workload Characterization <s> This paper presents a framework for characterizing the distribution of fine-grained parallelism, data movement, and communication-minimizing code partitions. Understanding the spectrum of parallelism available in applications, and how much data movement might result if such parallelism is exploited, is essential in the hardware design process because these properties will be the limiters to performance scaling of future computing systems. The framework is applied to characterizing 26 applications and kernels, classified according to their dominant components in the Berkeley dwarf/ computational motif classification. The distributions of ILP and TLP over execution time are studied, and it is shown that, though mean ILP is high, available ILP is significantly smaller for most of the execution. The results from this framework are complemented by hardware performance counter data on two RISC platforms (IBM Power7 and Freescale P2020) and one CISC platform (IntelAtom D510), spanning a broad range of real machine characteristics. Employing a combination of these new techniques, and building upon previous proposals, it is demonstrated that the similarity in available ideal-case parallelism and data movement within and across the dwarf classes, is limited. <s> BIB002 </s> A Review of Near-Memory Computing Architectures: Opportunities and Challenges <s> Microarchitecture-Independent Workload Characterization <s> Specialized architectures will become increasingly important as the computing industry demands more energy-efficient designs. The application-centric design style for these architectures is heavily dependent on workload characterization of intrinsic program characteristics, but at the same time these architectures are likely to be decoupled from legacy ISAs. In this work, we perform ISA-independent workload characterization for a variety of important intrinsic program characteristics relating to computation, memory, and control flow. The analysis is performed using a JIT compiler that emits ISA-independent instructions. We compare this analysis with an x86 trace and find that several of the analyses are highly sensitive to the ISA. We conclude that designers of specialized architectures must adopt ISA-independent workload characterization approaches. <s> BIB003 </s> A Review of Near-Memory Computing Architectures: Opportunities and Challenges <s> Microarchitecture-Independent Workload Characterization <s> Simulators and empirical profiling data are often used to understand how suitable a specific hardware architecture is for an application. However, simulators can be slow, and empirical profiling-based methods can only provide insights about the existing hardware on which the applications are executed. While the insights obtained in this way are valuable, such methods cannot be used to evaluate a large number of system designs efficiently. Analytical performance evaluation models are fast alternatives, particularly well-suited for system design-space exploration. However, to be truly application-specific, they need to be combined with a workload model that captures relevant application characteristics. In this paper we introduce PISA, a framework based on the LLVM infrastructure that is able to generate such a model for sequential and parallel applications by performing hardware-independent characterization. Characteristics such as instruction-level parallelism, memory access patterns and branch behavior are analyzed per thread or process during application execution. To illustrate the potential of the framework, we provide a detailed characterization of a representative benchmark for graph-based analytics, Graph 500. Finally, we analyze how the properties extracted with PISA across Graph 500 and SPEC CPU2006 applications compare to measurements performed on x86 and POWER8 processors. <s> BIB004
Hoste et al.  proposed a Microarchitecture-Independent Workload Characterization (MICA) in which they used Pin BIB001 as basis. Also, they proposed new methodologies to analyze these characteristics, based on principal components analysis (PCA), which gives a reduction to data set's dimensionality and removes correlation from the data set, and also a genetic algorithm (GA), which reduces the data set's dimensionality, but with a retained dimension easily to understand. Anghel et al. BIB004 presented a Platform-Independent Software Analysis (PISA) tool, based on the LLVM compiler. It takes a source code as input and generates a LLVM-IR bitstream which is instrumented with some function calls to a tool library that implements different workload analysis. Characteristics which PISA can extract are: Instruction Mix, Instruction-Level-Parallelism, Memory Access Patterns, Branch Entropy, Communication Patterns. Unlike other tools, PISA is also capable of analyzing multi-threaded programs. In the same way Caparrós et al. BIB002 used the LLVM framework for their tool. It's only for sequential code, but there are interesting metrics that are extracted such as: Data-LevelParallelism (DLP), Thread-Level-Parallelism (TLP) and TaskLevel Parallelism. This analysis is made through a DirectAcyclic-Graph (DAG) that searches for the real data dependencies and at various granularity levels, e.g. instructions, basic blocks, functions. Using the Intermediate Representation (IR) from the JustIn-Time (JIT) compiler Shao et al. BIB003 extracted number of opcodes, the value of branch entropy, the value of memory entropy, the unique number of static instructions, and the unique number of data addresses for sequential benchmarks.