Low power processor architectures and contemporary techniques for power optimization—a review <s> C. Application Specific Instruction Set Processors (ASIPs) and Extensible Processors <s> Designing an application-specific embedded system in nanometer technologies has become more difficult than ever due to the rapid increase in design complexity and manufacturing cost. Efficiency and flexibility must be carefully balanced to meet different application requirements. The recently emerged configurable and extensible processor architectures offer a favorable tradeoff between efficiency and flexibility, and a promising way to minimize certain important metrics (e.g., execution time, code size, etc.) of the embedded processors. This paper addresses the problem of generating the application-specific instructions to improve the execution speed for configurable processors. A set of algorithms, including pattern generation, pattern selection, and application mapping, are proposed to efficiently utilize the instruction set extensibility of the target configurable processor. Applications of our approach to several real-life benchmarks on the Altera Nios processor show encouraging performance speedup (2.75X on average and up to 3.73X in some cases). <s> BIB001 </s> Low power processor architectures and contemporary techniques for power optimization—a review <s> C. Application Specific Instruction Set Processors (ASIPs) and Extensible Processors <s> As we embrace the world of personal, portable, and perplexingly complex digital systems, it has befallen upon the bewildered designer to take advantage of the available transistors to produce a system which is small, fast, cheap and correct, yet possesses increased functionality. Increasingly, these systems have to consume little energy. Designers are increasingly turning towards small processors, which are low power, and customize these processors both in software and hardware to achieve their objectives of a low power system, which is verified, and has short design turnaround times. Designing Embedded Processorsexamines the many ways in which processor based systems are designed to allow low power devices. It looks at processor design methods, memory optimization, dynamic voltage scaling methods, compiler methods, and multi processor methods. Each section has an introductory chapter to give a breadth view, and have a few specialist chapters in the area to give a deeper perspective. The book provides a good starting point to engineers in the area, and to research students embarking upon the exciting area of embedded systems and architectures. <s> BIB002
For more than a decade ASIPs have been researched as a compromise between General Purpose Processors and ASICs; providing reasonable performance, and power savings. The ASIP generally comprise of some basic instructions and the use of a code profiler to facilitate instruction extension, and logic parameterization. The instruction extension gives the flexibility of designing custom instructions based on application, thus resulting in a very efficient code execution. The ASIP Profiler may also provide flexibility of inclusion or exclusion of certain registers or logic blocks, or selection between bigendian or little endian BIB002 . Designing an optimal extended instruction set (IS) is the most challenging aspect, and has a direct impact on the performance of the ASIP. For larger software, it is very difficult to manually extend the IS, and this is further complicated by various design constraints, such as the format of the extended instructions (e.g., the number of input and output operands), clock period, available chip area, etc BIB001 . Fig. 10 shows a typical design flow for extensible processor generation. Cong et al. present a set of algorithms, including pattern generation, pattern selection, and application mapping, to efficiently utilize the instruction set extensibility of the target configurable processor BIB001 . There have been several successful commercial implementations of ASIPs like Tensilica"s Extensa Processors  , Improv Systems Jazz DSP, Altera"s NIOS and Xilinx Microblaze processors.