SHA-2 Acceleration Meeting the Needs of Emerging Applications: A Comparative Survey <s> 2) VARIABLE PRECOMPUTATION <s> This paper proposes a set of new techniques to improve the implementation of the SHA-2 hashing algorithm. These techniques consist mostly in operation rescheduling and hardware reutilization, allowing a significant reduction of the critical path while the required area also decreases. Both SHA256 and SHA512 hash functions have been implemented and tested in the VIRTEX II Pro prototyping technology. Experimental results suggest improvements to related SHA256 art above 50% when compared with commercial cores and 100% to academia art, and above 70% for the SHA512 hash function. The resulting cores are capable of achieving the same throughput as the fastest unrolled architectures with 25% less area occupation than the smallest proposed architectures. The proposed cores achieve a throughput of 1.4 Gbit/s and 1.8 Gbit/s with a slice requirement of 755 and 1667 for SHA256 and SHA512 respectively, on a XC2VP30-7 FPGA. <s> BIB001 </s> SHA-2 Acceleration Meeting the Needs of Emerging Applications: A Comparative Survey <s> 2) VARIABLE PRECOMPUTATION <s> Many cryptographic primitives that are used in cryptographic schemes and security protocols such as SET, PKI, IPSec, and VPNs utilize hash functions, which form a special family of cryptographic algorithms. Applications that use these security schemes are becoming very popular as time goes by and this means that some of these applications call for higher throughput either due to their rapid acceptance by the market or due to their nature. In this work, a new methodology is presented for achieving high operating frequency and throughput for the implementations of all widely used-and those expected to be used in the near future-hash functions such as MD-5, SHA-1, RIPEMD (all versions), SHA-256, SHA-384, SHA-512, and so forth. In the proposed methodology, five different techniques have been developed and combined with the finest way so as to achieve the maximum performance. Compared to conventional pipelined implementations of hash functions (in FPGAs), the proposed methodology can lead even to a 160 percent throughput increase. <s> BIB002
Some values can be computed earlier than strictly needed, if the inputs on which they depend are already available. If the computation is on the critical path, this can directly improve the frequency and hence the throughput. Precomputation can be applied to SHA-2 at two distinct scales. Looking at the SHA-2 algorithm as a whole, we highlight that the message schedule described by Equation (II.4) does not depend on any intermediate result, and hence can be precomputed so as to make the proper message block available when needed. In fact, the first 16 values of W t are available from the very beginning, and the time needed to compute a W t value is usually less than the time required by Equation (IV.1). Moreover, due to the fact that the values of the constant K t are known from the beginning of the computation, the precomputation of W t allows for the precomputation of the sums W t + K t , as done in BIB002 . Precomputation can also be exploited within the transformation round core, by computing in the current step some values that are not immediately used, but will be consumed by some of the following iterations. This type of precomputation is also favoured by Equation (II.12), which implies that the values of the accumulator variables, except those that are computed in the current round, are available at least one round earlier. By repeatedly applying Equation (II.12), it turns out that some accumulators are actually available two or even three rounds in advance. Some examples of this kind of precomputation, also called operation rescheduling BIB001 , are illustrated in Section V-C; precomputation within the round also underpins the quasi-pipelining approach, discussed in Section IV-C6.