Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> A new two-terminal circuit element-called the memristorcharacterized by a relationship between the charge q(t)\equiv \int_{-\infty}^{t} i(\tau) d \tau and the flux-linkage \varphi(t)\equiv \int_{- \infty}^{t} v(\tau) d \tau is introduced as the fourth basic circuit element. An electromagnetic field interpretation of this relationship in terms of a quasi-static expansion of Maxwell's equations is presented. Many circuit-theoretic properties of memistors are derived. It is shown that this element exhibits some peculiar behavior different from that exhibited by resistors, inductors, or capacitors. These properties lead to a number of unique applications which cannot be realized with RLC networks alone. Although a physical memristor device without internal power supply has not yet been discovered, operational laboratory models have been built with the help of active circuits. Experimental results are presented to demonstrate the properties and potential applications of memristors. <s> BIB001 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Carbon nanotubes (CNTs) are amongst the most explored one-dimensional nanostructures and have attracted tremendous interest from fundamental science and technological perspectives. Albeit topologically simple, they exhibit a rich variety of intriguing electronic properties, such as metallic and semiconducting behaviour. Furthermore, these structures are atomically precise, meaning that each carbon atom is still three-fold coordinated without any dangling bonds. CNTs have been used in many laboratories to build prototype nanodevices. These devices include metallic wires, field-effect transistors, electromechanical sensors and displays. They potentially form the basis of future all-carbon electronics.This review deals with the building blocks of understanding the device physics of CNT-based nanodevices. There are many features that make CNTs different from traditional materials, including chirality-dependent electronic properties, the one-dimensional nature of electrostatic screening and the presence of several direct bandgaps. Understanding these novel properties and their impact on devices is crucial in the development and evolution of CNT applications. <s> BIB002 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> In this letter, we demonstrate a gate-all-around single-wall carbon nanotube field-effect transistor. This is the first successful experimental implementation of an off-chip gate and gate-dielectric assembly with subsequent deposition on a suitable substrate. The fabrication process and device measurements are discussed in the letter. We also argue in how far charges in the gate oxide are responsible for the observed nonideal device performance. <s> BIB003 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Organic nanowires self-assembled from small-molecule semiconductors and conducting polymers have attracted an enormous amount of interest for use in organic field-effect transistors. This new class of materials offers solution processability, the potential for elucidating transport mechanisms and structure-property relationships, and the realization of high-performance transistors that rival the performance of amorphous Si. We discuss the self-assembly of one-dimensional, single-crystalline organic nanowires, show the structures of commonly employed organic semiconductors, and review some of the advances in this field. <s> BIB004 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Semiconductor nanowires represent unique materials for exploring phenomena at the nanoscale. Developments in nanowire growth have led to the demonstration of a wide range of nanowire materials with precise control of composition, morphology, and electrical properties, and it is believed that this excellent control together with small channel size could yield device performance exceeding that obtained using top-down techniques. Here, we review advances in chemically synthesized semiconductor nanowires as nanoelectronic devices. We first introduce basic nanowire field-effect transistor structures and review results obtained from both p- and n-channel homogeneous composition nanowires. Second, we describe nanowire heterostructures, show that by using nanowire heterostructures, several limiting factors in homogeneous nanowire devices can be mitigated, and demonstrate that nanowire transistor performance can reach the ballistic limit and exceed state-of-the-art planar devices. Third, we discuss basic methods for organization of nanowires necessary for fabricating arrays of device and circuits. Fourth, we introduce the concept of crossbar nanowire circuits, discuss results for both transistor and nonvolatile switch devices, and describe unique approaches for multiplexing/demultiplexing enabled by synthetically coded nanowire. Fifth, we discuss the unique application of thin-film nanowire transistor arrays on low-cost substrates and illustrate this with results for relatively high-frequency ring oscillators and completely transparent device arrays. Finally, we describe 3-D heterogeneous integration that is uniquely enabled by multifunctional nanowires within a bottom-up approach. <s> BIB005 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Spintronic memristor devices based upon spin torque induced magnetization motion are presented and potential application examples are given. The structure and material of these proposed spin torque memristors are based upon existing (and/or commercialized) magnetic devices and can be easily integrated on top of a CMOS. This provides better controllability and flexibility to realize the promises of nanoscale memristors. Utilizing its unique device behavior, the paper explores spintronic memristor potential applications in multibit data storage and logic, novel sensing scheme, power management and information security. <s> BIB006 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Conduction mechanisms in junctionless nanowire transistors (gated resistors) are compared to inversion-mode and accumulation-mode MOS devices. The junctionless device uses bulk conduction instead of surface channel. The current drive is controlled by doping concentration and not by gate capacitance. The variation of threshold voltage with physical parameters and intrinsic device performance is analyzed. A scheme is proposed for the fabrication of the devices on bulk silicon. <s> BIB007 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> We present a novel approach for large-scale silicon nanowire (SiNW) array fabrication for bioelectronic applications. Nanoimprint lithography was combined with standard CMOS processing on 4 in. SOI wafers in order to produce highly integrated arrays of silicon nanowire field-effect transistors (SiNW-FET). With a very smooth surface due to wet anisotropic etching, SiNW-FET arrays show a good electronic performance with a subthreshold slope of about 85 mV/decade. When applying a front-gate control of the wires via an electrochemical reference electrode, reliable electronic performance inside an electrolyte solution can be achieved. Our SiNW-FET sensors exhibit almost no electronic hysteresis on forward and backward bias sweeps. In this article the fabrication process, electronic and electrochemical characterizations and first biomolecular detection experiments are presented. For biodetection experiments we used a differential readout between molecule-free wires and wires carrying covalently attached biomolecules such as short, single-stranded DNA or biotin. With our SiNW-FET arrays a reliable detection of biomolecular layers can be achieved. <s> BIB008 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> This first demonstration of CNT transistors with channel lengths down to 9 nm shows substantially better scaling behavior than theoretically expected. Numerical simulations suggest that a possible explanation for the surprisingly good performance is a result of the gate modulating both the charge in the channel and in the contact regions. The unprecedented performance should ignite exciting new research into improving the purity and placement of nanotubes, as well as optimizing CNT transistor structure and integration. Results from aggressively scaling these molecular-channel transistors exhibit their strong suitability for a low-voltage, high-performance logic technology. <s> BIB009 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Memristors are two-terminal devices with varying resistance, where the behavior is dependent on the history of the device. In recent years, different physical phenomena of resistive switching have been linked with the theoretical concept of a memristor, and several emerging memory devices (e.g., Phase Change Memory, Resistive RAM, STT-MRAM) are now considered as memristors. Memristors hold promise for use in diverse applications such as memory, digital logic, analog circuits, and neuromorphic systems. Important characteristics of memristors include high speed, low power, good scalability, data retention, endurance, and compatibility with conventional CMOS in terms of manufacturing and operating voltages. One interesting property of some memristors is a nonlinear response to current or voltage. Nonlinear memristors exhibit a current or voltage threshold, such that the resistance is affected only by currents or voltages which exceed the threshold, while the resistance of a linear memristor changes with small perturbations in device current. Different applications exploit different characteristics of a memristor. In this article, the desired characteristics for different applications are presented from the viewpoint of an integrated circuit designer. Understanding the desired characteristics for different applications can assist device and material engineers in providing the appropriate behavior when developing memristive devices, thereby optimizing these devices for different applications. <s> BIB010 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> A computer built entirely using transistors based on carbon nanotubes, which is capable of multitasking and emulating instructions from the MIPS instruction set, is enabled by methods that overcome inherent challenges with this new technology. Carbon nanotubes have long been touted as promising building blocks for computers based on carbon rather than silicon. A main motivation towards this goal is the potential for circuits using carbon nanotube transistors to achieve high energy efficiency. Various carbon nanotube electronic circuit blocks have been demonstrated previously, but Max Shulaker et al. now reach a true milestone in the fields of carbon electronics and nanoelectronics by building a simple but functional computer made entirely from carbon nanotube transistors. Composed of 178 transistors, each containing between 10 and 200 carbon nanotubes, it runs a simple operating system and is capable of multitasking: it performs four tasks (summarized as instruction fetch, data fetch, arithmetic operation and write-back) and can run two different programs concurrently. The miniaturization of electronic devices has been the principal driving force behind the semiconductor industry, and has brought about major improvements in computational power and energy efficiency. Although advances with silicon-based electronics continue to be made, alternative technologies are being explored. Digital circuits based on transistors fabricated from carbon nanotubes (CNTs) have the potential to outperform silicon by improving the energy–delay product, a metric of energy efficiency, by more than an order of magnitude. Hence, CNTs are an exciting complement to existing semiconductor technologies1,2. Owing to substantial fundamental imperfections inherent in CNTs, however, only very basic circuit blocks have been demonstrated. Here we show how these imperfections can be overcome, and demonstrate the first computer built entirely using CNT-based transistors. The CNT computer runs an operating system that is capable of multitasking: as a demonstration, we perform counting and integer-sorting simultaneously. In addition, we implement 20 different instructions from the commercial MIPS instruction set to demonstrate the generality of our CNT computer. This experimental demonstration is the most complex carbon-based electronic system yet realized. It is a considerable advance because CNTs are prominent among a variety of emerging technologies that are being considered for the next generation of highly energy-efficient electronic systems3,4. <s> BIB011 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> We present results of endurance and retention characterization for one of the first commercially available TaOx-based resistive memory chip in room and higher temperature environments. Data retention of the memory chip shows activation energy of 1.13eV and demonstrates an 85°C 10-year data retention even after 250,000 programming cycles. The combined program and read errors were in the range of 10−7 to 10−5 and the memory chip withstood 106 program cycles at 125°C. Overall, the reliability of this commercial resistive memory chip compares well with flash memory. <s> BIB012 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> A 27nm 16Gb Cu based NV Re-RAM chip has been demonstrated. Novel process introduction to enable this technology include a Damascene Cell, Line-SAC Digit Lines filled with Cu, exhumed-silicided array contacts, raised epitaxial arrays, and high-drive buried access devices. <s> BIB013 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Increasing functional complexity and dimensional compactness of electronic devices have led to progressively higher power dissipation, mainly in the form of heat. Overheating of semiconductor-based electronics has been the primary reason for their failure. Such failures originate at the interface of the heat sink (commonly Cu and Al) and the substrate (silicon) due to the large mismatch in thermal expansion coefficients (∼300%) of metals and silicon. Therefore, the effective cooling of such electronics demands a material with both high thermal conductivity and a similar coefficient of thermal expansion (CTE) to silicon. Addressing this demand, we have developed a carbon nanotube–copper (CNT–Cu) composite with high metallic thermal conductivity (395 W m−1 K−1) and a low, silicon-like CTE (5.0 ppm K−1). The thermal conductivity was identical to that of Cu (400 W m−1 K−1) and higher than those of most metals (Ti, Al, Au). Importantly, the CTE mismatch between CNT–Cu and silicon was only ∼10%, meaning an excellent compatibility. The seamless integration of CNTs and Cu was achieved through a unique two-stage electrodeposition approach to create an extensive and continuous interface between the Cu and CNTs. This allowed for thermal contributions from both Cu and CNTs, resulting in high thermal conductivity. Simultaneously, the high volume fraction of CNTs balanced the thermal expansion of Cu, accounting for the low CTE of the CNT–Cu composite. The experimental observations were in good quantitative concurrence with the theoretically described ‘matrix-bubble’ model. Further, we demonstrated identical in-situ thermal strain behaviour of the CNT–Cu composite to Si-based dielectrics, thereby generating the least interfacial thermal strain. This unique combination of properties places CNT–Cu as an isolated spot in an Ashby map of thermal conductivity and CTE. Finally, the CNT–Cu composite exhibited the greatest stability to temperature as indicated by its low thermal distortion parameter (TDP). Thus, this material presents a viable and efficient alternative to existing materials for thermal management in electronics. <s> BIB014 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Abstract This paper proposes a memristive switching mechanism of an individual vertically aligned carbon nanotube related to the formation and subsequent redistribution of non-uniform elastic strain and piezoelectric charge in the nanotube under the influence of an external electric field. We experimentally confirmed the occurrence of an internal electric field in the carbon nanotube under non-uniform elastic strain and its dependence on the applied voltage. Our findings also revealed the dependence of resistive switching parameters of strained nanotubes on their mechanical and geometric parameters, that result in an opportunity to create memristive structures based on vertically aligned carbon nanotubes with reproducible parameters. The results of the study showed that vertically aligned carbon nanotubes can be used to create memristive structures with planar dimensions, defined by the diameter of nanotubes, that would outperform metal-oxide memristors in terms of performance, scalability and efficiency. <s> BIB015 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> With CMOS scaling reaching the limits in the next decade, new approaches are required to enhance the functionality of electronic systems. Reconfigurability on the device level promises to realize more complex systems with a lower device count. In the last 5 years a number of interesting concepts have been proposed to realize such a device level reconfiguration. Among these the reconfigurable field effect transistor (RFET), a device that can be configured between an n-channel and p-channel behavior by applying an electrical signal, can be considered as an end of roadmap extension of current technology with only small modifications to the process flow [1]. This paper gives a review on the RFET basics and current status. In the first sections the state of the art of reconfigurable devices will be summarized [2] and the RFET will be introduced together with related devices based on silicon nanowire technology [3]. The device optimization with respect to device symmetry and performance will be discussed next [4,5]. The potential of the RFET device technology will then be shown by discussiing circuit implementations making use of the unique advantages of this device concept [6,7,8]. The basic device concept was also extended towards applications in flexible devices and sensors [9,10] extending the capabilities also towards so called More than Moore applications were new functionalities are implemented in CMOS base processes. Finally the prospects of the RFET device technology will be discussed. <s> BIB016 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Terence Hook has been with IBM since 1980, after receiving his ScB from Brown University. He earned his PhD in Electrical Engineering from Yale University in 1986. While at IBM, he has worked on technology integration and device design for bipolar, BiCMOS, and CMOS technologies from 2 μm to 5 nm and beyond. He has authored dozens of conference and journal papers and holds more than 100 patents. He is currently with IBM Research in Albany, NY. <s> BIB017 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> The goal of this chapter is to summarize the state-of-the-art in EM-mitigating effects. Sections 4.2–4.7 describe in detail all known EM-inhibiting effects upon which an “electromigration awareness” is based. We also consider material-related options to reduce EM, like surface passivation (Sect. 4.8), and the use of EM-robust materials, such as carbon nanotubes (Sect. 4.9). We determine parameters for every measure, which enable them to be used easily; we also provide detailed advice for applying each method. We show how approved current densities can thus be increased at critical points, for example, by means of local layout modifications. The presented measures provide circuit designers with a suite of options to prevent electromigration damage in present, and future, technology nodes. Ultimately, the challenge is to avoid exceeding permissible current densities by selectively increasing the permissible boundaries. <s> BIB018 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> The field of machine learning is witnessing rapid advances along several fronts: new machine learning models, new machine learning algorithms utilizing these models, new hardware architectures for these algorithms, and new technologies for creating energy-efficient implementations of such hardware architectures. Hyperdimensional (HD) computing represents one such model. Emerging nanotechnologies, such as carbon nanotube field-effect transistors (CNFETs), resistive random-access memory (RRAM), and their monolithic 3D integration, enable energy- and area-efficient hardware implementations of HD computing architectures. Such efficient implementations are achieved by exploiting several characteristics of the component nanotechnologies (e.g., energy-efficient logic circuits, dense memory, and incrementers naturally enabled by gradual reset of RRAM cells) and their monolithic 3D integration (enabling tight integration of logic and memory), as well as various characteristics of the HD computing model (e.g., embracing randomness that allows us to utilize rather than avoid inherent variations in RRAM and CNFETs, resilience to errors in the underlying hardware). We experimentally demonstrate and characterize an end-to-end HD computing nanosystem built using monolithic 3D integration of CNFETs and RRAM. Using our nanosystem, we experimentally demonstrate the pairwise classification of 21 languages with measured mean accuracy of up to 98% on >20 000 sentences (6.4 million characters), training using one text sample (~100 000 characters) per language, and resilient operation (98% accuracy) despite 78% of bits in HD representation being stuck at 0 or 1 in hardware. We also show that the monolithic 3D implementations of HD computing can have 35 $\times $ improved energy-execution time product for training and inference of language classification data sets (while using 3 $\times $ less area) compared to silicon CMOS implementations. <s> BIB019 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> Software security techniques rely on correct execution by the hardware. Securing hardware components has been challenging due to their complexity and the proportionate attack surface they present during their design, manufacture, deployment, and operation. Recognizing that external communication represents one of the greatest threats to a system's security, this paper introduces the TrustGuard containment architecture. TrustGuard contains malicious and erroneous behavior using a relatively simple and pluggable gatekeeping hardware component called the Sentry. The Sentry bridges a physical gap between the untrusted system and its external interfaces. TrustGuard allows only communication that results from the correct execution of trusted software, thereby preventing the ill effects of actions by malicious hardware or software from leaving the system. The simplicity and pluggability of the Sentry, which is implemented in less than half the lines of code of a simple in-order processor, enables additional measures to secure this root of trust, including formal verification, supervised manufacture, and supply chain diversification with less than a 15% impact on performance. <s> BIB020 </s> Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges <s> Memristors. <s> The world’s appetite for analyzing massive amounts of structured and unstructured data has grown dramatically. The computational demands of these abundant-data applications, such as deep learning, far exceed the capabilities of today’s computing systems and are unlikely to be met with isolated improvements in transistor or memory technologies, or integrated circuit architectures alone. To achieve unprecedented functionality, speed, and energy efficiency, one must create transformative nanosystems whose architectures are based on the salient properties of the underlying nanotechnologies. Our Nano-Engineered Computing Systems Technology (N3XT) approach makes such nanosystems possible through new computing system architectures leveraging emerging device (logic and memory) nanotechnologies and their dense 3-D integration with fine-grained connectivity to immerse computing in memory and new logic devices (such as carbon nanotube field-effect transistors for implementing high-speed and low-energy logic circuits) as well as high-density nonvolatile memory (such as resistive memory), and amenable to ultradense (monolithic) 3-D integration of thin layers of logic and memory devices that are fabricated at low temperature. In addition, we explore the use of several device and integration technologies in the N3XT beyond the specific ones mentioned earlier that are also used in our main nanosystem prototypes. We also present an efficient resiliency technique to overcome endurance challenges in certain resistive memory technologies. N3XT hardware prototypes demonstrate the practicality of our architectures. We evaluate the benefits of the N3XT using a simulation framework calibrated using experimental measurements. System-level energy-delay product of common implementations of abundant-data workloads improves by three orders of magnitude in the N3XT compared with conventional architectures. These improvements impact a broad range of application workloads and architecture configurations, from embedded systems to the cloud. <s> BIB021
The memristor, short for memory resistor, represents another fundamental circuit element besides the well-known resistor, capacitor, and inductor elements; its theory was studied already in 1971 BIB001 . Memristors retain an internal resistive state according to the history of voltage or current applied. Another interesting characteristic for some but not all memristors is a nonlinear response, resulting in "pinched hysteresis loops." That is, such memristors exhibit a current/voltage threshold, with their internal state only being switched when this threshold is exceeded. The implementation of memristor devices remains under research and development, considering various materials and arrangements like titanium dioxide  , spintronics BIB006 , or carbon nanotubes BIB015 , with most approaches remaining compatible with CMOS fabrication. Memristive systems in the broader sense, like resistive random-access memories (ReRAMs) or even phase-change memories (PCMs), BIB020 are progressing towards commercial application BIB012 BIB013 . Aside from memory, memristors are also interesting for in-memory computing, neuromorphic computing, and reconfigurable logic BIB010   . 3.1.3 Carbon Nanotubes and Transistors. Carbon nanotubes (CNTs) comprise one or more rolled-up layers of graphene, the planar arrangement of single-layer carbon atoms in 2D honeycomb-like structures. In other words, CNTs form cylindrical structures with single or multiple "walls" made of carbon sheets. CNTs are typically few nanometers in diameter and few micrometers in length. CNTs can be either metallic conductors or semiconductors, depending on their structure. CNTs exhibit outstanding electrical, physical, and thermal properties  BIB002 BIB018 , mainly due to the strong bonds between their carbon atoms. For example, individual metallic CNTs can, in principle, hold current densities more than 1,000 times greater than copper, which is also promising to mitigate electromigration BIB018 . In practice, however, CNTs have to form interfaces with each other and with other materials  BIB002 BIB009  , pushing such gains somewhat out of reach. Still, one can also build up composite structures to tune CNT properties as needed, e.g., using copper to adapt the thermal expansion coefficient of CNTs toward that of silicon BIB014 . CNTs have been studied extensively for interconnects, e.g., see  BIB002  , as well as for transistors, e.g., see BIB021 BIB009 BIB011 BIB019 . In essence, carbon nanotube field-effect transistors (CNTFETs or CNFETs) leverage multiple CNTs as transistor channels, which can be realized in different arrangements, e.g., as gate-all-around structure BIB003 . CNTFETs are subject to the imperfection and variability of CNT manufacturing. However, these limitations can be addressed by device and chip-design methodologies  -chip-scale application of CNTFETs has been demonstrated successfully BIB011 BIB019 . 3.1.4 Nanowires and Transistors. Nanowire FETs (NWFETs) leverage nano-scaled and semiconductive wires as transistor channel. Various types of NWFETs have been studied, e.g., using silicon BIB016 , indium arsenide [133] , germanium, or even polymers BIB004 for materials; homogeneous or heterogeneous wire structures BIB005 ; gate-all-around BIB007 or vertical gate structures [133] ; et cetera-an overview can also be found in BIB005 . Conceptionally, NWFETs are somewhat similar to CNTFETs, but NWFETs allow for finer control of desired properties during manufacturing (albeit challenges for chip-scale manufacturing are there as well BIB005 ), whereas CNT-FETs offer better performance  . Besides, NWFETs are somewhat similar to nanosheet transistors, which are progressing already towards commercial application BIB017 . Nanowire transistors have been proposed for sensing applications BIB008 , flexible electronics BIB005 , and reconfigurable logic BIB016 , among other applications. For BIB016 , an additional program gate enables to switch the transistor between n-channel and p-channel behavior, by selectively suppressing the injection of one type of charge carriers (e.g., electrons), while the other type (e.g., holes) is modulated via the control gate.