A Survey of Techniques for Improving Security of GPUs <s> CONCLUSION AND FUTURE OUTLOOK <s> As both CPUs and GPUs become employed in a wide range of applications, it has been acknowledged that both of these Processing Units (PUs) have their unique features and strengths and hence, CPU-GPU collaboration is inevitable to achieve high-performance computing. This has motivated a significant amount of research on heterogeneous computing techniques, along with the design of CPU-GPU fused chips and petascale heterogeneous supercomputers. In this article, we survey Heterogeneous Computing Techniques (HCTs) such as workload partitioning that enable utilizing both CPUs and GPUs to improve performance and/or energy efficiency. We review heterogeneous computing approaches at runtime, algorithm, programming, compiler, and application levels. Further, we review both discrete and fused CPU-GPU systems and discuss benchmark suites designed for evaluating Heterogeneous Computing Systems (HCSs). We believe that this article will provide insights into the workings and scope of applications of HCTs to researchers and motivate them to further harness the computational powers of CPUs and GPUs to achieve the goal of exascale performance. <s> BIB001 </s> A Survey of Techniques for Improving Security of GPUs <s> CONCLUSION AND FUTURE OUTLOOK <s> Due to their high-density and near-zero leakage power consumption, non-volatile memories (NVMs) are promising candidates for designing future memory systems. However, compared to conventional memories, NVMs also face more severe security threats, e.g., the limited write endurance of NVMs makes them vulnerable to write attacks. Also, the non-volatility of NVMs allows the data to persist even after power-off, which can be accessed by a malicious agent. Further, encryption endangers NVM lifetime and performance by reducing the efficacy of redundant write avoidance techniques. In this paper, we present a survey of techniques for improving security of NVM-based memories by addressing the aforementioned challenges. We highlight the key ideas of the techniques along with their similarities and differences. This paper is expected to be useful for researchers and practitioners in the area of memory and system security. <s> BIB002
As an increasing number of security vulnerabilities of GPUs come to light, both vendors and users should now carefully weigh the performance advantages of GPUs vis-a-vis their security loopholes. In this paper, we presented a survey of techniques for improving the security of GPUs. We classified the techniques based on key parameters and underscored their similarities and differences. We foresee huge research efforts in the coming years in the area of both attacking and securing GPUs. We conclude this paper with a discussion of future research directions. In the highly-competitive market of today, the choice of computing device depends on many metrics, such as its performance, energy efficiency, security and ease-of-use. However, these metrics are often at odds with each other. Evidently, performance-inefficient security solutions may make GPU an unattractive platform for hardware acceleration of compute-intensive applications. To justify their adoption, future security solutions ideally need to be "invisible" from the perspective of their performance/power impact. Alternatively, they should provide a tunable knob to the user to exercise a trade-off between the level of security and acceptable performance loss. Also, by use of novel approaches such as approximate computing  , the performance overhead of security solutions can be greatly mitigated. To enable closer interaction between CPUs and GPUs, recent research has proposed fused chips where a CPU and GPU are integrated on the same chip BIB001 . It is unclear whether the insights gained for discrete GPUs can be applied for fused GPUs also. Moving forward, an in-depth exploration of the security issues of fused GPUs is definitely required. We believe that the challenges involved in ensuring the security of GPUs need to be addressed at all levels of the computing stack. At the hardware level, memories with inherent security properties (e.g., efficiently erasing data at short-notice) need to be used. At the (micro) architecture level, strong encryption algorithms and randomization schemes need to be developed BIB002 . Also, if future GPUs allow multiple processes to run concurrently, they can also implement virtual memory. Using this, ASLR and process isolation can be easily implemented. At the system level, techniques for mitigating access-violation are required to effectively share GPUs between users without fearing its security implications. Also, the OS should monitor GPU programs and resource usage to detect anomalous behavior. At the application level, GPU library routines should automatically clear memory right after deallocation. Also, the vendors should provide detailed documentation on commercial GPUs and more robust tools for analyzing GPU binaries  . The standards committee should mandate a thorough security analysis of the entire GPU stack. We look forward to an exciting future where GPUs pass the scrutiny on the metric of security also, just as they have previously passed the scrutiny on performance/power metrics. The task of securing GPUs is a never-ending one since, while some researchers design a secure GPU or propose a security technique, other researchers point out its vulnerabilities. Since even one loophole in security can be exploited to take full-control of the system, the goal of security requires the architects to be always on vigil. Clearly, concerted and ongoing efforts are required from both industry and academia to design fully secure GPUs of the next-generation.