An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Analytical solutions of pulsewidth-modulation (PWM) strategies for multilevel inverters are used to identify that alternative phase opposition disposition PWM for diode-clamped inverters produces the same harmonic performance as phase-shifted carrier PWM for cascaded inverters, and hybrid PWM for hybrid inverters, when the carrier frequencies are set to achieve the same number of inverter switch transitions over each fundamental cycle. Using this understanding, a PWM method is then developed for cascaded and hybrid inverters to achieve the same harmonic gains as phase disposition PWM achieves for diode-clamped inverters. Theoretical and experimental results are presented in the paper. <s> BIB001 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Previous work has shown that space vector modulation and carrier modulation for two-level inverters achieve the same phase leg switching sequences when appropriate zero sequence offsets are added to the reference waveforms for carrier modulation. This paper presents a similar equivalence between the phase disposition (PD) carrier and space vector modulation strategies applied to diode clamped, cascaded N-level or hybrid multilevel inverters. By analysis of the time integral trajectory of the converter voltage, the paper shows that the optimal harmonic profile for a space vector modulator occurs when the two middle space vectors are centered in each switching cycle. The required zero sequence offset to achieve this centring for an equivalent carrier based modulator is then determined. The results can be applied to any multilevel converter topology without differentiation. Discontinuous behavior is also examined, with the space vector and carrier based modulation methods shown to similarly produce identical performance. Both simulation and experimental results are presented. <s> BIB002 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> This paper presents the development of two three-level cascaded Z-source inverters, whose output voltage can be stepped down or up unlike a traditional buck three-level inverter. The proposed inverters are designed using two three-phase voltage-source inverter bridges, supplied by two uniquely designed Z-source impedance networks and cascaded at either their DC sides to form a DC-link-cascaded Z-source inverter or AC outputs using single-phase transformers to form a dual Z-source inverter. For controlling both inverters, various modulation schemes are designed with their performances verified experimentally using an implemented laboratory prototype <s> BIB003 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> This paper describes the control and operating performance of a modular multilevel PWM inverter for a transformerless medium-voltage motor drive. The inverter is prominent in the modular arm structure consisting of a cascaded stack of multiple bidirectional chopper-cells. The dominant ac-voltage fluctuation with the same frequency as the motor (inverter) frequency occurs across the dc capacitor of each chopper-cell. The magnitude of the voltage fluctuation is inversely proportional to the motor frequency. This paper achieves theoretical analysis on the voltage fluctuation, leading to system design. A downscaled model rated at 400 V and 15 kW is designed and built up to confirm the validity and effectiveness of the nine-level (17-level in line-to-line) PWM inverter for a medium-voltage motor drive. <s> BIB004 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Voltage balance issue of dc-link capacitors is very important for applications of a cascade multilevel converter or a modular multilevel converter. In this paper, a novel diode-clamped modular multilevel converter (DCM2C) topology is proposed and a power feedback control method is developed. With the developed control strategy, the proposed diode-clamped circuit becomes a controllable closed loop which enables the capacitor voltages to be clamped by low power rating clamping diodes. The proposed topology and control strategy has quicker response and requires much fewer voltage sensors than the normally used traditional method; therefore, the system performance improvement and cost reduction are expected. Based on the proposed DCM2C, a novel N +1-level cascade multilevel topology is proposed for a cascade active power filter (CS-APF). The simulation and experimental results from the CS-APF have demonstrated and verified the effectiveness of the proposed novel topology and control method. <s> BIB005 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Modular Multilevel Converter (MMC) has proved to be an effective solution for high power applications, supplying low distorted output voltage and high fault tolerance. This paper presents a detailed performance comparison between phase disposition PWM (PDPWM) and phase shift PWM (PSPWM) schemes under normal condition, over-modulation, as well as carrier non-synchronization condition. Compared to the PSPWM strategy, the PDPWM has smaller line-to-line voltage distortion under normal condition, when the carrier frequencies are adjusted to achieve the same number of switch transitions over one fundamental cycle. In addition, the capacitor voltages are able to keep balanced without additional controllers. Under over-modulation condition, PDPWM can still achieve smaller voltage distortion without capacitor voltage deviation, while obvious voltage differences are observed with PSPWM, which shows an opposite trend toward that of normal condition. Moreover, asynchronous carriers have different impacts on the harmonic cancellation, which needs to be carefully considered in a hardware implementation. Simulation results for a three-phase nine-level inverter system generated with the Matlab/Simulink software are provided to support the theoretical considerations. <s> BIB006 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Modular multilevel converters (MMC) are considered a top converter alternative for voltage-source converter (VSC) high-voltage, direct current (HVDC) applications. Main circuit design and converter performance evaluation are always important issues to consider before installing a VSC-HVDC system. Investigation into a steady-state analysis method for an MMC-based VSC-HVDC system is necessary. This paper finds a circular interaction among the electrical quantities in an MMC. Through this circular interaction, a key equation can be established to solve the unknown circulating current. A new steady-state model is developed to simply and accurately describe the explicit analytical expressions for various voltage and current quantities in an MMC. The accuracy of the expressions is improved by the consideration of the circulating current when deriving all the analytical expressions. The model's simplicity is demonstrated by having only one key equation to solve. Based on the analytical expressions for the arm voltages, the equivalent circuits for MMC are proposed to improve the current understanding of the operation of MMC. The feasibility and accuracy of the proposed method are verified by comparing its results with the simulation and experimental results. <s> BIB007 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Compared with the conventional buck-boost three-level inverters, the Z-source neutral-point-clamped (NPC) inverters have more simple structure with improved output waveform quality. But the neutral-point potential unbalance problem is still a drawback for their applications. Based on the research of SPWM modulation method and the analysis of the effect of the shoot-through states on the neutral-point potential, this paper proposes a neutral-point potential balancing method by adding the shoot-through offset which can be applied to the constant boost control and the third-harmonic-injection control. This new method is simple and has the advantage that the neutral-point potential unbalance problem can be improved with the high voltage gain, which is verified by simulation results. <s> BIB008 </s> An Overview of Carrier-based Modulation Methods for Z-Source Inverter <s> Three-level ZSI <s> Abstract Modular multilevel converters (MMC) inherent features are gaining more attention for dc voltage transmission systems. One of the main research paths regarding the converter performance deals with its voltage modulation. Specifically, for medium voltage applications with relatively small number of submodules, the voltage modulation techniques impact on the MMC performance needs to be studied. This work provides an extensive review of the carrier-based pulse with modulation (CB-PWM) techniques proposed to be applied on previous multilevel inverter versions. The CB-PWM methods were adapted to be compatible with an additional cell ranking and selection algorithm to ensure equal energy distribution on the arm cells. The state-of-the-art of zero sequence signals (ZSS) applied on three-phase inverters is also reviewed. The alliance between the ZSS with the CB-PWM, as well as the nearest level modulation (NLM), has an important impact on the MMC harmonic content, efficiency and voltage ripple of its cells capacitors. A 15 MW 28-cell-based MMC is used to investigate each particular combination between the modulation method and the common mode ZSS. <s> BIB009
The three-level topologies as shown in Fig. 3 depict the possibilities of connecting ZSI to one of the MLIs. For medium-voltage applications such as ac motor drives, Neutral Point Clamped (NPC) inverters are the preferred topology  . Hence, diode-clamped multilevel inverter is considered as a rear-end inverter configuration for the three-level ZSI topology. Two of the main topologies are the Single Z-Source Network Neutral Point Clamped (SZSN NPC) inverter and the Dual Z-Source Network Neutral Point Clamped (DZSN NPC) inverter. The topologies are classified based on the number of impedance networks in the system and the neutral point formation. Fig. 3(b) illustrates the traditional way of creating the neutral point using split capacitor bank BIB008 . Fig. 3(c) shows another way of neutral point connection, where the neutral point is created between the dc sources BIB003 . The input dc sources can be two individual voltage sources with the same rating or split input dc source. If two impedance networks are used instead of one, then the neutral point can be formed by connecting the neutral line between the two impedance networks BIB003 , as illustrated in Fig. 3(d) . Among the three topologies, the split capacitor bank topology introduces additional passive components to the circuit. Therefore, the SZSN with split dc source NPC inverter and DZSN NPC inverter are highly preferred. The three-level ZSI also operates in two different modes: ST and N-ST states, which resembles the operation of two-level ZSI. The principle of boosting the voltage in three-level ZSI is achieved by utilizing the ST states. In the traditional two-level inverters, the full dc-link is shorted to provide voltage boosting. However, for the threelevel ZSI, the ST states can be inserted in three different variations of switching: Full ST (FST) state, where all the switches (e.g. S a1 , S a2 , S a1′ , S a2′ ) in a single leg are gated 'on', Upper ST (UST) state, where the upper three switches are gated 'on', and Lower ST (LST) state, where the lower three switches are gated 'on'. Furthermore, the main challenge lies in the careful insertion of these ST states into the inverter operation to achieve proper voltage boosting and neutral point balancing. In order to achieve this, various topologies have been proposed based on the space vector modulation. However, limited research has been conducted on the carrier comparison methods for the three-level ZSI NPC. Therefore, the following section reviews the possibilities of inserting ST for the three-level ZSI using carrier-based modulation methods. Several carrier modulation techniques are proposed and reviewed in the literature for MLIs BIB009 . The basic Multi-Carrier PWM (M-C PWM) method provides an easy way to control the amplitude and frequency. The M-C PWM technique is categorized into Phase Shifted PWM (PS PWM) and Level Shifted PWM (LS PWM). Among these techniques, the most widely used technique for controlling the NPC inverter are the Phase Disposition (PD) modulation, the Phase Opposition Disposition (POD) modulation, and the Alternative POD (APOD) modulation methods BIB005 BIB004 BIB001 BIB002 BIB006 BIB007 . For NPC MLIs, most carrier-based modulation methods are derived from disposition techniques, where for n-level inverter; n -1 carriers of identical frequency and amplitude are used to provide switching. The developed multi-carrier techniques for controlling the MLIs demonstrate the advantages of an optimized harmonic performance and a reduced common-mode voltage. As mentioned in Section 3, voltage boosting in the ZSI occurs due to the addition of ST states to the traditional inverter. In the two-level ZSI, the ST occurs when all the switches in a single-phase, two-phase or three-phase leg are shorted. As mentioned earlier, the similar strategy of introducing ST in the three-level ZSI results in the additional ST states. These ST states are introduced due to the gating 'on' of top three switches in any leg (UST) or the gating 'on' of bottom three switches in any leg (LST). Therefore, the voltage boosting in the three-level ZSI occurs due to FST, UST and LST. The ZSI either uses an N-ST and an FST or an N-ST and a combination of UST and LST per switching cycle. During each state, the corresponding switches in the three-phase leg are triggered. The active switches and diodes for phase 'a' during the different operating states of the inverter are summarized and tabulated in Table 2 . The carrier-based modulation methods that can be implemented for the three-level ZSI are POD Level Shifted PWM (POD LSPWM), In-Phase Disposition Level Shifted PWM (I-PD LSPWM) and Reference Disposition Level Shifted PWM (RD LSPWM). FST, full shoot through; LST, lower shoot through; N-ST, non-shoot through; UST, upper shoot through; ZSI, Z-source inverter.