Toward Silicon-Based Cognitive Neuromorphic ICs—A Survey <s> Discussion <s> Neuromorphic silicoN NeuroNs: state of the art Complementary metal-oxide-semiconductor (CMOS) transistors are commonly used in very-large-scale-integration (VLSI) digital circuits as a basic binary switch that turns on or off as the transistor gate voltage crosses some threshold. Carver Mead first noted that CMOS transistor circuits operating below this threshold in current mode have strikingly similar sigmoidal current– voltage relationships as do neuronal ion channels and consume little power; hence they are ideal analogs of neuronal function (Mead, 1989). This unique device physics led to the advent of “neuromorphic” silicon neurons (SiNs) which allow neuronal spiking dynamics to be directly emulated on analog VLSI chips without the need for digital software simulation (Mahowald and Douglas, 1991). In the inaugural issue of this Journal, Indiveri et al. (2011) review the current state of the art in CMOS-based neuromorphic neuron circuit designs that have evolved over the past two decades. The comprehensive appraisal delineates and compares the latest SiN design techniques as applied to varying types of spiking neuron models ranging from realistic conductancebased Hodgkin–Huxley models to simple yet versatile integrate-and-fire models. The timely and much needed compendium is a tour de force that will certainly provide a valuable guidepost for future SiN designs and applications. <s> BIB001 </s> Toward Silicon-Based Cognitive Neuromorphic ICs—A Survey <s> Discussion <s> Several analog and digital brain-inspired elec- tronic systems have been recently proposed as dedicated solutions for fast simulations of spiking neural networks. While these architectures are useful for exploring the computational properties of large-scale models of the nervous system, the challenge of building low-power compact physical artifacts that can behave intelligently in the real world and exhibit cognitive abilities still remains open. In this paper, we propose a set of neuromorphic engineering solutions to address this challenge. In particular, we review neuromorphic circuits for emulating neural and synaptic dynamics in real time and discuss the role of biophysically realistic temporal dynamics in hardware neural processing architectures; we review the challenges of realizing spike-based plasticity mechanisms in real physical systems and present examples of analog electronic circuits that implement them; we describe the computational properties of recurrent neural networks and show how neuromorphic winner-take-all circuits can implement working-memory and decision-making mechanisms. We validate the neuromorphic approach proposed with experimental results obtained from our own circuits and systems, and argue how the circuits and networks presented in this work represent a useful set of components for efficiently and elegantly implementing neuro- morphic cognition. <s> BIB002
In the low-power, mixed-signal, neuromorphic implementations surveyed herein, analog CMOS circuits are used for the design of SiNs and synapses. These silicon circuits typically operate in the subthreshold region and are, thus, susceptible to 1) noise and 2) mismatch, which become dominant when the device operating voltage falls well below the device threshold voltage. A common mismatch reduction technique is to increase device dimensions. However, in the case of large neuromorphic networks with many neurons and synapses, this is impractical, since the area required for integrating these structures into a single chip would become prohibitive. To alleviate this problem, processes that are dedicated to lowpower, subthreshold, system-on-chip (SoC) circuits, e.g., depleted silicon-on-insulator (SOI), thereby reducing the threshold voltage variation, have been available for implementing neuromorphic analog VLSI circuits BIB001 . In BIB002 , the inherent CMOS device mismatch is addressed at the network and system level, where it is argued that plasticity mechanisms (both STP and LTP) are robust to device mismatch and do not require precisely matched transistors. THE NE COMMUNITY has made a remarkable progress in building technology platforms for simulating neurobiological models. However, additional steps are required toward the ultimate goal of implementing hardware neural processing systems which are: 1) autonomous; 2) able to interact with the environment in real time; and 3) able to express cognitive abilities. These steps are not hinging upon scaling or hardware restrictions but, rather, on a better understanding of computational principles used by the brain and computational models that neurons can support. Thus, the role of neuroscience and psychology in identifying these principles is crucial, before neuromorphic cognitive systems can become a reality. 