Hardware Decoders for Polar Codes: An Overview <s> C. Approximate Tree Pruning in LLR-Based SCL Decoding <s> Long polar codes can achieve the capacity of arbitrary binary-input discrete memoryless channels under a low complexity successive cancelation (SC) decoding algorithm. But for polar codes with short and moderate code length, the decoding performance of the SC decoding algorithm is inferior. The cyclic redundancy check (CRC) aided successive cancelation list (SCL) decoding algorithm has better error performance than the SC decoding algorithm for short or moderate polar codes. However, the CRC aided SCL (CA-SCL) decoding algorithm still suffer from long decoding latency. In this paper, a reduced latency list decoding (RLLD) algorithm for polar codes is proposed. For the proposed RLLD algorithm, all rate-0 nodes and part of rate-1 nodes are decoded instantly without traversing the corresponding subtree. A list maximum-likelihood decoding (LMLD) algorithm is proposed to decode the maximum likelihood (ML) nodes and the remaining rate-1 nodes. Moreover, a simplified LMLD (SLMLD) algorithm is also proposed to reduce the computational complexity of the LMLD algorithm. Suppose a partial parallel list decoder architecture with list size $L=4$ is used, for an (8192, 4096) polar code, the proposed RLLD algorithm can reduce the number of decoding clock cycles and decoding latency by 6.97 and 6.77 times, respectively. <s> BIB001 </s> Hardware Decoders for Polar Codes: An Overview <s> C. Approximate Tree Pruning in LLR-Based SCL Decoding <s> We present an LLR-based implementation of the successive cancellation list (SCL) decoder. To this end, we associate each decoding path with a metric which (i) is a monotone function of the path’s likelihood and (ii) can be computed efﬁciently from the channel LLRs. The LLR-based formulation leads to a more efﬁcient hardware implementation of the decoder compared to the known log-likelihood based implementation. Synthesis results for an SCL decoder with block-length of N = 1024 and list sizes of L = 2 and L = 4 conﬁrm that the LLR-based decoder has considerable area and operating frequency advantages in the orders of 50% and 30%, respectively. <s> BIB002
Since SCL decoding heavily relies on SC decoding for the computation of the path metrics, one may expect that the pruning techniques described in Section III should be applicable to SCL decoding as well. Unfortunately, in order to update the LLR-based path metric of BIB002 , all the LLRs produced by the leaves of the decoder tree are required and these node computations cannot be pruned if one wants to implement exact SCL decoding. Nevertheless, BIB001 describes an approximate SCL decoding algorithm which is based on tree pruning that simply ignores some of the path metric updates corresponding to computation tree leaves. The resulting performance degradation is small and an outline of a hardware architecture is presented which can achieve a throughput of slightly over 1 Gbps for a polar code of length N = 8192 and rate R = 0.5 using SCL decoding with L = 4.