verifying a Low-Density Parity-Check (LDPC) code Some years back I designed a low-density parity-check (LDPC) code ($n=816, k=408$) and I was able to verify the performance of the code (probability of error in an AWGN channel) down to $10^{-10}$, using a multicore computer with a heavily optimized program running about 3 days. The code did not present any error floor.
Recently I was asked if I can validate the code even further (at least $10^{-12}$). One might be able to run the program at a high-performance computing center but I do not access to such a facility at the moment and I feel that I'd need a cluster of 100 or more computers running for few days, if not weeks. 
It's been a while that I studied the subject, but are there analytical tools/methods so I can use for the purpose of this validation?
Thanks! 

Some backgrounds and notes:


*

*a regular binary parity check matrix $\mbox{H}_{408\times816}$ without girths of size 4 and 6 was constructed 

*the source bits from binary field $\mathbb{F}_2$ were mapped to $\left\{-1,+1\right\}$.

*For an Additive White Gaussian Noise (AWGN) channel, the data received at each time is equal to the data sent plus Gaussian noise with zero-mean and some standard deviation, $s$, independently for each bit.

*the Belief Propagation algorithm was used at the decoder

A LDPC validation service is available here:
http://www.avaliant.com/ldpc-validation-service/
One can simulate bit error rate and block error rate to very low error rates to ensure error floor free performance.  The LDPC Validator has quick turnaround time because it was designed to seamlessly take advantage of a massively parallel General Purpose Graphics Processor (GPU) architecture.  It has been validated using standard IEEE LDPC codes including 802.11ad and 802.16.
