DISPLAY DEVICE
FIG7 is a cross-sectional view taken along line III-III' of FIG3 according to an exemplary embodiment
Referring to FIG7, when a barrier wall 118W is formed between the plurality of inspection terminals 61 in a first direction by the planarization layer 118 and an inspection signal is applied to an inspection terminal 61 by the inspection pin CP, exemplary embodiments may prevent the other inspection terminals 61 in the periphery from being influenced, or may reduce the influence on the other inspection terminals 61. For example, the terminal opening 118OP defined in the planarization layer 118 is formed to correspond to a central portion of the inspection terminal 61, and the barrier wall 118W capable of blocking an interference signal may be formed in a region between the plurality of inspection terminals 61. Although FIG7 shows only one inspection pin CP, embodiments of the disclosure are not limited thereto. For example, in an exemplary embodiment, a plurality of inspection pins CP may be provided so as to be in contact with the plurality of inspection terminals 61 at the same time, respectively.
cross-sectional view
8
is about
63
first connection wiring first connection wirings
113
second gate insulating layer
25
resistor may be about
118
planarization layer
61
inspection terminal inspection terminals
111
buffer layer
112
first gate insulating layer
81
second connection wiring
115
110
substrate
71
semiconductor resistor
['1. A display device, comprising: a substrate comprising a display area and a peripheral area, wherein the display area comprises a plurality of pixels that display an image and the peripheral area is disposed outside the display area; an inspection terminal disposed in the peripheral area and configured to transmit an inspection signal to the display area; an inspection wiring that connects the display area to the inspection terminal; a semiconductor resistor connected to each of the inspection terminal and the inspection wiring; an insulating film; and a planarization layer comprising a terminal opening, wherein the planarization layer covers at least one end of the inspection terminal and the terminal opening exposes a portion of the inspection terminal, wherein the semiconductor resistor is disposed below the inspection terminal, the insulating film is disposed between the semiconductor resistor and the inspection terminal, and the semiconductor resistor is in contact with the inspection terminal through a first contact hole defined in the insulating film, wherein a portion of the semiconductor resistor is overlapped by the terminal opening.', '7. The display device of any one of claims 1 to 6, wherein the inspection wiring comprises a first connection wiring and a second connection wiring, wherein the first connection wiring and the inspection terminal are disposed on a same layer, and the first connection wiring is in contact with the semiconductor resistor through a second contact hole defined in the insulating film, wherein the second connection wiring is disposed on a different layer than the first connection wiring.']