CONSERVATIVE RASTERIZATION
FIG2B is a schematic diagram showing the edge vectors for various primitives
As described above and shown in FIG2B, each primitive 21, 22, 23 has a plurality of edges (e.g. three edges for a triangular primitive 21). Each edge is defined by an edge equation which is a vector of the form: fxy=Ax+By+C where A, B and C are constant coefficients specific to the polygon edge (and hence may be precalculated) and C has been pre-adjusted such that the scene origin is translated to the tile origin. The conservative rasterization hardware 212 determines for each edge of a primitive and for each pixel corner 120, 122 in a microtile 104, whether the pixel corner (having coordinates x,y) lies to the left or right or on the edge by calculating the value, or the sign, of f(x,y) for the edge. The calculation is a sum-of-products (SOP).
schematic diagram
210
tiling unit
214
coefficient generation hardware block
202
geometry processing phase
208
tessellation unit
206
vertex shader
204
rasterization phase
205
parameter memory
200
pipeline
['1. A graphics processing pipeline (200) arranged to render in a rendering space (100), wherein the rendering space (100) is sub-divided into a plurality of tiles (102), each tile is sub-divided into a plurality of microtiles (104), each microtile comprising an identical arrangement of pixels (106), the graphics processing pipeline comprising conservative rasterization hardware (212) and wherein the conservative rasterization hardware comprises: a plurality of first hardware sub-units (300) each arranged to calculate, for a different edge of a primitive, an outer coverage result for the edge and an inner coverage result for the edge for each pixel in a microtile; and a plurality of second hardware sub-units (320) each arranged to calculate, for a different pixel in a microtile, an outer coverage result for the primitive and an inner coverage result for the primitive, wherein each first hardware sub-unit (300) comprises: edge test calculation hardware (302) arranged to calculate, for each corner of the pixels in the microtile a value indicating whether the pixel corner is to the left of the edge; a plurality of OR logic blocks each configured to perform an OR operation (304), one for each pixel in the microtile, and each arranged to receive as inputs four values from the edge test calculation hardware, one for each corner of the pixel, and wherein an output of the OR logic block is the outer coverage result for the pixel and the edge; and a first plurality of AND logic blocks each configured to perform an AND operation (306), one for each pixel in the microtile, and each arranged to receive as inputs four values from the edge test calculation hardware, one for each corner of the pixel and wherein an output of the AND logic block is the inner coverage result for the pixel and the edge; and wherein each second hardware sub-unit (320) comprises: a second plurality of AND logic blocks (308), one for each pixel in the microtile, and each arranged to receive as inputs an outer coverage result for the pixel and each of the edges, one from each of the first hardware sub-units and wherein an output of the AND logic block is the outer coverage result for the pixel and the primitive; and a third plurality of AND logic blocks (308), one for each pixel in the microtile, and each arranged to receive as inputs an inner coverage result for the pixel and each of the edges, one from each of the first hardware sub-units and wherein an output of the AND logic block is the inner coverage result for the pixel and the primitive.']