MODULATION OF AC/AC MMC
FIG1 is a schematic circuit diagram of an embodiment of a three-phase-to-single-phase AC/AC MMC in accordance with the present invention
Embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which certain embodiments are shown. However, other embodiments in many different forms are possible within the scope of the present disclosure. Rather, the following embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Like numbers refer to like elements throughout the description. FIG1 is a schematic illustration of an MMC 1 in direct double-star configuration between a first AC network L, which is a three-phase network having currents iLi, iL2 and iL3, and the, and a second AC network R, which is a single-phase network having the current iR and the voltage uR. The first AC network may e.g. be a national power distribution network which may have a utility frequency (power line/mains frequency) of for instance 50 or 60 Hz. The second AC network R may e.g. be for a railway electrification system, and may have a utility frequency of for instance 25 Hz, 50/3 Hz (synchronous) or 16.70 Hz (asynchronous). The MMC 1 also comprises a controller 14 which is schematically shown in FIG1. The controller may be a control system comprising a central unit and/or distributed units associated with respective legs 11 or branches 12. The controller 14 may be configured, e.g. by means of computer programming, to perform embodiments of the method of the present disclosure.
schematic circuit diagram
13
cells cell
14
controller
1
MMC
['9. A direct AC/AC MMC (1) configured to be connected between a first AC network (L) being a three-phase AC network and having a first waveform and a first frequency and a second AC network (R) being a single-phase AC network and having a second waveform and a second frequency, the MMC having a double-star topology with a plurality of phase legs (11), each phase leg having a first branch (12a) and a second branch (12b), each of the first and second branches (12) comprising a plurality of series connected bipolar cells (13), the MMC further comprising a controller (14) comprising: processing circuitry; and storage storing instructions executable by said processor circuitry  characterised in that  the said controller is operative to: perform a first modulation (31) based on a reference signal (Ref_3ph) of the first AC network (L), independently of a reference signal of the second AC network (R), to generate, for each phase leg (11), a first integer command signal (N Lk ) corresponding to a first combination of cell states in the first (12a) and second (12b) branches of the phase leg needed for generating the first waveform; perform a second modulation (31) based on a reference signal (Ref_1ph) of the second AC network (R), independently of the reference signal of the first AC network (L), to generate, for each phase leg (11), a second integer command signal (N Rk ) corresponding to a second combination of cell states in the first (12a) and second (12b) branches of the phase leg needed for generating the second waveform; based on the first and second integer command signals (N LK , N RK ), map (32) to each branch (12) a number of cell states to be used for concurrently generating both the first and second waveforms, generating branch-level command signals (N ka , N kb ) to a capacitor voltage balancing algorithm; and based on the mapping (32) and a capacitor voltage balancing algorithm, send firing signals to the plurality of cells (13) of each branch (12).']