e measured clock. To be of any use, the counter must resolve time within a reference clock period. The instrument's quality is based on the accuracy of this time resolution. Moreover, crosstalk between the reference and measured clocks must be avoided. This method will work with non-periodic signals such as those carried by the AES/EBU or S/PDIF interface signal.
Another method uses a reference clock running at the same frequency as the measured clock. This technique can measure the jitter degradation caused by a circuit, or measure the intrinsic jitter and jitter attenuation characteristics of a phase-locked loop (PLL) such as is found in input receiver circuits. The recovered clock is compared to the reference clock with a relatively simple circuit. The reference clock must be of extraordinary accuracy. UltraAnalog uses this technique to measure the performance of its low-jitter AES 20 input receiver.
Finally, clock jitter can be measured with a low-jitter PLL. The incoming clock is sent to a PLL with very low intrinsic jitter and a very low jitter attenuation cutoff frequency. The low-jitter clock is compared with the incoming clock; a simple circuit separates the jitter component in the incoming clock and outputs the jitter in analog form.
The PLL's jitter attenuation cutoff frequency must be very low. Below the attenuation cutoff frequency, the PLL follows the incoming clock and its jitter, passing the incoming jitter to the recovered clock. The recovered clock will thus have the same jitter as the incoming clock; no measurement can be made by comparing the two clocks. By replacing the simple phase comparator described in the second method with a more sophisticated cascaded track-and-hold circuit, this technique can measure non-periodic signals such as the digital interface signal.
This is the method used in the custom jitter analysis instrument built by UltraAnalog, shown in block form in fig.7. An AES/EBU or S/PDIF signal is input to the analyzer, and the analyzer's output is the jitter component of the measured clock, with a gain of 100mV per nanosecond of jitter. The instrument's measurement bandwidth is 500Hz-100kHz, and the intrinsic (residual) jitter is less than 30ps. This 30ps figure defines the minimum jitter level that can be measured by the instrument. Figs.8 and 9 show the instrument's bandwidth and intrinsic jitter, respectively. The plots of fig.9, made with different input signals to the analyzer, represent the combined performance of the test transport and analyzer. Although the spectral analysis in fig.9 is extended to 200kHz, the jitter numbers in the caption represent the RMS jitter values calculated over a DC-40kHz bandwidth.
Fig.7 UltraAnalog jitter analyzer architecture.
Fig.8 UltraAnalog jitter analyzer frequency response.
Fig.9 UltraAnalog jitter analyzer, spectrum of intrinsic jitter (19.3ps, solid line); while decoding 1kHz at 0dBFS (27.8ps, long-dashed line); decoding 1kHz at -60dBFS (32.1ps, short-dashed line); and decoding 60Hz+7kHz in a 4:1 mix at 0dBFS (29.1ps, dotted line) (vertical scale is ps per 1/3-octave band).
With this jitter-analysis instrument, we can measure and quantify the performance of any digital source and interface combination, such as CD transports, DAT machines, or "jitter-reduction" devices. In addition, the analyzer can measure the performance of a digital processor's input receiver circuitry.
Footnote 7: The way in which a 4kHz signal can produce a 100Hz line by beating with 44.1kHz can be explained by the fact that the data-to-jitter crosstalk is highly nonlinear, and that all harmonics of the 4kHz frequency, including 44.0kHz, are present and beat with 44.1kHz.—Rémy Fourré