nowledge), which tell the peripheral device that it will start to transfer the data.
DMA starts to transfer the data from memory to peripheral by putting the address of the first byte of the block on the address bus and activating MEMR, thereby reading the byte from memory into the data bus; it then activate IOW to write it to the peripheral. The DMA decrements the counter and increments the address pointer and repeats this process until the count reaches and task is finished.
After the DMA has finished its job, it will deactivate HRQ, signaling the CU that it can regain control over its buses.
4.6 Chapter Review Questions
Which of the following are I/O techniques?
Ans: A and C
Which the following line is used to identify location of I/O device?
Which of the following components are included in I/O device interface?
Ans: B and C
The system bus consists of _______________.
Ans: A, B and C
Which of the following is not function of I/O module?
Providing time and control signals
Communicating with CPU
Communication with I/O devices
None of these
The peripheral device will request for the service, which generated______ signal.
None of these
Intel 8237A DMA Controller consists of ______ I/O channels.
Which of the following DMA mode stops CPU from accessing system bus?
Block Transfer Mode
None of these
Intel 8237A DMA Controller consists of ____ number of registers?
10. MMU stands for ——————–
Memory Mixture unit
Memory Management Unit
Memory measurement Unit
None of these
2. A and C
In the chapter, I/O Organisation, you learnt about:
I/O modules and its function.
I/O module structure.
Different types of I/O techniques.
Intel 8237A DMA Controller..
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