 system bus.
Error Detection – It is built- in feature of I/O module that detects electrical and mechanical errors.
4.3 I/O Module Structure
The I/O module is connects to the rest of computer system through system buses.
Data transferred to and from the module are buffered in one or more data registers. There may be also one or more status registers that provide current status information. A status register may also function as a control register, to accept detailed control information from the processor via a set of control lines. The logic within the module interacts with the processor via a set of control lines. The CPU uses the control lines to issue commands to the I/O module. The module must also be able to recognise and generate address associates with the device it controls. Each I/O module has unique address (Refer to Figure 7.2).
Figure 4.2: General structure of I/O Module
4.4 I/O Technique
It is the technique of communication between memory and I/O devices. I/O techniques are categorised in three types based on how information is transfers between memory and I/O devices that whether it is using CPU interaction or Interrupt interaction.
Types of I/O technique are as follows:
Direct Memory Access (DMA)
4.4.1 Programmed I/O
It involves CPU intervention in communication between CPU and memory. When CPU is executing a program and if encounter an instruction related to I/O operation, CPU executes that instruction by issuing command to I/O module. I/O module will perform the request action and then set the appropriate bits in the I/O status registers (Refer to Figure 4.3). However, this is time consuming process that keeps the CPU busy unnecessary. In this case CPU and memory access the same system bus. The CPU access specific device using two different methods and they are as follows:
Memory mapped I/O – In this technique only single read and write line for memory and I/O module read/write operation. Memory devices and I/O devices are accessed by same instruction. (Refer to Figure 4.3).
Figure 4.3: Memory Mapped I/O
I/O mapped I/O – in this technique memory device and I/O devices are arranged separately. Read and write lines are also separate for read and write operation. (Refer to Figure 4.4).
Figure 4.4: I/O Mapped I/O
Commands are of four types and they are as follows:
Control – It is used to activated the I/O devices and instruct the device about action to be performed.
Test – It used to test various status conditions related to the I/O devices.
Read – It is the command which instruct I/O module to obtain data from I/O device and place it in an internal buffer.
Write – It is the command which instruct ` module to take data from data bus and subsequently transfer it to the I/O device.
Figure 4.5: Flowchart for Programmed I/O
4.4.2 Interrupt ââ‚¬” Driven I/O
The problem with programmed I/O is that CPU has to wait for long time, till instruction gets executed. An alternative is for the CPU to issue an I/O command to a module and then go to do the some other useful work; the I/O module will interrupt the CPU to request service when it is ready to execute the data. (Refer to Figure 4.6). This technique improved performance of the CPU of skipping CPU waiting time till the I/O operation performs.
Figure 4.6: Interrupt Driven I/O
4.4.3 Direct Memory Access (DMA)
DMA uses special I/O CPU that take control of an I/O operation to move large block of data. This technique adds additional module on system bus.
When CPU needs to read or write data, it issues command to the DMA module, by sending following information:
Whether a read and write is requested, using read, or write control line between the CPU and DMA module.
The address of I/O module involved, communicated on the data line.
The starting location is in memory to read from or write to, communicated on the lines and stored by the DMA module in its address registers.
The number of words to be read or written, again communicated via the data lines and stored in the data count register. The CPU then continues with other work.
DMA Data Transfer Modes
There are three type