Imported: 06 Apr '17 | Published: 03 Mar '11
USPTO - Utility Patents
A semiconductor packaging system has a packaging substrate into which inductors and/or capacitors are partially or completely embedded. An active portion of a voltage regulator is mounted on the packaging substrate and supplies regulated voltage to a die also mounted on the packaging substrate. Alternatively, the active portion of the voltage regulator is integrated into the die the voltage regulator supplies voltage to. The voltage regulator cooperates with the inductors and/or capacitors to supply voltage to the die. The inductors may be through vias in the packaging substrate. For additional inductance, through vias in a printed circuit board on which the packaging substrate is mounted may couple to the through vias in the packaging substrate.
The present disclosure generally relates to integrated circuits (ICs). More specifically, the present disclosure relates to manufacturing integrated circuits.
Integrated circuits (ICs) are fabricated on wafers. Commonly, these wafers are semiconductor materials, such as silicon, and singulated to form individual dies. Through efforts of research and development, the size of the transistors making up the ICs has decreased to 45 nm and will soon decrease to 32 nm. As transistor size decreases, the supply voltage to the transistors decreases. The supply voltage is conventionally smaller than wall voltages available in most countries or battery voltages used in portable devices. For example, an IC may operate at 1.25 Volts whereas the wall voltage is 120V or 240V. In a portable device, such as cellular phone, the battery voltage may range from 6V at full charge to 3V at near empty charge.
A semiconductor die may be coupled to a voltage regulator that converts available voltages at wall outlets or batteries to lower voltages used by the die. The voltage regulator ensures a constant voltage supply is provided to the die. This is an important function, because the ability of transistors to tolerate voltages under or over the target voltage is small. Only tenths of a volt lower may create erratic results in the die; only tenths of a volt higher may damage the die.
Dies are mounted on a packaging substrate, and the packaging substrate is mounted on a printed circuit board (PCB) approximately 1-2 mm thick during assembly. Conventionally, the voltage regulator is located on the PCB with the die to which the voltage regulator supplies voltage. Placing the voltage regulator on the PCB separate from the die results in a voltage drop between the voltage regulator and the die that the voltage regulator supplies. For example, at a supply voltage of 1.125 Volts, a voltage drop of 0.100V may occur between the voltage regulator and the die as the voltage passes through the PCB, packaging substrate, and die. As the supply voltage decreases with shrinking transistor size, the voltage drop becomes a significant fraction of the supply voltage. Additionally, placing the voltage regulator on the PCB requires the use of pins on the die to allow the die to communicate with the voltage regulator. The die may send commands to the voltage regulator such as sleep or wake-up for scaling up or scaling down the voltage supply. The additional pins consume space on the die that could otherwise be eliminated.
Reducing the voltage drop from the voltage regulator to the die improves performance of the die. Maximum frequency of a die scales proportionally with supply voltage. For example, eliminating a voltage drop of 0.100V may increase a maximum frequency (fmax) of the die by 100 MHz. Alternatively, if the voltage drop is reduced and maximum frequency not increased, power consumption in the die is reduced. Power consumption is proportional to capacitance multiplied by a square of the supply voltage. Thus, reducing the supply voltage may result in significant power savings.
Further, conventional voltage regulators have slow response times due to the distance between the voltage regulator and the die. In the event the current transients are too fast f